10:13:01

3.4 Digital IO registers

Digital IO ports

Data flow
PxOUT

Pin
PxIN

Data flow
PxDIR

Vcc

PxREN

Microcomputer principles and applications

 10:13:01
3.4 Digital IO registers

3.4.1 Input Register PxIN

Each bit in each PxIN register reflects the value of the input signal
at the corresponding I/O pin when the pin is configured as I/O
function.
• Bit = 0: The input is low
• Bit = 1: The input is high
NOTE: Writing to Read-Only Registers PxIN
Writing to these read-only registers results in increased current
consumption while the write attempt is active.

Microcomputer principles and applications

3.4 Digital IO registers

3.4.2 Output Registers PxOUT

Each bit in each PxOUT register is the value to be output on the
corresponding I/O pin when the pin is configured as I/O function,
output direction, and the pullup/down resistor is disabled.
• Bit = 0: The output is low.
• Bit = 1: The output is high.
If the pin’s pullup/pulldown resistor is enabled, the corresponding
bit in the PxOUT register selects pullup or pulldown.
• Bit = 0: The pin is pulled down
• Bit = 1: The pin is pulled up

Microcomputer principles and applications

3.4 Digital IO registers

3.4.3 Direction Registers PxDIR

Each bit in each PxDIR register selects the direction of the
corresponding I/O pin, regardless of the selected function for the
pin. PxDIR bits for I/O pins that are selected for other functions
must be set as required by the other function.
• Bit = 0: The port pin is switched to input direction
• Bit = 1: The port pin is switched to output direction

Microcomputer principles and applications

3.4 Digital IO registers

3.4.4 Pullup/Pulldown Resistor Enable Registers PxREN

Each bit in each PxREN register enables or disables the
pullup/pulldown resistor of the corresponding I/O pin. The
corresponding bit in the PxOUT register selects if the pin is pulled
up or pulled down.
• Bit = 0: Pullup/pulldown resistor disabled
• Bit = 1: Pullup/pulldown resistor enabled

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Terminologies
• Opcode
⋄ What the instruction does - verb.
⋄ May or may not require operands – objects.
• Source Operand
⋄ 1st data object manipulated by the instruction.
• Destination Operand
⋄ 2nd data object manipulated by the instruction.
⋄ Also where results of operation are stored.
• Addressing Modes

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Instruction format
• There are three formats used to encode instructions for
processing by the CPU core
⋄ Double operand.

15 12 11 8 7 6 5 4 3 0
Op-code S-reg Ad b/w As D-reg

Example:
mov.w r5,r4
Op-code S-reg Ad b/w As D-reg
move r5 Register 16-bits Register r4
0100 0101 0 0 00 0100

Instruction code = 0x4504

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Instruction format
⋄ Single operand.

15 6 5 4 3 0
Op-code b/w Ad D-reg

Example:
rrc.w r 5
Op-code b/w Ad D-reg
rrc 16-bits Register r5
00100000 0 00 0101
Instruction code = 0x1005

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Instruction format
⋄ Jumps.

15 13 12 10 9 0
Op-code Condition 10-bit, 2's complement PC offset

Example:
rrc.w r 5
Op-code Condition 10-bit, 2's complement PC offset
JC Carry set -28
001 011 1111100100
Instruction code = 0x1005

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Instruction format
• The instructions for double and single operands, depend on the
suffix used, (.W) word or (.B) byte. These suffixes allow word or
byte data access.
• If the suffix is ignored, the instruction processes word data by
default.
• The source and destination of the data operated by an instruction
are defined by the following fields:
⋄ src: source operand address, as defined in As and S-reg.
⋄ dst: destination operand address, as defined in Ad and D-reg.
⋄ As: addressing bits used to define the addressing mode used by
the source operand.
⋄ S-reg: register used by the source operand.
⋄ Ad: Addressing bits used to define the addressing mode used by
the destination operand.
⋄ D-reg: register used by the destination operand.
⋄ b/w: word or byte access definition bit. Microcomputer principles and applications
3.5 Instruction Set Architecture (ISA)

Assembler sections
• A section is a block of code or data that occupies contiguous
space in the memory map.
• Each section has its own Location Counter.
• The assembler assembles into the current section.
• There are two types of sections:
⋄ Initialized sections containing data or code (modal): .sect,
.text
⋄ Uninitialized sections reserving space in the memory map
for uninitialized data (temporary): .bss, .usect

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Assembler sections

Object File Target Memory

.bss var,2
RAM
.usect "mySection"

.text

ROM (Flash)
.sect "reset"

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Location counter
• The Location Counter holds the relative memory position of an
instruction within the current section.
⋄ Each section has a location counter used to assign storage
addresses to your program’s statements.
⋄ As the instructions of a source module are being assembled,
the location counter keeps track of the current location in
storage.
⋄ A $ (dollar sign) can be used as an operand to an instruction
to refer to the current value of the location counter.

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Location counter
• The assembler assembles into the current section.
⋄ An initialized section directive instructs the assembler to stop
assembling in the current section and begin assembling in
the indicated section.
⋄ An uninitialized section directive does not end the current
section, but simply escape from the current section
temporarily. (Thus uninitialized directives .bss and .usect
can appear anywhere in an initialized section without
affecting its contents.).

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Assembly process
The assembler translates 1-to-1 assembly language instructions
(.asm) into the machine language of the ISA (.obj).
• 1st Pass: store all labels/constants and their corresponding
addresses/values in the symbol table
⋄ Zero all Location Counters ($).
⋄ For each non-empty line in the .text section:
1. if line contains a label, add label and current LC to the
symbol table
2. if line contains an instruction, increment the LC
accordingly
⋄ Stop when .end directive is found.

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Assembly process

• 2nd Pass: convert instructions to machine language, using

information from symbol table Find the .text assembly directive
and zero all Location Counters ($).
⋄ For each executable assembly language statement:
1. generate the corresponding machine language
instruction.
2. resolve labels referenced in instructions using the
symbol table.
3. increment LC for each instruction as in pass 1
4. output resulting machine code and program listing to
output files
⋄ Stop when .end directive is found.

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Assembly process

Microcomputer principles and applications

3.5 Instruction Set Architecture (ISA)

Linker
The Linker program "links" two files together according to their
declared sections.

Microcomputer principles and applications

3.6 Assembly instructions

Double operand
Mnemonic Operation Description
Arithmetic instructions
ADD(.B or .W) src,dst src+dst → dst Add source to desti-
nation
ADDC(.B or .W) src+dst+C → dst Add source and
src,dst carry to destination
DADD(.B or .W) src+dst+C → dst Decimal add source
src,dst (dec) and carry to destina-
tion
SUB(.B or .W) src,dst dst+.not.src+1 → dst Subtract source from
destination
SUBC(.B or .W) dst+.not.src+C → dst Subtract source and
src,dst carry from destina-
tion

Microcomputer principles and applications

3.6 Assembly instructions

Double operand
Logical and register control instructions
AND(.B or .W) src,dst src.and.dst → dst AND source with
destination
BIC(.B or .W) src,dst .not.src.and.dst → Clear bits in destina-
dst tion
BIS(.B or .W) src,dst src.or.dst → dst OR (set) bits in desti-
nation
BIT(.B or .W) src,dst src.and.dst Test bits in destina-
tion
XOR(.B or .W) src,dst src.xor.dst → dst XOR source with
destination

Microcomputer principles and applications

3.6 Assembly instructions

Double operand
Mnemonic Operation Description
Data instructions
CMP(.B or .W) dst-src Compare source to
src,dst destination
MOV(.B or .W) src → dst Move source to des-
src,dst tination

Microcomputer principles and applications

3.6 Assembly instructions

Single operand

Mnemonic Operation Description

Arithmetic instructions
RRC(.B or .W src C → MSB → MSB-1 Rotate right thru
... LSB+1 → LSB → carry
C
SWPB (.W) src Bits 15 to 8 <-> bits 7 Swap bytes
to 0
RRA (.B or .W) src MSB → MSB, MSB Rotate right arith-
→ MSB-1, ... LSB+1 metic
→ LSB, LSB → C
SXT(.B) src Bit 7 → Bit 8 ......... Bit Sign extend byte
15

Microcomputer principles and applications

3.6 Assembly instructions

Single operand

Mnemonic Operation Description

Arithmetic instructions
PUSH(.B or .W) src SP-2 → SP, src → Push byte/word
SP source on stack
CALL dst dst → tmp ,SP-2 → Subroutine call to
SP, PC → SP, tmp → destination
PC
RETI TOS → SR, SP+2 → Return from interrupt
SP, TOS → PC, SP+2
→ SP

Microcomputer principles and applications

3.6 Assembly instructions

Mnemonic Operation Description

PC-relative jumps, adding twice the sign-extended offset to the
PC, for a jump range of -1024 to +1022.
JNZ/JNE Jump if Z == 0 Jump if not equal (if !=)
JZ/JEQ Jump if Z == 1 Jump if equal (if ==)
JNC/JLO Jump if C == 0 Jump if carry (if unsigned <)
JC/JHS Jump if C == 1 Jump if no carry (if unsigned
>=)
JN Jump if N == 1 Jump if negative (No JP)
JGE Jump if N == V Jump if zero or positive (if
signed >=)
JL Jump if N != V Jump if less than (if signed <)
JMP Jump Jump unconditionally

Microcomputer principles and applications

3.7 Emulated instructions

In addition to the 27 instructions defined by the MSP 430 ISA, there

are 24 additional emulated instructions. The emulated instructions
make reading and writing code more easy, but do not have their
own op-codes. Emulated instructions are replaced automatically by
native MSP 430 instructions.
There are no penalties for using emulated instructions.
Mnemonic Operation Emulation Description
Arithmetic instructions
ADC(.B or dst + C→ dst ADDC(.B or Add carry to desti-
.W) dst .W) #0,dst nation
DADC(.B or dst + C → dst DADD(.B or Decimal add carry
.W) dst (decimally) .W) #0,dst to destination

Microcomputer principles and applications

3.7 Emulated instructions

Mnemonic Operation Emulation Description

Arithmetic instructions
DEC(.B or dst-1 → dst SUB(.B or Decrement desti-
.W) dst .W) #1,dst nation
DECD(.B or dst-2 → dst SUB(.B or Decrement desti-
.W) dst .W) #2,dst nation twice
INC(.B or .W) dst+1 → dst ADD(.B or Increment destina-
dst .W) #1,dst tion
INCD(.B or dst+2 → dst ADD(.B or Increment destina-
.W) dst .W) #2,dst tion twice
SBC(.B or dst + 0FFFFh dst + 0FFh → Subtract source
.W) dst + C → dst dst SUBC(.B and borrow /.NOT.
or .W) #0,dst carry from dest.

Microcomputer principles and applications

3.7 Emulated instructions

Mnemonic Operation Emulation Description

Logical and register control instructions
INV(.B or .W) .NOT.dst → XOR(.B Invert bits in desti-
dst dst or .W) nation
#0(FF)FFh,
dst
RLA(.B or C ← MSB ADD(.B or Rotate left arith-
.W) dst ← MSB-1 .W) dst,dst metically
LSB+1 ←
LSB ← 0
RLC(.B or C ← MSB ADDC(.B or Rotate left through
.W) dst ← MSB-1 .W) dst,dst carry
LSB+1 ←
LSB ← C

Microcomputer principles and applications

3.7 Emulated instructions

Mnemonic Operation Emulation Description

Program flow control
BR dst dst → PC MOV dst,PC Branch to destina-
tion
DINT 0 → GIE BIC #8,SR Disable (general)
interrupts
EINT 1 → GIE BIS #8,SR Enable (general)
interrupts
NOP None MOV #0,R3 No operation
RET @SP → PC, MOV Return from sub-
SP+2 → SP SP+,PC routine

Microcomputer principles and applications

3.7 Emulated instructions

Mnemonic Operation Emulation Description

Data instructions
CLR(.B or 0 → dst MOV(.B or Clear destination
.W) dst .W) #0,dst
CLRC 0→C BIC #1,SR Clear carry flag
CLRN 0→N BIC #4,SR Clear negative flag
CLRZ 0→Z BIC #2,SR Clear zero flag
POP(.B or @SP → MOV(.B or Pop byte/word
.W) dst temp, SP + 2 .W) SP+,dst from stack to
→ SP, temp destination
→ dst

Microcomputer principles and applications

3.7 Emulated instructions

Mnemonic Operation Emulation Description

Data instructions
SETC 1→C BIS #1,SR Set carry flag
SETN 1→N BIS #4,SR Set negative flag
SETZ 1→Z BIS #2,SR Set zero flag
TST(.B or dst + 0FFFFh CMP(.B or Test destination
.W) dst + 1, dst + .W) #0,dst
0FFh + 1

Microcomputer principles and applications

3.8 Assembler directives

Used to specify:
• Starting addresses for programs.
• Starting values for memory locations.
• Specify the end of program text.

Microcomputer principles and applications

3.8 Assembler directives
Common Assembler directives
Mnemonic and Syntax
.bss symbol, size in bytes[,
alignment]
.sect "section name"
.text
.byte value1[, ..., valuen]
.string "string1"[, ..., "stringn"]
.word value1[, ... , valuen]
Description
Reserves size bytes in the .bss
(uninitialized data) section
Assembles into a named (initial-
ized) section
Assembles into the .text (exe-
cutable code) section
Initializes one or more succes-
sive bytes in the current section
Initializes one or more text
strings
Initializes one or more 16-bit in-
tegers
Microcomputer principles and applications
3.8 Assembler directives
Common Assembler directives
Mnemonic and Syntax
.align [size in bytes]
.def symbol1[, ... , symboln]
.include ["]filename["]
.ref symbol1[, ... , symboln]
Description
Aligns the LC on a boundary
specified by size in bytes; must
be a power of 2; defaults to word
(2 byte)
Identifies one or more symbols
that are defined in current mod-
ule and that can be used in other
modules
Includes source statements
from another file
Identifies one or more symbols
used in the current module that
are defined in another module
Microcomputer principles and applications
3.8 Assembler directives
Common Assembler directives
Mnemonic and Syntax
symbol .equ value
symbol .set value
.cdecls [options,] "filename"
.end
Description
Equates value with symbol
Equates value with symbol
Share C headers between C and
assembly code
Ends program
Microcomputer principles and applications
3.9 Subroutines

• call dest Used to call subroutine. Core instruction (call

#SubLabel is common).
• ret (Return from a subroutine)

Microcomputer principles and applications

3.9 Subroutines

Example

Microcomputer principles and applications

3.9 Subroutines

Microcomputer principles and applications

3.9 Subroutines

A1 A2 A3

a f b
11
10
12

9
8
7

a
b
c
d
e h
f
5
6
1
2
3
4

g
A1
e d h c g A2
A3 A4

A4

Microcomputer principles and applications

3.9 Assembler basic constructs

Programming structure
• Sequential.
• Conditional.
• Iterative.

Microcomputer principles and applications

3.9 Assembler basic constructs

Flowchart

Oval Beginning or end of a program

Parallelogram Input or output operation

Rectangle Process to be carried out

Diamond Decision (or branch) to be made

Flow line
Direction of logic flow

Microcomputer principles and applications

3.9 Assembler basic constructs

if-then-else structure

Microcomputer principles and applications

3.9 Assembler basic constructs

switch/case structure

Microcomputer principles and applications

3.9 Assembler basic constructs

for-loop structure

Microcomputer principles and applications

3.9 Assembler basic constructs

while-loop structure

Microcomputer principles and applications