Tiristores Caracteristicas

Thyristors and
controlled rectifiers
EE328 Power Electronics
Assoc. Prof. Dr. Mutlu BOZTEPE
Ege University, Dept. of E&E
Outline of lecture
 Thyristors

EE328 POWER ELECTRONICS
Unijunction transistors
 Principal of phase control
 Single Phase controlled rectifier
– Single Phase Half-wave Rectifiers
– Single Phase Semiconverters
– Single Phase Full converters
– Single Phase Dual converters
 Three Phase controlled rectifier
– Three Phase Half-wave Rectifiers
– Three Phase Semiconverters
– Three Phase Full converters
– Three Phase Dual converters
EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 2

Thyristor
 Most important type of power semiconductor
device.
 They can operate as a bistable switch that can
be turned on by a gate signal, but can not be
turned off by the gate.
 Proposed in 1950s at Bell Lab.
 The first thyristor was developed in 1957 by
General Electric (GE)
 Have highest power handling capability up to
~4500 Volt, up to ~5000 Amperes
 Maximum switching frequency for typical
thyristors is around 1kHz. But it can rise up to
20kHz for some special types.
 It is inherently slow switching device
compared to BJTs or MOSFETs.

Structure
 It is a four-layer semiconductor device
of pnpn structure with three pn-junctions;
e.g. J1, J2 and J3.
 Terminals; Anode (A), Cathode (K)
and Gate (G)
 Forward blocking mode: When Anode
voltage is made positive with respects
to Cathode, the junctions J1 and J3
are forward biased, and J2 is reverse
biased, and therefore a small leakage current can flow through the
device.
 Reverse blocking mode: When Cathode has positive voltage than
the Anode, J1 and J3 are reverse biased, and J2 is forward biased,
and therefore a small leakage current can flow through the device.
 For both blocking modes the gate terminal is assumed as open
circuit.
Avalanche breakdown
 Forward leakage current is very small. IT
 If the VAK is increased to a sufficiently Latching

large value, the leakage current current
Forward
increases and the junction J2 breakdown
voltage
breaks down. IL
 This voltage is called as

forward breakdown voltage (VBO). VBO VAK
 Since the other junctions J1 and J3 Forward leakage current
are already fwd biased, then the device

will be in conducting state or on-state.
 The anode current must be more than a value known as latching
current to keep the thyristor is on-state. Otherwise the device will
revert to the blocking condition as the VAK is reduced.
 Latching current is the minimum anode current to maintain the
thyristor in the on-state immediately after it is turned on (no gate
signal)
Holding current
 Once the thyristor conducts, IT
Forward voltage
it behaves as a conducting diode drop
Latching
and there is no control over the current
Forward
device. breakdown
voltage
 Therefore the device current IL
IH
must be limited by external Holding
current
components, such as resistors.
VBO VAK
 The forward voltage drop is due to
the ohmic drop in the four layers and it is small, typically 1V.
 If the fwd anode current is reduced below a level known as holding
current IH, a depletion region is developed around junction J2 due to
the reduced number of carriers, and the thyristor will be in blocking
state.
 The holding current is very small in the order of milliamperes, and it
is less than the latching current.

Gate triggering
 A thyristor can be turned on by increasing forward voltage beyond
breakdown voltage VBO, but such a turn-on could be destructive.
 In practice, a positive gate-cathode voltage VGK, is applied to the
thyristor.
 As the gate current is increased, the forward blocking voltage is
decreased as shown in the figure
 Once the thyristor is turned on
by gating signal and its
forward current is greater
than the holding
current, the
device continues
to conduct.
 Thyristor is a
latching device.

Two-transistor model of thyristor
 The latching action due to positive feedback can be demonstrated
by using two-transistor model of thyristor.
I A  I C1  I C 2  1 I A  I CBO1    2 I K  I CBO2  ICBO1 and ICBO2 are
leakage currents.
 For a gating current I K  I A  I G and solving for IA
 2 I G  I CBO1  I CBO 2
IA 
1  (1   2 )

Two-transistor model of thyristor
 2 I G  I CBO1  I CBO 2
IA 
1  (1   2 )
 The current 1 varies with the emitter current IA, and 2 varies with
IK=IA+IG.
 When gate current IG is increased, IA increases too.
 An increase in IG also increases 1 and 2.
 The increase in 1 and 2
causes further increase Typical variation of current
in IA, and go on… gain with emitter current in
thyristor
 If (1 + 2) tends to be unity
denominator approaches zero,
resulting in large current of IA.
 Therefore can be turned on
by a small gate current.

Thyristor turn-on
A thyristor can be turned on by the following ways;
 Thermals: If the temperature is high, there will be an increase in the
number of electron-hole pairs. This increase would cause (1 + 2)
to increase which may turn on the thyristor. This type of turn-on may
cause thermal runaway and is normally avoided.
 Light: If light is allowed to strike the junctions, the electron-hole

pairs will increase; and the thyristor may be turned on.
 High voltage: If VAK is greater than the VBO, thyristor turns on.
 dv/dt: If the rate of rise of anode-cathode voltage is high, the

charging current of the junction capacitance may trigger the thyristor
and make it turned-on. The device must be protected against dv/dt.
 Gate current: If a thyristor forward biased, a positive gate-cathode

voltage would turn on the thyristor.
Thyristor types
 Phase-control thyristors (SCRs)
 Fast-switching thyristors (SCRs)
 Gate-turn-of thyristors (GTOs) SIT
 Bidirectional triode thyristors (TRIACs)

 Reverse-conducting thyristors (RCTs)
 Static Induction thyristors (SITHs) GTO
 Light-activated silicon-controlled thyristor (LASCRs)
 FET-controlled thyristor (FET-CTHs)
 MOS-controlled thyristor (MCTs)
Triac LASCR
MCT

Gate drive
 The following points should be considered in designing the gate
control circuit;
– The gate signal should be removed after the thyristor is turned on. A
continues gate signal increases the power loss in the gate junction.
– While thyristor is reversed biased, there should be not gate signal;
otherwise, the thyristor may fail due to increased leakage current.
– The width of gate pulse tG must be longer than the time required for the
anode current reach to the holding current.
Opto isolated Pulse transformer

gate drive isolated gate drive

Unijunction transistor
 Since the device has one pn-junction and three leads, it is commonly
called a unijunction transistor.
 With only one pn-junction, the device is really a form of diode.
 The emitter is heavily doped having many holes. The n region,
however, is lightly doped. For this reason, the resistance between
the base terminals is very high ( 5 to 10 kΩ) when emitter lead is
open.

Unijunction transistor
 If voltage VBB is applied between B2 and B1 with emitter open, a voltage
gradient is established along the n-type bar. Since the emitter is located
nearer to B2, more than half of VBB appears between the emitter and B1.
 The voltage V1 between emitter and B1 establishes a reverse bias on the pn
junction and the emitter current is cut off. Only leakage current flows.
 If a positive voltage is applied at the emitter the pn junction will remain
reverse biased so long as the input voltage is less than V1
 If the input voltage to the emitter exceeds V1, the pn junction becomes
forward biased, and then the device is now in the ON state.
 If a negative pulse is applied to the emitter, the pn junction is reverse biased
and the emitter current is cut off. The device is then in the OFF state.

Equivalent circuit of UJT
 The resistance of the silicon bar is called
the interbase resistance RBB
 The inter-base resistance is
represented by two resistors
in series; RB1 and RB2.
 RB2 is constant.
 RB1 is variable and depends
on the bias voltage across
the pn junction
 The pn junction is represented
in the emitter by a diode D.
 The ratio V1/VBB is called intrinsic stand-off ratio () which is
between 0.51 to 0.82.

Characteristics of UJT
 Initially, in the cut-off region,
as VE increases from zero,
slight leakage current flows
from terminal B2 to the emitter.
This current is due to the
minority carriers in the reverse
biased diode.
 Above a certain value of VE,
forward IE begins to flow,
increasing until the peak voltage
VP and current IP are reached
at point P.
 After the peak point P, an attempt to increase VE is followed by a
sudden increase in emitter current IE with a corresponding decrease
in VE. This is a negative resistance portion.
 The negative portion of the curve lasts until the valley point Vv is
reached. After the valley point, the device is driven to saturation.

Design UJT circuit
 The load line formed by R and Vs Vs  V p
should intersect the device Ip
characteristics to the right of peak
Vs  Vv
point but to the left of valley point,
otherwise UJT will not turn on. Iv
 Therefore min&max values for R
Vs  Vv Vs  V p
R
Iv Ip
 where Vp can be calculated as

V p  V1  VD  VBB  VD
 assume VS  VBB
VD: One diode fwd
Vp  VS  VD voltage drop,  0.5V
Design UJT circuit
 The pulse width of triggering pulse tg is
t g  RB1C
 Oscillation frequency is
1 1
T   RC ln
f 1 
 A resistor RB2 is generally connected

in series with B2 to compensate for the
decrease in Vp due to temperature rise
and to protect the UJT from thermal
runaway.
104
RB 2 
 VS
Exercise 1
 Design the UJT triggering circuit. The parameters
of UJT are Vs=30V, =0.51, Ip=10A, Vv=3.5V,
and Iv=10mA. The frequency of oscillation is
f=60Hz, and width of pulse is tg=50s.
 Solution:
Vp  0.51 30  0.5  15.8V
Let assume C=0.5 F
Vs  Vv Vs  V p
T  RC ln
1

1
 R  0.5F ln
1 R
1  60 1  0.51 Iv Ip
R  46.7k 30  3.5 30  15.8
R
tg 50s 10mA 10A
RB1    100
C 0.5F 2.65k  R  1.42M
104 Min&max limits for R
RB 2   654
0.51 30
Principle of phase control
 Diode rectifiers produce a fixed output voltage.
 In order to control the output voltage of a rectifier, phase control
thyristors must be used instead of diodes.
 The output voltages of these rectifiers are varied by varying the
delay or firing angle of the thyristor.
 Phase controlled thyristors are turned on by the application of a
short pulse to the gate and they are turned off by the process of
natural or line commutation.
Vdc 
Vm
1  cos 
2

Principle of phase control
 There are two types of phase control converters:
– Single phase converters.
– Three-phase converters
 Each type of converter can be divided into three
categories:
– Semiconverter: one quadrant converter, having
one polarity of voltage and current
– Full converter: two quadrant device whose output

voltage polarity can be either positive or negative
but whose output current has one polarity.
– Dual converter: four quadrant device whose output

voltage and current can be of either positive of
negative polarity.

Single Phase half-wave SCR rectifier
with R Load
 For the positive half cycle of Vs, T1 is forward

biased and when the thyristor is fired at wt= it
conducts and input voltage appears across
the load.
 When the input voltage goes negative at wt=
thyristor is reverse biased and it is turned off.
 The firing angle (or delay angle) is defined as
the time after the input voltage starts to go
positive until the thyristor is fired at wt=.
 For this converter: 0180°

with R Load
http://www.eng.uwi.tt/depts/elec/staff/rdefour/ee33d
with R Load
 Average output voltage


1 Vm
 
2 
Vdc  V sin t dt   cos t 
2
m

Vm
1  cos 
2
 Rms output voltage
 
Vm2
 1  cos 2t  dt
1
Vrms   Vm sin t dt 
2 2
2  4
Vm 1 sin 2 
     
2  2 
Exercise 2
 For single phase half wave thyristor converter with
R load, delay angle is =90°, determine,
a) rectification efficiency, b) FF, c) RF,
d) TUF, e) PIV
 Solution:
Vdc 
Vm
1  cos 90  0.1592Vm Vm 1  sin2  90 
Vrms     90  
2 2  180 2 
Vdc 0.1592Vm  0.3536Vm
I dc  
R R Vrms 0.3536Vm
I rms  
Pdc  Vdc I dc 
0.1592Vm 
2
R R
R
Pac  Vrms I rms 
0.3536Vm 
2
a) Rectification efficiency R
P
  dc 
0.1592Vm   20.27% 2
Pac 0.3536Vm 2

Exercise 2 (cont.)
b) Form factor
Vac 0.3536Vm
FF    2.221or 222.1%
Vdc 0.1592Vm
c) Ripple factor
RF  FF 2  1  2.2212  1  1.983or 198.3%
d) VA power at transformer secondary is e) PIV=Vm

0.3536Vm Vm
I s  I rms  Vs   0.707Vm
R 2
 0.3536Vm 
 0.707Vm  
Vm
VA  Vs I s  
2  R 
P
TUF  dc 
0.1592Vm  R 2
 0.1014or (10.14%)
VA 0.707Vm 0.3536Vm  R

Single phase semiconverters
 Load current is assumed continues and ripple

free.
 During the positive half cycle, T1 & D2 are fwd
biased, and when the T1 is fired at wt=, load is
connected to input supply.
 During   wt  +, the input voltage is
negative and freewheeling diode Dm conducts.
 At wt= +, T2 is fired and Dm is reverse
biased. Then the load is connected to the supply
through T2 and D1.

http://www.eng.uwi.tt/depts/elec/staff/rdefour/ee33d


2 2Vm
 
2 
Vdc  V sin t dt   cos t 
2
m

Vm
1  cos 

 
Vm2
 1  cos 2t  dt
2
Vrms   Vm sin t dt 
2 2
2  2
Vm 1 sin 2 
     
2  2 
Exercise 3
 Single phase semi converter is connected to a 120V 60Hz supply.
Load current Ia can be assumed continues and its ripple content is
negligible. Turns ratio is unity. Delay angle is =/2. a) express the
input line current in a Fourier series; b) determine Vdc, Vrms,
Harmonic factor, displacement factor, input power factor
 Solution a)

1
2 
I dc  is (t ) dt  0
 2  2
1  1 
an    I a cos nt dt   I a cos nt dt  bn    I a sin nt dt   I a sin nt dt 
         
 a 1  cos n  for n  1,3,5...
2I 2I
  a sin n for n  1,3,5...
n n
0 for n  2,4,6... 0 for n  2,4,6...

is (t )  I dc   a
n 1, 2...
n cos nt  bn sin nt 

n n
 2 I sn sin nt  n 
an 2 2I a
is (t )  n  tan 1  I sn  an2  bn2  cos
n 1, 3, 5...
bn 2 n 2
Exercise 3 (cont.)
b)
Vdc 
Vm
1  cos   54.02V

Vm 1 sin 2 
Vrms        84.57V
2  2 
2 2I a 
I s1  cos  0.6366I a
 4 2
I 
2

 HF   s   1  0.4835 or 48.35%
I rms   dt  I a 1   0.7071I a  I s1 
2
I
2 
a

  
1    DF  cos    0.7071
4  4
I s1 
PF  cos  0.6366(lagging)
Is 2

Single phase semiconverter with RL load
 The load current of a semiconverter
is dependent on the load resistance
inductance and the battery voltage
E in series with the load.
 The converter operation can be
divided into two modes:
 Mode 1 (0 wt   ): Freewheeling diode is forward biased and load
current is provided by the energy stored in the magnetic field.
 Mode 2 (  wt   ): Load current is provided by the supply.
 The current avg and rms values can be calculated by solving first
the differential equations above. (See the book for solution.)

Single phase full converter
 Load current is assumed continues and

ripple free.
 During the positive half cycle, T1 & T2
are fwd biased, and when the SCRs
are fired at wt=, load is connected to
input supply.
 T1&T2 will continue to conduct beyond
wt= due to inductive load.
 At wt=+, T3&T4 are fired that makes
T1&T2 are reverse biased.
 For the period of   wt   the input

voltage and current are positive and
power flows from supply to load and
the converter is said to be in
rectification mode.
 For the period   wt  +, the input
voltage is negative, input current is
positive and power flows from the load
to the supply. The converter is said to
be operated in the inversion mode.


 
Vdc 
2
 Vm sin t dt 
2Vm
 cost  
2  2
2Vm
 cos

Note that: For purely
resistive loads the output
voltage will be similar to
semiconverter

Single phase full converters
   
Vm2
Vrms 
2
 V sin t dt  2
2 2
 1  cos 2 t  dt 
Vm
 Vs
2
m
 2

Exercise 4
 Single phase full converter is connected to a 120V 60Hz supply.
Load current Ia can be assumed continues and its ripple content is
negligible. Turns ratio is unity. Delay angle is =/3. a) express the
input line current in a Fourier series; b) determine Vdc, Vrms,
Harmonic factor, displacement factor, input power factor
 Solution a)
 
1
I dc 
2  i (t ) dt  0
s
  2    2 
1  1 
an    I a cos nt dt   I a cos nt dt  bn    I a sin nt dt   I a sin nt dt 
         
4I 4I
  a sin n for n  1,3,5...  a cos n for n  1,3,5...
n n
0 for n  2,4,6... 0 for n  2,4,6...

is (t )  I dc   a
n 1, 2...
n cos nt  bn sin nt 
 2 I sn sin nt  n 
an 2 2I a
is (t )  n  tan 1  n I sn  an2  bn2 
n 1, 3, 5...
bn n
Exercise 4 (cont.)
b) 2Vm
Vdc  cos  54.02V

Vm
Vrms   Vs  120V
2
2 2I a
I s1   0.90032I a

2
I 
HF   s   1  0.4834 or 48.34%
 I s1 
I rms  I a
 
1    DF  cos    0.5
 3 
cos    0.45(lagging)
I s1
PF 
Is

Single phase fullconverter with RL load
 The load current of a fullconverter
is dependent on the load resistance
inductance and the battery voltage
E in series with the load.
 The converter operation can be
divided into two identical modes.
 Mode 1 (  wt   + ): T1 & T2 conducts
 Mode 2 ( +   wt  2+ ): T3 & T4 conducts
 For both mode the load current is provided by supply, then
 The current avg and rms values can be calculated by solving first
the differential equations above. (See the book for solution.)

Single phase fullconverter
 Harmonic content of output
voltage vs. delay angle for
single phase full converter.
 Load is continues
 The rms load current can be
calculated approximately using
voltage harmonics instead of
analytical solution.

Single phase dual converter
 When two full converter are connected back to back, and the system
will provide four-quadrant operation and is called as dual converter.
 If 1 and 2 delay angles of converter 1 and 2 respectively, the
corresponding average output voltages are Vdc1 and Vdc2.
 The delay angles are controlled such that one converter operates as a
rectifier and the other converter operates as an inverter, but both
converter produce the same average voltage.
 Since the instantaneous voltage difference will result in circulating
current between converters, two circulating current reactor Lr/2 are
used .

Single phase dual converter
2Vm 2Vm
Vdc1  cos1 Vdc 2  cos 2
 
One converter is rectifying, the
other is inverting
Vdc1  Vdc 2
therefore
cos 2   cos1  cos  1 
 2    1
Circulating current
Assume circulating current İr is
discontinues (İr(0)=0)
t t
1 1
v  v dt
Lr 2 r Lr 2 o1 o 2
ir  v d t 
1 1
Vm  
t t
    sin t dt   sin t dt 
Lr  2 1 2 1 

2Vm
cost  cos1 
Lr
The circulating current depends on 1
The maximum value can be
4Vm
ir ,max 
Lr
If the peak load current is Ip, then the
converters should carry a peak current of
4Vm
I p  ir ,max  I p 
Lr
Circulating current
 The dual converter can be operated with or without a circulating current. If
only one converter operates at a time and carries load current, the other
converter is completely blocked by inhibiting gate pulses.
 However, operating with a circulating current has the following advantages;
– Both converters are in continues conduction, independent of the load
– Power flow in either direction at any time is possible.
– Time response for changing from one quadrant to another is faster
Exercise 5: Dual converter supplied from 120V, 60Hz source, resistive load
R=10 . Lr=40mH, 1=60°, 2=120°.
Peak circulating current
ir  m 1  cos1  
2V 2 2 120  
1  cos 60  11.25 A
Lr 3770.04
Peak load current
2 120
ip   16.97 A
10
Peak current of converter1 is 16.97+11.25=28.22A

Three phase half-wave converter
 Three phase converters provide

higher average output voltage
 Output voltage ripple frequency
is higher than single phase converters. Therefore filtering
requirement is simpler.
 For this reason 3-phase converters are used extensively in high-
power applications.
 Delay angle  is defined starting from natural commutation points
where phase voltages are equal.
 Load current is assumed
constant.
 When T1 is fired at wt=/6+, the
load voltage is Vo=Van, until T2
is fired at wt=5/6+.
 When thyristor T2 is fired,
thyristor T1 is reverse biased,
because line-to-line voltage Vab
is negative, and T1 is turned off.
 For resistive loads and when
/6, the load current will be
discontinues.
 The frequency of output ripple is
3fs
 This converter is not used
frequently in practice due to high
ripple content.

 For continues load current:
 Output dc voltage
5 6 
3
Vdc 
2 

6
V

m sin t dt
3 3Vm
 cos
2

5 6  
3
Vrms   sin 2 t dt
2
V
2
m
 6
1 3
 3Vm  cos 2
6 8

3-phase half wave converter with RL load
 Van Vbn Vcn

V0
=30
0
=300 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
t
30 60 90 120 150 180 210 240 270 300 330 360 390 420
 Van Vbn Vcn

V0 =60
0
=600
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 t
30 60 90 120 150 180 210 240 270 300 330 360 390 420

3-phase half wave converter with RL load
=900

 For resistive loads:
Vbn Vcn Van
200
 For </6, the Vdc and Vrms are

100
same with constant load current
case. 0
 For /6:
-100

3
Vdc   Vm sin t dt
-200
2  6 
Vload
200
3Vm   
 1  cos   
2
150
  6 
 Rms output voltage 100

3
Vrms   t dt
2 2 50
V sin
2
m
 6 
0
5  1  
sin  2 
0.3 0.31 0.32 0.33
 3Vm   Time (s)
24 4 8 3 
3-phase half wave converter with R load
Van Vbn Vcn
=0
Vs
=00
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
t
30 60 90 120 150 180 210 240 270 300 330 360 390 420
 Van Vbn Vcn
=150
=150 t
V0 0
30
0
60
0
90
0
120
0
150
0 0
180 210
0
240
0
270
0
300
0
330
0
360
0 0
390 420
0

3-phase half wave converter with R load
 Van Vbn Vcn
=30
0
=300 0
V0
0
30 60
0 0
90
0
120 150
0
180
0 0
210
0
240 270
0
300
0 0
330
0
360
0
390
0
420
t
 Van Vbn Vcn
=60
0
=600 V0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
t
30 60 90 120 150 180 210 240 270 300 330 360 390 420

Exercise 6
 3-phase half wave converter is operated from Y-connected 208V
60Hz supply. Load resistance R=10 . Half of the maximum
possible average voltage is requested at the output. Calculate
a)delay angle, b) rms and average output current, c)average and
rms thyristor currents, d) rectification efficiency, e)Transformer
utilization factor, f) input power factor
 Solution:
3 3Vm 3 3 169.83
The maximum output voltage is Vdc , max    140.45V
2 2
Desired output voltage, then 0.5*140.45=70.23V
a) For resistive load and </6,
3 3 169.83 
70.23  cos    60  then it is not valid!
2 6
Therefore, the equation for >/6 should be used
3 3 169.83   
70.23  1  cos       67.7
2  6 
Exercise 6
b) rms and average output current
Vdc 70.23
I dc    7.02 A
R 10

67.7
Vrms  3 169.83
5
 180  1 cos   2 67.7     94.74V
4 8 3 180  
24  
Vrms 94.74
I rms    9.47 A
R 10
d) rectification efficiency
c) average and rms thyristor currents
I dc 7.02 Pdc 70.23  7.02
IA    2.34 A    54.95%
3 3 Pac 94.74  9.47
I rms 9.47
IR    5.47 A
3 3

Exercise 6
e)Transformer utilization factor
The rms line current is the same as the thyristor rms current
I s  I R  5.47 A Vs  120.1V
VA  3Vs I s  3 120.1 5.47  1970.84W
Pdc 70.23 7.02

TUF    0.25 or (25%)
VA 1970.84
f)
Output power is Po  I rms
2
R  9.472 10  896.81W
Then input power factor is
Note that due to the delay angle, ,
896.81
PF   0.455(lagging) the fundamental component of input
1970.84 line current is also delayed with
respect to the input phase voltage

Three phase semiconverter
 Three phase semiconverters are used in industrial applications up to 120kW

level, where one quadrant operation is required.
 The power factor of this converter decreases as the delay angle increases,
but it is better than 3-phase half wave converters.
 
van  Vm sin t vac  van  vcn  3Vm sin t  
Line-neutral
 6
 2 
vbn  Vm sin t   5 
Line-line
voltages
voltages

 3  vab  van  vbn  3Vm sin t  
 6 
 2 
vcn  Vm sin t    
 3  vcb  vcn  vbn  3Vm sin t  
 2
3-phase Semiconverter for  > 600
 Frequency of output voltage

is 3fs
 The delay angle can be
varied from 0 to 
 At wt=7/6, Dm conducts
due to Vac starts to be
negative
 If there were no Dm, the
freewheeling action would
be accomplished by T1 and
D2. =90°

3-phase Semiconverter for   600
7 6
3
Vdc 
2 
 
6
3V m sin t dt

3 3Vm
1  cos 
2
 Output rms voltage

7 6
3
Vrms   sin 2 t dt
2
3V
2
m
 6
3  1 
 3Vm      sin 2 
4  2 
=90°

3-phase Semiconverter for   600
 Each thyristor conducts for

120° and freewheeling diode
Dm doesnt conduct.
3  2 5 6 

 vab dt  vac dt 
Vdc 
2    
  6  2 

3 3Vm
1  cos  =30°
2
3  2 2 5 6 

 v dt   vac dt 
  ab
Vrms  2
2 
  6   2 
3  2 
 3Vm   3 cos2  
4  3 
=30°

Current waveforms for

thyristors and diodes
EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 =30° 61
Exercise 7
 3-phase semiconverter is operated from Y-connected 208V 60Hz
supply. Load resistance R=10 . Half of the maximum possible
average voltage is requested at the output. Calculate a)delay angle,
b) rms and average output current, c)average and rms thyristor
currents, d) rectification efficiency, e)Transformer utilization factor, f)
input power factor
 Solution:
3 3Vm 3 3 169.83
 
a) The output voltage for semiconverter is
Vdc 
3 3Vm
1  cos 
2
3 3 169.83
140.45  1  cos     90
2

Exercise 7
Vdc 140.45
I dc    14.05 A
R 10
3   1 
Vrms  3 169.83     sin 2   180.13V
4  2 2 2
Vrms 180.13
I rms    18.01A
R 10
c) average and rms thyristor currents d) rectification efficiency
I dc 14.05
IA    4.68 A Pdc 140.45  14.05
3 3    60.8%
Pac 180.13  18.01
I rms 18.01
IR    10.4 A
3 3

Exercise 7
Since a thyristor conducts 2/3, the rms input line current is
2 2 Vs  120.1V
I s  I rms  18.01  14.71 A
3 3
VA  3Vs I s  3 120.114.71  5300VA
Pdc 140.45  14.05
TUF    0.372 or (37.2%)
VA 5300
f)
Output power is Po  I rms R  18.01 10  3243.6W
2 2

Note that the power factor is better
3243.6
PF   0.612 (lagging) than that of 3-phase half-wave
5300 converter

Three phase full converters
 Known as a 6-pulse
converter, or 3 phase
bridge converter
 Used in industrial
applications up to 120kW
output power.
 Two quadrant operation
is possible.
 Output ripple frequency is 6fs
 Thyristor is fired at interval of /3
 Filtering requirement is less than semi- and half converters
 Firing sequence is 12,23,34,45,56,61,12…  
vab  van  vbn  3Vm sin   
van  Vm sin t  6
Line-neutral
 2   
vbn  Vm sin t  
vbc  vbn  vcn  3Vm sin t  
Line-line
voltages
voltages
 3   2
 2   5 
vcn  Vm sin t   vca  vcn  van  3Vm sin t  
 3   6 

 The thyristors are triggered at an
interval of  / 3.
 T1 is triggered at t = (/6 + ),
T6 is already conducting when T1
is turned ON.
 During the interval (/6 + ) to
(/2 + ), T1 and T6 conduct
together & the output load voltage
is equal to vab = (van – vbn)
 T2 is triggered at t = (/2 + ),
T6 turns off naturally as it is
reverse biased as soon as T2 is
triggered.
 During the interval (/2 + ) to
(5/6 + ), T1 and T2 conduct
together & the output load voltage
vO = vac = (van – vcn)

Current waveforms for

thyristors and diodes
Line period 2

Output rms voltage Output dc voltage

 2 
3 2   2 

Vrms  6 m      d t 3 
2

3V sin t
 6 Vdc  3Vm sin t   dt

  6   6
1 3 3
 3Vm  cos 2 3 3Vm
2 4  cos


Harmonic content of output voltage
 Three phase full converters for

continues load current (highly
inductive) without Dm

Exercise 8

Exercise 8 (cont.)

Output
voltage for
various 
values
Maximum delay angle

max = 180°

Three phase full converters for   /3 for R load
or Dm is used
 For   /3, the instantaneous output voltage vo will have a negative
part. Since the current through thyristors can not be negative, the
load current will always be positive.
 Thus for resistive loads, or when freewheeling diode is used, the
instantaneous voltage can not be negative, and the full converter
behave as a semiconverter.
 Output dc voltage  Output rms voltage

 2 
 2 3
  
3 Vrms  2
sin 2 t dt
 3Vm sin t dt
Vdc  3V m
 6 
6
3 1 
3 3Vm      3Vm      sin 2 
 1  cos      2 
   3 
Three phase full converters for   /3 for R load
or Dm is used
Maximum delay angle

max = 120°

Exercise 9
 3-phase fullconverter is operated from Y-connected 208V 60Hz
supply. Load resistance R=10 . Half of the maximum possible
average voltage is requested at the output. Calculate a)delay angle,
b) rms and average output current, c)average and rms thyristor
currents, d) rectification efficiency, e)Transformer utilization factor, f)
input power factor
 Solution:
3 3Vm 3 3 169.83
 
a) For resistive load and /6,
3 3Vm
Vdc  cos

3 3 169.83   /6 OK!
140.45  cos    60


Exercise 9
Vdc 140.45
I dc    14.05 A
R 10
Vrms  3 169.83
1 3 3
 cos 2  60  159.29V
2 4
Vrms 159.29
I rms    15.93 A
R 10
c) average and rms thyristor currents d) rectification efficiency
I dc 14.05
IA    4.68 A Pdc 140.45  14.05
3 3    77.8%
Pac 159.29  15.93
2 2
I R  I rms  15.93  9.2 A
6 6
Thyristor conducts 1/3 of the line period
Exercise 9
Since a thyristor conducts during 4/6 of line period, then
4 4 Vs  120.1V
I s  I rms  15.93  13 A
6 6
VA  3Vs I s  3 120.113  4683.9W
Pdc 140.45  14.05
TUF    0.421or (42.1%)
VA 4683.9
f)
Output power is Po  I rms R  15.93 10  2537.6W
2 2

Note that the power factor is less than
2537.6
PF   0.542 (lagging) 3-phase semiconverter, but better
4683.9 than that of 3-phase half-wave
converter

Three phase dual converters
 For four quadrant operation in many industrial variable speed dc drives , 3

phase dual converters are used.
 Used for applications up to 2 mega watt output power level.
 Dual converter consists of two 3 phase full converters which are connected
in parallel & in opposite directions across a common load.
 The delay angles are controlled such that one converter operates as a
rectifier and the other converter operates as an inverter, but both
converter produce the same average voltage.
 Lr stands for the circulating currents

Three phase dual converters
 Converter1 delay angle
1
 Converter2 delay angle
2 =  - 1
 Operation of each
converter is identical to
3-phase full converter
 During the interval (/6
+ 1) to (/2 + 1), the
line to line voltage vab
appears across the
output of converter 1
and vbc appears across
the output of converter 2
 Circulating current
3Vm    
ir   sin t    sin 1 
Lr   6 

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Thyristors and

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 2

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 3

 If the VAK is increased to a sufficiently Latching

 This voltage is called as

are already fwd biased, then the device

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 6

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 7

 For a gating current I K  I A  I G and solving for IA

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 8

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 9

 Light: If light is allowed to strike the junctions, the electron-hole

 dv/dt: If the rate of rise of anode-cathode voltage is high, the

 Gate current: If a thyristor forward biased, a positive gate-cathode

 Bidirectional triode thyristors (TRIACs)

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 11

Opto isolated Pulse transformer

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 12

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 13

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 14

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 15

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 16

 where Vp can be calculated as

 A resistor RB2 is generally connected

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 20

– Full converter: two quadrant device whose output

– Dual converter: four quadrant device whose output

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 21

 For the positive half cycle of Vs, T1 is forward

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 22

 Average output voltage

EE328 Power Electronics, Dr. Mutlu Boztepe, Ege University, 2014 25

d) VA power at transformer secondary is e) PIV=Vm

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 Load current is assumed continues and ripple

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 Average output voltage

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 Mode 2 (  wt   ): Load current is provided by the supply.

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 Load current is assumed continues and

 For the period of   wt   the input

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 Average output voltage

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 Rms output voltage

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Peak current of converter1 is 16.97+11.25=28.22A

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 Three phase converters provide

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 Rms output voltage

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 Van Vbn Vcn

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 For </6, the Vdc and Vrms are

 Van Vbn Vcn

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