Proceedings of the

40th Midwest Symposium on Circuits and Systems

Hyatt-Regency Hotel Sacramento, CA
August 3-6, 1997
Co-sponsored by
the Electrical and Computer Engineering Department at.
University of Californiiz Davis
and the
IEEE Circuits and Systems Society
Dedicated to the Memory of
Professor Mac Van Valkenburg
Edited by Michael A. Soderstrand, Electrical and Computer Engineering Department,
University of California, Davis, CA and by Sherif Michael, Electrical and Computer
Engineering Department, Naval Postgraduate School, Monterey, CA.
Cooperating Societies: IEEE Control Society, IEEE Education Society, IEEE Industrial
Electronics Society, lEEE Instrumentation and Measurement Society, IEEE Power
Electronics Society, IEEE Signal Processing Society, IEEE Systems, Man and Cybernetics
Society.
Proceedings of the 40fhMidwest Symposium on Circuits and Systems
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ii
 Table of Contents
Technical Sessions

Volume 1

Technical Program Chair: Sherif Michael, Naval Postgraduate School, Monterey, CA

Track S: Student Paper Contest
-
Head Judge John Choma, Jr., University of Southern California, Los Angeles
First Judge - W. Kenneth Jenkins, University of Illinois, Urbana-Champaign
-
Second Judge Magdy Bayoumi, University of Southwestern Louisiana, Layfayette, LA

s-1-1
A General Framework for the Design of Stack Filters Using the Lp Norm Objective Function .................... 1
C. E. Savin, M. 0. Ahmad, M. N. S. Swamy, Concordia University, Montreal, Quebec, Canada

s - I -2
Synthesis of a Superposition Based FIR Digital Baseband Filter................................................................. 5
Earl W. McCune, Michael A. Soderstrand, University of California, Davis, CA

S-1-3
A Novel Parallel Architecture for a Switched-Capacitor Bandpass Sigma - Delta Modulator ...................... 9
Emad N. Farag, Mohamed 1, Elmasry, University of Waterloo, Ontario, Canada; Ran-Hong Yan, Bell
Laboratories, Lucent Technologies, Holmdel, NJ

S-1-4
A Wide input Range Analog Multiplier For Neuro-computing..................................................................... 13
Mahmoud Al-Nsour, Hoda S. Abdel-Aty-Zohdy, Oakland University, Rochester, MI

S-1-5
Simple CMOS Low-Voltage Op Amps with Constant-Gm Rail-to-Rail Input Stage.................................... 17
Minsheng Wang, E, Sanchez-Sinencio, Texas A& M University, College Station, TX

S-1-6
Sigma-Delta Analog to Digital Converters with Adaptive Quantization ...................................................... 22
M, C. Ramesh, K. S. Chao, Texas Tech University, Lubbock, TX

s-1-7
Log-Domain Circuits in Subthreshold MOS ................................................................................................ 26
Wolfgang Himmelbauer, Andreas G. Andreou, Johns Hopkins University, Baltimore, MD

S-1-8
New Analog Current-ModeNoltage-Mode Fuzzifier with Continuously Adjustable Parameters................ 31
Patricia Saavedra, New Mexico Highlands University, Las Vegas, New Mexico: Antonio Ldpez,
Jorge Zrilic, Universidad Publica de Navarra, Pamplona, Spain; Jaime Ramirez-Angulo, lnstituto
Tecnoldgico de Chihuahua, Chih., Mexico and New Mexico State University, Las Cruces, NM

s-1-9
A Low Noise Operational Amplifier Design Using Subthreshold Operations ............................................. 35
Kaila G. Lamb, Steven J. Sanchez, W. Timothy Holman, The University of Arizona, Tucson, AZ

xviii
s-1-10
The Derivation of Minimal Test Sets for Combinational Logic Circuits Using Genetic Algorithms .............39
Jasbir S. Takhar, Daphne J. Gilbert, Sheffield Hallam University, Sheffield, United Kingdom

-
Track 1:Circuits I Larry Huelsman, Track Chair, University of Arizona, Tucson
-
Session 1-1:Analog Circuits Tim Holman, Session Chair, University of Arizona, Tucson

1-1-1
An Analog VLSl Focal-Plane Processing Array That Performs Object-Based Attentive Selection............43
Tonia G. Morris, Charles S. Wilson, Stephen P. De Weerth, Georgia Institute of Technology, Atlanta GA

1-1-3
Challenges in CMOS Mixes-Signal Designs for Analog Circuit Designers ................................................ 47
Ahmad Bagheii Dowlatabadi, Enable Semiconductor, Inc., San Jose, CA

1-1-4
On Stability in1 Linear Feedback Circuits ..................................................................................................... 51
Agustin Ochoa. Rockwell Semiconductor Systems, San Diego, CA

1-1-6
An Integrated Noise Source for a 2.Opm BiCMOS Technology ................................................................. 56
Shane R. Robinson, Jeffery Wright, W. Timothy Holman, University of Arizona, Tucson, AZ

1-1-7
Fuzzy Modelling of Photovoltaic Panel Equivalent Circuit.......................................................................... 60
M. T. Elhagry, M. B. Saleh, Th.F. Elshatter, Electronics Research Institute, Giza, Egypt;
E. M. Abou-Elzahab, A. A. T. Elkousy, Cairo University, Dokki, Giza, Egypt

1-1-8
Stability of Highpass and Bandreject Analog Continuous-Time OTA-C Filters.......................................... 64
Federico Gdlvez-Durand, Luiz Calbba, Antonio C. M. de Queiroz, COPPEIEffUFRJ, Rio de Janeiro,
Brazil

1-1-9
Performance and Reliability Measures of Floating-Gate Analog Memory Cells......................................... 68
John Galbraith, W. Timothy Holman, Mark A. Neifeld, University of Arizona, Tucson, AZ

1-1-10
A Class AB Current Comparator................................................................................................................. 72
0. Oliaei, P. Loumeau, €cole Nationale Superieure des Tdldcommunications, Paris, France

-
Session 1-2: Circuit Theory Peter Aronhime, Session Chair, University of Louisville, KY

1-2-1
Cumulants Theory and Applications Are Extended.................................................................................... 76
1. M. Filanovsky, University of Alberta, Edmonton, Alberta, Canada

1-2-2
InterchangeTheorems for Current-Mode Circuits Containing CFOAs and CClls ...................................... 80
KeChang Wsing, Peter Aronhime, University of Louisville, Louisville, KY

XiX
1-2-4
Advanced MathematicalTools to Study Electrical Networks Properties .................................................... 84
A. Monti, M. Riva, A. Gandelli, Politecnico di Milano, Milano, Italy

1-2-5
Network Configurations for Practical Synthesis of Voltage-to-Current-Mode Signal
Processing Circuits ..................................................................................................................................... 88
Zbigniew Lata, Peter Aronhime, University of Louisville, Louisville, KY

1-2-7
A Partition Method in Order to Find Embedded Flip-Flop Structures in Transistor Circuits by
Applying Graph Theory Concepts............................................................................................................... 91
E. Tlelo-Cuautle, A. Sarmento-Reyes, lnstituto Technoldgico de Puebla, Puebla, Mexico

1-2-8
Optimality Aspects of Centers of Gravity Algorithm for Statistical Circuit Design ...................................... 95
Mansour Keramat, Richard Kielbasa, SUPELEC, Gif-sur-Yvette Cedex, France

1-2-9
Effect of Switch Duty Ratio on the Performance of Class E Circuits .......................................................... 99
Mihai Albulef, Technical University of lasi, lasi, Romania; Robert E. Zulinski, Michigan
Technological University, Houghton, Michigan

-
Session 1-3: Power Circuits Marian Kazimierczuk, Session Chair, Wright State University,

1-3-1
Resonant dc/dc converter with Class DE Inverter and Half-Wave Current-Controlled Rectifier .............. 106
Kimiyasu Kitagata, Kokichi Shinoda, Mitsuhiro Matsuo, Shinsaku Mori, Keio University, Hyoshi,
Kohoku, Yokohama, Japan

1-3-3
Power Measurements in Adjustable Speed Drives .................................................................................. 110
Dariusz Czarkowski , Polytechnic University, Brooklyn, NY

1-3-4
Frequency Characteristics of Class E Rectifier Using Thinned-Out Method............................................ 114
Tadashi Suetsugu, Fukuoka University, Japan

1-3-5
A Fast Convergence Technique to Steady-State Solution of PWM Current-Mode Controlled
Converters ................................................................................................................................................ 119
Billy K. H. Wong, Henry Chung, City University of Hong Kong, Kwaloon Tong, Hong Kong

1-3-7
Design of A Silicon Carbide Smart Power Switch with Stable Operation over a Wide
Temperature Range.................................................................................................................................. 123
Jian-Song Chen, Kevin T. Kornegay, Purdue University, West Lafayecte, IN

1-3-8
Evaluation of Efficiency of Parallelizationof Power Flow Algorithms ....................................................... 127
Phanindra K. Mannava, Lisa Teeslink, Abul R. Hasan, South Dakota School of Mines and
Technology, Rapid City, SD
1-3-10
Power Analysis Applying the Instantaneous Complex Power Analytical Expressions on a
RL Symmetrical Three-phase System...................................................................................................... 131
Dalgerti L e k Milanez, Universidade Estadual Paulista, JLilio de Mesquita Filho-UNESP, Sa0 Paulo, Brazil

-
Session 1 4 : CMOS Circuits I. M. Filanovsky, Session Chair, University of Calgary, Alberta,
Canada

1-4-1
An Input-Free VTPand VTN Extractor Circuits Realized on the Same Chip ............................................. 135
1. M. Filanovsky, University of Alberta, Edmonton, Alberta, Canada

1-4-2
Analog Suhcircuit Maintenance in Mixed-Signal CMOS VLSl Circuits..................................................... 139
Wei-Shang Chu, K. Wayne Current, University of California, Davis, CA

1-4-3
A Full-DifferentialAnalog Multiplier Using Current-Conveyors................................................................. 143
C. Premont, N. Abouchi, R. Grisel, CPE Lyon, VilleurbanneCedex, France, J. P. Chante,
CIMERLY iNSA, Lyon, Villeurbane Cedex, France

1-4-4
A Current Conveyor Based Capacitive Multiplier ..................................................................................... 146
C. Premont, R. Grisel, J. P. Chante , ClMlRLY INSA Lyon, France

1-4-5
A Novel Compact 35N150 ps Current Pulse Generator for a New Generation of the
Laser Radars ............................................................................................................................................ 148
S. Vainshtein, On leave A. F. loffe Institute of Russian Academy of Science, St. Petersburg,
Russia; J. Kostamovaara, A. Kilpela, K. Maatta, University of Oulu, Oulu, Finland

1-4-6
A Common1 Source Input Cross Coupled Quad CMOS Mixer .................................................................. 152
Patrick J. Sullivan, Bernard A. Xavier, Walter H. Ku, University of California at San Diego,
La Jolla, CA

1-4-7
Low-Voltage Highly-LinearTransconductor Design in Subthreshold CMOS ........................................... 156
Paul M. Furth, Henry A. Ommani, New Mexico State University, Las Cruces, NM

1-4-8
A New Rail-To-Rail Input-Range CMOS Voltage Comparator ................................................................. 160
Wei-Shang Chu, K. Wayne Current, University of California, Davis, CA

1-4-9
The Performance Degradation of Folded-Cascode CMOS Op-Amp Due to Hot-Carrier Effects............. 164
Chong-Gun Vu, Hyun-Joong Kim, Woon-DalJeong, Jong-Tae Park, University of Inchon,
Namgu, Inchon, Korea

1-4-10
A Fully Differentialand Tunable CMOS Current Mode Opamp Based on Transimpedance-
TransconductanceTechnique .................................................................................................................. 168
Ali Assi, MQhamad Sawan, Ecole Polytechnique de Montreal, OC,Canada; Rabin Raut,
Concordia University, Montreal, PQ, Canada

xxi
 -
Session 1-5: A/D and D/A Conversion Kwong Chao, Session Chair, Texas Tech University,
Lubbock
1-5-2
The Realization of Delta-Sigma N D Converters in Low-Voltage Digital CMOS Technology................... 172
Jore Grilo, Rockwell Semiconductor Systems, Newport Beach, CA; Yunteng Huang, Newport
Microsystems, Inc., Irvine, CA: Gabor Temes, Oregon State University, Corvallis, OR

1-5-3
A Fully Differential Switched-Current ADC with Improved Performance.................................................. 177
Renyuan Huang, Jin-Sheng Wang, Chin-Long Wey, Michigan State University, East Lansing, MI

1-5-4
Delta-Sigma N D Converters: The Next Generation................................................................................. 181
Terri S. Fiez, Aria Eshraghi, Washington State University, Pullman, WA

1-5-5
A Flash-Like Cyclic A/D Converter Architecture for High-Resolution Applications ................................... 185
Hassan Soliman, Mansoura University, Egypt; Nadder Hamdy, Arab Academy for Science and
Technology, Alexandria, Egypt

1-5-6
A 9-Channel Integrated Time-to-Digital Converter with Sub-nanosecond Resolution ............................. 189
Antti Mantyniemi, Tim0 Rahkonen, Juha Kostamovvara, University of Oulu, Oulu, Finland

1-5-7
A Low Noise Sub-Bandgap Voltage Reference........................................................................................ 193
Maramreddy Sudha, W. Timothy Holman, University of Arizona, Tucson, AZ

1-5-8
A Time Digitizer with Interpolation Based on Time-to-Voltage Conversion.............................................. 197
Elvi Raisanen-Ruotsalainen, Tim0 Rahkonen, Juha Kostamovaara, University of Oulu, Oulu, Finland

-
Session 1-6: Amplifiers Gene Stuffle, Session Chair, Idaho State University

1-6-1
A Generalized Approach to the Macromodeling of Operational Amplifiers .............................................. 201
K, V. Noren, A. Taralqi, University of Idaho, Moscow, ID

1-6-2
AC-Driven Class E Amplifiers ................................................................................................................... 205
Brian C. Ong, Robert E. Zulinski, Michigan Technological University, Houghton, MI;
Julio C. Mandojana, Mankato State University, Mankato, MN

1-6-3
Optimization of DRAM Sense Amplifiers for the Gigabit Era.................................................................... 209
Stephen Parke, Boise State University, Boise, ID

1-6-4
Influence of Power Supply Bypass Networks on Transimpedance Amplifier Stability ............................. 213
Vinodkumar Ramakrishnan, Jens N. Albers, Richard N. Nottenburg, University of Southern
California, Los Angeles, CA

xxii
1-6-5
Designing Spice-Predictable, D.C. Coupled, Multi-Stage, Bipolar-Junction-TransistorAmplifiers .......... 217
Richard R. Johnston, Lawrence Technological University, Southfield, MI

1-6-6
A MASH Modulator with Digital Correction for Amplifier Finite Gain Effects and C-Ratio
Matching Errors......................................................................................................................................... 221
Alan Davis, Naval Undersea Warfare Center, Newport, RI; Godi Fischer, University of Rhode
Island, Kingston, RI

1-6-7
Electronic Gain Control With Constant Propagation Delay for Integrated Transimpedance
Preamplifiers ............................................................................................................................................. 225
Pasi Palojarvi, Tarmo Ruotsalainen, Juha Kostamovaara, University of Oulu, Oulu, Finland

1-6-8
High -Drive CMOS Current-Feedback Opamp ......................................................................................... 229
G. Giustolisi, G. Palmisano, G. Palumbo, S. Pennisi, Universita di Catania, Catania, Italy

1-6-9
Design of a 2.7V CMOS Analog Front-End for CCD Video System......................................................... 233
Xiaole Chen, Soft-Mixed Signal Corp., Santa Clara, CA; Antonio Salcedo, Roger Levinson, Exar
Corporation, Fremont CA; Michael A. Soderstrand, University of California, Davis, CA

1-6-10
A CMOS Four Quadrant Currentrrransconductance Multiplier................................................................ 237
Alejandro Diaz-Sanchez, Centro Nacional de lnvestigacion y Desarrollo Tecnologico, Cuervavaca,
Morelos, Mexico; Jaime Ramirez-Angulo, New Mexico State University, Las Cruces, NM;
Edgar Sanchez-Sinencio,Gunhee Han, Texas A&M University, College Station, TX

-
Session 1-7: Analog and Switched Capacitor Filters John Choma, Session Chair, University ot
Southern California, Los Angeles

1-7-1
Low Power Wideband Voltage and Current Mode Second Order Filters Using Wideband CMOS
Transimpedance Network ......................................................................................................................... 241
R. Raut, N. Guo, Concordia University, Montreal, Quebec, Canada

1-7-2
Time-Varying Volterra Series and Its Application to the Distortion Analysis of a Sampling Mixer .......... 245
Wei Vu, Subhajit Sen, Bosco Leung, University of Waterloo, Waterloo, Ontario, Canada

1-7-3
Current Feedback Amplifier: Stability and Compensation........................................................................ 249
G. Palumbo, Universita Di Catania, Catania, Italy

1-7-5
9 Bit 3.3M Samples/s Pipelined A-to-D Converter Using a New Mismatch Insensitive Algorithm ........... 253
Yalin Ren, Bosco Leung, Yuh-Min Lin, University of Waterloo, Waterloo, Ontario, Canada

1-7-7
Cascode Circuits for Switched Current Copiers ....................................................................................... 256
Teddy Loeliger, Walter Guggenbuhl, Swiss Federal institute of Technology, Zurich, Switzerland

xxiii
1-7-8
CMOS and BiCMOS Class AB Structures for Switched-Current Applications ......................................... 260
Omid Oliaei, Patrick Loumeau, Ecole Nationale Superieure des Telecommunications, Paris, France
(R, Bouchakour presenting paper)

1-7-9
A Continuous-Time Bandpass Filter Implemented in Subthreshold CMOS with Large-Signal
Stability ..................................................................................................................................................... 264
Paul M. Furth, New Mexico State University, Las Cruces, NM

1-7-10
An Architecture for High-Order, Variable Polynomial Analog Viterbi Detectors ....................................... 268
Michael Altarriba, Richard Spencer, University of California, Davis, CA

-
Session 1-8: Sigma-Delta Modulators Behrouz Nowrouzian, Session Chair, University of Calgary,
Alberta, Canada

1-8-1
The Design of High-Order Delta-Sigma Modulators for A/D Conversion ................................................. 272
John Abcarius, Loai Louis, Gordon W. Roberts, McGill University, Montreal, Quebec, Canada

1-8-2
Digital Inversion of Nonlinear Deterministic Characteristics of Sigma Delta Modulators: a Mapping
Approach ................................................................................................................................................... 276
Nguyen T. Thao, Hong Kong University of Science and Technology, Kowloon, Hong Kong

1-8-3
Design of A 10.7 MHz Band-Pass Sigma-Delta Modulator: A Comparison between CMOS
and BiCMOS Technologies ...................................................................................................................... 281
Fabrizio Francesconi, Micronova Sistemi S.r.l., Trivolzio, Italy; Valentino Liberal;, Paolo Magani,
Franco Maloberti, University of Pavia, Pavia, Italy

1-8-4
Design Considerations on Very High Resolution Sigma-Delta Modulators .............................................. 285
S. Brigati, F. Francesconi, Micronova Sistemi S.r.l., Trivolzio, Italy; F. Maloberti, V, Liberal;,
P. Malcovati, M. Poletti, University of Pavia, Pavia, Italy

1-8-5
Optimized Periodic Sigma-Delta Bitstreams for Analog Signal Generation ............................................. 289
Benoit Dufort, Gordon W. Roberts, McGill University, Montreal, PQ, Canada

1-8-6
An Investigationof Bandpass Sigma-Delta A/D Converters..................................................................... 293
Yvan Botteron, Behrouz Nowrouzian, The University of Calgaty, Calgaty, Alberta, Canada

1-8-7
Bandpass Sigma-Delta Modulation Using Frequency Translation ........................................................... 297
Hai Tao, John M. Khouty, Columbia University, New York, NY

1-8-8
A 1 . 2 BiCMOS
~ Realization of Delta-Sigma Modulator with Integrator Using Unity-Gain Buffer ............ 301
N. Llaser, S. Megherbi, J.-F, Pdne, University of Paris, Orsay, France

xxiv
1-8-9
High Resolution Multi-Bit Sigma-Delta Modulator Architecture ................................................................ 304
M. K, Kinyua, K. S. Chao, Texas Tech University, Lubbock, TX

1-8-10
Reducing Harmonic Distortion Components of a Second-Order Sigma-Delta Modulator by Using a
Compensated OTA ................................................................................................................................... 308
Carlos Garibay-LLia,Jose Silva-Martinez, National Institute of Astrophysics Optics and Electronics,
Integrated Circuits Design Group, Puebla, Mexico '

-
Session 1-10: Circuits I Poster Session Larry Huelsman, Session Chair, University of Arizona,
Tucson

1-1 0-1
A 3L -30MHz Analog CMOS Current-Mode Bandwidth Programmable Integrator................................... 312
Kwang Sub Yoon, lnha University, Inchon, Korea

1-10-2
A 15MHz, 2.6mW, Sixth-Order Bandpass Gm-C Filter in CMOS............................................................. 316
Changsik Yoo, Keewook Jung, Jeong-Woo Lee, Wonchan Kim, Seoul National University,
Seoul, Korea

1-10-3
A Highly Programmable Gain and Cutoff Frequency Multi-Channel Data Acquisition Chip .................... 320
Jan-Michael Stevenson, Gunhee Han, Edgar Sdnchez-Sinencio, Texas A&M University,
College Station, TX

1-10-4
Sensitivity of The Band-Edge Selectivity of Various Classical Filters ...................................................... 324
Celestino A. Corral, Claude S. Lindquist, University of Miami, Coral Gables, FL; Peter B. Aronhime,
University of Louisville, Louisville, KY

1-10-5
Some Prominent Characteristics of the Modified Inverse Chebyshev Function....................................... 328
Joung-Chul Ahn, Electronics and Telecommunications Res. Inst,, Taejon, 305-350,Korea;
Seok-Woo Choi, Chang-Hun Yun, Dong-Yong Kim, Electrical Circuits and Systems
Research Inst., Chonbuk National University, Chonbuk, 561-756, Korea

1-10-6
Optimization of BiCMOS Fully Differential OTA's Gain-Bandwidth and Comparison with CMOS
Technology ............................................................................................................................................... 332
H. Recoules, R. Bouchakour, P. Loumeau, Ecole Nationale Superieure des Telecommunications,
Paris, France

1-10-7
The Design of 16x16 Wave Pipelined Multiplier Using Fan-In Equalization Technique........................... 336
Daeyun Shim, Wonchan Kim, Seoul National University, Seoul, Korea

1-1 0-8
On The Periodicity of Sinusoids................................................................................................................ 340
Shlomo Karni, University of Mexico, Albuquerque, NM
1-10-9
A 10-bit Current-Mode Low-Power CMOS N D Converter with a Current Predictor and a Modular
Current Reference .................................................................................................................................... 342
Soung Hoon Shim, Kwang Sub Yoon, lnha University, Inchon, Korea

1-10-10
High-Accuracy CMOS Current Comparator.............................................................................................. 346
Cheng-Ping Wang, Chin-Long Wey, Michigan State University, East Lansing, MI

1-10-12
A New Low-Noise Active RC Oscillator .................................................................................................... 350
Mikko Lapinoja, Tim0 Rahkonen, University of Oulu, Oulu, Finland

1-10-14
A New Programmable Logic Family Using Multiple-Input Floating-Gate Transistors .............................. 354
Jaime Ramirez-Angulo, Gerard0 Gonzales-Altamirano, New Mexico State University, Las Cruces, NM

1-10-16
Optimal Design of Single-Layer Solenoid Air-Core Inductors for High Frequency Applications .............. 358
G Grand;, U, Reggiani, University of Bologna, Italy; M.K. Kazimierczuk, Wright State University,
Dayton, OH; Antonio Massarini, University of Modena, Italy

-
Track 2: Circuits I1 Robert Redinbo, Track Chair, University of California, Davis
-
Session 2-1 Arithmetic Circuits Graham A. Jullien, Session Chair, University of Windsor, Ontario,
Canada

2-1-1
A Simple, High-Precision, High-speed Digital Frequency Multiplier ........................................................ 362
Michael Lindig BOs, lnstituto Politecnico Nacional, Mexico

2-1-2
A 1.5V CMOS High-speed 16-bits8-bit Divider Using the Quotient-Select Architecture and
True-Single-phase Bootstrapped Dynamic Circuit Techniques Suitable for Low-Voltage VLSl .............. 366
C. C. Yeh, J. H. Lou, J. B. Kuo, National Taiwan University, Taiwan, ROC

2-1-3
A 1 3 Bootstrapped Pass-Transistor-Based Carry Look-Ahead Circuit Suitable for Low-Voltage
CMOS VLSl .............................................................................................................................................. 370
J. H. Lou, J. B. Kuo, National Taiwan University, Taiwan, ROC

2-1-4
A New Architecture for Area-Efficient Multiplicationby a Class of Rational Coefficients ......................... 373
Brian Schoner, LSI Logic, Milpitas, CA; Stephen Molloy, University of California, Los Angeles, CA

2-1-5
Overlap Resolution: Continuous Valued Digits for Hybrid Architectures .................................................. 377
A, Saed, M. Ahmadi, G. A. Jullien, W. C. Miller, University of Windsor, Ontario, Canada

2-1-6
Modular Reduction by Multi-Level Table Lookup ..................................................................................... 381
Behrooz Parhami, University of California, Santa Barbara, CA
2-1-7
Leading-ZeroAnticipatory Logics for Fast Floating Addition with Carry Propagation Signal ...................385
Tsin-YuanChang, Jing-Reng Huang, Shao-Sheng Yang, National Tsing Hua University, Hsinchu, Taiwan
300, ROC

2-1-9
Digital Frequency Measurement of a Square Wave ................................................................................. 389
Martin Hill, Antonio Cantoni, Curtin University of Technology, Perth, Australia

2-1-10
A Three-Valued Magnetical Sensor for Data Reading ............................................................................. 394
Stefan Rohrer, Siegbert Hentschke, Norbert Reifschneider, University of Kassel, Kassel, Germany

-
Session 2-2: Digital Circuit Optimization Vojin Oklobdzija, Session Chair, University of California,
Davis

2-2-1
On the Center-of-GravityMethod of Yield Maximization .......................................................................... 398
Vijaya Poudyal, Stevens Institute of Technology,Hoboken, NJ

2-2-2
Mixed Signal Testing of Analog Components on Printed Circuit Boards ................................................. 401
Zhi-Hong Liu, Janusz A. Starzyk, Ohio University,Athens, OH

2-2-3
A Hardware Performance Analysis for a CAD Tool for PLA Testing ........................................................ 405
Alfredo Cruz, EDP College of Puerto Rico, Hato Rey, PR; Rafael Reilova, Polytechnic University
of Puerto Rico, Hato Rey, PR

2-2-4
Test Pattern Generation for Multiple Output Digital Circuits Using Cubical Calculus and
Boolean Differences.................................................................................................................................. 409
Jasbir S. Takhar, Daphne J. Gilbert, Sheffield Hallam University, Sheffield, United Kingdom

2-2-6
Bridging Fault Model for Single BJT (S-BJT) BiCMOS Circuits................................................................ 413
Sankaran M. Menon, South Dakota School of Mines & Tech., Rapid City, SO; Keith A. Ross,
American Microsystems, Inc., Pocatello, ID; Svein Ove Askeland, Lockheed Martin Space
Mission Systems & Services, Houston, TX

2-2-7
Design and Experimental Verification of a CMOS Adiabatic Logic with Single-phase Power-
Clock Supply ............................................................................................................................................. 417
Dragan Maksimovic, University of Colorado, Boulder, CO; Vojin G. Oklobdzija, Borivoje Nikolic,
K. Wayne Current, University of California, Davis, CA

2-2-8
A New State Assignment for Asynchronous Circuits for Switching Activity.............................................. 421
Kyoung-Hoi Koo, Younggap You, Kyoung-Rok Cho, Chung-Buk National University, Cheong-Ju
City, Korea

2-2-9
A New Method of Yield Maximization ....................................................................................................... 425
Mohcene Mezhoudi, Vijaya Poudyal, Stevens Institute of Technology, Hoboken, NJ

xxvii
 -
Session 2-3: Digital Filters and Signal Processing Behrooz Parhami, Session Chair, University of
California, Santa Barbara

2-3-1
Finite-PrecisionCharacterization of a Class of Bode-Type Varriable-Amplitude Digital
Bump Equalizers ....................................................................................................................................... 429
Arthur T. G. Fuller, Behrouz Nowrouzian, The University of Calgary, Calgary, Alberta, Canada

2-3-2
A Forced-Voltage Technique to Test Data Retention Faults in CMOS SRAM By IDDQ Testing .............. 433
Jose Castillejos, Victor H. Champac, lnstituto Nacional de Asfrofisica Optica y Electronica,
Puebla, Pue., Mexico

2-3-3
Design of Low-Power Narrowband Digital IIR Filters Using Delta Operator ............................................ 437
Markku Eraluoto, liro Hartimo, Helsinki University of Technology, Espoo, Finland

2-3-4
A Comparative Study of Signal Restoration Techniques for Reduction of Random Noise ...................... 441
D. Stevens, Chrysler Corporation, Auburn Hills, MI; M. Das, Oakland University, Rochester, MI

2-3-5
An Analytical Approach for the Synthesis of 2-D State-Space Filter Structures with Low Weighted
Sensitivity .................................................................................................................................................. 445
Taka0 Hinamoto, Yoshitaka Zempo, Hiroshima University, Higashi-Hiroshima, Japan

2-3-6
Area-Time Tradeoffs in FIR Digital Filters with Broadcast and Pipelined Designs .................................. 449
Ding-Ming Kwai, Behrooz Parhami, University of California, Santa Barbara, CA

2-3-7
Built-In Self-Test of Bit-Serial Arithmetic Units for Digital Signal Processing........................................... 453
Hans 0. Kreken, Einar J. Aas, Norwegian University of Science and Technology, Trondheim,
Norway

Session 2-10: Circuits II Poster Session - Robert Redinbo, Session Chair, University of California,
Davis

2-10-2
A 1.Opm CMOS All-Digital Clock Multiplier............................................................................................... 460
Frankie King-Sun Cheng, Cheong-Fat Chan, Oliver Chiu-Sing Choy Chinese University of
Hong Kong, Shatin, Hong Kong

2-10-3
A CMOS Current-Mode Full-Adder Cell for Multi-Valued Logic VLSl ....................................................... 463
R. J. Barton Ill, T. 0. Walker Ill, D. J. Fouts, Naval Postgraduate School, Monterey, CA

2-10-4
A New Low Roundoff Noise Second Order Digital Filter Section which Is Free of Constant-Input
Limit Cycles ............................................................................................................................................... 468
Mario Sarcinelli-Filho, Marcel0 de Oliveira Campon&z, Federal University of Espirito Santo,
VitoridES Brazil

xxviii
2-10-8
Establishing Latch Correspondence for Sequential Circuits Using Distinguishing Signatures ................472
Janett Mohnke, Dresearch GmbH, Berlin, Germany; Paul Molitor, Martin-Luther Universitat Halle;
Sharad Malik, Princeton University, Princeton, NJ

2-10-9
Fault Characterization of Resistive Shorts Using a Piecewise-Linear Circuit Technique ........................ 477
Hung-Jen Lin, Linda Milor, University of Maryland, College Park, MD

2-10-10
The Superpositioning Truncated Response Filter: A New Filter Structure for Basebond or
Pre-modulation Filtering............................................................................................................................ 481
Michael J. Paczonay, Earl W. McCune, Michael A. Soderstrand, University of California, Davis, CA

2-10-11
Voice Quality of Cellular Mobile Phones................................................................................................... 485
Haideh M. Karkhanechi, Michael A. Soderstrand, University of California, Davis, CA

-
Track 3: Systems T.C. (Steve) Hsia and G.R. (Rick) Banner, Track Co-Chairs, University of
California, Davis
-
Session 3-1: Robotics & Control Systems Ty A. Lasky, Session Chair, University of California,
Davis

3-1-1
Development of a Distributed Multiple Mobile Robot Control System for Automatic Highway Maintenance
and Construction....................................................................................................................................... 489
Xin Feng, Steven A. Velinsky, University of California,,Davis, CA

3-1-3
Using Differential Carrier Phase GPS to Control Automated Vehicles..................................................... 493
Thanh M. Nguyen, James W. Sinko, Randal C. Galijan, SRI International, Menlo Park, CA

3-1-4
Room Navigation with Fans ...................................................................................................................... 497
Gene Oldfield, T. C. Hsia, University of California, Davis, CA

3-1-6
Inverse Kinematic Solutions for Parallel Robots with Singularity Robustness ......................................... 501
Lin Hsiao, Ming-Hwei Perng, National Tsing Hua University, Taiwan ROC

3-1-8
TELEATLAS: An Educational Telerobotics Environment......................................................................... 505
Ali M. Eydgahi, R. Ghurchian, University of Tehran, Iran

3-1-9
Disturbance Accommodation Control with Fast Fourier Transform Frequency Detection ....................... 509
T. W. Martin, W. G. Johnston, University of Arkansas, Fayetteville, AR

mix
 -
Session 3-2: Telerobotics Systems Jing Wang, Session Chair, University of California, Riverside

3-2-1
Distributed Control Architecture for Intelligent Systems ........................................................................... 51 4
Thomas Laengle, Tim C. Lueth, Ulrich Rebold, Heinz Woern, University of Karlsruhe, Karlsruhe,
Germany

3-2-3
Action Selection and Strategies in Robot Soccer Systems ...................................................................... 518
Jong-Hwan Kim, Hyun-Sik Shim, Heung-So0 Kim, Myung-Jin Jung, Prahlad Vadakkepat, Kaisf,
Yusong-gu, Taejon-shi, Korea

3-2-4
GA Based On-Line Path Planning of Mobile Robots Playing Soccer Games .......................................... 522
Woong-Gie Han, Seung-Min Baek, Tae-Yong Kuc, Sung Kyun Kwan University, Suwon
Kyungki-do, Korea

3-2-6
Block-Diagonal Dominant Canonical Form Via Singular Value Decomposition....................................... 526
Sui$ S. Mahil, Purdue University Calumet, Hammond, IN

3-2-7
One Algorithm for Time-Domain Analysis of Semi-Markov Processes .................................................... 530
Gordana Jovanovic-Dolecek, Oscar Ibarra-Manzano, INAOE, Puebla, Mexico

3-2-9
Robust Stability of Interval Matrices: Simple Tests .................................................................................. 533
Juan Jose Dario Delgado-Romero, Hector Suarez-Meza, GuadalupeAcosta- Villarreal,
Eduardo Hernandez-Morales, lnstituto Technologico de Morelia, Morelia, MI

3-2-10
TMN Based ATM Network Management.................................................................................................. 537
Sukant K. Mohapatra, Andres Castifieiras, Lucent Technologies, Middletown, NJ

-
Session 3-3: Wireless Systems Kirby Mayes, Session Chair, Hewlett Packard Corp., Folsom, CA

3-3-1
GSM Base Station Amplifier Design ......................................................................................................... 541
Suresh Ojha, Hewlett Packard; G. R. Branner, University of California, Davis, CA

3-3-2
Power Amplifier Design Using Feedforward Linearization ....................................................................... 545
Scoff Rummery, Hewlett Packard; G. R. Branner, University of California, Davis, CA

3-3-3
Power Amplifier Designs for Personal Communication Networks............................................................ 549
D. Brody, G. R. Branner, University of California, Davis, CA

3-3-5
A 3-V Analog FM-Modulator Based on a Delay-Modulated PLL-Synthesizer.......................................... 553
Tim0 Rahkonen, Juha Kostamovaara, University of Oulu, Oulu, Finland; Saila Tammelin,
Nokia Mobile Phones, Oulu, Finland
3-3-6
h/4 Direct Frequency VCO for 700 MHz-Range ....................................................................................... 557
Peter Lambrecht, Jan Vandewege, University of Gent, Gent, Belgium

3-3-7
Nyquist Filters in Non-IS1Transmission.................................................................................................... 561
Ping-Kuen (Andy) Lam, Earl W. McCune, Michael A. Soderstrand, University of California,
Davis, CA

3-3-8
Miniaturized RF/Cellular Low Noise Amplifier Design Having Low Bias Power ....................................... 565
Aaron H. Ching, G. R. Branner, Donald G. Thomas, Jr., University of California, Davis, CA

3-3-9
A 1.3V 1.04GHZ - 1.30GHz CMOS Phased-Locked Loop ....................................................................... 569
Robin R.-B. Sheen, Oscal T,-C. Chen, National Chung Cheng University, Taiwan, ROC;
Robert C.-H. Chang, National Chung Using University, Taiwan, ROC

3-3-10
16 QAM Burst Mode Receiver For Upstream Communication Over CATV Networks ............................. 573
Jan Codenie, Xiaohua Wang, A. Everaert, Peter Lambrecht, Jan Vandewege, University of Gent,
Gent, Belgium; K. De Meyer, W. Trog, A.De Vleeshouwer, Siemens Atea, Atealaan, Belgium

-
Session 3-4: Microwave Systems Robert C. Owens, Session Chair, Milpitas, CA
I
3-4-1
Application of Empirical Models to Design Microstrip Tee Junctions with Prespecified Power-
Divider Ratios............................................................................................................................................ 577
B. P. Kumar, G. R. Branner, University of California, Davis, CA

3-4-10
Oscillator Design Using Nonlinear CAD ................................................................................................... 581
D. Q. Xu, B. P. Kumar, G. R. Branner, University of California, Davis, CA

3-4-2
High Frequency Bipolar Junction Transistor Modeling ............................................................................. 585
David Q. Xu, G. R. Branner, University of California, Davis, CA

3-4-3
The Use of Coupled Lines as Circuit Elements ........................................................................................ 588
Robert C. Owens, Microwave Concepts, Milpitas, CA

3-4-4
An Efficient Technique for Varactor Diode Characterization.................................................................... 591
David Q. Xu, G. R. Branner, University of California, Davis, CA

3-4-5
Reduced Size RF Coupler Design for Specialized Load Requirements .................................................. 595
Suresh Ojha, Aaron Ching, G. R. Branner, University of California, Davis, CA

3-4-7
Measurement of Modes in an Overmoded Circular Waveguide ............................................................... 599
Ronald H Johnston, University of Calgary, Alberta, Canada
3-4-8
Analysis of Lumped-Distributed Coupled Lines ........................................................................................ 603
S. Ojha, L, Bedal, G. R. Branner, B. Preetham Kumar, University of California, Davis, CA

3-4-9
Even Mode Versus Odd Mode Stability.................................................................................................... 607
Robert J. Weber, Iowa State University, Ames IA

-
Session 3-10: Systems Poster Session Ron Johnston, Session Chair, University of Alberta,
Calgary, Canada

3-10-1
Synthesis of Networks for Optimum Microwave MultiplyingApplications ................................................ 61 1
G. R. Branner, D. G. Thomas, University of California, Davis, CA

3-10-2
Design of Locally Stable Sliding Modes In BidirectionalSwitching Converters........................................ 615
Javier Calvente, Luis Martinez, Roberto Giral, Escola Technica Superior &Enginyeria, Universitat Rovira i
Virgili,Tarragona Spain

3-10-3
VCO Phase Noise Characterization ......................................................................................................... 619
0.Q. Xu, G. R. Branner, University of California, Davis, CA
3-10-4
An Efficient Constant Envelope d 4 QPSK Modulation Scheme .............................................................. 623
Tang-Fu Lee, Shih-Ho Wang, Chia-Liang Liu, University of California, Davis, CA

3-10-5
New Selection Rule for Multiple Virtual Paths in ATM Networks.............................................................. 626
Hosam Mohsen, M. El Sherif, Electronics Res. Institute, Cairo, Egypt; H. Baraka, Cairo University, Giza,
Egypt

3-10-6
Handheld Digital Video Signal Distributor Using Single Mode Optical Fibers for Video Lecture
Hall Application ......................................................................................................................................... 630
Hideyuki Asada, NEC Shizuoka Co., Ltd., Kakegawa, 436 Japan; Nabil Abd Rabou, Hiroaki Ikeda,
Yoshifumi Shimodaira, Hirofumi Yoshida, Shizuoka University, Hamamatsu, Japan

3-10-7
Optical Fiber Audio and Video Communication System Using AOM and LED ........................................ 634
Nabil Abd Rabou, Hiroaki Ikeda, Hirofumi Yoshida, Shizuoka University, Hamamatsu, Japan

3-10-8
Demo Program for Central Limit Theorem................................................................................................ 638
Gordana-Jo van0vic-Dolecek, INAOE, Puebla, Mexico

3-10-9
Determination of Cut-off Wavelengths of Ridged Waveguides by Modal Analysis .................................. 642
S. H. Hajimowlana, H. Djahanshahi, University of Windsor, Windsor, Ontario, Canada; M. Kamyab,
University of Technology, Tehran, Iran

mii
3-10-10
An Agent-Based Ultrasonic Sensing System for Mobile Robots .............................................................. 646
Eduardo 0.Freire, Teodiano Freire Bastos, Vladimir Dynnikov, Federal University of Espirito Santo,
Vitoria-ES, Brazil

3-10-12
Dynamic Load Balancing in Distributed Multimedia Systems................................................................... 650
Atsunobu Hieraiwa, Naohisa Komatsu, Kazumi Komiya, Hiroaki Ikeda, Atsugi Research Center,
Atugi, Kanagawa-ken 243, Japan

3-10-13
New PID IdentificationAlgorithm Based On Frequency Scaling .............................................................. 654
Bung-Suhl Soh, Hanyang University, Seoul, Korea; Dong-Kyun Lim, ChoongCheong College,
Cheongju, Korea

3-10-17
A On-Line Learning Algorithm for Recurrent Neural Networks Using Variational Methods ..................... 659
Won-Geun Oh, Sunchon National University, Sunchon, Chonnam, Korea; Byung-Suhl Suh,
Hanyang University, Seoul, Korea

3-10-19
A New Receptor Model1 in the Analysis of Industrial Pollution Using Fuzzy Set Systems ....................... 663
Paul0 A. de Souza, Jr., Sidney, N. Givigi, Jr, Universidde Federal do Espirito Santo, Vitoria, ES,
Brazil; M. M. Lamego, Stanford University, CA; Vijayendra K. Garg, Universidade de Brasilia,
Brasilia, D.F., Brazil

3-10-20
An Integrated Antenna Excited by Piezoelectric Transducers ................................................................. 666
Robert J. Weber, Iowa State University, Ames, IA

Volume 2

-
Track 4: Signal Processing I Murali Tummala, Track Chair, Naval Postgraduate School, Monterey,
CA
-
Session 4-1 : Digital Filters: Design & Implementation Majid Ahmadi, Session Chair, University of
Windsor, Ontario, Canada

4-1-1
Fast VLSl Architectures for Rank Order Based Filtering Using a Bit-Serial Window Partitioning
Technique ................................................................................................................................................. 671
C. E. Savin, M. 0. Ahmad, M.N.S. Swamy, Concordia University, Montreal, Quebec, Canada

4-1-2
Eisenstein Residue Number System with Applications to DSP................................................................ 675
V. Dimitrov, G.A. Jullien, W. C. Miller, University of Windsor, Windsor, Ontario, Canada

4-1-3
An Iterative Method for the Design of FIR Partial Filter Banks ................................................................. 679
Y. S. Mo, W.4. Lu, A. Antoniou, Victoria University, Victoria, B.C., Canada

xxxiii
4-1-4
Constrained Min-Max Optimization of Finite-Precision Multi-Rate Digital Filters over the Canonical
Signed-Digit Coefficient Space ................................................................................................................. 683
Behrouz Nowrouzian, Arthur Fuller, Farhad Ashrafzadeh, University of Calgary, Calgary, Alberta,
Canada

4-1 -5
Design of 2-Dimensional Digital Filters Using Integer Coefficient 2-0 All-Pass Filters ............................ 687
M. Ahmadi, H. Safiri, K. Raahemifar, University of Windsor, Windsor, Ontario, Canada

4-1-6
Cascaded Realization of Complex Adaptive IIR Notch Filters ................................................................. 691
Shotaro Nishimura, Hai- Yun Jiang, Shimane University, Matsue, Japan

4-1-7
Accommodating Boundary Conditions in the Wave Digital Simulations of PDE Systems ....................... 694
Cathy Qun Xu, Steven Bass, Xiaoming Wang, University of Notre Dame, Notre Dame, IN

4-1-8
Exhaustive Searching for Limit Cycles in Recursive Block Floating Point Systems ................................ 698
Kamen Ralev, Peter Bauer, University of Notre Dame, Notre Dame, IN

4-1-9
Crossover and Mutation in Genetic Algorithms Employing Canonical Signed-Digit Number
System ...................................................................................................................................................... 702
Farhad Ashrafzadeh, Behrouz Nowrouzian, The University of Calgary, Calgary, Alberta, Canada

4-1-10
Discretization of the Transmission Line Equations Using Orthogonal Digital Filters................................ 706
Amanuel Zerzghi, Stevens Institute of Technology, Hoboken, NJ

Session 4-2: DSP Applications in Telecommunication Neeraj Magotra, Session Chair, University-
of New Mexico, Albuquerque, NM

4-2-1
Fixed Point Vocoder Implementation........................................................................................................ 710
Ludy Liu, Motorola Inc., Scottsdale, AZ

4-2-2
Implementation of Raised Cosine Filters Using Orthonormal Expansions............................................... 716
Giridhar D. Mandyam, Texas Instruments, Dallas, TX

4-2-4
Adaptive Wavelet Based Phoneme Recognition...................................................................................... 720
Shubha Kadambe, Atlantic Aerospace Elect. Corp., Greenbelt, MD; Pramila Srinivasan, Purdue
University, West Lafayette, IN

4-2-5
Channel Decoding Implementation in Downlink of CDMA Systems ........................................................ 724
Giridhar D. Mandyam, Texas Instruments Inc., Dallas, TX

4-2-6
Partitioned Echo Canceller Utilizing Decimation Echo Location .............................................................. 728
James B. Piket, William C. Yip, A. X. Estrada, Motorola, lnc., Scottsdale, AZ

xxxiv
4-2-7
Echo Cancellation with Delay Estimation ................................................................................................. 732
N. Magotra, Greg Lenihan, S. Sirivara, University of New Mexico, Albuquerque, NM; T. R. Natarajan,
Forum Communications Inc., Richardson, TX

4-2-8
A Frequency Domain Multi-Band Harmonic Vocoder for Speech Data Compression ............................. 736
C,T. Ho, K. S. Chao, Texas Tech University, Lubbock, TX
4-2-9
Simultaneous Code Execution and Data Storage in a Single Flash Memory Chp for Real Time
Wireless Communication Systems ........................................................................................................... 740
Charles Brown, Robert Hasbun, Intel Corporation, Folsom, CA

Session 4-3: Adaptive Filtering & Communications Applications James V. Krogmeyer, Session -
Chair, Purdue University, West Layfayette, IN

4-3-1
Projection Methods for Improved Performance in FIR Adaptive Filters ................................................... 746
R. A. Soni, K. A. Gallivan, W. K. Jenkins, University of Illinois at Urbana-Champaign, Urbana, IL

4-3-2
Performance Enhanced Adaptive Equalizers for Muilticarrier Channels................................................... 750
Jeffrey C. Strait, 3COm Corporation, Grass Valley, CA

4-3-3
A Noise Constrained LMS Algorithm for Fading Channel Communications ............................................ 754
Yongbin Wei, Saul B. Gelfand, James V. Krogmeier, Purdue University, West Lafayette, IN

4-3-4
Finite Time Recovery in Decision Feedback Equalization for Time Varying Channels............................ 758
Soura Dasgupta, University of Iowa, Ames IA

4-3-5
Practical Considerations in the Use of A New OBE Algorithm that Blindly Estimates Error Bounds ....... 762
D. Joaquin, J. R. Deller, M. Nayeri, Michigan State University, East Lansing, MI

4-3-6
Adjacent Errors for Assessing Estimation and Modeling Algorithm Performance.................................... 766
Roland Priemer, University of Illinois at Chicago, Chicago, IL

4-3-7
Performance Studies on a “Quasi-OBE Algorithm ,for Real-Time Signal Processing ............................. 770
Shirish Nagaraj, Sridhar Gollamundi, John R. Deller, Jr., Yih-Fang Huang, Samir Kapoor,
Notre Dame University, Notre Dame, IN

4-3-8
Estimating Channel Response from Pilot Subcarrier Pairs (for OFDM Systems) .................................... 774
Aiping Huang, Yuping Zhao, Helsinki University of Technology, Otakaari, Finland

4-3-9
Adjacent Errors of Stochastic Gradient Algorithms under General Error Criteria..................................... 778
Venkat Anant, Roland Priemer, University of Illinoi:~,Chicago, IL
Session 4-4: Low-Power VLSl Communications Systems Naresh R. Shanbhag, Session Chair, -
University of Illinois, Urbana-Champaign

4-4-1
VLSl Design for an Adaptive Equalizer Using a Residue Number System Architecture for
Magnetic Channels ................................................................................................................................... 782
lnseop Lee, W. K. Jenkins, University of Illinois at Urbana-Champaign, Urbana, IL

4-4-2
Biased Two’s Complement Representation for Low-Power DSP Systems.............................................. 786
Kei- Yong Khoo, Chao-Liang Chen, Alan Willson, Jr., University of California, Los Angeles, CA

4-4-3
A Pipelined Strength-Reduced Adaptive Filter: Finite Precision Analysis and Application to
155.52 Mb/s ATM-LAN ............................................................................................................................. 790
Manish Goel, Naresh R. Shanbhag, University of Illinois at Urbana-Champaign, Urbana, IL

4-4-4
A Compact Carry-Save Multiplier Architecture and Its Applications......................................................... 794
Raghu K. J. Raghunath, Hashem Farrokh, Nagi Naganathan, Marta Rambaud, Lucent
Technologies, Murray Hill, NJ

4-4-5
Multiprocessor 3D Sound System ............................................................................................................ 798
Mohamed El-Sharkawy, Newton Guillen, Waleed Eshmawy, Brad Langhorst, Harry Gendrum,
Purdue University, Indianapolis, IN; Darrel Judd, Richard Auerbach, Harman International,
Martinsville, IN

4-4-6
Real-Time Processing of Speech Signals Using Networked Computers ................................................. 802
Ravi Pendse, Andrew W. Yip, Elmer A. Hoyer, Wichita State University, Witchita, KS

4-4-7
Real-Time Speech Signal Analysis-Synthesis of the Hoyer-Harris Model Using Networked
Computers ................................................................................................................................................ 806
Andrew W. Y@,B&D lnsfruments and Avionics, Inc., Valley Center, KS; Ravi Pendse,
Elmer A. Hoyer, Wichita State University, Wichita, KS

4-4-8
Modulator Design and Architecture for Multiple Wireless Applications .................................................... 810
David Wyskiel, Kamilo Feher, University of California, Davis, CA

4-4-9
Mismatch Cancellation for Complex Bandpass Sigma-Delta Modulators ................................................ 814
Li Vu, Martin Snelgrove, Carleton University, Carlton, Ontario, Canada

4-4-10
A New Low Power Building Block Cell For Adders................................................................................... 818
Magdy Bayoumi, University of Southwestern Louisiana, Lafayette, LA
 -
Session 4-1 0: Signal Processing Poster Session Murali Tummala, Session Chair, Naval
Postgraduate School, Monterey, CA

4-10-1
A New Robust Frequency-DomainAdaptive Filter with Colored Signal Input.......................................... 823
Shigenori Kinjo, Masafumi Oshiro, Hiroshi Ochi, University of the Ryukyus, Okinawa, Japan

4-10-2
Implementationof an IdentificationAlgorithm Using A Cross-Correlation Method in Order to
Identify the Induction Motor Rotor Time Constant .................................................................................... 827
Albert0 E. Aleman-Nieto, lnstituto Tecnologico de Nuevo Leon, Guadalupe, Mexico; Kosai Raoof,
Joseph Fourier University, Grenoble, France

4-10-3
DSPs Interconnection Using Optical Fiber Cables................................................................................... 831
Noritsuna Furuya, Jorge Luiz e Silva, Osvaldo M. Filliettaz, Jose Hiroki Saito, Universidade
Federal de Sa'o Carlos, Brazil

4-10-4
A Modular Analog NLMS Structure For System Identification.................................................................. 835
Luis Nifio-de-Rivera, Hector Perez-Meana, lnstit,utoPolitecnico Nacional, Mexico, D.F., Mexico;
Edgar Sanchez-Sinencio, Texas A& M University, College Station, TX

4-10-5
Structured Total Least Squares with Fixed Elements............................................................................... 841
Rodrigo Pinto Lemos, Federal University of Goias,,Goidnia, Brazil; Amauri Lopez, UNICAMP,
Campinas, SP, Brazil

4-10-6
MAT2DSP - A MATLAB Tool for Rapid Feedback on the Implementation Requirements of Signal
Processing Algorithms .............................................................................................................................. 845
S. Bose, B. Friedlander, A. Zeira, University of California, Davis, CA

4-10-8
New Techniques for Detection of Changes in the Local Mean of a Signal .............................................. 849
Manohar Das, Oakland University, Rochester, MI; Anthony Cooprider, Ford Motor Company,
Dearborn, MI

4-10-9
A Generalized Block Constant Modulus Algorithm and Its VLSl Architecture.......................................... 853
Hiroshi Ochi, Ken Onaga, Sigenori Kinjo, University of the Ryukyus, Okinawa, Japan

4-10-11
Audio Signal Enhancement Performance of an R1.S Algorithm over Long Time Intervals ...................... 857
Joseph M. Scanlan, TASC, Reston, VA

4-10-12
Two Polyphase Filter Architectures for MPEG Audio. .............................................................................. 861
Nam Ling, Chen-Wei Shih, Santa Clara University, Santa Clara, CA

4-10-13
Block Computation Architectures for 2-D Discrete Wavelet Transforms.................................................. 865
Jimmy C. Limqueco, Magdy Bayoumi, University of Southwestern Louisiana, Lafayette, LA
4-10-14
A Wavelet Based Multicarrier Modulation Scheme .................................................................................. 869
Chatonda J. Mtika, Ramakrishna Nunna, Stevens Institute of Technology, Hoboken, NJ

-
Track 5: Signal Processing II Charles Therrien, Track Chair, Naval Postgraduate School,
Monterey, CA
-
Session 5-1: Speech Processing Steve Nunn, Session Chair, NCCOSC, San Diego, CA

5-1-3
Voice Analysis in Adverse Conditions: The Centennial Olympic Park Bombing 911 Call........................ 873
Bryon L. Pellom, John H. L. Hansen, Duke University, Durham, NC

5-1-5
Subject Dependent Transfer Functions in Spatial Hearing....................................................................... 877
V. Ralph Algazi, University of California, Davis, CA; Pierre L. Devinyi, Speech and Hearing Research
Facility; V. A. Martinez, Richard 0. Duda, California State University, San Jose, CA

5-1-6
Signal Processing for Cochlear Prosthesis: A Tutorial Review ................................................................ 881
Philipos Loizou, University of Arkansas at Little Rock, Little Rock, AR

5-1-7
Sychronous Correct of the Pitch by Using the TMS320C50..................................................................... 886
Zhou Jingli, Lu Hongwei, Yu Shengsheng, Huazhong University of Science & Technology, Wuhan,
Hubei, ROC

5-1-8
A Method of Wavelet Selection in Phone Recognition ............................................................................. 889
Hugo L. Rufiner, National University of Entre Rios, Argentina; J. Goddard C., UAM-I, Mexico

5-1-9
Adaptive Discrete Cosine Transform for Noise Cancellation of Vibrational Signals ................................ 892
Gerard Coutu, Norman Farb, Printronix, Irvine, CA

-
Session 5-2: Image & Video Processing John McEachen, Session Chair, NCCOSC, Naval
Postgraduate School, Monterey, CA

5-2-2
Recognition of Approximate Symmetry .................................................................................................... 896
Rupert W. Curwen, Joseph Mundy, General Electric Research and Development, Niskayuna, NY;
Charles Stewart, Rensselaer Politechnic Institute, Troy, NY

5-2-3
Temporal Estimation of Cardiac Non-Rigid Motion in Image Sequences ................................................ 901
John C. McEachen, Naval Postgraduate School, Monterey, CA; Arye Nehorai, University of
Illinois at Chicago, Chicago, IL; James S. Duncan, Yale University, New Haven, CT

5-2-4
Interactive Viewpoint Modification From Multiple Perspective Views ....................................................... 905
Sally L. Wood, Santa Clara University, Santa Clara, CA

xxxviii
5-2-5
A Band-MatchingApproach for Motion Estimation ................................................................................... 909
S. Yarji, 8. Lumetta, B. Zavidovique, M. A. Bayoumi, University of Southwestern Louisiana,
Lafayette, LA

5-2-6
An Eff iciennt Lossless Image Compression Scheme Based on a 2-0Predictive Model and a New
Contextual Source Coder .......................................................................................................................... 913
M. Das, Oakland University, Rochester, MI; J. Arnand, IIT Automotive Inc., Auburn Hills, MI

5-2-8
Automatic Real-Time Identificationof Fingerprint Images Using Wavelets and Gradient of
Gaussian................................................................................................................................................... 917
Woo Kyu Lee, Jae Ho Chung, lnha University, lncheon Korea

5-2-9
Addition of Robustness to Standard Video Compression Protocols ........................................................ 921
Ramon Llados-5ernaus, Robert L. Stevenson, University of Notre Dame, Notre Dame, IN

5-2-10
Efficient Transmission of Images Using Modified HINT ........................................................................... 925
Krit Panusopone, NextLevel Systems Inc., San Diego, CA; K. R. Rao, University of Texas,
Arlington, TX

-
Session 5-3: DSP Algorithms & Applications M.P. Fargues, Session Chair, Naval Postgraduate
School, Monterey, CA

5-3-1
Wavelet-Based Denoising: Comparisons between 0rl:hogonal and Non-Orthogonal
Decompositions........................................................................................................................................ 929
Monique P. Fargues, Robert J. Barsanti, Ralph Hippenstiel, Naval Postgraduate School,
Monterey, CA; Gerald Coutu, Printronix, Inc., Irvine, CA

5-3-2
Three-Dimensional Adaptive Deconvolution of Optical Microscope Images Using Adaptive
Inverse Modelling....................................................................................................................................... 933
Mark Sapia, Ian Greenshields, Martin Fox, University of Connecticut, Storrs, CT; Jim Schaaf,
Leslie Loew, University of Connecticut, Farmington, CT; Gerard Coutu, Consultant,
Glastonbury, CT

5-3-4
Optical System Modeling for Digital Image Restoration........................................................................... 937
Thomas P. Costello, Wasfy 5. Mikhael, University of Central Florida, Orlando, FL

5-3-5
Low Cost Image Processing System for Line-Scan Images..................................................................... 941
Linda S.DeBrunner, Victor E. DeBrunner, Minghua Yao, University of Oklahoma, Norman, OK

5-3-6
(Blind) Adaptive Equalizers with Soft Decision Feedback........................................................................ 945
Y.-H. Kim, S. Shansunder, Colorado State University, Fort Collins, CO

mix
5-3-7
Subband Image Representation Employing Wavelets and Multi-Transforms.......................................... 949
Arun Ramaswamy, Vela Research, St. Petersburg, FL; W. Zhou, Wafsy B. Mikhael, University
of Florida, Orlando, FL

5-3-8
Multi Sensor Data Fusion Using Fuzzy-Association Techniques ............................................................. 953
Mural; Tummula, Sean A. Midwood, Naval Postgraduate School, Monterey, CA; Ian N. Glenn,
National Defense Headquarters, Ottawa, Ontario, Canada

5-3-9
A High-speed and High-Performance Video Format Conversion System ............................................... 957
Oscal T.-C. Chen, Kuan-Tsang Wang, National Chung Cheng University, Taiwan, ROC

5-3-10
Automatic Switching-Network Analysis Using Wavelets-Based Tools ..................................................... 961
A. Monti, M. Riva, A. Grandelli, Politecnico di Milano, Milano, Italy

-
Session 5-4: DSP Algorithms Wasfy Mikhael, Session Chair, University of Illinois, University of
Central Florida, Orlando

5-4-2
A Generalized Two-Dimensional Frequency Domain Least Square Algorithm for ARMA
System Modeling ...................................................................................................................................... 965
Quingwen Zhang, Wasfy B. Mikhael, University of Central Florida, Orlando, FL; Jaime R. Roman,
Dennis W. Davis, Scientific Studies Corp., Palm Beach Gardens, FL

5-4-3
A Linear Programming Design of Two-Channel Perfect Reconstruction Biorthogonal Filter Banks ........ 969
Hiroshi Ochi, Morihiko Ohta, Shigenori Kinjo, Unniversity of the Ryukus, Okinawa, Japan

5-4-4
A Computationally Efficient IDCT Algorithm ............................................................................................. 973
Seong-Ok Bae, Seung-Jai Min, LG Electronics Institute of Technology, Seoul, Korea

5-4-5
Impulse Sampled Intermittent Polyphase SC FIR Rational Decimators with Double-Sampling .............. 977
U Seng Pan, R.P. Martins, University of Macau, Macau, Portugal; J, E. Franca, lnstituto Superior
Tecnico, Integrated Circuits and Systems Group, Lisboa, Portugal

5-4-6
Blind Separation of Two Signals by Estimation of Two Fourth-Order Cumulants .................................... 981
lvica Kopriva, University of Zagreb, Zagreb, Croatia

5-4-8
State of the Art Iterated Block Matching Fractals in Image Compression ................................................ 985
Hamed Parsiani, University of Puerto Rico, Mayaguez, PR; Ricardo Garcia, Hewlett Packard,
Roseville, CA

5-4-9
Image Enhancement and Noise Reduction Using Wavelet Transform .................................................... 989
D. V. Satish Chandra, Kansas State University, Manhattan, KS

XI
5-4-10
Registration in a Distributed Multi-Sensor Environment........................................................................... 993
G. C. Parkinson, D. P. Xue, M. Farooq, Royal Military College, Kingston, Ontario, Canada

---
Track 6: VLSl & CAD John Choma, Jr., Track Chair, University of Southern California, Los
Angeles
-
Session 6-1: Digital VLSl Sherif H. Embabi, Session Chair, Texas A&M University, College Station

6-1-1
Low-Power VLSl Architectures for Variable-Length Encoding and Decoding.......................................... 997
Stephen Molloy, Rajeev Jain, University of California, Los Angeles, CA

6-1-2
Development of Redesign Process for Digital VLSl Systems ................................................................ 1001
Chin-Long Wey, Michigan State University, East Lansing, MI

6-1-3
Design Error Diagnosis and Correction in VLSl Digital Circuits ............................................................. 1005
Andreas G. Veneris, lbrahim N. Hajj, University of Iflinois at Urbana-Champaign, Urbana, IL

6-1-4
Rapid System Design Framework for Fuzzy Applications...................................................................... 1009
Chantana Chantrapornchai,Michael Sheliga, Sissades Tongsima, Edwin H.-M. Sha, University
of Notre Dame, Notre Dame, IN

6-1-5
Hardwarelsoftware Codesign for Embedded Signal Processing........................................................... 1013
Yin-Tsung Hwang, Jer-Sho Hwang, Yuan-Hung Wang, National Yunlin University of Science and
Technology, Taiwan, ROC

6-1-6
An Algorithm for Mapping Non-Complete Binary Trees to Cellular Architecture FPGAs ....................... 1017
Benjamin T. Drucker, Malgorzata Chrzanowska-Jeske, Portland State University, Portland, OR

6-1-7
A self-Timed Cyclic Redundancy Check (CRC) in VLSl ......................................................................... 1021
S. Henry Li, Bell Labs, Lucent Technologies,Murray Hill, NJ; Charles H. Zukowski, Columbia
University at New York City, NY

6-1-8
Improving Two-Level Logic Minimization Technique for Low Power Driven Multi-Level Logic
Re-Synthesis........................................................................................................................................... 1026
Hoon Choi, Seung Ho Hwang, KAIST, Taejon, 305-701, Korea

6-1-9
Hybrid Time-Stamped Transition Density for the Estimation of Delay-Dependent
Switching Activities ................................................................................................................................. 1030
Hoon Choi, Seung Ho Hwang, Korea Advanced Inst. of Sci. & Tech., Taejon, Korea

6-1-10
AND/EXOR-based Regular Function Representation............................................................................ 1034
Malgorzata Chrzanowska-Jeske, Jingkun Zhou, Portland State University, Portland, OR

xli
 -
Session 6-2: Analog VLSl Wayne Current, Session Chair, University of California, Davis

6-2-1
Analogue Layout Generation: from Design Assistant to Automated Layout .......................................... 1038
D. A. Bensouiah, R. J. Mack, R, E. Massara, University of Essex, Colchester, UK

6-2-2
An Efficient Age-Controlled Evolution Approach Solving the Assignment Problem on Analog
Transistor Arrays..................................................................................................................................... 1042
Andreas Huber, Dieter A. Mlynski, Universitat Karlsruhe, Karlsruhe, Germany

6-2-4
Exact Analysis of Periodically Switched Linear Filters Using State Equations....................................... 1046
Jose R. Vittoretti,Antonio C.M. deQueiroz, Federal University of Rio de Janeiro, RJ, Brazil

6-2-5
Compact High Gain CMOS Op Amp Design Using Comparators.......................................................... 1050
John Purcell, Hoda S. Abdel-Aty-Zohdy, Oakland University, Rochester, MI

-
Session 6-3: integrated Circuit Design Smita Bakshi, Session Chair, University of California,
Davis

6-3-1
Design of a Pulse Stream Neural Network ............................................................................................. 1053
R. J. Haycock, T. A. York, University of Manchester Inst. of Sci. & Tech., Manchester, UK

6-3-2
A Vector Quantizer with Fully Pipelined Data and Control Flow ............................................................ 1057
Ding-Ming Kwai, Behrooz Parhami, University of California, Santa Barbara, CA
1
6-3-3
VLSl Circuit for Programmable Sorting................................................................................................... 1061
Fabio Ancona, Stefan0 Rovetta, Rodolfo Zinino, University of Genova, Genova, Italy

6-3-4
A BiCMOS VLSl Implementation of an Intelligent Sensor ...................................................................... 1065
Bart MacLean, H. Djaahanashahi, M. Ahmadi, G. A. Jullien, W. C. Miller, University of
Windsor, Ontario, Canada

6-3-5
VLSl Design of a New Infrared Communication Controller for Wireless Communications .................... 1069
Qinghua Chen, Kishore Mishra, Khodor Elnashar, Sherry Xie, Clarence Lewis, Texas Instruments
Inc., Dallas, TX; Guoguan Du, Texas A&M University, College Station, TX

Session 6-4: CAD Software Development and Applications I lbrahim N. Hajj, Session Chair, -
University of Illinois, Urbana-Champaign

6-4-1
An Efficient Physically-Based MOSFET Model for RF Circuit Design.................................................... 1075
A. Y. Sherif, K. L. Ashley, Southern Methodist University, Dallas, TX

xlii
6-4-2
A CAD Tool to Identification, Building and Handle of Fuzzy Model in System Behavioral
Modeling .................................................................................................................................................. 1079
Ruben Alejos-Palomares, Guillermo Espinosa-Flores-Verdad, Natl, Inst. of Astrophysics,
Optics, and Electronics, Puebla, Mexico

6-4-3
A Non-Statistical Approach to Tolerance Analysis of Microwave Circuits .............................................. 1083
F. Vallette, G. Vasilescu, G. Alquie, Universite Pierre et Marie Curie, Paris, France

6-4-4
Design Verification by Concurrent Simulation and Automatic Comparison............................................ 1087
TaekyoonAhn, Kiyoung Choi, Seoul National University, Seoul, Korea

6-4-5
A Complete Layout System for the PC ................................................................................................... 1091
David E. Boyce, Consulting Engineer, Parish, NY; R. Jacob Baker, University of Idaho, Boise, ID

6-4-6
A Method for the Generation of HDL Code at the RTL Level From A High-Level Formal
Specification Language............................................................................................................................ 1095
Apostolos A. Kountouris, Christophe Wolinski, Universitaire de Beaulieu, Rennes, Cedex, France

6-4-8
Technology Mapping for Storage Elements Based on BDD Matching................................................... 1099
Ju-Hwan Vi, Seung Ho Hwang, KAIST, Taejon, 305-701,Korea

Session 6-5: AnalogDigital Gallium Arsenide Circuits and Systems Design Khaled Ali Shehata, -
Session Chair, Egyptian Armed Forces, Cairo, Egypt

6-5-1
A Dynamic Four-Bit Carry Lookahead Adder Circuit for Complementary Gallium Arsenide
(CGaAs) Fabrication Processes ............................................................................................................. 1103
Khaled Ali Shehata, Douglas J. Fouts, Sherif Michael, Naval Postgraduate School, Monterey, CA

6-5-2
Dynamic Logic Families for Complementary Gallium Arsenide (CGaAs) Fabrication Processes..........1107
Douglas J. Fouts, Khaled Ali Shehata , Sherif Michael, Naval Postgraduate School,
Monterey, CA

6-5-3
Gallium Arsenide Based Micro-Accelerometers..................................................................................... 1111
T. T. Vu, P.C. Nguyen, L. T. Vu, C. H. Nguyen, J.N.C Vu, Top-Vu Technology, Inc. St. Paul, MN;
D. L. Polla, P. J. Schiller, S. Stevanovich, Y. Q. Yang, R. Harjani, University of Minnesota,
Minneapolis, MN

6-5-4
Soft Error Immune GaAs Circuit Technologies....................................................................................... 1116
T. R. Weatherford,D. J. Fouts, Postgraduate School, Monterey, CA; P. W. Marshall, SFA, Inc.,
Lanham, MD; C. J. Marshall and H. Dietrich, Naval Research Laboratory, Washington, DC

xliii
6-5-6
A "Do-it-Yourself" Methodology for CMOS Transistor Mismatch Characterization ................................ 1120
Teresa Serrano-Gotarredona, Bernabe Linares-Barranco, National Microelectronics Center,
Sevilla, Spain

Session 6-6: CAD Software Development and Applications II lbrahim N. Hajj, Session Chair, -
University of Illinois, Urbana-Champaign

6-6-1
Low-Power Design Methodology: Power Estimation and Optimization.................................................. 1124
Farid N. Najim, University of Illinois at Urbana-Champaign, Urbana, IL

6-6-2
Estimation of Maximum Switching Activity in Digital VLSl Circuits......................................................... 1130
S. Bobba, I. N. Hajj, University of Illinois at Urbana-Champaign, Urbana, IL

6-6-3
Design and Exploration Tools for Deep Submicron Systems................................................................. 1134
Min Xu, Fadi J, Kurdahi, university of California, Itvine, CA

6-6-4
User Interface Issues in a High Level Test Synthesis Environment....................................................... 1138
Ian G. Harris, University of Massachusetts, Amherst, MA; Alex Orailoglu, University of California,
La Jolla, CA

6-6-5
A Novel Architecture for Real-Time Decoding........................................................................................ 1142
Y. Yang, J. W. Stroming, S. M. Kang, T. S. Huang, University of Illinois at Urbana-Champaign, IL

6-6-6
A Generalized HSPICE Macro-Model for Spin-Valve GMR Memory Bits .............................................. 1146
Bodhisattva Das, William C. Black, Jr., Iowa State University, Ames, IA

6-6-7
An SCMOS Digital Cell Family For Mixed-Signal Applications............................................................... 1150
Pamela Tridandapani, Seshadri Anantharaman, Charles Boecker, Joseph Brus, Chi Tam,
William C, Black, Jr., Iowa State University, Ames, IA; Kyle Dirks, Intel Corporation,
Portland, OR; Nicholas Jungels, Motorola Corp., Schaumberg, IL; Robert Shearer,
IBM, Rochester, MN

6-6-8
Simulation of Random Jitter in Ring Oscillators with SPICE .................................................................. 1154
Yiqin Chen, Satyaki Koneru, Edward Lee, Randy Geiger, Iowa State University, Ames, IA

6-6-9
A 1.0625 Gbps PECL Line Driver ........................................................................................................... 1158
Suda Nagaravarapu, Arathi lyer, Texas Instruments, Inc., Dallas, TX; Randall L. Geiger, Iowa
State University, Ames, IA

6-6-10
A Formulation Method for Including Ideal Operational Amplifiers In Modified Nodal Analysis ...............1161
Marwan Hassoun, Iowa State Universityl Ames, IA; Pen-Min Lin, Purdue University,
West Lafayette, IN

xliv
 -
Session 6-10: Signal Processing Poster Session Mohammed Ismail, Session Chair, Ohio State
University, Columbus

6-10-1
A 2.5V 50 MHz AC-Modulator for Digital Cellular Telephones................................................................ 1165
Mika Lansirinne, Saska Lindfors, Kimmo Koli, Kari Halonen, Helsinki University of Technology,
Finland

6-10-2
New 900 MHz CMOS Voltage-Controlled Oscillator for Wireless Communications .............................. 1169
Nikolay Tchamov , Tampere University, Tampere, Finland; Jerasimos Zohios, Mohammed Ismail,
Ohio State University, Columbus, Ohio

6-10-3
A 1.9GHz CMOS RF Down-Conversion Mixer ....................................................................................... 1172
Habib Kilicaslan, Hong-Sun Kim, Mohammed Ismail, Ohio State University, Columbus, OH

6-10-4
Low Voltage Low Power CMOS Current Mode Building Blocks For Hearing Aid Applications.............. 1175
A. A. El Adawy, A. G. Ahmed, A. M. Soliman, Cairo University, Giza, Egypt; H. 0. Elwan,
Ohio State University, Columbus, OH

6-10-5
A CMOS Programmable Silicon Retina Implementing Vision Algorithms .............................................. 1178
A. A. El Khatib, A. A. El Gamal, A. M. Soliman, Cairo University, Giza, Egypt; H, 0. Elwan,
Ohio State University, Columbus, OH

6-10-6
LV/LP CMOS Square-Law Circuits ......................................................................................................... 1181
Akira Hyogo, Science University of Tokyo, Japan, on leave at Ohio State University, Columbus,
OH; Changku Hwang, Micrys Inc., and Ohio State University, Columbus, OH; Mohammed
Ismail, Columbus State University, Columbus OH; Keitaro Sek, Science University of
Tokyo, Japan

6-10-7
A CMOS Robust Fully-Balanced-Signal Generator................................................................................ 1185
Changku Hwang, Micrys, Inc. and Ohio State University, Columbus, OH; Akira Hyogo, Science
University of Tokyo, Japan on leave at Ohio State University, Columbus, OH; Mohammed
Ismail, Ohio State University, Columbus, OH; Gyu Moon, Hallym University, Korea on
leave at Ohio State University, Columbus, OH

6-10-8
LV CMOS High Speed Analog Multiplier ................................................................................................ 1189
Changku Hwang, Micrys, Inc. and Ohio State University, Columbus, OH; Akira Hyogo, Science
University of Tokyo, Japan currently on leave at Ohio State University, Columbus, OH;
Mohammed Ismail, Hong-sun Kim, Ohio State University, Columbus, OH; Gyu Moon,
Hallym University, Korea currently on leave at Ohio State University, Columbus, OH

6-10-9
A Low-Voltage Low-Power CMOS OpAmp with Rail-to-Rail Input/Output ............................................. 1193
Chi-Hung Lin, Mohammed Ismail, Ohio State University, Columbus, OH

xlv
6-10-10
High Slew Rate Micro-Power CMOS OTA with Class AB Input Stage................................................... 1197
Michael V, Ivanov, Burr-Brown Corp., Tucson, AZ; Mohammed Ismail, Ohio State University,
Columbus, OH; Valery N. lvanov, OES Electronics, Ltd., St. Pefersburg, Russia

6-10-1 1
A Low-Power VLSl Architecture for the Viterbi Decoder ........................................................................ 1201
Wann-Shyang, Ju Ming-Der Shieh, Ming-Hwa Sheu, National Yunlin University of Science
& Technology, Touliu, Yunlin, Taiwan, ROC

6-10-12
An Optimization Model for K-Way Partitioning ....................................................................................... 1205
Zhi-Ming Lin, National Changhua University of Education, Changhua, Taiwan, ROC

6-10-13
INALSYS: A Layout Automation System Based on Analog Layout Constraints .................................... 1209
Youngsoo Kim, Hyunsang Cho, Kwangsub Yoon, lnha Universify, Incheon, Korea

6-10-14
An Efficient Hardware Design Approach from System-Level Specification............................................ 1213
Ming-Hwa Sheu, Ming-Der Shieh, Sheng-We1Liu, Chie Dou, National Yunlin Institute of
Technology, Touliu, Yunlin, Taiwan, ROC

6-10-15
A Low-Cost VLSl Architecture Design for Non-Separable 2-D Discrete Wavelet Transform................. 1217
Ming-Hwa Sheu, Ming-Der Shieh, Sheng-We1 Liu, National Yunlin Institute of Technology,
Touliu, Yunlin, Taiwan, ROC

6-10-16
A High-Performance VLSl Architecture for Maps Criterion Motion Estimation....................................... 1221
Ming-Der Shieh, Ming-Hwa Sheu, Yu-Chin Hsu, Jia-Lin Sheu, National Yunlin Instifufe of
Technology, Touliu, Yunlin,Taiwan, ROC

6-10-17
An Image Processing Hardware Design Environment ........................................................................... 1225
Nikrouz Faroughi, CSUS, Sacramento, CA

6-10-18
Top-Down Design of a High Speed DCT Architecture and Implementation........................................... 1229
Arthur T. Li, Maher E. Rizkalla, Harry C. Gundrum, Indiana University, Purdue University
Indianapolis, IN

-
Track 7: Neural Networks Hoda S. Abdel-Aty-Zohdy, Track Chair, Oakland University, Rochester,
MI
Session 7-1: Blind Separation of Temporal Signals: Algorithms, Practice and Applications G. -
Erten, Session Co-Chair, IC Technology, Inc., Okemos, MI and F. Salam, Session Co-Chair,
Michigan State University, East Lansing, MI

7-1-1
Formulation and Algorithms for Blind Signal Recovery .......................................................................... 1233
F. M. Salam, A. B. Gharbi, Michigan State University, East Lansing, MI; G. Erten, IC Tech. Inc.,
Okemos MI

xlvi
7-1-2
Real Time Separation of Audio Signals Using Digital Signal Processors .............................................. 1237
Gamze Erten, IC Tech, Inc., Okemos, MI; Fathi M, Salam, Michigan State University,
East Lansing, MI

7-1-3
Post Processing of Separated Signals for Feature Extraction and Identification................................... 1241
Said Belkasim, IC Tech, Inc., Okemos, MI

7-1-4
Blind Separation of Convolutive Mixtures ............................................................................................... 1244
F. Ehlers, H. G. Schuster, lnstitut fuer Theoretische Physik, Kiel, Germany

7-1-5
A Note on Error Bounds for Function Approximation Using Nonlinear Networks .................................. 1248
Ajit T. Dingankar, ISM Corporation,Austin, TX; Irwin W. Sandberg, University of
Texas at Austin, Austin, TX

7-1-6
Blind Joint Multiplier Detection Using Second-Order Statistics and Structure Information .................... 1252
David Gesbert, A. Paulraj, Stanford University, Stanford CA; Pierre Duhamel, Telecom Paris,
Paris, France

7-1-7
Separation Conditions and Criteria For Uniform Approximation of Input-Output Maps ......................... 1256
Irwin W. Sandberg, The University of Texas at Austin, Austin, TX

Session 7-2: Neural Network Advances from Algorithm to Implementation Hoda S. Abdel-Aty- -
Zohdy, Session Chair, Oakland University, Rochester, MI

7-2-1
Computational Results on Recurrent Dynamic Neural Network for Signal Analysis .............................. 1260
Marc Karam, Mohamed A. Zohdy, Hoda S. Abdel-Aty-Zohdy, Oakland University, Rochester, MI

7-2-2
An Embedded Global Addressing Technique for Scalable Neural Architectures................................... 1264
Bassem Alhalabi, Florida Atlantic University, Boca Raton, FL, Magdy Bayoumi, University of
Southwestern Louisiana, Lafayette, LA

7-2-3
Reinforcement Neural Learning With Application to Gas Sensors ......................................................... 1269
Hoda S. Abdel-Aty-Zohdy, Oakland University, Rochester, MI

7-2-4
Synthesis of Neural Networks for Rotor Flux Identificationin Asynchronous Motor Control.................. 1274
A. Bottaro, A. Landi, A. Monti, M. Riva, G. Storti-Gajani, Politecnico di Milano, Milano, Italy

7-2-5
Mapping the VLSl Channel Routing Problem onto the Hopfielmank Network When Cyclic
Vertical Constraints Are Not Excluded.................................................................................................... 1278
Anthony 0.Johnson, University of Toledo, Toledo, OH; San C. Tsuii, Philips Semiconductors,
Sunnyvale, CA

xlvii
7-2-10
Quantization Noise Improvement in a Distributed Neuron Architecture ................................................. 1282
H. Djahanshahi, B. MacLean, M, Ahmadi, G. A. Jullien, W. C. Miller, University of Windsor,
Windsor, Ontario, Canada

7-2-6
An Encoder for Vector Quantization Neural Networks ........................................................................... 1286
Fabio Ancona, Stefan0 Rovetta, Rodolfo Zunino, University of Genova, Genova, Italy

7-2-7
Identificationof Magnetic Phases of Weathered Tuffite Soil Using Artificial Neural Network ................ 1290
Paul0 A. de Souza, Jr,, Universidade Federal do Espirito Santo, Vitdria, Brazil; Vijayendra K. Garg,
Universidade de Brasilia, Brasilia, Brazil

Session 7-3: Modeling, Simulation and Symbolic Computation Hoda S. Abdel-Aty-Zohdy, Session -
Chair, Oakland University, Rochester, MI

7-3-1
Diagnostic of Analogue Nonlinear Circuits in dc by Using a Tearing Procedure.................................... 1294
L. A. Sarmiento-Reyes,A. Gracids-Marin, A. Bocanegra-Haro,National Inst. of Astrophysics
Optics & Electronics, Puebla, Pue., Mexico

7-3-3
Parallel Waveform Relaxation Circuit Simulator through UNlX Socket Connection .............................. 1298
F. Y. Chang, Lau-Ho Lun, The Chinese University of Hong Kong, Hong Kong

7-3-4
Power Transmission Line Modeling - A Comparison.............................................................................. 1302
Carlos August0 Duque, UFJF, Juiz de Fora, MG, Brazil; Jacques Szczupak, PUC-RIO,
Rio de Janeiro, RJ, Brazil

7-3-5
A High-LevelApproach to Modeling Non-Linear Analog Architectures .................................................. 1306
D. Enright, R. J, Mack, University of Essex, Colchester, UK

7-3-6
An Analytical Model for AIGaAs/GaAs HEMTs at Large Gate Voltage .................................................. 1310
M. A. Aziz, Egyptian Armed Forces; M. El-Banna, Alexandria University, Alexandria, Egypt

7-3-7
A Behaviour Non-Linear SiGe-HBT Model Based On Gummel-Poon Topology .................................... 1314
S. Megherbi, C. Yahiaoui, J.-F. Pone, University of Paris, Paris, France

7-3-8
Simulating Discrete Systems Pole Location Data with 3-D Effects Using Circular Functions and
Determinants........................................................................................................................................... 1318
Harry C. Gundrum, Maher E. Rizkalla, Purdue University at Indianapolis, Indianapolis, IN

7-3-9
A Novel Graphical Technique for Analysis of Runtime Cache Behavior................................................ 1322
Ravi Pendse, Ninad Tambe, Udo Walterscheidt, Wichita State University, Wichita, KS

xlviii
Session 7-4: Hardware Implementation of Neural Networks Mona Zaghloul, Session Co- -
Chair,George Washington University, Washington D.C. and Robert Newcomb, Session Co-Chair,
University of Maryland, College Park

7-4-2
CMOS Analog Implementation of Cellular Neural Network to Solve Partial Differential Equations
with a Micro Electromechanical Thermal Interface.................................................................................. 1326
Angela Rasmusson, M. E. Zaghloul, The George Washington University, Washington, DC

7-4-3
Linear Bilateral CMOS Resistor for Neural-Type Circuits....................................................................... 1330
L. Sellami, US Naval Academy, Annapolis, MD and University of Maryland, College Park, MD;
S. K. Singh, R. W. Newcomb, University of Maryland, College Station, MD; G. Moon, Hallym
University, Kangwondo, Korea

7-4-4
Low PowedMinimum Transistor Building Blocks for the Implementationof Back-Propagation
Algorithms ............................................................................................................................................... 1334
Miguel Melendez-Rodriguez,Jose Silva-Martinez, National Institute of Astrophysics Optics and
Electronics, Puebla, Mexico

7-4-5
Multifont Character Recognition By 9xSDPCNN Board.......................................................................... 1338
Mario Salerno, Fausto Sargeni,. Vincenzo Bonaiuto, University of Rome, Rome, Italy

7-4-6
Neural Hardware for Image Processing.................................................................................................. 1342
Fabio Ancona, Stefan0 Rovetta, Rodolfo Zunino, University of Genoa, Genova, Italy

-
Track 8: Applications Tom Johnson, Track Chair, California State University, Long Beach, CA
-
Session 8-1 : Adaptive Algorithms Tom Johnson, Track Chair, California State University, Long
Beach, CA

8-1-1
A Modified Adaptive Sign Algorithm Based on the Hybrid Norm Error Criterion.................................... 1346
Sung Ho Cho, Sang Duck Kim, Jin Ho Yoo, Seong Su Kim, Hanyang University, Ansan,
Kyunggi-Do, Korea

8-1-2
A Robust Stereophonic Subband Adaptive Acoustic Echo Canceller .................................................... 1350
Won Cheol Lee, Soongsil University, Seoul, Korea; Kyu Hwa Jeong, Dae Hee Youn, Yonsei
University, Seoul, Korea

8-1-3
Switched-CapacitorAdaptive Sample-Rate Notch Filter for Enhancement and Elimination of
Bandpass Signals .................................................................................................................................... 1354
Luis G.Bustamonte, Richard H. Strandberg, Michael A. Soderstrand, University of California,
Davis, CA

8-1-4
Adaptive Filtering Using Hetrodyne Frequency Translation ................................................................... 1358
Karl E. Nelson, Michael A. Soderstrand, University of California, Davis, CA

xlix
8-1-6
A Current Mode Continuous-Time Adaptive Filter.................................................................................. 1362
Alejandro Diez-Sanchez, Centro Nacional de lnvestigacion y Desarrollo Tecnologico, Cuernavaca,
Morelos, Mexico; Jaime Ramirez-Angulo, New Mexico State University, Las Cruces, NM

8-1-7
Convergence Analyses of Timing and Carrier Recovery Loops for a Digital Communication
Channel with an Adaptive Equalizer ....................................................................................................... 1366
Ki Tack Bae, Won Gi Jeon, Yong So0 Cho, Chung-Ang University, Seoul, Korea

8-1-8
An Active Noise Control Algorithm with On-line System Identification Based on a Delayless
Subband Adaptive Filter Architecture ..................................................................................................... 1370
Jeong-Hyeon Yun, Yonsei University, Seoul, Korea and LG Industrial Systems Co., Ltd.,
Kyongki-Do, Korea; Young-Cheol Park, Samsung Biomedical Research Institute, Seoul,
Korea; Dae-Hee Youn, Yonsei University, Seoul, Korea

-
Session 8-2: Cellular Networks Earl McCune, Session Chair, University of California, Davis

8-2-1
Design of a 3.0V CMOS Continuous Time Low-Pass Filter with On-Chip Tuning Circuits for
CDMA Cellular Phone Application .......................................................................................................... 1374
Chan-Hong Park, Beomsup Kim, Korea Advanced Institute of Science and Technology,
Taejon, Korea

8-2-4
A 3.3V 0.8pm CMOS Single Chip 1F IC for CDMNFM Cellular Phone ................................................. 1378
Ook Kim, Chang-Jun Oh, Jong-Kee Kwon Jong-Ryul Lee, Q-Sang Song, Wonchul Song,
Kyung-Soo Kim, Hyung-Moo Park, Telecommunications Research Institute,
Taejon, Korea

8-2-5
Design of an Efficient High Speed VLSl Architecture for WLAN MODEM ............................................. 1382
Surim Ryu, C&S Technology Co., Ltd., Seoul Korea; Se Young Eun, Myung H. Sunwoo,
Ajou University, Suwon, Korea

8-2-7
Optimum Filtering for Maximum Channel Capacity in PSK and FSK Modulation Systems ................... 1386
Liz Gao, Earl McCune, Michael Soderstrand, University of California, Davis, CA

8-2-8
Broadband Networks to Support Mpltimedia Services ........................................................................... 1390
Shervin Erfani, Racal Datacom, Inc. Sunrise, FL; Manu Malek, Bell Labs, Holmdel, NJ

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Session 8-3: VLSl Implementations Tom Matthews, Session Chair, California State University,
San Jose,CA

8-3-1
A Low-Noise Receiver Channel For A Pulsed Laser Rangefinder......................................................... 1395
Tarmo Ruotsalainen, Pasi Palojarvi, Tero Peltola, Juha Kostamovaara, University of Oulu,
Linnanmaa, Finland

I
8-3-2
Bit Level VLSl Design of High Throughput DLMS Adaptive IIR Filters .................................................. 1399
Yin-Tsung Hwang, Chun Shang Lin, National Yunlin Institute of Technology, Yunlin, Taiwan, ROC

8-3-3
An Infrastructure for Numeric Precision Control in the Ptolemy Environment......................................... 1403
Seehyun Kim, Edward A. Lee, University of California, Berkeley, CA

8-3-4
Quantization Error Analysis of the Radix-4 Signed-Digit Arithmetic....................................................... 1407
Youngho Ahn, Wonyong Sung, Seoul National University, Seoul, Korea

8-3-5
A CMOS Different.ial Amplifier with Well-Controlled Voltage Gain ......................................................... 1411
Thomas W. Matthews, San Jose State University, San Jose, CA

8-3-7
Parametric Yield Optimization of Electronic Circuits viaa Improved Centers of Gravity Algorithm ........ 1415
Mansour Keramat, Richard Kielbasa, SUPELEC, Gif-sur-Yvette, Cedex, France

8-3-8
An Integrated Bipolar Operational Amplifier with Rail-to-Rail Inputs and Output ................................... 1419
Jim Coehlo-Sousae, Linear Technology Corporation, Milpitas, CA

8-3-9
180 X 180 Element Ultra High Frame Rate Burst Image Sensor ............................................................ 1423
Rakesh K. Kabra, Vipulkumar Patel, John Tower, Sarnoff Corporation, Princeton, NJ;
John L. Lowrance, Vincent Mastrocola, Princeton Scientific Instruments, Inc.,
Monmouth Junction, NJ; Durga Misra, New Jersey Institute of Technology,
Newark, NJ

8-3-10
The FPGA to ASIC Conversion Process ................................................................................................ 1426
Carlos Abraham, Microchip Technology Inc., Chandler, AZ; S. H. Chiao, San Jose State Univetsity,
San Jose, CA

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Session 8-4: Simulation Control Shih-Ho Wang, Session Chair, University of California, Davis

8-4-1
On a Spectral Scaling Technique for Pitch Control in the High Quality Text-To-Speech Type
System .................................................................................................................................................... 1430
HyungGoue Chung, MyungJin Bae, Soongsil University, Seoul, Korea

8-4-3
Development of Automatic Test System for Mixed-SignaVAnalog Integrated Circuits............................ 1434
Wei-Hsing Huang, Chin-Long Wey, Michigan State University, East Lansing, MI

8-4-5
Power System Preventive Control Using Artificial Neural Networks Based Generation
Rescheduling Method ............................................................................................................................. 1438
Chris B. Effiong, James A. Momoh, Howard University, Washington, DC

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 -
Session 8-10: Signal Processing Poster Session Tom Johnson, Track Chair, California State
University, Long Beach, CA

8-10-2
Application of Nonlinear Kalman Filter Approach in Dynamic GPS-Based Attitude Determination ....... 1440
Guo-Shing Huang, Jyh-Ching Juang, National Cheng Kung University, Taiwan, ROC

8-10-4
Design of Sparse FIR Filters Based on Branch-and-BoundAlgorithm................................................... 1445
Young-Seog Song, Samsung Advanced Institute of Technology, Yongin, Korea; Yong Hoon Lee,
Korea Advanced Institute of Science and Technology, Taejon, Korea

8-10-5
Multiplierless FIR Filters Based on Cyclotomic and Interpolated Second-Order Polynomials
with Powers-of-Two Coefficients ............................................................................................................ 1449
Hyuk Jun Oh, Yong Hoon Lee, Korea Advanced lnstitute of Science and Technology, Taejon, Korea

8-10-6
Arbitrarily-Shaped Wavelet Transform for Image Compression............................................................. 1453
Eui-Sung Kang, Jae- Yong Lee, Jong-Han Kim, Sung-Jea KO,Korea University, Seoul, Korea;
Aldo Morales, The Pennsylvania State University

8-10-7
A VLSl Implementation of Image Processor for Facsimile and Digital Copier ....................................... 1457
Chang Dae Park, Young Hoon Jeong, Hyoung So0 Kim, Jae Ho Kim, Pusan National University,
Pusan Korea; Ki Wong Park, Yoon So0 Kim, SamSung Electronics Co.;Ki Sang Hong, Pohang
University

8-10-8
A Multi-FunctionAmperometric Microsensor for Medical Applications .................................................. 1461
Oscal T . 4 . Chen, Sandy Wang, National Chung Cheng University, Taiwan, ROC; Chii-Wann Lin,
National Taiwan University, Taiwan, ROC; Chien-Yu Jen, National Yang-Ming University, Taipei,
Taiwan

8-10-11)
A High Temperature Integrated Voltage Regulator System Design....................................................... 1465
Bent Holter, Truls Fallet, SINTEF Electronics and Cybernetics, Oslo, Norway

8-10-11
A Single-Chip Digital Phase Meter for Vibration Analysis of Rotating Machinery .................................. 1469
Michael Lindig BOs, Instituto Politecnico Nacional, Mexico

8-10-12
An Analytical Damaged Submicron MOSFET Model for CAD Application............................................. 1473
R. Bouchakour H. Recoules, W. Benzerti, H, Petit, Ecole Nationale Superieure Teldcommunications,
Paris, France

8-10-14
Higher Harmonics and Verification of Limit Cycle Stability in Autonomous Nonlinear Systems ............ 1477
Shui-Sheng Qiu, South China University of Technology, Guangzhou, PROC; I.M. Filanovsky,
University of Alberta, Edmonton, Alberta, Canada

Author Index

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