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CURRICULUM VITAE

Penmatsa Krishna chaitanyavarma


S/o: P Ramchandra Raju
D.no:4-126,Nandibomma street,
Satyawada, West Godavari District.
Andhra Pradesh. Pincode-534218
E-mail: krishnavarma2021@gmail.com Ph.no:8897977772
____________________________________________________________________________
Career Objective : Seeking a responsible position in the industry where my knowledge
and experience is shared and enriched for data entry.

Skills : Defining targets and achieving them, Self-motivated, Industrious and


Amicable.

Educational Profile

S.NO Qualification Year of passing Percentage (%)


1 B.E 2017 71.2
2 INTERMEDIATE 2013 93.5
3 SSC 2011 88.3

Area of interest : Analog Layout Designing.


Digital layout Designing.

Trained In : Analog layout designing at I2CD

Project experience in
Institute Projects :
1. Layout Design Of Basic Circuits.
At the early stage I have implemented designing skills on inverters with
multiple fingers, basic gates (NAND, NOR, AND, OR, EX-OR, EX-NOR) by
CMOS gates implementation. Entire design is carried out in submicron 7nm
process technologies.
2. Layout Design Of Basic Circuits.
At the early stage I have implemented designing skills on inverters with
multiple fingers, basic gates (NAND, NOR, AND, OR, EX-OR, EX-NOR) by
CMOS gates implementation. Entire design is carried out in submicron 130nm
process technologies.
3. Layout Design Of Differential Pairs.
At the later stage I have implemented designing skills on Differential with
multiple fingers using Matching Technique. During these circuits design
learned the importance of matching and faced few issues and learned to solve
them. Entire design is carried out in submicron 130nm process technologies.
4. Layout Design Of Current Mirrors.
After completion of Differential Pairs I have implemented designing skills on
Current Mirrors and Cascade Current Mirrors with multiple fingers using
Matching Technique. During these circuits design learned the importance of
floor plan along with matching close to accurate. Entire design is carried out in
submicron 130nm process technologies.
5. Layout Design Of Operational Amplifier And Bias Generators
At last I have implemented designing skills on Operational Amplifiers which
are designed using Differential Pairs and Current Mirrors as building blocks
with multiple fingers using Matching Technique. During these circuits design
the challenge is to design a floor plan in such a way that both the matching
techniques are matched neatly. Entire design is carried out in submicron
130nm process technologies.

Work Shop : Advanced antenna technology by IEEE society.

Engineering Project : Acting as a team member for the project on BER ANALYSIS OF
M-ary PSK MODULATION SCHEMES IN SISO AND MIMO
SYSTEMS .
Extracurricular : Active member of student activity center and participated in Operation
Redhills.

Technical Skills : MS-WORD, C programming.

Experiences : NA

Personal Profile : Date of Birth : 31-08-1996


Nationality : Indian
Sex : Male
Marital Status : Single
Fathers Name : P. Ramchandra Raju
Languages known : English ,Telugu

DECLARATION

I do hereby declare that the information furnished above is true to the best of my knowledge and belief.

Place : VISAKHAPATNAM.
Date :
(P K Chaitanya Varma).

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