Professional Documents
Culture Documents
A Dissertation
Presented to
In Partial Fulfillment
Doctor of Philosophy
Md Nayeem Arafat
August, 2014
MODELING AND CONTROL OF DISTRIBUTED ENERGY SYSTEMS DURING
Md Nayeem Arafat
Dissertation
Approved: Accepted:
__________________________ __________________________
Advisor Department Chair
Dr. Yilmaz Sozer Dr. Abbas Omar
__________________________ __________________________
Committee Member Dean of the College
Dr. Tom Hartley Dr. George K. Haritos
__________________________ __________________________
Committee Member Dean of Graduate School
Dr. Malik Elbuluk Dr. George R. Newkome
__________________________ __________________________
Committee Member Date
Dr. Ping Yi
__________________________
Committee Member
Dr. Alper Buldum
ii
ABSTRACT
Distributed generation systems (DGs) have been penetrating into our energy networks
with the advancement in the renewable energy sources and energy storage elements.
These systems can operate in synchronism with the utility grid referred to as the grid
(SA) mode of operation. There is a need to ensure continuous power flow during
DGs. In this dissertation, efficient and effective transition control algorithms are
developed for DGs operating either independently or collectively with other units. Three
techniques are proposed in this dissertation to manage the proper transition operations.
which can operate in SA and GC modes. The proposed transition control algorithm
ensures low total harmonic distortion (THD) and less voltage fluctuation during mode
reduce the cost, and provide better performance. In this technique, one of the DGs in a
microgrid.
iii
In the third technique, an alternative transition technique is proposed through
hybridizing the current and droop controllers. The proposed hybrid transition control
technique has higher reliability compared to the dispatch unit concept. During the GC
mode, the proposed hybrid controller uses current control. During the SA mode, the
hybrid controller uses droop control. During the transition mode, both of the controllers
participate in formulating the inverter output voltage but with different weights or
coefficients.
Voltage source inverters interfacing the DGs as well as the proposed transition
control algorithms have been modeled to analyze the stability of the algorithms in
through simulation and experimental studies. It has been found that the proposed control
techniques can provide smooth power flow to the local loads during the GC, SA and
transition modes.
iv
ACKNOWLEDGEMENTS
My sincere gratitude to Dr. Yilmaz Sozer without whose ardent initiatives, constant
compassionate advice and astute guidance this research work would not have
materialized. Also I would like to thank Dr. Iqbal Husain for his valuable suggestions and
guidelines for my research. Many thanks to all of the committee members, Dr. Tom
Hartley, Dr. Malik Elbuluk, Dr. Ping Yi and Dr. Alper Buldum, for their excellent
suggestions in making this research a success. The financial support of The University of
I would also like to thank my parents, Md. Shafiqul Alam and Khadiza Begum, my
wife, Rulia Farzana, my first son, Affan, my lab mates specially Ali Elrayyah and my
sister, Jannatul Ferdous, for their invaluable love and encouragement over the years.
v
TABLE OF CONTENTS
Page
CHAPTER
I. INTRODUCTION ... 1
2.1 Introduction.. 22
vi
2.3.4 Voltage Control Algorithm 33
2.6 Conclusion .. 54
vii
III. SMOOTH TRANSITION TECHNIQUE BETWEEN SA AND GC
MODES FOR VSIS OPERATING IN MICROGRID USING DISPATCH
UNIT 55
3.1 Introduction 55
3.3 Control Strategy for VSIs using Dispatch Unit in Transition Mode.. 58
viii
3.5.3.3 SA to GC during the Grid Delivering Power to the
System ........................................................................................ 110
4.5.1 VSIs Operate in SA Mode using Hybrid Control Technique ... 149
4.7 Study of the Electrical Characteristic of the Proposed Two Methods 167
ix
5.1 Introduction . 169
5.5 Experimental Results of the VSIs in Microgrid using Dispatch Unit . 190
x
5.6.3 Hybrid Controller Performance during Transition Mode .. 203
REFERENCES .. 216
xi
LIST OF TABLES
Table Page
4.3 Comparisons of the electrical characteristic between the dispatch unit and
hybrid methods 167
5.1 Parameters for the single phase utility interactive inverter .. 169
6.1 Performance comparison of the recent methods and the two proposed
methods 214
xii
LIST OF FIGURES
Figure Page
1.10 Load voltage and inverter output current waveform from SA to GC mode 13
1.12 The currents of the inverters and the load voltage in microgrid system .. 15
1.13 Single line diagram for the independent utility interactive inverter 19
1. 14 Single line diagram of the microgrid system using dispatch unit concept .. 20
1.15 Single line diagram of the microgrid system using Hybrid control . 20
xiii
2.5 Control diagram of the grid connected inverter system ... 29
2.6 Control diagram the GC inverter system incorporating the delay effect . 30
2.7 The effect of various hardware delay time in the current controller 30
2.8 Effect of kp variation of the current controller of the grid tied inverter (a)
the eigen value propagation of the system matrix and (b) SIMULINK
Simulation 31
2.9 Effect of ki variation of the current controller of the grid tied inverter (a)
Small signal model and (b) Simulation by MATLAB/SIMULINK 32
2.15 THD and the frequency deviation in the inverter output voltage during
the transition from SA to GC mode ..... 41
2.16 Voltage at PCC, inverter current, load current and grid current in the GC
mode, when = 45 A and = 0A and local load = 5.6 ... 42
2.17 The DC bus voltage, inverter input and output power in GC mode 43
2.18 The effect of hardware delay on the current control of the grid tied
inverter . 44
2.19 Voltage at PCC, inverter, load and grid current when changes from
10 to 30 A considering the load of 5.6 45
2.20 Inverter output power, dq-axes command current of the inverter, when
changes abruptly from 10 to 30 A considering the load of 5.6 46
2.21 The voltage at PCC, inverter current, load current and grid current, when
changes from 10A to 30 A within 0.9 sec .. 47
2.22 The DC bus voltage, grid voltage, inverter current when = 30 A and
= 0 A ... 48
xiv
2.23 Local load current, grid current in GC mode during the DC voltage
change from 200 V to 180 V .... 49
2.25 DC bus voltage, various output power flow by the inverter depending on
the loads demand in SA mode . 50
2.26 Inverter output voltage, grid current, inverter current and load current
during transition from GC to SA considering 200V, L = 1.5 mH,
R = 5 .. 51
2.27 The inverter output voltage synchronization with grid voltage after the
grid returns with leading phase with PI phase adjustment technique .. 52
2.28 The Inverter voltage synchronization with grid voltage after the grid
returns with lagging phase using the smooth frequency variation
technique .. 53
3.2 Block diagram of the dispatch unit current controller from SA to GC ... 59
3.3 State diagram of the operating mode transitions in a microgrid system ...... 60
3.7 d axis model for a DG system where two inverters run in SA mode
providing the power to the local load ... 66
3.10 The effect of the variation of droop coefficient of the microgrid system 77
3.13 The model predicts the critical value of the inductor ... 80
xv
mH 80
3.17 Eigen values in the microgrid system in low and medium frequency range 87
3.18 Simulation results of a microgrid system where two DGs run in droop
control and dispatch unit operates in current control mode . 88
3.20 Inverters currents, dispatch unit and the load current during transition .. 90
3.23 Propagation of the eigen values of the microgrid system when the droop
coefficients of DGs changes from 110-4 rad/W to 410-3 rad/W . 97
3.24 The inverters current, voltage at PCC and load current in SA mode ... 99
3.26 Power flow for the VSIs and the local load in a microgrid system . 100
3.27 The effect of load variations of inverters currents, voltage at PCC and
load current .. 101
3.29 Power flow for the inverters and the local load in a microgrid system ... 102
3.30 Inverters current, grid current and load current in GC mode ..... 104
3.31 The effect of load variations of the inverters currents, grid current, load
current in GC mode ...................................................................................... 105
3.34 DGs, load and dispatch unit currents during GC to SA transition mode. 109
xvi
3.36 Dispatch unit and the grid current during SA to GC mode transition . 111
3.37 Microgrid frequency and phase difference between the microgrid and the
grid voltage from SA to GC . 111
3.39 Power flow of the inverters, dispatch unit, grid and load during transition
mode . 113
3.40 Inverters, dispatch unit and grid current from SA to GC mode transition .. 114
3.42 Power flow of the inverters, dispatch unit and load during transition 116
3.43 The effect of the load changing on the inverters current, grid current and a
dispatch unit during SA to GC mode ... 117
3.44 The effect of the load changing on the voltage at PCC and the load current
during SA to GC mode . 118
4.1 Microgrid system where the VSIs use hybrid controller . 121
4.2 The variation of the weight factors of the current and droop control in all
modes of operations . 123
4.11 Power flow of the local load, unit 1 and unit 2 in SA mode 151
4.12 Inverters current, voltage at PCC and the load current during the effect of
load changes in SA mode ..... 152
xvii
4.13 System frequency, load and inverters power flow during SA mode ... 153
4.16 DGs, grid, load power flow and overall system frequency in GC mode ..... 156
4.17 The effect of the commanded current variation by the inverters, when load
current remains constant in GC mode .. 157
4.18 Power flow of the VSIs, grid and load in GC mode 158
4.19 Microgrid frequency and the output coefficients behavior from GC to SA 160
4.20 The output currents of DGs, load and grid during GC to SA mode
transition ... 161
4.21 Microgrid frequency and the output coefficients behavior from GC to SA 162
4.22 DGs currents, load and voltage from SA to GC mode .................... 163
4.23 Power flow of unit 1, unit 2, grid and the local load during transition 164
4.24 The effect of the load changes on the inverters currents, grid current, load
current and voltage at PCC from SA to GC mode ... 165
5.2 Grid interactive inverter setup: (a) Power module, (b) Interface board, (c)
DSP development board ... 171
5.8 Simplified diagram of one line microgrid test bench ... 177
xviii
5.11 Experimental setup of an independent VSI 180
5.12 Output of the Phase Locked Loop (a) grid voltage (b) d-axis voltage,
(c) q-axis voltage, (d) Output of Phase angle of the PLL .... 181
5.13 The grid voltage, inverter current, grid voltage and grid current, d-axis
and q-axis current of the inverter ..... 182
5.15 The effect of abrupt change on the reference current of VSI .. 184
5.17 Steady state load voltage and load current with 20 A peak magnitude . 185
5.18 Transition from GC mode to SA mode. (a) Switch status; (b) Inverter
voltage and (c) Load current 186
5.19 (a) Transition from SA to GC mode. (b) Detailed view of transition from
SA to GC mode 187
5.21 Grid voltage, load voltage and inverter output current during SA to GC
transition mode 188
5.24 Inverters current, dispatch unit current, voltage at PCC and the load
current in SA mode .. 190
5.26 Dispatch unit current, grid current, voltage at PCC and load current in GC
mode. 192
5.27 Inverters current, grid current, dispatch unit current from GC to SA .. 193
5.28 Microgrid voltage at the PCC point and the local load from GC to SA .. 193
5.29 Inverters current, grid current and dispatch unit current from GC to SA
xix
mode . 194
5.30 Local load takes 35 A current during the entire modes of operation ... 195
5.31 Currents of the inverters, dispatch unit and grid during SA to GC mode
transition ... 196
5.32 Synchronization of the microgrid with the grid during SA to GC transition 197
5.34 The DC bus voltage of unit 1 and unit 2, where has 10% voltage
fluctuation 198
5.36 Dispatch unit current, grid current, voltage at PCC and load current from
SA to GC mode 199
5.38 Inverters current, voltage at PCC and load current in SA mode .. 201
5.39 Inverters currents, grid current and voltage at PCC in GC mode 202
5.41 Microgrid frequency, the output coefficients behavior, the load voltage
and current from GC to SA mode 204
5.42 Inverters currents, grid current, voltage at PCC from GC to SA mode ... 205
5.43 Inverters currents, grid current and the load current during SA to GC 206
5.44 The wave shape of the DC bus voltage of unit 1 and unit 2 207
5.45 Inverters current, grid current and load current during SA to GC mode . 208
xx
CHAPTER I
INTRODUCTION
Conventional energy sources based on oil, coal, and natural gas have proven to be
highly effective drivers for the economic progress of the world. With the growing
demand for electricity and limited fossil based energy resources, the focus has been
alternative energy systems. In particular, emissions from vehicles lead to global warming
and push governments to make efforts towards the development of clean renewable
energy resources, such as wind, bio-gas, and solar. It is expected that renewable energy
sources in world net electricity generation will increase continuously in the near future as
1
In the past few decades, distributed generation systems (DGs) [3]-[6] have gained
development of new generation units, and their ability to offer more options of price-
quality combination to meet the changing electricity market. Photovoltaic modules (PV)
[7], wind turbines [8], fuel cells [9], and micro-turbines [10] are commonly used as the
sources for the DGs. Since the first two energy sources do not require purchasing fuel and
their installation cost falls in the order of $1/W, the installation of PV and wind turbines
increased at a rate of 20-40% per year in the last few years [11]-[12]. Figure 1.2 shows
Renewable energy sources provide benefits over the natural fossil based sources due
to
Their small sizes enabling the utilization of DG concept especially in remote areas
2
1. 2. Overview of the Distributed Generation Systems
Most of the renewable energy sources are distributed in nature. DGs help in achieving
low cost power system expansion and improve power quality in addition to other
transmitting electricity because the electricity is generated very near where it is used,
perhaps even in the same building. This reduces the size and number of power lines that
must be constructed. Figure 1.3 shows the DG powered for the house which can also be
The DGs produce direct current which needs to be converted to alternating current by
a DC/AC inverter, as all the electric appliances run through the AC supply. The voltage
sources inverter (VSI) either runs in the grid connected (GC) mode or the standalone
(SA) mode. In GC mode, inverters run in parallel with the grid and deliver the required
active or reactive power to the utility grid. In the SA mode the inverter delivers the power
to local loads in AC from provided the grid is not there. Between these modes there is
another mode called transition mode which requires the most concern. During the
transition mode, the main objective is to deliver continuous power to local loads. An
3
unexpected power disruption could cause injuries, fatalities, serious business disruption
or data loss. DGs are also commonly used in medical centers, TV broad casting stations,
which [14-16] require clean input voltage with low total harmonic distortion (THD). For
example, there is a specific power supply requirement from the International Broadcast
Centre (IBC) to maintain a continuous and stable power supply with low THD which
would allow uninterrupted sportscasts all around the world [17] [18]. Figure 1.4 shows
In summary, the technical challenges for the bidirectional DC/AC inverters are:
The deviations of the system frequency should be kept within very narrow
margins in GC, SA or the transition mode, as the well functioning of many industrial and
When the grid returns, the DG unit must be re-synchronized with the grid voltage,
Proper voltage waveform across the load voltage should be maintained during the
4
1. 3. Overview of the Microgrid System
A typical microgrid system consists of parallel DGs, storage systems, and a cluster of
loads within a local area [19]-[22]. Renewable Energy Sources (RES), conventional
energy sources like diesel generators or non renewable alternative energy sources could
function as a member of the micro grid. Most of the alternative energy sources in the
microgrid produce electricity in DC form. Solar PV cells and fuel cells provide DC
voltage, where as small and mid size wind generators output AC which is then rectified
into DC voltage. The DC electric energy is usually converted into AC electric energy by
use of an inverter. The resulting AC electric energy has to be compatible with the energy
within the AC utility system at the point where the inverters are connected to the utility
system. The inverters can be controlled to operate with either leading or lagging power
A microgrid not only has the inherited advantages of DG but also can offer several
paralleled DG units; flexible, cost effective, and energy efficient features by power
management and control. The microgrid can operate in both the SA and the GC mode,
but is mostly connected to the grid as it would balance the energy requirement and
provide a filter in the absence of adequate energy storage capability [23, 24]. In the
absence or the loss of a utility grid, the microgrid sustains the loads through its network.
As shown in Fig. 1.5, a typical microgrid system consists of several RESs and local
loads.
5
Figure 1.5. The microgrid system.
flow during transitions. When the grid is down or the quality of the power deteriorates,
the microgrid can disengage from the grid and work in SA mode. The transitioning from
mentioned before. The ability to switch between grid-tie and SA modes is one of the
main targets to guarantee uninterrupted power to critical loads within the microgrid.
Most DGs used in a microgrid are inverter-based and require constant control and
communicate among the voltage source inverters (VSIs). VSIs are also much more
6
sensitive to overloading and other abnormal operating conditions than synchronous
generators.
active and reactive power and transition control among the VSIs [21].
From all of the above discussion, we can conclude that both DG system and the
microgrid system suffer during the transition mode and a better control technique is
required for maintaining the quality the power across the system. In our research we
focus on the transition problem of the inverter and try to develop simple and robust
As we know, the demands for energy from renewable sources have increased to
address the energy crisis and environmental pollution problems. This has resulted in the
proliferation of renewable based DGs for power generation into the grid and the
systems are connected to the utility grid (UG) through VSIs. The utility interactive
For mode transfer between two basic modes, the first step is to determine if the
Different active methods including current injection [31], PLL based detection [32], and
the frequency-drift method [33] are proposed to identify the grid availability. When the
7
[37]. Once the grid recovers, the microgrid or individual inverter should re-connect back
to the utility without harming the system. In order to minimize the transients, the phase-
lock loop (PLL) design and the mode transfer procedure were proposed in [38]-[40]. In
[41], a PLL is designed with an orthogonal filter to increase the robustness when grid
reduce the transients during the startup of grid connection. By controlling the peak value
of the output current with an inner voltage loop, the indirect current control can achieve
smooth mode transfers between the two modes [43]. Past studies on microgrid operation
typically focused on a single inverter with a single power conditioning system for
The utility interactive inverter should be able to operate both in GC and SA modes in
order to provide power to the emergency load during outages. The SA and GC modes of
the inverter operation require different control methods. Moreover, the transition between
the two modes should be seamless to minimize any sudden voltage change across the
emergency load or any sudden current change provided into the grid. The transitions
between the two modes should be fast and precise to minimize the interruption in the
power supply. The utility interactive inverters for DGs reported in the literatures [45, 46,
47, and 48] have the capability to operate in both GC and SA modes, but do not address
the issues of stresses on the converter and total harmonic distortion (THD) on the voltage
and current waveforms during transition. The harmonic currents cause the transformer to
overheat resulting in reduced life and rating, and stress on the power factor correction
8
capacitors. The harmonics in the voltage cause losses in the motors resulting in increased
Figure 1.6. The output current of the individually operated inverter from SA to GC mode.
In [50], the connection is done at positive zero crossing where often load voltages
match with the grid voltage. The current controller starts increasing the reference current
slowly from zero to the desired value in the six electrical cycles. The synchronization of a
small wind turbine with a local grid is done using a switch but without a prescribed
transition algorithm in the literature [46]. In [46], high current passes through the inverter
phase after the grid recovers, and the inverter ceases the operation until the
synchronization is achieved between the inverter and the utility grid. After connecting the
grid, the inverter then starts to regulate the power within 1 sec [46], as shown in Fig. 1.6
continuous, uninterrupted voltage across critical and sensitive loads has been proposed.
For the transfer from SA to GC mode, the inverter voltage should match the grid voltage
both in magnitude and phase, before the static transfer switch can be turned on and the
9
grid current should be slowly ramped up to a reference value. According to their
proposed algorithm form, the SA to GC mode to make the synchronization with the grid
voltage, the frequency of the system changes from 60 Hz to 59 Hz and then gradually
increases to 60 Hz. Figure 1.7 (Fig. 9 as in [49]) shows the deviation of the system
In [50], the grid interactive inverter with LC filter and the isolating transformer has
been used to describe the transition mode operation of a single inverter. The hysteresis
control technique is used which requires high performance of the DSP. In [50] the phase
angle error between the grid and the inverter is sent to a PI controller, thus obtaining the
required frequency variation. Figure 1.8 shows the frequency variation of the inverter and
the grid respectively. In all cases, the inverter generates the abrupt frequency change in
the beginning of the transition time which increases the THD of the load voltage [50].
Adding an extra capacitor bank at the output of the inverter and the transformer will add
10
Figure 1.8. Frequency change of a conventional UPS control.
Transition Modes
interface DG units [51-53], as shown in Fig. 1.9. DGs may be located in a distribution
network or on the local load side [54-56]. The generation technology can be gas turbines,
fuel cells, photovoltaic systems or wind turbines. In addition to energy sources, energy
storage devices can also be used in microgrid. A typical microgrid has two operating
modes: GC mode and SA mode, both modes require effective regulations and control of
the DG. A power electronic system is used to interface the DG and microgrid, the control
of the power electronic converter is the key point. The third mode can also be considered
as the transition mode between these two modes of operations. If care has not been taken,
power disruption or power oscillation between sources can happen during transition
mode.
inverter is operated in the ride through mode, which will be triggered when the inverter
current reaches to zero to avoid asynchronous grid connection. Then the virtual
inductance concept [58] is used for soft start up. The authors in [58] consider three
11
different kinds of variable virtual inductance L as exponential decay, ramp decay and
constant. The initial value of the virtual inductor is defined to limit the large inrush
current. A small initial value of inductance may cause the inverter switching to ride
through mode more than one time. After presetting time delay, the control algorithm is
changed back to the droop controlled mode. The system needs to shut down for a small
period of time. Figure 1.10 shows the inverter output currents from SA to GC mode (as in
Dispatch Unit
GRID
ENERGY
STORAGE
Load
MICROGRID Line
Synchronous
Generator
Frequency and phase synchronization techniques have been described in [58]. In [58],
a synchronization controller which adjusts the phase and the frequency at the same time
12
Figure 1.10. Load voltage and inverter output current waveform from SA to GC mode.
make the transient between GC mode and SA mode with promising results. In master-
slave control, the master unit collects the information and delivers control data to
distributed slave units, which require communication infrastructure. If the grid is not
available, the switch remains disconnected and the system supplies its own power to
critical loads. One of the inverter, assigned as a master unit, has to operate in voltage
control mode and serve as a voltage source, while the rest of the inverters operate in
single current-loop control to share the current as required. When the grid recovers, the
switch is reconnected and all the VSIs in the system run in a current mode to supply
energy to the critical load and to exchange energy with the grid. Figure 1.11 (as Fig. 1 in
[61]) shows the microgrid structure using the master slave technique where the main
controller selects one of the inverters as the master and runs in voltage control mode and
the rest of the inverters run in the current control mode and send the command through
the communication network. The main controller always needs to monitor the grid
voltage availability by sensors and send the necessary signal to the VSIs. A robust
rural areas.
13
Figure 1.11. Distributed generation system architecture and control.
Figure 1.12 shows the inverter current and the load voltage during transition with the
technique proposed in [61]. Here, the master unit tries to achieve voltage control in SA
modes of operation and many times transition can overload the master unit. Moreover,
the master unit must always be the one which needs to turn on fast to maintain the system
voltage sinusoidal. The system is unreliable, as the whole system would fail if the master
DG fails. From SA to GC mode, when the phase of the system voltage and the grid
voltage is matched, the main controller connects the grid and all the inverters start to run
in the current control mode. The master function could be dynamically allocated to the
unit that first comes into operation, and then to the unit that has the maximum power
rating as more units are connected. This, however, will result in a much more
14
complicated control system as each unit will have to be designed for both master and
Figure 1.12. The currents of the inverters and the load voltage in microgrid system.
From the above literature review, the state of the art can be summarized as follows:
(i) The utility-interactive inverters for DGs reported in the literatures [45, 46, 47, and
48] have the capability to operate in both GC and SA modes, but do not address the
issues of stresses on the converter and total harmonic distortion (THD) on the voltage and
current waveforms during transition period. In the single phase system as we have more
control and flexibility over the system we can get better performance from the system
(ii) During the transition between SA to GC mode for parallel VSIs, different
techniques have been proposed such as virtual inductance based droop control [62]
inverters, frequency and phase synchronization [63], adaptive droop coefficients control
[64], resistive virtual output-impedance loop [65] and master-slave [59-60] to get the
15
continuous power flow to the local loads. Master-slave [59-60] with CAN-based
communication network shows better performance during the transition period, but the
complexity and the stability becomes a major issue. There is a need to develop better
communicational infrastructure.
Due to the larger system uncertainties and the interface design, the inverter-based
microgrid suffers more challenges which call for the need of stability analysis [66], [67]-
[69], [70]-[71]. As there connected several VSIs at the AC bus of point of common
connection (PCC), the system faces some challenges to meet the stability of the system.
The DC bus fluctuation, the inductor size of the inverter, the gains of the controller of the
VSIs, and the load changes play important roles in the stability issues. Due to the
presence of these challenges, there is a strong need for stability analysis to guarantee
The stability of a single inverter can be determined by Bode plots using the phase
margin and gain margin as the stability criteria. In single LCL grid-tie inverter systems,
Bode plots were used to study the effects of changing feedback scheme [72], controller
gain [73], [74], and plant parameters [66], [75], [76]-[78]. This method, however, cannot
determine the stability of parallel-inverter system due to the possible interactions among
different control loops and the current-sharing controller. The stability of cascaded
systems reasonable input filter design of a converter [79]-[80]. The system stability can
also be determined by analyzing the system pole and zero locations using the eigen value
analysis. With the state-space analysis, the single inverter systems studied the stability of
16
changing the controller gain [73], [72]-[74], the plant parameters [66], [81]-[82], and
different feedback signals [76], [83]. Also, the state-space analysis is usually adopted to
investigate the LCL filter resonance issue of grid-tie inverter systems with passive
damping methods [82], [83] and active damping techniques [66], [72], [76].
The stability of large-scale DGs with droop control is also usually being analyzed by
the state-space model. The system stability was studied by changing the load type [84],
the droop controller gain [69], [85], and the output power [69]. This model is relatively
equations for parallel VSIs. In [86], the state-space model is adopted to investigate the
sharing scheme. Even though the state-space tool is already widely used in other
tool. The control variables described in previous stability analysis papers such as
controller gain, output power, and load type, can be used as system variations to
investigate the stability of a newly built microgrid system. Once the state-space model is
constructed, many modern controller design techniques, such as pole assignment [74],
[87]-[89], and eigen value sensitivity [85]-[86], [90] can be utilized to optimize the
system operations.
1. 6. Thesis Outline
Previous studies have given solutions to VSIs in either GC mode or SA mode, but
rarely mentioned the inverter design in both operation modes. However, it is necessary
for a microgrid application that basic operation modes and transition mode need to be
considered. For a microgrid system consisting of several small parallel DGs and loads,
17
the proper controller should be built which can do the smooth transition between SA and
With the above research motivations, the research objectives can be summarized as:
1. To design and build a single bidirectional inverter that can operate in GC, SA and
transition mode.
3. To develop a mode transition system for microgrids using a dispatch unit without
This dissertation aims to develop a robust, reliable and stable microgrid system. The
study will cover from a single unit in different modes of operation, to multiple unit
operation with the ability to perform mode transfers. Finally, the stability of the whole
system will be studied to help the controller design and ensure system reliability. Here we
use the dq based control architecture because of its simplicity and reduction of the input
variables.
In Chapter II, the inductor (L) filter design considerations and the controller designs
of a single inverter in both GC and SA modes are discussed. For GC mode, a PI current
controller in a rotating reference frame and the PLL has been developed. For SA mode, a
droop control and RMS voltage control is used for voltage regulation. In transition mode
a smooth frequency variation transition control technique for VSI has been developed and
18
Switch Signal
Inv. G
SW
Load
Figure 1.13. Single line diagram for the independent utility interactive inverter.
In Chapter III, a smooth transition control strategy is proposed for voltage source
operation, the inverters use the droop control method to regulate the real power flow
without the need of any external communication between them. One of the DGs working
utility grid and achieve smooth transition between the modes of operation. In the
transition mode, the dispatch unit takes extra responsibility and ensures the continuous
power delivery to the load. For smooth transition from GC to SA, the dispatch unit
compensates for the grid current instantly after the transition and then gradually makes
the other sources to share that current. The dispatch unit also adjusts its output power to
make the transition from SA to GC mode as that power affects the frequency through the
droop control. The performance of the proposed control technique has been verified with
conditioning system are presented. Eigen values with different controller gains and load
conditions for GC, SA and transition modes are found to analyze the system stability of
the system.
19
PCC
G
Inv.
Inv.
G
SW
Inv. Load
Figure 1.14. Single line diagram of the microgrid system using dispatch unit concept.
been proposed without needing a dispatch unit. During transition, both current control
and droop control participate in formulating the inverter output voltage, but with different
weights or coefficients. The controller, referred to as a hybrid controller, varies the output
coefficients of the current and droop control depending on the system frequency variation
to regulate the real power flow. The state-space model of a microgrid system is derived.
G PCC
Inv. G
SW
Inv. Load
Figure 1.15. Single line diagram of the microgrid system using Hybrid control.
Eigen values with different controller gains and load conditions for GC, SA and
transition modes are derived to analyze the system stability. The experimental results of
20
the proposed algorithm of Chapters II, III and IV have been presented in Chapter V. The
experimental setup of the system and power up procedure also has been discussed in this
chapter.
Chapter VI provides the conclusions of this dissertation and some suggestions for
21
CHAPTER II
2. 1 Introduction
Due to the need of continuous power flow for critical loads [24], the utility interactive
inverter needs to operate consistently in the GC, SA and transition modes. In GC mode,
the amount of power exchanged with the utility grid (UG) is controlled by regulating the
phase currents. In SA mode, the load voltage is regulated by the inverter with its phase
dictated by the inverter control. The main challenge that the inverter will face is to
maintain the proper flow of the power to the load during transitions between SA and GC
modes. The transition between SA and GC operations that will ensure continuous power
delivery to the load requires continuation in the phase of the system voltage. If the
transition mode of operation is not smooth then the critical loads will face sudden shut
down which may cause injuries, fatalities, serious business disruption, or data loss. There
has been little research on seamless transition control. In practical life, the inverter faces
two types of transitions. From GC to SA mode the inverter needs to maintain consistent
phase of the load voltage. From SA to GC the phase of the system voltage needs to be
adjusted with the grid voltage. This phase adjustment is done through the variation of the
system frequency by the controller of the inverter. The PI, trapezoidal, sinusoidal and
staircase frequency variation techniques have been analyzed to make the proper phase
adjustment. The purpose of this chapter is to develop a smooth transition control strategy
22
for VSI between SA and GC modes of operation, which provides lower THD on the
This chapter has been divided into five subsections. In first subsection, the control
algorithm of the bidirectional inverter in GC, SA and transition modes has been
described. Second, the performance comparison has been studied of all the recent
transition controller techniques with our proposed smooth transition control. Third, the
stability analysis and proper controller design of the bidirectional inverter has been
derived to test the system for different operating conditions. The simulation results have
been provided to show the effectiveness of the controller. In Chapter V, the new
The operation capability of the utility interactive inverter, (shown in Fig. 2.1) with the
SA mode, GC mode and the transition mode operation capability has been analyzed in
this research, as shown in Fig. 2.1. A renewable source like a solar cell, wind energy,
bidirectional DC/AC inverter. The local loads are connected in parallel with the inverter
and the grid through the smart switch (SW). The inverter output voltage is filtered
impedance. The grid also has an internal resistance of . The inverter controller is
23
Local
Load
iL
ZL Zg
VDC SW
CDC
iINV Vg
INVERTER
PWM
Generation
Modulation
Index, ma Vg
Voltage
Controller
State Vd Phase
Transition Lock Vg
Control AND f
Block
Loop
( PLL )
Current
Controller
iq_act abc iINV
dq
iq_act id_ref id_act
DSP CONTROLLER
As there are there modes of operation, the controller has to find out the proper mode
and apply the required control algorithm. Figure 2.2 shows the control strategy of the VSI
instantly and does not require separate operating conditions. Initially when the system is
turned on, the controller gets the grid voltage through sensors, completes PLL, and
24
checks the grid availability by checking, if Vd, Vq, f are in the range or not. If the grid is
available, then the system runs in GC modes where the inverter is controlled by the
current control technique. If the grid is not available, then the inverter runs in SA mode
(2.1)
Vd,Vq & f
out of range
GC GC-SA SA
PLL S=GC-SA + fS dt
Current control Voltage control
Figure 2.2. State diagram of the operating mode transitions of the individually operated
If the grid is available, the inverter goes into the SA to GC transition mode. During
the transition mode, the phase needs to be adjusted and connection is established at the
zero crossing of the voltage. The inverter runs in the voltage control mode during this
transition time until the zero crossing is detected. After the zero crossing occurs, the
inverter starts operating in the current control mode. There is a typical delay time for the
25
2. 3. 1. Phase Lock Loop Algorithm
In the GC mode, estimating the phase of the grid is essential in processing the right
amount of power. The purpose of the PLL system is to estimate the phase of the utility
[91]. The PLL grid synchronization technique has been the preferred from the literature
[91-93], and is also used in this study. The PLL system consists of an abc-to-
The single phase PLL algorithm is shown in Fig. 2.2 where the grid voltage is shifted by
90 and converted into dq axes voltages based on the estimated phase. The loop filter
brings the q axis voltage to zero by adjusting the phase. The estimated phase is assumed
to be locked to the grid when the q-axis voltage is zero. Based on the estimated phase, the
utility current can be converted into the dq reference frame the same way as the utility
voltage is converted; the regulation in dq reference frame is easier and has better dynamic
response characteristics. The dq axes currents dictate the real and reactive power flow
+ Kf (s) g
1/s
0 Loop Filter
-
Vq
V to Vdq
Vd
V V
Delay
Grid voltage
26
The grid voltage and its phase shifted versions can be represented as
(2.2)
(2.3)
(2.4)
where the maximum peak voltage, is the phase and is the estimated phase of the
grid voltage.
After the transformations, the two utility voltages in dq reference frame can be
represented as
(2.5)
(2.6)
(2.7)
The PLL phase can track the utility phase angle respectively by the proper design
of the loop filter [63]. A proportional-integral (PI) type filter for the second order loop
can be given as
(2.8)
The transfer functions of the closed loop system are rewritten in the general form of
(2.9)
where and .
27
where is the loop filter gain, is a time constant, is the damping coefficient and
The amount of desired output power delivered to the utility is controlled through the
important for eective power processing. The quality of the current regulation algorithm
is also important to meet the total harmonic distortion restrictions imposed by the
applicable standards. Many control algorithms have been proposed to control inverter
output current for utility interactive operations. Hysteretic type controllers with different
closed loop compensators have been used running at varying or constant switching
regulation algorithm that works harmoniously with grid synchronization methods. Figure
2.3 shows the block diagram of the utility interactive voltage source inverter controller
based on current regulation in the dq reference frame. The dq axes currents are controlled
in their reference frame through PI controllers and converted into the reference phase
voltage. The electrical dynamics of the inverter after transformation to the dq reference
(2.10)
(2.11)
where and are the dq component of the grid voltage and and are the
required voltages to be applied from the inverters for current regulations. The cross
coupling and feed forward terms help in simplifying the controller design. The reference
dq axes voltages are converted to inverter switch gate signals through a PWM generation.
28
Vgd
+ PI
+ Vd_ref
Id_ref controller
- + -
v C
Id_act
L* dq
Iq_act
Vgq
+ PI + g
Iq_ref
-
controller + + Vq_ref
PLL
Iq_act
L*
vg
Id_act
The dq control structure is using the abdq transform module to transfer the control
variables from their abc frame to a frame that synchronously rotates with the grid
voltage. As a consequence, the control variables are becoming DC signals which help
simplify the control design. The controller transfer function can be represented as [25]:
(2.12)
where and are the proportional and integral gains of the current controller. Figure
2.5 shows the closed loop control of the current controller in dq axes, where L is the
value of the inverter output filter and r is the internal resistance of the inductor
idq ,ref 1
+
GPI ( s ) sL r
- Plant
PI controller
idq ,act
(2.13)
where D(s) is the plant transfer function, is the closed loop transfer function.
29
A practical system has some delay because of the filter and the hardware circuit. The
addition of a delay introduces poor performance to the current controller. So the proper
values of the controller gains need to be found. Figure 2.6 presents a delay having a
transfer function, , infront of the PI controller added to the system. The closed loop
(2.14)
idq ,ref 1
eTs GPI ( s)
+
sL r
-
Delay PI controller Plant
idq ,act
Figure 2.6. Control diagram the GC inverter system incorporating the delay effect.
The controller gains can be determined based on the Eqn. 2.14 using Routh Locus
technique. Figure 2. 7 shows the effect of the various hardware delay times on the current
controller. Beyond a certain delay, the system poles get into right half plane and the
8
Delay (degree)
6 Delay increases
kp=5; ki=106:
4
0
-8000 -6000 -4000 -2000 0 2000
Real axis
Figure 2.7. The effect of various hardware delay time in the current controller.
30
Figure 2.8 shows the eigen values and simulation response of the VSI during GC
mode of operation. In the GC mode, the inverter performance depends on the selection of
the gains of the current controller. Figure 2.8 shows that increasing the values of kp
makes the system stable for ki = 106. As the value of kp becomes lower, the response of
system enters into the unstable region, which also agrees with the simulation results,
kp increases kp=5
kp=-8;
Imeginary Axis
ki=106
-500
-5000 -4000 -3000 -2000 -1000 0 1000 2000 3000
Real axis
(a)
Variation of kp
30
20
kp
10
0
0.4 0.45 0.5 0.55 0.6
Inverter current and grid voltage
200
iinv
Vg
units (V/A)
100
-100
-200
0.4 0.45 0.5 0.55 0.6
Time (s)
(b)
Figure 2.8. Effect of kp variation of the current controller of the grid tied inverter (a) the
eigen value propagation of the system matrix and (b) SIMULINK Simulation.
31
Ki variation of the current controller
30
ki=-10,
20
kp=26
ki increases
Imeginary axis
10
-10
ki=10,kp=26
-20
-30
-40 -35 -30 -25 -20 -15 -10 -5 0 5
Real axis
(a)
Variation of ki
150
100
Ki
50
0
0.2 0.25 0.3 0.35 0.4
Inverter Current and Grid Voltage
200
iinv vg
Units (V/I)
100
-100
-200
0.2 0.25 0.3 0.35 0.4
Time (s)
(b)
Figure 2.9. Effect of ki variation of the current controller of the grid tied inverter (a)
Figure 2.9 shows the effect of the variation of the ki on the performance of current
controller. In this case we consider kp = 26 and ki varies from -10 to 150. The current
controller performance deteriorates when the value of ki becomes lower than 10.
32
2. 3. 4. Voltage Control Algorithm
In the absence of the utility grid, renewable energy systems could be used to provide
energy to the local loads [22, 23, 24, 25] assuming an adequate supply of energy for the
inverter to draw upon. The control structure on the DC and AC sides are changed to
accommodate the needs of the local loads. Unless there is battery backup in the system,
the system cannot work on the principle of maximum power extraction from the source
since this would lead to a sustained power imbalance. If there is enough energy available
at the source, the local loads are fully supported by the inverter. If the demand from the
loads is higher than the available energy at the source then lower priority loads are
needed to be shed to make energy available for supporting the higher priority loads.
The voltage and frequency of the AC side is set by the inverter. Similar voltage
steady state and transient requirements different voltage control techniques can be used
[45, 46, 47, and 48]. One of the attractive methods used in UPS systems is the RMS
voltage control. The RMS voltage is controlled by a PI compensator. The output of the
compensator adjusts modulation index of the sine PWM operating at the utility
frequency. This type of control provides stable output in the steady state [26]. When the
VDC
PWM
+ PI PWM
Signals
Vrms,ref controller Generation
-
Vrms,act Sin ref
33
utility grid is not available or it is out of the specified range, the inverter controller
critical loads. The phase starts with its value at the start of the transition ( GC SA ) and
Figure 2.10 shows the RMS voltage control method of the SA inverter. The PI
controller produces the right amount of inverter RMS voltage and the result is multiplied
with sinusoidal variation based on the estimated utility phase. The PWM signals are
generated from the reference sine wave voltage for the inverter to produce the desired
output voltage.
In the SA mode the VSI runs in RMS voltage control mode. The inverter acts as an
AC voltage source [101], as shown in Fig. 2.11, providing sinusoidal output voltage. In
(2.15)
where R is the Local load, and r is the internal resistance of the inductor, is the load
34
Impulse Response
2500
2000
1500
Amplitude
1000
500
0
0 0.5 1 1.5 2 2.5
-3
Time (seconds) x 10
Figure 2.11. The impulse response of the circuit shows stable condition.
Figure 2.11 shows the impulse response of the system transfer function in SA mode.
The transfer function shows the system is first order and has one pole, which is in the left
2. 3. 5. Modulation Index
The reference signal that goes to the PWM generation block needs to be normalized
by the DC bus voltage. So that it can compensate the DC voltage fluctuations. The
(2.16)
voltage signal, is the actual reference signal that should available across the DC
bus terminal, and are nominal values of the DC bus and the grid voltage
respectively.
The duty ratio, da, would vary between +1 to -1, therefore a saturation block needs to
35
2. 3. 6. PWM Generation
Depending on the da, the PWM generation block makes the appropriate switching
frequency for the gate of the IGBT module. The da is compared with the triangular wave
shape of the switching frequency, is shown in Fig. 2.12. The output of the comparator
V,ref Carrier
Frequency
Signals
time (sec)
PWM
time (sec)
Figure 2.12. PWM generation technique.
The ON time of the switches is determined based on the PWM frequency and
where, is the ON time upto which the PWM block will give the high signal,
presence of the grid and makes grid connection decisions based on that. When the UG
becomes available; the inverter controller would detect its presence and connect UG
within the prescribed time. Depending on the phase difference between the inverter
36
output voltage and the UG voltage at the instant of the UGs availability, the inverter
frequency could be adjusted to synchronize the inverter and UG phases within a given
connection wait time (TG). This operation should be done with the minimum impact on
the critical loads and the UG. The available transition techniques have been explored and
analyzed to evaluate their impact on the critical loads. The PI and trapezoidal frequency
variation technique are first evaluated for the transition, and then two special cases are
studied: 1) abrupt frequency variation, and 2) triangular frequency variation. The THD of
the voltage wave shape was observed for each case to find out the optimum condition for
which the THD is the minimum. In all the cases, the average frequency deviation has
The phase deviation between the UG and the inverter output voltage is measured
when the grid is available. Using the prescribed waiting time, the amount of the
| diff |
frequency deviation ( f ) is obtained from f . The phase is adjusted by
2 TG
varying the inverter operating frequency with the trapezoidal shape as shown in Fig. 2.13.
When the phases of the inverter and the UG match, the inverter is connected to the UG at
The frequency of the inverter can be varied and adjusted for the duration of connection
time (TG) to synchronize with the phase of the UG. The rate or slope for the transition can
be obtained from
(2.18)
where x is the time duration for the frequency transition and f is the maximum
37
TG
Trapezoidal frequency
Frequency (Hz)
variation technique Abrupt
f y frequency
variation
Smooth
frequency
x variation
t1 t2 t3 Time (s)
when (2.19)
when (2.20)
when (2.21)
where TG is the time to make the synchronization, and fs is the system frequency.
The two special cases for frequency adjustment are described as:
(1) Abrupt frequency variation: If the initial duration is instantaneous (i.e. x = 0 in Fig.
(2) Triangular frequency variation: The other extreme case of the frequency variation
when (2.22)
when
(2.23)
The objective is to minimize the frequency deviation without disturbing the
conditions of the critical loads. One of the measures for the quality of the inverter output
38
is the voltage THD. Different frequency transition slopes or rates have been tested to
compare the THDs of the inverter output voltage during the phase adjustment period.
The shapes of the frequency transition functions change with different slopes; each
In typical UPS systems, the practical method used for phase adjustment is the closed
loop PI controller [46, 49]. Figure 2.14 shows the block diagram of the PI controller
based synchronization technique of the inverter output voltage phase with the grid. The
angle error between the grid and the inverter is passed to the PI controller to obtain the
required frequency variation. The bandwidth of the controller is then tied to the required
phase adjustment time. The closed loop transfer function of the PI angle tracker is
(2.26)
The transfer functions of the closed loop system can be rewritten in the general second
order form as
(2.27)
k pf 1 k pf 1
where n and
2n
Equating Eqn. 2.26 and 2.27 we can find the value of and . If we want make
only the P controller then the value of should be zero. But there will be huge deviation
in frequency at the initial time and as the time passes the frequency deviation becomes
lower. For the proper value of and , considering = 0.7 would be appropriate.
39
f
g PI
1 s
Controller
s
Figure 2.14. Block diagram of the PI based phase adjustment method to synchronize the
The analysis of the trapezoidal frequency variation with different parameters provided
the insight to develop the smooth frequency variation technique. When the grid is
available the phase of the inverter output voltage is gradually adjusted according to the
phase relationship between the inverter output and the grid voltages until they match. If
the phase of the grid is greater than the inverter output, the system frequency is increased
and brought back to the rated utility frequency within the designated wait time (TG).
Otherwise, the frequency of the system is decreased and brought back to the rated utility
grid frequency within the designated wait time. The amount of frequency deviation ( )
| diff |
f (2.24)
2 TG
where diff is the phase difference between the inverter output voltage and the UG
voltage at the instant of grid availability. The system frequency is determined from the
f s 60 f m sin t (2.25)
40
The comparison of the different frequency variation techniques has been presented in
Fig. 2.15. The objective of the algorithm is to adjust the inverter phase to the utility
1.4
1.2
0.8
0 0.5 1 1.5 2
Variation of x (s)
Figure 2.15. THD and frequency deviation in the inverter output voltage during the
within the prescribed time with minimum frequency variation and minimum THD at the
inverter output voltage. The initial duration x is varied from 0 to TG/2 which sweeps the
frequency variation from the abrupt variation method to the triangular variation method.
In the simulation, the grid is considered to be turned off at 0.3 sec. and returned at
3.3 sec. The inverter voltage is leading the grid voltage by 127 (2.4 rad) at the time of
interruption, and the total adjustment time is prescribed as 4 sec to synchronize the phase
after the grid returns. As seen in Fig. 2. 15, the optimum value of x is in between 1 sec to
1.2 sec where the lowest THD and the frequency deviation are obtained. The smooth
frequency variation technique gives a THD of 0.88% for a frequency deviation of 1.099
Hz, which is better than all other values of x with the trapezoidal frequency variation
technique.
41
2. 5. Simulation Results
The operation of the 5 kW, 200 VDC, 120 V AC, 40 A, bi-directional single phase
2.5.1.1. Performance of the Current Controller Operating GC Inverter with Full Load
The 5 kW inverter, 120 V AC grid and the local load are connected together at the
supplied to the local load and rest of it is taken by the grid, as shown in Fig. 2.16. The
Current (A)
0 0
-200 -50
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Inverter Grid
100 20
Current (A)
Current (A)
0 0
-100 -20
0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time (s) Time (s)
Figure 2.16. Voltage at PCC, inverter current, load current and grid current in the GC
42
DC Bus
350
Voltage (V)
300
250
0.2 0.25 0.3 0.35 0.4 0.45 0.5
Inverter Input Power
8
Power (kW)
4
0.2 0.25 0.3 0.35 0.4 0.45 0.5
Inverter output Power
6
Power (kW)
2
0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time (s)
Figure 2.17. The DC bus voltage, inverter input and output power in GC mode.
Figure 2.17 shows the DC bus voltage, inverter input and output power of the
previous case. The DC bus has 3.3 mF capacitance at its terminal which allows
maintaining 300 V. The inverter provides 3.9 kW, 2.6 kW is taken by the local load and
1.3 kW is provided to the grid. The current controller gains are selected as 26 and 106
respectively. The inverter can also provide the reactive power depending on the d-axis or
q-axis command current. The d-axis command current regulates the real power and the q-
axis command current regulates the reactive power which is provided by the inverter.
43
2.5.1.2. Performance of the Current Controller with the Effect of Hardware Delay
Figure 2.18 shows the delay effect of the inverter output current. The inverter output
filter and the sensor system causes around 3.4 of delay. After considering Fig. 2.18.a
shows the inverter output current with 4 sample delay. The inverter currents become
worst considering 6 delay with same gains, as shown in Fig. 2.18.b. These suggested
that a new set of gains need to be selected using Eqn. 2.14 for getting the same output
10
C`urrent (A)
-10
-20
0.3 0.32 0.34 0.36 0.38 0.4
(a)
Time (s)
Inverter Output Current
20
10
Voltage (V)
-10
-20
0.3 0.32 0.34 0.36 0.38 0.4
Time (s)
(b)
Figure 2.18. The effect of hardware delay on the current control of the grid tied inverter.
44
2.5.1.3. Performance of the Current Controller with Abrupt Change in Current
Command
Figure 2.19 shows that the grid voltage at PCC, inverter current, load current, and
grid current. Initially the inverter delivers 10 A, and the grid delivers 25 A to the load. At
Voltage at PCC
200
100
Voltage (V)
-100
-200
0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7
Inverter current
40
20
Current (A)
-20
-40
0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7
Time (s)
Local load
40
20
Current (A)
-20
-40
0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7
Grid
40
20
Current (A)
-20
-40
0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7
Time (s)
Figure 2.19. Voltage at PCC, inverter, load and grid current when changes from 10
45
Inverter
3
Power (kW)
2
0
0 0.2 0.4 0.6 0.8 1
Time (s)
D-axis Inverter Current
40
Current (A)
20
-20
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
-5
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s)
Figure 2.20. Inverter output power, dq-axes command current of the inverter, when
Figure 2.20 shows the inverter output power, d-axis and q-axis current. The inverter
initially delivers 0.9 kW power to the system. After 0.5 sec it starts to push around 2.5
kW, as the id,ref current is changed from 10 A to 30 A. The load power remains constant
during the abrupt current change by the inverter. The grid will reduce its power flow to
the load as seen by the grid current in Fig. 2.20. There is a sudden change in the q axis
current but it gets to zero within 0.2 sec. It is suggested that gradual change of the
commanded current is better for the system. If the inverter d-axis commanded current
gets reduced from 10 A to 5 A then the grid current would be increased to sustain the
load requirements.
46
2.5.1.4. Performance of the Current Controller with Gradual Commanded Change
0.2 sec to 1.2 sec and the effect of the voltage at PCC, inverter current, load current and
grid current, are presented in Fig. 2.21. As the inverter increases its output power the grid
Voltage at PCC
200
100
Voltage (V)
-100
-200
0 0.5 1 1.5
Inverter
40
20
Current (A)
-20
-40
0 0.5 1 1.5
Time Load
Local (s)
40
20
Current (A)
-20
-40
0 0.5 1 1.5
Grid
30
20
Current (A)
-20
-30
0 0.5 1 1.5
Time (s)
Figure 2.21. The voltage at PCC, inverter current, load current and grid current, when
47
2.5.1.5. Performance of the Inverter in the Face of DC Voltage Fluctuations
Voltage (V)
190
180
100
-100
-200
0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3
Inverter
40
20
Current (A)
-20
-40
0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3
Time (s)
Inverter current (zoom)
20
Current (A)
-20
The variation in the DC bus voltage would be company the change in the duty ratio
. Figure 2.22 shows the performance of the current control when the DC voltage is
changed from 200 V to 180 V. It seems down to 190 V or 5% reduction of the DC bus
48
voltage of its actual value, the inverter power flow will not hamper. At 1.13 sec the DC
bus voltage becomes 180 V, then the inverter current peaks gets flatter, which introduces
a higher rate of harmonics in the inverter current, because of the insufficient DC voltage.
Local load
40
20
Current (A)
-20
-40
0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3
Grid
10
5
Current (A)
-5
-10
0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3
Time (s)
Figure 2.23. Local load current, grid current in GC mode during the DC voltage change
Figure 2. 24 shows the steady-state waveforms of the inverter output voltage and the
controller. The inverter current is 180 out of phase of the grid voltage which means the
inverter takes the power from the grid and charges the storage device.
49
Battery charging
200
iinv vg
100
V/I (units)
0
-100
-200
0.06 0.065 0.07 0.075 0.08 0.085 0.09 0.095 0.1
Time (s)
In the SA mode, the inverter runs in RMS voltage control mode [63]. Figure 2.25
shows the variation in the output power of the inverter according the load demands in SA
mode. The DC bus voltage is kept at 200V, the PWM switching frequency is 20 kHz, the
output inductor value is 1.5 mH, the output AC voltage is 120 V RMS and the
fundamental frequency is 60 Hz. During the time between 0 sec to 0.5 sec the resistive
load is kept at 5 , then from 0.5 sec to 0.7 sec the load is changed to 2.5 and from 0.7
DC BUS voltage
210
205
Voltage (V)
200
195
190
0.4 0.5 0.6 0.7 0.8 0.9 1
Inverter output power
5
Power (kW)
2
0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s)
Figure 2.25. DC bus voltage, various output power flow by the inverter depending on the
loads demand in SA mode.
50
2. 5. 3. Operation of the VSI in Transition Mode
The mode transition algorithm has been simulated based on a 5 kW, 200 V DC, and
120V AC single phase bidirectional inverter. Figure 2.26 shows the operation of the
inverter during the transition from the GC to the SA mode. The simulation starts with the
GC mode when the inverter regulates the output current and its phase is synchronized
with the grid thorough the PLL algorithm. The inverter delivers 5 kW power, 3 kW of
which is delivered to the grid and 2 kW is delivered to the local load. At 0.03 sec the grid
gets off, the inverter changes its mode from current control to voltage control and only
Current (A)
0 0
-500 -100
0.02 0.025 0.03 0.035 0.04 0.02 0.025 0.03 0.035 0.04
Time (s) Time (s)
Current (A)
0 0
-50 -50
0.02 0.025 0.03 0.035 0.04 0.02 0.025 0.03 0.035 0.04
Time (s) Time (s)
Figure 2.26. Inverter output voltage, grid current, inverter current and load current during
51
2.5.3.2. SA Mode to GC Mode Transition
When the grid becomes available during the SA mode of operation, the inverter gets
into the SA to GC transition mode. During this mode of operation, the inverter phase is
gradually adjusted to the grid phase within the prescribed time ( ). The inverter
regulates the local load voltage during the transition mode and connects at the voltage
zero crossing after the phase adjustment is completed. The PI based phase adjustment
technique has been presented in Fig. 2.27. The utility grid is recovered at 3.3 sec, with a
phase of 26.7 (0.466 radians) less than the inverter output voltage. In order to match the
phase of the inverter output voltage with the grid within 0.365 sec, the bandwidth of the
controller is adjusted with kpf and values of 25.27 and 12.35, respectively.
60
58
56
3.3 3.4 3.5 3.6
Time (s)
Inverter and grid voltage
200
Voltage (V)
100
-100
-200 Inverter
3.3 3.4 3.5 3.6
Time (s)
Figure 2.27. The inverter output voltage synchronization with grid voltage after the grid
52
In Fig. 2.28, the grid becomes available at 3.3 sec with a phase of 26.7 (0.466
radians) less than the inverter output voltage. The smooth frequency variation technique
gradually decreases the inverter operating frequency from 60 Hz to 58 Hz and then back
to 60 Hz. The phases of the UG and the inverter output voltage matches at 3.678 sec. The
inverter is connected to the grid at the zero crossing level of the inverter output voltage to
minimize the inrush current from the inverter to the utility grid.
59.5
59
58.5
58
3.3 3.35 3.4 3.45 3.5 3.55 3.6 3.65 3.7
Time (s)
Inverter voltage and grid voltage
200
Voltage (V)
Vgrid(return)
Vinv
-200
3.3 3.35 3.4 3.45 3.5 3.55 3.6 3.65 3.7
Time (s)
Figure 2.28. The Inverter voltage synchronization with grid voltage after the grid returns
Table 2.1 shows the comparison of the performance of the PI and the proposed
smooth frequency variation technique considering different power demands by the load.
As seen in these results, the smooth frequency variation phase adjustment technique
significantly reduces the THD of the inverter output voltage during the SA to GC
53
Table. 2.1: The THD of the grid current at different output power [59].
2. 6. Conclusion
In this chapter, the control techniques are presented for VSI to run in GC, SA and
transition modes. A smooth transition technique between SA and GC modes for VSI has
been developed and compared with the various techniques. The developed algorithm
varies the frequency smoothly to match the system phase voltage with the grid voltage at
the instant of reconnecting to the grid. The algorithm ensures that the transition is
accomplished at zero voltage, and it could achieve very low THD during the transition
period compared to the other transition techniques. First in GC mode the proper values of
the gains of the control algorithm has been derived and simulated considering the
mode the controller has been tested considering the previous factors. Third, in transition
mode the various control techniques and the proposed smooth frequency variation
technique have been implemented in the simulations and the THD levels of the output
voltage during the transition period are compared. The proposed algorithm shows low
THD of the voltage at the PCC considering different loading condition. The load power
54
CHAPTER III
3. 1. Introduction
This chapter proposes a smooth transition control strategy for parallel VSIs during
transition between SA and GC modes. Little research has been done on this topic.
Among those, a master-slave [59-61] with CAN based communication shows better
develop a technique that controls the transition the operation modes of VSIs to ensure the
stable and seamless transition without the need of additional hardware or communication
infrastructure. In this proposed method during both GC and SA modes of operations, the
VSIs use the droop control to regulate the power flow without the need of any external
communication between them. In the proposed method, one of the DGs working in the
utility grid and achieve smooth transition between the modes of operations. During
transition modes this selected unit takes the responsibility to ensure the continuous power
delivery to the load. During GC to SA mode, the dispatch unit compensates for the
current that is supplied to/for the grid before the grid disconnection and then gradually,
decreases its power flow such that other units regulate their power flow gradually through
their individual droop controllers. The dispatch unit adjusts its output power flow to the
55
system to synchronize the voltage of the PCC, as shown in Fig. 3.1, with the grid voltage
during the transition from SA to GC mode. The method is expected to have very low or
no disturbance in voltage and current during transition. The other VSIs in the microgrid
do not require any communication between them or with the dispatch unit. There should
have a smart switch that connects or disconnects the grid from the PCC, as shown in
Fig. 3.1. The inverter closer to the switch can be selected as a dispatch unit as it has easy
access to the switch. The dispatch unit can also provide the commanded current during
This chapter is divided into five sections. First, the architectural diagram of the
microgrid system is explained. Second, the proposed transition control strategy has been
discussed for parallel VSIs. Third, the small signal modeling is derived to verify the
stability of the overall microgrid system. Forth, the simulation results are given
considering the various operating conditions. Then the conclusion of the analysis of the
chapter is provided.
A typical power system consists of parallel DG units, storage systems, and a cluster
of loads within a local area [14]-[17]. Figure 3.1 shows a typical microgrid system where
two DGs always run with the droop control method [102] and an additional DG referred
to as the dispatch unit has been placed near the PCC to observe the grid voltage and
assure necessary power flow to the system during mode transitions. If the grid is not
available, then the smart switch disconnects the grid from the system through the
dispatch unit command. After the transition, DGs in the microgrid operate in droop
control mode and the dispatch unit operates in the current control mode to share the
56
required power for the local loads. When the grid returns, the dispatch unit, starts
regulating the power to the microgrid system in such a way that the system voltage
synchronizes with the grid voltage. The dispatch unit could be also selected from one of
VSIs in the microgrid system but selecting one of the storage units would provide more
reliability in the microgrid system. Normally the dispatch unit slowly regulates the power
during the transition period, so that the other DGs get enough time to share the required
power and the system would remain stable. The proposed algorithm does not require any
communication between the individual units in the microgrid system. The only
vg
Current Control
Grid Synchronization
Vdc Z3
idispatch
PCC SW
ZZg2
P1, Q1 Vs1, 1 P l, Q l P2, Q2 Vs2, 2 grid
connection
Z1 Droop Z2 Droop vg
Control Control
Local
Loads
Vdc Vdc
57
3. 3. Control Strategy for VSIs using Dispatch Unit in Transition Mode
The microgrid system includes DGs and distributed loads, which are connected to the
grid through a bypass switch. During SA operation, the DG inverters in the microgrid
system regulate their output power using droop control depending on the loading
conditions, where the frequency in the microgrid system is set by the droop equations. To
make the transition from SA to GC, the dispatch unit adjusts its output power in such a
way that the frequency and phase of the voltage of the microgrid system matches with the
grid frequency and phase before making the connection to the grid. To make the
transition from GC to SA, the dispatch unit always monitors the grid current fed to the
microgrid system. When the grid gets is unavailable, the dispatch unit sends a command
to open the switch to disconnect the grid and provides the necessary current to prevent
any disturbance in the power flow of the microgrid system. The dispatch unit then
changes its output power gradually to allow other DGs to adjust to a new condition. In
(3.1)
At the steady state, , for two inverters, where fs is the microgrid system
frequency. The power delivered by the two inverters is equal to the load power,
P1+P2=PLoad (3.2)
When the grid returns, the system frequency, , need to be equal to the grid frequency,
. To make the frequency synchronization, the output powers of the two inverters are
changed to control the system frequency. In order to provide constant power to the loads,
the dispatch unit would act to compensate for the balance of the power requirement as:
58
During GC to SA mode transition, amount of current needed to be provided or taken
by the dispatch unit can be determined through the closed loop controller as:
(3.4)
where and are the phases of the grid and the microgrid system respectively. Here,
the dispatch unit runs in the current control mode the other inverters run in the voltage
control mode with the droop control method. After the phase and the frequency match the
inverters in the microgrid system, continue to run in this configuration. and are
determined through PLL algorithms operating based on the measured grid voltage and
vg g
PLL idisp
+
PI
-
PLL
v g g
Figure 3.2. Block diagram of the dispatch unit current controller from SA to GC.
As the dispatch unit starts pushing power in the current control mode, the output
powers of the other two inverters decrease gradually as the local load remains same.
During the phase and the frequency synchronization, the inverters of the microgrid
system should be run in droop control. At zero crossing, the switch is closed to make grid
connection then the dispatch unit gradually reduces its output power. Figure 3.3 shows
the state diagram of the control strategy of the parallel inverters operating in SA, GC and
59
Vd,Vq & f
out of range
GC SA
Figure 3.3. State diagram of the operating mode transitions in a microgrid system.
In our proposed microgrid system inverters in the microgrid always run in droop
control in all modes of operation and the dispatch unit always runs in current control
mode to provide the necessary power to the system. To get better understanding of the
system the control methods of the VSIs are presented in detail in the following sections.
In [103], the control strategy for a flexible microgrid is presented using the droop
control method. With the aim of connecting several parallel inverters without control
intercommunications, the droop method is often proposed [104]. Thus by their control
technique a flexible microgrid can be obtained where the VSIs can operate in either GC
or SA mode using droop control. The conventional droop method is based on the
principle that the phase and the amplitude of the inverter can be used to control active and
60
reactive-power flows [74]. Hence, the conventional droop method for the nth source in a
(3.4)
(3.5)
where and are the output and reference voltages, respectively. and are the
real and reactive powers of the individual sources in the microgrid respectively, ,
are the actual and reference frequency, respectively, and , are the droop
(3.6)
(3.7)
where is the maximum output, is the active power output when DG network
working under the nominal frequency, is the nominal angular frequency of the grid,
is the allowable minimum frequency when the DGs output maximum power,
is the maximun reactive power output when the voltage at the DG drop to allowable
minimum value. The real power and reactive power of the nth inverter are calculated by
(3.8)
(3.9)
where , are the dq axes output voltage of the nth inverter, , are the dq axes
Figure 3.4 shows the block diagram of the droop control where the voltage at PCC
and the inverter output current have been measured by the sensors. The values in the abc
reference frame has been converted into the dq reference frame. Using Eqn. 3.8 and 3.9
61
the active and reactive power are calculated and processed through a low pass filter. The
reference applied voltage, , can be calculated by Eqn. 3.4 and 3.5, to pass it into
the PWM generation block. This droop method increases the system performance due to
the autonomous operation among the modules. This way, the amplitude and frequency
mechanism that uses both the active and reactive local power from each unit [59], [80]. In
order to obtain good power sharing, the frequency and amplitude output voltage must be
vd
vpcc
c pflt cmd 1
PLL vq vdid+vqiq p ref -kpnpflt
s c s
cmd
id
iinv abc-dq q c qflt vcmd
iq vdiq-vqid Vref -kdnqflt X
Transform s c v-cmd
Figure 3.4. The block diagram of the droop control.
f (Hz) f (Hz)
Total Demand = P1+P2+Pg
Kp1
Total Demand = P1+P2 Kp1
Kp2 Kp2
Load changing
fop fg
Frequency
changing Load Change
Pg will change
P2 P1 P (kW) P2 P1 P (kW)
Standalone Grid Connected
Figure 3.5. Linear droop based control for SA and GC mode.
Figure 3. 5 shows the droop setting in active power and frequency characteristic in
62
generator power sharing (P1, P2) and system operating frequency, , can be achieved
with a range of combinations of droop characteristics. The settings also determine how
the droop operating point moves in response to external influences such as load changes,
as shown in Fig. 3. 5. In GC mode, two inverters should follow the grid frequency as
their reference frequency and to inject desired active and reactive power to the grid. If the
load changes, then the rest of the power should be balanced with the grid. There have
been several droop control techniques like nonlinear droop control, dynamic frequency
droop [104], adaptive droop control [105] etc. which can also be implemented to regulate
the power flow of the VSIs in GC mode. In this chapter, the main discussion is related to
the smooth transition between SA and GC modes for parallel VSIs in microgrid system.
So in both GC and SA modes we use the droop control technique for the VSIs. The
current controller of the dispatch unit has been explained in Section 2.4.2.
3. 4. Modeling and Stability Analysis of the Microgrid System using Dispatch Unit
The microgrid system has to be modeled in the SA mode, GC mode and the transition
modes to determine the stability of the system. Each VSI will have an outer power loop
based on droop control to share the fundamental real and reactive powers with other DGs.
Inverter internal controls include droop based voltage controllers which are designed to
reject high frequency disturbances and damp the output filter to avoid any resonance with
the external network. The small-signal state space model of an individual inverter is
synchronous reference frame whose rotation frequency is set by the power controller of
that inverter. An arbitrary choice is made to select one inverter frame as the common
reference frame and all other inverters are translated to this common reference frame
63
using Park transformations. For the dispatch unit the current controller, output L filter
and coupling inductor have been used to derive the model. Once the small-signal model
has been formed, eigen values (or modes) can be identified and analysis of the system
stability yeilds proper values of the system parameters. The analytical nature of this
examination then allows further investigation so that the relation between system stability
and system parameters, such as the gains of controllers, sizing of the inductor, and load
The overall model needs to be verified in all modes. For simplification they are
Most of the renewable energy sources are interfaced with the power system (whether
grid, DG system or SA) through DC/AC inverter whose input is in DC form. In most of
the existing research work, the DC bus at the input of the inverters is assumed to be stiff
and therefore its dynamics are usually ignored [103]. This simplifies the analysis of the
microgrid system since only AC circuits are needed to be modeled. With the realization
of high switching frequencies (410 kHz), the switching process of the inverter may also
be neglected [103]. An external power control of the inverter, which sets the magnitude
and frequency (and hence phase) for the fundamental component of the inverter output
voltage according to the droop characteristics, set the real and reactive powers [104]. In
this section, a state-space model is presented for all the subsystems: control loops, output
64
filter and coupling inductor. The model is constructed in a rotational reference frame set
by the external power controller of the particular individual inverter. The output voltage
(3.10)
where , and are the DC bus voltage, modulation index and the phase
respectively for the kth inverter. A convenient way to analyze AC circuits is to transform
all the voltages and currents into the dq rotating reference frame. In this way, the AC
circuit can be modeled as two coupled equivalent DC circuits one for the d axis state
variables and the other contains the dynamics of the q axis variables. To perform the
transformation, a common reference signal is needed. Let the global reference of the DG
hypothetical one [102]. The reference is considered to coincide with the d axis so it has
no q axis component. All currents and voltages in the microgrid can be transformed to dq
Lkiqk Lkidk
Lk Lk
Then, the d and q axis components of the inverter voltages can be represented as:
(3.11)
(3.12)
65
ids1 L1Iqs1 L2Iqs2 ids2
+ +
L1 L2
Vds1 RL ir Vds2
Figure 3.7. d axis model for a DG system where two inverters run in SA mode providing
Figure 3.7 shows a system consisting of two parallel inverters islanded from the grid
operating with the droop control providing power to the load. The power processing
section consists of an inverter, an output filter and coupling inductor. In Parks dq frame
that rotates synchronously with the inverter output voltage angular speed , the current
(3.13)
(3.14)
(3.15)
(3.16)
where , are the output inductor of the inverters, and are dq axes output
voltage of the inverters, and are dq axes inductor current of the kth inverter, R is
66
For the first inverter, the dq axis output voltage equations are
(3.17)
(3.18)
difference between the inverter voltage and the reference voltage, is the reference
active and reactive power components of the inverter 1, and , are given by
(3.19)
(3.20)
where is the filter cut off frequency. The phase difference between inverter 1 with
reference frame is
(3.21)
(3.22)
(3.23)
(3.24)
(3.25)
(3.26)
67
where is the DC bus voltage, is the phase difference between the voltage of the
inverter 2, and and are the active and reactive power components of the inverter
(3.28)
(3.29)
(3.30)
(3.31)
(3.32)
(3.33)
68
Considering the Eqn. 3.28, 3.29 and Eqn. 3.33, we get
(3.34)
From Eqn. 3.28 3.34, , , , and are the steady state value.
1 1 1 , 1 (3.35)
1 1 1 (3.36)
(3.37)
(3.38)
(3.39)
(3.40)
(3.41)
(3.42)
69
(3.43)
2 2 2 , 2 (3.44)
2 2 2 (3.45)
combining the state-space models of the power controller; output L filter, loop equations
in SA mode. There are a total of 10 states. The overall linearized model of a microgrid
(3.46)
analyzing the eigen values of the system matrix we can easily identify the stability of the
system.
A=[a1 a2 a3 a4 a5 a6 a7 a8 a9 a10;
b1 b2 b3 b4 b5 b6 b7 b8 b9 b10;
c1 c2 c3 c4 c5 c6 c7 c8 c9 c10;
d1 d2 d3 d4 d5 d6 d7 d8 d9 d10;
e1 e2 e3 e4 e5 e6 e7 e8 e9 e10;
f1 f2 f3 f4 f5 f6 f7 f8 f9 f10;
70
g1 g2 g3 g4 g5 g6 g7 g8 g9 g10;
h1 h2 h3 h4 h5 h6 h7 h8 h9 h10;
i1 i2 i3 i4 i5 i6 i7 i8 i9 i10;
j1 j2 j3 j4 j5 j6 j7 j8 j9 j10;]
where
a1= -R/L1;
a2= -;
a3= -R/L1;
a4= a5= 0;
a6= -(1/L1)kp1cos(s1);
a7= -(1/L1)sin(s1)(Vref-kp1qs1);
b1= ;
b2= -R/L1;
b3= 0;
b4= -R/L1;
b5= 0;
b6= -(1/L1)kp1sin(s1);
b7= -(1/L1)cos(s1)(Vref-kp1qs1);
b8= 0;
b9= 0;
b10= 0;
c1= -R/L2;
c2= 0;
71
c3= -R/L2;
c4= -;
c9= -(1/L2)kp2cos(s2);
c10= -(1/L2)sin(s2)(Vref-kp2qs2);
d1= 0;
d2= -R/L2;
d3= ;
d4= -R/L2;
d5= 0;
d6= 0;
d7= 0;
d8= 0;
d9= -(1/L2)kp2sin(s2);
d10= -(1/L2)cos(s2)(Vref-kp2qs2);
e1= Vds1;
e2= Vqs1;
e3= 0;
e4= 0;
e5= - ;
e6= (-kp2sin(s1)Iqs1+Ids1(-kp2)cos(s1));
e7= (cos(s1)Iqs1(Vref-kp2qs1)-Ids1sin(s1)(Vref-kp2qs1));
e8= 0;
72
e9= 0;
e10= 0;
f1= Vqs1;
f2= - Vds1;
f6= (-kp2cos(s1)Iqs1-Ids1(-kp2)sin(s1)-1);
f7= (-sin(s1)Iqs1(Vref-kp2qs1)+Ids1cos(s1)(Vref-kp2qs1));
f8= 0;
f9= 0;
f10= 0;
g1= 0;
g2= g3= 0;
g4= 0;
g5= -kq1;
g10= 0;
h1= 0;
h2= 0;
h3= Vds2;
h4= Vqs2;
h5= h6= 0;
h7= 0;
h8= - ;
73
h9= (-kp2sin(s2)Iqs2+Ids2(-kp2)cos(s2));
h10= (cos(s2)Iqs2(Vref-kp1qs2)-Ids2sin(s2)(Vref-kp2qs2));
i1= 0;
i2= 0;
i3= Vqs2;
i4= - Vds1;
i5= 0;
i6= 0;
i7= 0;
i8= 0;
i9= (-kp2cos(s2)Iqs2-Ids2(-kp2)sin(s2)-1);
i10= (-sin(s2)Iqs2(Vref-kp2qs2)-Ids2cos(s2)(Vref-kp2qs2));
j8= -kq2;
j9= 0;
j10= 0;
R = 5 ; L1 = 2 mH; L2 = 2 mH; kp1= kp2 = 510-4 rad/W; kq1= kq2 = 210-4 rad/VAR;
= 37.7 rad.
The same microgrid system with two VSIs and a local load has been simulated for SA
74
Vref = 170.5 V; Qs1 =10 VAR; Qs2 = 10 VAR; Ids1 = Ids2=17 A; Iqs1 = -0.5 A; Iqs2 = -0.4 A;
-2.500080931039247 + 0.377516480142714i;
-2.500080931039247 - 0.377516480142714i;
-0.003345821662923 + 0.376321580767225i;
-0.0033458210911 - 0.376321580767225i;
-0.000108355757224 + 0.000000000000000i;
-0.010714166318; -0.027063022459247;
-0.030917281281184;
-0.037557775316704 + 0.001331783i;
-0.037557775316704 - 0.001331783459955i]
Figure 3.8 indicates that the eigen values of the microgrid system have a wide range
between different control loops. The low-frequency modes are dictated mainly by the
power sharing of droop coefficients of the controllers and the power filters, which are
designed with low bandwidth (around 210 Hz). The medium-frequency modes are
mainly dictated by the gain of the current control, which are designed with medium
bandwidths (400600 Hz). The high frequency modes are dictated by the L filters and the
inverter output currents, which should be designed with high resonance frequencies (in
the range of 1.5 kHz). By varying the value of the droop coefficients and inductors in the
system matrix and observing the propagation of the eigen values, we can properly
75
400
300
-100
-200
-300
-400
-6000 -5000 -4000 -3000 -2000 -1000 0
By analyzing the eigen values of the system matrix it is possible to determine the
system stability [105]. If the droop coefficients of one of the DGs are varied from 110-4
rad/W to 110-3rad/W, then one of the eigen values related to the droop coefficient will be
propagating from the left half s-plane to the right half s-plane which makes the system
unstable. Figure 3.9 shows the effect of the droop coefficient variation in the microgrid
system. In the system matrix model the droop coefficient of one of the inverter is varied
0
1e-4<kp2<1.2e-3 (system stable)
-1
-2
kp2 increases
-3
Figure 3.9. Stability analysis of the microgrid in face of varying droop coefficients.
76
Variation of droop coefficient
0.015
0.01
Kp1
0.005
0
0.4 0.45 0.5 0.55 0.6
Inverter 1
5
Power (kW)
0
-5
-10
-15
0.4 0.45 0.5 0.55 0.6
Inverter
Time (s)1
50
Current (A)
-50
0.4 0.45 0.5 0.55 0.6
Inverter 2
50
Current (A)
-50
0.4 0.45 0.5 0.55 0.6
Voltage at PCC
200
Voltage (V)
-200
0.4 0.45 0.5 0.55 0.6
Time (s)
Figure 3.10. The effect of the variation of droop coefficient of the microgrid system.
It seems that at 1.510-3 rad/W of the droop coefficient, the system goes unstable.
Figure 3.10 shows the effect of the variation of the droop coefficients of the microgrid
system where two DGs operate in SA mode. At 0.5 sec one of the inverter droop
coefficients change from 510-4 rad/W to 210-3 rad/W. As soon as the droop coefficients
are changed the system goes unstable, this is consistent with the prediction of the small
77
signal model. When one of the inverters gets unstable then the total microgrid system will
The value of the load has been changed from 5 to 2.5 in the system matrix
model and the propagation of the eigen values in the complex plane is observed. It is
observed that load changes do not have significant impact on the Eigen values to make
the system unstable. Figure 3.11 shows the variation of the load change while other
parameters remain same. The load resistor is changed from 5 to 2.5 at 0.5 sec in the
microgrid system. The system stays stable in the face of load changes as predicted from
stability analysis.
10
6
0.4 0.45 0.5 0.55 0.6
Unit 1
50
Current (A)
-50
0.4 0.45 0.5 0.55 0.6
Time
Unit (s)
2
50
Current (A)
-50
0.4 0.45 0.5 0.55 0.6
Voltage at PCC
200
Voltage (V)
-200
0.4 0.45 0.5 0.55 0.6
Time (s)
Figure 3.11. The variation of the local load in a microgrid system.
78
System Frequency
65
Frequency (Hz)
60
55
50
45
0.4 0.45 0.5 0.55 0.6 0.65
Time (s)
Figure 3.12. System frequency of a microgrid system.
Figure 3.12 shows the system frequency of the microgrid system. According to Eqn.
3.1, the system frequency is 59.4 Hz before 0.5 sec. At 0.5 sec there is a load change
causing the system frequency to drop down to 49 Hz but it settles stable at 57.8 Hz within
0.17 sec. Through the simulation we can conclude that abrupt load change doesnt make
the overall microgrid system unstable as long as the DGs can provide the power.
The DGs are connected through the L filter in the microgrid system [106]. For DG
interfaced sources, L type filters are very useful for decoupling real and reactive power
controls [105]. In the system matrix, the value of the inductor is varied and the eigen
value starts propagating from left half s-plane to right half s-plane. If the inductor value is
more than 0.5 mH then the system remains stable, as shown in Fig. 3.14. Otherwise,
reactive power flow increases in the system significantly, which makes the system
unbalanced. Figure 3.14 shows the effect of the output inductor value on the inverter
output voltage. In this simulation we consider the values as: R (Load) = 2.5 ; L1 = 2
mH; L2 = 2 mH; droop coefficients, kq1 = 210-4rad/VAR; kp1 = 6.2810-4 rad/W; kp2 =
6.2810-4 rad/W; kq1 = 210-4 rad/VAR; = 37.7 rad. If the inductor value of inverter 1 is
79
less than 0.5 mH then the voltage at the PCC gets distorted and the controller fails to
operate properly. The model perfectly agrees with the simulation results.
Inductor sizing for Inverters
0.05
axis -0.05
-0.1
-0.15
0.5 1 1.5 2
Inductor (mH)
Figure 3.13. The model predicts the critical value of the inductor.
Unit 1
50
Current (A)
-50
0.2 0.22 0.24 0.26 0.28 0.3
Voltage at PCC
200
Voltage (V)
-200
0.2 0.22 0.24 0.26 0.28 0.3
(a) (s)
Time
Voltage at PCC
200
Voltage (V)
-200
0.2 0.22 0.24 0.26 0.28 0.3
Unit 1
100
Power (kW)
90
80
70
0.2 0.22 0.24 0.26 0.28 0.3
Time (s)
(b)
Figure 3.14. (a) Inverter or unit 1 current, voltage at PCC in microgrid system when
L = 2 mH. (b) unit 1 power, voltage at PCC in microgrid system when L = 0.5 mH.
80
3. 4. 2. VSIs Operating in Transition Mode using Dispatch Unit
Figure 3.15 shows the microgrid system in transition mode where two inverters run in
droop control mode and one inverter, the dispatch unit, operates in current control mode.
With the help of the small signal model a system matrix has been developed to evaluate
the stability of the system by observing the eigen values of the system [105].
L3Iqdisp icc
+
L3
VDs1 RL VDs2
ir
(3.47)
(3.48)
(3.49)
(3.50)
(3.51)
(3.52)
81
The output voltage of the k-th inverter in the microgrid system can be represented as:
(3.53)
For the first inverter, the dq axis output voltage equations are
(3.54)
(3.55)
difference between the inverter voltage and the grid voltage. The injected instantaneous
active and reactive power components of the first inverter, and , are given by
(3.56)
(3.57)
where is the filter cut off frequency and is the angular speed of the inverter 1.
(3.58)
(3.59)
(3.60)
(3.61)
(3.62)
(3.63)
82
(3.64)
A current controller is needed to shape the voltage across the filter inductor, so that
minimum current error is yielded. A standard PI current regulator with decoupling and
feed forward control loops is adopted for current regulation. The dynamics of the current
(3.65)
(3.66)
(3.67)
(3.68)
0 (3.69)
where and are the gains of the PI controller, and are the reference
In the above equations the following parameters have the constant value. For the DGs
Some of the above equations are nonlinear expressions. To make an average model,
we need to make the nonlinear expression in the linear from. Perturbations on the output
(3.70)
(3.71)
(3.72)
83
(3.73)
(3.74)
where is the phase difference between inverter 1 and dispatch unit. Through the
(3.75)
(3.76)
(3.77)
(3.78)
(3.79)
(3.80)
1 1 1 , 1
(3.81)
(3.83)
84
Similarly from Eqn. 3.60 3.64, we get,
(3.84)
(3.85)
(3.86)
(3.87)
(3.88)
(3.89)
(3.90)
2 2 2 , 2
(3.91)
(3.92)
(3.93)
(3.94)
85
A complete state-space small-signal model of the inverter can be obtained by
combining the state-space models of the power controller; voltage controller and output L
filter in SA mode. The overall linearized model of a microgrid system can be given in the
standard form of
(3.95)
where X= . is the
system matrix.
R = 2.5 ; L1 = 2 mH; L2 = 2 mH; kp1= kp2 = 510-4 rad/W; kq1= kq2 = 210-4rad/VAR;
= 37.7 rad;
From the simulation, the steady state values are: s1 = 0 rad; s2 = 1.9e-3 rad ; Vds1= Vds2 =
170 V; Vqs1=Vqs2=0.1 V; Vref = 170.5 V; Qs1=10 VAR ; Qs2 =10 VAR; Ids1 = 17 A;
-1.647214242857336 - 0.037703494486807i;
-0.227625741658115 + 0.037737996377027i;
-0.227625741658115 - 0.037737996377027i;
-0.000207447092011 + 0.037642240059410i;
-0.000207447092011 - 0.037642240059410i;
-0.003755658347634 + 0.000112607015507i;
-0.003755658347634 - 0.000112607015507i;
-0.003346443984209; -0.002706666300441;
86
-0.00107111683564; -0.000012382353458;
-0.000172871414983; -0.000162581816971;
-0.0023755658347634 ]
Observing the eigen values of the system state matrix, the overall system stability can be
investigated in transition modes. As the eigen values are in the left half s-plane, we can
conclude that the overall system is stable during the transition mode.
System Eigen values
400
300
200
All 14 eigen values are in the Left hand side.
System is stable
Imaginary Axis
100
-100
-200
-300
-400
-18000 -16000 -14000 -12000 -10000 -8000 -6000 -4000 -2000 0
Real axis
-200
-400
-40 -35 -30 -25 -20 -15 -10 -5 0
Real axis
Figure 3.17. Eigen values in the microgrid system in low and medium frequency range.
Effects of the gains of the current controller of the dispatch unit in the microgrid are
not significant. It seems that the poles of the current controller of the dispatch unit are in
the high frequency range. So the gain variation has small effect in the stability of the
87
Unit 1
50
Current (A)
0
-50
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 2
50
Current (A)
-50
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Current controller gain
30
kp (unit)
25
20
15
0 0.1 0.2 0.3 0.4 0.5 0.6
Dispatch Unit
20
Current (A)
-20
0 0.1 0.2 0.3 0.4 0.5 0.6
Local Load
100
Current (A)
-100
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 3.18. Simulation results of a microgrid system where two DGs run in droop
88
microgrid. In the transition mode, two DGs operate with droop control and the dispatch
unit operates in the current control mode. Both in the model and the simulation we vary
the gains of the current controller. The value of kp is changed from 26 to 20 and ki is
changed from 106 to 90, where the other parameters remain same.
3.4.2.2. Effect of the Droop Coefficients on the Performance of a Droop Based VSIs
If we vary the droop coefficients of the inverter during transition and observe the
propagation of the eigen values of the microgrid system, we can easily identify the
system stability. Figure 3.19 shows the effect of the droop coefficient variation in the
microgrid system during transition. The system remains stable when the value of droop
coefficient is 2.510-4 rad/W, as the eigen values are in the left hand plane. The droop
coefficient of one of the inverter is varied from 110-4 rad/W to 410-3 rad/W considering
other parameters, like local load, the gain of the current controller remains same.
Changing the droop coefficient values from 110-4 rad/W to 410-3 rad/W the system
becomes unstable as shown in Fig. 3.20. The model properly agrees with the simulation
results.
0.2
Unstable Region
0.1
Real axis
-0.1
Stable region
-0.2
-0.3
89
Variation of droop coefficient
0.015
0.01
kp1
0.005
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 1
100
Current (A)
-100
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 2
100
Current (A)
-100
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)Unit
Dispatch
20
Current (A)
-20
0 0.1 0.2 0.3 0.4 0.5 0.6
Local Load
100
Current (A)
-100
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 3.20. Inverter currents, dispatch unit and the load current during transition.
In the simulation, two DGs run in droop control and one dispatch unit runs in current
control mode during transition mode. The droop coefficient of unit1 has been changed at
0.5 sec, which brings the unit 1 in unstable condition. As other VSIs also connected in
parallel to it, the whole microgrid becomes unstable, as shown in Fig. 3.20.
90
3. 4. 3. GC Mode of Operation of the VSIs with Dispatch Unit
Figure 3.21 shows a block diagram of a microgrid system where Vs1 and Vs2 are the
voltages of two VSIs, Vcc is the output voltage of the dispatch unit, Vg is the grid and R is
the load. Inductors are worked as L output filter. The model is used to derive the small
In Parks dq frame that rotates synchronously with the inverter output voltage angular
speed , the current and voltage dynamics can be reasonably represented by the
following equations.
(3.96)
(3.97)
(3.98)
(3.99)
91
For the grid
(3.100)
(3.101)
(3.102)
(3.103)
For the first inverter, the dq axis output voltage equations are
(3.104)
where
(3.105)
and is the DC bus voltage, is the phase difference between the inverter voltage
and the grid voltage. The injected instantaneous active and reactive power components of
(3.106)
(3.107)
92
and where . And the angular frequency of the grid, , is
considered as a reference.
(3.108)
(3.109)
(3.110)
(3.111)
(3.112)
(3.113)
For Grid
(3.114)
(3.115)
where is the peak amplitude of the grid voltage. From the dq current controller of the
(3.116)
(3.117)
(3.118)
(3.119)
(3.120)
where and are the gains of the PI controller, and are the reference
values of the d-axis and the q-axis currents, is the phase difference between the
93
For the inverters operating with the droop control mode: , , ,
unit.To make the average model we need to linearize these equations like we did for the
other modes of operations. Taking the perturbations of the output voltage of the current
(3.121)
(3.122)
(3.123)
(3.124)
(3.125)
(3.126)
(3.127)
(3.128)
(3.129)
(3.130)
94
Similarly from Eqn. 3.109-3.113, we get,
(3.131)
(3.132)
(3.133)
(3.134)
(3.135)
combining the state-space models of the power controller; voltage controller and output L
(3.136)
where
X= .
95
The microgrid system where two DGs, one dispatch unit, and a grid, feed the power to
Vqs2 = 0 V; Vref = 170.5 V; =377 rad; kp = 26; ki = 106. Steady state values from the
Eigen values of the overall microgrid in GC mode are = 104*[ -0.0233 + 3.4081i; -
Eigen values of the system for these conditions are presented in Fig. 3.22. The eigen
values are in the left half s-plane assuming the stability of the system.
96
4
x 10 Poles of the system
4
-2
-4
-12000 -10000 -8000 -6000 -4000 -2000 0
Figure 3.23 shows the eigen values of the system. As kp1 and kp2 are increased, the
system poles move towards unstable region making the system more oscillatory and
2
Kp increases
1
-1
-2
-3
-4
-12000 -10000 -8000 -6000 -4000 -2000 0 2000
Figure 3.23. Propagation of the eigen values of the microgrid system when the droop
97
3. 5. Simulation Results
The model and control algorithm of the laboratory scale microgrid system is developed
seamless transition control strategy. In the simulations, two DG units, which are
controlled by the droop control method, local loads and the dispatch unit, are connected
in parallel at the point of common coupling (PCC). The grid is also connected to the PCC
through the switch. Simulation results have been presented for all modes of operations.
Two VSIs run in SA mode using droop based control, shown in Fig. 3.24. The
inverters share the amount of power according to their droop coefficients for the local
load. Depending on the local load demand unit 1 and unit 2 provide 35 A peak AC output
current at 120 V (RMS) individually, based on their droop coefficients. Figure 3.24 also
shows the voltage at PCC and load current of a microgrid system. The system parameters
that we consider for simulating the SA mode are given in Table 3.2.
0.15 60 Hz
170 V 60.1 Hz
98
Unit 1
40
20
Current (A)
0
-20
-40
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Unit 2
40
20
Current (A)
-20
-40
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time (s)
Voltage at PCC
200
100
Voltgae (V)
-100
-200
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Local Loads
100
50
Current (A)
-50
-100
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time (s)
Figure 3.24. The inverters current, voltage at PCC and load current in SA mode.
Figure 3.25 shows the microgrid system frequency in SA mode. The system frequency
is varied by the droop frequency provided in Eqn. 3.1. If the value of droop coefficients
decreases the rate of the change of the system frequency will be lower with load changes.
99
System frequency
65
Frequency (Hz)
60
55
50
0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time (s)
0
0 0.1 0.2 0.3 0.4 0.5
Unit 1
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5
Unit 2
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5
Time (s)
Figure 3.26. Power flow for the VSIs and the local load in a microgrid system.
Figure 3.27 shows the effect of load variation for the DGs operating in SA mode of
operation. At 0.25 sec the local load changes from 10 to 5 , then at 0.5 sec it changes
to 2.5 . Depending on the load demands the units start giving more power according to
100
Unit 1
40
Current (A)
20
-20
-40
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 2
40
20
Current (A)
-20
-40
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Voltage at PCC
200
Voltage (V)
-200
50
-50
-100
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 3.27. The effect of load variations of inverters currents, voltage at PCC and
load current.
their droop coefficients. Fig. 3.28 shows the system frequency variation. Before 0.25
sec the system frequency is 59.55 Hz, after that it reaches to 58 Hz with the increase
in the load, and after 0.5 sec it reduces to 56.1 Hz. One observation we can make is
101
that if the loads gradually change, then the system frequency also gradually changes
System Frequency
65
Frequency (Hz)
60
55
50
45
0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 3.28. The frequency of the microgrid system.
Local Loads
10
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 1
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 2
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 3.29. Power flow for the inverters and the local load in a microgrid system.
Figure 3.29 shows the variation of the power flow of the VSIs depending on the load
demands. Before 0.25 sec the load takes 2.2 kW power, then the load changes to 3.3 kW,
102
after 0.5 sec the load demand goes to 6.1 kW. The unit 1 and unit 2 deliver the required
In the GC mode, unit 1 and unit 2 also run in the droop control [112] as before. All
the inverters in the system should follow the grid frequency. According to the droop Eqn.
3.1, unit 1 and unit 2 should deliver the power to the system. If we want to change the
power flow of the two units we need to change the slope of the droop equation [112].
Figure 3.30 shows the currents of two DGs, grid and the load of a microgrid system. Unit
1 and unit 2 deliver 17.5 A (peak) current at 120V (RMS) individually. But the load
requires 45 A current. So the rest of the power comes from the grid. The parameters of
0.15 60 Hz
170 V 60.1 Hz
6.2810-4 rad/W 26
Figure 3.31 shows the effect of the variation of the demands of the local load. From
2.4 sec to 2.8 sec the local load demands gradually increases from 45 A (peak) to 78 A
103
(peak) at 120 V (RMS). Unit 1 and unit 2 deliver the same amount of power as the
system. frequency remains same. The grid then supplies the rest of the required power to
the loads.
Unit 1
20
10
Current (A)
-10
-20
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Unit 2
20
10
Current (A)
-10
-20
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Time (s)
Grid
10
5
Current (A)
-5
-10
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Local Load
50
Current (A)
-50
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Time (s)
Figure 3.30. Inverters currents, grid current and load current in GC mode.
104
Unit 1
20
10
Current (A)
0
-10
-20
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Unit 2
20
10
Current (A)
-10
-20
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Time (s)
Grid
20
10
Current (A)
-10
-20
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Local Load
100
50
Current (A)
-50
-100
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Time (s)
Figure 3.31. The effect of load variations of the inverters currents, grid current, load
current in GC mode.
105
3. 5. 3. Transition Mode of Operation for the VSIs using Dispatch Unit Technique
The simulation starts with a microgrid system where two VSIs run in droop control in
parallel with grid and processing the power to the load in GC mode considering the
dispatch unit remains in an idle condition. At 0.395 sec the grid become unavailable, the
and of the PLL of the dispatch unit goes out of range and the dispatch unit identifies
that there is a fault in the grid and sends the command signal to the switch to disconnect
the grid. At that instant the dispatch unit pushes the required power, as it always monitors
the grid current, so that the load power remains constant. Then the dispatch unit gradually
decreases its output power and at 1 sec the other two inverters share the total load power
depending on their droop coefficients. Figures 3.32 and 3.33 show the inverters currents,
dispatch unit current, the grid current, the grid voltage, and local load current during
transition from GC to SA. It seems that the local loads feel very low disturbance at the
PCC voltage. The faster the response of the dispatch unit, the less fluctuation would be
observed at the PCC voltage. The following system parameters have been used for the
Droop coefficients, kp1 = kp2 = 110-4 rad/W, kq1 = kq2 = 6.2810-4 rad/VAR,
106
Unit1
50
Current (A) 0
-50
0.2 0.4 0.6 0.8 1 1.2
Unit2
50
Current (A)
-50
0.2 0.4 0.6 0.8 1 1.2
Dispatch
Time (s)unit
50
Current (A)
-50
0.2 0.4 0.6 0.8 1 1.2
Grid
50
Current (A)
-50
0.2 0.4 0.6 0.8 1 1.2
Time (s)
Figure 3.32. Inverters, dispatch unit and grid currents during GC to SA mode transition.
107
Load
100
Current (A)
0
-100
0.2 0.4 0.6 0.8 1 1.2
Vgu
V/I (units)
100
0
iload
-100
Grid OFF
0.39 0.395 0.4 0.405
Time (s)
Figure 3. 34 shows the output currents of the DGs, dispatch unit and load considering
the grid takes the power from the microgrid system. When the grid goes off, the dispatch
unit takes the extra power and charges the storage devices. Then it gradually decreases its
power and reaches to zero when the energy storage elements are fully charged. As the
local load remains constant, both of the inverters gradually decrease their power flow and
108
Unit 1
100
50
Current (A)
0
-50
-100
0.2 0.3 0.4 0.5 0.6 0.7 0.8
Unit 2
100
50
Current (A)
-50
-100
0.2 0.3 0.4 0.5 0.6 0.7 0.8
Time (s)
Local Load
100
50
Current (A)
-50
-100
0.2 0.3 0.4 0.5 0.6 0.7 0.8
100 vPCC
V/I (units)
-100
-200
0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7
Time (s)
Figure 3.34. DGs, load and dispatch unit currents during GC to SA transition mode.
109
3.5.3.3. SA to GC during the Grid Delivering Power to the System
The simulation starts with microgrid working in SA mode where the dispatch unit
works in idle condition. When the grid becomes available at 2.25 sec the dispatch unit
monitors the grid availability through PLL and starts preparing the microgrid for the grid
connection. Before the switch gets connected, the phase of the grid voltage and the
system voltage needs to be synchronized. Up to 2.25 sec, the output current of the two
inverters is 38 A (peak) at 120 V (RMS), as shown in Fig. 3.35. Then the dispatch unit
gradually increases its power flow. As the load current remains constant the other two
inverters gradually decrease their output power which also changes the system frequency.
At 2.88 sec the grid gets connected to the microgrid system and 22 A (peak) current,
where as the other two inverters flow 25 A (peak) current individually, as shown in Fig.
3.35.
Unit 1
40
20
Current (A)
-20
-40
2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Unit 2
40
20
Current (A)
-20
-40
2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Time (s)
110
Dispatch Unit
40
20
Current (A)
0
-20
-40
2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Grid
20
Current (A)
-20
Figure 3.36. Dispatch unit and the grid current during SA to GC mode transition.
Microgrid Frequency
65
Transition mode
Frequency (Hz)
60
-5
2.5 2.3 2.6 2.42.7 2.8
Time (s)
Figure 3.37. Microgrid frequency and phase difference between the microgrid and
the grid voltage from SA to GC.
111
Voltage at PCC
200
100
Voltage (V)
0
-100
-200
2 2.2 2.4 2.6 2.8 3
Local Loads
100
50
Current (A)
-50
-100
2 2.2 2.4 2.6 2.8 3
Time (s)
Figure 3.37 shows the microgrid frequency and the phase difference between the
microgrid voltage and the grid voltage. In the SA mode the system frequency is 59.4 Hz,
in transition mode the system frequency continues to vary and reaches to 60 Hz before
the grid connection. The grid phase returns with 30 lagging and matches to the microgrid
Figure 3.39 shows the power flow for the inverters, the dispatch unit, the grid and the
load during transition mode. Two units push 5.2 kW power individually, according to the
droop equations. At 2.25 sec the grid becomes available. To match the frequency and the
phase of system voltage with the grid voltage, the dispatch unit needs to deliver the
required power slowly. As the dispatch unit pushes some power the other two units need
to reduce the power flow. Because of the load power remains constant. As the two units
gradually decrease their power sharing, the system frequency gets changed.
112
Unit 1
6
Power (kW)
4
0
2 2.2 2.4 2.6 2.8 3
Unit 2
Power (kW) 6
0
2 2.2 2.4 2.6 2.8 3
Time (s)
Dispatch Unit
4
3
Power (kW)
0
2 2.2 2.4 2.6 2.8 3 3.2
Grid
4
3
Power (kW)
0
2 2.2 2.4 2.6 2.8 3 3.2
Local
TimeLoad
(s)
12
11
Power (kW)
10
8
2 2.2 2.4 2.6 2.8 3 3.2
Time (s)
Figure 3.39. Power flow of the inverters, dispatch unit, grid and load during transition
mode.
The dispatch unit gradually pushes more power from 0 kW to 3.6 kW within 0.6 sec
to synchronize the system with the grid. When the system synchronizes with the grid, the
dispatch unit sends the command to the switch to connect the grid. After that if the
system needs the dispatch unit can provide some power to the system or remain idle. The
113
dispatch unit also can gradually decreases it power so that the grid gets enough time to
take care of the system, by slowly pushing the required power to the system. From 2.825
sec, the grid pushes 3.6 kW power to the system. During all modes of operations the load
Two VSIs deliver 20 A peak current at 120 V (RMS) individually to the load in SA
mode, as shown in Fig. 3.40. The system frequency is 60.4 Hz. When the grid becomes
available, the dispatch unit monitors that and starts taking the power from the system.
The other two inverters individually increase their output current from 18 A to 30 A
between 2.2 sec to 2.8 sec. The system frequency and phase matches to the grid and at
zero crossing the dispatch unit commands the switch to enable grid connection. The load
takes 36 A (peak) current and the rest of the current will flow to the grid, as shown in Fig.
3.40.
20 20
Current (A)
Current (A)
0 0
-20 -20
-40 -40
2 2.2 2.4 2.6 2.8 3
2 2.2 2.4 2.6 2.8 3
Unit 2
40 Grid
40
20
Current (A)
20
Current (A)
0
0
-20 -20
-40 -40
2 2.2 2.4 2.6 2.8 3 2 2.2 2.4 2.6 2.8 3
Time (s) Time (s)
Figure 3.40. Inverters, dispatch unit and grid currents from SA to GC mode transition.
114
Voltage at PCC
200
100
Voltage (V)
0
-100
-200
2 2.2 2.4 2.6 2.8 3
Local Loads
40
20
Current (A)
-20
-40
2 2.2 2.4 2.6 2.8 3
Time (s)
Figure 3.42 shows the power flow of unit 1, unit 2, dispatch unit, grid and load during
SA to GC mode transition. Initially two units deliver 2.3 kW power individually. At 2.25
sec the grid becomes available and the dispatch unit monitors that. As the system
frequency is higher than the grid frequency, according to the droop equations, the
dispatch unit starts to take more power from the system. The dispatch unit gradually
increases the power it gets from 0 kW to 4 kW. When the system gets synchronized with
the grid, the switch connects the grid. During all modes of operations the load always
115
Unit 1
6
Power (kW)
4
0
2 2.2 2.4 2.6 2.8 3
Unit 2
6
Power (kW)
0
2 2.2 2.4 2.6 2.8 3
Time (s)
Dispatch unit
0
-1
Power (kW)
-2
-3
-4
-5
2 2.2 2.4 2.6 2.8 3
Grid
0
-1
Power (kW)
-2
-3
-4
-5
2 2.2 2.4 2.6 2.8 3
Time (s)
Local Load
5
4
Power (kW)
0
2 2.2 2.4 2.6 2.8 3
Time (s)
Figure 3.42. Power flow of the inverters, dispatch unit and load during transition.
116
3.5.3.5. Effect of the Load Change during Transition
During transition from SA to GC mode the load changing effect has been introduced
in the simulation. Up to 0.25 sec two units share the load power of 33 A individually, as
shown in Fig. 3.43 and at 0.25 sec the grid becomes available. The dispatch unit then
increases its power flow which makes the other inverters lower their power flow, this
Unit 1
50
25
Current (A)
-25
-50
0 0.2 0.4 0.6 0.8 1 1.2
Unit 2
50
Current (A)
25
0
-25
-50
0 0.2 0.4 0.6 0.8 1 1.2
Grid
Time (s)
40
Current (A)
20
-20
-40
0 0.2 0.4 0.6 0.8 1 1.2
Dispatch Unit
40
Current (A)
20
-20
-40
0 0.2 0.4 0.6 0.8 1 1.2
Time (s)
Figure 3.43. The effect of the load changing on the inverters current, grid current and a
117
Voltage at PCC
200
Voltage (V)
100
0
-100
-200
0 0.2 0.4 0.6 0.8 1 1.2
Local Load
120
Current (A)
60
0
-60
-120
0 0.2 0.4 0.6 0.8 1 1.2
Time (s)
Figure 3.44. The effect of the load changing on the voltage at PCC and the load current
during SA to GC mode.
makes the system frequency increase and get synchronized with the grid frequency. But
at 0.5 sec, the demand of local loads is changed from 60 A to 100 A at 120 V (RMS). The
two units and the dispatch unit compensate the power in the early stage which makes the
system frequency lower and the dispatch unit again starts to increase its power flow in
such a way that the other units lower their power flow and the synchronization is
achieved with the grid at 1.029 sec, as shown in Fig. 3.43. The voltage at the PCC faces
small fluctuation during load change but it is in the tolerable range, as shown in Fig. 3.44.
3. 6. Conclusion
In this chapter, a control technique is developed for DGs in microgrid system to run
in GC, SA and transition modes. Effective and efficient smooth transition techniques
between SA and GC modes for DGs have been developed for a microgrid system. The
proposed technique is based on using a unit called the dispatch unit to manage the
118
transition operation. The dispatch unit varies the phase and the frequency smoothly to
make SA to GC transition by controlling its output power to match the microgrid phase
voltage with the grid voltage at the instant of reconnecting to the grid. The dispatch unit
also compensates for the grid current immediately after GC to SA transition before it
makes other sources in the microgrid participate in that but gradually. The proposed
algorithm does not require any communication between the DGs and provides smooth
stable mode transition operation. The selected dispatch unit could be any DG unit,
preferably the energy storage system working in the microgrid. First the microgrid
system architecture with the dispatch unit has been presented and the control algorithm of
the inverters in GC mode, SA mode and transition mode has been developed. Secondly,
the overall microgrid system matrix has been derived using small signal modeling [105]
and from that the stability of the system has been analyzed by observing the eigen values
of the system matrix. Thirdly the simulation results have been presented using the
119
CHAPTER IV
4. 1. Introduction
proposed method DGs can be controlled through the combination of the current controller
and voltage droop controllers. The outputs of the two controllers are hybridized using
weight factors which are determined through the system frequency. In the proposed
method, during GC mode, the inverters are controlled by current controllers. When the
grid gets disconnected, the system frequency will decay. This frequency signal can be
used as a notification of the change in the mode of operation and to update the weight
factors. As each of the inverters can estimate the frequency through PLL, there is no need
for communication between the different sources. In SA mode, the inverters run in droop
control. From SA to GC mode, the smart switch measures the phase difference between
the system voltage and the grid voltage. When the phases are matched, the smart switch
gets closed. All inverters switch from their droop control to current control in GC mode
as the frequency gets back to the nominal values. During transition both current control
and droop control participate in formulating the inverter output voltage, but with different
weights or coefficients.
120
This chapter has been divided into five subsections. First, the architectural diagram of
the microgrid system has been shown. Second, the proposed smooth transition control
strategy has been discussed for parallel VSIs. Third, the small signal modeling has been
derived to verify the stability of the system. Forth, the simulation results are provided
considering the various conditions of the system. Then the conclusion of the analysis of
A typical microgrid architecture is shown in Fig. 4.1, where inverters and local loads
are connected in parallel at PCC. The grid is connected to the microgrid through the
smart switch, which can determine the conditions of both the microgrid and the grid.
Through the proposed hybrid controller inverters can identify the modes of operation and
regulate their power flow in the microgrid system. The frequency is used in the proposed
method to determine the mode of operation. As each of the inverters can estimate the
Smart
Switch
vg
PCC SW
ZZg2
P1, Q1 Vs1, 1 P l, Q l P2, Q2 Vs2, 2
Z1 Hybrid Z2 Hybrid vg
Control Control
Local
Loads
Vdc Vdc
Figure 4.1. Microgrid system where the VSIs use hybrid controller.
121
frequency, there is no need for communication between the different sources in the
microgrid. The frequency variation detection allows all inverters to participate in the
transition process which eliminates the need for a master unit or dispatch unit. To ensure
smooth transition, both voltage droop control and current control could be active and they
In the proposed control, during GC mode, the inverters are controlled by current
controllers. When the grid gets disconnected, the system frequency will decay. This
frequency signal can be used as a notification of the change in the mode of operation. As
each of the inverters can estimate the frequency, there is no need for communication
between the different sources in the microgrid. Each of the two controllers participates in
making the output voltage based on factors and , which depend on the frequency
deviation from the nominal value (i.e. 60 Hz). For example, when frequency is 60 Hz,
= 1 and = 0, indicating full current control. When frequency is less than a certain
threshold value, = 1 and = 0, which represents full droop control. During transition,
0< , < 1, which makes both controller active to ensure the smooth transition as what
Figure 4.2 shows the concept of our proposed control method for smooth transition
mode, the droop control factor = 1, as there is small frequency deviation between SA
and GC. From SA to GC mode, starts increasing and starts decreasing gradually, as
122
The equations of the output coefficients are
= (4.1)
is replaced by the lowest allowable frequency and sat means saturation and
=1- (4.2)
GC-SA SA-GC
GC SA
k1
1
k2
0
t
Figure 4.2. The variation of the weight factors of the current and droop control in all
modes of operations.
Figure 4.3 shows the overall structure of the proposed controller, which can work
both in the GC mode and SA mode, and the transition mode. Each inverter can easily
detect the system frequency and use Eqn. 4.1 and 4.2 it calculate the value of and .
The weight factor is multiplied by the droop controller output and is multiplied
with the current controller output. Then the combined output is sent to the PWM
generation block.
123
Droop v D
Controller
f k1 +
PLL
f sat ( f (.)) PWM
vg k2 +
Current
Controller v C
4. 3. 1. Current Control
here again to recall the working principle of the current controller. In the GC mode,
estimating the phase of the grid is essential in processing the right amount of power. The
phase-locked-loop (PLL) grid synchronization technique has been the preferred method
in the literature [20-21], and is also used in this study. The single phase PLL algorithm is
implemented by [22]. The grid voltage is shifted by 90 and converted into dq axes
voltages based on the estimated phase. The loop filter brings the q axis voltage to zero by
adjusting the phase. Based on the estimated phase, the utility current can be converted
into the dq domain the same way as the utility voltage is converted. The regulation in dq
domain is easier and has better dynamic response characteristics [23-25]. Figure 4.4
shows the block diagram of the utility interactive voltage source inverter controller based
on current regulation for the dq axes components of the utility current. The dq axes
currents are controlled in their domain through PI controllers and converted into the
reference phase voltage. The cross coupling and feed forward terms help to linearize the
124
Vd
+ PI
+ Vd_ref
Id_ref controller
- + -
Id_act
L* dq v C
Iq_act
Vq
+ PI +
Iq_ref controller
- + + Vq_ref
PLL
Iq_act
vg
L*
Id_act
current and power sharing, droop characteristics can be incorporated into the control of
the active and reactive power for each unit. A droop based complex impedance method
[23], [26] is used in SA mode to achieve the proper power balance and minimize the
circulating current. The voltage and the frequency in the microgrid are regulated through
vd
vpcc
c pflt n 1
PLL vq vdid+vqiq p ref -kpnpflt
s c s
cmd
id
ig abc-dq q c qflt vn
iq vdiq-vqid Vref -kdnqflt X
Transform s c vD
Figure 4.5. The block diagram of the droop control.
125
The droop control relations for the nth source in a microgrid are given by:
(4.3)
(4.4)
where and are the output and reference voltages, respectively. and are the
real and reactive powers of the individual sources in the microgrid respectively, ,
are the actual and reference frequency, which will be equal to the grid frequency,
sources, such as fuel cells, micro turbines, DC storage, etc is shown in Fig. 4.6. A DC/AC
VSI is commonly used as an interfacing module. Figure. 4.6 shows a block diagram of a
microgrid system where Vs1 and Vs2 are the two equivalent VSIs, and Vg is the grid.
Inductors are used as L filters. The model is used to derive the small signal model of the
overall microgrid. In the dq axis, a = 0, when the grid is off and a = 1, when the grid is
available.
126
For inverters 1 and 2
(4.5)
(4.6)
(4.7)
(4.8)
inverter 1, inverter 2.
(4.9)
(4.10)
The output voltage of the k-th inverter in a microgrid can be represented as:
(4.11)
where , and are the DC bus voltage, modulation index and the phase
all the voltages and currents into the dq rotating reference frame. In this way, the AC
circuit can be modeled as two coupled equivalent DC circuits one for the d state variables
and the other contains the dynamics of the q variables. To perform the transformation, a
common reference signal is needed. Let the global reference of the microgrid be
one. The reference is considered to coincide with the d axis so it has no q component.
All currents and voltages in the microgrid can be transformed to dq reference frame using
127
as a reference. In GC mode the grid voltage is considered as reference voltage. In SA
mode one for the inverters output voltage in the microgrid system is considered as
(4.12)
(4.13)
where , is the phase difference between the 1st inverter and the
grid, and are the weight factors of the hybrid controller. The d-axis voltage of
(4.14)
(4.15)
where and are gains of the current controller. The phase difference of the inverter 1
= (4.16)
(4.17)
(4.18)
(4.19)
(4.20)
128
where is the q axis of the reference current, is the actual q axis current,
and are gains of the current control. Similarly the d-axis voltage of inverter 2 would be
(4.21)
(4.22)
and the reference (in GC mode grid is the reference and in SA mode one of the inverter
(4.23)
(4.24)
(4.25)
(4.26)
(4.27)
(4.28)
(4.29)
where is the angular frequency of inverter 2 with respect to reference frame. From
equation we get
(4.30)
129
(4.31)
(4.32)
(4.33)
(4.34)
where is the cut off frequency of the filter. For the grid
(4.35)
(4.36)
where is the maximum peak of the grid voltage. For the and variables are
= (4.37)
(4.38)
= cos ; (4.39)
= sin ; (4.40)
(4.41)
(4.42)
where is the phase of the grid voltage and is the estimated phase of the PLL of
inverter 1.
130
cos
Vg V
Delay X
Vq Vxf 1 1
n
-
LPF PI
+ s
X
sin
as the difference between the angle is less than 4. From Fig. 4.7.
(4.43)
(4.44)
(4.45)
(4.46)
(4.47)
(4.48)
where and are the gain of the PI controller of the PLL of inverter 1. is
phase difference of the phase of the PCC and the estimated phase
(4.49)
(4.50)
where
and
131
(4.51)
(4.52)
(4.53)
linearlized from of Eqn. 4.13 is obtained by taking the derivatives of Eqn. 4.13 with
respect to and .
(4.54)
(4.55)
(4.56)
Taking the perturbation q-axis voltage of the droop and current controller of inverter 1,
(4.57)
(4.58)
(4.59)
(4.60)
(4.61)
(4.62)
132
(4.63)
(4.64)
(4.65)
(4.66)
133
(4.67)
2 1 1 1 1, 1 1 s1 1+ 1 2 1 1,2
(4.68)
Taking the perturbation of Eqn. 4. 5 and 4.6
1 2, 1 1 s1 1+ 1 2 1
(4.69)
(4.70)
134
Similarly for inverter 2, taking the perturbation d-axis voltage of the droop and
(4.71)
(4.72)
(4.73)
Taking the perturbation q-axis voltage of the droop and current controller of inverter
(4.74)
(4.75)
(4.76)
(4.77)
(4.78)
(4.79)
(4.80)
(4.81)
135
(4.82)
(4.83)
2+ 2,2 2 3 , 2 2( 2( s2 2)+ 2 )2 + , 2 2+
(4.84)
136
(4.85)
2 2 2 2,1 2+ , 2 2 s2 2+ 2 2 + 2,2
2+ 2,2 3 , 2 2 s2 2+ 2 2 , 2
(4.86)
(4.87)
(4.88)
(4.89)
the state-space models of the power controller; voltage controller, current controller, PLL
of the individual inverter and output L filter. The overall linearized model of a microgrid
(4.90)
137
where
X= .
a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 a17 a18 a19 a20
b b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 b13 b14 b15 b16 b17 b18 b19 b20
1
c1 c2 . . . . . . . . . . . . . . . . . c20
d1 d2 . . . . . . . . . . . . . . . . . d 20
e1 e2 . . . . . . . . . . . . . . . . . e20
f1 f2 . . . . . . . . . . . . . . . . . f 20
g g2 . . . . . . . . . . . . . . . . . g 20
1
h1 h2 . . . . . . . . . . . . . . . . . h20
i i2 . . . . . . . . . . . . . . . . . i20
1
j1 j2 . . . . . . . . . . . . . . . . . j20
k k2 . . . . . . . . . . . . . . . . . k20
AHY _ TM 1 .
l1 l2 . . . . . . . . . . . . . . . . . l20
m1 m2 . . . . . . . . . . . . . . . . . m20
n n2 . . . . . . . . . . . . . . . . . n20
1
O1 O2 . . . . . . . . . . . . . . . . . O20
p p2 . . . . . . . . . . . . . . . . . p20
1
q1 q2 . . . . . . . . . . . . . . . . . q20
r1 r2 . . . . . . . . . . . . . . . . . r20
s1 s2 . . . . . . . . . . . . . . . . . s20
t1 t2 . . . . . . . . . . . . . . . . . t20
where,
R K s1,2 k p
a1 ;
L1 L1
a2 ;
R
a3 ; a4 0;
L1
138
aR
a5 ; a6 0 ;
L1
K s1,2 ki
a7 ;
L
a8 a9 a10 a11 0 ;
k p1 K s1,1 cos s1
a12 ;
L1
(Vd 1, s1 Vd 2, s1 )kif 1
a17 ;
2fL1
(Vd 1, s1 Vd 2, s1 )k pf 1
a18 ;
2fL1
(Vd 1, s1 Vd 2, s1 )k pf 1
a19 ;
2fL1
a20 0 ;
b1 ;
R K s1,2 k p
b2 ;
L1 L1
b3 0 ;
R
b4 ;
L1
b5 0 ;
139
aR
b6 ;
L1
b7 0 ;
K s1,2 ki
b8 ;
L
b9 b10 b11 0 ;
k p1 K s1,1 sin s1
b12 ;
L
(Vd 1, s1 Vd 2, s1 )kif 1
b17 ;
2fL1
(Vd 1, s1 Vd 2, s1 )k pf 1
b18 ;
2fL1
(Vd 1, s1 Vd 2, s1 )k pf 1
b19 ;
2fL1
R
c1 ;
L2
c2 0 ;
R K s 2,2 k p
c3
L2 L2
c4 ;
140
aR
c5 ;
L2
c6 c7 c8 0 ;
K s 2,2 ki
c9 ;
L2
k p 2 K s 2,1 cos s 2
c15 ;
L2
c17 0 ;
(Vd 1, s 2 Vd 2, s 2 )kif 2
c18 ;
2fL2
(Vd 1, s 2 Vd 2, s 2 )k pf 2
c19 ;
2fL2
(Vd 1, s 2 Vd 2, s 2 )k pf 2
c20 ;
2fL2
d1 0 ;
R
d2 ;
L2
d3 ;
R K s 2,2 k p
d4
L2 L2
d5 0 ;
141
aR
d6 ;
L2
d7 d8 d9 0 ;
K s 2,2 ki
d10 ;
L
k p 2 K s 2,1 sin s 2
d15 ;
L2
d17 0 ;
(Vd 1, s 2 Vd 2, s 2 )kif 2
d18 ;
2fL2
(Vd 1, s 2 Vd 2, s 2 )k pf 2
d19 ;
2fL2
(Vd 1, s 2 Vd 2, s 2 )k pf 2
d 20 ;
2fL2
aR
e1 e3 e5 ;
Lg
e2 e4 0 ;
e6 ;
e7 e8 e9 e10 e11 e12 e13 e14 e15 e16 e17 e18 e19 e20 0
aR
f2 f4 f6 ;
Lg
142
f1 f3 0 ;
f5 ;
f7 f8 f9 f10 f11 f12 f13 f14 f15 f16 f17 f18 f19 f 20 0 ;
g1 1 ;
g2 g3 g4 g5 g6 g7 g8 g9 g10 0 ;
g11 g12 g13 g14 g15 g16 g17 g18 g19 g20 0 ;
h2 1 ;
h1 h3 h4 h5 h6 h7 h8 h9 h10 0 ;
h11 h12 h13 h14 h15 h16 h17 h18 h19 h20 0 ;
i3 1;
i1 i2 i4 i5 i6 i7 i8 i9 i10 0 ;
i11 i12 i13 i14 i15 i16 i17 i18 i19 i20 0 ;
j4 1 ;
j1 j2 j3 j5 j6 j7 j8 j9 j10 0 ;
j11 j12 j13 j14 j15 j16 j17 j18 j19 j20 0 ;
k3 k4 k5 k6 0 ;
k7 c K s1,2 ki I ds1 ;
k9 k10 0 ;
143
k11 c ;
kif 1
k17 ( I qs1Vq1,s1 Vq 2,s1I qs1 Vd 1,s1I ds1 Vd 2, s1I ds1 )c ;
2f
k pf 1
k18 (Vd 1,s1I qs1 Vd 2,s1I qs1 I ds1Vq1,s1 I ds1Vq 2,s1 )c
2f
k pf 1
k19 (Vd 1, s1I qs1 Vd 2,s1I qs1 I ds1Vq1,s1 I ds1Vq 2,s1 )c ;
2f
k20 0 ;
l3 l4 l5 l6 0;
l9 l10 l11 0 ;
l12 (k p1K s1,1I qs1 cos s1 I ds1k p1K s1,1 sin s1 1)c ;
kif 1
l17 (Vd 1, s1I qs1 Vd 2, s1 I qs1 I ds1Vq1,s1 I ds1Vq 2,s1 )c ;
2f
144
k pf 1
l18 (Vd 1,s1I qs1 Vd 2,s1 I qs1 I ds1Vq1,s1 I ds1Vq 2,s1 )c ;
2f
k pf 1
l19 (Vd 1, s1I qs1 Vd 2, s1I qs1 I ds1Vq1, s1 I ds1Vq 2,s1 )c ;
2f
m1 m2 m3 m4 m5 m6 m7 m8 m9 m10 0 ;
m11 kq1 ;
n1 n2 0 ; n3 (Vds 2 I ds 2 K s 2,2 k p )c ;
n14 c ;
kif 2
n20 ( I qs 2Vq1, s 2 Vq 2, s 2 I qs 2 Vd 1, s 2 I ds 2 Vd 2, s 2 I ds 2 )c ;
2f
O1 O2 0 ;
O3 (Vqs 2 I qs 2 K s 2,2 k p )c ;
O4 (Vds 2 I ds 2 K s 2,2 k p )c ;
145
O5 O6 O7 O8 0;
O9 I qs 2 K s 2,2 kic ;
O17 0 ;
kif 2
O18 (Vd 1, s 2 I qs 2 Vd 2, s 2 I qs 2 I ds 2Vq1, s 2 I ds 2Vq 2, s 2 )c ;
2f
k pf 2
O19 (Vd 1, s 2 I qs 2 Vd 2, s 2 I qs 2 I ds 2Vq1, s 2 I ds 2Vq 2, s 2 )c ;
2f
k pf 2
O20 (Vd 1, s 2 I qs 2 Vd 2, s 2 I qs 2 I ds 2Vq1, s 2 I ds 2Vq 2,s 2 )c ;
2f
p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 0 ;
p14 kq 2 ;
q17 q18 1;
q19 q20 0 ;
r17 kif 1 ;
146
r18 r19 k pf 1 ;
r20 0 ;
s17 kif 1 ;
s18 s19 k pf 1 ;
s20 0 ;
t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 0 ;
t19 t20 1 ;
= 37.7 rad;
The same microgrid system with two VSIs and a local load has been simulated for SA
the simulation: =1.810-3 rad; =1.910-3 rad ; Vds1 = 170 V; Vds2 = 170 V; Vqs1=0 V;
Vqs2 = 0 V; Vref = 170.5 V; Qs1=10 VAR; Qs2 = 10 VAR; Ids1 = Ids2 = 17 A; Iqs1 = -0.5 A;
-0.024991576146490 - 6.943723152305982i;
-0.024317172716455 + 3.408018876913082i;
-0.024317172716455 - 3.408018876913082i;
147
-1.045802612871105; -0.91623989821491;
-0.24317172716455 + 1.408018876913082i;
-0.504000340287753; - 0.40013160498566;
-0.382872164964961 + 0.025681030429138i;
-0.382872164964961 - 0.025681030429138i;
-0.200889758837229 + 0.150920484414449i;
-0.200889758837229 - 0.150920484414449i;
-0.118110011091712; -0.048414582555075;
-0.000570747605174 + 0.000049552159955i;
-0.000480747605174 - 0.000049552159955i;
-0.382872164964961 - 0.025681030429138i]
The eigen values are presented in Fig. 4.8. The proposed transition algorithm is stable
0.5
Imazinary axiss
-0.5
-1
-12000 -10000 -8000 -6000 -4000 -2000 0
148
4. 5. Simulation Results
strategy. In this simulation, two DGs and a local load are connected at the PCC. The grid
In SA mode, the proposed hybrid controllers of the inverters run the droop control and
share the power. The inverters share the amount of power according to their droop
coefficients for the local load. The currents of the DGs, voltage at PCC, local load current
at SA mode are shown in Fig. 4.9, where unit 1 and unit 2 cumulatively provide 70A
(peak) at 120 V (RMS), to the local load. The system parameters that we consider for
0.15 60 Hz
170 V 60.1 Hz
6.2810-4 rad/W 26
149
Figure 4.9 shows the operation of two units in SA mode to sustain the load in a
microgrid.
Unit 1
40
Current (A) 20
-20
-40
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Unit 2
40
20
Current (A)
-20
-40
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Voltage
Timeat(s)PCC
200
100
Voltgae (V)
-100
-200
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Local Loads
100
50
Current (A)
-50
-100
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time (s)
150
System frequency
65
Frequency (Hz)
60
55
50
0.2 0.25 0.3 0.35 0.4 0.45 0.5
Time (s)
Local Loads
10
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5
Unit 1
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5
Unit 2
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5
Time (s)
Figure 4.11. Power flow of the local load, unit 1 and unit 2 in SA mode.
Figure 4.11 shows the power flow to the local load from unit 1 and unit 2 operating in
SA mode. In SA mode, two units provide 3.1 kW power individually and the local load
takes 6.2 kW power. If the load demands changes then the two inverters adjust their
151
Unit 1
40
Current (A)
20
-20
-40
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 2
40
20
Current (A)
-20
-40
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Voltage at PCC
200
Voltage (V)
-200
50
-50
-100
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 4.12. Inverters current, voltage at PCC and the load current during the effect of
152
System Frequency
65
Frequency (Hz)
60
55
50
45
0.1 0.2 0.3 0.4 0.5 0.6
TimeLoads
Local (s)
10
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 1
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Unit 2
4
Power (kW)
0
0 0.1 0.2 0.3 0.4 0.5 0.6
Time (s)
Figure 4.13. System frequency, load and inverters power flow during SA mode.
Figure 4.12 shows the load changing effect in SA mode. Between 0 sec to 0.25 sec the
load is kept at 10 , from 0.25 sec to 0.5 sec it is 5 and after 0.5 sec it is kept 2.5 .
Depending on the load demands the inverters increase their power flow. Figure 4.13
shows the variation of the system frequency, power flow of the inverters and load in SA
mode. From 0 sec to 0.25 sec system frequency is 59.5 Hz. As the load increases the
system frequency drop down according to the droop equations. Between 0.25 sec to 0.5
153
sec, the load demands 3.5 kW power, the inverters share the power and the system
frequency becomes 58 Hz. After 0.5 sec the load demand is changed to 5.8 kW which is
supplied by the expense of change in the system frequency. It seems large variation of the
load demand takes time to settle the units at the power flow of the inverter and the system
frequency.
In GC mode, the proposed hybrid controller of the inverter runs in current control as
the weighted factor of the current controller becomes 1. Depending on the current
command, the inverters deliver power to the PCC. Unit 1 and unit 2 push 14 A (peak) and
20 A (peak) at 120 V (RMS) respectively, as shown in Fig 4.14 and 4.15. Since the load
takes 45 A, the rest of the power is delivered by the grid. As the grid frequency is 60 Hz,
Unit 1
20
Current (A)
10
-10
-20
2 2.2 2.4 2.6 2.8 3
Unit 2
20
Current (A)
-20
154
Grid
10
Current (A)
0
-5
-10
2 2.2 2.4 2.6 2.8 3
Local Load
50
Current (A)
-50
2 2.2 2.4 2.6 2.8 3
Time (s)
Figure 4.15. The grid current and load current in GC mode.
Figure 4.16 shows the power flow of the inverters when the local load remains
constant in GC mode. In the GC mode, the weight factor of of the hybrid controller is
equal to 1 and the VSIs run in current control mode. Unit 1 and unit 2 deliver 2.4 kW and
1.5 kW power respectively, according to their current command while the rest of the
power is provided by the grid. As the grid acts like an ideal source or sink, it can take or
provide any amount of power to the microgrid system. The system frequency remains
60 Hz, as the grid frequency. If the current command of the individual inverters change
then depending on the load demands the grid provides the rest of the power.
155
Unit 1
4
Power (kW)
2
0
2 2.2 2.4 2.6 2.8 3
Unit 2
3
Power (kW)
0
2 2.2 2.4 2.6 2.8 3
Time
Grid(s)
2
1.5
Power (kW)
0.5
0
2 2.2 2.4 2.6 2.8 3
Local Load
8
6
Power (kW)
0
2 2.2 2.4 2.6 2.8 3
Time (s)
Frequency of the RES
65
Frequency (Hz)
60
55
2 2.2 2.4 2.6 2.8 3
Time (s)
Figure 4.16. DGs, grid, load power flow and overall system frequency in GC mode.
156
4.5.2.2. Gradually Changing of the Power Flow during Transition
Figure 4.17 shows the DGs current, grid current and load current when one of the
inverter starts varying its power output, provided that it has the sufficient energy in its
Unit 1
40
20
Current (A)
-20
-40
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Unit 2
40
20
Current (A)
-20
-40
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Grid(s)
Time
20
10
Current (A)
-10
-20
2.2 2.3 2.4 2.5 2.6 2.7 2.8
Local Load
50
Current (A)
-50
2.2 2.3 2.4 2.5 2.6 2.7 2.8
Time (s)
Figure 4.17. The effect of the commanded current variation by the inverters, when
157
Unit 1
6
Power (kW)
4
0
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Unit 2
4
3
Power (kW)
0
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Time
Grid(s)
3
2
Power (kW)
-1
-2
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Local Load
6
Power (kW)
0
2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3
Time (s)
Figure 4.18. Power flow of the VSIs, grid and load in GC mode.
energy storage devices. Unit 1 delivers 15 A (peak) current up to 2.3 sec. Unit 2 and grid
also delivers 20 A and 12 A to the local load. From 2.3 sec to 2.7 sec unit 1 gradually
158
increases its output current from 15 A to 32 A. As the load always requires 47 A current,
the rest of the power will obviously flow to the grid. Prior to the grid delivers 12 A
current and then it gradually reduces to 0A. After 2.55 sec the grid starts taking the power
from the system. Figure 4.18 also shows the power flow of the inverters, grid and local
load to get better understanding of the system. The local load always requires 5.2 kW.
Unit 2 always pushes 3.4 kW as its commanded current always remains the same. Unit 1
initially pushes 2 kW up to 2.3 sec and then gradually starts increasing its output power
up to 5 kW within 0.3 sec. Before 2.3 sec, the grid pushes 2 kW, then its output power
decreases and at 2.57 sec it starts taking power from the microgrid system as Unit 1 starts
mode. At 0.45 sec, the grid becomes unavailable, after that instant the system frequency
starts decreasing which causes the coefficients to start decreasing and the
as . This makes both the current and droop controllers work together
and compensates the system power requirement. In GC mode, the VSIs run in current
control mode and the microgrid frequency is at 60 Hz. In SA mode, VSIs run in droop
control and the microgrid frequency is 59.7 Hz. Figure 4.19 shows the microgrid
frequency deviation at PCC point and the output coefficients of the current and voltage
controller from GC to SA. After 0.65 sec the inverters run in droop control mode, as the
159
Microgrid Frequency
60.5
Frequency (Hz)
60
59.5
0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
Weighted factors
1
k2
Unit
0.5 k1
0
0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
Time (s)
Figure 4.19. Microgrid frequency and the output coefficients behavior from GC to SA.
Figure 4.19 shows the currents of the DGs, load and the grid in the microgrid system
respectively during transition. Prior to the grid disconnection, both of the inverters run in
current control mode and individually deliver 1.2 kW power to the PCC point, as the
local load needs 3 kW and the rest of the power comes from the grid. After the grid
disconnection, the hybrid controller then starts regulating the voltage through the droop
control and pushes the required 3 kW to the local load. During the transition period, the
local loads power has small fluctuation because of the slower response to the droop
controller and the system does not get the extra power from any additional inverter such
as the dispatch unit. It is seen from Fig. 4.19 that the value of gradually increases from
GC to SA mode. There is a slight oscillation on the local load voltage during transition as
160
Unit1
30
Current (A)
0
-30
0.3 0.35 0.4 0.45 0.5 0.55 0.6
Unit 2
30
Current (A)
-30
0.3 0.35 0.4 0.45 0.5 0.55 0.6
Time (s)
Local Load
50
Current (A)
-50
0.3 0.35 0.4 0.45 0.5 0.55 0.6
Grid
20
10
Current (A)
-10
-20
0.3 0.35 0.4 0.45 0.5 0.55 0.6
Time (s)
Figure 4.20. The output currents of DGs, load and grid during GC to SA mode transition.
4.5.3.2. SA to GC mode - The simulation starts with the microgrid working in SA mode.
When the grid becomes available at 0.2 sec, the switch waits to connect the grid to the
PCC when the phase error between the microgrid and the grid voltage is zero. Figure 4.21
shows the variation of the microgrid frequency, the output coefficients of the current and
161
droop control during SA to GC mode transition. When the grid is connected the system,
the frequency starts increasing to reach at 60 Hz. During this transition, coefficients
Microgrid Frequency
60.1
Frequency (Hz)
60
59.9
59.8
59.7
0.7 0.75 0.8 0.85 0.9 0.95 1
Weighted Factors
1
Units
k2
0.5
k1
Figure 4.21. Microgrid frequency and the output coefficients behavior from GC to SA.
Figure 4.22 shows the current of DGs from SA to GC mode transition. The inverters
run in droop control mode and at 0.782 sec the grid is connected to PCC and the
controller then starts regulating the power and individually pushes 1.7 kW to the PCC. As
the controller smoothly changes from the droop control to current control mode, the
Figure 4.23 shows the power flow of the inverters, grid and local load from SA to GC
mode. Two of the inverters cumulatively push 5.5 kW to the load with 59.8 Hz system
frequency. At 0.78 sec the phases of the grid voltage and the voltage at PCC match and
the switch gets connected. As the hybrid controller needs time to switch the controller
162
from droop control to current control, the grid provides the extra power for the short
period of time.
Inverter 1
20
Current (A) 10
-10
-20
0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2
Inverter 2
20
10
Current (A)
-10
-20
0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2
TimeLoad
Local (s)
40
20
Current (A)
-20
-40
0.7 0.75 0.8 0.85 0.9 0.95 1
Voltage at PCC
200
100
Voltage (V)
-100
-200
0.7 0.75 0.8 0.85 0.9 0.95 1
Time (s)
163
Unit 1
3
Power (kW)
2
0
0 0.2 0.4 0.6 0.8 1 1.2
Unit 2
3
Power (kW)
0
0 0.2 0.4 0.6 0.8 1 1.2
Time
Grid(s)
3
Power (kW)
0
0 0.2 0.4 0.6 0.8 1 1.2
Local Load
6
Power (kW)
0
0 0.2 0.4 0.6 0.8 1 1.2
Time (s)
Figure 4.23. Power flow of unit 1, unit 2, grid and the local load during transition.
The simulation starts from the SA mode where two units individually provide 18 A
current to the load. As the units run in droop control mode, the system frequency has
slight deviation from the grid frequency according to the droop equation. Because the
deviation the phase synchronization will be achieved in time and in our case at 0.6 sec the
164
Unit 1
30
Current (A)
15
-15
-30
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Unit 2
30
Current (A)
15
-15
-30
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Time
Grid(s)
40
20
Current (A)
-20
-40
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Local Load
60
40
Current (A)
20
0
-20
-40
-60
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Voltage
Timeat
(s)PCC
200
Voltage (V)
100
-100
-200
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Time (s)
Figure 4.24. The effect of the load changes on the inverters currents, grid current, load
165
phase error between the system voltage and the grid voltage becomes zero and the switch
gets connected. The grid then pushes some of the power and hybrid controller starts
switching the controller from droop control to current control depending weight factors.
But at 0.65 sec the load demands change from 36 A to 54 A, as shown in Fig. 4.24. The
grid provides the extra power to the load so that the other units can smoothly change
controllers to current control mode. At 0.9 sec both of the units push 15 A individually by
Depending on the simulation and the experimental results, the performance of the
proposed dispatch unit concept and the hybrid concept can be summarized in Table 4.2.
ii. Low THD on the voltage at PCC. For ii. THD on the voltage at PCC is high.
10 kW system the THD is 2.45% during For 10 kW system the THD is 4.495%
transition. during transition.
iii. Requires an additional unit which will iii. No extra unit is necessary. It is
increase the cost. But this unit can appropriate in the rural area where slight
provides power during normal operating power disturbance can be allowable.
condition.
iv. VSIs used droop control in all modes iv. VSIs run by current control in GC and
of operations which gives slower dynamic droop control in SA mode. By this during
response of power flow. GC mode faster dynamic response can be
achieved.
166
4. 7. Study of the Electrical Characteristic of the Proposed Two Methods
The microgrid system has been tested with the dispatch unit and hybrid control
Table 4.3: Comparisons of the electrical characteristic between the dispatch unit and
hybrid methods.
10 24.28 V 6.29 70 ms
4. 8. Conclusion
of operation has been developed for parallel VSIs in microgrid system. The developed
algorithm varies the output coefficients of the current and droop controller depending on
the frequency variation during the transition period. The proposed algorithm does not
require any communication between the DGs and neither the central controller nor the
167
dispatch unit is required. First the architectural overview of the microgrid system and the
microscopic overview of the control algorithms of the inverter are presented. Second,
theoretical analysis of the hybrid controller and the stability of a microgrid system, with
two inverters having hybrid controllers and a grid, has been derived using a small signal
modeling technique. The stability of the system has been verified through the position of
the eigen values of the system matrix. Third, simulation results have been presented using
our new proposed control technique considering the various conditions in all modes of
operations.
168
CHAPTER V
EXPERIMENTAL RESULTS
5. 1. Introduction
experimental test setup has been developed at the Alternative Energy Laboratories of
the University of Akron. Four DC/AC inverters along with associated controllers have
been built to form a microgrid system. Single phase portion of the inverters have been
developed algorithms. The experimental setup is shown in Fig. 5.1, which has an inverter,
Table. 5.1: Parameters for the single phase utility interactive inverter.
Inverter IAP100T120
Inductor 1.5 mH
169
Figure 5.1. Experimental setup of the VSI.
a filter (inductor),a local load, a utility grid, a battery, an interfacing board, and a DSP
and computer for programming and communications. The developed system parameters
IAP100T120 inverter hardware from Applied Power Systems is used as a base for the
bi-directional inverter. The unit has built in DC-link capacitors of 3300 F, protective
circuits for over current, short circuit, over voltage, under voltage and over temperature
and gate drive circuits to drive IGBTs. The power module contains three independent
IGBT legs which are capable of handling 800 V DC, 20 kHz switching frequency, and a
peak 200 A. Figure 5.2.a shows the inverter module used for the experiments.
5. 2. 2. Interface Board
An interface board between the DSP and the inverter module is developed to measure
utility grid voltage, inverter voltage, inverter current, DC bus voltage, and DC current.
170
An additional interface board is equipped with PWM buffer circuits, protection circuits
for over/under voltage/current and relay driving circuit. The picture of the inverter
module, interface board and DSP board for experiments presented in Fig. 5.2.
Figure 5.2. Grid interactive inverter setup: (a) Power module, (b) Interface board, (c)
Physical connection between utility grid and grid tie inverter is achieved using a soft
switching relay. A driver circuit to drive the relay is developed on interface board and it
is shown in Fig. 5.3. The DSP generates a turn ON/OFF which drives a Metal Oxide
171
Semiconductor Field Effect Transistor (MOSFET) after passing through a Schmitt
C14
U6
DGND
DGND 1 20 0.1u
oe1 Vcc +5V
R2mos
2 19
a0 oe2
100
3 R_mos
a1
Input pulses y0
18
for Relay 4 17 100
a2 y1 U7
5
a3 16 1 2
6 y2 G 2 S
a4 15 D 3 1
7 y3 S D
a5 14
y4 DGND
TB1
8
a6 MOSFET
y5
13 Relay terminal
9 12
a7 y6
10 11
gnd y7
DGND
Schimtt trigger
The voltage divider circuit is used to reduce the AC voltage from 170 V to 4.25 V and
DC voltage from 200V to 5V. C11, C12, C13 and R13 values are used as recommended for
the amplifier, the output of voltage sensor can be +Ve or Ve depending on the input
voltage. Figure 5.3 shows the conditional circuitry for the analog measurements. Figure
5.4 shows the voltage isolation amplifier AD202 and its conditioning circuitry.
172
Voltage (+Ve) Voltage isolater/Sensor
ISO_Voltage_Sensor
20
Power +15V
R11
195k 37 C13
R13 Output VISO- 0.1u
Voltage divider
1
Input+ 22
2k Power common
19
3 Output HI
Input- 18
R12 C12 Output LO
C11 100pf 36
5k Output VISO+
0.1u 38
Input Feedback
2
Input common DGND
AD202
Voltage (-Ve)
The output of the voltage sensor is between -4.25 V and +4.25 V for a single phase
AC utility grid and 5 V for DC bus voltage of 200V. Since ADC channels of the DSP are
Vbatt1_F_pos
R1Fneg3
Vbatt1_F_neg
10k
R1Fpos
R_v ia
10k
Input signal 31.83
Buffer1 10k R1Fneg2 10k To DSP
47k
1 16 R1Fneg1
2 OUT1 OUT4 15
In1- IN4-
Cb3 3 14 Filter
3
4 IN1+ IN4+ 13
+VDD -VDD -15V
5 12 Cb2 Z1
p n
IN2+ IN3+
NC
5k 5k
1
2
R1in2
0.1u
1
2
TP1
Port
The input signal for the IAP100T120s gate driver circuit is between 0 and 15 V, but
the DSP can generate the PWM signals of 3.3 V magnitude. Hence this signal is level
shifted to 15 V to run the IGBT modules. Three MCP1404 chips are used for level
shifting; one MCP1404 with supply voltage is shown in Fig. 5.6. The developed PWM
signals are processed through a PWM buffer, which is enabled by the signal provided
PWM1H_DSP_1 MCP1404
C24 +3.3V
RF2
Driv eEnable
0.1u DGND U8
3k +3.3V
R59 1 5
+3.3V 1A VCC
2 C19
3 1B 4 DGND
U2 100 GND 1Y
R52 C18 0.1u
1 4 10k C3
2 1 4 3 .1u
2 3 OR Gate DGND
C20 DGND DGND
0.1u DGND 0.1u
Sof tSW
DGND 74LVC +3.3V
Fault_shut
1 20
PWM1L_DSP Shut_DSP VCC
2 19
3 A1 Fault_DSP 18
PWM1H_DSP A2 Y1
4 17
5 A3 Y2 16
6 A4 PWM Buffer Y 3 15
PWM2L_DSP A5 Y4
7 14
8 A6 Y5 13
PWM2H_DSP A7 Y6
9 12
RF1 10 A8 Y7 11
PWM3L_DSP GND Y8
RF3
3k P2
PWM3H_DSP 3k 74LVC541
C17
Green LED
DGND
0.1u
DGND DGND RF4
+3.3V 10
DGND
RZ1
10k
PWM3H_DSP_1
PWM3L_DSP_1
PWM2H_DSP_1
PWM2L_DSP_1
PWM1H_DSP_1
PWM1L_DSP_1
174
5. 2. 7. Fault Protection Circuit
Fault protection based on the utility grid voltage, DC voltage and inverter output
current is developed as shown in Fig. 5.7. If any of these faults occur, then it generates a
fault signal which turns off the PWM signal to the IGBT module. LED signals are
provided for easy debugging of the interface board for fault conditions. If there is any
fault then the corresponding LED will glow. Once the fault is cleared, the DSP generates
a fault reset signal which resets the LED and fault holding latches.
C5
C5 C9
DGND
0.1u DGND
DGND
0.1u 0.1u
+3.3V +3.3V +3.3V
+3.3V
HexBuf f er1
Latch1 1 20
5 13 2 10E VCC 19
EN Q0 1A0 20E DGND
Grid Voltage 3
S0 Q1
9 3
2Y 0 1Y 0
18
4 10 4 17
R0 Q2 1A1 2A0
Over Current 7
S1
Latch
Q3
1 5
2Y 1 1Y 1
16
6 6 15
R1 1A2 2A1
DC voltage 11
S2 VDD
16 7
2Y 2 1Y 2
14
12 2 8 13
R2 Nc 1A3 2A2
Gate driver 15
S3
9
2Y 3 1Y 3
12
14 8 10 11
R3 Vss DGND GND 2A3
MC14044 Hex_Buf f er20pin
DGND
+3.3V
C15
DGND DGND
DGND
0.1u
DGND
RF7 RF5
10
10 10
DGND
DGND RED LED RF6
F1 F2 RF8
R58 F3
DF114 RED LED 10
3k
RED LED F4
DF113
D1N4002
DF112 RED LED
Fault_shut
D1N4002
DF111
D1N4002
D1N4002
175
5. 2. 7. Digital Signal Processor
and software programs are developed in the Visual DSP++ integrated development and
debugging environment. The BF506F is a high performance and low power processor.
The evaluation board (EZ-KIT Lite) is used to interface the BF506F to VisualDSP++.
The VisualDSP++ development environment can create, compile, assemble, and link
memory and core/peripheral registers. The ADSP BF300F is a 400 MHz processor.
Internal memory and clock speeds are high enough to implement the developed control
algorithm. The interfacing board between the power module and the EZKIT-LITE is
The test platfrom consists of power eletronics inverters, interface hardware boards for
the inverters, local AC and resistive loads, inverter output filter and the DSP to
implement the proposed algorithm. Figure 5.8 shows the complete block diagram of the
test platfrom. Two inverters are used to for the microgrid system with local loads, one
inverter works as a dispatch unit which can provide power in normal operating condition
or do the synchronization, and the forth inverter works as a grid. The dispatch unit
monitors the grid voltage and if the grid gets a fault, it sends a command to turn of the
switch. The DSP can send the high or low signals to the switch to connect the VSIs to the
PCC where as the local loads are kept connected in to the PCC. The grid is also
connected through the relay or switch to the PCC. The picture of the microgrid system is
176
V,I Relay
Relay
Grid
DC Inverter
L
Supply #3
Signal
V,I
DC Inverter
L Local
Supply #2
Signal Load
V,I
DC Inverter
L
Supply #1 Relay
Signal PCC
In the microgrid test bed the following instrumentaton units have been used;
177
Computer Computer Computer
#1 #2 #3
Local
Load
Current V/I
Signals Signals
Oscilloscope Oscilloscope
#1 #2
178
Figure 5.10. Experimental setup for the microgrid system.
179
5. 4. Experimental Tests of the Control Algorithm Developed for Independent VSI
A 5 kW, 200V DC, 120 V AC, utility interactive single phase inverter has been
developed for experimental verification as shown in Figure 5.11. The control algorithms
have been implemented using a BF506F digital signal processor from Analog Devices
and in all modes of operation. The ADC sampling, and PWM switching rates are kept at
20 kHz.
A bi-directional inverter is interfaced to the grid through the switch. The PLL is
applied to measure the grid voltage to obtain the dq-axis voltage and the phase angle.
Once the VSIs phase is locked to grid, then the inverter runs with the same phase angle.
The utility grid voltage for the experiment is shown in Fig. 5.12.a. Hence the same will
180
be reflected in dq-axis voltages and phase angle, which can be seen in Fig. 5.12.b, 5.12.c
and 5.12.d respectively. As soon as reaches zero, and settles into steady state, the
inverter synchronizes with the grid. Once the inverter gets synchronized to the grid,
Grid Voltage
200
Voltage (V)
-200
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time (S)
D-axis voltage
200
Voltage (V)
100
-100
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time (S)
Q-axis voltage
20
Voltage (V)
-20
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time (S)
Theta (Grid phase angle)
Phase angle (radian)
-5
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time (S)
Figure 5.12. Output of the Phase Locked Loop (a) grid voltage (b) d-axis voltage,
181
5.4.1.1. Real Power Processing into the Grid
Active power of the inverter is controlled through d-axis command current and the
reactive power is controlled by . Figure 5.13 shows grid interface results when the
then the inverter current is in phase with the grid voltage. Actual and currents are
Grid Voltage
200
Voltage (V)
-200
0.5 0.505 0.51 0.515 0.52 0.525 0.53 0.535 0.54 0.545 0.55
Time (S)
Inverter output current
20
Current (A)
-20
0.5 0.505 0.51 0.515 0.52 0.525 0.53 0.535 0.54 0.545 0.55
Time (S)
Grid Voltage/Inverter output Current
Voltage (V)/Current (A)
200
Grid voltage
0
Inverter current
-200
0.5 0.505 0.51 0.515 0.520.525 0.53 0.535 0.54 0.545 0.55
Time (S)
d-axis and q-axis values of inverter output current
40
Id
Current (A)
20
Iq
0
-20
0.5 0.505 0.51 0.515 0.52 0.525 0.53 0.535 0.54 0.545 0.55
Time (S)
Figure 5.13. The grid voltage, inverter current, grid voltage and grid current, d-axis and
182
5.4.1.2. Reactive Power Processing
Reactive power injection to the grid is tested at no load conditions and presented in
Fig. 5.14. As we are injecting only reactive power to grid, the phase difference between
inverter output current and utility grid voltage is 90. Figure 5.14.c shows the utility grid
Grid Voltage
200
Voltage (V)
-200
0.5 0.505 0.51 0.515 0.52 0.525 0.53 0.535 0.54 0.545 0.55
Time (S)
Inverter output current
50
Current (A)
-50
0.5 0.505 0.51 0.515 0.52 0.525 0.53 0.535 0.54 0.545 0.55
Time (S)
Grid Voltage/Inverter output Current
Voltage (V)/Current (A)
200
Grid voltage
0
Inverter current
-200
0.5 0.505 0.51 0.515 0.520.525 0.53 0.535 0.54 0.545 0.55
Time (S)
d-axis and q-axis values of inverter output current
40
Iq
Current (A)
20
Id
0
-20
0.5 0.505 0.51 0.515 0.52 0.525 0.53 0.535 0.54 0.545 0.55
Time (S)
(a) Utility grid voltage, (b) Inverter output current, (c) Grid voltage/ Inverter current,
183
5.4.1.3. Abrupt Change in the Commanded Inverter Output Current
Figure 5.15.a and 5.15.b show the experimental results of the current controller
where is changed from 15 A to 30 A at 5.41 sec. The current controller has good
20
-20
-40
5.2 5.3 5.4 5.5 5.6 5.7
Time (s)
Transient effect of dq current change
40
Current (A)
30
20
id iq
10
0
-10
5.2 5.3 5.4 5.5 5.6 5.7
Time (s)
Figure 5.15. The effect of abrupt change on the reference current of VSI.
A bi-directional inverter can charge the battery by taking the power from the grid.
current indicates the charging action. Figure 5.16 shows the grid voltage and inverter
184
Inverter voltage and current
150
Vinv
100
V/I (units)
50
0
-50
-100
Iinv
-150
2.96 2.965 2.97 2.975 2.98 2.985
Time (s)
If the utility grid is not available, the inverter runs in SA mode, where the power
control is done through voltage control. When the utility grid voltage or frequency is out
of the specified range of values, then the system automatically moves to SA operation.
The system provides power to the local connected loads by controlling the voltage at
PCC through RMS voltage control, described in Chapter II. A resistive load of 13 is
connected across the inverter to test the SA operation, for which the current from the
inverter is 13.07 A (peak) is as shown in Fig. 5.17. The system frequency is 60 Hz and
RMS reference voltage of 120 V are the assumed input parameters for the SA mode.
Inverter output power for this operation is 1.109 kW. As soon as the grid voltage is
50
0
-50
-100
-150
Figure 5.17. Steady state load voltage and load current with 20 A peak magnitude.
185
5. 4. 3. Implementation of the Proposed Transition Control during Transition Mode
5.4.3.1. GC to SA mode
Both the voltage and current regulators perform well and produce sinusoidal voltage
presented in Fig. 5.18. Initially, the inverter runs in the current control mode during GC
mode, the inverter controller immediately transitions into the voltage control mode when
the grid gets off. The condition of the grid is determined by checking if is in range
or not. A DSP controls the connection switch to disconnect the inverter from the grid to
enable SA mode of operation. The output voltage of the inverter is 120V (RMS) where
the load current is 10 A (peak). The transition is seamless except for a minor increase in
Grid is disconected
Grid is connected through the switch
through the switch
OFF
100
GC SA
0
-100
-200
9.89 9.9 9.91 9.92 9.93
Time (s)
(b)
Load Current
10
Current (A)
-10
186
5.4.3.2. SA to GC Mode - The most challenging event is the transition from SA to GC
mode of operation. Initially, the inverter runs in the voltage control mode. The time that
is required to wait before connecting into the grid is prescribed by the standards. During
this wait time, the inverter adjusts its phase to the utility.
(a)
Load current Inverter output voltage
50 500
SA GC SA GC
Current (A)
Voltage (V)
0 0
Phase
adjustment Relay ON
-50 -500
0 5 10 15 20 0 5 10 15 20
Time (s) Time (s)
Grid current
2 Grid voltage
400
Grid available
Current (A)
Voltage (V)
200
0 0
-200
Current is injected to the grid
-2 -400
0 5 10 15 20 0 5 10 15 20
Time (s) Time (s)
(b)
Figure 5.19.(a) Transition from SA to GC mode. (b) Detailed view of transition from SA
to GC mode.
The inverter waits for the zero crossing of the utility voltage to command the switch to be
turned on. In practical cases, the switch has 4 electrical cycles of delay. So the inverter
187
runs in SA mode during the switch connection time. In order to have better transition
during the switch connection time, the inverter runs in the current control mode with the
command current set at the same value that was in producing the correct magnitude of
inverter output voltage. As shown in Fig. 5.20, the inverter output and the utility voltages
are in phase when the relay is turned on. When the switch is connected, the inverter
-100
100
-100 Vg
Vinv
-200
12.85 12.9 12.95 13
Time (s)
Figure 5.21. Grid voltage, load voltage and inverter output current during SA to GC
transition mode.
188
Frequency change during the phase adjustment
62
60
59
4 6 8 10 12
Time (s)
(a) using smooth frequency variation method and (b) using abrupt frequency variation
method.
The phase adjustment of the inverter during the transition period is shown in Fig.
5.21. The transition is seamless and there is not any disturbance in the inverter output
current. The inverter frequency is smoothly varying from 60 Hz to 59.2 Hz and then
again going back to 60 Hz, as shown in Fig. 5.22, during the transition period. Fig. 5.23
shows the THD analysis of inverter voltage for both the transition methods. The THD of
the output voltage is 1.9% for smooth frequency variation algorithm and it is 2.98% for
the abrupt frequency variation algorithm which also agree with the simulation results.
189
5. 5. Experimental Results of VSIs in Microgrid using Dispatch Unit
The proposed topology and control method are tested on a laboratory setup having
four of 5 kW VSIs, local loads are connected at the PCC. Two of the inverters work as
DG unit 1 and DG unit 2, one of the inverter is used as the grid and the forth one is used
as a dispatch unit. The control algorithms have been implemented using BF506F and
TMS320F28335 digital signal processors. The transition control operations are tested and
presented as following.
to the PCC where the local load takes 36A at 120 V (RMS), as shown in Fig. 5.24. In
respect of power the local load takes 3.6 kW where unit 1 and unit 2 deliver 1.15 kW, 1.3
kW respectively and the dispatch unit provides the rest of the power. Here unit 1 and unit
10 10
Current (A)
Current (A)
0 0
-10 -10
-20 -20
-0.05 0 0.05 -0.05 0 0.05
Unit 2 Voltage at PCC and Load Current
20 200
VPCC
10 100
Current (A)
V/I (units)
0 0
-10 -100
ILoad
-20 -200
-0.05 0 0.05 -0.05 0 0.05
Time (s) Time (s)
Figure 5.24. Inverters current, dispatch unit current, voltage at PCC and the load
current in SA mode.
190
2 run in droop control and dispatch unit runs in current control. The inductor values of
unit 1, unit 2 and the dispatch unit are 2.95 mH, 2.8 mH, 2.66 mH respectively. The DC
bus voltage of unit1, unit 2 and the dispatch unit are around 230 V, 222V, 220V
respectively and 33 is manually set by the resistive bank. The gains of the droop
controller and the current controller are same as the simulated results.
A grid interfaced microgrid system with two inverters, a dispatch unit and local loads
are connected at PCC, as shown in Fig. 5.25 in GC mode. As the local load requires 42 A
at 120V (RMS), unit 1, unit 2, dispatch unit and grid provide 12 A, 12 A, 10A and 8A
Unit 1
20
10
Current (A)
-10
-20
-0.05 0 0.05
Unit 2
20
10
Current (A)
-10
-20
-0.05 0 0.05
Time (s)
Figure 5. 25. Inverters currents at PCC in GC mode.
191
Dispatch Unit
20
10
Current (A)
0
-10
-20
-0.05 0 0.05
Grid
10
Current (A)
-5
-10
-0.05 0 0.05
Timeand
Voltage at PCC (s) Load Current
200
VPCC ILoad
100
V/I (units)
-100
-200
-0.05 0 0.05
Time (s)
Figure 5.26. Dispatch unit current, grid current, voltage at PCC and load current
in GC mode.
5.5.3.1. GC to SA mode
This experimental test starts with GC operation, where grid, DG units provide 2.2 kW
to the loads. After the grid becomes unavailable at 1.14 sec, the dispatch unit takes the
grids responsibility to provide power as shown in Fig. 5.27. At 1.14 sec the grid goes
off, the dispatch unit then provides 5 A current at 120 V. The current taken by the loads
and PCC voltage are not disturbed throughout this operation as shown Fig. 5.28.
192
5 Unit 1 Grid
10
Current (A)
Current (A)
0 0
-5 -10
1 1.1 1.2 1.3 1.4 1 1.1 1.2 1.3 1.4
Unit 2 Dispatch Unit
10 10
Current (A)
Current (A)
0 0
-10 -10
1 1.1 1.2 1.3 1.4 1 1.1 1.2 1.3 1.4
Time (sec) Time (sec)
Figure 5.27. Inverters current, grid current, dispatch unit current from GC to SA.
Microgrid Voltage and load current
200
Grid off
100
V/I (units)
-100
iLoad
-200
1.13 1.14 1.15 1.16 1.17 1.18
Time (sec)
Figure. 5. 28. Microgrid voltage at the PCC point and the local load from GC to SA.
The Dispatch unit also can push the power to the system in the normal operating
condition and provides the necessary power to the system during transition, as shown in
Fig. 5.29. Experimentally in GC mode unit 1, unit 2, grid and dispatch unit provide 8 A,
7 A, 11 A and 8 A respectively. When the grid goes off, the dispatch unit increases its
output current to 18 A and remains stable for some electrical cycles and then gradually
decreases its current flow to 10 A within 15 sec, as shown in Fig. 5.22. The dispatch unit
193
output current can be set to any value by the current controller. During the transition, the
load does not feel any disturbance, as shown in Fig. 5.29. The load takes 35 A current in
all modes of operation which is the main concern of our research work.
Unit 1
20
10
Current (A)
-10
-20
-10 -5 0 5 10
Unit 2
20
Current (A)
10
-10
-20
-10 -5 0 5 10
Grid(s)
Time
20
10
Current (A)
-10
-20
-10 -5 0 5 10
Dispatch Unit
20
10
Current (A)
-10
-20
-10 -5 0 5 10
Time (s)
Figure 5.29. Inverters current, grid current and dispatch unit current from GC to SA mode.
194
Local Load
40
20
Current (A)
0
-20
-40
-10 -5 0 5 10
TimeLoad
Local (s)
40
20
Current (A)
-20
-40
-0.1 -0.05 0 0.05 0.1
Time (s)
Figure 5.30. Local load takes 35 A current during the entire modes of operation.
5.5.3.2. SA to GC Mode
The two of DG units work in SA mode with the dispatch unit operating in idle
condition. After the grid becomes available at 1.2 sec, the dispatch unit starts increasing
its output power, as the other two DG units gradually decrease their power flow through
their droop controllers. Figure 5.31 show the individual currents of the inverters, grid and
load throughout the operation. When the phase of the microgrid voltage and the grid
voltage match, the dispatch unit sends a high signal to the switch to connect the grid to
the PCC. Grid and PCC voltage and the microgrid operating frequency are shown in Fig.
5.30. Throughout this process, the frequency of the microgrid is brought to 60 Hz from
59 Hz and synchronized to the grid, as shown in Fig. 5.31. At zero crossing, the dispatch
195
Unit 1
20
Current (A)
0
-20
0 0.5 1 1.5 2 2.5 3 3.5
Unit 2
20
Current (A)
-20
0 0.5 1 1.5 2 2.5 3 3.5
Dispatch Unit
Time (sec)
10
Current (A)
-10
0 0.5 1 1.5 2 2.5 3
Grid
20
Current (A)
-20
0 0.5 1 1.5 2 2.5 3
Time (sec)
Local load
40
20
Current (A)
-20
-40
0 0.5 1 1.5 2 2.5 3
Time (sec)
Figure 5.31. Currents of the inverters, dispatch unit and grid during SA to GC mode
transition.
196
Grid and Microgrid Voltage
200
100
V/I (units)
0
-100
-200
0 Grid
10 20 30 40 50
Microgrid Time (ms)
Figure 5.32. Synchronization of the microgrid with the grid during SA to GC transition.
Microgrid Frequency
61
Phase
Matching
Frequency (Hz)
60.5
60
59
0 100 200 300 400
No. of Samples (N)
Figure 5.33. Operating frequency of the microgrid during SA to GC operation.
In the next experiment, we try to verify that the dispatch unit can provide power to
the system in normal operation and the slight fluctuation (around 10%) of the DC bus
voltage of the inverters does not affect the system performance during transition. Figure
5.33 shows the DC bus voltages of unit 1 and unit 2 where = 235 V and varies
from 220 V to 230 V during transition. The experiment starts in SA mode where two
inverters and dispatch unit push 15 A, 18 A and 5 A respectively to the local load. After a
while, the grid becomes available and the dispatch unit increases its output current from 5
A to 15 A, as shown in Fig. 5.33. As the load remains constant the other inverters reduces
their power flow, according to the droop equation which can be observed in Fig. 5.34.
197
DC voltage of Unit 1
250
240
Voltage (V)
230
220
210
200
-5 0 5
DC voltage of Unit 2
250
240
Voltage (V)
230
220
210
200
-5 0 5
Figure 5.34. The DC bus voltage of unit 1 and
Time (s) unit 2, where has 10% voltage
fluctuation.
Unit 1
20
10
Current (A)
-10
-20
-5 -4 -3 -2 -1 0 1 2 3 4 5
Unit 2
20
10
Current (A)
-10
-20
-5 -4 -3 -2 -1 0 1 2 3 4 5
Time (s)
Figure 5.35. Inverters current during SA to GC mode transition.
When the phases are matched, the dispatch unit sends a high signal to the switch and
the switch gets connected. As soon as the grid gets connected the value of the
198
loads demand is constant, the grid starts to push the same amount of current to the
system. In GC mode two units run in droop control and the dispatch unit runs in current
control.
Dispatch Unit
20
10
Current (A)
-10
-20
-5 -4 -3 -2 -1 0 1 2 3 4 5
Grid
20
10
Current (A)
-10
-20
-5 -4 -3 -2 -1 0 1 2 3 4 5
Timeat(s)
Voltage PCC
200
100
Voltage (V)
-100
-200
-5 -4 -3 -2 -1 0 1 2 3 4 5
TimeLoad
Local (s)
40
20
Current (A)
-20
-40
-0.1 -0.05 0 0.05 0.1
Time (s)
Figure 5.36. Dispatch unit current, grid current, voltage at PCC and load current from SA
to GC mode.
199
Unit 1
2
1.5
Power (kW) 1
1.5
Power (kW)
Experimental result
0.5
Simulation result
0
-10 -5 0 5 10
TimeLoad
Local (s)
3.5
Simulated Results
3.48
Experimental Results
Power (kW)
3.46
3.44
3.42
3.4
-10 -5 0 5 10
Time (s)
Figure 5.37. Comparisons between the simulation and experimental results of inverters
Figure 5.37 shows the comparison between the inverters currents and the load
current during transition mode. The local load demands 3.45 kW, which is supplied by
200
5. 6. Experimental Results of VSIs in Microgrid using Hybrid Control Technique
Two of 5 kW inverters, 400V DC supply unit, 120 V AC and one inverter working as
a simulated grid have been used for experimental verification of the proposed hybrid
control algorithm. The control algorithms have been implemented using TIDSP28335
DSP from Texas Instruments. The ADC sampling, and PWM switching rates are kept at
20 kHz. The values of the inductors are 2.85 mH, 2.8 mH, 2.7 mH. The gains of the
inverters have been kept same as the simulated once. The system has been tested for both
Unit 1
40
20
Current (A)
-20
-40
-0.1 -0.08 -0.06 -0.04 -0.02 0
Unit 2
40
20
Current (A)
-20
-40
-0.1 -0.08 -0.06 -0.04 -0.02 0
Time (s)
Voltage at PCC and Load Current
200
100
V/I (units)
-100
-200
-0.1 -0.08 -0.06 -0.04 -0.02 0
Time (s)
Figure 5.38. Inverters current, voltage at PCC and load current in SA mode.
201
Figure 5.38 shows that the two inverters push individually 25 A and 20 A
individually at 120 V (RMS) in SA mode. The value of the resistive load is set to 3.77 .
command as the weighted factor of the current controller of the hybrid controller
becomes 1. As the load requires 33 A, the rest of the power is provided by the grid, as
Unit 1
20
10
Current (A)
-10
-20
0 0.01 0.02 0.03 0.04 0.05
Unit 2
10
Current (A)
-5
-10
0 0.01 0.02 0.03 0.04 0.05
Time (s)
Grid
10
5
Current (A)
-5
-10
0 0.01 0.02 0.03 0.04 0.05
Voltage at the PCC
200
Voltage (V)
100
-100
-200
0 0.01 0.02 0.03 0.04 0.05
Time (s)
Figure 5.39. Inverters currents, grid current and voltage at PCC in GC mode.
202
5. 6. 3. Hybrid Controller Performance during Transition Mode
5.6.3.1. GC to SA Mode - Figure 5.40 shows the output currents of unit 1, unit 2 and the
grid current during GC to SA transition mode. Initially, Inverter 1, Inverter 2 and the grid
deliver 12 A, 10 A and 16.5 A respectively to the local load. At 2.77 sec the grid goes off
and the controllers of the inverters gradually decrease the weights on the current control
and increase weights on the droop control and share the required load current. During the
transition, the load suffers with small fluctuation which is within the tolerable range. But
Inverter 1
20
Current (A)
-20
2 2.5 3 3.5
Inverter 2
20
Current (A)
-20
2 2.5 Grid 3 3.5
20
Current (A)
-20
2 2.5 3 3.5
Time (s)
Figure 5.40. Inverters currents and grid current during GC to SA.
203
Microgrid frequency
61
Frequency (Hz)
GC
SA
60
59
100 110 120 130 140
2
k2
Weights
1
k1
0
100 IL
Units (V/A)
-100
V
-200
2 2.5 3 3.5
Time (s)
Figure 5.41. Microgrid frequency, the output coefficients behavior, the load voltage and
the main contribution is that during transition the inverter can change its controller from
current control to droop control by using the hybrid control technique without having any
communication network.
Figure 5.40 shows the microgrid frequency and weights during GC to SA. The data
has been taken from the microcontroller. Initially, in the grid connected mode, the system
frequency is 60 Hz. When the grid is OFF, the system frequency decreases and the value
of k2 of the inverter increases which bring the droop controller in action. In the SA mode
204
the system frequency is 59.7 Hz. The microgrid voltage and the load current during
Unit 1
40
20
Current (A)
-20
-40
-5 -4 -3 -2 -1 0 1 2 3 4 5
Unit 2
40
Current (A)
20
-20
-40
-5 -4 -3 -2 -1 0 1 2 3 4 5
Grid(s)
Time
20
10
Current (A)
-10
-20
-5 -4 -3 -2 -1 0 1 2 3 4 5
Voltage at PCC
200
100
Voltage (V)
-100
-200
-5 -4 -3 -2 -1 0 1 2 3 4 5
Time (s)
Figure 5.42. Inverters currents, grid current, voltage at PCC from GC to SA mode.
Figure 5.42 shows the inverters current, the grid current and voltage at PCC from GC
to SA mode considering long duration of the time scale where unit 1 and unit 2 provide
205
10 A and 16 A current in GC mode. As the load requires 40 A current the grid provides
5.6.3.2. SA to GC Mode - The two VSIs in the microgrid system run in islanded condition
Inverter 1
Current (A) 20
-20
1.8 2 2.2 2.4 2.6 2.8
Inverter 2
20
Current (A)
-20
1.8 2 2.2 2.4 2.6 2.8
Grid
Time (s)
10
Current (A)
-10
1.8 2 2.2 2.4 2.6 2.8
Local load
40
Current (A)
20
-20
-40
1.8 2 2.2 2.4 2.6 2.8
Time (s)
Figure 5.43. Inverters currents, grid current and the load current during SA to GC.
206
using the droop based control by the hybrid controller. The grid becomes available at
2.09 sec. The grid becomes available with a different phase from the system voltage. As
the system runs with different frequency, the phase of the grid voltage and the system
voltage will match. The switch will connect the grid at the PCC. The grid then also starts
pushing some power to the load and the inverters gradually decrease their power. The
overall system frequency will be 60 Hz. Figure 5.43 shows the inverters current, grid
current and load current from SA to GC transition. Inverter 1 and inverter 2 push 10 A
and 12 A current simultaneously. At 1.6 sec the grid becomes available, then the switch
waits for some time to match the phase of the grid voltage and the microgrid voltage, and
connects the grid at 2.05 sec. The grid then starts pushing some power to the local load.
The other two inverters gradually decrease their power. The power taken by the local
load remains constant during the transition. The same experiment has been repeated
240
230
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
DC Bus Voltage of Unit 2
240
Voltage (V)
235
230
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
Time (s)
Figure 5.44. The wave shape of the DC bus voltage of unit 1 and unit 2.
207
Unit 1
20
10
Current (A)
0
-10
-20
-2 -1 0 1 2
Unit 2
20
Current (A)
10
-10
-20
-2 -1 0 1 2
Time
Grid(s)
10
Current (A)
-5
-10
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
Local Load
50
25
Current (A)
-25
-50
-2 -1 0 1 2
Time (s)
Figure 5.45. Inverters current, grid current and load current during SA to GC mode.
Unit 1 and unit 2 push 19 A and 18 A current at 120 V (RMS) respectively to the
local load. The DC bus voltage of unit 1 is changes from 238 V to 246 V and the other
units voltage is 234 V, as shown in Fig. 5.44. When the phase voltage of the grid and the
system is matched, then at zero crossing the grid is connected to the PCC by the switch.
The two units smoothly switch their controller from droop control to current controller by
208
the hybrid controller as discussed before and push the commanded current of 10 A and 18
Unit 1
3
Simulation result
Experimental result
Power (kW)
2
0
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
Time
Unit (s)
2
2
1.8
Power (kW)
1.6
1
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
Grid(s)
Time
1
0.5
Power (kW)
0
Simulation result
-0.5 Experimental result
-1
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
Time (s)
Local Load
4
Simulation Result
3.8 Expimental Result
Power (kW)
3.6
3.4
3.2
3
-2 -1.5 -1 -0.5 0 0.5 1 1.5 2
Time (s)
Figure 5.45. Comparison between the simulation and experimental results of VSIs in
209
5. 7. Conclusion
In this chapter, experimental results have been presented to verify the simulation
results of Chapter II, III and IV simultaneously. First the hardware setup of the single line
diagram of the prototype microgrid system has been developed. Secondly, four of 5 kW
bidirectional inverters have been built in the Alternative Energy Lab of the University of
Akron and the proposed control algorithm for transition of the individual inverter has
been tested and presented for SA, GC and transition modes of operations. Third, the
proposed smooth transition technique of the parallel inverters in the microgrid system
using a dispatch unit but without having any communication network has been
experimentally tested. Fourth, an alternative transition technique with poor wave shapes
during transition mode have been tested, as described in Chapter IV. In all the cases the
210
CHAPTER VI
6. 1. Summary
This dissertation presents an analysis of a single phase grid-tie inverter as well as the
microgrid with paralleled power conditioning VSIs operating in the GC mode, SA mode,
and transition mode, and tries to solve the complexity of the system during the transition
In Chapter II, the controller design of a single inverter in both GC and SA modes are
discussed. For GC mode, a dq axis current controller with PI controller and a phase lock
loop (PLL) has been developed. For SA mode, a droop control and RMS voltage control
is developed. In transition mode, a smooth frequency variation control technique for VSI
has been developed and its performance is compared with the other existing techniques.
In Chapter III, a smooth transition control strategy has been proposed for VSIs
operating in microgrids. In both GC and SA modes of operations, the VSIs use the droop
control method to regulate the real power flow without the need of any external
communication between them. One of the DGs working in the microgrid system is
designated as a dispatch unit to facilitate interconnection with utility grid and achieve
smooth transition between the modes of operations. During the transitions, the dispatch
unit takes extra responsibility and ensures the continuous power delivery to the load. For
smooth transition from GC to SA, the dispatch unit compensates for the grid current
211
immediately after the transition and makes the other sources share that current gradually.
The dispatch unit also adjusts its output power to make the transition from SA to GC
mode as that power affect the frequency through the droop control.
been proposed without having a dispatch unit. During transition, both current control and
droop control participate in formulating the inverter output voltage, but with different
weights or coefficients. The controller, referred as to a hybrid controller, varies the output
coefficients of the current and droop control depending on the system frequency variation
A bidirectional inverter is designed and implemented with the L type filter which
modification.
experimental hardware.
providing better performance during the transition mode for an independent inverter
212
- Development of an autonomous 20 kW microgrid system with a dispatch unit
Experimental development of a microgrid system with two inverters, dispatch unit and
a grid simulator.
Theoretical modeling of the microgrid system to determine the stability analysis of the
proposed technique.
Theoretical modeling of a microgrid system with the hybrid controller for VSIs to
The comparison of the proposed an existing control technique is provided in Table 6.1.
Overview of the proposed and existing control techniques for 20 kW microgrid system.
213
Table 6.1: Performance comparison of the recent methods and the two proposed methods.
We can implement the hybrid controller for the VSIs and a dispatch unit operating
with droop control method in the microgrid system for proper transition control. This
combined method has some advantages. First, the VSIs do not require any
communication network as before. Second, the droop control of the dispatch unit
compensates the grid current automatically. Therefore, no grid current sensor is needed
for the dispatch unit. Third, in GC mode, as VSIs run in current control mode by the
214
hybrid control method, better power control can be achieved. Fourth, the dispatch unit
can operate as a source in a microgrid which cannot be achievable with the method
proposed in Chapter III. This functionality adds an extra level of reliability. The proposed
vg
Droop Control
Grid Synchronization
Vdc Z3
idispatch
PCC SW
Z
Zg2
P1, Q1 Vs1, 1 P l, Q l P2, Q2 Vs2, 2 grid
connection
Z1 Hybrid Z2 Hybrid vg
Control Control
Local
Loads
Vdc Vdc
215
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APPENDICES
225
APPENDIX A
Figure A.1. Simulated block diagram of the single phase utility interactive inverter which
226
Figure A.2. Simulink blocks of the dq axes current controller.
227
A. 2. Microgrid System using Dispatch Unit Concept
Figure A.4. Simulink control blocks of an overall microgrid system using dispatch unit
technique.
228
Figure A.5. Simulink blocks of the droop controller.
229
A. 3. A Microgrid System Where VSIs Use Hybrid Control Technique
Figure A.7. Simulation blocks of an microgrid system where VSIs operate with hybrid
controller.
230
Figure A.8. Simulink blocks of the droop controller.
Figure A.10. Simulink block for the PWM generator of the hybrid controller.
231
APPENDIX B
PCB LAYOUT
232
Figure B.2. Routing on the top layer of the interfacing board of a VSI.
233
Figure B.3. Routing on the inner 2 layer of the interfacing board of a VSI.
234
Figure B.4. Bottom layer of the interface board of a VSI.
235
APPENDIX C
SCHEMATIC DIAGRAM
236
Figure C.3. Current sensors of a VSI.
237
Figure C.4. External current sensors of a VSI.
238
Figure C.5. Schematic diagram of a DC voltage and temperature sensor.
239
Figure C.6. Schematic diagram of a fault circuit diagram of a VSI.
240
Figure C.7. Schematic diagram of a buffer circuit diagram.
241
Figure C.9. DSP Terminal block.
Figure C.10. Connector for the Interface board and the power module.
242
Figure C.11. PWM level shifter block diagram.
243
Figure C.13. Bias power supply block of a interfacing board of a VSI.
244
APPEDIX D
MATLAB CODE
The following Matlab code has been written of the Eqn. 3. 91 to find out the eigen values
format long
a1=-R/L1;
a2=-w;
a3=-R/L1;
a4=0;
a5=0;
a6=-(1/L1)*kp2*cos(s1);
a7=-(1/L1)*sin(s1)*(vref-kp2*q1);
a8=0;
a9=0;
a10=0;
245
a11=-R/L1;
a12=0;
a13=0;
a14=0;
b1=w;
b2=-R/L1;
b3=0;
b4=-R/L1;
b5=0;
b6=-(1/L1)*kp2*sin(s1);
b7= -(1/L1)*cos(s1)*(vref-kp2*q1);
b8=0;
b9=0;
b10=0;
b11=0;
b12=-R/L1;
b13=0;
b14=0;
c1=-R/L2;
c2=0;
c3=-R/L2;
c4=-w;
c5=0;
c6=0;
c7=0;
c8=0;
c9= -(1/L2)*kp4*cos(s2);
c10= -(1/L2)*sin(s2)*(vref-kp4*q2);
c11=-R/L2;
c12=0;
c13=0;
c14=0;
d1=0;
d2=-R/L2;
d3=w;
d4=-R/L2;
d5=0;
d6=0;
d7=0;
d8=0;
d9=-(1/L2)*kp4*sin(s2);
d10= -(1/L2)*cos(s2)*(vref-kp4*q2);
d11=0;
d12=-R/L2;
d13=0;
d14=0;
e1=wc*Vds1;
e2=wc*Vqs1;
e3=0;
e4=0;
246
e5=-wc;
e6= wc*(-kp2*sin(s1)*Iqs1+Ids1*(-kp2)*cos(s1));
e7=wc*(cos(s1)*Iqs1*(vref-kp2*q1)-Ids1*sin(s1)*(vref-kp2*q1));
e8=0;
e9=0;
e10= 0;
e11=0;
e12=0;
e13=0;
e14=0;
f1=wc*Vqs1;
f2=-wc*Vds1;
f3=0;
f4=0;
f5=0;
f6= wc*(-kp2*cos(s1)*Iqs1-Ids1*(-kp2)*sin(s1)-1);
f7=wc*(-sin(s1)*Iqs1*(vref-kp2*q1)+Ids1*cos(s1)*(vref-kp2*q1));
f8=0;
f9=0;
f10= 0;
f11=0;
f12=0;
f13=0;
f14=0;
g1=0;
g2=0;
g3=0;
g4=0;
g5=-kp1;
g6=0;
g7=0;
g8=0;
g9=0;
g10=0;
g11=0;
g12=0;
g13=0;
g14=0;
h1=0;
h2=0;
h3=wc*Vds2;
h4=wc*Vqs2;
h5=0;
h6=0;
h7=0;
h8=-wc;
h9=wc*(-kp4*sin(s2)*Iqs2+Ids2*(-kp4)*cos(s2));
h10=wc*(cos(s2)*Iqs2*(vref-kp4*q2)-Ids2*sin(s2)*(vref-kp4*q2));
h11=0;
h12=0;
h13=0;
h14=0;
247
i1=0;
i2=0;
i3=wc*Vqs2;
i4=-wc*Vds1;
i5=0;
i6=0;
i7=0;
i8=0;
i9= wc*(-kp4*cos(s2)*Iqs2-Ids2*(-kp4)*sin(s2)-1);
i10=wc*(-sin(s2)*Iqs2*(vref-kp4*q2)-Ids2*cos(s2)*(vref-kp4*q2));
i11=0;
i12=0;
i13=0;
i14=0;
j1=0;
j2=0;
j3=0;
j4=0;
j5=0;
j6=0;
j7=0;
j8=-kp3;
j9= 0;
j10=0;
j11=0;
j12=0;
j13=0;
j14=0;
k1=-R/L1;
k2=0;
k3=-R/L1;
k4=0;
k5=0;
k6=0;
k7=0;
k8=0;
k9=0;
k10=0;
k11=-R/L1-kpc/L1;
k12=-w;
k13=kic/L1;
k14=0;
l1=0;
l2=-R/L1;
l3=0;
l4=-R/L1;
l5=0;
l6=0;
248
l7=0;
l8=0;
l9=0;
l10=0;
l11=w;
l12=-R/L1-kpc/L1;
l13=0;
l14=kic/L1;
m1=0;
m2=0;
m3=0;
m4=0;
m5=0;
m6=0;
m7=0;
m8=0;
m9=0;
m10=0;
m11=-1;
m12=0;
m13=0;
m14=0;
n1=0;
n2=0;
n3=0;
n4=0;
n5=0;
n6=0;
n7=0;
n8=0;
n9=0;
n10=0;
n11=0;
n12=-1;
n13=0;
n14=0;
249
APPENDIX E
DSP CODE
#define PI 3.141592654
// Global Variables
unsigned int Voltage;
250
unsigned int current;
///
double wq;
double Kp;
double Ki;
double a1;
double wf;
double vg;
double pi_2;
int fdel_1;
int fx;
double delta, delta2, S_delta;
double alpha, beta;
double beta1, beta2;
double w_TDPLL,w_TDPLL2=0,w_TDPLL3=0, phi;
double err_TDPLL;
double sig_save[500]={0};
int indx;
int inda1, inda2, inda3;
int indb1, indb2, indb3;
int indc1, indc2, indc3;
//############################################################################
// Current and voltage obtaiming parameters
//############################################################################
double ir; // recived current from sensor
double i; // recived current after digital filter
double a_f1; // filter parameter
double idq; // estimation error current
double iq, id; // dq current componenets
double KG_dt; // dq current current estimation gain
double v;
//############################################################################
// Droop Control
//############################################################################
double P, Q; //real and reactive powers
double Vref, V; // reference and output voltage
double wref, wf, wfx, d_phi; // frequeny
double Kfp, Kfq, Kvp, Kvq; // droop parameters
//############################################################################
// Voltage compensation and virtual resistance terms
//############################################################################
double Rcom, XLcom, Rvir; // impedances
double iqf, idf, a_f2; // filtered currents related parameters
//############################################################################
// PWM control parameters & Timing Parameters
//############################################################################
double Vout, VPWM; // actual commanded voltage and the its PWM value
double fact_v; // conversion factor from Vout ---> VPWM
double theta_angs; // the inverter output angle
double cs, sn; // cosine and sine of the inverter angle
double dt; // Cycle duration
int PRD, PRD2; // PWM register values
251
double PI2_i; // PI related constants
double PI2; // PI related constants
double PI_2; // PI related constants
//###########################################################################
int kx=0;
double fxd;
int FLG=1;
int Kl2;
double tt=0;
int fy=0;
double f_of=1;
int chK1=0;
double time3=0;
int kxv=0;
int iu=0;
int mode_con=0;
void main(void)
{
InitSysCtrl(); // Basic Core Init from DSP2833x_SysCtrl.c
EALLOW;
SysCtrlRegs.WDCR= 0x00AF; // Re-enable the watchdog
EDIS; // 0x00AF to NOT disable the Watchdog,
Prescaler = 64
AdcRegs.ADCTRL1.all = 0;
AdcRegs.ADCTRL1.bit.ACQ_PS = 7; // 7 = 8 x ADCCLK
AdcRegs.ADCTRL1.bit.SEQ_CASC =1; // 1=cascaded sequencer
AdcRegs.ADCTRL1.bit.CPS = 0; // divide by 1
AdcRegs.ADCTRL1.bit.CONT_RUN =0; // single run mode
AdcRegs.ADCTRL2.all = 0;
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // 1=enable SEQ1 interrupt
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 =1; // 1=SEQ1 start from ePWM_SOCA trigger
252
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1;
AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0; // 0= interrupt after every end of sequence
EALLOW;
// PieVectTable.TINT0 = &cpu_timer0_isr;
PieVectTable.ADCINT = &adc_isr;
EDIS;
IER |=1;
253
EINT;
ERTM;
fdel_1=83;
fx=41;
delta2=0;
delta=0;
S_delta=2*PI*52*13.125;
alpha=0;
beta=0;
phi=0;
indx=0;
pi_2=2*PI;
wq=210.0;
Kp=68.5;
Ki=1524*dt;
a1=wq*dt;
err_TDPLL=0;
i=0;
a_f1=1;
iq=0;
id=0;
KG_dt=10*dt;
Vref=170;
V=Vref;
wref=2*PI*60;
wf=377;
d_phi=0;
Kfp=fy*0.0005/1.414+(1-fy)*0.0005;
Kfq=-fy*0.0005/1.414-(1-fy)*0.0005;
Kvp=fy*0.001/1.414+(1-fy)*0.001;
Kvq=fy*0.001/1.414+(1-fy)*0.001;
Rcom=0*0.5;//2.182;//0.5;
XLcom=0*0.5;//0.5;
Rvir=0*0.5;
iqf=0;
idf=0;
a_f2=0.00001;//0.001;
fact_v=0.004899;
theta_angs=0;
cs=1;
sn=0;
dt=0.00005;
PRD2=625;
PRD=1250;
PI2_i=1/(2*PI);
PI2=2*PI;
PI_2=PI/2;
for(iu=0;iu<700;iu++)
254
curr_sv2[iu]=0;
while(1)
{
// wait for 50 s
EALLOW;
SysCtrlRegs.WDKEY = 0xAA;
SysCtrlRegs.WDKEY = 0x55; // Service watchdog #1
SysCtrlRegs.WDKEY = 0xAA;
EDIS;
}
}
void Gpio_select(void)
{
EALLOW;
GpioCtrlRegs.GPAMUX1.all = 0; // GPIO15 ... GPIO0 = General Puropse I/O
GpioCtrlRegs.GPAMUX2.all = 0; // GPIO31 ... GPIO16 = General Purpose I/O
GpioCtrlRegs.GPBMUX1.all = 0; // GPIO47 ... GPIO32 = General Purpose I/O
GpioCtrlRegs.GPBMUX2.all = 0; // GPIO63 ... GPIO48 = General Purpose I/O
GpioCtrlRegs.GPCMUX1.all = 0; // GPIO79 ... GPIO64 = General Purpose I/O
GpioCtrlRegs.GPCMUX2.all = 0; // GPIO87 ... GPIO80 = General Purpose I/O
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // ePWM1A active
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // ePWM1B active
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // ePWM2A active
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // ePWM2B active
GpioCtrlRegs.GPADIR.all = 0;
GpioCtrlRegs.GPADIR.bit.GPIO9 = 1; // peripheral explorer: LED LD1 at GPIO9
GpioCtrlRegs.GPADIR.bit.GPIO11 = 1; // peripheral explorer: LED LD2 at GPIO11
GpioCtrlRegs.GPADIR.bit.GPIO14 = 1;
GpioCtrlRegs.GPBDIR.all = 0; // GPIO63-32 as inputs
GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1; // peripheral explorer: LED LD3 at GPIO34
GpioCtrlRegs.GPBDIR.bit.GPIO49 = 1; // peripheral explorer: LED LD4 at GPIO49
GpioCtrlRegs.GPCDIR.all = 0; // GPIO87-64 as inputs
EDIS;
}
EALLOW;
SysCtrlRegs.WDKEY = 0xAA;
SysCtrlRegs.WDKEY = 0x55; // Service watchdog #1
SysCtrlRegs.WDKEY = 0xAA;
EDIS;
255
v=-v*1.046+0.2+14-4.5+0.65;
v=(v*24.16-205)*2-12-8.9;
v=-v-6.5;
timex=timex+dt;
if (timex>30){
//timex=0;
//f_of=1-f_of;
kxv=kxv+1;
if (kxv>699)
kxv=699;
curr_sv2[kxv]=v;
//wf=377-f_of;
}
if (theta_angs>PI2)
theta_angs-=PI2;
sn=sin(theta_angs); // the sine and
cs=cos(theta_angs); // the cosine values of the inverter angle used by the control system
if (VPWM>PRD) // emsuring
VPWM=PRD; // that VPWM
if (VPWM<0) // lies in the
VPWM=0; // implementable range of values
void Setup_ePWM1(void)
{
EPwm1Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 3; // HSPCLKDIV = 2
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // up - down mode
//EPwm1Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up
EPwm1Regs.AQCTLA.bit.ZRO=1;
EPwm1Regs.AQCTLA.bit.CAU=2;
256
EPwm1Regs.AQCTLB.bit.ZRO=2;
EPwm1Regs.AQCTLB.bit.CAU=1; // clear ePWM1A on CMPA down
//EPwm1Regs.AQCTLB.all = 0x0090; // clear ePWM1B on CMPA up
// set
ePWM1B on CMPA down
EPwm2Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 3; // HSPCLKDIV = 2
EPwm2Regs.TBCTL.bit.CTRMODE = 0; // up - down mode
//EPwm1Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up
EPwm2Regs.AQCTLA.bit.ZRO=2;
EPwm2Regs.AQCTLA.bit.CAU=1;
EPwm2Regs.AQCTLB.bit.ZRO=1;
EPwm2Regs.AQCTLB.bit.CAU=2;
// clear ePWM1A on CMPA down
//EPwm1Regs.AQCTLB.all = 0x0090; // clear ePWM1B on CMPA up
// set ePWM1B on CMPA down
EPwm2Regs.TBPRD = 1250; // 1KHz - PWM signal
EPwm2Regs.CMPA.half.CMPA = 625; // 100% duty cycle first
EPwm1Regs.DBCTL.bit.IN_MODE=0;
EPwm1Regs.DBCTL.bit.POLSEL = 2;
EPwm1Regs.DBCTL.bit.OUT_MODE=3;
EPwm1Regs.DBFED=10;
EPwm1Regs.DBRED=10;
EPwm2Regs.DBCTL.bit.IN_MODE=0;
EPwm2Regs.DBCTL.bit.POLSEL = 2;
EPwm2Regs.DBCTL.bit.OUT_MODE=3;
EPwm2Regs.DBFED=2;
EPwm2Regs.DBRED=2;
}
//===========================================================================
// End of SourceCode.
//===========================================================================
257
// CPU Timer0 ISR every 100 ms
// Watchdog active , cleared in ISR and main-loop
//
//###########################################################################
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|======|===============================================
// 3.0 | 30 Jun 2009 | F.B. | Lab8_1 for F28335CC + peripheral explorer
// 3.1 | 09 Nov 2009 | F.B | Lab8_1 for F28335 and PE revision 5
//###########################################################################
#include "DSP2833x_Device.h"
#include "math.h"
#define PI 3.141592654
// Global Variables
unsigned int Voltage;
unsigned int current;
double wq;
double Kp;
double Ki;
double a1;
double vg;
double pi_2;
258
double ir; // recived current from sensor
double i; // recived current after digital filter
double a_f1; // filter parameter
double idq; // estimation error current
double iq, id; // dq current componenets
double KG_dt; // dq current current estimation gain
double v;
//############################################################################
// Droop Control
//############################################################################
double P, Q; //real and reactive powers
double Vref, V; // reference and output voltage
double wref, wf, wfx, d_phi; // frequeny
double Kfp, Kfq, Kvp, Kvq; // droop parameters
//############################################################################
// Voltage compensation and virtual resistance terms
//############################################################################
double Rcom, XLcom, Rvir; // impedances
double iqf, idf, a_f2; // filtered currents related parameters
//############################################################################
// PWM control parameters & Timing Parameters
//############################################################################
double Vout, VPWM; // actual commanded voltage and the its PWM value
double fact_v; // conversion factor from Vout ---> VPWM
double theta_angs; // the inverter output angle
double cs, sn; // cosine and sine of the inverter angle
double dt; // Cycle duration
int PRD, PRD2; // PWM register values
double PI2_i; // PI related constants
double PI2; // PI related constants
double PI_2; // PI related constants
//###########################################################################
int kx=0;
double fxd;
int FLG=1;
int Kl2;
double tt=0;
int fy=0;
double f_of=1;
double theta_angs3=0, sn3=0, cs3=1, iq3=0, id3=0, Vq3=0, Vd3=0;
int chK=0, ic;
double P_f=0, Q_f=0, ax3=0.001;
259
double vdq, vq3=0, vd3=0, vq=0, vd=0;
void main(void)
{
InitSysCtrl(); // Basic Core Init from DSP2833x_SysCtrl.c
EALLOW;
SysCtrlRegs.WDCR= 0x00AF; // Re-enable the watchdog
EDIS; // 0x00AF to NOT disable the Watchdog,
Prescaler = 64
AdcRegs.ADCTRL1.all = 0;
AdcRegs.ADCTRL1.bit.ACQ_PS = 7; // 7 = 8 x ADCCLK
AdcRegs.ADCTRL1.bit.SEQ_CASC =1; // 1=cascaded sequencer
AdcRegs.ADCTRL1.bit.CPS = 0; // divide by 1
AdcRegs.ADCTRL1.bit.CONT_RUN =0; // single run mode
AdcRegs.ADCTRL2.all = 0;
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // 1=enable SEQ1 interrupt
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 =1; // 1=SEQ1 start from ePWM_SOCA trigger
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1;
AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0; // 0= interrupt after every end of sequence
260
EPwm4Regs.TBPRD = 1250; // TPPRD +1 = TPWM / (HSPCLKDIV * CLKDIV *
TSYSCLK)
// = 50 s
EALLOW;
// PieVectTable.TINT0 = &cpu_timer0_isr;
PieVectTable.ADCINT = &adc_isr;
EDIS;
IER |=1;
EINT;
ERTM;
i=0;
a_f1=1;
iq=0;
id=0;
dt=0.00005;
KG_dt=40*dt;
wq=p1+p2+p3;//210.0;
Kp=(p1*p2+p2*p3+p3*p1)/wq;//68.5;
Ki=p1*p2*p3/wq*dt;//1524*dt;
a1=wq*dt;
fdel_1=83;
fx=41;
delta2=0;
261
delta=0;
S_delta=2*PI*52/Ki;
alpha=0;
beta=0;
phi=0;
indx=0;
pi_2=2*PI;
Vref=150;
V=Vref;
wref=2*PI*60;
wf=377;
d_phi=0;
Kfp=fy*0.0005/1.414+(1-fy)*0.0005;
Kfq=-fy*0.0005/1.414-(1-fy)*0.0005;
Kvp=fy*0.001/1.414+(1-fy)*0.001;
Kvq=fy*0.001/1.414+(1-fy)*0.001;
Rcom=0*0.5;//2.182;//0.5;
XLcom=0*0.5;//0.5;
Rvir=0*0.5;
iqf=0;
idf=0;
a_f2=0.00001;//0.001;
fact_v=0.004899;
theta_angs=0;
cs=1;
sn=0;
PRD2=625;
PRD=1250;
PI2_i=1/(2*PI);
PI2=2*PI;
PI_2=PI/2;
for (ic=0;ic<400;ic++){
curr_sv[ic]=0;
curr_sv2[ic]=0;
curr_sv3[ic]=0;
}
for (ic=0;ic<500;ic++){
sig_save[ic]=0;
}
while(1)
{
// wait for 50 s
EALLOW;
SysCtrlRegs.WDKEY = 0xAA;
SysCtrlRegs.WDKEY = 0x55; // Service watchdog #1
SysCtrlRegs.WDKEY = 0xAA;
EDIS;
}
262
}
void PLL_matching(void){
indx=indx+1;
if (indx>499){
indx=0;
}
cs=cos(phi);
sn=sin(phi);
sig_save[indx]=-sn*(v)*0.01;
inda1=indx;
inda2=inda1-fx;
if (inda2<0)
inda2=inda2+500;
inda3=inda2-fx;
if (inda3<0)
inda3=inda3+500;
indb1=inda1-fdel_1;
if (indb1<0)
indb1=indb1+500;
indb2=indb1-fx;
if (indb2<0)
indb2=indb2+500;
indb3=indb2-fx;
if (indb3<0)
indb3=indb3+500;
indc1=indb1-fdel_1;
if (indc1<0)
indc1=indc1+500;
indc2=indc1-fx;
if (indc2<0)
indc2=indc2+500;
indc3=indc2-fx;
if (indc3<0)
indc3=indc3+500;
alpha=sig_save[indb2]+0.5*sig_save[indb1]+0.5*sig_save[indb3];
263
beta1=0.5*(sig_save[inda2]+0.5*sig_save[inda1]+0.5*sig_save[inda3]);
beta2=0.5*(sig_save[indc2]+0.5*sig_save[indc1]+0.5*sig_save[indc3]);
beta=beta1+beta2;
delta=0.5*(alpha+beta);
if (timex>2){
delta2=delta2+a1*(delta-delta2);
S_delta=S_delta+delta2;
w_TDPLL=Kp*delta2+Ki*S_delta;
if (w_TDPLL<0)
w_TDPLL=0;
phi=phi+dt*w_TDPLL;
if (phi>pi_2)
{
phi=phi-pi_2;
}
if (abs(delta2)<0.05)
{
time3=time3+dt;
}
else
{
time3=0;
}
if (time3>0.5){
if (abs(phi)<0.02){
theta_angs=phi-0.01;
chK=1;
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // ePWM1A active
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // ePWM1B active
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // ePWM2A active
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // ePWM2B active
EDIS;
}
}
}
}
void Gpio_select(void)
{
EALLOW;
GpioCtrlRegs.GPAMUX1.all = 0; // GPIO15 ... GPIO0 = General Puropse I/O
GpioCtrlRegs.GPAMUX2.all = 0; // GPIO31 ... GPIO16 = General Purpose I/O
GpioCtrlRegs.GPBMUX1.all = 0; // GPIO47 ... GPIO32 = General Purpose I/O
GpioCtrlRegs.GPBMUX2.all = 0; // GPIO63 ... GPIO48 = General Purpose I/O
GpioCtrlRegs.GPCMUX1.all = 0; // GPIO79 ... GPIO64 = General Purpose I/O
GpioCtrlRegs.GPCMUX2.all = 0; // GPIO87 ... GPIO80 = General Purpose I/O
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0; // ePWM1A active
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0; // ePWM1B active
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 0; // ePWM2A active
264
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 0; // ePWM2B active
GpioDataRegs.GPADAT.bit.GPIO4=0;
GpioDataRegs.GPADAT.bit.GPIO5=0;
EDIS;
}
EALLOW;
SysCtrlRegs.WDKEY = 0xAA;
SysCtrlRegs.WDKEY = 0x55; // Service watchdog #1
SysCtrlRegs.WDKEY = 0xAA;
EDIS;
if (chK==0){
PLL_matching();
}
else{
265
idq=ir-iq*cs-id*sn-iq3*cs3-id3*sn3;
// the estimation of the
iq=iq+KG_dt*idq*cs; // iq
id=id+KG_dt*idq*sn; // and id values
vdq=v-vq*cs-vd*sn-vq3*cs3-vd3*sn3;
// the estimation of the
vq=vq+KG_dt*vdq*cs; // iq
vd=vd+KG_dt*vdq*sn; // and id values
if (timex>10){
iq3=iq3+KG_dt*idq*cs3; // iq
id3=id3+KG_dt*idq*sn3; // and id values
vq3=vq3+KG_dt*vdq*cs3;
// iq
vd3=vd3+KG_dt*vdq*sn3;
// and id values
}
else{
iq3=0; // iq
id3=0; // and id values
}
if (timex>5){
P=V*iq;
// real and
Q=V*id;
P_f=P_f+ax3*(P-P_f);
Q_f=Q_f+ax3*(Q-Q_f);
// reactive power values
}
else{
P=0;
Q=0;
}
wf=377.04-0.001*P_f;
266
VPWM=(Vout*fact_v)*PRD2+PRD2; // converting Vout --> VPWM
if (VPWM>PRD) // emsuring
VPWM=PRD; // that VPWM
if (VPWM<0) // lies in the
VPWM=0;
// implementable range of values
void Setup_ePWM1(void)
{
EPwm1Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 3; // HSPCLKDIV = 2
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // up - down mode
//EPwm1Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up
EPwm1Regs.AQCTLA.bit.ZRO=1;
EPwm1Regs.AQCTLA.bit.CAU=2;
EPwm1Regs.AQCTLB.bit.ZRO=2;
EPwm1Regs.AQCTLB.bit.CAU=1;
// clear ePWM1A on CMPA down
//EPwm1Regs.AQCTLB.all = 0x0090; // clear ePWM1B on CMPA up
// set ePWM1B on CMPA down
EPwm1Regs.TBPRD = PRD; // 1KHz - PWM signal
EPwm1Regs.CMPA.half.CMPA = PRD2; // 100% duty cycle first
EPwm2Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 3; // HSPCLKDIV = 2
EPwm2Regs.TBCTL.bit.CTRMODE = 0; // up - down mode
//EPwm1Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up
EPwm2Regs.AQCTLA.bit.ZRO=2;
EPwm2Regs.AQCTLA.bit.CAU=1;
EPwm2Regs.AQCTLB.bit.ZRO=1;
EPwm2Regs.AQCTLB.bit.CAU=2;
// clear ePWM1A on CMPA down
//EPwm1Regs.AQCTLB.all = 0x0090; // clear ePWM1B on CMPA up
// set ePWM1B on CMPA down
EPwm2Regs.TBPRD = 1250; // 1KHz - PWM signal
EPwm2Regs.CMPA.half.CMPA = 625; // 100% duty cycle first
EPwm1Regs.DBCTL.bit.IN_MODE=0;
EPwm1Regs.DBCTL.bit.POLSEL = 2;
EPwm1Regs.DBCTL.bit.OUT_MODE=3;
EPwm1Regs.DBFED=10;
EPwm1Regs.DBRED=10;
EPwm2Regs.DBCTL.bit.IN_MODE=0;
EPwm2Regs.DBCTL.bit.POLSEL = 2;
EPwm2Regs.DBCTL.bit.OUT_MODE=3;
EPwm2Regs.DBFED=2;
267
EPwm2Regs.DBRED=2;
//===========================================================================
// End of SourceCode.
//===========================================================================
/*************************************************************************************
*********/
// Headers and Libraries
/*************************************************************************************
*********/
#include<cdefbf506f.h>
#include<time.h>
#include<stdio.h>
#include<sysreg.h>
#include<signal.h>
#include<sys\exception.h>
#include<math.h>
/*************************************************************************************
*********/
// General System Parameters and Constants
/*************************************************************************************
*********/
268
#define TMR_clock (sys_clock)
// Defining PWM period, PWM dead time, Syn Width and Timer Period
#define PWM_Period (PWM_clock *1000 / PWM_freq / 2)
#define PWM_DeadTime (Deadtime / 1000 * PWM_clock / 2 / 1000)
#define PWM_SyncWidth (SyncWidth / 1000 * PWM_clock / 1000)
#define TIMER_Period (TMR_clock *1000 / SWTNG_freq )
#define B_Size (SWTNG_freq / Fundamental_freq)
/*************************************************************************************
*********
// prototypes//
/*************************************************************************************
*********/
void Init_portPWM(void);
void PWM_Init(int Param_Period, int Param_Deadtime, int Param_SyncWidth, int update_mode);
void Enable_PWM(void);
void Disable_PWM(void);
void PWM_dutycycle(int);
void TEST_PWM(void);
void Init_Interrupts(void);
void Init_Ports(void);
void Init_DMA(void);
void Init_PWM(void);
void Init_ACM(void);
void Init_SPORT(void);
void Disable_ACM(void);
void ini_var(void);
int bin_search(double);
/*************************************************************************************
*********/
//Constants for Algorithms
/*************************************************************************************
*********/
#define pi 3.14159265358
#define N 500
// Constants for PLL
/*************************************************************************************
*********/
//Interrupt Handlers
/*************************************************************************************
*********/
EX_INTERRUPT_HANDLER(EVENT_STATUS_INTERRUPT);
EX_INTERRUPT_HANDLER(EVENT_MISSED_INTERRUPT);
EX_INTERRUPT_HANDLER(Sport1_RX_ISR);
EX_INTERRUPT_HANDLER(PF_interrupt_A);
EX_INTERRUPT_HANDLER(PF_interrupt_B);
EX_INTERRUPT_HANDLER(Timer0_ISR);
/*************************************************************************************
*********/
//Variable Intialization
269
/*************************************************************************************
*********/
int indx;
int inda1, inda2, inda3;
int indb1, indb2, indb3;
int indc1, indc2, indc3;
double res_1[500]={0};
double res_2[500]={0};
270
double sineSaved[1250];
int kx1=0;
double time2=0;
ini_var();
/*********************************************************************/
// Intialization of Pheripherals and Modules
/*********************************************************************/
Init_DMA();
// Initalization of All the ports for PWM, ADC, SPORT, DMA and ACM
Init_Ports();
/*********************************************************************/
//Generation of DSP Shutdown,DSP clear and Relay Pulses
/*********************************************************************/
271
// Configuring PF9 for GPIO
*pPORTF_FER = ~(PF9|PF8);
//*pPORTF_FER = ~PF8;
/*********************************************************************/
//Intialization of Timer and timer interrupt
/*********************************************************************/
*pPWM0_SEG = 0x013F;
*pPORTFIO_SET = 0x0200;
while(1)
{
//asm("nop");
}
Disable_ACM();
}
void ini_var(){
//*pPORTFIO_SET = 0x0200;
272
dt=0.00005025;
KG_dt=20*dt;
timex=0;
timex3=0;
double p1=70,p2=60,p3=60;
wq=p1+p2+p3;//210.0;
Kp=(p1*p2+p2*p3+p3*p1)/wq;//68.5;
Ki=p1*p2*p3/wq*dt;//1524*dt;
a1=wq*dt;
wf1=2*pi*60;
wf2=2*pi*57;
wf=wf2;
fdel_1=83;
fx=41;
delta2=0;
delta=0;
S_delta=2*pi*52/Ki;
alpha=0;
beta=0;
phi=0;
delta2_g=0;
delta_g=0;
S_delta_g=2*pi*52/Ki;
alpha_g=0;
beta_g=0;
phi_g=0;
indx=0;
pi_2=2*pi;
PRD2=625;
PRD=1250;
ax=0.04;
ax2=0.0002;
ax3=0.001;
Ki_i=10*dt;
in_bs[0]=256;
in_bs[1]=128;
in_bs[2]=64;
in_bs[3]=32;
in_bs[4]=16;
in_bs[5]=8;
in_bs[6]=4;
in_bs[7]=2;
in_bs[8]=1;
for (ic=0;ic<500;ic++){
sig_save[ic]=0;
res_1[ic]=0;
res_2[ic]=0;
}
double pi_sv=2*pi/1000.0;
double ang=0;
int iz;
for (iz=0;iz<1250;iz++){
sineSaved[iz]=sin(ang);
ang=ang+pi_sv;
}
Tab_fac=1000/(2*pi);
273
}
EX_INTERRUPT_HANDLER(Timer0_ISR)
{
//******************************************************************************
*//
//******************************** adc data accessing *************************//
//******************************************************************************
*//
PWM_dutycycle(VPWM);
//*pPORTFIO_SET = 0x0200;
*pTIMER_STATUS = 0x0001;
time1=time1+dt;
if(Rx_Buffer[1]&0x0400)
voltage2 = (~Rx_Buffer[1]+0x0001)&0x07FF;
else
voltage2= -Rx_Buffer[1];
if(Rx_Buffer[2]&0x0400)
voltage = (~Rx_Buffer[2]+0x0001)&0x07FF;
else
voltage = -Rx_Buffer[2];
if(Rx_Buffer[3]&0x0400)
current = (~Rx_Buffer[3]+0x0001)&0x07FF;
else
current =-Rx_Buffer[3];
ir=((current-11.125)*0.09144375+0.025);
voltage2=voltage2-4.4;
voltage2=voltage2*0.2121;
voltage2=-voltage2-1.125;
ax=1;
vol_g=voltage2+1.0-2.5;
voltage=voltage-4.4;
voltage=voltage*0.2121;
voltage=-voltage-1.125;
vol_f=voltage+1.0;
indx=indx+1;
if (indx>499){
indx=0;
}
if (time1>20){
274
if(chK==0){
chK=1;
*pPWM0_SEG = 0x0103;
}
idq=ir-cs*iq-sn*id;
iq=iq+KG_dt*idq*cs;
id=id+KG_dt*idq*sn;
id_err=id_ref-id;
iq_err=iq_ref-iq;
ids=ids+Ki_i*id_err;
iqs=iqs+Ki_i*iq_err;
Vdso=Kp_i*id_err+ids;
Vqso=Kp_i*iq_err+iqs;
Vout_cc=cs*Vqso+sn*Vdso;
Vout=Vout_cc;
VPWM=Vout*5;
if(VPWM>1024)
VPWM=1024;
if(VPWM<-1024)
VPWM=-1024;
x1=phi*Tab_fac;
q1=bin_search(x1);
fac_x1=x1-q1;
cs=sineSaved[q1+250]+(sineSaved[q1+1+250]-sineSaved[q1+250])*fac_x1;
sn=sineSaved[q1]+(sineSaved[q1+1]-sineSaved[q1])*fac_x1;
sig_save[indx]=-sn*vol_f*0.0135;
inda1=indx;
inda2=inda1-fx;
if (inda2<0)
inda2=inda2+500;
inda3=inda2-fx;
if (inda3<0)
inda3=inda3+500;
indb1=inda1-fdel_1;
275
if (indb1<0)
indb1=indb1+500;
indb2=indb1-fx;
if (indb2<0)
indb2=indb2+500;
indb3=indb2-fx;
if (indb3<0)
indb3=indb3+500;
indc1=indb1-fdel_1;
if (indc1<0)
indc1=indc1+500;
indc2=indc1-fx;
if (indc2<0)
indc2=indc2+500;
indc3=indc2-fx;
if (indc3<0)
indc3=indc3+500;
alpha=sig_save[indb2]+0.5*(sig_save[indb1]+sig_save[indb3]);
beta1=(0.5*sig_save[inda2]+0.25*(sig_save[inda1]+sig_save[inda3]));
beta2=(0.5*sig_save[indc2]+0.25*(sig_save[indc1]+sig_save[indc3]));
beta=beta1+beta2;
delta=-0.5*(alpha+beta);
////////////////////////////////////////////////////////
if (time1>2){
delta2=delta2+a1*(delta-delta2);
S_delta=S_delta+delta2;
w_TDPLL=Kp*delta2+Ki*S_delta;
phi=phi+dt*w_TDPLL;
if (phi>pi_2)
phi=phi-pi_2;
}
276
grid_save[indx]=-sn_g*vol_g*0.0135;
alpha_g=grid_save[indb2]+0.5*(grid_save[indb1]+grid_save[indb3]);
beta1_g=(0.5*grid_save[inda2]+0.25*(grid_save[inda1]+grid_save[inda3]));
beta2_g=(0.5*grid_save[indc2]+0.25*(grid_save[indc1]+grid_save[indc3]));
beta_g=beta1_g+beta2_g;
delta_g=-0.5*(alpha_g+beta_g);
////////////////////////////////////////////////////////
if (time1>2){
delta2_g=delta2_g+a1*(delta_g-delta2_g);
S_delta_g=S_delta_g+delta2_g;
w_TDPLL_g=Kp*delta2_g+Ki*S_delta_g;
phi_g=phi_g+dt*w_TDPLL_g;
if (phi_g>pi_2)
phi_g=phi_g-pi_2;
}
////////////////////////////////////////////////////////////////////////////////////////////////////////
time2=time2+dt;
if (start_m==1){
if (time2>0.2){
time2=0;
kx1=kx1+1;
if (kx1>498)
kx1=499;
res_1[kx1]=phi_err;//delta//vol_f*0.0135;//;
res_2[kx1]=iq_ref;
}
}
if (time1>50){
if (time1<50.01)
//iq_ref=3;
//id_ref=1;
*pPORTFIO_CLEAR = 0x0200;
}
if (time1>70){
phi_errx=phi_g-phi;
if(start_m==0)
if (phi_errx>0){
if (phi_errx<0.5)
if (phi>0.2){
phi_err=phi_g-phi;
start_m=1;
}
}
if (start_m==1){
277
phi_errx=phi_g-phi;
if ((phi_errx-phi_err)>pi){
phi_err=phi_g-phi-pi_2;
}
if((phi_errx-phi_err)<-pi){
phi_err=phi_g-phi+pi_2;
}
phi_err_sum=phi_err_sum+Ki_mat*phi_err;
iq_ref=Kp_mat*phi_err+phi_err_sum;
if (phi_err<0.1){
if (phi_err>-0.1)
tim_mat=tim_mat-dt;
else
tim_mat=1;
}
}
if (tim_mat<0)
*pPORTFIO_SET = 0x0200;
}
///////////////////////////////////////////////////////////
//*pPORTFIO_CLEAR = 0x0200;
}
final_count=clock();
double sec=((double)(final_count-start_count))/CLOCKS_PER_SEC;
278
// init the PWM block
PWM_Init(PWM_Period, PWM_DeadTime, PWM_SyncWidth, Update_mode);
// Enable PWM
//Enable_PWM();
/*************************************************************************************
**********
* Function: Init_portPWM
* Description: PIN intialization
**************************************************************************************
**********/
void Init_portPWM(void)
{
// pin muxing
/* Enable PWM0_AH,PWM0_AL,PWM0_TRIP, PWM0_SYNC, PWM0_BH, BL, CH, CL */
*pPORTF_MUX |= 0x4050;
*pPORTF_FER |= (PF15 | PF14 | PF8 | PF7 | PF6 | PF5 | PF4 | PF3 | PF2 | PF1 | PF0);
}
/*************************************************************************************
**********
* Function: Enable_PWM
* Description: Enable PWM0
**************************************************************************************
**********/
void Enable_PWM(void)
{
// now enable the PWM unit
*pPWM0_CTRL |= 0x0001;
}
/*************************************************************************************
**********
* Function: Initialize_PWM
* Description: Initializes PWM module
**************************************************************************************
**********/
//PWM period, half the value to the timer0 period register based on SCLK
//*pPWM0_TM = Param_Period;
*pPWM0_TM = TIMER_Period/2;
279
*pPWM0_SEG = 0x0103;
/*************************************************************************************
**********
* Function: PWM_dutycycle
* Description: Assign dutycycle
**************************************************************************************
**********/
void PWM_dutycycle(dutyCycle)
{
//Duty cylce of Channel A
*pPWM0_CHA = dutyCycle;
/*************************************************************************************
**********
* Function: Disable_PWM
* Description: Disable PWM module
**************************************************************************************
**********/
void Disable_PWM(void)
{
*pPWM0_CTRL &= ~0x1;
}
/*************************************************************************************
**********
* Function: Init_ACM
* Description: Initialization of ACM module
**************************************************************************************
**********/
void Init_ACM(void)
{
// Creating Event time 50 for first event
*pACM_ET0=10;
280
// Creating Event time 700 for third event
*pACM_ET2=600;
*pACM_ET3=900;
// Write(ACM_EMSK, 0xffff, 16bit)
*pACM_EMSK=0xffff;
*pACM_ER3=0x039;
//Set proper frame sync polarity, ADC drive edge, trigger selects and Sport Unit select before
enabling SPort.
//write(ACM_TC0, 0x0001, 16bit);
//CKDIV = 'd1, Ts = 'd0 (programming ACM_TC0 at the end)
*pACM_TC0=0x000;
}
/*************************************************************************************
**********
* Function: TEST_ACM
* Description: Enables ACM modules and produces the triggering pulses
**************************************************************************************
**********/
281
//CSPOL=Active Low; ADC negedge drive; TRGSEL0=10; TRGSEL1=00; SPORT Unit 1
Selected;
*pACM_CTL=0x4022;
//Also enable ACM here so that SPort can start receiving clock as soon as it is enabled.
*pACM_CTL|=0x01;//Enable ACM
Enable_PWM();
/*************************************************************************************
**********
* Function: Init_Ports
* Description: Intializes the pheripheral, direction and edge for ACM, SPORT, DMA and PWM
**************************************************************************************
**********/
void Init_Ports(void)
{
// Intialize port F as pheripheral
*pPORTF_FER =0xFFFF;
282
*pPORTF_MUX = 0x4050;
*pPORTG_MUX = 0x0080;
*pPORTH_MUX = 0x00;
}
/*************************************************************************************
**********
* Function: Init_PWM
* Description: Intializes the PWM1 module for ACM triggering
**************************************************************************************
**********/
void Init_PWM(void)
{
// Intialize synchronous width for PWM1 module
*pPWM1_SYNCWT=0x1;
/*************************************************************************************
**********
* Function: Init_DMA
* Description: Intializes and Configures DMA module
**************************************************************************************
**********/
void Init_DMA(void)
{
//onfigure DMA module - write( SPORT1_RXDMA_CFG, 0x0087, 16bit)
*pDMA4_CONFIG=0x0086;
// 1-D DMA access, access one byte of data for every sample
*pDMA4_X_MODIFY=2;
/*************************************************************************************
**********
* Function: Init_SPORT
* Description: Intializes and Configures SPORT module
**************************************************************************************
**********/
void Init_SPORT(void)
{
// Sport accesses the ADC data and transfer to memory
283
// Word length of ADC data configuration
// Write( SPORT1_RCR2, 0x000f, 16bit)
*pSPORT1_RCR2=0x000B;
/*************************************************************************************
**********
* Function: Disable_ACM
* Description: Disables ACM, DMA and SPORT modules
**************************************************************************************
**********/
void Disable_ACM(void)
{
// Disable SPORT - write( SPORT1_RCR1, 0x0000, 16bit)
*pSPORT1_RCR1=0x00;
/*************************************************************************************
**********
* Function: Init_Interrupts
* Description: Intialization of interrupts for Events (ACM), SPORT
**************************************************************************************
**********/
void Init_Interrupts(void)
{
// Enabling Port and SPORT interrupts
*pSIC_IAR3 = 0xf54fffff;
*pSIC_IAR2 = 0xfffff1ff;
// EVENT_STATUS_INTERRUPT
*pSIC_IAR6 = 0xfffffff3;
//EVENT_MISSED_INTERRUPT
*pSIC_IAR5 = 0x2fffffff;
// Masking interrupts
284
*pSIC_IMASK0 = 0x60040000;
*pSIC_IMASK1 = 0x00018000;
}
/*************************************************************************************
**********
* Function: EX_INTERRUPT_HANDLER
* Description: Checks the event status, and updates the buffers
**************************************************************************************
**********/
EX_INTERRUPT_HANDLER(EVENT_STATUS_INTERRUPT)
{
// This makes sure that the event status interrupt is getting triggered
// every time when an event is completed
test_ACM_ES[count++]=*pACM_ES;
if (*pACM_ES & 0x0004)
{
*pACM_ES = 0x0004;
}
else if (*pACM_ES & 0x0020)
{
*pACM_ES = 0x0020;
}
else if (*pACM_ES & 0x0100)
{
*pACM_ES = 0x0100;
//disable_ACM();
}
else if (*pACM_ES & 0x4000)
{
*pACM_ES = 0x4000;
//test_ACM_ES[j++]=*pACM_ES;
}
else if (*pACM_ES & 0x0002)
{
*pACM_ES = 0x0002;
}
else if (*pACM_ES & 0x0040)
{
*pACM_ES = 0x0040;
}
else if (*pACM_ES & 0x0080)
{
*pACM_ES = 0x0080;
}
else if (*pACM_ES & 0x1000)
{
*pACM_ES = 0x1000;
}
}
285
/*************************************************************************************
**********
* Function: EX_INTERRUPT_HANDLER
* Description: ISR for missed interrupts
**************************************************************************************
**********/
EX_INTERRUPT_HANDLER(EVENT_MISSED_INTERRUPT)
{
// To get this case give same ETx value for two events
if (*pACM_MS & 0x0020)
{
*pACM_MS = 0x0020;
}
}
/*************************************************************************************
**********
* Function: EX_INTERRUPT_HANDLER
* Description: ISR for SPORT
**************************************************************************************
**********/
EX_INTERRUPT_HANDLER(Sport1_RX_ISR)
{
*pDMA4_IRQ_STATUS=0x1;
}
/*************************************************************************************
**********
* Function: EX_INTERRUPT_HANDLER
* Description: ISR for PF interrupt A
**************************************************************************************
**********/
EX_INTERRUPT_HANDLER(PF_interrupt_A)
{
*pPORTFIO_CLEAR=0x0400;
}
/*************************************************************************************
**********
* Function: EX_INTERRUPT_HANDLER
* Description: ISR for PF interrupt B
**************************************************************************************
**********/
EX_INTERRUPT_HANDLER(PF_interrupt_B)
{
*pDMA4_IRQ_STATUS=0x1;
}
/*************************************************************************************
**********
* Function: Disable_ACM
* Description: Disables ACM module
286
**************************************************************************************
**********/
void disable_ACM(void)
{
// Disable SPORT
*pSPORT1_RCR1&=0xfffe;
// Disable SPORT
for(i=0;i<1000;i++)
*pSPORT1_RCR1|=0x0001;
*pACM_CTL|=0x0001;
DSP Code for Inverter #2,#3 and #4, Work as normal inverters, run in Hybrid control
//###########################################################################
//
// FILE: Lab8_1.c
//
// TITLE: DSP28335ControlCARD Analogue Input
// ADCIN_A0 , ADCIN_A1 connected to variable resistors VR1, VR2
// on Peripheral Explorer Board (3.3V...0V)
// ADC samples at 50KHz, hardware triggered by ePWM2
// Voltages are displayed alternately on 4 LEDs LD1...LD4
// (GPIO9, GPIO11, GPIO34 and GPIO49)
// CPU Timer0 ISR every 100 ms
// Watchdog active , cleared in ISR and main-loop
//
//###########################################################################
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|======|===============================================
// 3.0 | 30 Jun 2009 | F.B. | Lab8_1 for F28335CC + peripheral explorer
// 3.1 | 09 Nov 2009 | F.B | Lab8_1 for F28335 and PE revision 5
//###########################################################################
#include "DSP2833x_Device.h"
#include "math.h"
#define pi 3.141592654
// external function prototypes
extern void InitAdc(void);
extern void InitSysCtrl(void);
287
extern void InitPieCtrl(void);
extern void InitPieVectTable(void);
//extern void InitCpuTimers(void);
extern void ConfigCpuTimer(struct CPUTIMER_VARS *, float, float);
//extern void display_ADC(unsigned int);
// Global Variables
unsigned int Voltage;
unsigned int current;
double res_1[500]={0};
double res_2[500]={0};
int kx1=0;
double time2=0;
288
double i_f=0;
double ax;
double v;
double ax2, ax3;
EALLOW;
SysCtrlRegs.WDCR= 0x00AF; // Re-enable the watchdog
EDIS; // 0x00AF to NOT disable the Watchdog, Prescaler = 64
AdcRegs.ADCTRL1.all = 0;
AdcRegs.ADCTRL1.bit.ACQ_PS = 7; // 7 = 8 x ADCCLK
AdcRegs.ADCTRL1.bit.SEQ_CASC =1; // 1=cascaded sequencer
AdcRegs.ADCTRL1.bit.CPS = 0; // divide by 1
AdcRegs.ADCTRL1.bit.CONT_RUN = 0; // single run mode
AdcRegs.ADCTRL2.all = 0;
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // 1=enable SEQ1 interrupt
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 =1; // 1=SEQ1 start from ePWM_SOCA trigger
AdcRegs.ADCTRL2.bit.SOC_SEQ1=1;
AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0; // 0= interrupt after every end of sequence
289
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 11; // Setup ADCINA0 as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 7; // Setup ADCINA1 as 2nd SEQ1 conv.
*/
EALLOW;
// PieVectTable.TINT0 = &cpu_timer0_isr;
PieVectTable.ADCINT = &adc_isr;
EDIS;
290
IER |=1;
EINT;
ERTM;
var_ini();
while(1)
{
// wait for 50 s
EALLOW;
SysCtrlRegs.WDKEY = 0xAA;
SysCtrlRegs.WDKEY = 0x55; // Service watchdog #1
SysCtrlRegs.WDKEY = 0xAA;
EDIS;
}
}
void var_ini(void){
dt=0.00005;
KG_dt=5*dt;
Kp_i=15;
Ki_i=10*dt;
timex=0;
timex3=0;
wq=p1+p2+p3;//210.0;
Kp=(p1*p2+p2*p3+p3*p1)/wq;//68.5;
Ki=p1*p2*p3/wq*dt;//1524*dt;
a1=wq*dt;
wf1=2*pi*60;
wf2=2*pi*57;
wf=wf1;
fdel_1=83;
fx=41;
delta2=0;
delta=0;
S_delta=2*pi*52/Ki;
alpha=0;
beta=0;
phi=0;
indx=0;
pi_2=2*pi;
PRD2=625;
PRD=1250;
ax=0.002;
ax2=0.0002;
ax3=0.001;
fact_v=0.0049;
err_TDPLL=0;
ref_w=376.9;
delta_w=1;
K1=0;
K2=1;
theta_droop=0;
for (ic=0;ic<500;ic++){
sig_save[ic]=0;
res_1[ic]=0;
291
res_2[ic]=0;
}
}
void Gpio_select(void)
{
EALLOW;
GpioCtrlRegs.GPAMUX1.all = 0; // GPIO15 ... GPIO0 = General Puropse I/O
GpioCtrlRegs.GPAMUX2.all = 0; // GPIO31 ... GPIO16 = General Purpose I/O
GpioCtrlRegs.GPBMUX1.all = 0; // GPIO47 ... GPIO32 = General Purpose I/O
GpioCtrlRegs.GPBMUX2.all = 0; // GPIO63 ... GPIO48 = General Purpose I/O
GpioCtrlRegs.GPCMUX1.all = 0; // GPIO79 ... GPIO64 = General Purpose I/O
GpioCtrlRegs.GPCMUX2.all = 0; // GPIO87 ... GPIO80 = General Purpose I/O
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0; // ePWM1A active
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0; // ePWM1B active
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 0; // ePWM2A active
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 0; // ePWM2B active
GpioDataRegs.GPADAT.bit.GPIO4=0;
GpioDataRegs.GPADAT.bit.GPIO5=0;
EDIS;
}
EALLOW;
SysCtrlRegs.WDKEY = 0xAA;
SysCtrlRegs.WDKEY = 0x55; // Service watchdog #1
SysCtrlRegs.WDKEY = 0xAA;
EDIS;
292
time1=time1+dt;
//vg=cos(timex)+0*0.2*cos(timex3);
indx=indx+1;
if (indx>499){
indx=0;
}
cs=cos(phi);
sn=sin(phi);
sig_save[indx]=-sn*(v)*0.01;
inda1=indx;
inda2=inda1-fx;
if (inda2<0)
inda2=inda2+500;
inda3=inda2-fx;
if (inda3<0)
inda3=inda3+500;
indb1=inda1-fdel_1;
if (indb1<0)
indb1=indb1+500;
indb2=indb1-fx;
if (indb2<0)
indb2=indb2+500;
indb3=indb2-fx;
if (indb3<0)
indb3=indb3+500;
indc1=indb1-fdel_1;
if (indc1<0)
indc1=indc1+500;
indc2=indc1-fx;
if (indc2<0)
indc2=indc2+500;
indc3=indc2-fx;
if (indc3<0)
indc3=indc3+500;
alpha=sig_save[indb2]+0.5*sig_save[indb1]+0.5*sig_save[indb3];
293
beta1=0.5*(sig_save[inda2]+0.5*sig_save[inda1]+0.5*sig_save[inda3]);
beta2=0.5*(sig_save[indc2]+0.5*sig_save[indc1]+0.5*sig_save[indc3]);
beta=beta1+beta2;
delta=0.5*(alpha+beta);
if (time1>2){
delta2=delta2+a1*(delta-delta2);
S_delta=S_delta+delta2;
w_TDPLL=Kp*delta2+Ki*S_delta;
if (w_TDPLL<0)
w_TDPLL=0;
if (time1>20){
if (w_TDPLL<374)
w_TDPLL=374;
if (w_TDPLL>378)
w_TDPLL=378;
}
phi=phi+dt*w_TDPLL;
if (phi>pi_2)
phi=phi-pi_2;
w_TDPLL2=w_TDPLL2+ax2*(w_TDPLL-w_TDPLL2);
w_TDPLL4=w_TDPLL2+ax2*(w_TDPLL2-w_TDPLL4);
w_TDPLL3=w_TDPLL3+ax2*(w_TDPLL4-w_TDPLL3);
if (time1>10){
K1=(ref_w-w_TDPLL3);
if (K1>1)
K1=1;
if (K1<0)
K1=0;
K2=1-K1;
if (K1==1)
if (chK3==0){
chK3=1;
//theta_droop=phi;
}
}
}
time2=time2+dt;
if (time1>17){
if (time2>0.1){
time2=0;
kx1=kx1+1;
if (kx1>=499)
kx1=499;
res_1[kx1]=K1;
res_2[kx1]=w_TDPLL3;
}
}
294
if (time1>5){
////////#############//////////////////########################////////////
if (chK==0){
theta_droop=phi;
chK=1;
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // ePWM1A active
GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // ePWM1B active
GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // ePWM2A active
GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // ePWM2B active
EDIS;
}
else{
idq=ir-iq*cs-id*sn; // the estimation of the
iq=iq+KG_dt*idq*cs; // iq
id=id+KG_dt*idq*sn; // and id values
if (time1>10){
P=V*iq;
// real and
Q=V*id;
// reactive power values
P_f=P_f+ax3*(P-P_f);
}
else{
P=0;
Q=0;
}
if (w_droop>380)
w_droop=380;
if (w_droop<372)
w_droop=372;
theta_droop=theta_droop+dt*(K1*w_droop+K2*w_TDPLL);
if (theta_droop>pi_2){
theta_droop=theta_droop-pi_2;
}
Vout_droop=V*cos(theta_droop);
iq_err=2-iq;
id_err=0-id;
if (K1<0.1){
iq_s=iq_s+iq_err*Ki_i;
id_s=id_s+id_err*Ki_i;
}
Vqo=iq_err*Kp_i+iq_s;
Vdo=id_err*Kp_i+id_s;
295
Vout_cc=Vqo*cs+Vdo*sn; //
inverter voltage after implementing the virtual resistance
Vout=K1*Vout_droop+K2*Vout_cc;
VPWM=(Vout*fact_v)*PRD2+PRD2; // converting Vout --> VPWM
////////#############//////////////////########################////////////
if (VPWM>PRD) // emsuring
VPWM=PRD; // that VPWM
if (VPWM<0) // lies in the
VPWM=0;
// implementable range of values
void Setup_ePWM1(void)
{
EPwm1Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 3; // HSPCLKDIV = 2
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // up - down mode
EPwm1Regs.AQCTLB.bit.ZRO=2;
EPwm1Regs.AQCTLB.bit.CAU=1;
// clear ePWM1A on CMPA down
//EPwm1Regs.AQCTLB.all = 0x0090; // clear ePWM1B on CMPA up
// set
ePWM1B on CMPA down
EPwm2Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1
EPwm2Regs.TBCTL.bit.HSPCLKDIV = 3; // HSPCLKDIV = 2
EPwm2Regs.TBCTL.bit.CTRMODE = 0; // up - down mode
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EPwm2Regs.AQCTLA.bit.CAU=1;
EPwm2Regs.AQCTLB.bit.ZRO=1;
EPwm2Regs.AQCTLB.bit.CAU=2;
// clear ePWM1A on CMPA down
//EPwm1Regs.AQCTLB.all = 0x0090; // clear ePWM1B on CMPA up
// set ePWM1B on CMPA down
EPwm1Regs.DBCTL.bit.IN_MODE=0;
EPwm1Regs.DBCTL.bit.POLSEL = 2;
EPwm1Regs.DBCTL.bit.OUT_MODE=3;
EPwm1Regs.DBFED=10;
EPwm1Regs.DBRED=10;
EPwm2Regs.DBCTL.bit.IN_MODE=0;
EPwm2Regs.DBCTL.bit.POLSEL = 2;
EPwm2Regs.DBCTL.bit.OUT_MODE=3;
EPwm2Regs.DBFED=2;
EPwm2Regs.DBRED=2;
}
//===========================================================================
// End of SourceCode.
//===========================================================================
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