PD - 97031D

IRF2907ZS-7PPbF
Features
l Advanced Process Technology HEXFET Power MOSFET
l Ultra Low On-Resistance D
l 175C Operating Temperature VDSS = 75V
l Fast Switching
l Repetitive Avalanche Allowed up to Tjmax RDS(on) = 3.8m
G

Description
This HEXFET Power MOSFET utilizes the latest
S
ID = 160A
S (Pin 2, 3, 5, 6, 7)
processing techniques and advanced packaging G (Pin 1)
technology to achieve extremely low on-resistance
and world -class current ratings. Additional features
of this design are a 175C junction operating tem-
perature, fast switching speed and improved repeti-
tive avalanche rating . These features combine to
make this design an extremely efficient and reliable
device for use in Server & Telecom OR'ing and low
voltage Motor Drive Applications.

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Silicon Limited) 180 A
ID @ TC = 100C Continuous Drain Current, VGS @ 10V (See Fig. 9) 120
ID @ TC = 25C Continuous Drain Current, VGS @ 10V (Package Limited) 160
IDM Pulsed Drain Current c 700
PD @TC = 25C Maximum Power Dissipation 300 W
Linear Derating Factor 2.0 W/C
VGS Gate-to-Source Voltage 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited) d 160 mJ
EAS (tested) Single Pulse Avalanche Energy Tested Value h 410
IAR Avalanche Current c See Fig.12a,12b,15,16 A
EAR Repetitive Avalanche Energy g mJ
TJ Operating Junction and -55 to + 175 C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 10 lbfin (1.1Nm)
Thermal Resistance
Parameter Typ. Max. Units
RJC Junction-to-Case j 0.50 C/W
RCS Case-to-Sink, Flat, Greased Surface 0.50
RJA Junction-to-Ambient j 62
RJA Junction-to-Ambient (PCB Mount, steady state) ij 40

HEXFET is a registered trademark of International Rectifier.

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Static @ TJ = 25C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 75 V VGS = 0V, ID = 250A
VDSS/TJ Breakdown Voltage Temp. Coefficient 0.066 V/C Reference to 25C, ID = 1mA
RDS(on) SMD Static Drain-to-Source On-Resistance 3.0 3.8 m VGS = 10V, ID = 110A e
VGS(th) Gate Threshold Voltage 2.0 4.0 V VDS = VGS, ID = 250A
gfs Forward Transconductance 94 S VDS = 25V, ID = 110A
IDSS Drain-to-Source Leakage Current 20 A VDS = 75V, VGS = 0V
250 VDS = 75V, VGS = 0V, TJ = 125C
IGSS Gate-to-Source Forward Leakage 200 nA VGS = 20V
Gate-to-Source Reverse Leakage -200 VGS = -20V
Qg Total Gate Charge 170 260 nC ID = 110A
Qgs Gate-to-Source Charge 55 VDS = 60V
Qgd Gate-to-Drain ("Miller") Charge 66 VGS = 10V e
td(on) Turn-On Delay Time 21 ns VDD = 38V
tr Rise Time 90 ID = 110A
td(off) Turn-Off Delay Time 92 RG = 2.6
tf Fall Time 44 VGS = 10V d
LD Internal Drain Inductance 4.5 nH Between lead, D

6mm (0.25in.)
G
LS Internal Source Inductance 7.5 from package
and center of die contact S

Ciss Input Capacitance 7580 pF VGS = 0V

Coss Output Capacitance 970 VDS = 25V
Crss Reverse Transfer Capacitance 540 = 1.0MHz, See Fig. 5
Coss Output Capacitance 3750 VGS = 0V, VDS = 1.0V, = 1.0MHz
Coss Output Capacitance 650 VGS = 0V, VDS = 60V, = 1.0MHz
Coss eff. Effective Output Capacitance 1110 VGS = 0V, VDS = 0V to 60V

Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current 160 MOSFET symbol D

(Body Diode) A showing the

ISM Pulsed Source Current 700 integral reverse G

(Body Diode) c p-n junction diode.

e
S

VSD Diode Forward Voltage 1.3 V TJ = 25C, IS = 110A, VGS = 0V

trr Reverse Recovery Time 35 53 ns TJ = 25C, IF = 110A, VDD = 38V
Qrr Reverse Recovery Charge 40 60 nC di/dt = 100A/s e
Notes:
Repetitive rating; pulse width limited by Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11). avalanche performance.
Limited by TJmax, starting TJ = 25C, This value determined from sample failure population. 100%
L=0.026mH, R G = 25, IAS = 110A, VGS =10V. tested to this value in production.
Part not recommended for use above this value. This is applied to D2Pak, when mounted on 1" square PCB
Pulse width 1.0ms; duty cycle 2%. ( FR-4 or G-10 Material ). For recommended footprint and
Coss eff. is a fixed capacitance that gives the same soldering techniques refer to application note #AN-994.
charging time as Coss while VDS is rising from 0 to 80% R is measured at TJ of approximately 90C.
VDSS.

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 IRF2907ZS-7PPbF

1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
100 5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

100
4.5V
4.5V
10

60s PULSE WIDTH 60s PULSE WIDTH

Tj = 25C Tj = 175C
1 10
0.1 1 10 100 1000 0.1 1 10 100 1000
V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 200

T J = 25C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current ()

100 150

T J = 175C
T J = 25C
10 100

T J = 175C
1 50
V DS = 10V
VDS = 25V
380s PULSE WIDTH
60s PULSE WIDTH
0.1 0
1 2 3 4 5 6 7 8 0 25 50 75 100 125 150
ID,Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

vs. Drain Current

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 IRF2907ZS-7PPbF

100000 12.0
VGS = 0V, f = 1 MHZ
ID= 110A
C iss = C gs + C gd, C ds SHORTED VDS= 60V
C rss = C gd 10.0 VDS= 38V

VGS, Gate-to-Source Voltage (V)

C oss = C ds + C gd VDS= 15V
C, Capacitance(pF)

10000 Ciss 8.0

6.0
Coss
1000 Crss 4.0

2.0

100 0.0
1 10 100 0 50 100 150 200
VDS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)

1000
100
T J = 175C
1msec 100sec
100
T J = 25C
10
LIMITED BY PACKAGE
10msec
10

1
1 Tc = 25C DC
Tj = 175C
VGS = 0V Single Pulse
0.1 0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1.0 10.0 100.0
VSD, Source-to-Drain Voltage (V) VDS, Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

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 IRF2907ZS-7PPbF

200 3.0
ID = 180A

RDS(on) , Drain-to-Source On Resistance

Limited By Package
VGS = 10V
160 2.5
ID, Drain Current (A)

120 2.0

(Normalized)
80 1.5

40 1.0

0 0.5
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (C) T J , Junction Temperature (C)

Fig 9. Maximum Drain Current vs. Fig 10. Normalized On-Resistance

Case Temperature vs. Temperature

D = 0.50
Thermal Response ( Z thJC )

0.1 0.20
0.10
0.05
0.02 R1
R1
R2
R2
R3
R3 Ri (C/W) i (sec)
0.01
0.01 J
J
C

0.1072 0.000096
1 2 3
1 2 3 0.2787 0.002614
SINGLE PULSE
( THERMAL RESPONSE ) Ci= i/Ri 0.1143 0.013847
0.001 Ci i/Ri

Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF2907ZS-7PPbF

15V

DRIVER
700
VDS L

EAS , Single Pulse Avalanche Energy (mJ)

ID
600 TOP 24A
RG D.U.T + 34A
V
- DD BOTTOM 110A
IAS A 500
VGS
20V
tp 0.01
400

Fig 12a. Unclamped Inductive Test Circuit 300

V(BR)DSS
200
tp

100

0
25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
I AS

Fig 12c. Maximum Avalanche Energy

Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
QG
10 V
QGS QGD

VG
4.5
VGS(th) Gate threshold Voltage (V)

Charge 4.0

Fig 13a. Basic Gate Charge Waveform 3.5

Current Regulator 3.0

Same Type as D.U.T.

50K
2.5 ID = 250A
12V .2F ID = 1.0mA
.3F
2.0 ID = 1.0A
+
V
D.U.T. - DS
1.5
VGS

3mA 1.0
-75 -50 -25 0 25 50 75 100 125 150 175 200
IG ID
Current Sampling Resistors T J , Temperature ( C )

Fig 14. Threshold Voltage vs. Temperature

Fig 13b. Gate Charge Test Circuit
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1000
Duty Cycle = Single Pulse

Allowed avalanche Current vs

Avalanche Current (A)

100 avalanche pulsewidth, tav

0.01 assuming Tj = 25C due to
avalanche losses

0.05
10 0.10

1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

Notes on Repetitive Avalanche Curves , Figures 15, 16:

200
(For further info, see AN-1005 at www.irf.com)
TOP Single Pulse 1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
BOTTOM 1% Duty Cycle
temperature far in excess of T jmax. This is validated for
ID = 110A
EAR , Avalanche Energy (mJ)

every part type.

150 2. Safe operation in Avalanche is allowed as long asT jmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
100 4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
50 6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav f
0
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
25 50 75 100 125 150 175

Starting T J , Junction Temperature (C) PD (ave) = 1/2 ( 1.3BVIav) = DT/ ZthJC

Iav = 2DT/ [1.3BVZth]
EAS (AR) = PD (ave)tav
Fig 16. Maximum Avalanche Energy
vs. Temperature
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IRF2907ZS-7PPbF

Driver Gate Drive

P.W.
D.U.T P.W.
Period D=
Period
+

*
VGS=10V
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
- Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

RG dv/dt controlled by RG V DD Re-Applied

Driver same type as D.U.T. + Voltage Body Diode Forward Drop
I SD controlled by Duty Factor "D" - Inductor Curent
D.U.T. - Device Under Test

Ripple 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET Power MOSFETs

RD
V DS

V GS
D.U.T.
RG
+
-V DD

10V
Pulse Width 1 s
Duty Factor 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

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 IRF2907ZS-7PPbF
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)

D2Pak - 7 Pin Part Marking Information

14

Notes:
1. For an Automotive Qualified version of this part please see http://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRF2907ZS-7PPbF

D2Pak - 7 Pin Tape and Reel

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IRs Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2010
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