COST EFFECTIVE EMC DESIGN

- BACKGROUND STUDY

R.BALL/W.BURDOCK, Advanced Technology Centre

University of Warwick

1
 TABLE OF CONTENTS

1. INTRODUCTION.................................................6

2. PRINTED CIRCUIT BOARD DESIGN TECHNIQUES..7

2.1. CIRCUIT BOARD RADIATION...........7

Radiation from a Loop Antenna
Radiation from Circuit Tracks

2.2. GROUND CONSIDERATIONS...................................8

Ground Planes
Single Point Ground
Series Ground
Series/Parallel Ground
Gridded Ground

2.3. GROUND SIGNAL TYPE......11

RF Ground
Power Ground
Logic Ground
Analogue Ground.

2.4. POWER SUPPLY BUS DESIGN.......................13

Power Supply/Return Track Layout
Decoupling Capacitors
Transition Current
Radiation Loop
Capacitor Location
Capacitor Type
Multilayer Board
Raised Power Distribution Buses

2.5. SIGNAL TRACK DESIGN REQUIREMENTS..........18

High level/high power analogue signals
Low level/low power analogue signals
High frequency analogue signals
Digital signals
Printed Circuit Board/Component Layout.

3. CIRCUIT DESIGN CONSIDERATIONS FOR EMC23

3.1. Logic Selection
3.2. Input/Output Circuitry
Output Design
Input Design
2
3.3. Signal Levels
3.4. Matching & Termination

4. EMI/RFI SUPPRESSION COMPONENTS................27

4.1. Capacitors
Surface Mount Capacitors
4.2. Inductors
4.3. Radio Frequency Chokes
4.4. Non-Linear Devices
4.5. Filters
Filtered Connectors

5. INTERCONNECTION & CABLING......................32

6. SCREENING & ENCLOSURES........................33

7. EMC EFFECTS & CONSIDERATIONS FOR SOFTWARE.......34

7.1. Failure Modes of a Microprocessor System

Memory Failure
Processor Failure
Input/Output Failure
7.2. Designing Noise Tolerant Software
Detecting Errors in Program Flow
Software Checkpoints
Hardware Timers
Software Tokens
No-Op Codes
7.3. Detecting Input/Output Errors
Type and Range Checking
Software Filtering - Digital Signal
Software filtering - Analogue Signals
Echoing Outputs
7.4. Detecting Errors in Data Memory
Checksums
Cyclical Redundancy Checks
Parity
Error Correction Codes

8. CONCLUSION..................................39

9. APPENDIX 1. EMI SUPPRESSION COMPONENTS.....................................................39

9.1. TDK Small Signal EMI Components...........................39
3
9.2. muRata EMI Guard..........................................39
9.3. AMP PCB EMI Filter........................................39
9.4. AVX Filtered Connectors for EMI Suppression...............39
9.5. AVX Surface Mount Ceramic Capacitor Characteristics.......39
9.6. Nippondenso EMI Filter Array..............................39
9.7 Tatsuta Conductive Copper Paste......................

4
 LIST OF FIGURES
2.1 PCB Loop Current
2.2a Single Point Ground
2.2b Series Ground
2.2c Series/Parallel Ground
2.2d Gridded Ground
2.3 Lumped Parameters of Power and Ground Lines
2.4 Using a decoupling capacitor to reduce loop area
2.5 Alternative Groundplanes
2.6 Raised Power Distribution Busses
2.7 PCB Layouts

3.1 Bypass Capacitor on Output

3.2 Bypass Capacitor for Input Stage
3.3 Diode protected Input

4.2 Differential Mode signal flow

4.3 Common Mode noise on a Differential Circuit
4.4 Common Mode RF Choke reduces noise current

5.1 Connection of screened cables to screened enclosure

7.1 Software Checkpoint Flow Diagram.

7.2 Software Filtering - Digital Signals.

LIST OF TABLES

2-1: Characteristic Impedances of Conductor Pairs

2-2: Decoupling Capacitors
3-1: Common Logic Family Specifications
4-1: Typical Capacitor Characteristics
7-1: Software Techniques

5
 1. INTRODUCTION

With the increasing use of micro-electronic systems in vehicles it is becoming more important to make
these systems impervious to electromagnetic interference (EMI). To achieve this, the electronics and
associated equipment must be designed to a standard appropriate to meet the Electromagnetic
Compatibility (EMC) requirements for vehicle based systems.

EMI can enter a system in two ways, through the vehicles wiring harness or directly into the electronic
modules. The interference gives rise to radio frequency (RF) currents and voltages flowing in the
vehicles wiring harness and electronic modules, causing the system or module to malfunction.

Many modules contain circuitry that can generate high frequency interference which can be transmitted
from the module's circuitry through the vehicles wiring harness to other modules or radiated from a
module, causing similar effects to external EMI.

External EMI sources range from commercial broadcast equipment, mobile telephones to Citizen's
Band radio. The amplitude of these fields range from a few volts per meter to a reported 200 V/m
measured on public roads in the UK.

As a result the designer must consider the EMC requirements when designing and developing new
systems to ensure that they will work correctly in all environments encountered in normal use. Areas to
be taken into account will range from the design of the printed circuit boards through to the selection of
components, construction and interconnection of the complete system.

This report covers the background study to identify the fundamental design techniques for engineering
electronic systems that require a high degree of electromagnetic compatibility. The report details the
techniques for good ground structure design as one of the main areas of concern and combines this with
a printed circuit board design practice. Other fields covered include design of interface circuitry for
absorbing EMI and software for making the system tolerant to certain types of interfering signal.
Examples of software techniques, circuit designs and physical requirements are given that can be used to
engineer the system for electromagnetic compatibility.

EMC needn't be costly if considered early enough in the design. It doesn't always involve
extra components, shielding, or exotic components and can be done in a cost-effective
manner.

6
 2. PRINTED CIRCUIT BOARD DESIGN TECHNIQUES

When designing systems that use printed circuit boards (PCBs) for mounting and interconnecting
components, good design practices are required in order to achieve electromagnetic compatibility. The
requirements for good printed circuit board EMC can be divided into several main sections as follows:

* Ground techniques
* Power supply bussing
* Signal track design
* PCB/Component layout

The following sections detail the design considerations for electromagnetic compatibility in printed circuit
board design.

2.1. CIRCUIT BOARD RADIATION

Radiation from signal loops and circuit tracks are the two principal sources of electromagnetic radiation
from a printed circuit board. An understanding of these two radiation mechanisms is an important aspect
of designing for EMC.

The following section will investigate these two sources of radiation.

Radiation from a Loop Antenna

A loop antenna is created when current is allowed to flow round a path which encloses an area. This is
the case in most digital circuitry where switching logic is present. Figure 2-1 shows the connection of
two logic elements to a power supply. When a low to high transition occurs in the circuit a current flows
through the output impedance of the driving gate into the input capacitance of the driven gate and back
to the power supply by the ground return. The magnitude and rate of change of the current that flows in
the loop are primarily a function of the output impedance of the driving gate and the input capacitance of
the receiving gate. In addition to the current flow between gates there is also current drawn from the
supply through the output drivers in the gate to ground. This occurs as the output changes state and the
output drivers in the gate both conduct at the same time. This will produce a relatively large current flow
for a short period of time in the loop bounded by the Vcc and ground lines. The frequency of the
transient, the area of the loop and the magnitude of the current can be used to determine the radiation
that can be generated by the loop.

This can be approximated to :

7
 Radiated Power IAf ...(2.1)

where I = loop current

f = frequency determined by the logic
A = loop area.

The radiated energy can be reduced by using decoupling capacitors and careful PCB design, both of
these will be covered in more detail in section 2.4.

Radiation from Circuit Tracks

Radiation from printed circuit board tracks can become a problem when the length of the track is
significant in comparison to ?/4, where '?' is the wavelength of the frequency in question. In general the
length of a track carrying high frequency signals that are likely to radiate should if possible be kept to
less than ?/20.

The types of signal that cause radiation are, high speed logic clocks, microprocessor communication
lines and general high speed switching signals. In addition to keeping track lengths to a minimum other
techniques can be employed to reduce trace radiation, these range from layout design to special PCB
screening techniques. These will be discussed in the PCB design section.

2.2. GROUND CONSIDERATIONS

Ground structure design can be one of the most important requirements for EMC, yet one of the most
difficult requirements to define. Unfortunately, there is no single ground structure design which is
satisfactory for all designs; each application requires special consideration.

The electrical requirement of a good ground is that it should provide a low impedance path for current
to return to its source at both DC and high frequencies. This means that a good ground should not only
have a low resistance but it must also have a low inductance. A low impedance ground is of course
more important in some applications than others. In many systems that are required to be
electromagnetically compatible there is a high component density, and cost and reliability are major
factors to be taken into account. Therefore it is important that the ground structure be designed to
efficiently and effectively satisfy the system
performance requirements.
figure 2.1- PCB Loop Current

Ground Planes

The ideal EMC ground structure is a solid ground

plane which provides a stable reference for all
current returns in the system. The characteristics of
a ground plane are :-

Low inductance
8
 High capacitance
Low EMI susceptibility
Low EMI radiation
Large PCB land area
Only possible for use on double sided and multilayer boards
Signal track routing can be difficult

In most cases it is not possible to implement a full

ground plane and it is therefore necessary to have a fig 2.2(b)- Series Ground
compromise ground structure. Practical EMC
ground structure is therefore a combination of the
four basic types of ground layout, these are single
point ground, series ground, series/parallel ground
and a gridded ground, these are shown in figure 2.2
(a-d) .

Single Point Ground

fig 2.2(a)- Single Point Ground
A single point ground is where all ground return
tracks on a printed circuit board are returned to
one common point, this also applies to any wiring
associated with the module.

The single point ground is used in EMC designs

when isolation from another circuit's ground
current is required. This type of ground is typically
used where accurate references are required as in
A/D circuits or in power circuits where high
ground currents could disturb the operation of
other circuitry. The characteristics of a single
point ground are :-

High inductance compared to a ground plane.

Good isolation between circuitry.
The ground tracks on the PCB can occupy a
large amount of space.
Routing of the ground tracks can be difficult
when high component densities are present.

Series Ground

With a series ground structure a common ground return track is used for all circuitry on the same PCB.
The series ground is typically used in EMC designs when less isolation is required between circuits than
9
with a single point ground. With a series ground all ground currents flow back to the source via a
common track. This type of ground circuit can be used in designs where switching speeds are slow, and
where ground currents and voltage drops can be tolerated by other circuitry.
The characteristics of a series ground are :-

* High inductance compared to a ground plane.

* Poor EMC isolation between circuitry.
* No guaranteed stable reference ground.
* Efficient use of PCB space for ground tracks.

Series/Parallel Ground

The series/parallel ground is a combination of the series ground described above and a single point/trunk
structure where the 'trunk' is the main ground return track.

The series/parallel ground can provide better isolation than a purely series ground but not as good as a
single point system; however, can provide a good compromise between a single point system, series
ground system and a ground plane if care is taken with the design.

When designing circuits using a series/parallel structure care must be taken to ensure that the circuitry on
the common 'trunk' is compatible. For example, a power or analogue ground should not share the same
ground as that used for digital logic. Instead, logic, power and analogue grounds should be connected at
one point to achieve the best possible isolation. This results in a combination of single point and
series/parallel ground structures.

The characteristics of a series ground are :-

High inductance compared to a ground plane.

Less isolation than single point structure.
No stable ground reference unless care taken with fig 2.2(c)- Series/Parallel Ground
design.
Efficient use of PCB track space.
Gridded Ground

A gridded ground structure is shown in figure 2-2 (d),

the diagram shows that the circuit devices are
connected into a closed cell grid structure formed from
a matrix of ground tracks.
The gridded ground may be used when a ground
inductance similar to that of a ground plane is required.
A gridded ground may be required for use with certain
types of high frequency designs.
Caution is required when implementing the grid structure to avoid loops in the ground tracks where
currents can flow. If these loops are not designed carefully then they can act as receiving aerials for high
10
frequency signals and also a source of high frequency radiation. In general the gridded ground is not
normally required with conventional CMOS and bipolar logic found in automotive applications.

The characteristics of a gridded ground are :-

Inductance similar to a ground plane.

Susceptible to ground loop currents if not designed correctly.
Susceptible to EMI/RFI pick up with loop structure.
Possible source of radiation from loop structure.
Requires large amount of PCB track space for ground lines.

fig 2.2(d)- Gridded Ground

2.3. GROUND SIGNAL TYPE

The four basic ground structures discussed above

form the basis for a good EMC ground network.
Taken to its full extent, a ground structure might
comprise an RF ground, a logic ground, an analogue
ground, power grounds and various special grounds.
Schematically, these grounds will appear to be
connected together at one common point, this can be
interpreted as a single point ground structure. The complete structure must be identified fully on the
circuit diagram to allow the design to be implemented correctly.

RF Ground

The RF ground in a system should provide a low impedance path to the main power ground for any high
frequency electrical energy. The power ground should be the lowest impedance point when designing
for EMC. The RF ground serves as the ground to which input and output lines are decoupled of high
frequency components and when properly designed can be considered the single point from which other
EMC grounds originate. Taken to it's extreme, the RF ground would become a full ground plane.

Power Ground
11
The power ground provides the return for high current signals, ie output loads, it must have a low
impedance while conserving circuit board area. The power ground must originate from the power input
source to avoid disturbing other circuitry on the same board. These requirements can be obtained by
using a single point or series parallel ground structure.

Logic Ground

The logic ground must provide a low impedance inductance path for the switching currents produced by
the digital circuitry. A low inductance is required to prevent ground potentials developing when devices
have fast switching times, if this is allowed to occur then the noise immunity of the logic will be impaired
and ground reference will be lost.

With the design of many digital systems a high circuit density is required and the ground structure to
interconnect all the devices becomes complex. This can result in a combination of grounding techniques,
single point, series/parallel and gridded grounds. Care must be taken to ensure that common circuitry
shares the same ground, ground loops are avoided and the impedance of the ground structure is kept
low. Detail design of decoupling circuitry and PCB requirements will be considered in later.

Analogue Ground

The analogue ground is required to provide a stable reference for analogue signals in the system. It must
link the analogue ground at the inputs and outputs of the system to the functional circuitry without any
ground potential developing between points in the circuit. The analogue ground structure must be kept
separate from other grounds that can interfere with the analogue signal return paths, i.e. it should be
referenced to the other grounds at only one point.

2.4. POWER SUPPLY BUS DESIGN

When designing the power distribution system for a PCB, both the supply and ground returns must be
considered separately for analogue and digital circuitry. The 'Ground Structure Considerations'
section outlines the function and requirements for each type of ground found in electronic circuitry. This
section deals specifically with the power distribution requirements for both analogue and digital circuitry
found on PCBs.

The main feature of good power supply bussing is low impedance and good decoupling over a large
range of frequencies.

A low impedance distribution system requires two design features :-

Power supply feed and return track layouts

Correct use of decoupling capacitors
12
Power Supply/Return Track Layout

The bandwidth of many common logic families extends from 10 MHz to over 100 MHz as shown in
table 3.1. This range means the circuit must be capable of conducting RF energy in the HF and VHF
frequency bands. At these high frequencies the power supply rails and ground (Ov) can act like
transmission lines having a characteristic impedance Zo. The characteristic impedance of a uniform low
loss line is given by equation 2.2 and the lumped parameters illustrated in figure 2-3.

Zo = (Lo/Co) ohms ... (2.2)

where Zo = characteristic impedance

Lo = inductance per unit length of line
Co = capacitance per unit length of line

In order to achieve a low impedance the self inductance (Lo) distributed between the supply lines must
be minimized and the capacitance (Co) maximized hence lowering the impedance of the line/bus. The
reduction in inductance and use of track to track capacitance can be maximized by careful design of the
track layout.

There are three basic layout structures for power supply bussing or signal tracks, these are parallel
strips, strips over ground plane and side by side configuration. Table 2-1 details the differences in
characteristic impedance between each configuration for a range of strip sizes.

As an example of the voltage that can be generated across the impedance of a power bus, consider
LSTTL logic which draws approximately 8 mA from a supply of 25 ohm impedance (assuming no
decoupling present). The transient voltage will be approximately:

Vt = 0.008A * 25 ohm = 200 mV

which is only 100 mV less than the noise margin for fig 2.3- Lumped Parameters of Power and
that particular logic family, ie the system may be Ground Lines
susceptible to noise.

In many cases due to space and cost

considerations, it is not possible to design the board
layout to the theoretical optimum and a
compromise is necessary. In such cases the
impedance of the system may be far greater than
that which is desirable. To overcome this,
13
decoupling capacitors and multilayer boards can be used.

Decoupling Capacitors

In logic design the decoupling capacitor is of paramount importance for the correct functional operation
of the system and protection against high frequency radiation. The capacitor has two main functions,
these are :-

It supplies the transient current to the chip during switching.

It limits the size of a potential radiating loop associated with the power supply and switching gate.

Transition Current

The transition current, I, supplied to the gate during switching can be determined from :-

I = C(dV/dt)

where C = value of capacitance

dV = change in voltage at capacitor terminals
dt = logic state switching time (rise/fall time)

The voltage variation is the permissible supply voltage sag that a particular logic family can tolerate and
is determined from the noise immunity level. Table 2.2 details some of the common specifications for
various logic families and the decoupling capacitor necessary to limit the supply transient to less than
20% of the Noise Immunity Level (nil).

Table 2-2: Decoupling Capacitors for Common Logic Families

Logic Current- Current- Gate dV=20% dt=rise time Decoupling C

Family Gate Switch Drive of nil per gate

CMOS 1mA lmA 200mV 50ns 500pf

TTL 16mA 8mA 80mV 10ns 3000pf

STTL 30mA 20mA 60mV 3ns 2500pf

LSTTL 8mA 11mA 60mV 8ns 2500pf

ECL-10K 1mA 6mA 20mV 2ns 700pf

Based on a fanout of 5 gates

14
Radiation Loop

The second function of the decoupling capacitor is to reduce the power supply radiating loops which
form loop antenna. This area is covered in detail in section 2-1, Circuit Board Radiation.
To summarise, when a current (I) of frequency (f) is flowing in a loop of area (A), the radiation emitted
by the loop is proportional to :-

Radiated Power IAf ....... (2.1)

From this it can be seen that to reduce the radiation it is necessary to minimize the loop area and this
can be achieved by good PCB design practices. Figure 2-4 shows the effect of adding a decoupling
capacitor to the power supply lines of an IC. It can be seen that in case 'a' the loop is large and in case
'b' the loop is reduced and the majority of the switching current can be supplied by the capacitor. It is
important to note that the inductance present in the circuit is from the capacitor construction and leads.

Capacitor Location

In both cases the placement of the capacitor is very important since it's potential benefits can be totally
lost if the board is designed incorrectly and the capacitor positioned in the wrong place. For the best
possible results the decoupling capacitor must be situated as close to the switching device as possible.

Capacitor Type

The limitation to the frequency characteristics of

any capacitor is the self resonance caused by the figure 2.4- Using a decoupling
inductance of the capacitor lead length. The ideal capacitor to reduce loop area
device should be low loss and remain capacitive
over the whole frequency range. Aluminum and
Tantalum electrolytics should be used with caution
for decoupling since they have a low self resonant
frequency, a few hundred kHz and a few MHz
respectively. Ceramic capacitors resonate between
1 and 20 MHz, depending on the formulation and
packaging and are useful for decoupling below 50
MHz .

15
 Capacitor Type Series
Inductance
Lead type Monolithic ceramic 5nH
(0.01uF)
Lead type Monolithic ceramic 6nH
(1uF)
Disk/lead type ceramic 4.5nH
(0.0022uF)
Polyethylene Telephthalate Film 9nH
(0.03uF)
Mica (0.01uF) 52nH
Polystyrene Film (0.001uF) 12nH
Polystyrene Film (0.1uF) 100nH
Tantalum electrolytic with solid 5nH
electrolyte (16uF)
Aluminium Electrolytic (for RF 13nH
use) (470uF)
Aluminium Electrolytic (470uF) 130nH

In addition to conventionally packaged capacitors, manufacturers now produce a range of devices in

dual-in-line packages that can be inserted in parallel with a through-hole IC into the PCB. This method
of decoupling makes very efficient use of board space and ensures optimum performance if the correct
device is chosen. The function of a capacitor and its limitations will be discussed in the Suppression
Components section with additional information on the types of device available.

Multilayer Boards

Multilayer boards offer a considerable reduction in power supply impedance as well as many layout and
design benefits. From Table 2.1 it can be seen that the impedance of the multilayer construction is far
less than the single layer board.

16
For high density - high speed logic applications, multilayer boards are used extensively in the computer
industry for signal and ground planes. Unfortunately extra cost is incurred in fabrication, design and
repair of these boards. However, they do greatly reduce the effects of EMI and allow the designer close
control of impedances in the system.

fig 2.5- Alternative Groundplanes

The transition between single layer and multilayer boards is sometimes a grey area and there are no hard
and fast rule that determine when a multi-layer board becomes necessary. The major advantages of
multilayer boards are that they allow boards to be designed with high component densities and the
routing of signal and power tracks can be carried out more easily. The cost and reliability of the board
are a major factors to be considered before a multilayer approach is taken.

Raised Power Distribution Buses

Fig 2.6 Raised Power Distribution Bus

As an aid to this problem, manufacturers have produced a range of raised power distribution buses.
Figure 2-6 show typical examples of raised power bus distribution components. In all cases the
components comprise of parallel strips which have a similar impedance to the parallel strip configuration
given in Table 2.1. An advantage of using raised power bus distributors is that it allows the designer to
use the space saved for signal track layout.
17
Additional Ground Planes

A new technique has recently become available in which a conductive copper layer is deposited on top
of an existing board design. The layer is added at the time the bare board is being completed and
consists of a screen-printed layer of conductive copper paste on one or both sides of the board. The
layer is grounded by connection to existing ground tracks on the board. A typical figure of 10dB
reduction in emissions is claimed by the manufacturers.3

2.5. SIGNAL TRACK DESIGN REQUIREMENTS

In addition to power supply distribution it is necessary to consider the design of the signal tracks used to
carry both analogue and digital data between the devices on the PCB. The design of the signal tracks
can also influence the EMC performance of the complete system. The electrical properties of a signal
can be defined by the basic parameters, voltage, current and frequency. In reality signals found on a
PCB are a complex combination of these, for example the input to an amplifier might be low voltage/low
current, while the output could be high voltage/high current and high frequency. For signal tracks the
designer must ensure that there is a minimum of coupling between adjacent traces. This applies to both
analogue and digital signals, for example high voltage and current lines (such as relay drivers) should be
kept isolated from sensitive low level input circuitry (like amplifier inputs).

To achieve good EMC and circuit performance, the following basic rules should be applied when
designing PCB track layouts for a variety of signal types. Many of the techniques listed can be used to
reduce both susceptibility and radiated emissions.

High level/high power analogue signals

* These should be kept a minimum distance from any low level signal traces, the distance been
determined by the magnitude of the high power signal, the greater the separation the less the coupling
effects.

* Screening using 'guard' ground lines can be employed to provide an electrical barrier between the high
power lines and signal lines.

* Track lengths should be kept to a minimum to reduce any radiation and susceptibility to EMI/RFI and
reduce signal losses. Low level/low power analogue signals

* These should be routed away from any high power/high level lines to avoid noise pick up from
coupling effects.

* Use ground 'guard' traces to screen low level lines from radiated RF energy produced by adjacent
traces and external high energy sources.

* Avoid long signal paths and hence potential radiation pick up points and emission points, path length
should be less than ?/20.
18
* Where possible use ground planes to screen low level signal areas, this is the most effective technique
from both the emissions and susceptibility requirements.

High frequency analogue signals

Keep high frequency trace lengths as short as possible to reduce emitted radiation and pick up
points.

Route high frequency traces away from sensitive signal lines to avoid cross coupling. Use ground
'guard' traces to provide screening for reducing high frequency radiation.

Avoid using sharp corners, this is an important factor at RF frequencies since sharp corners in traces
act as points of high electrical field strength and constitute an impedance discontinuity and hence a
possible source of radiation. This is usually only applicable when the frequency is in excess of 100
MHz.

Digital signals

Use capacitance effects of guard traces to increase logic rise and fall times and hence reduce
radiated bandwidth if possible.

Avoid using sharp corners, to reduce possible radiation.

Keep high frequency trace lengths like clock lines and busses as short as possible to reduce emitted
radiation.

Route high frequency digital lines away from sensitive analogue signal lines to avoid cross coupling
and noise on analogue lines.

19
TABLE 2.2 LOGIC FAMILY CHARACTERISTICS

Logic Family O/P Rise/Fall Bandwidth Max Supply Current Input C DC noise
swing V ns MHz Vcc volt transition drive per pF mV
drop mA gate

ECL 10K 0.8 1 160 0.2 1 1.2 3 125

ECL 100K 0.8 0.75 420 0.2 100

Fast Fairchild 3 1.75 182 0.5 5 300

TTL 3.4 10 32 0.5 16 1.5 5 400

LP TTL 3.5 20/10 21 8 1.6 5 400

STTL 3.4 3/2.5 120 0.5 30 4 4 300

LS TTL 3.4 10/6 40 0.25 8 2.1 6 300

CMOS 5 90/100 12 3 1 0.2 5 1000

HC TTL 5 10 32 2 10 1 5 1000

20
Printed Circuit Board/Component Layout

The layout of both conductive tracks and components on a printed circuit board are closely related
because of circuit design and function. Both track layout and component layout are very important in
designing for EMC, careful design of the layout can save time when testing and fault finding.

Isolation of the input/output (I/O) from digital circuitry is important where emissions or susceptibility
is a problem. In the case of emissions, a frequently encountered coupling path involves digital energy
coupling through I/O circuitry and signal tracks onto I/O cables where the later subsequently radiate.
Where susceptibility is a problem, it is common for the energy picked up by I/O cables outside the
module to then couple onto sensitive digital and analogue lines. In both cases the solution lies in
obtaining good electrical and physical isolation between sensitive analogue and digital circuitry from
high speed/high energy circuits.

For emissions, the major consideration is to obtain isolation between I/O circuitry and any high
speed/high level switching or oscillator circuits. This also applies to logic clocked at a few MHz. The
square wave clock and data signals will be rich in harmonics which will be responsible for a large
amount of EMI. Figure 2-7 shows several board layouts for analogue and digital circuit mixes. In
each case the same type of circuitry is grouped together to reduce emissions and maximize isolation
between groups and therefore reducing susceptibility.

In order to obtain optimum isolation and

good overall board layout, the layout of
fig 2.7- PCB Layouts
components should ideally be positioned on
a regular grid. This has the added
advantage that all components have a
minimum space and tracking can be routed
in a regular pattern. With most computer
aided design systems for PCB work, both
of these factors can be automatically
obtained.

These guide lines when used in conjunction

with the signal track and power supply
bussing requirements should be used when
designing a PCB for EMC. Close liaison
between the module circuit design engineer,
the PCB layout engineer and the packaging
engineer are therefore essential.

21
 3. CIRCUIT DESIGN CONSIDERATIONS FOR EMC

This section of the report deals with the design practices and techniques that can be used to reduce
the effects of EMI and RFI.
Where possible standard components will be considered in the design in order to minimise cost and
other production related factors.

3.1. LOGIC SELECTION

Selecting the correct logic family is an important factor in EMC design. This is because the logic
circuitry both radiates and is susceptible to electromagnetic interference. The rise and fall times of
the logic family will determine the bandwidth of the system and hence the frequency spectrum. The
designer must not only be concerned with the basic clock frequency but also the harmonics
generated, since these may produce a greater source of radiation than the clock itself.
The following guidelines can be used to minimise radiated EMI and reduce susceptibility by
controlling logic pulse parameters :-

* Select basic clock speeds no faster than absolutely necessary to operate the system.

* Select logic families according to speed and use the slowest type that will do the job. Table 3.1
shows logic families and their corresponding parameters. It can be seen that CMOS should be used
when possible rather than the faster TTL.

* Circuit design plays an important role in RFI control for poorly designed logic functions and
incorrectly timed signals can result in transient pulses which not only prevent proper operation but
can also cause severe high frequency emissions.

* Logic circuits should be designed to switch only the minimum energy necessary to accomplish the
task.

The final point has to be a compromise between emissions and susceptibility and in many cases the
decision is made by the logic family selected.

For emissions, the switching energy must be as low as possible and for low susceptibility the
threshold level must be as large as possible to avoid corruption.

The rules applied to logic selection can be directly applied to any high-speed electronic switching
circuitry.

For logic circuitry that has to drive long cable lengths or tracks then it may be necessary to use line
drivers and receivers. This is required because of losses in the line. The line drivers will generally
have a low impedance output capable of driving capacitive loads and the receivers an input with
hysteresis to improve the definition between logic states and to make the receiver less sensitive to
noise on the line.

22
3.2. INPUT/OUTPUT CIRCUITRY

To interface an electronic module to other systems there is a need to provide a range of input/output
lines, these can be both digital and analogue with a range of levels and frequencies. These leads
provide an ideal antenna for pickup of EMI and it is therefore necessary to provide some means of
protection in the module to prevent incorrect operation. The following section will cover a range of
input/output configurations and describe the type of circuitry that can be used to limit the effects of
EMI.

Output Design

Consider an open collector transistor driving a load via a long cable; the cable can pickup EMI and
can transfer the energy through the collector to base capacitance of the transistor into the main
control circuitry. The high frequency interfering signal therefore must be filtered out at the output
terminal to prevent failure.

Figure 3-1 shows a typical connection of an RF bypass capacitor to the output terminal; note that
the RF current path must be to the RF ground and not the signal or logic grounds. The value of
capacitor will depend on the output signal and the frequency range of the interference.

For high impedance outputs

care must be taken to ensure
the capacitor does not change fig 3.1- Bypass capacitor on Output
the signal characteristics, ie use
a low value. This method can
be applied to both analogue and
digital outputs. The location of
the capacitor should be as close
to the output terminal on the
PCB or connector as possible
so as to reduce the amount of
energy coupled into the circuit
board. If long leads/tracks are
used to connect the capacitor to
ground and terminal then the
inductance of these may be
sufficient to amplify the effects
of the EMI.

Other devices can be used to

suppress transients such as
varistors, clamping diodes to limit amplitudes and semiconductor suppressors. Care must be taken
to avoid any rectification of the EMI signal by non-linear devices, this can lead to a DC component
being generated and superimposed on the main signal.

23
Input Design

Figure 3-3 shows the connection details of a simple resistor capacitor networks for reducing RF
energy at input stages. As with the output stage design the RF current must be kept isolated from
any signal or logic grounds. The use of one or two stage networks can be used for RF protection
and also signal conditioning/wave shaping.

Figure 3-3 also shows the RF filter network followed by input protection diodes, again under certain
conditions these can rectify the RF signal and hence produce an additional signal at the interface
device. Small silicon diodes (IN1418 type) make ideal RF rectifiers and care must be taken to
reduce the amount of RF energy these devices are subject to, ie they should if possible be
positioned after any RF filter network.

In addition to using RC type filters, small ferrite beads can be inserted onto component leads to add
some inductance and equivalent resistance to the circuit. Small inductors can be purchased with one
or more turns on and different inductance and current ratings.

These can be used to damp high frequency parasitic oscillations and filter out high frequency noise
using the lossy properties of the ferrite. Generally they are only useful at frequencies greater than a
few MHz.

For both input and output stages that have terminations to external devices it is necessary to prevent
any RF energy entering the module, ideally it should be removed at the connector. In practice this is
not often possible because of cost and connector requirements, therefore any RF filter circuitry
should be kept as close to the connector as possible with short PCB track lengths and screening to
prevent RF from radiating into the module.

The use of EMI/RFI custom designed filters will

fig 3.3- Diode protected input
be considered in a later section.

In order to minimise the effects of high

frequency interference the amplitude of
incoming and outgoing signals should be kept as
high as possible. This will reduce the need for
high sensitivity inputs and allow the designer
more flexibility in signal filtering at the terminal
stages. Additionally the signal to interfering
noise ratio will be improved, making it easier in
the processing stages to identify and ignore the
'noise'. This is most applicable in the case of
digital signal processing.

3.4. MATCHING & TERMINATION

At low frequencies the effects of line termination and impedance matching are less important than at
high frequencies. When the propagation delay of a line is short compared to the rise time of a logic
transition, any reflections are masked during the rise time and are not seen as overshoot or ringing.
24
Out when the length of the propagation time becomes significant compared to the rise time of the
signal, reflections on the line may travel backward from an unmatched load causing ringing. The
ringing is generally at higher frequency than the fundamental and may appear as radiated emissions.
The open circuit characteristic impedance (Zo) of a loss less transmission line is given by equation
2.1. This can be used to approximate the impedance of a real line if the capacitance (C o) and
inductance (Lo) are known.

Zo = (Lo/Co) ........(2.1)

Detailed analysis of transmission lines can be found in many electrical engineering text books. An
ideal impedance match will allow the pulse energy to be absorbed and no wave reflected, ie
maximum power transfer. Termination problems are encountered in back-planes, PCB tracking,
cable harnesses and other wiring systems.

To reduce the need for termination and matching, switching frequencies should be kept as low as
possible and the impedances of I/O stages matched at the design stage.

In many automotive systems on vehicles this is not practical and a compromise has to be taken at
the design stage to ensure termination problems do not affect the operation of the system.

25
 4. EMI/RFI SUPPRESSION COMPONENTS

To reduce the effects of interfering signals on electronic circuits, manufacturers have produced a
range of suppression networks and components in addition to the normal inductors and capacitors.

4.1. CAPACITORS

These are often the simplest and cheapest method of achieving high frequency suppression, but are
only effective where the capacitor presents a low impedance compared to the circuit impedance.
When used in a circuit to decouple RF energy to ground the capacitor acts as a shunt and RF
current flows through the device.

A normal two-terminal device has internal inductance, in addition to that in the connecting leads, and
therefore has a series resonance at frequencies determined by the stray inductance and capacitance.
At low frequencies the impedance decreases with increase in frequency down to a minimum in the
region of resonance and at higher frequencies increases due to the series inductance. The
effectiveness of the capacitor is therefore limited by the capacitance at low frequencies, by the series
resistance at frequencies close to resonance and by self-inductance at high frequencies. For a two
terminal device the self-inductance is around 0.1uH to 1.0uH.

Table 4-1 details the specifications of some common capacitors found in electronic circuitry for
decoupling, filtering, timing and other function. The table lists the parameters that are critical if the
capacitor is going to be used at high frequencies. The critical parameters are the self-resonant
frequency, inductance and frequency range. For high frequency suppression the capacitor should
have a low inductance and high resonant frequency. Figure 4-1 shows typical impedance vs
frequency profiles for a 1uF tantalum capacitor, 0.1uF ceramic, 0.1uF DIP ceramic and a 1nF disc
ceramic capacitor. Suitable capacitors for suppression are the ceramic dielectric type with high k
and low inductance values. These are available in standard two lead packages, dual-in-line for IC
decoupling, 3-terminal feed through for panel mounting and surface mounting packages. The
cheapest of these are the standard two-lead package and surface mount device.

For a good high frequency capacitor the construction of the device must also be considered, this will
have a significant effect on its self-inductance and hence the performance.

Capacitors with low inductance generally have a layer type construction, for example multilayer and
disc ceramic types. These are constructed from layers of metallised ceramic dielectric with alternate
layers connected to the main terminations. In general these devices will have a lower self-inductance
than the tubular type capacitors.

Surface Mount Capacitors

Surface mount capacitors have several major advantages over conventional capacitors, both for
their high frequency characteristics and their benefits in circuit size reduction. The basic construction
26
 of the device is a multilayer ceramic body
with metal electrodes at either end. The
body is constructed out of ceramic tape
compressed to form a solid chip. Alternate
layers of the ceramic tape are connected to
opposite electrodes.

fig 4.2- Differential Mode Signal Flow The main characteristics are as follows :-

Small package size

Direct PCB mounting with no holes
Ease of automatic placement
Wide temperature range -55 to 125 deg
C
Good ageing characteristic
Cheap
Choice of dielectrics

Typical electrical performance characteristics for AVX surface mount capacitors are given in
Appendix 1. When these devices are used in decoupling and suppression circuits, the low self-
inductance increases the useful frequency range of the capacitor. The surface mount facility also
allows the capacitor to be mounted on short PCB tracks close to any source of RFI.

4.2. INDUCTORS

Suppression inductors are often physically larger and more costly than capacitors for equivalent
performance, but may be necessary because of limitations of capacitors. At high frequencies an
inductor blocks the passage of HF energy. An inductor has self-capacitance associated with its
winding which is effectively in parallel with it and results in a parallel (high impedance) resonance at
frequencies determine by the inductance and capacitance. Below resonance the impedance
increases with frequency and above resonance decreases with frequency, due to the self-
capacitance. The range of self-capacitance for typical small signal inductors is 1pf to 100pf. The
choice of the device is governed by the inductance required, frequency range, current rating, cost,
weight and size. For suppression requirements at high frequencies ferrite formers are used in a range
of formats, for example beads, toroids, 'E' and 'I' cores. Appendix 1 shows some typical signal line
noise suppressors that are applicable to digital and analogue equipment in vehicles.

4.3. RADIO FREQUENCY CHOKES

Radio frequency chokes provide an effective way of removing common mode interference signals
that flow along cables between pieces of equipment.

Figure 4-2 shows the normal way in which a signal is transmitted from one place to another along a
two core cable; the current flows along one conductor and returns via the other in the opposite
direction. Figure 4-3 shows the common mode current flow in the same direction in both
conductors.

Common mode currents are generally caused by poor design, ie cabling, shielding, ground structure
27
and isolation between circuitry. Common mode currents can be reduced by a common mode RF
choke as shown in figure 4-4. The basic construction is usually a ferrite former with a few turns of
wire. The windings are in the same direction such that the inductance is cancelled out for differential
mode current flow. However the inductance is effective in the common mode circuit and will reduce
common mode current by an amount calculated from the impedance of both the circuit and the
choke.

These devices are available in a range of values and constructions, some of which are PCB or
chassis mounting. An example of a two-channel device is given in the TDK data in Appendix 1.
They are relatively expensive however, when compared with capacitors and single inductors.

4.4 NON-LINEAR DEVICES

Certain non-linear devices like zener diodes and voltage dependent resistors (VDR), may be used to
attenuate voltage spikes which have amplitudes greater than the signal or supply voltage. Zener
diodes are particularly good for use in power supplies for transient suppression. However care must

fig 4.3- Common Mode Noise on a Differential Circuit

fig 4.4- Common Mode RF Choke reduces Noise Current

28
be taken to choose the correct device power rating, in many cases VDR's have a better transient
power handling than zener diodes but they can degrade with continuous use.

Both these devices present a low impedance to the transient energy, the energy is absorbed in the
device and can give rise to an increase in temperature and hence change the electrical
characteristics.

Whilst these devices are useful for limiting the peak amplitude of voltage spikes, they often have little
influence on high frequency interference signals.

4.5 FILTERS

Filters for use in reducing EMI/RFI are now available from several manufacturers, these generally
take the form of a capacitor/inductor network in a 'PI' or 'T' configuration. Figure 4-5 shows the
circuit configuration for both types of filter. The design of circuits using these filters should obey the
same rules as the simple resistor/capacitor networks described earlier; ie connection to RF ground
and connection and location close to interference source. With all high frequency filters the mounting
instructions and layout must be carefully observed to obtain the specified attenuation.

When designing filter networks to attenuate signals the 'cut off' frequency must be chosen to achieve
the desired attenuation at the interfering frequencies. For EMC work filters will be generally low
pass, i.e. all high frequency components above the cut off frequency will be attenuated.

The design of filters is well documented in text books and tables are available to select component
values for various filter constructions and configurations.

Examples of currently available filters for PCB mounting are shown in Appendix 1., some of which
are applicable to automotive use.

Nippondenso are developing a 'Ceramic Absorber' as a universal EMI suppression device

specifically for automotive use. The frequency range and absorption properties of the filter are
shown in Appendix 1. The device will be available in a multi-channel strip line form for PCB
mounting and connection between the wiring harness and electronic circuitry.

Another device that has been developed is an EMI filter incorporating a varistor for transient
suppression. The device has three terminals and is a basic T' construction with ferrite beads in the
series arms for absorbing HF signals and a varistor in parallel with a capacitor in the shunt arm.
Appendix 1. shows the pin out of the device, equivalent circuit and specification. The device is
available from muRata and can provide an alternative to complex RC networks with clamping
devices.

Filtered Connectors

Multiway connectors like 'D types' are now available with a ceramic filter built in. Each pin in the
connector is connected to one element in a filter array,- the comprises of a matrix of capacitors
constructed on a ceramic base. One terminal of the capacitor is connected to ground and the other
the input pin in the connector matrix. Capacitor values range from a few 100pf to 5000pf.

29
This technology is now becoming more popular because of reduced component counts for
input/output stages and lower assembly costs, however these connectors are still very expensive for
automotive use.

The major advantage of using filtered connectors is that any RF on connecting cables can be
reduced or eliminated at the connector rather than on the circuit board. This makes the design of
grounds and interface circuitry simpler.

30
 5. INTERCONNECTION & CABLING

The interconnection of electronic modules in vehicles is a particularly difficult task from both the
electrical aspect and physical/production requirements. It is not intended to cover the EMC design
requirements for a wiring harnesses during the course of this project. With the design of many
electronic systems there is a requirement for PCB inter-connections. This can be achieved using plug
and socket connectors with pins, flexible PCBs and signal cables.

For flexible inter-connecting cables and PCBs the same general guidelines used in PCB design must
be applied:

Maintain a high degree of isolation.

Keep sensitive cable run as short as possible.
Use screened cable for high sensitivity and long runs.
Ground screened cables at only one end.
Do not route cables carrying switching information close to sensitive leads and circuitry.
Use interleaved ground cables to act as 'guard' lines.
Maintain ground integrity between boards.
Use filtered connectors

For digital data transmission between units, twisted pair cables can be used in screened or
unscreened forms. These comprise of a signal conductor and ground lead twisted together, they are
used extensively for serial data lines.

fig 5.1- Connection of screened cables to screened enclosure

31
 6. SCREENING & ENCLOSURES

With all electronic circuitry it is necessary to provide some form of protective enclosure. The
enclosure has three main functions, to protect the unit physical damage, to provide a means of
mounting components and to provide screening against electromagnetic interference. An ideal
enclosure should act as a continuously closed conducting box in order to prevent outside fields from
penetrating equipment and to prevent internally generated noise from radiating from the enclosure.
Unfortunately, an ideal box is never achieved because of connectors, access panels and cable
glands, for example. This applies to both plastic cases with conductive properties and metal cases.

Plastic equipment housings are favoured for their ease of manufacture and cost, however the basic
material requires treatment to obtain EMI screening properties. There are two basic forms of
treatment, conductive surface coatings and loading the plastic with a conductive filler. The Shielding
Effectiveness (SE) of a material is defined as the ratio of the power that would pass through the
material to the total incident power, if the material were in the form of a large panel in free space
with no leakage around the edges.

SE = 10 log (P1/P2) dB ..... (6.1)

where P1 = incident power

P2 = transmitted power

Therefore the higher the value of SE, the better the shielding properties.

For surface coatings

SE a 2 .....(6.2)

where a = surface conductivity of coating.

It is not the intention of this report to investigate the design and performance of plastic and metal
enclosures.

From the EMC point of view the conductive properties of the case can be used to provide a low
impedance ground plane for the electronic circuitry housed inside. To utilise this facility the case
should be grounded at the main ground point of the circuit and the board mounted in close proximity
to case wall to optimise the capacitive effects of the case.

32
 7. EMC EFFECTS & CONSIDERATIONS FOR SOFTWARE

With the complex microprocessor controlled systems in vehicles it is becoming increasing important
to ensure that these systems not only operate correctly, electrically, but also that the controlling
software has a high degree of integrity and noise immunity. It is possible to design an electronic
system to have a high degree of EMI/RFI protection, but under certain conditions the protection
may fail and the microprocessor inputs become subjected to noisy or distorted signals. These signals
may originate from external sources, for example a connecting cable picking up interference and
distorting the signal or directly from 'loop holes' in the design of the processor interfaces. If these
corrupted signals are read by the microprocessor then the system may operate incorrectly and the
resulting error could be multiplied many times to create secondary problems. Consequently it is
necessary to design the system to be 'noise tolerant'.

7.1. FAILURE MODES OF A MICROPROCESSOR SYSTEM

Before considering the precautions that can be taken in software the basic causes of failure need to
be considered, these are as follows :-

Memory Failure

One of the most common effects of noise on a microprocessor system is a 'changed bit' or memory
location. Both program and data are stored in a pattern of 'zero's and one's'; changing a single bit
will alter the meaning of the stored data. If the changed memory location is a program instruction the
effect can be a change in program flow. This may result in the program executing invalid code or
entering an 'infinite loop' condition for example. While this may not cause any damage to the system,
the results may be undesirable.

If the memory location changed is a data value then there may be no immediate effect on the system.
If the data value is used in any form of control algorithm or decision making process then the effects,
again will be undesirable, leading to potentially dangerous conditions.

If a system is not designed and programmed correctly then it may be impossible to recover from a
memory failure without restarting the system.

Processor Failure

This is similar to memory failure. The internal state of the processor is altered causing it to execute
the program incorrectly, with a secondary effect of corrupting data stored memory and incorrect
operation of peripheral circuitry. Again the system may not recover from this type of failure.

Input/Output Failure

33
Almost as common as changes in memory are incorrect system outputs. These errors can be due to
noise induced directly on the outputs, noise induced on inputs resulting in incorrect data into the
system, or data corrupted during processing. The secondary effect of all these is an incorrect action
based on incorrect outputs from the system. The end result can be a minor inconvenience, for
example indicator lights becoming erratic- or a major safety critical failure on a system like Anti Skid
Braking.

7.2. DESIGNING NOISE TOLERANT SOFTWARE

There are several techniques available to the software engineer that can be employed in a program
to improve the overall performance of the system when subject to EMI/RFI. These include software
filtering, data continuity checking, range checking, program flow control using tokens, checksums
and error checking routines.

Table 7.1 summarizes the three main areas in which software and hardware techniques can be used
to improve the EMC of the system.

Table 7-1: Software Techniques for EMC

Detecting Errors in Program Flow

- Software checkpoints
- Hardware timers
- Software tokens
- No-Op codes

Detecting Errors in Input/Output

- Type and range testing - Software filtering
- Echoing outputs

Detecting Errors in data memory

- Checksums
- Cyclical redundancy checks
- Parity
- Error correction codes

Detecting Errors in Program Flow

The main philosophy in detecting errors in program flow is a regular check of the program for
abnormal operation. These checks must test the program for execution time, executable code
address range, valid data address range and data/code type. Any of these factors can affect the flow
of the program and in most cases a few extra bytes of code can improve reliability.

Software Checkpoints

34
This technique is quite effective against infinite loop conditions. The principle is that a separate
program periodically interrupts the main program and checks if certain checkpoints have been
reached. If the check points are not correct then an error has been encountered and a error
recovery routine can be executed. Figure 7-1 shows a simple flow diagram of such a system.

Hardware Timers

While the software checkpoint is simple and efficient it can fail when interrupts are disabled or the
program has a more extensive failure. In this case a hardware timer connected to the non-maskable
interrupt can provide a 'watchdog' facility. If the timer is not reset in time by the software then an
error is assumed to have occurred, and the system is reset.

Software Tokens

This technique is effective against out of sequence errors, ie the microprocessor is executing the
wrong code at the wrong time. Since most programs can be divided into sections or sub-routines
then a system of token collection and checking can be used to establish where the program is in it's
cycle. If a token is not valid on exit from a routine then an error has been detected and corrective
measures can be taken.

No-Ops

This is a very simple method of re-sequencing a program. If a sequence of No-Operations is

encountered (usually single byte instructions) in an blank area of memory, then the sequence will
cause the processor to re-synchronise with the main program. The program can then be collected up
and sorted out with a reset instruction at the end of the No-Ops. This method is only applicable if
unused memory is available.

7.3. DETECTING INPUT/OUTPUT ERRORS

A change in inputs or outputs can cause incorrect operation of system. The philosophy here is to
check all inputs and outputs for 'reasonableness' and 'consistency' with normal values.

Type and Range Checking

This is a fundamental test for all inputs. The program should test the incoming data for acceptable
range and type, if the data are not as expected then appropriate action can be taken. Detecting
errors at this stage can save many problems later in the program.

Software Filtering - Digital Signals

35
When a digital signal is subject to interference it can become distorted and the logic levels
indeterminate, the primary cause of this is rectification of the RF at the input stage. To re-establish
the true logic level the program can effectively sample the signal several times over a set period. If
the result is that the majority of the samples are the same level then it may be possible to assume that
the resultant level is correct. To use this technique the repetition rate and mark space ratio of the
signal must be known to allow the sampling rate and sampling time to be programmed into the
algorithm. Figure 7-2 shows a simplified flow diagram for such a system. When using multiple
sampling techniques a time overhead is incurred in the program, in some applications this may not be
acceptable and the interference will have to be filtered out electrically. Software filtering of this type
is still subject to error since the inputs may not show a trend towards the correct logic level.

Software Filtering - Analogue Signals

A similar technique to digital filtering can be used, ie multiple sampling of the input signal and then
processing using a simple averaging algorithm or a more complex frequency/statistical analysis. The
later will not be dealt with in this report but a suitable technique for example might be a Fourier
analysis, although this is likely to have increased time overheads and program size. The simple
averaging technique would sum a number of readings over a period of time and calculate an average
value, this is then be used in the process. This method is still prone to error and can easily be
improved by the use of limit and data continuity checks.

The limit check can compare previous and present values to eliminate some transient conditions and
also compare the present value with fixed limits for clipping. If the value is out of limits or not
continuous then the previous value can be used. Another technique that can be used is to
differentiate the incoming signal and establish if the rate of change is within limits.

Echoing Outputs

When a processor outputs a signal to another device, for example an output driver transistor or IC
the hardware can be configured to allow the program can then read the signal back and verify it with
the original. If the comparison is incorrect then the signal can be re- sent or more applicable action
taken. This type of checking requires additional hardware to input data from the output port,
however it does have self-diagnostics potential. In addition to monitoring the output ports with the
program the hardware and software can be configured to echo the signal sent from one processor to
another intelligent devices like a second processor. This conformation of data transfer between
devices is usually known as hand-shaking, it can also be used to control the transfer of data between
the devices.

7.4. DETECTING ERRORS IN DATA MEMORY

A change in data memory can have disastrous effects if undetected. The following techniques are
available to the programmer for error detection and correction.

36
Checksums

This is the simplest way of testing a block of data, typically the arithmetic sum of all the data words
in the block will be calculated and compared to a previous value stored. If the values are the same
then it can be assumed the data is consistent and safe to use.

Cyclical Redundancy Checks

A similar, but more powerful, error checking scheme is the cyclical redundancy check or CRC.
Each byte of data to be stored is divided into a specially chosen polynomial, this is done by either
discrete hardware or a special routine in software. The polynomial is stored with the original data
byte in the memory. When the data is required from the memory the polynomial is re-calculated and
compared with the original one stored, if the values agree then the data can be assumed the same.
This method of error checking requires more than one byte of memory to store a single data byte, in
the computer industry it is used mainly for data communications and magnetic disc storage where
more storage space is available.

Parity

Parity uses one extra bit per stored location, the bit will be a one if the number of ones in the byte is
odd and a zero if they are even. This method can only detect a single bit change or odd numbers of
changes.

Error Correction Codes

This is an extension of the parity check. Each byte of data is allocated a number of check bits that
are used to indicate the position of one or more errors in the data byte. The check bits are
embedded in the data byte at pre-defined locations. When the data is first stored the check bits are
set according to the value of the adjacent data bits and check bits. Each time the data is read from
the memory the check bits are re-calculated and compared to the original check bits, if there is no
change then the data is OK- however if the data or check bits have been changed then the new
pattern can be used to determine the changed bits and hence correct them. This method of error
checking is time consuming and requires more memory space. A six bit check will contain enough
information to correct a sixteen bit word.

37
 8. CONCLUSION

When designing for electromagnetic compatibility, it is necessary to consider all aspects of the
design. This report has discussed the techniques that can be used to improve the EMC of electronic
modules used in vehicles. The techniques discussed are applicable to both the electromagnetic
interference (EMI) generated by the modules and in reducing their susceptibility to external EMI
sources. The techniques covered are ground structure design and ground requirements, printed
circuit board track and component layout, input/output design, power supply decoupling,
component selection, system interconnection, screening and noise tolerant software. In each case the
report details the best approach for the design engineer to take to obtain improvements in EMC.
The second phase of the project will apply some of these techniques to a range of electronic
modules and circuitry used in vehicles and attempt to quantify their effectiveness in improving the
electromagnetic compatibility of the module.

38