World Academy of Science, Engineering and Technology

International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering Vol:8, No:7, 2014

Hybriid Pulse Wiidth M

Modulaation T
Techniiques for thee
Reductiion off Switcching Lossees and Voltaage
R
H
Harmon nics inn Casccaded Multillevel IInverters
Vennkata Reddyy Kota

Ammong these topologies, diodee clamped inverter is difficuult to

AbstractThhese days, the iindustrial trend is moving awaay from be expanded
e to m
multilevel beccause of the natural
n problemm of
heeavy and bulky ppassive componnents to power cconverter system ms that DC link voltagee unbalancingg. Moreover,, Flying-capaacitor
use more and moore semiconducctor elements. A Also, it is diffi
ficult to inveerter is also difficult to be rrealized becauuse each capaacitor
coonnect the tradiitional converteers to the high and medium voltage.
v
musst be charged with differennt voltages ass the voltage llevel
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Foor these reasonss, a new familyy of multilevel iinverters has apppeared

as a solution foor working wiith higher volttage levels. Diifferent
moodulation topoologies like Siinusoidal Pulsee Width Moddulation
(SPWM), Selectiive Harmonic E Elimination Pullse Width Moddulation
(SHE-PWM) aree available for multilevel invverters. In this work,
diffferent hybrid modulation tecchniques whichh are combinattion of
funndamental freequency moduulation and m multilevel sinuusoidal-
moodulation are compared. The T main chaaracteristic off these
moodulations are reduction of sw witching lossess with good haarmonic
peerformance and balanced poweer loss dissipatiion among the device.
Thhe proposed hhybrid modulaation schemes are developeed and
simmulated in Maatlab/Simulink ffor cascaded H H-bridge inverteer. The
ressults validate the applicabillity of the prroposed schem mes for
caascaded multilevvel inverter.
incrreases. Wheree as in casccaded multileevel inverter, the
probblem of DC llink voltage unbalancing
u ddoesnt occur, thus
easiily expanded to multilevel.. This inverteer can avoid extrae
mping diodes or voltage baalancing capaccitors [4], [5]. Due
clam
to these
t advantaages cascadedd multilevel iinverter has been
widdely applied too such applicattions as HVDC, SVC, stabiilizer
andd high power m motor drives [33].
A single-phasee two-cell series configuraation of cascaded
inveerter is shown in Fig. 1.

KeywordsH Hybrid PWM techniques, Cascaded Muultilevel

Invverters, Switchiing loss minimiization.

I. INTR
RODUCTION

M ULTILEV VEL inverterss offer a num mber of advaantages

comparedd to the conveentional two-llevel inverters. The
steepped approxximation of the sinusoidaal waveform using
higher levels reeduces the haarmonic distoortion of the output
waaveform, and the stresses aacross the sem miconductor deevices.
It also allows hhigher voltagee/current and power ratings. The Fig. 1 Sinngle-phase structture of a cascadded inverter
mu
multilevel voltaage source invverter is recenntly applied inn many
industrial appliccations such aas ac power suupplies, staticc VAR E
Each separate DC source iss associated w with a single-pphase
coompensators, drive system ms, etc. One of the signnificant full--bridge inverter. The ac term
minal voltagess of different llevel
addvantages of multilevel configuration is the harrmonic volttages are connnected in seriees. By differennt combinationns of
reduction in thee output wavefform without iincreasing swiitching the four switchees (S1-S4), eeach full briidge inverter can
freequency or ddecreasing thee inverter pow wer output [1]. The generate three vooltage outputss, -Vdc, +Vdc, and zero. Thhe ac
reduced switchiing frequencyy of each indivvidual switch of the outpput of each ofo the full-briidge inverters are connecteed in
coonverter reducces the switcching losses and improvees the series such that tthe synthesizeed voltage wavveform is the sum
effficiency of thee converter [1]].The output voltage
v wavefoorm of of tthe inverter ouutputs. Note thhat the numbeer of output pphase
a multilevel invverter is compposed of the nnumber of levvels of volttage levels is defined in diifferent way ffrom those off two
vooltages. As thhe number of levels reach infinity, the output prevvious inverterrs. In this topology, the number
n of ouutput
TH HD approachees zero [2]. phase voltage levvels (m) is defiined by
The Diode-cclamped multiilevel inverterrs, Flying-cappacitor
mu
multilevel inveerters, Cascadded-inverters with separatte DC m=2S
S+1 (1)
soources are thee mostly used types of multilevel
m invverters.
wheere S is the nnumber of D DC sources. T
Table I showss the
Dr. Venkata R Reddy Kota is with Jawaharlaal Nehru Technological swittch combinaation of thee voltage llevels and their
Unniversity Kakinadda, Kakinada 5333003, Andhra Prradesh, India (Phoone: 91- corrresponding sw
witch states.
9849301311; e-mail: kvr.jntu@gmaiil.com).

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 World Academy of Science, Engineering and Technology
International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering Vol:8, No:7, 2014

T
TABLE I incoorporating thee pulse width modulation control
c withinn the
VOLTAGE LEV
VELS AND SWITCH
HING STATES OF A TWO-CELL CASC
CADED
inveerters [7]-[9]. It offers good harmoonic performaance.
INV
VERTER
Whereas, the swiitching loss reduction of muultilevel sinusooidal
Output V0 S1 S2 S3 S4 S5 S6 S7 S8
moddulation scheemes with loow computational overheaad is
V5= 2Vdc 1 1 0 0 1 1 0 0
V4= V dc 1 1 0 0 1 0 1 0
posssible with hybbrid-modulatioon technique.
V3= 0 0 0 0 0 0 0 0 0 S
Single-carrier sinusoidal PW WM (SCS-PW WM) techniquee is a
V2= -V dc 0 0 1 1 0 1 0 1 resuult of two sinuusoidal referennce signals w
with a frequenccy of
V1= -2Vdc 0 0 1 1 0 0 1 1 f0 and
a amplitudee of Am and one carrier signal. The caarrier
signnal is a train of triangular w
waveforms withh a frequency of fc
andd amplitude oof Ac. The arrrangement off carrier and two
refeerence signals is as shown in Fig. 2 (a). Alternative pphase
oppposition dispoosition (APOD D) technique requires (m-1)/2
carrrier signals foor an m-levell inverter andd are to be pphase
dispposed from eacch other by 1880 degree alterrnatively as shhown
in FFig. 2 (b). Phhase-shifted ccarrier pulse width modulaation
(PSC-PWM) is a good soluttion for singlle-phase cascaded
International Science Index, Electrical and Computer Engineering Vol:8, No:7, 2014 waset.org/Publication/10002947

inveerters compareed to alternativve phase oppoosition disposiition.

Thee carrier wavves are phase shifted bby 2/(N-1). The
arraangement of reeference wavee and carrier wwave of PSC-P PWM
is shhown in Fig. 2 (c).
T
The modulationn index is defi fined as

/ (2)

wheere M is the nnumber of connverter cells, Ac is the ampliitude

of ccarrier wave. The definitioon of the moddulation frequuency
ratioo mf for conveerter is given aas

(3)

wheere mf is frequuency modulattion, fc and f0 aare the frequenncies

of ccarrier and refeerence waves.
Fig. 2 Sinusoiidal reference aand carriers of M
MSPWM operattion
IIII. HYBRID MODULATION TECHNIQUES FFOR CASCADEED
MULTILEVEEL INVERTERS
In this paper, hybrid-moddulation technnique for casscaded
multilevel inverrter is proposeed in order to rreduce the swiitching
mu H
Hybrid modullation is the combinationn of fundameental
losses with goood harmonic pperformance, bbalanced poweer loss freqquency moduulation (FPW WM) and MS SPWM for each
dissipation am mong the deevices withinn a cell. H Hybrid- inveerter cell operration so that the output innherits the feattures
modulation strrategies are compared w
m with three diffferent of sswitching losss reduction froom FPWM annd good harm monic
seequential switcching strategiees for cascadedd multilevel innverter perfformance fromm MSPWM. Inn this modulattion techniquee, the
byy using MATL LAB/Simulinkk software. fourr switches of eeach inverter ccell are operatted at two diffe
ferent
freqquencies; two being commuutated at FPWM M, while the oother
III. MULTILEVEEL SINUSOIDALL PWM (MSP
PWM) STRATEEGIES twoo switches arre modulatedd at MSPWM M, therefore the
resuultant switchinng patterns aare the same as those obtaained
The well-knnown modullation schem mes for mulltilevel
withh MSPWM. A sequential sswitching schheme is embeddded
inverters are thee Selective Haarmonic Elimiination Pulse Width
withh this hybrid modulation in order to oovercome uneequal
M
Modulation (S SHE-PWM) and Sinusoiidal Pulse Width
swittching losses and thereforee differential hheating amongg the
M
Modulation (SP PWM). Recenntly, hybrid modulation
m techhnique
powwer devices. A simple base P PWM circulattion scheme iss also
haas been develloped. Selectivve harmonic elimination sccheme
introoduced here to get resulltant hybrid PWM circulaation
requires offlinee calculations,, making dynamic operatioon and
makkes balanced ppower dissipattion among thhe power moddules.
cloosed-loop im mplementationn not straigght forward. SHE
It consists of modulation base generaator, base P PWM
beecomes unfeassible with the increase of nuumber of leveels [6].
circculation moduule, and hybridd modulation controller (H HMC)
M
Moreover, sinuusoidal pulse width moduulation methodds are
to ggenerate new modulation
m puulses.
baased on multti-carrier arraangements ass alternative phase
Inn this modulaation strategy, three base modulation
m puulses
oppposition dispposition (APO OD) PWM, pphase-shifted ccarrier
are needed for each cell operration in a CM MLI. A sequeential
(P
PSC) PWM, single-carrier sinusoidal
s (SC
CS) PWM. It is the
swittching pulse ((A) is a squaare wave signal with 50% duty
m
most efficient method of coontrolling thee output voltaage by
ratioo and half thee fundamental frequency. T This signal mmakes

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 World Academy of Science, Engineering and Technology
International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering Vol:8, No:7, 2014

evvery power sswitch operaating at MSP PWM and F FPWM ;

seequentially to equalize the ppower losses among the deevices. ;
FPPWM (B) is a square wavve signal synnchronized wiith the (4)
m
modulation wavveform; B=1 during the poositive half cyycle of
the modulation signal, and B=0B during neggative half cyycle. A wheere A is a SSP P, B is a FPWWM, C is a M MSPWM for ccell-I
seequential switcching pulse (SSSP) and FPW WM pulses aree same andd D is MSPW WM for cell-II. If SSP A=1, then S1, S2,, S1
foor all inverter cells. MSPWM Ms (C or D) ffor each cell, ddiffers andd S2 are operaated with MSP PWM, while S S3, S4, S3 andd S4
deepends upon thhe type of carrrier and moduulation signalss used. are operated at FP PWM. If SSP P A=0, then S11, S2, S1 andd S2
Thhe proposed sequential hyybrid modulattion block diiagram are operated at FP PWM, while S S3, S4, S3 annd S4 are operrated
reppresentation iss as shown in Fig. 3 (a). withh MSPWM. Since S A is a sequential siignal, the aveerage
freqquency amonggst the four sswitches is eequalized. Volltage
stress and currennt stress of power
p switchees in each ceell is
inheerently equaliized with thiss modulation. After every two
funddamental perioods, the HPW WM pattern is changed
c so thaat the
firstt module (S1, S2, S3 and S S4) becomes tthe second moodule
(S1, S2, S3 andd S4), and thhe second shiftts to the first. As a
International Science Index, Electrical and Computer Engineering Vol:8, No:7, 2014 waset.org/Publication/10002947

resuult, all inverteer cells operatte in a balancced condition with

the same power hhandling capabbility and swiitching losses. It is
founnd that the proposed m modulations ooffer lower THD T
Fig. 3 ((a) Proposed seqquential hybrid modulation commpared to the cconventional oone, thus the superiority.
s Hyybrid
pulsse width moddulation technnique, in whicch one duty ccycle
inclludes a combiination of fouur pulses, amoong them twoo are
constant pulses annd remaining two are the puulses of C andd D.
In oorder to avoidd losses, one oof the two swiitches to be tuurned
on wwith constant ppulse.
A
A. Hybrid Altternative Phhase Opposiition Dispossition
(HAAPOD) Techniique
Inn the HAPOD D modulation strategy, threee base modulaation
pulsses are needded for each cell operatiion in CMLII. A
sequuential switchhing pulse (A) is a square wave signal with
50%% duty ratio and half thee fundamentall frequency. This
Fig. 3 (b) Base PWM
M circulation forr five-level signnal makes eveery power swiitch operatingg at MSPWM,, and
FPWWM sequentiaally to equalizze the power losses amongg the
For long operrating-time exxpectancy, it is important too share powwer modules. FPWM (B B) is a squuare wave siignal
the power loss aamong every m module, and fuurthermore, too every syncchronized witth the modulation waveform m; B=1 duringg the
poower device iin the cell. Thhis is one off the key issuues the posiitive half cyclle of the moddulation signall, and B=0 duuring
m
modulation shoould cover. A simple basee PWM circuulation the negative half cycle. APOD D modulation ppulse for cell-II (C)
sccheme is intrroduced here to get resultant hybrid PWM is obtained from the comparisoon between unnipolar modulaation
cirrculation amoong the power modules. T The scheme off five- wavveform and caarrier, while A
APOD modulattion pulse for cell-
levvel base PWM M circulation iis shown in Fig.
F 3 (b). It coonsists II (DD) is obtained from the coomparison between modulaation
off two 2:1 multtiplexer, and selects
s one am
mong the two P PWMs wavveform and caarrier with DC C bias of Vc+ +2Ac as showwn in
baased on the seelect clock siggnal. The clocck frequency iis f0/4, Fig.. 4:
m
makes the time base for PWM M circulation from one moddule to
annother. After tw
wo fundamenttal frequency periods, the order is
chhanged so thatt the first moddule HPWM bbecomes the ssecond
m
module; the seccond becomes the third and so on while thhe last
module HPWM
m M shifts to the ffirst.
Hybrid Moduulation Controoller (HMC) combines SSP P, and
M
MSPWM, that produces
p SSHHM pulses. It iis designed byy using
a ssimple combinnational logic and the functtions for a fivee-level
HP PWM are exppressed as

;
;
;
; Fig. 4 Hybrid altternative phase opposition dispposition (HAPOD)
;

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B. Hybrid SSingle-Carrierr Sinusoidal P PWM (HSC-P PWM) THDD of the outpput voltage waaveform is observes as 22.005%.
Teechnique Thee output voltaage waveform and harmoniic distortion uusing
The HSC-PW WM techniquee is describedd in Fig. 5. IIn this PSCC PWM techniques for the ssame modulattion index of 00.7 is
m
modulation straategy also the generation off A and B pulsses are showwn in Fig. 9 aand the THD iss observes as 22.09%.
2
saame as the HA APOD. SCS--PWM modullation pulse (C C) for
ceell-I of CMLI is obtainedd from the coomparison beetween
unnipolar modullation waveform and carrieer waveform, while
SCCS-PWM pulsse (D) for cell--II of CMLI iss generated froom the
coomparison bettween the moddulation signaals with bias oof Ac
annd single carrieer as shown inn Fig. 5.
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Figg. 7 (a) Output vvoltage waveforrm and (b) FFT analysis using SCS
PWWM
Fiig. 5 Hybrid sinngle-carrier sinuusoidal PWM (H
HSC-PWM) techhnique
C. Hybrid Phhase- Shifted C
Carrier PWM (HPSC) Technnique
The block diagram of Hybbrid Phase- Shhifted Carrier PWM
tecchnique (HPS SC) techniquue is shown in Fig. 6. In this
m
modulation straategy also the generation off A and B pulsses are
saame as the HAAPOD. The PS SC pulses (C aand D) are bassed on
the comparisoon of moddulation wavveform withh the
coorresponding P PSC waveforrm for every cell in a CM MLI as
shhown in Fig. 6.

F
Fig. 8 (a) Outpuut voltage wavefform and (b) FF
FT analysis usinng
APODD PWM

Fig. 6 Hybridd Phase-shiftedd carrier PWM teechnique (HPSC

C)

IV. SIMULLATION RESULTTS

The proposedd hybrid moddulation techniiques are deveeloped
annd simulated using MATL LAB/SIMULIN NK software for a
fivve level CM MLI with the dc-bus vooltage of 500V.The
freequency of mmodulated wavve and carrieer wave are 50 5 and
15500 Hz, respecctively. First, the five-levell CMLI is sim
mulated
wiith multi sinuusoidal PWM strategies vizz. SCS, APOD D and
PSSC. Fig. 7 shoows the five-leevel output voltage waveforrm and
haarmonic distoortion using SCS PWM techniques with w a
m
modulation inddex of 0.7. T The THD of the output vvoltage
waaveform is obbserves as 52.881%. Fig. 8 ddepicts the fivee-level
ouutput voltage waveform and harmoniic distortion using Figg. 9 (a) Output vvoltage waveforrm and (b) FFT analysis using P
PSC
AP POD PWM teechniques withh a modulatioon index of 0.77. The PWWM

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The proposedd hybrid moddulation technniques for fivee-level

CM MLI are simullated and outpput voltage andd harmonic coontents
arre compared w with conventioonal multi-sinuusoidal strateggies. In
the Hybrid moodulation techhnique, it is observed thaat two
witches of eachh inverter cell are operated at
sw a FPWM, whhile the
otther two switcches are moduulated at MSPW WM. Therefore, the
hyybrid modulattion techniquees minimize thhe switching losses
byy considerablee amount whilee achieving thhe same fundam mental
vooltage output. Fig. 10 show ws the five-leevel output vvoltage
waaveform and harmonic disttortion using Hybrid SCS PWM
tecchniques withh a modulation index of 0.7. The THD of the
ouutput voltage waveform iss observes ass 39.46%. Fiig. 11
deepicts the fivee-level output voltage waveeform and harrmonic
distortion usingg Hybrid APOD PWM technniques. The T THD of
the output volltage waveforrm is observves as 22.35% %.The
ouutput voltage waveform and harmoniic distortion using
International Science Index, Electrical and Computer Engineering Vol:8, No:7, 2014 waset.org/Publication/10002947

F
Fig. 12 (a) Outpuut voltage waveeform and (b) FFT analysis usinng
Hyybrid PSC PW WM techniquees for the sam me modulationn index HPSCC PWM
off 0.7 is shownn in Fig. 12. The THD off the output vvoltage
waaveform is observes as 21.550%. F
From the results, it can be observedd that the hyybrid
moddulation technniques also redduce the harm monic content. The
propposed hybrid modulation techniques arre simulated with
diffferent values oof modulation index. The THD
T with diffe
ferent
hybbrid modulation schemes at different moddulation indicees are
desccribed in Fig. 13. From thee results, it cann be observedd that
HPS SC scheme prroduces less harmonic
h conttent than the oother
scheemes at all thee modulation iindices.

Fig. 10 (a) Outpuut voltage wavefform and (b) FF

FT analysis usinng HSC
P
PWM

Fig. 13 C
Comparison of different PWM
M schemes

V. CON
NCLUSION

Inn this paper, an efficient ssequential swiitching and PPWM

Fig. 11 (a) Outtput voltage wavveform and (b) FFT analysis uusing
HAPOOD PWM
circculation technniques are embedded w with the Hyybrid
moddulations for bbalanced power dissipation among the poower
devices and for lowl switchingg losses. Threee different hyybrid
moddulation schem mes viz. Hybriid Alternativee Phase Oppossition
Dispposition (HA APOD) schheme, Hybrid Single-Caarrier
Sinuusoidal PWM M (HSC-PWM M) scheme annd Hybrid Phhase-
Shiffted Carrier PWWM technique (HPSC) schhemes for cascaded
mulltilevel inverteer are presenteed in this worrk. Comparisoon of
the performance of o these hybrid modulation techniques am mong
themm and also w with conventioonal schemes is done by uusing
MAATLAB/SIMU ULINK softwaare. It is notticed that, in this

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prroposed hybridd modulation techniques, 50% 5 of the ddevices

wiill operate onlly at fundamenntal frequencyy in every cyccle and
heence results in low sw witching lossses. Compareed to
coonventional M MSPWM techhniques, conssiderable swiitching
loss reduction aand voltage haarmonic reducction are obtaiined in
hyybrid modulaation schemees while achieving the same
fuundamental vooltage tracking. Furthermorre, it is founnd that
phhase-shifted carrier
c schem
me generates tthe least harrmonic
distortion amonng these schemmes.

REFFERENCES
[1]] Govindaraju. C., Baskaran. K.., Efficient sequuential switching Hybrid-
Modulation teechniques for Casscaded Multileveel Inverter, IEEE E Trans.
Power Electroon., vol.26, no. 6, pp.1639-1648, Juune 2011.
[2]] Yen-Shin Laii; Yong-Kai Linn; Chih-Wei Cheen., New Hybrid Pulse
width Modullation Technique to Reduce Current C Distortioon and
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Extended Currrent Reconstrucction Range for a Three-Phase Inverter

Using Only D DC-link Sensor, IIEEE Trans. Pow wer Electron., vol.. 28, no.
3, pp. 1331-13337, March 2013..
[3]] C. Govindaraj aju and K. Baskaaran, Performannce analysis of cascaded
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[4]] M. Malinowsski, K. Gopakum mar, J. Rodrgueez, andM. A. Peerez, A
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[5]] J. Zaragoza, JJ. Pou, S. Ceballoos, E. Robles, P. Ibanez, and J. L.. Villate
A compreheensive study of a hybrid modullation technique for the
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for multilevel converters, IEE EE Trans. Power Electron., vol. 211, no. 2,
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[7]] M. S. A. Dahhidah and V. G. A Agelidis, Single carrier sinusoidaal PWM
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[8]] R. Naderi andd A. Rahmati, P Phase shifted carrrier PWM techniique for
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Dr. Venkata Reddy Kota (M M12) became a M Member

(M) of IEEE in 2012. Dr. Redddy was born in IIndia on
25th June 19880. Dr. Reddy has received his PhD in
Electrical Enngineering from m Jawaharlal Nehru
Technological University Kakiinada, India in tthe year
2012. Dr. Redddy has receivedd his master Deegree in
Power and Inndustrial Drives and a Bachelor Deegree in
Eleectrical and Elecctronics Engineerring from JNTU College of Engiineering
Annantapur, India inn the years 2004 and
a 2002 respectiively. Dr. Reddys major
fieeld of study incluudes special electtrical machines, eelectric dries, andd power
quuality.
He has more thhan ten years of experience in teaaching and reseaarch and
currrently working as a Assistant profe
fessor in the Depaartment of Electriical and
Eleectronics Engineeering at Jawahharlal Nehru Teechnological Unniversity
Kaakinada, India. Hee is currently worrking on the contrrol of switched relluctance
mootors and brushlesss DC motors.
Dr. Reddy is a m
member of IEEE, A ACM, the Instituttion of Engineers (India),
Inddian Society forr Technical Educcation. He is a recipient of the Young
Enngineers Award in i the year 20133 and Tata Rao Prize in 2012 from fr the
Insstitution of Enginneers (India).

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