PD - 94358A

IRFB38N20D
SMPS MOSFET IRFS38N20D
IRFSL38N20D
HEXFET Power MOSFET
Applications VDSS RDS(on) max ID
l High frequency DC-DC converters
200V 0.054 44A

Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current TO-220AB D2Pak TO-262
IRFB38N20D IRFS38N20D IRFSL38N20D

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25C Continuous Drain Current, VGS @ 10V 44
ID @ TC = 100C Continuous Drain Current, VGS @ 10V 32 A
IDM Pulsed Drain Current 180
PD @TA = 25C Power Dissipation 3.8 W
PD @TC = 25C Power Dissipation 320
Linear Derating Factor 2.1 W/C
VGS Gate-to-Source Voltage 30 V
dv/dt Peak Diode Recovery dv/dt 9.5 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torqe, 6-32 or M3 screw 10 lbfin (1.1Nm)

Thermal Resistance
Parameter Typ. Max. Units
RJC Junction-to-Case 0.47
RCS Case-to-Sink, Flat, Greased Surface 0.50 C/W
RJA Junction-to-Ambient 62
RJA Junction-to-Ambient 40

Notes through are on page 11

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Static @ TJ = 25C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 200 V VGS = 0V, ID = 250A
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient 0.22 V/C Reference to 25C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance 0.054 VGS = 10V, ID = 26A
VGS(th) Gate Threshold Voltage 3.0 5.0 V VDS = VGS, ID = 250A
25 VDS = 200V, VGS = 0V
IDSS Drain-to-Source Leakage Current A
250 VDS = 160V, VGS = 0V, TJ = 150C
Gate-to-Source Forward Leakage 100 VGS = 30V
IGSS nA
Gate-to-Source Reverse Leakage -100 VGS = -30V

Dynamic @ TJ = 25C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 17 S VDS = 50V, ID = 26A
Qg Total Gate Charge 60 91 ID = 26A
Qgs Gate-to-Source Charge 17 25 nC VDS = 100V
Qgd Gate-to-Drain ("Miller") Charge 28 42 VGS = 10V,
td(on) Turn-On Delay Time 16 VDD = 100V
tr Rise Time 95 ns I D = 26A
td(off) Turn-Off Delay Time 29 RG = 2.5
tf Fall Time 47 VGS = 10V
Ciss Input Capacitance 2900 VGS = 0V
Coss Output Capacitance 450 VDS = 25V
Crss Reverse Transfer Capacitance 73 pF = 1.0MHz
Coss Output Capacitance 3550 VGS = 0V, VDS = 1.0V, = 1.0MHz
Coss Output Capacitance 180 VGS = 0V, VDS = 160V, = 1.0MHz
Coss eff. Effective Output Capacitance 380 VGS = 0V, VDS = 0V to 160V

Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy 460 mJ
IAR Avalanche Current 26 A
EAR Repetitive Avalanche Energy 32 mJ

Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
44
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

180
(Body Diode) p-n junction diode. S

VSD Diode Forward Voltage 1.5 V TJ = 25C, IS = 26A, VGS = 0V

trr Reverse Recovery Time 160 240 nS TJ = 25C, IF = 26A
Qrr Reverse RecoveryCharge 1.3 2.0 C di/dt = 100A/s
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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1000 100
VGS VGS
TOP 15V TOP 15V
12V 12V
10V 10V
ID , Drain-to-Source Current (A)

ID , Drain-to-Source Current (A)

8.0V 8.0V
100 7.0V 7.0V
6.0V 6.0V
5.5V 10 5.5V
BOTTOM 5.0V BOTTOM 5.0V
5.0V

10

1
1 5.0V

300s PULSE WIDTH 300s PULSE WIDTH

Tj = 25C Tj = 175C
0.1 0.1
0.1 1 10 100 0.1 1 10 100

VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000.00

3.5
I D = 44A

3.0
ID, Drain-to-Source Current ( )

T J = 25C
2.5
100.00
R DS(on) , Drain-to-Source On Resistance

T J = 175C
(Normalized)

2.0

1.5

10.00
1.0

VDS = 15V 0.5

1.00
300s PULSE WIDTH 
V GS = 10V
0.0
5.0 7.0 9.0 11.0 13.0 15.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature ( C)
VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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IRFB/IRFS/IRFSL38N20D

100000 12
VGS = 0V, f = 1 MHZ ID= 26A
Ciss = Cgs + Cgd, Cds SHORTED
VDS= 160V

VGS, Gate-to-Source Voltage (V)

Crss = Cgd 10
Coss = Cds + Cgd VDS= 100V
10000
C, Capacitance(pF)

8
Ciss

1000 6

Coss
4
100
Crss 2

10 0
1 10 100 1000 0 10 20 30 40 50 60 70
VDS, Drain-to-Source Voltage (V) QG Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.00 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)

100.00 TJ = 175C 100

100sec
10.00 10
1msec
T J = 25C

1.00 1
10msec
Tc = 25C
VGS = 0V Tj = 175C
Single Pulse
0.10 0.1
0.0 0.5 1.0 1.5 2.0 2.5 1 10 100 1000
VSD , Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRFB/IRFS/IRFSL38N20D

50
RD
VDS

VGS
D.U.T.
40
RG
+
-VDD
ID , Drain Current (A)

30 10V
Pulse Width 1 s
Duty Factor 0.1 %

20

Fig 10a. Switching Time Test Circuit

10 VDS
90%

0
25 50 75 100 125 150 175

TC , Case Temperature ( C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

1
(Z thJC )

D = 0.50

0.20
0.1

0.10

0.05
Thermal Response


0.02
0.01  SINGLE PULSE
(THERMAL RESPONSE)
P DM

0.01
t1

t2

0.001
 Notes:
1. Duty factor D =
2. Peak T
t1 / t

J = P DM x Z thJC
2
+T C

0.00001 0.0001 0.001 0.01 0.1 1

t 1, Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFB/IRFS/IRFSL38N20D


1 5V 900
ID
TOP 11A
19A
L D R IV E R 720 BOTTOM 26A
VDS

EAS , Single Pulse Avalanche Energy (mJ)

RG D .U .T + 540
V
- DD
IA S A
20V
tp 0 .0 1
360

Fig 12a. Unclamped Inductive Test Circuit

180

V (B R )D SS
tp
0
25 50 75 100 125 150 175

Starting Tj, Junction Temperature ( C)

Fig 12c. Maximum Avalanche Energy

IAS Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

QG
50K
.2F
10 V 12V
.3F
QGS QGD +
V
D.U.T. - DS

VG VGS

3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
Low Stray Inductance
Ground Plane

Low Leakage Inductance
Current Transformer
-

+


- +
-

RG dv/dt controlled by RG +
Driver same type as D.U.T. VDD
-
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFET Power MOSFETs

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IRFB/IRFS/IRFSL38N20D

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

2 .8 7 (.1 1 3 )
2 .6 2 (.1 0 3 )
1 5 .2 4 (.6 0 0 )
1 4 .8 4 (.5 8 4 )
1 4 .0 9 (.5 5 5 )
1 3 .4 7 (.5 3 0 )
1 0 .5 4 (.4 1 5 ) 3 .7 8 (.1 4 9 ) -B -
1 0 .2 9 (.4 0 5 ) 3 .5 4 (.1 3 9 ) 4 .6 9 (.1 8 5 )
4 .2 0 (.1 6 5 )
-A - 1 .3 2 (.0 5 2 )
1 .2 2 (.0 4 8 )
6.4 7 (.2 5 5 )
6.1 0 (.2 4 0 )
4
1 .1 5 (.0 4 5 ) L E A D A S S IG N M E N T S
M IN 1 - GATE
1 2 3 2 - D R A IN
3 - S OU RC E
4 - D R A IN
4 .0 6 (.1 6 0 )
3 .5 5 (.1 4 0 )

0 .9 3 (.0 3 7 ) 0 .5 5 (.0 2 2 )
3X 3X
0 .6 9 (.0 2 7 ) 0 .4 6 (.0 1 8 )
1 .4 0 (.0 5 5 )
3X
1 .1 5 (.0 4 5 ) 0 .3 6 (.0 1 4 ) M B A M
2 .9 2 (.1 1 5 )
2 .6 4 (.1 0 4 )
2 .5 4 (.1 0 0)
2X
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B .
2 C O N T R O L L IN G D IM E N S IO N : IN C H 4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .

TO-220AB Part Marking Information

EXAMPLE: THIS IS AN IRF1010 PART NUMBER

LOT CODE 1789 INTERNATIONAL
ASSEMBLED ON WW 19, 1997 RECTIFIER
LOGO
IN THE ASSEMBLY LINE "C"
DATE CODE
YEAR 7 = 1997
ASSEMBLY
LOT CODE WEEK 19
LINE C

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 IRFB/IRFS/IRFSL38N20D

D2Pak Package Outline

1 0.54 (.4 15) -B - 1 0.16 (.4 00 )

1 0.29 (.4 05) 4.69 (.1 85) RE F.
1.4 0 (.055 ) 4.20 (.1 65)
-A- 1.3 2 (.05 2)
M AX. 1.2 2 (.04 8)
2
6.47 (.2 55 )
6.18 (.2 43 )

1.7 8 (.07 0) 15 .4 9 (.6 10) 2.7 9 (.110 )

1.2 7 (.05 0) 1 3 14 .7 3 (.5 80) 2.2 9 (.090 )

5 .28 (.20 8) 2.61 (.1 03 )

4 .78 (.18 8) 2.32 (.0 91 )

8.8 9 (.3 50 )
1.40 (.0 55) 1.3 9 (.0 5 5) R E F.
3X
1.14 (.0 45) 0 .93 (.03 7 ) 0.5 5 (.022 ) 1.1 4 (.0 4 5)
3X 0.4 6 (.018 )
0 .69 (.02 7 )
5 .08 (.20 0) 0 .25 (.01 0 ) M B A M M IN IM U M R E CO M M E ND E D F O O TP R IN T

1 1.43 (.4 50 )

NO TE S: LE A D A SS IG N M E N TS 8.89 (.3 50 )
1 D IM EN S IO N S A FTER SO L D ER D IP. 1 - G A TE
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 2 - D R AIN 17 .78 (.70 0)
3 - S O U RC E
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
3 .8 1 (.15 0)

2.5 4 (.100 )
2 .08 (.08 2) 2X
2X

D2Pak Part Marking Information

THIS IS AN IRF530S WITH PART NUMBER

LOT CODE 8024 INTERNATIONAL
ASSEMBLED ON WW 02, 2000 RECTIFIER F530S
IN THE ASSEMBLY LINE "L" LOGO
DATE CODE
YEAR 0 = 2000
ASSEMBLY
LOT CODE WEEK 02
LINE L

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IRFB/IRFS/IRFSL38N20D

TO-262 Package Outline

TO-262 Part Marking Information

EXAMPLE: THIS IS AN IRL3103L

LOT CODE 1789 PART NUMBER
INTERNATIONAL
ASSEMBLED ON WW 19, 1997
RECTIFIER
IN THE ASSEMBLY LINE "C" LOGO
DATE CODE
YEAR 7 = 1997
ASSEMBLY
LOT CODE WEEK 19
LINE C

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 IRFB/IRFS/IRFSL38N20D
D2Pak Tape & Reel Information
TR R

1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 .6 0 (.0 6 3 )
4 .1 0 ( .1 6 1 ) 1 .5 0 (.0 5 9 )
3 .9 0 ( .1 5 3 ) 0.3 6 8 (.01 4 5 )
0.3 4 2 (.01 3 5 )

F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 ) 1 1.6 0 (.4 57 )

1 .6 5 ( .0 6 5 ) 1 1.4 0 (.4 49 ) 2 4 .3 0 (.9 5 7 )
1 5 .42 (.60 9 )
2 3 .9 0 (.9 4 1 )
1 5 .22 (.60 1 )
TRL
1 .75 (.06 9 )
1 0.9 0 (.4 2 9) 1 .25 (.04 9 )
1 0.7 0 (.4 2 1) 4 .7 2 (.1 3 6)
16 .1 0 (.63 4 ) 4 .5 2 (.1 7 8)
15 .9 0 (.62 6 )

F E E D D IR E C T IO N

13.50 (.532 ) 2 7.4 0 (1.079 )

12.80 (.504 ) 2 3.9 0 (.9 41)

3 30 .00 6 0.0 0 (2.36 2)

( 14.1 73 ) M IN .
MAX.

30.4 0 (1.19 7)
N O TE S : M A X.
1 . CO M F OR M S TO E IA -418 . 26 .40 (1 .03 9) 4
2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 24 .40 (.9 61 )
3 . DIM E NS IO N M EA S UR E D @ H U B.
3
4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E.
Notes:
Repetitive rating; pulse width limited by Coss eff. is a fixed capacitance that gives the same charging time
max. junction temperature. as Coss while VDS is rising from 0 to 80% VDSS .
Starting TJ = 25C, L = 1.3mH This is only applied to TO-220AB package.
RG = 25, IAS = 26A. This is applied to D2Pak, when mounted on 1" square PCB
ISD 26A, di/dt 390A/s, VDD V(BR)DSS, (FR-4 or G-10 Material ). For recommended footprint and soldering
TJ 175C. techniques refer to application note #AN-994.
Pulse width 300s; duty cycle 2%.
TO-220 package is not recommended for Surface Mount Application.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101] (IRFB38N20D),
& Industrial (IRFS/SL38N20D) market.
Qualification Standards can be found on IRs Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/02
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