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1015CX_Cedar Trail Platform Introduction

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EU ALSA Training
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Agenda
1 Cedar Trail Overview
2 Cedar Trail framework Introduction
3 Pineview vs. Cedarview Component Comparison
4 ACPI Power State
5 DRAM & PCB ID introduce
6 Cedar Trail Platform Power
7 Cedar Trail Power Sequence
8 Component Pin State at Boot
a.CPU b.PCH c.Clock Gen d.EC.e.Vcore &VGFX f.RT8206A ,g.charger25RGRR
9 LAN---AR8152-BL
10 Display Pin State at Boot
11 Audio---ALC269Q-VB5-GR Pin State at Boot
12 Carder Reader---AU6437B52-GDL-GR Pin State at Boot
13 Common BUG Circuit and solution
14 Debug flowchart for power issue
15 Instance
16 QA

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 fix
vinaCedar Trail Overview Cedar Trail will replace the Pine Trail?This
new series will be based on the 32nm
fabrication process, just like Sandy Bridge.
This helps drop the power consumption
and you have the liberty to bump up the
clock speeds. It will still be using the older
NM10 chipset, but with added features like
Intel Rapid Start Technology for faster
system resume times, onboard GPU that
now supports 1080p video decoding,
support for Display Port and HDMI 1.3a
and finally DDR3 memory support up to
4GB

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 fix
vina Cedar Trail framework Introduction
100M

100M

33M
24M

Peripheral Component
100M Interconnect Express

100M
48M
25M

100M
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ACPI Power State

G0/S0:Full on
G1/S3:Suspend to RAM ----The system context is maintained in system DRAM,
but power is shut off ton on-critical circuits. Memory is retained, and refreshes
continue. All clocks stop except RTC clock.
G1/S4:Suspend to Disk ----The context of the system is maintained on the disk.
All power is then shut off to the system except for the logic required to resume.
G2/S5:Soft off ----System context is not maintained. All power is shut off
except for the logic required to restart. A full boot is required when waking.
G3:Mechanical off ----power failure Because the system does not have any
power.

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3 DRAM & PCB ID introduce

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Cedar Trail Platform Power
1.A/D_DOCK_IN
Adapter
2? AC_BAT_SYS
BQ24725RGRR 4(d).+5VA
a.BAT
Battery
RT8206AG 8.(i)+5VSUS

3.AC_OK
QW
6(f).P_+3VA_+5VA_EN_10
b.BAT_IN

8(i).+3VSUS
7(h).VSUS_ON

9(j).VSUS_PWRGD

g.PWR_SW 9(j).VSUS_PWRGD
7(h).VSUS_ON
4(d).+5VA APL5325 5(e).+3VA

AC_BAT_SYS
NB637EL
+1.5V_DIMM EMB20N03---\N-
\N-MOS FET MOS FET +1.5V
VSUS_ON SUSC_ON
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Cedar Trail Platform Power
+5VSUS
PQ9108
+5V_PCH +5VS
VSUS_ON +VTTDDR
+1.5V RT9045GSP

+5VSUS +5VS
EMB20N03
SUSB_ON +5VS_USB
AC_BAT_SYS
+3VSUS NB637EL +VCCP
+3VS SUSB_ON
EMB20N03

VCCP_PWRGD
SUSB_ON

+1.5V +1.5VS
EMB20N03
SUSB_ON 1.5VS_PWRGD
+3VSUS +1.8VS
+3VSUS
VCOREPWRGD EMB20N03 EMB20N03 1.8VS_PWRGD
+3VS_PRIME
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Power sequence-AC illustration
29.+3VS_PRIME
25.+VCORE 2.A/D_DOCK_IN
26.+VGFX

24(a).1.8VS
4.+3VA

32.PM_PWROK
CLOCK

3.AC_BAT_SYS
33.H_PWRGD
PD9101& APL5325

35.CPU_RST#
PU9101
24(b).1.8VS_PWRGD
29.+3VS_PRIME
CLK GE

4.+5VA
24.+VCCP_PWRGD
RTC 1.RTCRST# EMB20N03
BAT 30.VRM_PWRGD
29.+3VS_PRIME
30.VRM_PWRGD 5.VSUS_ON

27.VCORE_PWRGD
RT8206

28.VGFX_PWRGD
11.PWR_BTN#

12.PM_SUSC#

D5502
13.PM_SUSB#
34.PCI_RST#

7.+5V_PCH
8.VSUS_PWRGD 6.+3VSUS&+5VSUS

25.+VCORE
26.+VGFX
31.EC_PWROK
AND
5.VSUS_ON
9.EC_RSMRST# PQ9108
11.PWR_SW# 8.VSUS_PWRGD RT8168B
4.AC_OK=1 GQW
29(b).1.8VS_PWRGD

15.+1.5V_DIMM
28.VGFX_PWRGD

14.DEEP_STANDBY
NB637EL 23.+VCCP Memory
D5503 30.VRM_PWRGD
24.+VCCP_PWRGD
16.SUSC_ON 17.+1.5V&5V&3V
4.+3VA_EC RT9045
MB20N03 19.+5VS&+3VS
20.CPU_VRON 18.SUSB_ON GSP
22.+VTTDDR
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Power sequence-DC illustration
24.+VCORE 28.+3VS_PRIME 1.BAT
25.+VGFX

23(a).1.8VS
3.+3VA

31.PM_PWROK
CLOCK

2.AC_BAT_SYS
32.H_PWRGD
PD9101& APL5325

35.CPU_RST#
PU9101
23(b).1.8VS_PWRGD
28.+3VS_PRIME
CLK GE

3.+5VA
23.+VCCP_PWRGD
RTC 0.RTCRST# 29.VRM_PWRGD EMB20N03
BAT

29.VRM_PWRGD 5.VSUS_ON

26.VCORE_PWRGD
RT8206

27.VGFX_PWRGD
11.PM_SUSC#

D5502
12.PM_SUSB#
33.PCI_RST#
4.PWR_BTN#

7.+5V_PCH
8.VSUS_PWRGD 6.+3VSUS&+5VSUS

24.+VCORE
25.+VGFX
30.EC_PWROK
AND
5.VSUS_ON
9.EC_RSMRST# PQ9108
4.PWR_SW# RT8168B
8.VSUS_PWRGD
GQW
28(b).1.8VS_PWRGD

1.BAT_IN=1
14.+1.5V_DIMM Memory
27.VGFX_PWRGD

D5503 29.VRM_PWRGD 13.DEEP_STANDBY

NB637EL 22.+VCCP
23.+VCCP_PWRGD
15.SUSC_ON 16.+1.5V&5V&3V
3.+3VA_EC RT9045
MB20N03 18.+5VS&+3VS
19.CPU_VRON 17.SUSB_ON GSP
21.+VTTDDR
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 fix
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v 1015CX Power System----CPU Voltage-1

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vina 1015CX Power System----CPU Voltage-2

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v CPU Pin State at Boot D3_MAA0
D3_DQ_A0
P1
P2
Voltage D3_WEA# P2
Signal D3_DRAMRST# 1.5V D3_CASA# P3
D3_RASA# P4
D3_DRAM_PWRGD 1.5V
waveform D3_BAA0 P5
D3_VCCA_PWRGD 1.5V D3_BAA1 P5
DDRVREF 0.75V D3_BAA2 P5
D3_CS_A#2 P5
DDRDQPU 0.75V
+VCCP 1.26V-1.3V D3_CKE_A2 P6
PM_PWROK 3.4V D3_CS_A#2 P3
+VCCP_CPU 1.03V
HDMI_DDC_SCL 3.4V D3_CKE_A2 P6
+1.5V_DDR 1.5V HDMI_DDC_SDA 3.4V D3_MA_CLK2 OVER 300MHZ
+1.5V 1.5V SVID_DATA 1.2V D3_MA_CLK#2 OVER 300MHZ
HDMI_HDP# 3.4V
SVID_CLK 1.2V C_FSB_CPU P8-1.1V--100Mhz
+1.5VS 1.5V BREF15V 1.5V
SVID_ALERT# 1.2V C_FSB_CPU# P8-1.1V--100Mhz
+1.5V_ADP 1.5V H_BPMN5_REQ# 1.9V BREFREXT 1.5V AZIL_BCLK P9-24MHZ
H_BPMN4_RDY# 1.9V AZIL_SYNC P10
+3VS_PRIME 3.3V AZIL_RST# 3.3V
SYS_RESET# 3.4V
G_CLKN P11
+3VS_CPU 3.3V SPLTRST# 3.4V G_LVDD_EN 3.3V
H_FERR# 1.2V G_CLKP P11
+1.8VS_CPU 1.8V H_THEMTRIP# 1.2V G_NBL_EN 3.3V G_DATAP2 P12
+1.5V_CPU 1.5V PM_DPSLP# 3.4V G_NBL_CTRL 3.3V G_DATAN2 P12
PM_DPRSTP# 1.2V G_DATAP1 P13
+1.8VS 1.8V H_STPCLK 1.2V BL_EN_R 3.3V
G_DATAN1 P14
+3VS_CPU 3.3V H_SMI# 1.2V G_DDC_DATA 3.3V G_DATAP0 P13
H_TDI 1.2V
+1.5V_ADP 1.5V H_TDO 1.2V G_DDC_CLK 3.3V G_DATAN0 P14
H_TMS 1.2V DPL_CKN P15-27MHZ
+VCCP_PLL 1.12V LVDS_CTRL_DATA 3.3V
H_TRST# 1.2V DPL_CKP P15-27MHZ
+VGFX 980mV-1V H_PROCHOT# 1.2V LVDS_CTRL_CLK 3.3V V_HSYNC P16
+VCORE 1.06V
H_PWRGD
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1.2V
V_DDC_DATA 3.3V V_VSYNC P17
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v P1 P4 P7

P2 P5 P8

P3 P6 P9

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v P10 P13 P16

P11 P14 P17

+1.5V_DIMM 1.5V
p12 P15
RST_GATE_G 5V

D3_DRAMRST# 1.5V
Memory D3_VREFCA 750mV-840mV
Voltage
D3_VREFDQ 750mV-840mV

+VTTDDR 750mV-840mV

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vina 1015CX Power System----PCH

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v PCH Pin State at Boot
Voltage PM_SUSB# 3.3V
BAT_IN LO P1
Signal PM_PWROK 3.3V
waveform PCIE_WAKE# 3.3V
SPLTRST# 3.3V
A20GATE 3.3V SYS_RESET# 3.3V
H_A20M# 1.14V PM_PWRBTN# 3.3V
+3VS H_IGNNE# 1.14V
VRM_PWRGD 3.3V
+VCCDMI_PLL_ICH H_FERR# 1.26V-1.3V
O_KBRST# 3.3V ICH_RI_PU 3.3V
+3VSUS SMI# 1V MCHSYNC 3.3V
+VCCP---1V H_STPCLK 1V THERMAL_ALERT# 3.3V
THEMTRIP# 1V
+5VS LDRQ1# 3.3V H_PWRGD 1V
F_LAD0 3.3V WLAN_LED 3.3V
+1.5VS
ACZ_RST# 3.3V CLKRUN# 3.3V C_SATA_SB# 670mV--100Mhz P1
ICH_5VREF RTCRST# 3.3V C_SATA_SB 670mV--100Mhz P1
USB_CHARGE_ON X
+5V_PCH SMBALERT# 3.3V F_LAD1 P2
S_SMBCLK 3.3V STP_CPU# 3.3V F_LAD2 P3
+1.5VCCA_SATA_PLL
S_SMBDATA 3.3V STP_PCI# 3.3V F_LAD3 P4
+VCC_RTC SMLALERT# 3.3V O_KBC_SCI# 3.3V F_LFRAME# P5
SMLINK0 3.3V ACZ_BCLK 24Mhz P6
+1.5VUSBPLL W_WLAN_EN# 3.3V
SMLINK1 3.3V A_Z_SYNC P7
PM_BATLOW# 3.3V EXTSMI# 3.3V
+3VS_PRIME X1_RTC 32.768Khz
PM_SUSC# 3.3V PM_DPRSTP# 1V X2_RTC 32.768Khz

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 fix P2 P5
vina

P3 P6

P4 P7

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v 1015CX Clock System

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vina CLOCK GEN Check a key

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 ix
fVoltage
vin a
Signal Clock Gen Pin State at Boot
waveform
PIN29 GND
PIN1 +3V_CLK 3.2V
PIN30 C_PCIE_SB# 1.1V--100Mhz P4
PIN2 GND
PIN31 C_PCIE_SB 1.1V--100Mhz P4
PIN3 PEREQ1# 3.2V
PIN32 C_PCIE_NB# 1.1V--100Mhz P4
PIN4 C_REQ#_WLAN 3.2V
PIN33 C_PCIE_NB 1.1V--100Mhz P4
PIN5 FS4(C_LPC_EC) 33MHZ P1
PIN34 +3V_CLK 3.2V
PIN6 GND
PIN35 C_PCIEC_LR6 1.1V--100Mhz P4
PIN7 +3V_CLK 3.2V
PIN8 C_PCI_SB_R P1 PIN36 C_PCIET_LR6 1.1V--100Mhz P4
PIN9
PIN10 CLK_EN
Thank You!
C_48M_R
3.2V
48MHZ P2 PIN37 +3V_CLK_VDDA
PIN38 GND X
3.2V

PIN11 +3V_CLK 3.2V PIN39 C_RESET# X

PIN12 C_FSLA 48MHZ P2 PIN40 C_FSB_NB# 1.1V--100Mhz P4
PIN13 x PIN41 C_FSB_NB 1.1V--100Mhz P4
PIN14 x PIN42 +3V_CLK
PIN15 x PIN43 C_FSB_CPU# 1.1V--100Mhz P4
PIN16 C_FSLB X PIN44 C_FSB_CPU 1.1V--100Mhz P4
PIN17 C_LCD_LVDS 100Mhz P3 PIN45 GND
PIN18 C_LCD_LVDS# 100Mhz P3 PIN46 S_SMBCLK_R 3.4V
PIN19 C_PCIE_LAN 100Mhz P3 PIN47 S_SMBDATA_R 3.4V
PIN20 C_PCIE_LAN# 100Mhz P3 PIN48 +3V_CLK 3.2V
PIN21 +3V_CLK 3.2V PIN49 C_XOUT 4V-14.318MHZ P5
PIN22 X PIN50 C_XIN 4V-14.318MHZ P5
PIN23 X PIN51 GND
PIN24 C_PCIET_LR3 1.1V 100Mhz P4 PIN52 C_DOC_REQ 3.2V
PIN25 C_PCIEC_LR3 1.1V 100Mhz P4 PIN53 C_FSLC 3.2V-14.318MHZ P6
PIN26 C_SATA_SB 670mV--100Mhz P4 PIN54 STP_CPU# 3.4V
PIN27 C_SATA_SB# 670mV--100Mhz P4 PIN55 STP_PCI# 3.4V
PIN28 +3V_CLK 3.2V http://vinafix.vn
PIN56 C_LAN_25M 4.3V-25MHZ P7
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v P1 P4 P7

P2 P5

P3 P6

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v
EC Introduce
EC KB3310 Role

Power sequence control with SB710

Keyboard Controller/Touchpad
CPU Fan control
LCD Backlight control
SMBUS
Smart battery
Thermal sensor
Embedded Controller
ACPI (PC power management): Sleep/wake up/Lid switch
SCI System Control Interrupt to South Bridge
GPIO: Control System Power, LED, AC/DC detect, Charge/discharge control
SPI BIOS ROM, Firmware (8051)
Watch Dog Timer

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EC Check a key

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EC Pin State at Boot
C_LPC_EC 33MHZ P3 O_CHG_LED_GREEN# 3.4V PM_BATLOW# 3.4V
O_K_XCLKI 32.768Khz O_KBRST# 3.4V G_BACKOFF# 3.4V
Voltage O_K_XCLKO 32.768Khz O_KBC_SCI# 3.4V THRO_CPU X
Signal A20GATE 3.4V SUSC_ON 3.4V
F_SERIRQ 3.4V P1
waveform F_LFRAME# P2
S_PCIRST# 3.4V VSUS_ON 3.4V
O_EC_RST# 3.4V CPU_VRON 3.4V
C_PCI_DEBUG 33Mhz P3
+3VA_AEC 3.4V SMB0_CLK X SUSB_ON 3.4V
AC_OK 3.4V SMB0_DAT X EC_PWROK 3.4V
P1
PS-ON 3.4V
EXTSMI# 3.4V CHG_EN# 3.4V
O_LID_EC# 3.4V SPI_WP# 3.4V
DS_LEVELDOWN# 3.4V RST_GATE 5V
P3
O_CHG_LED_ORANGE 3.4V PWR_SW_EC# 3.4V
O_PWR_LED_UP 3.4V EC_RSMRST# 3.4V
VSUS_PWRGD 3.4V AD_MAX_PW1 3.4V

P2 VRM_PWRGD 3.4V PM_LEVELDOWN# 3.4V

PM_SUSB# 3.4V O_FAN0_TACH 3.4V
PM_SUSC# 3.4V O_FAN0_PWM X
CPU_LEVELDOWN# 3.4V PM_PWRBTN# 3.4V
BAT_LEARN X H_PROCHOT# 1.1V
A_OP_SD# 3.4V BAT_IN X
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The basic principle of DC-DC

switching circuit is to regulate the
output voltage value by controlling
the duty cycle.
Vout=Ton/(Ton+Toff)*Vin
Duty cycle=Vout/Vin
TonH-S Turn-on time
Vdriver+Vboot
ToffL-S Turn-on time

Toff
UGATE:

Ton
Vdriver

LGATE:
Vin
Switching advantages compared to Linear
PHASE:
1.Output voltage can be lower
2. High conversion efficiency
Vout:

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v
Vcore&VGFX Check a key

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v
Vcore&VGFX Check a key

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 fix
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v
Vcore&VGFX Check a key

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v
Vcore&VGFX Check a key

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Vcore&VGFX Pin State at Boot
P_VCORE_TONSET_10 1V P_TSENA_10 1V
P_VGFX_UG_20 9.9V P3
P_VCORE_CSP1_10 1V P_OCSETA_10 2.04V
P_VGFX_PHASE_20 5V P4
P_VCORE_CSN1_10 1V P_IBIAS_10 2.28V
P_VGFX_LG_20 5V P5
H_PROCHOT# 1V P_VGFX_BOOST_20 9.9V P2
P_VCORE_COMP_10 1V
P_VCORE_BOOT_20 9.9V P1
P_VCORE_FB_10 1V P_VR_READY_10 1V
P_VCORE_LG_20 5V P5
VCORE_SENSE-_10 X VGFX_PWRGD 3.5V
P_VCORE_PHASE_20 5V P6
P_VCORE_GFXPS2_10 X SVID_ALERT# 1V
P_VCORE_UG_20 10V P7
P_VCORE_VCC_20 5V SVID_DATA 1V
P_SETINIA_10 5V SVID_CLK 1V
P_SETINI_10 5V VGFX_SENSE-_10 X
P_TMPMAX_10 2V P_VGFX_FBA_10 1V
P_ICCMAX_10 X P_VGFX_COMPA_10 1V
P_ICCMAXA_10 X P_VGFX_CSN1_10 1V
P_TSEN_10 1V P_VGFX_CSP1_10 1V
P_OCSET_20 760mV P_VGFX_TONSETA_10 1V
P_VGFX_EN_10 3.5V
Voltage P_VCORE_PVCC_20 5V
waveform P_VCORE_TONSET_R_10 5V

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 fix
vina P2 P5

P3 P6

P4 P7

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v
+3VSUS&+5VSUS Check a key

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v RT8206AGQW Pin State at Boot
Voltage
P_+3VSUS_+5VSUS_REF_10 2.2V
P_+3VA_+5VA_EN_10 19V
P_+5VSUS_O_10 5V
P_+5VSUS_FB_10 2.1V P5
P_+5VSUS_ILIM_10 2.1V
P1
VSUS_PWRGD 3.3V
P_+5VSUS_EN_10 3.3V
P_SUS_SECFB_10 2.3V
P_+3VSUS_EN_10 3.3V
VSUS_PWRGD 3.3V
P_+3VSUS_+5VSUS_SKIPSEL_10 1.92V-2V
P_+3VSUS_O_10 3.3V P2 P6
P_+3VSUS_ILIM_10 2V
P_+3VSUS_FB_10 2V-2.1V
P_AC_APR_UC_10 10V
MARATHON# 3.3V
MARATHON_EC# 3.3V
PWR_SW# 3.3V
PWR_SW_EC# 3.3V
P_+3VA_+5VA_EN_ 18.3V
P3
P_+5VSUS_UG_20 P1
P7
P_+5VSUS_PHASE_20 P2
P_+5VSUS_BOOT_20 P3
P_+5VSUS_LG_20 P4
P_+3VSUS_LG_20 P5
P_+3VSUS_BOOT_20 P6
P_+3VSUS_PHASE_20 P7 P4 P8
P_+3VSUS_UG_20 P8
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Changer
Charger

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BQ24725RGRR NO Battery BATTERY IN
ina
vP_CHG_ACN_10 19V 19V Charger P2
P_CHG_ACP_10 19V 19V Voltage
P_CHG_CMSRC_10 19V 19V P1 waveform
P_CHG_ACDRV_10 24.6V 24.6V

P_CHG_ACOK_10 3V-3.3V 3V-3.3V

P_CHG_ACDET_10 2.6V 2.6V P3

P_CHG_IOUT_10 X X

P_CHG_SDA_10 X P1

P_CHG_SCL_10 X P2 J6003 NO Battery BATTERY IN

P_CHG_ILIM_10 640mV X pin1 x X

pin2 x X
P_BAT_GATE 3V-3.3V 11V P4
pin3 3.3V X
P_CHG_SRN_10 3V-3.3V 11V
pin4 x 3.3V
P_CHG_SRP_10 3V-3.3V 11V
pin5 x 3.3V
P_CHG_LODRV_20 X P3 pin6 x X

P_CHG_REGN_20 5V 5V pin7 x X
pin8 1.1V 11V
P_CHG_BTST_20 5V P4(25.6V)
pin9 1.1V 11V
P5
P_CHG_HIDRV_20 3V-3.3V P4
BAT_IN X 3.3V
P_CHG_PHASE_20 3V-3.3V P5(19.8V)
PS-ON 3.3V 3.3V
P_CHG_VCC_20 19V 19V +3V_PL431 17.3V 9.7V
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 fix
vina
BIOS Pin State at Boot

Voltage
Signal
waveform
Pin1 SPI_CS# 4.5V P1

Pin2 SPI_DO 3.4V P2

P1 P3
Pin3 SPI_WP# 3.4V

Pin4 GND x

Pin5 SPI_DI 4.5V P3

Pin6 SPI_CLK 2.4V P4

P2 P4 Pin7 SPI_HOLD# 3.4V

Pin8 +3VA_SPI 3.4V

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 ix
vina PL8001&PL8003&PL8400&PL8301 Pin State at Boot
f

P_VCCP_PHASE_S

P_1.5V_PHASE_S P_VCORE_PHASE_S P_VGFX_PHASE_S

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v
PL8100&PL8101 Pin State at Boot
P_+3VSUS_PHASE_S

P_+5VSUS_PHASE_S

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v LAN Pin State at Boot
Voltage
Signal
+3V_LAN 3.3V
waveform P1
VDDCT_REG 1.84V
+AVDD_CEN_LAN 1.84V
+AVDDL 1.24V
+AVDDH 2.7V
+DVDDL 1.2V
C_PCIE_LAN 100Mhz P1
C_PCIE_LAN# 100Mhz P1
LX X
PLT_RST# 3.3V
PCIE_WAKE# 3.3V
L_REQ#_LAN X

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v
P1
LVDS CON Pin State
Voltage
Signal P2
PIN1 19V
waveform PIN2 19V
PIN3 3.4V
PIN4 X
PIN5 P1
PIN6 P1
PIN7 X
PIN8 P1
PIN9 P1
PIN10 P2
PIN11 P3 P3
PIN12 P2
PIN13 P3
PIN14 X
PIN1 PIN15 3.4V
PIN16 X
PIN17 3.4V
PIN18 3.4V
PIN19 3.4V
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PIN20 3.4V
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v
Display
P16

P16
P16
P16
X
3.4v
P16

P17

3.4v
3.4v
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v
Audio---ALC269Q-VB5-GR
A_OP_SD#=3.4V

X
P1-24M
X
P2-48K
3.4v

P1 P2

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Carder Reader---AU6437B52-GDL-GR

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Debug flowchart for power issue
Component short to GND Check every
AC_BAT_SYS N
power stage
AC switch MOS damage component
Y
N
+5VA System IC Damage
Y
N
+3VA LDO Damage

Y Change
N Component
VSUS_ON EC Damage

Y
N
5VSUS & 3VSUS Note
& +1.1VSUS Power Stage Damage
signal
power
Next Page

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Debug flowchart for power issue
Power turn on
Y
N +3V& +5V (switch) Switch MOS damage
N
SUSC_ON
+1.5V(DDR) Power stage damage

Y
+3VS & +5VS &
Switch MOS damage
N +1.5VS (switch) Change
N Component
SUSB_ON +VGA_CORE Power stage damage

+2.5VS & +1.8VS LDO damage

Y

N N +CPU_VDD &
CPU_VRON Power stage damage
+CPU_VDDNB

EC damage

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Repair flow
N
AC_BAT_SYS Device short to GND

N
Y
N
PWR Control
+5VA
N
x +3VA IC Damage

Y N
N PWR Control IC
/MOS Damage
N
VSUS_ON
+3VA_EC
N
EC Damage
Y

N PWR_BTN# N
OR IC/MOS Damage
PM_SUSC#
. PM_SUSB# /PCH

N PWR_BTN# N IC/MOS Damage

PM_SUSB# OR
/PCH
.DEEP_STANDBY

N
+5VS&+3VS N IC/MOS Damage
.CPU_VRON
/+1.5VS_PWRGD /EC

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EX1
Adapter light point flashing
N Device short
AC light flashing AC_BAT_SYS
to GND

Battery

PWR short
to GND

Device short
to GND
NB,SB
to GND

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Plug in AC

N Remove +3VAO-> Y EC short

AC light point Device short +3VA ,+5VAO +3VA
flashing to GND
to GND JP point

Y N
PWR short to
GND Sequence
To connect JP

N
Measure Power rail Exchnge PWR IC
H-s& L-s MOS

Exchnge damage
H-s& L-s MOS

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EX2
+3VSUS,+5VSUS No voltage
AC

N N
RT8206
+3VA Remove+3VAO-> +3VA Damage
+3VA JP
Y Y

N EC
VSUS_ON Damage

N
Measure MOS Exchange
OK MOS

IC Damage

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EX3
NB can not charger

Battery OK or not

Have VSET_EC N
EC Damage
And ISET_EC

N Exchanger
MOS ok
or not MOS

Exchange
IC
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EX4
VCORE No voltage
Other power
ok

N
EC
CPU_VRON Damage

N
Measure MOS Exchange
OK MOS

IC Damage

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QA
1How to check EC and BIOS are ok? If EC or Bios don work, how to do
determine is EC fail or need flash bios?

A: EC
(1)Check EC +3VA have or not.
(2)Need have 32.768k.
(3)Put in AC,VSUS ON need hightPress Power SW , Is there a
negative pulse at PM_PWRBTN# Pin(EC)
(4)EC firmware inside the SPI ROM, So if EC can?work,we need
check SPI ROM power and EC post singles have problem or not or
re-flash BIOS.
BIOS
If power OK then SPLTRST# pull highCPU will read data form
SPI ROMat this time if debug code show 00, that may be a
problem with BIOS Measure LPC(F_LFRAME#) have waveform of
not.

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2 If battery can to charge, what do you need check?

A: (1)Check charge PR8807 have voltage at pin1 & pin2 or not.
(2)power MOSFET driver control signal
P_CHG_HIDRV_R_20/P_CHG_LODRV_20 are ok or not,
(3)change IC SMBUSSMB0_CLKSMB0_DATare ok or not,
because EC will via SMBUS to get charge current information .
(4)P_CHG_ILIM_10 voltage is ok or notit will setup the charge
current limit
(5)Check Input current Sense resistor (PR8806) have voltage at pin1
& pin2 or not
3 When hand up the ASUS LOGO, you need check
A: Maybe have problem of the deviceEX :USB or HDD system have
issue.
4 reboot system:
A:1power have short or not
2Clear CMOS
5. BIOS have not AS or F1 at this model
A: EC firmware is include the BIOS

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6 Auto show down, Windows has not finished or open half then
automatic shutdown, which pin or signal engineers need to pay?
A:(1) Check heat module check H_THEMTRIP# have to be pull low
or not.
(2) Select Safe mode then into the systembecause Safe mode
have not to load other driver , can let me to exclude of key part
driver.
(3)in to BIOS setup Try to individually disable the key part or
direct to remove the key part then to repair it.
7. DDR3 will work need have?
A:(1) power.
b. clock:C_FSB_CPU/C_FSB_CPU#
c.D3_DRAM_PWRGD, D3_VCCA_PWRGD
d. reference voltage:DDRVREF, D3_VREFDQ,D3_VREFCA),
e. Reset:D3_DRAMRST#
(2)if you measure and have not find any problem , you need
use onboard memory test program to test memory.

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Thank you for your attention

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