Code: ECCST 02

M. Tech 1st Semester (CBCS) End Semester Examinations, March - 2017

Advanced Digital Signal Processing
(Common to Communication Systems and Signal Processing)
Model Question Paper
Time: 3Hours Max. Marks: 60
Note: Answer any one full question from each unit.

UNIT-I
12
1 z
1. (a) Consider a comb filter G ( z ) 4
. List out the frequencies for G (Z), where peaks
3(1 z )
and notches will be occurred. Draw the magnitude response of G (z). [6]
(b) Realize the following IIR transfer function in the Gray-Markel form and check its BIBO
1 1.6 z 1 0.6 z 2
stability. H ( z) [6]
1 z 1 0.25 z 2 0.25 z 3
OR
1 1
2. (a) Derive the input-output relations Y1 k m X 1 (1 k m ) z X 2 ; Y2 X 1 k m z X 2 for
2

realization of Am ( z ) based on the Two-pair Extraction approach. [6]

1 2 3
(b) Verify whether the filter H ( z ) 1 z 2 z z is a power- symmetric or not. If H(z) is
power- symmetric filter, find its conjugate quadrature filter. [6]
UNIT-II
3. (a) Write about the the Chirp z-Transform Algorithm [4]
(b) Given a nine-point sequence: x(n) { - 0.5, 1, - 0.5, - 0.5, 1, - 0.5, - 0.5, 1, - 0.5} , find
X [ k ] by direct calculation of the DFT. Also state the frequency associated with each X [ k ] if
the sampling frequency is 8000 Hz. [8]
OR
4. (a) Develop a Split-radix FFT algorithm and draw a flow graph for N = 8, in which the input is
in digit reverse order and the output is in the normal order. [7]

(b) Develop the index mapping for implementing a 21-point DFT X [ k ] of a length-21 sequence
x [n] using the prime factor algorithm. [5]
UNIT-III
5. (a) Write about the Interrupts available and its priories in TMS320C67XX Processors. [6]
(b) Compare the Functional Units and their operations to be performed on Fixed-Point Operations
and Floating-Point Operations in TMS320C67XX Processors. [6]
[ PTO ]
 :2:
OR
6. (a) Explain the Linear Addressing mode instructions of TMS320C67XX DSP Processors. [6]
(b) Discuss about Pipelining and its effects in TMS320C54XX DSP Processors. [6]

UNIT-IV
7. (a) Determine the normalized output noise variance due to the input quantization noise for

IIR digital filter realized in parallel form H ( z ) 3 2

. [6]
1
(1 0.7 z ) 1 0.9 z 1
(b) The filter shown in fig.2 below is implemented using (8+1)-bit fixed-point arithmetic. Evaluate
the output noise variance due to the multiplication round-off errors. [6]

Fig. 2.

OR
8. (a) List the errors which arise due to quantization process. Discuss the truncation error in
quantization process. [6]
(b) Find the effect of coefficient quantization on pole locations of the second order IIR system
1
() = (1 0.9 1 + 0.2 2) when it is realized in direct form I and in cascade form. Assume

a word length of 4-bits through truncation. [6]

UNIT-V
9. (a) Discuss about the Musical Sound Processing with Multiple Echo Filter. [7]
(b) Write a MATLAB Program to compute Spectral Analysis of a Sum of Two Sinusoids Using
the DFT. [5]
OR
10. (a) Write about the Dual-tone multi frequency signal detection. [7]
(b) Write a MATLAB Program to compute SigmaDelta A/D Converter Operation. [5]
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