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University of Nairobi

MICROCONTROLLER BASED THREE PHASE INVERTER

Project Index: PRJ 012

By

SANG GIDEON KIPCHIRCHIR

F17/2161/2004

Supervisor: Dr.-Ing. W. Mwema

Examiner: Mr. Ogaba

Project report submitted in partial fulfillment of the requirement for the


award of the degree
of

Bachelor of Science in ELECTRICAL AND ELECTRONIC ENGINEERING of the University of Nairobi

Submitted on 20th may, 2009.Department of Electrical and Information Engineering


Dedication

This project is dedicated to my parents Mr. and Mrs. Koech who have been my source of
inspiration all my life. Your love, care and support throughout my life means the world to me.

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ACKNOWLEDGEMENT

First and foremost I would like to thank God for bringing me this far.

Most gratitude goes to my project supervisor, Dr.-Ing. W. Mwema for his unrelenting advice and
guidance in the design and implementation of the project.

I would also like to thanks my cousins Samson and Gilbert for moral and financial support.

Lastly I would like to take this opportunity to give special thanks to all my classmates. Your continual
support and trust in my abilities has not gone unnoticed

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ABSTRACT
Use of photovoltaic systems to generate electricity in homes and businesses is becoming
increasingly popular, as the cost of conventional electric energy increases while the cost-
effectiveness of solar power systems improves. While much attention is paid to gradual
improvements in the efficiency of solar cells, steps must be taken to improve the efficiency of
the power conversion electronics of the system. Solar electric systems incorporate inverters or
power control units that transform the DC electricity generated by the solar cells into AC to run
appliances or sell to a utility grid.

Inverters convert DC battery power to standard AC power. The AC power produced can run
regular AC appliances, including TVs, computers, microwaves and power tools.

This project presents a design that will attempt to convert 12 V DC power to a three phase 120 V
AC power at 50 Hz. The design is based on CMOS logic inverters made up of power MOSFETS
and a microcontroller. Simulation is carried out and actual implementation done.

From the laboratory measurement, the inverter is seen to generate a three phase 118 V AC at 47
Hz. The discrepancy in frequency of oscillation from the design value can be attributed to the
execution time and propagation delays of the microcontroller and other components.

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Table of contents
Dedication ............................................................................................................................................... ii
ACKNOWLEDGEMENT ............................................................................................................................ iii
ABSTRACT........................................................................................................................................... iv
1.0 INTRODUCTION ................................................................................................................................. 1
1.1 Objective ....................................................................................................................................... 1
1.2 The need for inverter circuit........................................................................................................... 1
1.3 Recognition of previous work......................................................................................................... 1
2.0 LITERATURE REVIEW .......................................................................................................................... 3
2.1 Amplifier type sine-wave inverter .................................................................................................. 3
2.2 The saturated switch...................................................................................................................... 3
2.2.1 The Voltage driven inverter ..................................................................................................... 4
Preloading the inverter .................................................................................................................... 7
Using feedback diodes ..................................................................................................................... 7
2.2.3 The current driven inverter ...................................................................................................... 9
2.3 THREE PHASE INVERTER ............................................................................................................... 11
2.3.1 180 conduction .................................................................................................................... 12
2.3.2 120 conduction .................................................................................................................... 13
2.4 Control of inverter output voltage ............................................................................................... 14
2.5 Reducing of harmonics of the inverter output .............................................................................. 15
2.6 PERFORMANCE PARAMETERS ...................................................................................................... 15
(1) Harmonic factor of nth harmonic (HFn) ..................................................................................... 15
(2)Total harmonic distortion, THD .................................................................................................. 16
(3)Distortion factor, DF .................................................................................................................. 16
(4)Lower-order harmonic, LOH ...................................................................................................... 16
CHAPTER 3: INVERTER DESIGN .............................................................................................................. 16
3.1 The power MOSFET switching circuit ........................................................................................... 16
3.2 Gate drive signals......................................................................................................................... 18
3.3 Switching circuit........................................................................................................................... 22
CHAPTER 4: IMPLEMENTATION ............................................................................................................. 24

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4.1 Gate drive circuit ......................................................................................................................... 24
CHAPTER 5: RESULTS OBTAINED AND ANALYSIS .................................................................................... 25
CHAPTER 6: CONCLUSION AND FUTURE WORK ..................................................................................... 29
6.1Conclusion .................................................................................................................................... 29
6.2 Recommendation for future work ................................................................................................ 29
APPENDIX .............................................................................................................................................. 30
APPENDIX A. CIRCUIT DIAGRAM FOR THE IMPLEMENTATION OF THE PROJECT.................................. 30
APPENDIX B. 1 MICROCONTROLLER ASSEMBLY CODE ........................................................................ 31
APPENDIX B 2. AVR microcontroller hex file for the code developed. ................................................ 33
APPENDIX C: Three phase inverter conduction modes ....................................................................... 34
180 conduction............................................................................................................................. 34
120 conduction mode of operation............................................................................................... 37
APPENDIX D: DATASHEETS ................................................................................................................. 39
ATMEL 8-BIT MICROCONTROLLER DATASHEET. .............................................................................. 39
IRF9540 P-CHANNEL MOSFET ELECRICAL PROPERTIES.................................................................... 45
IRF830 N-CHANNEL POWER MOSFET ELECTRICAL PROPERTIES ...................................................... 46
Electrical Characteristics of the voltage regulator used to power the microcontroller. ................... 47
REFERENCE ............................................................................................................................................ 48

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1.0 INTRODUCTION

1.1 Objective
The project aimed to come up with specification, design and implementation of a microcontroller
based three phase inverter that can work with a solar power panel. In the design proposed, 12 V
DC from the power supply is used as the input.

1.2 The need for inverter circuit


When it is required to provide AC power for a load from a DC supply as the only source of
power for example in the case of solar power, there is need for conversion of the available DC
energy to AC. Most industrial and domestic application utilize AC energy hence the need for the
conversion.
The design proposed in this project can be described by the block diagram of Figure 1.1 the
switching signals are generated by the microcontroller while CMOS logic inverters are used for
switching.

THREE PHASE
DC BUS THREE PHASE
CMOS LOGIC
VOLTAGE LOAD
INVERTER

GATE DRIVE

SWITCHING
SIGNAL

Figure 1.1 Block diagram of the proposed design of the inverter

1.3 Recognition of previous work


Most power inverters available in the market for domestic purposes are single phase. This means
only single phase machines can be run on such inverters. To cater for low power three phase

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machines, there is need for the design of three phase inverters. This project tries to solve this
problem by converting DC voltage to three phase AC.

This project is organized in six chapters. Chapter one gives a general introduction, project
objective and the need for power inverter.

Chapter two gives the theory and background information concerning power inverter. The
principles of operation of both single phase and three phase inverters are outlined here. The
performance parameters are also described.

Chapter three describes the system design. Operation of CMOS logic inverter and how it is used
to realize a power inverter is described in this chapter. A single phase simulation of an inverter is
described and the results explained.

Chapter four explains the actual implementation of the three phase inverter using CMOS logic
inverters. The gate drive circuit used in implementation is described in this chapter.

Chapter five gives the results and analysis of various waveforms obtained at different stages in
the implementation of the project. The waveforms were edited using picture editing software for
clarity.

Chapter six gives the conclusion and recommendation for future work on this project.

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2.0 LITERATURE REVIEW
An inverter circuit is used to convert DC power to AC power. This conversion is achieved either
by transistors or by SCRs. For low power and medium power output, common MOSFETs and
BJTs transistors are suitable but for high power outputs SCRs and high power transistors such as
IGFET are used. For low power self oscillating, transistorized inverters are suitable but for high
power output, driven inverter are more common than self oscillating ones [1]. Moreover for
multiphase ac output, driven inverters must be used.
The driven inverters have better frequency stability because a separate master oscillator is used
for the purpose. For inverter applications, transistors have the following advantages over SCRs:
Higher switching speed
Simplicity in control circuit
Higher efficiency and greater reliability
This is mainly due to the fact that SCR inverters require extra circuit to turn SCRs off, moreover
additional complex logic circuits may be required to prevent false triggering and provide proper
commutation timing. SCRs can handle much higher load current than BJTs and MOSFETs thus,
for high power output, SCRs become more desirable than the transistors.
Inverter circuits may be divided broadly into two classes namely: [1]
1. Amplifier type sine-wave inverter
2. Saturated switch type square wave inverters

2.1 Amplifier type sine-wave inverter


Transistors are used as amplifiers operating in a non saturated condition. The efficiency of this
type of inverter is generally low because of high power dissipation in the transistors. Another
problem is the crossover distortion in class B and C push-pull circuit. These circuits are suitable
for low power outputs where load power factor and load regulation are not important and
efficiency is not a criterion.

2.2 The saturated switch


The saturated switch type inverter has high efficiency because transistors or SCRs are operated
as switches that are either in fully saturated conducting mode or in cut off blocking mode. The

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losses in the semiconductor device are thereby reduced considerably consequently improving the
efficiency and power output as compared to an amplifier type circuit using transistors with same
rating. These inverters can be classified into two groups namely:
Voltage driven inverter
Current driven inverter

2.2.1 The Voltage driven inverter


A voltage driven inverter is defined as any inverter in which the circuit connects to a DC voltage
source through semiconductor switches directly to the primary of a transformer. This is
illustrated in Figure 2.1.

V1 T1
is1 Y
Driving S1 LOAD
circuit

S2 is2 Z

Figure 2.1 Basics scheme Voltage-driven Inverter


In Figure.2.1, S1 and S2 are semiconductor switching devices which open and close alternately at
regular intervals depending on the desired output frequency.V1 is a DC voltage source.
When S1 is closed, the entire source voltage appears across the transformer primary between X
and Y. The saturation voltage drop of the device is small and is generally neglected. S1 remains
closed for certain period of time after which it is opened and S2 closed. S2 remains closed for the
same period of time during which the supply source is impressed across transformer primary
between the point Y and Z. S2 then opens out and S1 closes. Thus an alternating voltage is
generated across the primary of transformer and delivers power to the load through the
secondary.
Since the direct current supply is impressed directly on the primary of the transformer, the output
waveform of the inverter is always a square-wave irrespective of the type of load and load power
factor. The transformer primary current is not always a square-wave since it depends on the type
of load and the load power factor.

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Types of load

Resistive load

The resistive load poses no major problem to the inverter. The voltage waveform is a square-
wave and since current and voltage are in phase the current waveform is also square-wave. This
is as illustrated in the Figure 2.3

(v)

(v)

(A)

Figure 2.3 Voltage and current waveform for a resistive load



Each semiconductor switch conducts for 180 and the magnitude for current depends on the load
demand. The power delivered by each semiconductor device is and current waveform is a
square-wave whose area is proportional to the power delivered.
Inductive load

An AC source when operating on a power factor load delivers power to the load in one half-
cycle and receives power from the load in the next half-cycle. In static inverter the actual power
source is DC and if it has to operate on a power factor load, it must be capable of delivering
power in one half-cycle of the inverter and receiving power in the next half-cycle. In voltage
driven inverter, the transformer voltage is always a square-wave since it works in sequence with
the driving circuit and consequently the current must shift in phase. Therefore in some part of the
voltage waveform, power is delivered to the load and the inverter must be capable of receiving
power and delivering it to the source during the other part of the voltage-wave, or this power

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must be dissipated on the load side of the inverter. The voltage and current waveforms for a
purely inductive load are shown in Figure 2.4.

(v)

(v)

(A)

Figure 2.4 Voltage and current waveforms for a purely inductive load
When the load voltage and current are both either positive or negative, power is absorbed by the
load. But when the load voltage and current are in anti-phase, power is delivered by the load.
In a voltage-driven inverter, the semiconductor devices should pass current as soon as they are
switched on, that is S1 should begin to conduct in the normal direction as the voltage crosses
zero, but due to the inductive load, the current does not change direction instantaneously and
continues to flow in the negative direction. This means that the inductive nature of the load
attempts to force a reverse current through the devices. However, the semiconductor devices are
unidirectional and block the required reverse current. Again the interruption takes place when the
load current is at its peak. This sudden stoppage of current causes a very large reverse voltage
spike to develop on the transformer primary. This reverse voltage is theoretically of infinite
value which can destroy the devices. Switch S2 would also face the same consequence when it
tries to conduct at . This problem can be overcome by providing a path for the load current to
flow during the device switching period. There are two ways to make it effective namely:

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1. Preloading the inverter
2. Using feedback diodes.

Preloading the inverter


Inverter preloading involves connecting a resistance in parallel with the load. This provides a
path for the stored energy in the inductive load to dissipate itself and improves the load power
factor. This method reduces the efficiency of the inverter to a large extent and because of large
power dissipation across the resistor, the inverter size has to be greatly increased.

Using feedback diodes


This method provides a bypass path for the current across the switching semiconductor devices.
This is done by connecting diodes across the semiconductor switches as sown in Figure 2.5
is1
D1
S1 is2
V1 T1
Driving D1 Y
S1 LOAD
circuit
DC voltage source
S2 D2
is2
S2 Z
D2
is2

Figure 2.5 Circuit in a voltage driven inverter with purely inductive load and feedback diodes
The diodes are referred to as feedback or free-wheeling diodes. When seen from the direction of
the load the feedback diodes operate as rectifiers permitting reverse energy to flow from the load
to the source.
Consider the situation when switch S2 is closed and S1 is open, as S2 is opened and S1 is closed,
the current through S2 becomes zero abruptly but the energy in the inductive load tries to force

current in the same direction. This creates a high surge voltage due to L if no path is available

for the current to flow. To avoid this situation, diodes D1 and D2 are connected across the
switches S1 and S2 respectively as shown in figure 2.5, the transformer acts as a source and
excess voltage greater than the supply source forces current through the voltage source V1 and
through the diodes D1. This continues till the transformer voltage becomes equal to or less than

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the supply voltage. So long as D1 is conducting S1 is reverse biased by the voltage drop of D1 and
cannot conduct. As soon as current flowing through D1 becomes zero, S1 begins to conduct if it
is still closed. The same phenomenon occurs in the reverse cycle when S1 is opened and S2 is
closed.
The average current through the supply source is zero since no active power is consumed by the
purely inductive load.
Capacitive load

A capacitive load creates a similar problem to an inductive load for the voltage driven inverters.
The voltage becomes a square wave while the current waveform changes considerably due to
capacitive loading. The voltage and current waveforms of the transformer primary for purely
capacitive load are shown in figure 2.6

e
0 0 0 t

I
t

Figure 2.6 Voltage and current wave form for capacitive load

Each time the semiconductor switch begins to conduct, large current spikes appear in the
transformer primary because the square wave voltage of the transformer secondary supplies
power to reverse-charge the capacitor through the very low impedance presented by the
transformer winding and the reflected saturation resistance of the semiconductor switches. This
current continues to flow till the charge across the capacitor builds up sufficiently. Due to these
large current peaks, the losses in the inverter suddenly rise to a large value lowering the

efficiency. Moreover the high value of exceeds the safe limiting value of the semiconductor

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devices and permanently damages them. This problem is overcome by incorporating some
resistance in the circuit to limit the peak current but this increases the size of the inverter.
Motor load

The voltage driven inverter does not operate satisfactorily on motor loads. At the time of startup,
power requirements of a motor may be several times more than required in the normal operation.
This extreme transient condition may continue for several seconds depending on the angular
acceleration of the motors rotor. Moreover, the power factor of the motor at this condition
becomes extremely low and may be of the order 0.2 lagging. Even with a power factor
improvement capacitor connected across the motor, the low transient power factor during start-
up cannot be compensated. To cater for transient power, the rating of the semiconductor devices
and the transformer should be adequately increased and properly protected. Alternatively the
motor inrush current could be restricted to a minimum value by inserting a current-limiting
resistor in series with the motor.
The loop response should be compatible with the motor, otherwise there will be hunting. That is
sudden application or removal of motor load may generate oscillations which may continue
indefinitely if a proper damping arrangement is not provided.

2.2.3 The current driven inverter


In a current-driven inverter, the current is held at a constant value and fixed in phase with the
switching time and the voltage waveform depends on the type of load. This means that a constant
current is forced to flow through the semiconductor switch and the transformer primary for a full
conduction period irrespective of the source-voltage waveform, type of load and power factor. A
current-driven inverter is shown in Figure 2.7.

T1
Driving S1 LOAD
circuit

- S2

C1

L1 C L2
+ L1 L2

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Figure 2.7 Schematic diagram of a current driven inverter

The circuit of a current driven inverter is quite similar to that of the voltage driven inverter
except that the supply source is a constant-current rather than a constant-voltage source. The
constant voltage source can be converted to a constant current source by inserting a large choke
L (theoretically of infinite inductance) in series with it. This choke, usually referred to as a
feedback choke and must be sufficiently large to maintain a constant current flowing through the
circuit under all conditions. The current waveform is a square wave irrespective if the type of
load and power factor. Usually, the DC supply is a battery which should have sufficiently low
impedance so that power can be drawn and fed back by the inverter whenever required. In
practice however, all the reactive power cannot be dumped properly into the power source
particularly when there are other equipments operating on the same DC bus. This would cause a
large ripple current to appear on the same bus bar and cause interference with the operating of
other equipment. To overcome this difficulty, an LC filter is always provided across the battery
source as shown in Figure 2.7, L1 attenuates the ripple current while C1 serves to reduce the
impedance of the dc source and is capable of delivering and receiving power during operation on
a power-factor load.
The LC filter in conjunction with a battery may be used either in a constant voltage or constant
current inverter. The operation of a current driven inverter with various loads is shown with
various loads is shown with the help of the waveforms in figure 2.8

I (A) a
0 0 0 t

b
VL
t

VL c
t

VL d
t

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Figure 2.8(a) Current waveform, (b) Load voltage waveform at a purely resistive load, (c) Load
voltage waveform at a purely inductive load, (d) Load voltage waveform at a purely capacitive
load.
For a square-wave current, the voltage across a resistive load is a square wave in phase with the
current waveform. For a purely inductive load the voltage is spiked and for a purely capacitive
load, the voltage is triangular. The spiky nature of load voltage on a purely inductive load is
unsuitable for practical purposes. A triangular waveform on a purely capacitive load means that
voltage changes from positive to negative alternately in each half-cycle duration. In the same
half cycle, power is delivered and received from the load without being transferred through the
inverter. This shows that the current-driven inverter has the capability to handle power factor
load without interrupting the semiconductor devices.

2.3 THREE PHASE INVERTER


A three phase inverter may be regarded as three single phase inverters and the output of each
single phase is shifted by 120 with respect to each other. The three single-phase inverters can be
connected in parallel as shown in Figure 2.9 to form the configuration of a three phase inverter.
The transformer primary winding may be connected in Y or delta. The transformer secondary is
normally connected in Y to eliminate triple harmonics (n = 3, 6, 9..) appearing on the output
voltage. [2]

A T1
a
Inverter 1
D

B T2
b
Inverter 2
E

C T3
c
Inverter 3
F
n

Figure 2.9 Block diagram of a three phase inverter

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A three-phase output can be obtained from a configuration of six transistors as shown in Figure
2.10.

Q1 Q3 Q5
V1
D1 D3 D5
g1 g3 g5

a b c

Q6 Q2
Q4
D6 D2
v2 D4
g6 g2
V2 g4

Figure 2.10 three phase inverter formed by three single-phase inverters


Two types of control signals can be applied to the transistor:
180 conduction
120 conduction

2.3.1 180 conduction


Each transistor conducts for 180 . Three transistors remain on at any instance of time. When
transistor Q1 is switched on, terminal a of Figure 2.10 is connected to the positive terminal of
the DC source. When transistor Q4 is switched on, terminal a is connected to the negative
terminal of the DC source. There are six modes of operation in a cycle and the duration of each is
60. The gating signals are as shown in Figure 2.11. The transistors are numbered in the
sequence of gating the transistors. That is 123, 234, 345, 456, 561, and 612. The signals are
shifted from each other by 60 to obtain three phase balanced voltages.
The load may be connected in Y or delta. For a delta connected load, the phase currents can be
obtained directly from line to line voltages. Line currents are determined from phase currents.

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For a Y-connected load, the line-to-neutral voltages must be determined to find the line currents.
g1

0
3 t
2
g2

0
t
g3

0
t
g4

0
t
g5

0
t
g6

t
Vab

0
2 3 t

Vbc

0
2 t

Vca

0
2 t

Figure 2.11 Gating signal Waveforms for and 180 conduction

2.3.2 120 conduction


In this type of control the, each transistor conducts for 120. Only 2 transistors remain ON at any
instance of time. The gating signals are as shown in Figure 2.12. The conduction sequence of the
transistors is 61, 12, 23, 34, 45, 56 and 61. .

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g1

0
3 t
2
g2

0
t
g3

0
t
g4

0
t
g5

0
t
g6

t
Van

0
2 3 t

Vbn

0
2 t

Vcn

0
2 t

Figure 2.12 Gating signal for 120 conduction

2.4 Control of inverter output voltage


There are many applications in which it is necessary to control the output voltage of the inverter.
Two such application are a stabilized AC or DC voltage source from a battery whose voltage
varies during discharge, and an AC motor control system, in which a constant voltage-to-
frequency ratio has to be maintained to avoid saturation of the motor. In both cases, control of
inverter output voltage is necessary [1].
The output voltage of the single-phase inverter is roughly square wave with amplitude
approximately equal to the DC supply voltage. Therefore the output is proportional to the input
voltage.

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The common methods of output control are:
Controlling DC input voltage
Controlling AC output voltage
Pulse width modulation
If inverter is supplied from an AC source through a rectifier, the input to the inverter can be
regulated by means of an induction regulator, variac or a controlled rectifier.
If the supply is DC, it can be regulated by shunt or series regulator or chopper using time-ratio
control method. The pulse width modulation can be applied for both types of inputs.

2.5 Reducing of harmonics of the inverter output


The inverter output waveform may vary depending on the application and the circuit used. In
most cases an AC load requires sinusoidal output but the majority of the inverter produces square
wave voltages. Therefore appropriate means are used to alter the waveforms of the inverter
output to a more or less sinusoidal wave shape.[1] Harmonic attenuation can be achieved by the
following methods:
Resonating the load
Using LC filter
Using pulse width modulation
Using Polyphase inverters.

2.6 PERFORMANCE PARAMETERS


The output of a practical inverter usually contains harmonics therefore, the quality of an inverter
is usually evaluated in terms of the following performance parameters [2].

(1) Harmonic factor of nth harmonic (HFn)


This is the measure of individual harmonic contribution and is defined as:

HFn =

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Where V1 is the RMS value of the fundamental component and Vn is the RMS value of the nth

harmonic component.

(2)Total harmonic distortion, THD


This is the measure of closeness in shape between a waveform and its fundamental components.
It is defined as:

TDH =

(3)Distortion factor, DF
It is a measure of effectiveness in reducing unwanted harmonics without having to specify the
values of a second order filter. DF indicates the amount of harmonic distortion that remains in a
particular waveform after the harmonics of that waveform have been subjected to a second order
attenuation.

DF =

The distortion of an individual (or nth) harmonic component is defined as:

DFn =

(4)Lower-order harmonic, LOH


This is that harmonic component whose frequency is closest to the fundamental frequency, and
its amplitude is greater than or equal to 3% of the fundamental component.

CHAPTER 3: INVERTER DESIGN

3.1 The power MOSFET switching circuit


A power MOSFET is a voltage controlled device and requires little input current. It has a high
switching speed and time on the order of nanoseconds and is used for low power high frequency
converters.
Figures 3.1(a) and (b) shows the switching circuits used in the DC to AC inverter designed .A

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CMOS switch was implemented using power MOSFETs. Two sets of CMOS MOSFET circuits
are used and are controlled by the anti-phase signals generated by the microcontroller.

Q1

Q3
N-MOS OFF

A T1

+12 V
Q2

P-MOS OFF

Q4

Figure 3.1(a) switching circuit used to implement the inverter

In the case when the gate inputs of transistors Q1 and Q3 are L level signifying 0 volts, and the
inputs of transistors Q2 and Q4 are H level signifying 5 volts, transistors Q1 and Q4 are turned
ON while transistors Q2 and Q3 are OFF. Therefore, the electric current flows through the
direction of A to B on the primary coil of the transformer as shown in figure 3.1(a).

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Q5
P-MOS OFF

Q6

A T2

+12 V
Q7

Q8
N-MOS OFF

Figure 3.1(b) Switching circuit used to implement the inverter

Considering when the input of transistor Q5 and Q6 are H level and the input of transistors Q7
and Q8 are L level. Transistors Q6 and Q7 are ON while transistors Q5 and Q8 are OFF.
Therefore, the electric current flows through the direction of B to A on the primary coil of the
transformer as shown in Figure 3.1(b). This is contrary to the case in Figure 3.1(a).
To produce an ac signal, current is made to flow in one direction for half a period then reversed
in the next half period. The duration of the period determines the output frequency.

3.2 Gate drive signals


The gate drive signals were generated by the AVR microcontroller.

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The ATtiny26L AVR microcontroller was chosen as the most appropriate source of gating signal
because it has the following characteristics:
It has an internal oscillator with frequencies ranging from 1 MHz to 8 MHz
Most of its instructions are single clock cycle execution therefore executes faster.
It has an on chip RAM of 128 bytes.
It is programmed by connecting some of its pins directly to some pins of the computer
parallel port.
It is readily available and cheaper than most microcontrollers.
The desired output frequency is 50Hz hence a period of 0.02 seconds equivalent to 20,000
microseconds. To obtain the three phase square wave AC signal, the three phases must be 120
out of phase as shown in the figure 3.2.

Figure 3.2 Three phase square waveforms

From the three phase waveforms drawn in Figure 3.2, it can be observed that for every one sixth
of the period, one of the three waveforms will either be changing from high to low or from low
to high. To achieve this, a delay of one sixth of the period corresponding to 3333 microseconds
was created so that after 3333 microseconds one pin of the microcontroller would be cleared then
another pin set and the delay subroutine executed.
The default frequency of the microcontroller used is 1 MHz according to the Manufacturers
datasheet. This implies that one machine cycle is 1 microsecond. In creating a delay of 3333

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microseconds, two 8-bit registers were used to create software loops. This was done by loading
the registers with a value 3333 and decrementing the value while monitoring the content of the
register. When the value is zero, then the microcontroller clears one pin and sets another pin and
the value loaded to the registers and decremented again [4].
R1, Y1 and B1 in figure 3.2 are taken as the pin from the microcontroller that switches the
waveform from zero to a positive value while R2, Y2 and B2 switches the waveforms from zero
to a negative value. The pins are connected to the coinciding gates R1, R2, Y1, Y2, B1 and B2 of
Figure 3.4.
The sequence of switching ON and OFF various pins is of the microcontroller to achieve a three
phase square-wave waveform is as shown in the flow chart of Figure 3.3
The loop will continue indefinitely as long as power is connected to the device.

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START

CLEAR R2 AND SET R1 THEN LOAD


VALUE 3333 TO THE REGISTER

DECREMENT THE VALUE


IN THE REGISTER

NO
IS THE VALUE ZERO?

YES
CLEAR B1 AND SET B2 THEN LOAD
VALUE 3333 TO THE REGISTER

DECREMENT THE VALUE


IN THE REGISTER

NO
IS THE VALUE ZERO?

YES

CLEAR Y2 AND SET Y1 THEN LOAD


VALUE 3333 TO THE REGISTER

DECREMENT THE VALUE


IN THE REGISTER

NO
IS THE VALUE ZERO?

YES

CLEAR R1 AND SET R2 THEN LOAD


VALUE 3333 TO THE REGISTER

DECREMENT THE VALUE


IN THE REGISTER

NO
IS THE VALUE ZERO?

YES
CLEAR B2 AND SET B1 THEN LOAD
VALUE 3333 TO THE REGISTER

DECREMENT THE VALUE


IN THE REGISTER

NO
IS THE VALUE ZERO?

YES

CLEAR Y1 AND SET Y2 THEN LOAD


VALUE 3333 TO THE REGISTER

DECREMENT THE VALUE


IN THE REGISTER

NO
IS THE VALUE ZERO?

YES

Figure 3.3 Flow chart showing implementation of three phase wave forms by the
microcontroller

21
3.3 Switching circuit
The switching circuit for each phase consists of two CMOS logic inverters with their gates
driven by two anti-phase signals from the microcontroller. Figure 3.3 shows three phase design
of the inverter where the gate drive signals are generated by a microcontroller. The design is
based on the saturated switch approach where high efficiency is achieved because transistors
dissipate very little power.
12 V 9

0
Q1 Q5 Q9

R1 1 Y1 18 B1 20

Q3 Q6 Q10

0 0 0

Q2 Q7 Q11
5 7

2
R2 Y2 B2 10
19 8

3 Q4 Q8 Q12

6
0 0 0
4
T1 T2 T3

IRON_CORE_XFORMER IRON_CORE_XFORMER IRON_CORE_XFORMER

Figure 3.4 Switching circuit of a three phase inverter


The circuit of Figure 3.5 shows the simulation of a single phase inverter using MULTISIM
POWER PRO Edition version 10.0.342 simulation package developed by NATIONAL
INSTRUMENTS. A simulation package which could incorporate a microcontroller could not be
found therefore a signal generator was used in place of a microcontroller with input frequency of
50Hz and the voltage is 10V peak-to-peak. The output of the signal generator was split into two
in creating anti-phase signals, one signal was passed through a logic inverter and the other passed
through a buffer. This was necessary to ensure that both signals had the same propagation delay.
An oscilloscope was connected to the output of the transformer. The output of the simulation is
as presented in Figure 3.6

22
V1
XFG1 12 V

0
Q1

2
U2B IRF9540
5
V(p-p): 14.1 uV
4010BF_10V Q3 V(rms): 11.4 V XSC1
V(dc): 11.4 V
I: 4.83 A
I(p-p): 384 uA
Probe1,Probe1 Ext T rig
IRF830 I(rms): 4.83 A +
0 I(dc): 4.83 A _
Freq.: 50.0 kHz A B
_ _
1 T1 8 + +

0
7
V2 Q2 IRON_CORE_XFORMER
12 V
0
4 IRF9540
U1C 3

4009BCP_10V Q4

IRF830
0

Figure 3.5 Single phase inverter simulation circuit

+2.45

0
t

-2.45V

Figure 3.6 Results of simulating the single phase inverter of Figure 3.5
From Figure 3.6, it can be seen that the output of the inverter is a square wave of output voltage
4.9V peak-to-peak centered at zero volts. The output voltage depends entirely on the transformer
ratio. A step down transformer was used for the simulation.

23
CHAPTER 4: IMPLEMENTATION
A microcontroller based three phase inverter was implemented using CMOS logic inverter.
IRF9540 PMOS and IRF830 NMOS power MOSFETs were used in the actual implementation
of the CMOS logic inverter. These set of power MOSFETs were chosen because of the following
reasons;
They have freewheeling diodes internally connected between their drain and source
They are also affordable
They are locally available
An LM7805 voltage regulator was used to power the microcontroller. Its input voltage was 12V
from the laboratory power supply and the output was a stable 5.1V.

4.1 Gate drive circuit


The output of the microcontroller was a square wave of voltage 2.2V. This voltage could not
drive the gates for the CMOS logic inverter because the threshold voltage for the MOSFETs is
4.5V. Power MOSFETs have large stray capacitance between the gate and source. The effect of
this is that the gate voltage must first charge the capacitance before the gate is turned on. For
efficient switching of the MOSFETs, the gate drive voltage need to be in the range of 10-20 V
depending on the device rating. A simple BJT buffer circuit shown in Figure 4.1 was used for the
gate drive.

R1
1k connetion to the
connection from the MOSFET gate
microcontroller output
pins Q1
R2

10k
BC107BP

Figure 4.1 Buffer circuit used to drive the CMOS logic inverters
The circuit in the Appendix A.1 was connected and the outputs at different points observed in the
oscilloscope and recorded.

24
CHAPTER 5: RESULTS OBTAINED AND ANALYSIS
Different waveforms were obtained at different stages in the implementation of the project.
These are shown in Figures 5.1 to 5.6
Figure 5.1 shows a square wave obtained from all the pins of the microcontroller that were to be
used. The voltage is 2.2 V at a frequency of 47 Hz. The desired output frequency was 50 Hz.

Figure 5.1 Square waveform produced by the microcontroller pins


The waveform of Figure 5.1 is desirable since the delay created sets a pin to high then call the
delay subroutine after which it clears the pin then calls the subroutine. The duty cycle is thus
50% since the same delay subroutine is implemented upon setting a pin to either high or low.
This sequence is continued indefinitely as long as power is connected to the microcontroller.

Figure 5.2 shows the anti-phase square waveforms generated by the microcontroller pins to be
connected to the three transformer primary coils. The waveforms have been coloured and one
waveform shifted downwards in position on the oscilloscope for clarity. It can be seen that both
waveforms have the same frequency and duty cycle of 50%. Similar waveforms could be
obtained for the other two phases.

25
Figure 5.2 Anti-phase signals that drives the CMOS logic inverter gates
phase difference between the red and the yellow phase.
Figure 5.3 shows the 120 The
waveforms were obtained after connecting one channel of the oscilloscope to the output of the
buffer connecting pin R1 from the microcontroller and the second channel was connected to the
output of the buffer connecting pin Y1 from the microcontroller. The two waveforms can be seen
to have a phase difference of 120, same frequency and duty cycle of 50%.

Figure 5.3 Waveforms showing the 120 phase difference between red and yellow phase

26
Figure 5.4 Waveforms showing the 240 phase difference between red and blue phase
Figure 5.4 shows the 240 phase difference between the red and the blue phase. The waveforms
were obtained after connecting one channel of the oscilloscope to the output of the buffer
connecting pin R1 from the microcontroller and the second channel was connected to the output
of the buffer connecting pin B1 from the microcontroller. The two waveforms can be seen to
have a phase difference of 240, same frequency and duty cycle of 50%.

Figure 5.5 Waveforms showing the 120 phase difference between yellow and blue phase

27
Figure 5.5 shows the 120 phase difference between the yellow and the blue phase. The
waveforms were obtained after connecting one channel of the oscilloscope to the output of the
buffer connecting pin Y1 from the microcontroller and the second channel was connected to the
output of the buffer connecting pin B1 from the microcontroller. The two waveforms can be seen
to have a phase difference of 120, same frequency and duty cycle of 50%.
The output voltages obtained at the output of each transformer was 118 V AC at a frequency of
47 Hz. From the design the desired output voltage was 120 V AC at 50 Hz. The difference
between the two values of frequency can be attributed to the use of different components with
unequal propagation delay.
The three phases of the inverter implemented gave same values in terms of voltage and
frequency. The current that the inverter can draw from the source will depend on the load to be
driven.

28
CHAPTER 6: CONCLUSION AND FUTURE WORK

6.1Conclusion
In this project an attempt has been made to come up with a three phase inverter that is suitable
for low power applications.

The design was simulated and actual implementation carried out from which 118 V three phase
AC was generated from a laboratory 12 V DC power source. The frequency of the output
voltages was 47 Hz. The desired output frequency was 50 Hz the difference can be attributed to
execution time and propagation delay of the various components used. An attempt was however
made to take care of these factors by manipulating the value loaded to the registers that created
the software loops in the microcontroller. After several attempts a frequency of 47 Hz was
achieved.

6.2 Recommendation for future work


The implementation of this project is not conclusive. A lot is still to be done to increase the
output power .The following recommendations are suggested for better performance,

1. To obtain a proper sinusoidal ac power output, advanced means of harmonic reduction should
be employed. These includes: staircase modulation, stepped modulation, harmonic injection
modulation and trapezoidal modulation [3].

2. To ensure high switching speed of order of 100 nanoseconds, a proper charging and
discharging circuit should be provided to every CMOS logic inverter gate.

3. The output frequency can still be improved by loading the registers in the microcontroller
responsible for creating delay with different values until the desired output frequency is
achieved.

29
APPENDIX

APPENDIX A. CIRCUIT DIAGRAM FOR THE IMPLEMENTATION OF THE


PROJECT
Figure A.1 shows the Circuit diagram used in the implementation of the project. The circuit was
designed using MULTISIM POWER PRO developed by NATIONAL INSTRUMENTS.
The power source used was a laboratory power supply of 12 V DC.

27
U1
V1 LM7805KC
12 V
LINE VREG
VOLTAGE
C1 COMMON C2 Q1 Q5 Q9
330nF 100nF
0 16 13
C3
100uF R4 R6
1k IRF9540 1k IRF9540 R10 IRF9540
2 6 1k 10
5
1
Q14 Q3 Q15 Q6 Q17 9 Q10
R3 17 R5 19 R9 23
18
10k 10k 10k
AT BC107BP IRF830 BC107BP IRF830 BC107BP IRF830
tiny26l 0 0 0
22
24

Q2 Q7 Q11
20
R2 R8 R12
1k 1k 1k
IRF9540 IRF9540 IRF9540
4 8 11 12
0 3
Q16 Q18
Q13 Q4 R7 7 Q8 R11 25 Q12
R1 21
15
10k 10k
10k BC107BP BC107BP
BC107BP IRF830 IRF830 IRF830
0 0 0

T1 T2
T3

IRON_CORE_XFORMER IRON_CORE_XFORMER
IRON_CORE_XFORMER
28
26

Figure A.1 Microcontroller based three phase inverter circuit


The transformers used in Figure A.1 are 12/240V step up centre tapped transformers.

30
APPENDIX B. 1 MICROCONTROLLER ASSEMBLY CODE
The code below was loaded on the ATtiny26l AVR microcontroller for creating the gate signals.
Six pins on port A of the microcontroller were used. Pins 0 and 1 generated gate anti-phase drive
signals for the red phase, similarly pins 2 and 3 generated anti-phase signals for yellow phase
and pins 5 and 6 generated anti-phase signals for blue phase. To achieve three phase waveforms,
a value equals to a sixth of the period should be used to create the delay. For an output frequency
of 50 Hz a delay of 3,333 microseconds should be created. However, this value could not be
loaded directly on the registers of the microcontroller because there are many components that
the signal passes through introducing their delay. After several trials a frequency of 47 Hz was
obtained after loading the register with value equal to 3674.

.INCLUDE "tn26def.inc" ;Includes the tn26 definitions


;file
.DEF mp = R16
rjmp main
main:
ldi mp,LOW(RAMEND) ;Initiate Stackpointer
out SP,mp
ldi mp,0xFF ; 8 Ones into the universal register
out PORTA,mp ; and to port A (these are the pull-ups)
ldi mp,0xFF ; 8 Ones to the universal register
out DDRA,mp ; and to the data direction register
ldi mp,0
out PORTA,mp
AGAIN:
CBI PORTA,0 ;clear pin 0 of port A
SBI PORTA,1 ;set pin 1 of port A
RCALL DELAY ;call delay subroutine
CBI PORTA,5 ;clear pin 5 of port A

31
SBI PORTA,4 ;set pin 4 of port A
RCALL DELAY ;call delay subroutine
CBI PORTA,2 ;clear pin 2 of port A
SBI PORTA,3 ;set pin 3 of port A
RCALL DELAY ;call delay subroutine
CBI PORTA,1 ;clear pin 1 of port A
SBI PORTA,0 ;set pin 0 of port A
RCALL DELAY ;call delay subroutine
CBI PORTA,4 ;clear pin 4 of port A
SBI PORTA,5 ;set pin 5 of port A
RCALL DELAY ;call delay subroutine
CBI PORTA,3 ;clear pin 3 of port A
SBI PORTA,2 ;set pin 2 of port A
RCALL DELAY ;call delay subroutine
RJMP AGAIN ; jump to label AGAIN to repeat the sequence.
; delay loop generator
DELAY:
LDI R21, $0B ;load register 21 with value decimal 11
LOOP0: LDI R22, $DD ;load register 22 with value decimal 221
LOOP1: DEC R22 ;decrement value in register 22 by 1
BRNE LOOP1 ;branch to loop1 if value in register 22 is not equal to zero else
;proceed to the next instruction
DEC R21 ;decrement the value in register 21 by 1
BRNE LOOP0 ;branch to loop0 if value in register 21 is not equal to zero else
;proceed to the next instruction
; =============================
RET ;return to the main program.

32
APPENDIX B 2. AVR microcontroller hex file for the code developed.

The hex file for the microcontroller program used in the implementation of the project is given
below. This is the obtained after conversion of the assembly code in Appendix B1 and is the
value loaded in the microcontroller.The software used to load the hex code to the microcontroller
was WINAVR-20080512 developed by ATMEL .

:020000020000FC
:1000000000C00FED0DBF0FEF0BBB0FEF0ABB00E 001
:100010000BBBD898D99A10D0DD98DC9A0DD0DA981D
:10002000DB9A0AD0D998D89A07D0DC98DD9A04D008
:10003000DB98DA9A01D0EDCF55E06DED6A95F1F7D6
:0C0040005A95D9F751E05A95F1F7089550
:00000001FF

33
APPENDIX C: Three phase inverter conduction modes

180 conduction
There are three modes of operation in a half cycle and the equivalent circuits are shown in Figure
C.1. The output waveforms for the line voltages are shown in Figure C.2

R R R
c c b
V1 V2 V3

R R R
b a c

MODE 1 MODE 2 MODE 3

Figure C.1
Van
2Vs/3
Vs/3
2 3

Vbn
Vbn
2Vs/3
Vs/3 2 3

Vcn
Vcn
2Vs/3
Vs/3
2 3

34
Figure C.2 Phase voltage for 180 conduction

During mode 1, for 0 t

Req = R + R=

i1= =

Van = Vcn = =

Vbn = =

During mode 2, for t

Req = R+

i2 = =

Van = i2R =

Vbn = Vcn= =

During mode 3 for, t

Req = R +

i3 = =

Van = Vbn = =

35
Van = =

The instantaneous line-to-line current voltage, Vab, in Figure C.2 can be expressed in a Fourier
series, recognizing that Vab is shifted by 30 and the even harmonics are zero.

Vab = (a)

Vbc and Vca can be found by phase shifting Vab by 120 and 240 respectively.

Vbc = (b)

Vca = (c)

From equations (a), (b) and (c) it can be noticed that the triple harmonics n=3, 6, 9, would be
zero in the line to line voltages.

The line to line RMS voltages can be found from,

VL= (e)

= 0.8165

From equation (a) the RMS nth component of the line voltage is

VLN = (f)

Which for n=1, gives the fundamental line voltage.

VL1=

The RMS value of the line-to-neutral voltages can be found from the line voltage

Vp = = =

36
With resistive load, the diodes across the transistors have no function. If the load is inductive, the
current in each arm of the inverter would be delayed to its voltage.

The transistors must be continuously gated since the conduction time of transistors and diodes
depends on the load power factor.

For a Y connected load, the phase voltage is Van = with a delay of 30.

The line current ia for an RL load is given by:

ia =

1
Where n = tan -

120 conduction mode of operation


There are three modes of operation in one-half cycle and the equivalent circuits are Y connected
loads.

During mode1, for 0 t , transistors 1 and 6 conduct,

Van = Vbn = Vcn = 0

During mode 2, for t , transistors 1 and 2 conduct,

Van = Vbn = 0, Vcn =

During mode 3 for, t , transistors 2 and 3 conduct

Van = 0, Vbn = , Vcn =

The line to neutral voltages can be expressed in Fourier series as

Van =

Vbn =

37
Vcn =

The line voltage between line a and b is Vab = Van with a phase advance of 30 . There is a
delay of 30 between turning off transistor Q1 and turning on transistor Q4. Thus there should be
no short circuit of the dc supply.

At any time there, two load terminals are connected to the dc supply and the third one remains
open. Since the transistor conducts for 120 the transistors are less utilized as compared to that of
the 180 conduction for the same load.

38
APPENDIX D: DATASHEETS

ATMEL 8-BIT MICROCONTROLLER DATASHEET.

39
40
41
42
43
44
IRF9540 P-CHANNEL MOSFET ELECRICAL PROPERTIES

45
IRF830 N-CHANNEL POWER MOSFET ELECTRICAL PROPERTIES

46
Electrical Characteristics of the voltage regulator used to power the microcontroller.

47
REFERENCE
[1] P C SEN, POWER ELECTRONICS, 1987, TATA McGRAW-HILL PUBLISHING
COMPANY LIMITED, printed by Rajkamal Electric Press, B 35/9 G T Karnal

[2] MUHAMMAD H.RASHID, POWER ELECTRONICS AND CIRCUITS DEVICES


APPLICATIONS, SECOND EDITION, 1993,Prentice-Hall, Inc, One Lake Street, Upper
Saddle River, New Jersey 07458, U.S.A.

[3] John G. kassakkian Martin F. Schlecht George c. Verghese, Principles of power


Electronics, 2002 by Prentice-Hall(pearson education Inc.) New Jersey USA.

[4] Dhananjay V. Gadre, Programming and customizing the AVR microcontroller, 2001, by
the McGraw-Hill companies, Inc. New York
[5] www.wikipedia/inverter.html

[6] www.smps.us/power-inverter.html

48

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