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2. What is instruction execution cycle? Also write note on pipelined execution and
superscalar architecture
An instruction cycle (sometimes called a fetchdecode
execute cycle) is the basic operational process of a computer. It is the process by which a
computer retrieves a program instruction from its memory, determines what actions the
instruction dictates, and carries out those actions. This cycle is repeated continuously by a
computer's central processing unit (CPU), from boot-up to when the computer is shut down.
Pipeline Execution
The execution of a single instruction by the CPU involves the following steps:
The steps must be performed in sequence for each instruction. In a pipelined CPU, each step
is implemented as an independent stage in an assembly line process.
A single instruction enters the CPU at the Fetch stage and the PC is incremented in one clock
cycle. In the next clock cycle, the instruction moves to the Decode stage. In the third clock
cycle, the instruction moves to the Access stage and the operands are loaded. In the last two
stages, the instruction is executed and the result is stored.
In a five stage pipeline a single instruction will take 5 clock cycles to pass through the
pipeline as shown below:
Since the pipeline stages operate independently, a new instruction may enter the Fetch stage
as soon as the add instruction has moved to the Decode stage. If a sw follows the add, the
pipeline will appear as follows:
Note that while it requires 5 clock cycles to complete the first add instruction,
the sw instruction is completed on the next clock cycle.
Under ideal circumstances, a pipelined processor can produce a result on every clock cycle.
Thus, the peak MIPS (Millions of Instructions Per Second) rating of the CPU equals the clock
speed in Mhz.
A pipelined CPU achieves maximum throughput only when all stages of the pipeline are
filled with instructions which can be processed independently. Performance decreases when
gaps or holes appear in the pipeline. A hole is an empty pipeline stage which is not
processing an instruction.
.MODELSMALL
.STACK100H
.DATA
STR1DB0AH,0DH,'THE SUM OF '
FIRSTNUMDB?
STR2DB' AND '
SECONDNUMDB?
STR3DB' IS '
ANSDB?
STR4DB' $'
.CODE
MAINPROC
MOVAX,@DATA
MOVDS,AX
MOVAH,2
MOVDL,3FH
INT21H
MOVAH,1
INT21H
MOVBL,AL
MOVFIRSTNUM,AL
INT21H
MOVSECONDNUM,AL
ADDBL,AL
SUBBL,30H
MOVANS,BL
MOVAH,9
LEADX,STR1;VARIABLE PRINTING FIRST TO LAST
INT21H
MOVAH,4CH
INT21H
MAINENDP
ENDMAIN
3 Define cache memory its types, cache hit and cache miss and cache
cache memory
A Cache (Pronounced as cash) is a small and very fast temporary storage
memory. It is designed to speed up the transfer of data and instructions. It is
located inside or close to the CPU chip. It is faster than RAM and the
data/instructions that are most recently or most frequently used by CPU are
stored in cache.
A cache hit is a state in which data requested for processing by a component or
application is found in the cache memory. It is a faster means of delivering data to
the processor, as the cache already contains the requested data.
Cache miss is a state where the data requested for processing by a component or
application is not found in the cache memory. It causes execution delays by requiring
the program or application to fetch the data from other cache levels or the main
memory.
The three different types of mapping used for the purpose of cache memory are as follow,
Associative mapping, Direct mapping and Set-Associative mapping.
- Associative mapping: In this type of mapping the associative memory is used to store
content and addresses both of the memory word. This enables the placement of the any word
at any place in the cache memory. It is considered to be the fastest and the most flexible
mapping form.
- Direct mapping: In direct mapping the RAM is made use of to store data and some is
stored in the cache. An address space is split into two parts index field and tag field. The
cache is used to store the tag field whereas the rest is stored in the main memory. Direct
mapping`s performance is directly proportional to the Hit ratio.
- Set-associative mapping: This form of mapping is a modified form of the direct mapping
where the disadvantage of direct mapping is removed. Set-associative mapping allows that
each word that is present in the cache can have two or more words in the main memory for
the same index address.
Example
A line is an adjacent series of bytes in main memory (that is, their addresses are
contiguous). Suppose a line is 16 bytes in size. For example, suppose we have a
212 = 4K-byte cache with 28 = 256 16-byte lines; a 224 = 16M-byte main memory,
which is 212 = 4K times the size of the cache; and a 400-line program, which will
not all fit into the cache at once.
Answer: Memory and disk space are two of the most widely-confused terms in the
computing world. To understand how your computer works, you must first know the
difference between memory and disk space.
The hard disk, sometimes called the "hard drive" (which is actually the mechanism that holds
the hard disk), is a spindle of magnetic discs that can hold several gigabytes of data.
Therefore, disk space refers to how much space you have available on your hard disk for
storing files. When you save a document or install a new program, it gets stored on your hard
disk. The more files you download, install, or save on your hard disk, the more full it
becomes.
Memory, on the other hand, is not the same as disk space! Memory refers to the random
access memory (RAM) inside your computer. RAM consists of small chips also known
as memory modules. Your computer uses memory (RAM) to store actively running programs
on the computer, including the operating system. For example, the operating system's
interface and other processes get loaded into memory when the computer boots up. When you
open a program like Microsoft Word, it gets loaded into the computer's memory as well.
When you quit the program, the memory is freed up for use by other programs.
RAM can be accessed hundreds of times times faster than a hard drive, which is why active
programs are loaded into RAM. Since only small amounts of data from hard disk does need
to be loaded into the system memory at one time, computers typically have much more hard
disk space than memory. For example, a 2012 computer may come with a 2 TB hard drive,
and only 16 GB of RAM.
General-Purpose Registers
General purpose registers deal with a wide variety of performance. They are used to hold data
values or intermediate results that will be used frequently. In general, a CPU uses eight
general-purpose registers such as accumulator, data register, address register, source index,
destination index, base pointer, stack pointer, and base register. The first three general-
purpose register are to be discussed in more details in this report.
Accumulator
Accumulator, is a register to perform calculation as well as holding the results of
computations. Basic operations like add, subtract, multiplication or division can occur within
the accumulator register. Accumulator register stores the operands used in arithmetic
operations and hold the results of calculations formed. T. C. Bartee and D. J. Chapman
(1965) commented that when two numbers are added, the augend is initially stored in the
accumulator register; the addend is then read from the memory; and the sum is placed in the
accumulator. Arithmetic operations such as division and multiplication are performed similar
as the process above. Furthermore, the accumulator can be used to perform the logical
functions like AND and OR.
Data Register
As indicated by Irv.E (2010), the memory data register (MDR), sometimes known as the
memory buffer register, will hold a data value that is being stored to or retrieved from the
memory location currently addressed by the memory address register. Memory data register
and memory address register (to be discussed later) are more closely associated with the
workings of memory.
Address Register
When a CPU wants to retrieve data from RAM, it must get the datas memory address. The
process of obtaining the memory address of the data involving a register which is known as
memory address register. A memory address register (MAR), which tracks of where given
data or instruction is stored in memory. In simple words, this register only hold the data
memory location that requires to be accessed. CPU will never perform arithmetic or
calculation on the memory address registers.
Special-Purpose Registers
A special purpose register is one that has a specific control or data handling task to
carry out. There are a number of special purpose registers within the CPU
.
The diagram above shows that the CPU contains a number of registers in order to process
data and to follow program instructions.
Accumulator
This is one of the general purpose registers but it is specifically used to 'accumulate' the
result of the currently running instructions.
For example, a small piece of code needs to fetch a value from main memory and then add
3 to it and finally store the result back into memory. The accumulator will be used
This instruction will load the
LDA 3001 data at address 3001 into the
accumulator
This instruction adds 3 to the
ADC #3
content of the accumulator
This instruction stores the
STA 3001 content of the accumulator into
main memory at location 3001
Instruction Register
In CPU, instruction register is used to store or hold the actual instruction being loaded,
decoded or executed currently. After loaded the instruction from memory, it is decoded and
then executed. Consequently, instruction register serves the data input to the part of decoding
process. According to Stephen D. (1994), decoding refers to the separation of the instruction
into its op code and operands, the movement of data (such as loading data into a register from
a memory address in one of the operands), and the generation of control signals to the ALU
for instruction execution.
Program Counter
Another special-purpose register in CPU is program counter, also called the instruction
pointer, holds the address of the instruction being executed currently or the address of the
following instruction to be executed. For example, suppose there is an instruction being
executed and after the arithmetic and logic unit (ALU) processed it, the processor will search
for the second instruction to be executed. Thus, program counter is responsible for the
following process, which is to track and store the address of the following instruction that is
going to be executed for the purpose of saving time.
Segment Registers
Segments are specific areas defined in a program for containing data, code and stack. There
are three main segments
Data Segment It contains data, constants and work areas. A 16-bit Data Segment
register or DS register stores the starting address of the data segment.
Apart from the DS, CS and SS registers, there are other extra segment registers - ES (extra
segment), FS and GS, which provide additional segments for storing data.
In assembly programming, a program needs to access the memory locations. All memory
locations within a segment are relative to the starting address of the segment. A segment
begins in an address evenly divisible by 16 or hexadecimal 10. So, the rightmost hex digit in
all such memory addresses is 0, which is not generally stored in the segment registers.
The segment registers stores the starting addresses of a segment. To get the exact location of
data or instruction within a segment, an offset value (or displacement) is required. To
reference any memory location in a segment, the processor combines the segment address in
the segment register with the offset value of the location.
6 Define Programming Language. What is difference between high level
languages and low level language?
High-level Language
1. Learning
2 Understanding
Due to the fact that the complexity of Assembly language programming is extremely hard to
learn, and written programs are hard to maintain, low-level languages often cannot be ported
to another platform, because they use platform, or, rather, CPU specific instructions, thus
written Assembly code for the PC isn't portable to another platform without the complete
rewrite of the program. Programmers were in a need for a language that could be easily
understood and be portable, therefore high-level languages were created. The major
difference between high-level and low-level languages is the way they are written and
compiled.
Low-level languages
1. Learning
Each family of processors has its own set of instructions for handling various operations
such as getting input from keyboard, displaying information on screen and performing
various other jobs. These set of instructions are called 'machine language instructions'.
A processor understands only machine language instructions, which are strings of 1's and
0's. However, machine language is too obscure and complex for using in software
development. So, the low-level assembly language is designed for a specific family of
processors that represents various instructions in symbolic code and a more understandable
form.
It is most suitable for writing interrupt service routines and other memory resident
programs.
The fundamental unit of computer storage is a bit; it could be ON (1) or OFF (0). A group of
nine related bits makes a byte, out of which eight bits are used for data and the last one is
used for parity. According to the rule of parity, the number of bits that are ON (1) in each
byte should always be odd.
So, the parity bit is used to make the number of bits in a byte odd. If the parity is even, the
system assumes that there had been a parity error (though rare), which might have been
caused due to hardware fault or electrical disturbance.
The following table shows the positional values for an 8-bit binary
number, where all bits are set ON.
Bit value 1 1 1 1 1 1 1 1
Bit number 7 6 5 4 3 2 1 0
The value of a binary number is based on the presence of 1 bits
and their positional value. So, the value of a given binary number is
which is same as 28 - 1.
0 0 0
1 1 1
2 10 2
3 11 3
4 100 4
5 101 5
6 110 6
7 111 7
8 1000 8
9 1001 9
10 1010 A
11 1011 B
12 1100 C
13 1101 D
14 1110 E
15 1111 F
Binary Arithmetic
The following table illustrates four simple rules for binary addition
(i) (ii) (iii) (iv)
0 1 1 1
+0 +0 +1 +1
=0 =1 =10 =11
Rules (iii) and (iv) show a carry of a 1-bit into the next left position.
Example
Decimal Binary
60 00111100
+42 00101010
102 01100110