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Neo_M660

Hardware Design Guide

Version V1.2

Shenzhen Neoway Technology Co.,Ltd


Neo_M660 Hardware Design Guide V1.2

Copyright Statement
Copyright 2008 Neoway Technology

All rights reserved by Shenzhen Neoway Technology Co.,Ltd.

The trademark belongs to Shenzhen Neoway Technology Co.,Ltd. Other trademarks,


mentioned in this manual, are property of to their lawful owners.

Clarification

This specification is aimed for use by system, research or test engineers.

With any future revisions of this product or due to other necessities, we may need to amend
the content of this specification without a prior notice.
Unless explicitly stated, all the information and suggestions in this manual do not carry any
implied guarantees.

Shenzhen Neoway Technology Co.,Ltd can provide the needed technical support. If you
experience problems, please feel free to contact the sales representative or send an E-mail
to any of the following mailboxes:

Sales@neoway.com.cn
Support@neoway.com.cn
Website: www.neoway.com.cn

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Neo_M660 Hardware Design Guide V1.2

Contents
1. Overview.......................................................................................................................... 5

2. Appearance ..................................................................................................................... 5

3. Block Diagram ................................................................................................................ 6

4. Parameters ...................................................................................................................... 6

5. Pin Definition and Package ........................................................................................... 7


5.1 Pin Definition ............................................................................................................... 7
5.2 PCB Packaging .......................................................................................................... 10
6. Interface Design Reference .......................................................................................... 11
6.1. Power Supply & Reset Interface .............................................................................. 11
6.1.1. Power Supply ..................................................................................................... 11

6.1.2. Power Sequencing............................................................................................. 16

6.1.3. ON/OFF Pin Description .................................................................................... 17

6.1.4. VCCIO Pin Description ...................................................................................... 19


6.2. Serial interface .......................................................................................................... 19
6.3. SIM card Interface ..................................................................................................... 22
6.4. Indicator Light ........................................................................................................... 24
6.5. RF interface and PCB layout Design ...................................................................... 24
7. Assembly....................................................................................................................... 27

8. Packaging ..................................................................................................................... 27

9. Abbreviations ............................................................................................................... 27

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Neo_M660 Hardware Design Guide V1.2

Revision Record
Version Number Content Revised Effective Date
V1.0 Initial Version 201112
V1.1 Modification: 201202
2. configuration
5.1 Pin definition
5.2 PCB packaging
6.1.1 Power
V1.2 Modify Table 5-1, the order of DTR and RING pins. 201202
Modify 6.5 section on the RF signal wiring
recommendations 22 Pin RF signals

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Neo_M660 Hardware Design Guide V1.2

1. Overview
M660 is an open platform wireless industrial module, supporting GSM / GPRS

communications. It provides the user with reserved CPU resource and plenty of hardware

interfaces, widely used in various industrial and commercial applications. The module has

high quality voice, messaging, data connectivity, GPS location and other functions.

2. Appearance
Table 2-1 M660 Figuration Specification
Specification Description
Dimension 22mm*18.4mm*2.6mm (Length * Width * Height)
Weight 5g

Front View

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Neo_M660 Hardware Design Guide V1.2

3. Block Diagram

PA RAM/FLASH
Baseband
Controller
RF
Section
SIM

Application Interface
Audio

Audio Power
Section Manager UART

4. Parameters
Table 4-1 M660 Main Specification
Specification Description
Frequency Range Dual Band EGSM900/DCS1800
optional EGSM850/DCS1900 or Quad-band
Sensitivity <-106dBm
Maximum Transmitted 850/900 Class4(2W)
Power 1800/1900Class1(1W)
Transient Current Max 1.8 A
Working Current <300mA
Standby Current (Idle) 1.5mA typ.
Working Temperature -30+70
Working Voltage 3.5V4.3Vrecommended 3.9V
Protocol Compatible with GSM/GPRS Phase2/2+
AT GSM07.07
Extensions
Voice FR, EFR, HR, AMR Voice Coding
Message TEXT/PDU
Point of Point/ Cell Broadcast
Grouped Data GPRS CLASS 12
Circuit Switched Data Support CSD Data Business

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Neo_M660 Hardware Design Guide V1.2

Support USSD
Supplementary Service Call Transfer (CFB, CFNA, CFU)
Call Waiting
Three Way Calling
CPU ARM7-EJ@104MHz, 32Mbits SRAM, 32~64Mbits NOR
Flash

5. Pin Definition and Package

5.1 Pin Definition

M660s signal connections use 28 SMD pads of stamp-hole type (half hole).

Figure 5-1
Pin25 ~ 28 for the bottom layer of PAD

Note: M660 module interface level is 2.8V.

The modules internal IO uses 2.8V power supply system, which sets the input voltage for

all IO pins must not exceed the maximum of 3.3V, otherwise it may damage the modules

IO. Possible signal integrity problems in circuits using 3.3V power may lead to overshooting

and output voltages surpassing the 3.3V limit and rising as high as 3.5V sometimes. Such

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Neo_M660 Hardware Design Guide V1.2

situation will cause damage to the IO port if a 3.3V signal is directly connected to the 2.8V

module IO. Hence a level matching external circuit should be used to properly interface with

the IO port. Please refer to chapter 6.2 for more details.

Table 5-1 M660 Module Pin Definition


Pin Signal name I/O Functional description Remark
1 VSIM SIM card power SIM card compatible
1.8/3.0V
2 SIM_CLK DO SIM card clock output
3 SIM_DATA DIO SIM card data input/output Built-in 5k pull-up
resistor
4 GND PWR Ground
5 SIM_RST DO SIM card reset output
6 MICP AI MIC Positive audio input AC peak voltage
200mV
7 MICN AI MIC Negative audio input AC peak voltage
200mV
8 EARP AO Headphone audio output positive Headphone driver
output
9 EARN AO Headphone audio output negative Headphone driver
output
10 DTR DO Standby mode control
11 GND PWR Ground
12 RING DI Call / SMS ring indication
13 VCCIO PWR 2.8V power output Can be used to power
an IO level conversion
circuit, with load
capacity of less than
50mA
14 Reserved Reserved
15 Reserved Reserved
16 URXD1 DI UART1 data reception
17 UTXD1 DO UART1 send data
18 GND PWR Ground
19 Reset DI Reset input Low level reset
20 BACK_LIGHT DO Work status indication output 0.5s High level light LED;
high level, 1.5s low level square needs a capacitor of
wave signal 0.1uF connected in
parallel

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Neo_M660 Hardware Design Guide V1.2

21 ON/OFF DI ON/OFF control input, greater Low level pulse


than or equal to 300ms low pulse changes the ON/OFF
can change ON/OFF status state;
Keep in high level
22 ANT I/O RF input / output, connect a 50
antenna
23 GND PWR Ground
24 GND PWR Ground
25 GND PWR Ground
26 VBAT PWR Module main power input 3.5V ~ 4.3V; 3.9V
recommended
27 VBAT PWR Module main power input 3.5V ~ 4.3V; 3.9V
recommended
28 GND PWR Ground

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Neo_M660 Hardware Design Guide V1.2

5.2 PCB Packaging

The signal connections use 28 SMD pads of stamp-hole type (half hole) and pitch of 2mm.
The PCB encapsulation we recommend is as in figure 5-2. Dimensions in millimeters.

Figure 5-2 Recommended PCB footprinttop view

Note: On the package top right corner, the circular of R = 1.4 is a route keep out area which

corresponds to the bottom of the RF module is the location of test points, PCB layout,

cabling requirements, please refer to section 6.5 of the document.

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Neo_M660 Hardware Design Guide V1.2

6. Interface Design Reference

6.1. Power Supply & Reset Interface


Table 6-1 Power Supply & Reset Interface
Signal Name I/O Function Description Remark
VCCIO PWR 2.8V power output used to IO level
conversion circuit, the
load capacity <50mA
ON/OFF DI Switch control input,
greater than or equal to
300ms low pulse can
trigger changes in on / off
status.
VBAT PWR Module main power input 3.5V~4.3V

6.1.1. Power Supply

VBAT is the main power supply of the module, with power input in the range of 3.5V~4.3V.

The recommended operating voltage is 3.9V. VBAT supplies power to all digital signal and

analog signal sub-systems in the module as well as to the RFPA.

The performance of VBAT will directly affect the performance and stability of the whole

module. The average power consumption of the module is below 1.2W, but the maximum

instantaneous current on the VBAT pin is 1.8A. In the power circuit, it is needed to add a

high capacity aluminum electrolytic capacitor or a lower capacity tantalum

electrolytic capacitor to strengthen the instant large current free-wheeling ability of the

power. The higher the capacity is, the lower maximum current of the power output needs to

be.

It is also needed to add filter capacitors of 0.1uF, 100pF and 33pF to reduce the influence of

the radio frequency interference. Add a capacitor of low impedance and high capacity near

to the module. The detailed testing data is as the following picture:

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Neo_M660 Hardware Design Guide V1.2

Figure 6-1

The data above is related to the equivalent impedance of the capacity and the internal

resistance of the power. For C1 we recommend to use a 1000uF aluminum electrolytic

capacitor of low impedance. A 470uF tantalum electrolytic capacitor can be used instead, if

the space is limited. If the power is supplied by lithium battery directly, C1 could be a 220uF

or 100uF tantalum capacitor.

Maximum current is drawn during calls with weak signal or data transmission process.

Typical current and voltage curve is as below:

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Neo_M660 Hardware Design Guide V1.2

Figure 6-2

The power design of VBAT should ensure that the instantaneous current cant be lower than

3.5V, otherwise the module will not work properly. The main power supply cant exceed 4.3V,

otherwise will cause damage because of overvoltage. The recommended voltage for VBAT

is 3.9V.

In remote applications or conditions with high electromagnetic interference, it must be

ensured that the power is ON/OFF controlled. Use the EN pin of LDO or DC-DC to control

the power ON or OFF. If there is no controlling switch in the power system, please refer to

figure 6-3 for a P-MOSFET electronic switch. According to it, when GPRS_EN is high level,

the switch will be on.

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Neo_M660 Hardware Design Guide V1.2

Figure 6-3

Adding Q2 is to supply Q1 with level, high enough (not lower than 3.9V), to ensure that the

P-MOSSFET will work reliably. If the external controlling signal of MCU can be equal to or

than VDD3V9, the Q1,R1,R2,R4 could be removed and the switch controlled by a low level,

for on state.

Q1 uses IRML6401, or other low internal resistance (Rds) type of P-MOSFET with an

external high value resistor to limit the current drain in on state.

Q2 uses a normal NPN transistor (e.g.MMBT3904) or NPN digital transistor with built-in bias

resistors (e.g. DTC123). When using the digital transistor, R1 and R2 can be removed from

the circuit.

C4 uses a 470uF tantalum electrolytic capacitor, rated for voltage higher than 6.3V.

Alternatively a 1000uF aluminum electrolytic capacitor could be used instead.

It is strongly recommended to add a zener diode for protection. For example

MMSZ5231B1T1G made by ON Semiconductor or PZ3D4V2H made by Prisemi.

On the PCB, please keep the radio-frequency signal as far away as possible from the VBAT

power supply section. The track width should meet the 2A current and the voltage in the

loop should not decrease. Based on that, the track width at the main power of VBAT should

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Neo_M660 Hardware Design Guide V1.2

be about 2mm. The ground plane in the power supply section should be as smooth as

possible, and ground holes are recommended.

If problems arise under low temperature conditions, the highest failure rate will probably be

in the power supply section. The power supply ripple increases with the decrease of load

capacitance. Under low temperature conditions, the activity in the electrolytic capacitors will

lead to decrease in their capacitance, ESR will increase, and that will weaken the filtering

effect. It is recommended to use electrolytic capacitors which have good performance under

low temperature conditions or under high pressure conditions or enlarge the total

capacitance. A proper capacitor with its capacity and impedance should be carefully

selected. So please be careful when you design the product to work under low temperature

conditions especially considering the power supply section.

Prohibit the use of power from the diodes voltage drop directly since it will enlarge the

diodes voltage drop tremendously under the low temperature conditions, and that will lead

to great power supply fluctuations which can make the module unstable.

When you are testing the static electricity and surge, please ensure the stability of the power

supply. Some EMC design may be considered to add to the input and output interfaces in

order to avoid the burr and peak. It is recommended to properly increase the filtering

capacitors to ensure the power supply stability. For example, some 1~4.7uF ceramic

capacitors could be added in parallel.

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Neo_M660 Hardware Design Guide V1.2

6.1.2. Power Sequencing

Figure 6-6 Power Sequencing

Note: Modules main power supply shouldnt be powered on earlier than the external MCU.

Please ensure that the module is powered on after the MCU in order to guarantee its stable

work.

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Neo_M660 Hardware Design Guide V1.2

6.1.3. ON/OFF Pin Description

The ON/OFF pin is an input, controlled by external signal. The input has active low level.

Power on process: When the module is in the shutdown mode, first pull the ON/OFF base

pin down to low level and maintain for more than 300ms (recommended for at least 500ms),

then pull the ON/OFF base pin up to a high level, to start the module. (figure 6-6).

When the module is powered on, the module's serial port will automatically output "+ EIND:

1", said the module has started successfully and is now controllable by AT commands. The

VCCIO will start to continuously output 2.8V.

Power off process: Under the start-up mode, if the ON/OFF is high level, this time pull low

the ON/OFF pin and maintain for 300ms (recommended for at least 500ms), then the

module will enter the shutdown process to disconnect from the network, it usually takes

about 5 seconds for the module to completely shut down and then the main power turned off;

If the ON/OFF is low level, pull the ON/OFF up for some time before the execution of the

shutdown sequence described above. An AT command can also be used to shut the module

down; please refer to the AT command manual.

If you want to change the switch electrical and mechanical level, an inverter should be used.

Figure 6-7 shows the recommended GM660 power on/off circuit with high level active input:

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Neo_M660 Hardware Design Guide V1.2

Figure 6-7 Recommended high level power on circuit

The GM660 ON/OFF is low level effective. After the level inversion above, the USER_ON is

high level on. The ON/OFF pin can also be connected to GND for simplicity. The module will

automatically be on after power on in that case.

A proper control of the ON/OFF pin by the users software must be ensured in order to

guarantee the modules operation.

Note: ON/OFF base pin has the function of start-up and shut-down, thus be careful to avoid

repeated triggering which will result in confusion of start-up or shut-down. For example, if

the user wants to start up, but a 300ms high pulse is issued twice to the ON/OFF pin, the

module will shut down immediately after start up.

Furthermore, pay attention to external MCU and module connection interface level,

especially UART, which may affect the module boot timing. For example, when starting up,

the external MCU has an IO port in output state while the same port is the modules UART

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Neo_M660 Hardware Design Guide V1.2

port UTXD signal (which is also an output pin), the module may be unable to start up.

Also note that, if the module has voltage on some input before starting up, it may also affect

the boot timing. If you provide the module VBAT supply and then use the ON/OFF signal, it

may cause a start-up failure. Therefore, in order to guarantee reliable start-up process, it is

recommended that the ON/OFF should be in low level first, and then give the module VBAT

supply. Then after the module has started completely, pull the ON/OFF control pin back to a

high level.

The ON/OFF controls the modules internal software. If the module has not started properly,

it may be unable to respond to the ON/OFF pin anymore and a forced VBAT power

disconnection should be used in such case.

6.1.4.VCCIO Pin Description

Pin 12 VCCIO is the 2.8V IO interface voltage, which the module supplies to an external

circuit. It has a load capacity of 50mA and is suggested to be used for level shifting interface

only. In power off state then VCCIO output also off.

Moreover, this pin can be used to indicate the running state of the module. When running

normal or in sleep mode, the pin is kept at high level 2.8V, while in power off modem, the pin

is low level.

6.2. Serial Interface


Table 6-2 Serial Ports Interface
Name of signal I/O Function description note
URXD1 DI UART1 data reception
UTXD1 DO UART1 send data

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Neo_M660 Hardware Design Guide V1.2

The serial interface is usually used for AT commands, data services, module firmware

updates and so on.

The module is a DCE device. The connection signals with a terminal device (DTE) are

shown in the following picture:

Figure 6-8 Connection between DCE and DTE

The serial interface of GM660 is 2.8V CMOS; the maximum input level is 3.3V.

Supported baud rates are 1200240048009600192003840057600115200; default

is 115200bps.

If the main power supply for the external MCU is 3.3V, a 200~330ohm resistor is

recommended in series to the module. In the PCB layout, this resistor should be placed

close to the output of the signal source, while the capacitor should be placed close to the

module on the receiving end. Refer to the following figure:

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Neo_M660 Hardware Design Guide V1.2

Figure 6-9 3.3V MCU communication via serial interface

A 100pF or 200pF filter capacitor should be placed close to the module receiver pin. The

values of the resistors and capacitors can be selected based upon the measured signal

waveform. Greater the resistance and capacitance values will provide higher attenuation,

but also will lead to greater signal delay or signal waveform distortions and lower baud rates

on the serial communication, Therefore, the resistance and capacitance should be carefully

selected.

When the users external MCU voltage is 5V, the serial interface needs to be level-shifting

as in the reference circuit below:

Ficure 6-10 5V MCU communication via serial interface

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Neo_M660 Hardware Design Guide V1.2

INPUT connects to the external MCUs TXD, VCC_IN is the external MCUs 5V power

supply, OUTPUT connects to the GM660s RXD input, and VCC_OUT is provided by the

modules VCCIO (2.8V) output.

Another copy of the level-shifting circuit must be used in the second communication wire.

The R3 is a 4.7K~47K resistor and R2 is a 3.3K~10K resistor. Resistance selection is

related to the supply voltage and the serial port baud rate. When the supply voltage is higher

or the baud rate is lower, the resistors can be of higher resistance which will lead to lower

power consumption.

Q1 may be an ordinary NPN transistor (for example, MMBT3904) or built-in bias resistors

NPN digital transistor (for example DTC123). When using the digital transistor, R2 can be

removed from the circuit.

Note: Avoid serial data generated when the module is powering up. Data to the module

should only be sent after the completion of the modules start-up procedure (at least 2s).

The purpose is to avoid forcing the module into a wrong mode of operation.

Take care to avoid crosstalk between the TXD and RXD lines by keeping them apart with

spacing at least 3 times the track width. Avoid running the lines in parallel to each other for

long distances, and where possible run a ground plane close to these lines to avoid

interference. Use through holes to link the ground planes on the various layers.

6.3. SIM card interface


Table 6-3 SIM Card Interface
Signal name I/O Function description Note
VSIM Compatible 1.8/3.0V SIM
PWR SIM card power output
card
SIM_CLK DO SIM card clock output
SIM_RST DO SIM card reset output
SIM_DATA SIM card data Module built-in pull-up
DIO
input/output resistor

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Neo_M660 Hardware Design Guide V1.2

Ficure 6-13 SIM card interface design

GM660 module supports 3V and 1.8V SIM cards.

VSIM is the power supply pin for SIM card with load capacity up to 30mA. This power output

only operates when the module works with the SIM card.

The SIM_DATA line has an internal 5k pull-up resistor and does not require any externally

connected pull-up resistors.

The SIMCLK line is the SIM card clock, normally 3.25MHz. The PCB clock distribution track

must be kept smooth and in one piece. It has to be as short as possible, surrounded with

ground and kept away from the antenna and other RF components. The capacitance

(containing the junction capacitance of the ESD device) of this signal cannot be over 100pF.

It is recommended to have the SIM card circuit close to the card connector. Except for the

VSIM pin, which uses a 0.1uF capacitor, the other SIM card pins shall have 27~33pF

capacitors to ground (refer to figure 6-11). This capacitance shall be put as close as possible

to the relevant pin of the SIM card.

NoteSmall filter capacitance is mainly to prevent any interference from the antenna when it

is too close to the module and the SIM card and otherwise may result the card will not be

read normally or the antennas reception sensitivity got worse, especially when using a short

rubber antenna or internal antenna.

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Neo_M660 Hardware Design Guide V1.2

6.4. Indicator Light


Table 6-1 Indicator light
Signal Name I/O Function Description Remark
BACK_LIGHT O Working status indication

When the module is operating, the indicator light will be on for 0.5s and off for 1.5s.

Note: Connect a 0.1uF capacitor in parallel with the BACK_LIGHT pin.

6.5. RF interface and PCB layout Design

GM660s pin 22 is the RF interface with impedance of 50 that can be connected to a glue

stick, suction cup, built-in picofarads or other antenna types. RF wiring shall take the

necessary measures to avoid the useful frequency band interfering signals, and have a

good shielding between the external antenna and RF connection; If you are using the RF

cable connection, make the external RF cable away from all sources of interference,

especially high-speed digital signal and the switching power supply.

The antenna used should have a standing-wave ratio of 1.1~1.5 and input impedance of

50. The requirements towards the antenna vary with the environment. In general, higher

the intra-band gain results lower out band gain and a better performance of the antenna.

When using multi ports antenna, the isolation between each port should be more than 30dB.

If there is a RF PCB track between the module and the antenna, it must be 50 impedance

controlled and the length should be as short as possible.

If there is RF PCB wiring between the M660 module and the antenna, the track will need to

me 50 impedance controlled, and the length should be as short as possible. For longer

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Neo_M660 Hardware Design Guide V1.2

tracks, a -type matching network will be needed as shown on Figure 6-12. C1,C2 and L1

values need to go through with a 50 matching debugging to determine.

Figure 6-12

In two layer boards the RF track should be as short as possible. The suggested parameters

ate: width of 0.8~1.0mm, and the space between RF and the ground about 1~0.8mm. The

RF track should be short and smooth. Please refer to figure 6-15, which demonstrates a two

layer board application. The RF signal connects to GSC RF connector via PCB track, and

the antenna is connected to the board via cable.

There shouldnt be any track right under the GPRS module.

RF testing point is at PCB projection area. It is needed to have a copper dug area with a

diameter of 1.4mm. There shouldnt be any track in this area. There should be isolation

between this area and the copper dug area of pin 57 and shouldnt be any track or copper in

the top layer, the second layer needs to be a copper area. The other PCB layers can

contain tracks.

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Neo_M660 Hardware Design Guide V1.2

I-PEX RF
connector

RF wiring width of 0.6~1mm, length as


short as possible, the security distance
to the ground of 0.6~1mm, wiring
around need to dig full ground holes.

23, 24 pin need to


connect the ground
both sides completely,
no half-connect ground
conditions.

Module RF test point below the


surface need to dig copper, about
1.4mm in diameter, who should b be
surrounded by paved ground.need to
dig full ground hole, the bottom
The grounding need no dig copper.
copper foil can not
be interrupted

Figure 6-13

Note: The RF signal and RF components in the user's system should be located away from

the high-speed circuits, switching power supplies, power transformers, large inductance

and single-chip clock circuits.

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Neo_M660 Hardware Design Guide V1.2

7. Assembly
The GM660 module uses 28 SMD pads of stamp-hole type (half hole).

8. Packaging
In order to prevent the product of from being affected with damp, caused by using the SMT

way to perform the furnace welding, in the process of production and use of the costumer,

we employ the way of damp-proof packing, such as Aluminum Foil Bag, desiccating agent,

Humidity Indicator Cards, Suck plastic trays, and vacuolization. As a result the product is

kept dry and its life span will be long.

In order to make the SMT way easy, we use the tray to load the product. The user only

needs to install it in the chip mounter according to the fixed direction.


For GM660 storage and SMT notes please refer to <Neoway module SMT reflow production
recommendation_V1.0>.

9. Abbreviations
ADC Analog-Digital Converter
AFC Automatic Frequency Control
AGC Automatic Gain Control
AMR Acknowledged multirate (speech coder)
CSD Circuit Switched Data
CPU Central Processing Unit
DAI Digital Audio interface
DAC Digital-to-Analog Converter
DCE Data Communication Equipment
DSP Digital Signal Processor
DTE Data Terminal Equipment
DTMF Dual Tone Multi-Frequency
DTR Data Terminal Ready
EFR Enhanced Full Rate
EGSM Enhanced GSM GSM
EMC Electromagnetic Compatibility
EMI Electro Magnetic Interference

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Neo_M660 Hardware Design Guide V1.2

ESD Electronic Static Discharge


ETS European Telecommunication Standard
FDMA Frequency Division Multiple Access
FR Full Rate
GPRS General Packet Radio Service
GSM Global Standard for Mobile Communications
HR Half Rate
IC Integrated Circuit
IMEI International Mobile Equipment Identity
LCD Liquid Crystal Display
LED Light Emitting Diode
MS Mobile Station
PCB Printed Circuit Board
PCS Personal Communication System
RAM Random Access Memory
RF Radio Frequency
ROM Read-only Memory
RMS Root Mean Square
RTC Real Time Clock
SIM Subscriber Identification Module
SMS Short Message Service
SRAM Static Random Access Memory
TA Terminal adapter
TDMA Time Division Multiple Access
UART Universal asynchronous receiver-transmitter /
VSWR Voltage Standing Wave Ratio

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