PARALLEL AND DISTRIBUTED COMPUTING

Course code : 15 CS 3215 L T P: 2-2-2

Pre Requisite : 15 CS 2208 Credits:4

Mapping of Course outcomes with Student outcomes

CO.NO. Course outcome's Mapped BTL

SO
CO1 Analyze algorithms for coordination, communication, c 2
security and synchronization in distributed systems
CO2 Design distributed algorithms for handling deadlocks , c 2
Understand distributed shared memory models
CO3 Design algorithms suited for Multicore processor systems e 2
using OpenCL, OpenMP, Threading techniques.
CO4 Characterize features of a workload that allow or prevent c 2
it from being naturally parallelized
CO5 Design and analyze the parallel algorithms for real world e 2
problems and implement them on available parallel
computer systems

SYLLABUS:

Parallel Architecture: Superscalar, Out-of-order execution, Vector Processing/SIMD,

Multithreading: pThreads, Uniprocessor memory systems, A parallel zoo of architectures,
Multicore chips
Principles of Parallel Algorithm Design, Parallel Decomposition: Independence and
partitioning, Data and task decomposition, Synchronization, Characteristics of parallel efficiency
Communication and Coordination: Shared Memory, Threads, Message Passing, Consistency,
Modeling and Analysis of Parallel Computations,
Parallel Programming with MPI, OpenMP, Parallel Algorithms for Solving Time
Consuming Problems (Matrix calculation, System of linear equations, Sorting, Graph
algorithms, Solving PDE, Optimization, Monte Carlo Methods), Load balancing, CUDA
Programming Model,
Distributed service design, Logical Time and Global States in Distributed Systems, Core
distributed algorithms: Election, discovery, Consensus, Self Stabilization, Snapshot, check
pointing, Distributed Resource Allocation, Termination detection, Distributed Shared Memory.

Text Books:

1.Quinn, M. J. Parallel Programming in C with MPI and OpenMP, McGraw-Hill, (2004).

2.A Grama, A Gupra, G Karypis, V Kumar. Introduction to Parallel Computing (2nd ed.).
Addison Wesley, (2003).
3.Michel Raynal, Distributed Algorithms for Message-Passing Systems-Springer, (2013).

Reference Books:
Ajay D. Kshemkalyani, Mukesh Singhal, Distributed Computing: Principles, Algorithms, and
Systems, Cambridge University Press, (2008).

DIGITAL SYSTEM DESIGN

Course Code : 15 EC 1101 LTP: 2-2-2
Pre Requisite : NIL Credits: 4

Mapping of the Course Outcomes with Student Outcomes

CO. No. Course Outcome Mapped SO BTL

Understand numerical and character representations in

CO1 digital logic, number system, data codes and the e 2
corresponding design of arithmetic circuitry.

CO2 Understanding Logic gates, Logic theorems, Boolean e

2
algebra and SOP/POS expressions.

CO3 Combinational and sequential systems design using e,k

2
standard gates and filp-flops and minimization methods
CO4 Verilog HDL design for logic gates, combinational and e,k
2
sequential Logic Functions.

CO5 Concepts of Programmable Logic devices. e,k 2

SYLLABUS:

Basic Principles of Digital Systems: Digital Versus Analog Electronics, Digital Logic Levels,
Review of Number systems, Digital Waveforms, Classification of codes. Logic Functions and
Gates: Basic Logic Functions, Derived Logic Functions, DeMorgans Theorems and Gate
Equivalence, Enable and Inhibit Properties of Logic Gates, Integrated Circuit Logic Gates.

Boolean Algebra: Boolean Expressions, Logic Diagrams and Truth Tables, Sum of Products
and Product of Sums Forms, Theorems of Boolean Algerba, Simplifying SOP and POS
Expressions, Simplification by the Karnaugh Map Method, Simplification by DeMorgan
Equivalent Gates, Universal Property of NAND/NOR Gates. Multilevel Circuits Conversions.
Verilog Constructions to Logic Gates.

Combinational Logic Functions: Decoders, Endoders, Multiplexers, Demultiplexers,

Magnitude Comparators, Parity Generators and Checkers, Adder and Substractor. Sequential
Logic Functions: Latches, NAND/NOR Latches Gated Latches, Edge- Triggered Flip-flops.
Registers and Counters: Shift register, Register with parallel load, Bidirectional shift register
with parallel load. Ripple counter, Synchronous Counters, up-down counter, Ring counter,
Johnson Counter, Modulus counter. Finite State machines: Mealy and Moore machines, state
diagram, Introduction to ASM charts. Verilog HDL design for Combinational and Sequential
Logic Functions.

Programmable Logic Devices: Programmable Logic Array (PLA), Programmable Array Logic
(PAL), Programming of PLAs and PALs, Complex Programmable Logic Devices, Fild-
Programmable Gate Arrays, Using CAD Tools to Implement Circuits in CPLDs and FPGAs,
Applications of CPLDs and FPGAs, Custom chips, Standard Cells, and Gate Arrays.
Text Books

1.Stephen Brown and Zvonko Vrane Fundamentals of Digital Logic with Verilog Design
Second Edition, McGraw-Hill.

2.Robert K. Dueck, Digital Design Cengage Learning-India Edition.

3.M. Morris Mano, Digital Logic and Computer Design, Pearson

Reference Books

1.R. P. Jain, Modern Digital Electronics, McGraw-Hill

2.J. Bhasker , Verilog HDL Synthesis, A Practical Primer, Star Galaxy Publishing.

3.ZviKohavi, Switching and Finite Automata Theory, 2nd Edition, TMH

COMPUTER ORGANIZATION AND ARCHITECTURE

Course code : 15 EM 2001 L T P: 2 2 - 2

Pre Requisite : 15 EC 1101 Credits: 4

Mapping of course outcomes with student outcomes:

C.O. No. Course outcome Mapped SO BTL

Understand the functionality and design the CPU functional

units - control unit, registers, the arithmetic and logic unit, the
CO1 c,k 2
instruction execution unit, and the interconnections among these
components.

Understand, analyze and design main, cache and virtual memory

CO2 organizations. c,k
2

Understand, analyze and design different types of I/O transfer

CO3 techniques. c,k
2

Understand the design issues of RISC and CISC CPUs and the
CO4 design issues of pipeline architectures. c,k
2
 Able to Design combinational and sequential circuits using
CO5 LOGISIM c,k
2

SYLLABUS:

Introduction to computer system and its sub modules, Number System and Representation of
information, Arithmetic and Logical operation and hardware implementation of Arithmetic and
Logic Unit, Introduction to memory Unit, control unit and Instruction Set. Working with an
ALU, Concepts of Machine level programming, Assembly level programming and High level
programming. Various addressing modes and designing of an Instruction set. Concepts of
subroutine and subroutine call, use of stack for handling subroutine call and return. Introduction
to CPU design, Instruction interpretation and execution, Micro-operation and their RTL
specification. Hardwired control CPU design. Micro programmed control CPU design.
Concepts of semiconductor memory, CPU-memory interaction, organization of memory
modules. Cache memory and related mapping and replacement policies. Virtual memory.
Introduction to input/output processing, working with video display unit and keyboard and
routine to control them. Program controlled I/O transfer. Interrupt controlled I/O transfer,
DMA controller. Secondary storage and type of storage devices. Introduction to buses and
connecting I/O devices to CPU and memory. Introduction to RISC and CISC paradigm. Design
issues of a RISC processor and example of an existing RISC processor. Introduction to
pipelining and pipeline hazards, design issues of pipeline architecture. Instruction level
parallelism and advanced issues.

Text Books:

1. William Stallings, Computer Organization and Architecture: Designing for Performance, 8/e,
Pearson Education India. 2010.
2. D. A. Patterson and J. L. Hennessy, Computer Organization and Design, 4/e, Morgan
Kaufmann, 2008.
Reference Books:

1. A. S. Tanenbaum, Structured Computer Organization, 5/e, Prentice Hall of India, 2009.

2. V. C. Hamacher, Z. G. Vranesic and S. G. Zaky, Computer Organization, 5/e, McGraw Hill,
2002.

OPERATING SYSTEMS

Course code : 15 CS 2206 L T P : 2-2-2

Pre Requisite : 15EM2001 Credits : 4

Mapping of Course outcomes with Student outcomes

CO.NO. Course outcome's Mapped BTL

SO
CO1 Develop algorithms for subsystem components b 2

CO2 Understand process and memory virtualization b 2

CO3 understand persistence concepts b 2

CO4 Design and solve synchronization problems , and multi k 3

threading libraries
CO5 Develop application programs using UNIX system calls k 3

SYLLABUS:

Basics: Operating System Functionalities, Types of Operating Systems, Computer Architecture

support to Operating Systems

Process Virtualization: Processes, Process API code, Direct Execution, CPU Scheduling, Multi-
level Feedback, Lottery Scheduling code, Multiprocessor Scheduling

Concurrency: Concurrency and Threads code, Thread API, Common concurrency problems
,Locks, Locked Data Structures, Condition Variables, Semaphores, Event-based Concurrency
Memory Virtualization: Address Spaces, Memory API, Address Translation, Segmentation,
Free Space Management, Introduction to Paging, Translation Look aside Buffers, Advanced
Page Tables, Swapping: Mechanisms, Swapping: Policies.

Persistence: I/O Devices, Hard Disk Drives, Redundant Disk Arrays (RAID), Files and
Directories, File System Implementation, Distributed systems, Data Integrity and Protection

Text Books:

1.Operating Systems: Three Easy Pieces, Remzi H. Arpaci-Dusseau and Andrea C. Arpaci-
Dusseau, Arpaci-Dusseau Books, May, (2014)

2.Operating System Concepts - Operating System Concepts, Sixth Edition, Abraham

Silberschatz, Peter Baer Galvin, Greg Gagne, John Wiley & Sons Inc,(2013).

3.The Design of The Unix Operating System by Maurice J. Bach, PHI Publishing,(2013).

Reference Books:
1.Uresh Vahalia ,Unix Internals-The new Frontiers,Pearson edition,(2006)

2.Andrew S Tanenbaum ,Modern Operating Systems-, Prentice Hall

3.William Stallings ,Operating Systems - Operating System: Internals and Design Principles
4th edition,(2013)