Thesis Jiaming Tan 13mar2013 Final PDF

4T CMOS Active Pixel Sensors under
Ionizing Radiation
4T CMOS Active Pixel Sensors under
Ionizing Radiation
Proefschrift
ter verkrijging van de graad van doctor

aan de Technische Universiteit Delft,
op gezag van de Rector Magnificus prof. ir. K.C.A.M. Luyben,
voorzitter van het College voor Promoties,
in het openbaar te verdedigen

op maandag 15 april 2013 om 10:00 uur
door
Jiaming TAN
Elektrotechnisch Ingenieur
geboren te Shanghai, China
Dit proefschrift is goedgekeurd door de promotor:
Prof. dr. ir. A.J.P. Theuwissen
Samenstelling promotiecommissie:
Rector Magnificus voorzitter

Prof. dr. ir. A.J.P. Theuwissen Technische Universiteit Delft, promotor
Prof. dr. C.I.M. Beenakker Technische Universiteit Delft
Prof. dr. P.J. French Technische Universiteit Delft
Prof. dr. C. Claeys KU Leuven, Belgi
Prof. dr. P. Magnan ISAE, Frankrijk
Prof. dr. ir. R. Dekker Technische Universiteit Delft
Dr. S. Nihtianov Technische Universiteit Delft
ISBN: 978-94-6191-684-6
Printed by: Ipskamp Drukker B.V., Enschede, The Netherlands
Copyright 2013 by Jiaming TAN

Cover design: ZHANG Qin
All rights reserved. No part of this publication may be reproduced or distributed in

any form or by any means, or stored in a database or retrieval system, without the
prior written permission of the author.
To my great family and Zhang Qin
Table of Contents
Chapter 1 Introduction to CMOS Image Sensors in Radiation Environments .................. 1

1.1 Development of Image Sensors and Photography.................................................... 1
1.1.1 Early History of Photography and Cameras .................................................. 1
1.1.2 CMOS Image Sensors: Past, Present and Future ........................................... 2
1.2 CMOS Image Sensors in Radiation Environments .................................................. 6
1.2.1 Space Application of CMOS Image Sensors ................................................. 7
1.2.2 Medical Application of CMOS Image Sensors.............................................. 7
1.3 Basics of Radiation Sources and Damage ................................................................ 9
1.4 Motivation and Objectives...................................................................................... 12
1.5 Thesis Structure ...................................................................................................... 14
1.6 References .............................................................................................................. 15
Chapter 2 Device Characteristics and Radiation Effects of 4T CMOS Image Sensors.... 19
2.1 CMOS Image Sensor Pixels ................................................................................... 19
2.2 Noise Sources in Pinned Photodiode 4T Pixel ....................................................... 25
2.2.1 Fixed-Pattern Noise ..................................................................................... 26
2.2.2 Temporal Noise ............................................................................................ 26
2.3 Spectral Response of 4T Pixels .............................................................................. 29
2.4 Other Performance Parameters of the 4T Pixel ...................................................... 33
2.5 Dark Current in 4T Pixels....................................................................................... 34
2.5.1 Device Physics for Dark Current Generation............................................... 35
2.5.2 Spatial Dark Current Composition within the 4T Pixel ............................... 45
2.5.3 Dark Current from STI................................................................................. 47
2.6 Radiation Effects on the 4T Pixel ........................................................................... 48
2.6.1 Radiation Interaction with Silicon and Silicon Oxide.................................. 49
2.6.2 Ionizing Radiation Damage Mechanism on Metal-Oxide-Silicon Devices . 51
2.6.3 Radiation-Induced Degradation on the 4T Pixel.......................................... 55
2.7 Radiation Hardened Techniques ............................................................................. 56
2.8 Conclusion.............................................................................................................. 58
2.9 References .............................................................................................................. 58
Chapter 3 Analysis of Ionizing Radiation Degradation of 4T CMOS Image Sensors ..... 63
3.1 Background of Radiation Effects Study on 4T Pixels ............................................ 63
3.2 Ionizing Radiation Degradation Measurements ..................................................... 64
3.2.1 Test Structures ............................................................................................. 64
3.2.2 Radiation Settings and Measurement Details .............................................. 66
3.3 Ionizing Radiation Effects on CMOS Image Sensors and Elementary Test
Devices ......................................................................................................................... 67
3.3.1 Radiation Performance of In-Pixel Test Devices......................................... 67
3.3.2 Pixel Dark Signals Regarding Radiation Degradation................................. 71
3.3.3 Electrical Response of PPD and TG to Ionizing Radiation ......................... 74
3.3.4 Radiation Effects on Quantum Efficiency ................................................... 80
3.4 Conclusion .............................................................................................................. 81
3.5 References .............................................................................................................. 83
Chapter 4 Pixel Bias Study and Microscopic View of Degradation for 4T Pixels under
Radiation.............................................................................................................................. 85
4.1 Research Motivation............................................................................................... 85
4.2 Measurement Setting .............................................................................................. 86
4.3 Radiation Degradation with 4T Pixel Bias Condition and Trapped Charges ......... 88
4.4 Microscopic Degradation Mechanism of Ionizing Radiation................................. 93
4.5 Conclusion .............................................................................................................. 96
4.6 References .............................................................................................................. 97
Chapter 5 Radiation-Hardened 4T CMOS Image Sensor Pixel Design ........................... 99
5.1 Radiation-Hardening-by-Design of CMOS Image Sensors.................................... 99
5.2 Sensor Design and Measurement Set-up .............................................................. 100
5.3 4T Pixel Performance with Radiation-Hardened Techniques............................... 104
5.4 Ionizing Radiation Effects on Radiation-Hardened CMOS Image Sensors ......... 109
5.5 Optical Performance of Radiation-Hardened 4T Pixels ....................................... 112
5.6 Conclusion ............................................................................................................ 113
5.7 References ............................................................................................................ 115
Chapter 6 General Conclusions and Future Work .......................................................... 117
6.1 General Conclusions............................................................................................. 117
6.1.1 Radiation-Induced Degradation in 4T CMOS Image Sensors ................... 117
6.1.2 Radiation-Hardening-by-Design of 4T Pixels............................................ 120
6.2 Future Work .......................................................................................................... 121
6.3 References ............................................................................................................ 123
Summary............................................................................................................................ 125
Samenvatting ..................................................................................................................... 129
Abbreviation....................................................................................................................... 133
Acknowledgement.............................................................................................................. 135
List of Publications............................................................................................................ 137
About the Author ............................................................................................................... 139
Introduction to CMOS Image Sensors in Radiation Environments
Chapter 1
Introduction to CMOS Image Sensors in
Radiation Environments
The invention of solid-state image sensors revolutionized photography by

replacing traditional film with digital imaging. In todays world, we enjoy the
unprecedented convenience of making, sharing and archiving pictures by means of
digital cameras. CMOS image sensors, which are conventionally found in
consumer electronics, are also gradually being applied as a means to introduce
digital work flows in high-end fields, such as medicine, space, etc. However,
medical/space applications introduce a new challenge to the design of CMOS
image sensors: harsh radiation environments. Visible light, which is a fundamental
type of electromagnetic radiation for image sensors, has no major impact on the
reliability of performance of the imager. However, in medical applications, other
types of electromagnetic radiation, such as X-ray radiation, do have undesired
effects on the image quality. The same is true for some other radiation sources in
space. Consequently, this thesis studies the effects of radiation on CMOS image
sensors during application and aims to design a radiation-hardened CMOS image
sensor, strengthening the competitiveness of CMOS image sensors used in
radiation environments so as to better promote digitalization in the relevant fields.
1.1 Development of Image Sensors and Photography
Generally speaking, photography is the practice of producing images by the

action of light or another radiant energy on a light-sensitive material [1.1].
Therefore, to some extent, the development of a light-sensitive material
determines the progress which photography can make. With the advances in
photographic film, image quality has achieved great improvement. The invention
of solid-state image sensors took photography into a new era starting in the 1960s
[1.2]. The electronic recording and storing of images has marked an enormous
change and boost in photography, as compared with traditional photographic film,
which also meets the needs of an information age. In order to provide an overview
of how image sensors are currently applied in photography, this section presents a
brief introduction to the development of solid-state image sensors and
photography.
1.1.1 Early History of Photography and Cameras
The first photographic image in the world arose from a breakthrough made by
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Chapter 1
Nicphore Nipce in 1822 by the single action of light on a glass plate coated with
bitumen. This image became damaged later on when Nipce attempted to
reproduce it. Nevertheless, in 1826, Nipce produced the first known permanent
photograph on a polished pewter plate covered with bitumen. The picture quality
was so poor that it was difficult to identify the objects. Moreover, the exposure
lasted eight hours.
Nipce formed a partnership with Louis Daguerre to improve the photography
process. In 1839 Daguerre announced that he had developed an effective and
convenient method for photography by using silver on a copper plate, which is
called a daguerreotype. The daguerreotype not only greatly reduced the exposure
time to thirty minutes from the previous eight hours, but also showed a clearer
image than ever before.
Daguerreotypes were difficult to reproduce and the photographic plates were
fragile. In 1841, the calotype process was invented by Fox Talbot using paper
coated with silver iodide, which was able to overcome the drawbacks of
daguerreotypes. The calotype paper only needed to be exposed for a minute or two
for an intermediate negative image to form on it. The translucent negative image
on the calotype paper could be used to make additional multiple positive prints by
contact printing, which is similar to the working principle of todays photography
films.
With the invention of wet plate collodion photography in 1851 by Frederick
Scott Archer, the negative process was able to produce high-quality, detailed prints.
Furthermore, the ease of reproduction continued to increase, which made
photography much less expensive.
After a series of advances in refining the photographic process, a revolutionary
improvement ultimately came about when George Eastman invented rolled
photography film in 1884 [1.3]. The emergence of roll film made way for a true
modern camera without the need to carry all the aforementioned photographic
plates and chemicals. In 1888, George Eastman introduced the worlds first camera
designed for roll film, the KODAK camera, to the market. Another milestone was
reached in 1900 when the first of the famous BROWNIE cameras became a fixture
of the mass market. Ever since, virtually anyone could take photographs without
having to understand the complex photographic process [1.3].
1.1.2 CMOS Image Sensors: Past, Present and Future
Traditional cameras using photographic film continued evolving after 1900 in

terms of the lens, exposure modes, optical viewer, etc. The camera stepped into an
entirely new era with the digital camera age when photographic film was replaced
with a solid-state image sensor. From that point on, it has been possible to store
images electronically. This section presents an introduction to image sensors and
their past, present and future, with a focus on CMOS image sensors.
The image sensor is a semiconductor device that converts light signals into
2
electronic signals which utilize the photoelectric effect. Light, as a form of

electromagnetic radiation, has a feature of wave-particle duality. The
light-quantum theory proposed by Einstein in 1905 is an important theory basis for
the particle feature of light as well as the photoelectric effect of semiconductor
materials [1.4].
Complementary metal-oxide semiconductor (CMOS) image sensors and charge
coupled device (CCD) sensors are the two main types of image sensors on the
market. For a long time CCD sensors had the edge over CMOS image sensors in
terms of high-quality imaging and market share. George Smith and Willard Boyle
invented the first charge coupled devices (CCDs) at Bell Labs in 1970 [1.5].
Subsequent to developments in the aerospace industry in the 1970s, the first CCD
was applied in the field of astronomy to replace the cosmic-ray-sensitive
photographic film which was equipped in the space vehicles. However, the
commercial success of CCDs began in the 1980s, which was driven by the
camcorder market. In 1981, Sony released the first Sony Mavica camera, which
was a video camera that adopted a CCD sensor [1.6]. Although the early Sony
Mavica was not a true digital camera in consideration of its analog video output in
the NTSC (National Television System Committee) format, it marked the
beginning of the digital camera revolution. From then on CCDs gradually took
over the field of imaging. Because of its superior image quality and sensitivity,
CCDs even nowadays continue to find acceptance in high-end digital photography
and military application.
Even though CCDs overwhelmed CMOS image sensors in terms of market
share for a long time due to their high-quality image, MOS-technology-based
image sensors had in fact appeared earlier than CCDs. The development of
MOS-based image sensors was just abandoned later until the 1990s. The invention
of the first transistor in 1947 initiated the development of electronic components
using solid-state materials instead of vacuum tubes [1.7]. Image sensors were
firstly developed with MOS technology despite the technology limitation of that
day also hindering the progress of MOS image sensors.
In 1967, Weckler proposed the operation of charge integration on a
photon-sensing p-n junction [1.8]. This charge integration technology is still being
utilized in the current CMOS image sensors, so Wecklers invention can be
recognized as a CMOS image sensor prototype to some extent. In the same year,
1967, Weimer et al. presented a self-scanned solid-state image sensor with a
180x180 element array fabricated with thin-film technology [1.2]. Shortly
thereafter, Weckler together with Dyck proposed an image sensor with a
photodiode array in the passive pixel structure in 1968 [1.9]. It was also in 1968
that the work of Noble pushed the development of the MOS image sensor one big
step forward. In Nobles image sensor, the in-pixel source-follower buffer and
charge-integrating amplifier were integrated on-chip [1.10], which laid a solid
foundation for the development of modern CMOS image sensors. However, even
in the late 1960s, process technology had not yet advanced far enough that the
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Chapter 1
transistors suffered from variation in threshold voltage and instability of their

on-resistance. Accordingly, the high non-uniformity of the devices in the
photon-sensing array resulted in a large fixed pattern noise (FPN). The early
development of MOS image sensors in the 1960s was thus impeded because of the
excess of noise and poor quality of the image. The appearance of the CCD sensors
in 1970 and the success of its performance in digital imaging made matters worse
for MOS image sensors. The development of MOS image sensors remained
stagnant from the late 1960s until the early 1990s.
Since the 1990s, CMOS technology has progressed a great deal and has become
reliable enough to meet the demands of the microprocessor and the logic units.
The advantages offered by CMOS technology, such as low power, high integration
capability and low cost, opened the door to a second surge in CMOS image sensor
development. Additionally, the camera phone market became a strong driving
force for CMOS image sensor development in the later 1990s and 2000s.
In 1993, Eric Fossum et al. from JPL developed the first CMOS active pixel
image sensor [1.11]. The sensor fabrication adopted the widely available standard
CMOS process of that time. Correlated double sampling (CDS) was performed to
lower the readout noise. The technique of in-column FPN reduction was also
introduced, which greatly improved the noise performance of the sensor. These
also laid the foundation for almost all modern CMOS image sensors.
The first high-performance photodiode-type CMOS image sensor, which was
described by JPL in 1995, could achieve a 72dB dynamic range and a 116V rms
noise level [1.12]. As compared with the previous versions, this sensor included
on-chip timing and digital control circuitry, which initiated the trend toward the
development of the camera-on-a-chip digital imaging with CMOS technology.
Also in 1995, the pinned photodiode was first applied to the active pixel sensor
using CMOS/CCD process technology in a JPL/Kodak collaboration [1.13]. This
work also demonstrated the push to overcome the dark current problem faced by
CMOS image sensors.
With the numerous improvements in CMOS technology, CMOS image sensors
have achieved a great deal of progress in imaging performance. Thus, the gap has
been dramatically narrowed between CCDs and CMOS image sensors in terms of
image quality, especially over the last few years. Additionally, the advantages of
CMOS image sensors in camera-on-a-chip imaging systems, namely fabrication
costs and power consumption, are at a premium for the current consumer market.
Besides the conventional camera phone market, market demand has grown for
application in mobile computing, tablets and even emerging automotive
technologies in recent years. Due to the high readout speed, CMOS image sensors
are a force nowadays in the market of high-speed videography. As of 2012, a
CMOS image sensor output can reach a readout speed of up to 12500 frames per
second (fps) with a resolution of 10241024 pixels and higher frame rates at a
reduced resolution [1.14]. As for sensor resolution, with the rapid scaling of
CMOS technology, the pixel pitch has shrunk significantly over the last few years
4
so that the sensor resolution has increased dramatically within the same chip area.
In 2010, Canon announced the first APS-H-size CMOS image sensor with a
record-high resolution of 120 megapixels [1.15]. The resolution of the traditional
roll film corresponds to 100 megapixels. Thus, in recent years the development of
CMOS image sensors has surpassed its main opponent, CCDs, and even roll film
cameras. In terms of the market, CMOS image sensors are pushing CCDs out of
the picture. Figure 1-1 illustrates the development and performance of both CMOS
image sensors and CCD image sensors over time. From the 1990s, the
performance of CMOS image sensors developed much faster than CCDs.
Moreover, Figure 1-2 shows the recent imaging sensor market share and a forecast
for the future.
Figure 1-1. Development and performance of CMOS image sensors and CCDs over time.
CCD Image Sensor

CMOS Image Sensor
100
Image Sensor Market Share (%)
80 Prediction
60
40
20
0
2010 2011 2012 2013 2014 2015
Year
Figure 1-2. Image sensor market share in recent years and in the future.
Since the current image quality of CCDs is still superior to that of CMOS image
sensors, the future development of CMOS image sensors will still aim to improve
the image quality further with emerging technologies. In the meantime, the pixel
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Chapter 1
pitch will continue to shrink and step into a sub-1m era in order to increase
sensor resolution and/or lower cost. The high integration capability of CMOS
technology also provides more possibilities to develop smart image sensors.
However, as the pixel becomes smaller, the sensor performance degrades in
terms of sensitivity. Image capturing in low-light conditions has always been a
hurdle for CMOS image sensors. Fortunately, the challenges faced by CMOS
image sensors are continuously being overcome by technological progress. The
third generation of Aptina A-Pix technology enables mobile phone cameras to
capture quality images even in low-light conditions by enhancing quantum
efficiency and minimizing crosstalk. The A-Pix technology features front-side
illumination (FSI) with light-guides and deep photodiodes [1.16]. In contrast to
FSI, back-side illumination (BSI) CMOS image sensors, which were first
developed by Sony commercially in 2008, is another technology that enhances
image quality by improving sensitivity [1.17]. The BSI technology could meet the
ongoing requirements for miniaturizing pixel size and improving overall image
quality. In 2012, Aptina announced the planned mass production of a fast BSI
sensor based on their A-PixHS technology, which is a technology that combines
the BSI pixel with an advanced high-speed pixel and sensor architecture [1.16].
Based on the advances made with the present CMOS technology, Sony has
recently announced their plan to distribute a sample of a next-generation stacked
BSI CMOS image sensor [1.18]. The stacked BSI sensor will place the BSI pixel
array on top of a signal processing chip. This technology can further reduce the
size of the image sensor chip, and the large-scale signal processing chip allows for
better chip functionality and higher image quality. Generally speaking, CMOS
image sensors continue to drive the evolution of digital imaging in terms of image
quality and functionalities with the help of advances in CMOS technology.
1.2 CMOS Image Sensors in Radiation Environments
Soon after they were invented, solid-state image sensors were deployed in
radiation environments for space applications [1.19] and medical applications
[1.20]. As described in the previous sub-section, many applications in
radiation-harsh environments previously relied mainly on CCD sensors. However,
with the improvement of CMOS image sensors performance in electro-optics,
such as dark current, quantum efficiency, resolution, and modulation transfer
function (MTF), CMOS image sensors are nowadays a strong, competitive
alternative to application in radiation environments. Moreover, CMOS image
sensors also offer superior advantages with respect to system complexity and
functionality and are inherently resistant to radiation damage compared to CCD
counterparts. However, it is the application in radiation environments that has led
to the radiation study on CMOS image sensor degradation caused by total ionizing
dose effects and displacement damage.
6
1.2.1 Space Application of CMOS Image Sensors
Increasingly more CMOS image sensors can be found in orbit. Cypress HAS2
image sensor was implemented on a star tracker and is now in space on the
Proba-2 satellite [1.21]. The STAR-250, also from Cypress, is being used on a
digital sun sensor developed by TNO of the Netherlands [1.21]. CMOS image
sensors are playing a growing role in space applications due to the inherent
advantages offered by CMOS technology.
CMOS image sensors feature low power consumption, which is tens of mW
compared to hundreds of mW for a CCD with an equivalent format [1.22].
Considering the limited amount of power supplied by the solar system to the
whole space vehicle, the low-power CMOS image sensor is a very attractive
option.
Additionally, CMOS image sensors allow the programmable timing control
functions and signal processing circuits to be integrated on-chip. As compared to
the charge-transfer mechanism and power-consuming off-chip signal processing in
CCDs, the data readout of CMOS image sensors is more flexible so that the access
to sub-windows and individual pixels becomes fast and simple. Consequently,
CMOS image sensors are popular for use in star trackers, where randomly reading
multiple sub-windows is needed to track a number of targets simultaneously
[1.23].
Regarding the advantages of CCDs in quantum efficiency, fill factor and
resolution for space remote sensing, CMOS technology can provide a
hybridization approach to optimize, respectively, the photon-sensitive pixel array
and processing circuits. Backside thinning can highly improve the quantum
efficiency of CMOS image sensors [1.24], which makes it feasible to replace
CCDs for hyperspectral imaging. The integrated processing circuits in the
architecture of CMOS image sensors allow for low noise, large full-well
capacitance, high readout speed and readout of the spectral line of interest. What is
worth mentioning is that there is no frame shift smear for CMOS image sensors,
which is useful for hyperspectral imaging application. However, smear is always a
problem for CCDs in space as it degrades the image quality. The demand is to
avoid the problems faced by CCDs while achieving or even surpassing CCD-like
performance in space application. Thus, there is also a great deal of motivation to
deploy high-end CMOS image sensors in the field of hyperspectral earth
observation and remote sensing [1.25].
1.2.2 Medical Application of CMOS Image Sensors
The innovation of digital radiography has revolutionized medical X-ray imaging

by replacing conventional film radiography and analog video imaging techniques
with a digital workflow. Digital X-ray imaging can greatly raise the operation
efficiency. Once the image is digital, it can be accessed not only in real-time but
7
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also simultaneously in multiple locations with the help of modern digital

communication technology. It also makes result sharing and remote peer review
simpler and more efficient. Digital images are more convenient to archive than
film, and can be easily used to set an electronic record. Advanced digital
processing of digital images can even provide computer-aided diagnoses. In
addition, digital radiography technologies reduce the dose utilization while
significantly improving the image quality.
Digital X-ray technology includes computed radiography (CR), image
intensified CCDs (II-CCDs) and flat panel detectors (Direct and Indirect
Detection). Detective quantum efficiency (DQE) and the modulation transfer
factor (MTF) are usually used to compare the imaging system performance of
different digital radiography technologies. In terms of DQE and MTF, CR shows a
poor performance. Furthermore, CR uses a separate scanning operation to read the
information in digital format from the phosphor imaging plates and therefore
cannot be used for real-time X-ray imaging. Thus, flat panel detectors and
II-CCDs are the main forms of digital radiography in wide use. State-of-art digital
radiography uses the flat panel detector. Flat panel detectors have significant
advantages over the image-intensified CCDs in terms of physical size and weight.
The II-CCD is bulky and large due to its optical system. Moreover, the flat panel
detector can usually provide a smaller detector pitch and a larger field of view
(FOV), which is suitable for dentomaxillofacial imaging [1.26]. Considering
image quality, the X-ray image generated by the image intensifier has geometrical
distortion and veiling glare because the signal conversion in an II-CCD undergoes
many stages and may suffer from distortion in between. However, a flat panel
detector generates neither distortion nor veiling glare [1.26]. Due to the on-chip
electronics integration, the flat panel detector also makes it possible to access
regions-of-interest by simply addressing certain columns and rows. Therefore, flat
panel detectors are nowadays becoming increasingly popular in digital X-ray
imaging applications because of the aforementioned advantages.
Depending on the X-ray conversion methodology, a flat panel detector can be
classified as either direct or indirect. The flat direct X-ray imager converts X-rays
directly into electrons for image capturing, making use of conversion materials,
like amorphous selenium (a-Se). Selenium is a material that suffers from
instability over time and temperature, and has image lag. Consequently, the flat
direct X-ray imager is not suitable for real-time imaging application. Thus, the
modern flat panel detector mainly relies on indirect X-ray imaging, where the
scintillator first converts X-rays into visible light and then either an amorphous
silicon thin-film-transistor (TFT) panel or a CMOS image sensor captures the light
in order to generate digital image [1.27].
8
Table 1-1. Parameter comparison between a CMOS X-ray imager and an amorphous
silicon TFT X-ray imager [1.28].
Amorphous Silicon TFT

CMOS X-Ray Imager
X-Ray Imager
Readout Noise Low High
Readout Speed High Low
Image Lag Almost Absent Serious
Fill Factor High High
DQE High Low
On-Chip Integration Yes No
The flat panel indirect X-ray imager is usually on the same scale with the object
because X-rays cannot be easily focused. Since amorphous silicon TFT arrays can
be fabricated in a large area and at a low cost, the TFT arrays were favored by the
previously used flat panel indirect X-ray imager. However, a large-scale CMOS
X-ray imager is available nowadays as well with the CMOS stitching technology.
In fact, CMOS X-ray imagers have become increasingly popular in the field of flat
panel X-ray imagers due to their inherent advantages over flat panel TFT detectors
[1.29]. Table.1-1 shows a performance comparison between CMOS X-ray imagers
and amorphous silicon TFT X-ray imagers.
Present-day CMOS X-ray imagers can provide improved image quality with a
dose reduction, and thus they have become prevalent in the field of medical
imaging. Moreover, the capability of CMOS X-ray imagers in real-time imaging
broadens their application in dynamic imaging, like dental panoramic X-rays,
surgery, etc.
However, the CMOS X-ray imager is prone to X-ray damage during the
application even though the on-chip periphery electronics can be shielded and
protected by a thick metal layer. The X-ray-induced radiation effects can
consequently degrade the image quality and lead to failure of the entire imager
over time. Therefore, a study of the radiation effects on CMOS image sensors
must first be conducted to show that a radiation-hardened CMOS image sensor can
be implemented for demanding medical applications.
1.3 Basics of Radiation Sources and Damage
As discussed in the previous section, the application of CMOS image sensors in

a radiation-harsh environment is becoming popular even though the radiation can
induce some undesirable effects on the imager performance. Thus, it is necessary
to become acquainted with the radiation environment in space and in medicine.
This section presents a brief introduction to the sources of radiation and types of
radiation damage which CMOS image sensors suffer from during their application.
When CMOS image sensors are applied in space, a variety of radiation sources
are encountered, which mainly consist of energetic particles. These energetic
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particles include neutrons, photons, electrons, protons, ions, etc., which vary in
origin, energy and flux. They can be categorized into three groups based on origin:
trapped radiation, solar flares, and cosmic rays [1.30].
1) Trapped Radiation
Although the universe is a radiation-harsh environment, the atmosphere
protects the earth from radiation damage by absorbing and reflecting a
large fraction of radiation. The charged particles are trapped in the
magnetosphere, forming a radiation belt also called the Van Allen belt. The
earth has two radiation belts: the inner radiation belt and the outer radiation
belt, which are composed of different constituents. The inner radiation belt
extends from an altitude of 1.2 to 3 earth radii (R E ) above the equator and
its center is located around 1.5 earth radii. This belt is mainly composed of
protons of energies in the 10-100 MeV range [1.30], but there are also
small populations of other particles, like electrons, heavy ions, and oxygen
ions, with energies of 1-100keV. The outer radiation belt extends from 3 to
10 earth radii above the earths surface and its center is around 4-5 earth
radii. The main constituent within this belt is an electron with energy
around 1MeV, while there are also a small number of protons, alpha
particles and heavy ions.
2) Solar Flares
Solar flares take place when accumulated magnetic energy in the solar
atmosphere is suddenly released, which is the largest type of explosion in
the solar system. When the magnetic energy is released, protons and
electrons of energy above 1MeV are emitted. Furthermore, the other
radiation sources, such as radio waves, X-rays and gamma rays, are also
emitted across almost the entire electromagnetic spectrum [1.30]. The
intense radiation from solar flares is dangerous to electronic instruments in
space, including CMOS image sensors.
3) Cosmic Rays
A cosmic ray is a type of high-energy radiation that impacts the earth.
Cosmic radiation comes from outer space and it intensifies as the altitude
increases. Galactic cosmic rays, solar cosmic rays and terrestrial cosmic
rays are the three main types of cosmic rays. Galactic cosmic rays originate
from a galaxy outside the solar system and consist of about 85% protons,
14% alpha particles and 1% heavier nuclei with a high energy up to GeV
range [1.30]. Solar cosmic rays, which come from the sun, are mainly
comprised of protons of energy up to 1MeV. Galactic and solar cosmic rays
that penetrate the atmosphere after a collision generate secondary radiation.
These bursts of secondary radiation are terrestrial cosmic rays that can
reach the earths surface. The terrestrial cosmic rays mainly consist of
protons, electrons, neutrons, pions and muons with energy ranging into
MeV [1.31].
When CMOS image sensors are applied in the medical field for radiography or
10
medical imaging purposes, X-rays are the main radiation source. The different
densities and composition of various materials of an object allow the penetration
of different proportions of X-rays. The varying amount of X-ray radiation that
passes through can then form an image on the digital detector in grayscale levels
for diagnostic use.
X-rays are a form of electromagnetic radiation that is emitted by bombarding a
metal target with accelerated electrons. X-rays have a wavelength ranging from
0.01nm to 10nm and energies in the range of 100eV to 100keV. X-rays with
energies up to 10keV are defined as soft X-rays, which can hardly penetrate the
substance. X-rays with energies from 10keV to greater than 100keV are called
hard X-rays. Hard X-rays can penetrate solids and liquids, hence their use in
medical imaging.
In fact, X-ray imaging is also used for industrial radiography in order to inspect
industrial products, following the same principle used in medical imaging.
Additionally, airport security and border control deploy digital X-ray imaging as
well to inspect the interior of objects.
Another type of electromagnetic radiation, gamma rays, the energies of which
are greater than X-rays, are another possible radiation source during the
application of CMOS image sensors in medicine and industry.
Thus, the aforementioned radiation sources which CMOS image sensors may
encounter comprise of X-rays, gamma rays, protons, electrons, heavy ions,
neutrons. In general, these can be mainly classified into photons and charged
particles. Photons are electromagnetic radiation which is electrically neutral. With
the increase in energies carried by different types of photons, the energy loss
mechanism resulting from the interactions between photons and matter varies from
the photoelectric effect and Compton scattering to pair production. As for charged
particles, the interaction with matter mainly occurs with Coulomb scattering,
which loses energy via the ionization and excitation of atoms. In addition, the
primary interaction between highly energetic particles and matter can result in
secondary electromagnetic radiation [1.32].
Figure 1-3. Classification of radiation effects on electronic instruments [1.32].
11
Chapter 1
Despite the different radiation interaction mechanisms, the radiation effects on

CMOS image sensors induced by different radiation sources can be mainly
reduced to cumulative effects and single event effects. The cumulative effects can
be further divided into total ionizing dose effects (TID) and displacement damages.
Figure 1-3 shows a diagram of the classification of radiation effects on electronic
instruments, including CMOS image sensors. Cumulative effects gradually
degrade electronic device performance and ultimately cause them to fail until the
accumulated total ionizing dose or displacement damage reaches the critical value
that the device can tolerate. However, what describes the failure induced by the
energy deposition coming from one single particle is a single event effect, which is
transient and can happen at any moment. A TID is a measure of the ionizing
energy deposition in silicon oxide and silicon in terms of the build-up of trapped
charge and defects. Details about total ionizing dose effects are further discussed
in the following chapter. The unit to measure the TID can be either rad or Gray
(Gy). The equivalent relationship between two units is given as: 1Gy = 100rad.
Since rad has been popularly adopted by the electronics community, the total
ionizing dose in this thesis is expressed in terms of rad. Even though the
displacement damage occurs during the entire process when the device is
irradiated, which is the same with TID effects, the displacement damage is
measured by its effects on the electronics. It is provided by the particle fluence and
expressed in particles/cm2.
A single particle, e.g. a heavy ion or highly energetic proton, can create
electron-hole pairs along its incidence track in the silicon, which can induce
localized radiation effects in terms of single event effects. The generated
electron-hole pairs recombine in the bulk silicon, but they can be separated and
collected to form a current spike in a depletion region. These collected charges
may induce a change-of-state at a sensitive node of a circuit, known as a single
event upset, which is a soft error that causes no permanent damage. However, the
generated charges introduced by a single particle can also result in the latch up of
the parasitic n-p-n and p-n-p bipolar transistors in the bulk CMOS, which can
cause hard errors and permanent damage [1.32].
In this thesis, X-rays are the main radiation source used for CMOS image sensor
measurements in medical applications. Therefore, the total ionizing dose effects,
known as cumulative effects, are studied. In fact, the knowledge attained from TID
effects can also be beneficial for the study of CMOS image sensors in space
because there X-rays and gamma rays are also emitted in space.
1.4 Motivation and Objectives
As discussed in the sections above, CMOS image sensors have some superior
advantages over CCDs which have consequently made them an alternative for
X-ray imaging and space-borne imaging in radiation environments, achieving a
comparable performance as CCDs. Particularly, the introduction of a 4-Transistor
12
(4T) CMOS image sensor with a pinned photodiode has largely improved the
CMOS imaging quality in terms of dark current and noise [1.33]. Nevertheless,
CMOS image sensors are vulnerable and sensitive to radiation damage. This is
because the signals that CMOS image sensors are usually required to detect can be
as low as in the pico-ampere range while the radiation damage can worsen the
detectability by raising the sensor offset level. Consequently, the study of radiation
effects on CMOS image sensors began after their application in radiation
environments.
There have been many studies carried out on the effects of radiation on both
CMOS devices [1.30][1.32] and 3-Transistor (3T) CMOS image sensors
[1.34][1.35][1.36]. However, this thesis aims to present a comprehensive study on
the radiation effects on the electro-optical performance of 4T CMOS image
sensors fabricated in a commercial 0.18m technology, since very little research
has been conducted on this topic. Only X-ray ionizing radiation is studied with
respect to the promising application of 4T CMOS imagers in medicine.
This work covers not only a macroscopic radiation study on in-pixel test devices
and pixel arrays, but also a study on the microscopic degradation mechanism. The
radiation effects are to some extent dependent on the process technology. With the
progress and scaling of CMOS technology, previous knowledge about radiation
effects that are based on old technologies cannot be directly transposed to present
CMOS image sensor (CIS) technologies. Particularly for technology scaling, a
large variety of device parameters are induced, such as gate oxide thickness and
junction capacitance, which are also sensitive to radiation. Thus, the radiation
study on the current 0.18m in-pixel test devices can help to update the list of
elementary radiation effects of this technology. Furthermore, the pinned
photodiode (PPD) and transfer-gate (TG) employed in the 4T pixel dramatically
reduce the pixel dark current and noise compared to a 3T pixel. They may also
cause the radiation-induced pixel degradation mechanism to differ from that of a
3T pixel. In addition, the macroscopic pixel parameter degradation is usually used
as a tool to evaluate the radiation effects. This thesis therefore aims to look into
microscopic pixel degradation mechanisms induced by X-rays. The ionizing
radiation-induced charge and defect build-up in CMOS image sensors is subject to
the electrical bias condition on the power supply node. What is presented in this
work is the bias-dependent effect on the radiation degradation of 4T CMOS image
sensors, since few such studies have been carried out on CIS devices before.
This thesis work is highly motivated by the aforementioned goals and challenges,
and it ultimately aims to devote a detailed study of radiation-induced degradation
effects on 4T CMOS image sensors applied in radiation environments and
furthermore to design a radiation-hardened CMOS image sensor.
Therefore, the primary objective of this work is to study the radiation-induced
degradation effects on each element of the 4T pixel and on different sensor
characteristics. The test structures used in this study rang from in-pixel MOSFETs
and pixel arrays to the entire sensor. In the meantime, both electrical performance
13
Chapter 1
and optical performance of 4T pixels are investigated. The main degradation nodes
of a 4T pixel after radiation are also identified, since the similar knowledge
obtained from the 3T pixel is no longer applicable.
After obtaining insights into the radiation-induced problems and degradation
mechanisms, the following objective is to establish radiation-hardening-by-design
(RHBD) techniques to protect the sensor from radiation damage, especially at the
pixel-weak nodes. These physical design techniques, which are determined by the
pixel design parameters in a particular technology, should be also compatible with
other CIS technologies.
Last but not least, the final objective is to apply those hardening-by-design
techniques to a radiation-hardened 4T CMOS image sensor design for verification.
Further screening by relative comparison can achieve more effective techniques.
Since the radiation-hardened 4T CMOS image sensors in this work are fabricated
in a commercial 0.18m CIS technology, the custom hardening-by-design should
strictly obey the design rules issued by the foundry. Thus, on the basis of the
design rules, the combination of different radiation-hardening-by-design
techniques aim to achieve the highest radiation tolerance to ionizing radiation for a
4T pixel.
1.5 Thesis Structure
This section outlines the thesis structure and provides an overview of each
chapter. The thesis is comprised of six chapters.
Chapter 2 presents not only a primary overview of 4T CMOS image sensors in
terms of device characteristics and physics but also the applicable fundamentals of
radiation effects on MOS devices, including 4T pixels. It first introduces the basic
architecture of CMOS image sensors and different pixel structures with a focus on
the pinned photodiode 4T pixel. Different electro-optical parameters of the 4T
pixel are discussed in the subsequent sections of the chapter. The dark current
generation mechanisms in the pixel are addressed in detail, which leads to a brief
description of the spatial distribution of dark current sources in the 4T pixel.
Finally, Chapter 2 also provides a comprehensive introduction to the total ionizing
dose effects on MOS devices and 4T pixels, covering charge and defect build-up,
radiation damage recovery, and radiation-hardened technology.
Chapter 3 discusses the measurement results regarding the radiation-induced
degradation on the electrical and optical performance of different devices that
comprise CMOS image sensors. The effect of ionizing radiation on in-pixel
MOSFETs is demonstrated in terms of an increase in leakage current. Different
designs of MOSFETs are used to illustrate the radiation-tolerance options in order
to realize a radiation-hardened design. The main pre-radiation and post-radiation
dark current sources in the 4T pixel are identified in Chapter 3. The variation of
pixel geometrical and electrical parameters has an effect on the radiation
degradation, which is also discussed in Chapter 3. In addition, Chapter 3 presents
14
the degradation of the sensor optical characteristics due to X-rays.

The dark current increase is the most common tool used to evaluate the radiation
effects from a macroscopic viewpoint. Chapter 4 proposes an interesting study on
the microscopic degradation mechanism behind the macro dark current increase
caused by radiation, in terms of the generation of micro trap. Moreover, the effect
of bias conditions on radiation-induced pixel degradation is also evaluated in
Chapter 4 through experiments.
Chapter 5 demonstrates a radiation-hardened 4T CMOS image sensor to verify
the effectiveness of the radiation-hardening-by-design techniques which are
obtained from the study of radiation degradation mechanisms in Chapter 3. The
radiation-hardened pixel shows an obvious improvement in the post-radiation dark
signal increase compared with the reference pixel. Pixel arrays with different
design techniques provide the possibility to investigate further the radiation effects
on radiation-hardened designs. In the meantime, a trade-off of the
radiation-hardened pixel is also presented in Chapter 5 in terms of degradation
decrease in the pixel spectral response.
In Chapter 6, the main thesis achievements are summarized. In addition, some
suggestions and guidelines are given for future studies on the effect of radiation on
CMOS image sensors as well as further improvements in the design of
radiation-hardened 4T CMOS image sensors.
1.6 References
[1.1] http://www.merriam-webster.com/dictionary/photography
[1.2] P. K. Weimer et. al. A self-scanned solid-state image sensor, Proc. IEEE,
vol. 55, no. 9, pp. 1591-1602, 1967.
[1.3] http://www.kodak.com/ek/US/en/Our_Company/History_of_Kodak/Imagi
ng-_the_basics.htm
[1.4] A. Einstein, ber einen die Erzeugung und Verwandlung des Lichtes
betreffenden heuristischen Gesichtspunkt, Annalen der Physik 17 (6), pp.
132-148, 1905.
[1.5] W. S. Boyle and G. E. Smith, Charge coupled semiconductor devices,
Bell System Technical Journal, vol. 49, pp. 587-593, 1970.
[1.6] http://www.sony.net/SonyInfo/CorporateInfo/History/sonyhistory-g.html
[1.7] http://www.nobelprize.org/nobel_prizes/physics/laureates/1956/shockley-b
io.html
[1.8] G. P. Weckler, Operation of p-n junction photodetectors in a photon flux
integrating mode, IEEE Journal of Solid-State Circuits, vol. 2, no. 3, pp.
65-73, 1967.
[1.9] R. Dyck and G. Weckler, Integrated arrays of silicon photodetectors for
image sensing, IEEE Trans. Electron Devices, vol. ED-15, pp. 196-201,
1968.
15
Chapter 1
[1.10] P. Noble, Self-scanned silicon image detector arrays, IEEE Trans.

Electron Devices, vol. ED-15, pp. 202-209, 1968.
[1.11] S. Mendis, S. Kemeny and E. R. Fossum, A 128128 CMOS active pixel
image sensor for highly integrated imaging systems, IEEE IEDM Tech.
Dig., pp. 583-586, 1993.
[1.12] R. H. Nixon, S.E. Kemeny, C. O. Staller and E. R. Fossum, 128128
CMOS photodiode-type active pixel sensor with on-chip timing, control
and signal chain electronics, Charge-Coupled Devices and Solid-State
Optical Sensors V, Proc. SPIE, vol. 2415, pp. 117-123, 1995.
[1.13] P. K. Lee, R. C. Gee, R. Guidash, T-H. Lee and E. R. Fossum, An active
pixel sensor fabricated using CMOS/CCD process technology, IEEE
Workshop on CCDs and Adv. Image Sensors, pp. 115-119, 1995.
[1.14] http://www.photron.com/index.php?cmd=whatsnew&id=21#21
[1.15] http://www.canon.com/news/2010/aug24e.html
[1.16] http://www.aptina.com/products/technology/aptina_a-pix.jsp
[1.17] http://www.sony.net/SonyInfo/News/Press/200806/08-069E/index.html
[1.18] http://www.sony.net/Products/SC-HP/cx_news/vol68/pdf/sideview_vol68.
pdf
[1.19] C. H. Sequin, Image recording using charge-coupled devices, NASA
SP-338, pp. 51-68, 1972.
[1.20] M. Hoheisel Review of medical imaging with emphasis on X-ray
detectors, Nucl. Instr. Meth. Phys. Res. A, vol. 563, pp. 215-224, 2006.
[1.21] http://investors.cypress.com/releasedetail.cfm?ReleaseID=429709
[1.22] E. R. Fossum, CMOS image sensors: electronic camera-on-a-chip, IEEE
Trans. Electron Devices, vol. 44, pp. 1689-1698, 1997.
[1.23] F. Larnaudie et al., Development of 750750 pixel CMOS image sensors
for tracking applications, 5th International Conference on Space Optics,
pp. 809-816, 2004.
[1.24] J. Janesick, Charge coupled CMOS and hybrid detector arrays, Proc.
SPIE, vol. 5167, pp. 1-18, 2003.
[1.25] J. Bogaerts et al., Radiometric performance enhancement of hybrid and
monolithic backside illuminated CMOS APS for space-borne imaging,
International Image Sensor Workshop, pp. 151-154, 2007.
[1.26] R. Baba, K. Ueda and M. Okabe, Using a flat-panel detector in high
resolution cone beam CT for dental imaging, Dentomaxillofacial
Radiology, vol. 33, pp. 285-290, 2004.
[1.27] R. Street, J. P. Lu and S. Ready, New materials and processes for flat
panel X-ray detectors, IEE Proc.-Circuits Devices Syst., vol. 150, pp.
250-257, 2003.
[1.28] J. Bosiers, L. Korthout and I. Peters, Medical X-ray imaging using
wafer-scale CMOS imagers, 6th Fraunhofer IMS Workshop on CMOS
Imaging, pp. 6-17, 2012.
16
[1.29] H. Jang et al., Hole based CMOS active pixel sensor for medical X-ray
imaging, 2011 IEEE Nuclear Science Symposium Conference Record,
N21-5, pp. 1060-1064, 2011.
[1.30] A. Holmes-Siedle and L. Adams, Handbook of Radiation Effects, Oxford
University Press, New York, ISBN: 0198563477, pp. 16-45, 1993.
[1.31] J. F. Ziegler, Terrestrial cosmic rays, IBM Journal on Res. Develop, vol.
40, pp. 19-39, 1996.
[1.32] C. Claeys and E. Simoen, Radiation Effects in Advanced Semiconductor
Materials and Devices, Springer-Verlag, Berlin, ISBN: 3540433937, pp.
9-36, 2002.
[1.33] R. M. Guidash et al., A 0.6m CMOS pinned photodiode color imager
technology, IEEE IEDM Tech. Dig., pp. 927-929, 1997.
[1.34] J. Bogaerts, Radiation-induced degradation effects in CMOS active pixel
sensors and design of radiation-tolerant image sensor, Ph.D. Thesis, ISBN
9056823388, 2002.
[1.35] V. Goiffon et al., Total dose evaluation of deep submicron CMOS
imaging technology through elementary device and pixel array behavior
analysis, IEEE Trans. Nucl. Sci., vol. 55, pp. 3494-3501, 2008.
[1.36] V. Goiffon et al., Ionization versus displacement damage effects in proton
irradiated CMOS sensor manufactured in deep submicron process, Nucl.
Instr. Meth. Phys. Res. A, vol. 610, pp. 225-229, 2009.
17
Chapter 1
18
Device Characteristics and Radiation Effects of 4T CMOS Image Sensors
Chapter 2
Device Characteristics and Radiation Effects of
4T CMOS Image Sensors
This chapter starts with a brief description of the advantages in terms of noise
and dark current of the pinned photodiode 4-Transistor (4T) pixel over the other
main pixel type, the 3-Transistor (3T) pixel. It also explicates the thesis motivation
behind choosing the 4T pixel as a carrier for the study on the ionizing radiation
effects. In order to analyze quantitatively the radiation-induced degradation of the
4T pixel, a comprehensive study on the 4T pixel performance parameters is
provided as a basis from which the physical origins of the problem can be
understood. Therefore, the different noise sources in the 4T pixel are briefly
discussed ranging from spatial noise to temporal noise. In addition, the spectral
characteristics of the 4T pixel together with the relevant measurements are also
addressed in this chapter. Section 2.5 lays out the device physics for dark current
generation in the 4T pixel, attributing the presence of traps at the Si-SiO 2 interface
as the main origin of the generation current (leakage current) in the 4T pixel. The
ionizing radiation degradation, as an external cause of the increase in the pixel
dark current, is carefully investigated in Section 2.6 with a discussion of the
build-up mechanism of the trapped charges and interface traps. In the final section,
a short introduction to the radiation-hardened techniques is presented in
accordance with the ionizing radiation effects.
2.1 CMOS Image Sensor Pixels
Complementary Metal Oxide Semiconductor (CMOS) image sensors (CIS) can

be mainly categorized into two groups: passive pixel sensors (PPS) and active
pixel sensors (APS). The passive pixel structure is composed of a photodiode and
one switching transistor. Since a large capacitive load is connected to each pixel
during readout, the PPS suffers from, e.g., a high RC time constant, low readout
speed and high pixel readout noise [2.1][2.2]. To compensate for the recognized
drawbacks of the PPS, a pixel structure with an active amplifier (a source follower)
within each pixel was proposed, which was called an active pixel sensor [2.3]. The
reduced capacitance in an APS lowers the readout noise while increasing the
dynamic range and the signal-to-noise ratio (SNR) as well.
Most state-of-art CMOS image sensors employ the active pixel structure. Fig.
2-1 shows the general architecture of an APS array and a schematic of a common
pixel. The principal blocks within an APS array consist of a photon-sensing region,
a column and row decoder, a sample-and-hold section and a readout amplifier.
19
Chapter 2
Once the column and row decoder are active, a pixel is addressed. The selected
pixel signal is buffered by the amplifier before being sent to the column bus. This
signal is then sampled and later held in the sample-and-hold capacitor, which is
connected to each column bus. Finally, the stored signal is removed from the chip
by an output amplifier. With the help of a sample-and-hold circuit, the correlated
double sampling (CDS) operation can be performed. CDS can effectively help to
cancel the pixel reset noise, pixel fixed-pattern noise and flicker noise [2.4].
Selected Pixel
Reset
Row Decoder
Select
Photon
Sensing
Region Amplifier
Column
Bus
Active Pixel Array
Switch Sample/Hold
&
Capacitance Vout CDS Buffer
GND Circuit
Output
Column Decoder
Figure 2-1. Architecture of CMOS active pixel sensor (APS).
The pixel structures used in the APS mainly include a photo-gate pixel
architecture and photodiode pixel architecture [2.5]. Initially, the most studied
common pixel type is the traditional 3T pixel. The basic 3T APS pixel employs a
photodiode, a reset transistor (RST), a source follower transistor (SF) and a row
selector transistor (RS). Fig. 2-2 shows a schematic of a 3T pixel.
Because each 3T pixel has a source follower acting as a buffer amplifier, the
20
pixel area that is photon-sensitive is reduced. The pixel fill factor (the percentage
of the light-sensitive area over the whole pixel region) is lowered compared to the
simple passive pixel structure. Moreover, due to the random variation of the
threshold voltage of the reset transistor and the source follower from one pixel to
the other, a spatial offset is introduced which is known as fixed-pattern noise [2.6].
The operation of the 3T pixel consists of two main stages. The first stage is to
charge the photodiode capacitor to a reset voltage through a reset transistor (RST).
The second stage is to discharge the photodiode capacitor by integrating the
photon-generated electrons during the exposure. The RST is turned off during light
integration. Therefore, a bright pixel gives a low analog signal voltage while the
dark pixel delivers a high analog signal voltage. Because the readout of all pixels
cannot be operated in parallel, a row-by-row readout technique is applied to the 3T
APS. The actual pixel readout sequence is as follows: first the photon-signal
voltage after the exposure of the previous frame is read out, and then the pixel is
reset, after that the reset voltage is read out [2.7].
Figure 2-2. 3T pixel schematic.
The signal voltage and the reset voltage are sequentially transferred to the
sample-and-hold (S/H) capacitance in a CDS circuit. The signal level is then
subtracted from the reset level during CDS operation. The main purpose of CDS is
to eliminate the aforementioned fixed-pattern noise, the kTC noise of the
photodiode capacitance, and the 1/f noise in the circuit by subtracting two
correlated signals [2.4][2.8]. However, the double sampling in the 3T APS is not
correlated. The two samples in fact come from two different frames. The sampling
process operated in the 3T APS is then called delta double sampling (DDS). Fig.
2-3 shows the timing of the readout operation and the delta double sampling for a
3T pixel. Therefore, the kTC noise cannot be eliminated and becomes the major
readout noise source, and the performance of the 3T pixel is consequently limited
by the high temporal noise.
21
Chapter 2
In 3T pixels, the photodiodes are composed of reverse-biased p-n junctions, as

shown in the cross section of Fig. 2-2. The pixel dark current in the 3T pixel
mainly originates from the thermal generation current and the diffusion current in
the depletion region of the photodiode. The dark current density also depends on
the scale of the contact area between the depletion region and the Si-SiO 2 interface.
Most of the 3T pixel photodiodes have depletion regions that are in contact with
the SiO 2 layer. Because the Si-SiO 2 interface is not perfectly passivated due to the
limitations of the technology, there are some interface states remaining. The
surface generation current can be strengthened via these interface states when the
surface depletion region is in contact with the SiO 2 [2.9]. Therefore, the dark
current performance of the 3T pixel faces a big obstacle: the large surface
generation current from the photodiode.
RS
RST
Integration Time
Output
Sample after Sample after

Integration Reset
Figure 2-3. Timing of the readout operation and delta double sampling in a 3T pixel.
In order to address the main problems of 3T pixels i.e. the rather high temporal
noise and the large photodiode dark current, the 4T pixel structure is introduced. A
detailed discussion on 4T pixels will be presented in the following.
A pinned photodiode 4T pixel is a derivation of the 3T pixel that is able to
overcome the aforementioned problems of 3T pixels. The pinned photodiode was
initially invented to improve the image lag performance of interline CCD image
sensors with an n+/p photodiode [2.10]. When later applied in CMOS image
sensors, a low dark current performance was reported, which was comparable to
that of CCDs [2.11][2.12]. Therefore, the study of the 4T pixel has become popular.
Fig. 2-4 shows a schematic of a typical 4T pixel with a cross section of the pinned
photodiode and the transfer gate transistor. The 4T consists of a reset transistor
(RST), a source follower transistor (SF), a row selector transistor (RS), a transfer
gate transistor (TG), a pinned photodiode (PPD) and a floating diffusion node
(FD).
22
Vrst Vdd
SF
RST
Transfer Gate
RS
n-well Floating
p+ p-epi Diffusion Node Vout
p-sub
Figure 2-4. 4T pixel schematic.

Fig. 2-5 shows a SENTAURUS device simulation of the PPD, the TG and the
RST [2.13]. There is a highly doped p implantation layer on top of the n/p-epi
junction in the pinned photodiode. Hence, the photon collection area in a pinned
photodiode consists of two depletion regions from the p+/n junction and n/p-epi
junction. As shown in the simulation, the photon collection area in a pinned
photodiode is dragged away from the surface because the p+/n junction forces its
depletion region to move deeper into the silicon bulk. On the other hand, due to a
geometric extension of the p+ layer over the n layer, the photodiode depletion
region is prevented from having contact with the SiO 2 . As a result, the 4T pixel
dark current with the pinned photodiode is largely reduced by inhibiting the
photodiode surface generation current. The reported 4T pixel dark current is as
low as that of CCD sensors [2.14][2.15].
Figure 2-5. Device simulation of the PPD and the TG in a 4T pixel.
23
Chapter 2
The two depletion regions in the PPD, the p+/n junction and n/p-epi junction,
eventually merge with each other and form back-to-back diodes by optimizing the
photodiode doping profile. Hence, the PPD is fully depleted and is pinned at a
certain voltage, called the pinning voltage [2.16]. The PPD reset level is then well
determined by the pinning voltage when there are no electrons remaining in the
diode. The performance of photodiode reset noise and image lag are also
accordingly improved for the pinned photodiode 4T pixel. The reset noise from the
FD capacitance in the 4T pixel can also be reduced, which is discussed later in this
section. The readout sequence of a 4T pixel firstly starts with the integration of
charges in the pinned photodiode during the exposure time. After the charge
integration, the FD node first needs to be reset so that any remaining charges can
be removed and the dark current can also be minimized. Right after resetting the
FD, the charges are transferred to the FD node by switching on the TG gate. The
CDS circuit is used to sample and hold not only the reset level of FD but also the
resulting signal level after the charge transfer. The reset sample pulse and the
signal sample pulse are operated within a very short time interval. Any reset noise
included in these two samples is from the same frame and is therefore correlated.
As a result, the reset noise from the FD node can be removed by subtracting the
sampled reset level from the signal level through the CDS operation. Fig. 2-6
illustrates the timing of the readout operation and the correlated double sampling
for a 4T pixel.
Figure 2-6. Timing of the readout operation and the correlated double sampling in a 4T
pixel.
24
The temporal noise of the 4T pixel becomes rather low compared with the 3T
pixel when the photodiode reset noise is absent due to the pinned photodiode
working principle, and the FD reset noise is eliminated by a CDS operation. The
1/f noise from the in-pixel source follower becomes the dominant noise source in a
4T pixel. Aiming at lowering the 4T pixel noise further, efforts have been
undertaken to study the implementation of an in-pixel buried-channel source
follower together with digital correlated multiple sampling (CMS). The conclusion
is that the 4T pixel is quite promising in harsh applications where a low noise
performance is crucial [2.17].
With the introduction of the 4T pixel, CMOS image sensors have reached a new
development stage, presenting low noise and low dark current, which are
improvements on the main drawbacks of 3T pixels. Moreover, the 4T pixel
quantum efficiency (QE) performance is also enhanced particularly in the
shortwave length region because the upper p+/n junction in the pinned photodiode
is very close to the Si-SiO 2 interface so that it shows a good response to blue light.
However, the 4T pixel still has some trade-offs. Compared to the 3T pixel, the
4T pixel fill-factor is further lowered due to the extra transistor and increased
number of controlling lines inside the pixel. Furthermore, the full well capacity of
a PPD is limited by its own pinning voltage, which is usually smaller than that of a
reverse-biased photodiode of equivalent size. The pinning voltage of the PPD
needs a very well-optimized doping profile which is not always that easy to obtain
with the current CMOS image sensor technology.
Nevertheless, the advantages of a 4T pixel still prevail over its drawbacks.
Hence, numerous studies have been dedicated to the application of 4T pixels in the
field of space remote sensing, medical imaging, etc. [2.18][2.19]. A detailed
radiation study on the pinned photodiode 4T pixel is discussed in Chapter 3 and
Chapter 4.
2.2 Noise Sources in Pinned Photodiode 4T Pixel
Noise dictates the minimum signal strength that a sensor can detect. Radiation is
believed to increase the image sensor noise level [2.20]. Hence, noise is an
important issue for CMOS image sensors when detecting low-level signals in a
radiation environment. Noise in pinned photodiode CMOS image sensors can be
mainly classified into two categories: spatial noise and temporal noise. The
fixed-pattern noise (FPN) due to the non-uniformity of pixels and columns is
referred as spatial noise, since it spatially varies from pixel to pixel or from
column to column [2.6]. However, the noise in an individual pixel, such as reset or
kTC noise, 1/f noise, thermal noise, or dark current shot noise, are temporal noise,
which varies with time. There will be a brief introduction to the different noise
characteristics of pinned photodiode CMOS image sensors in the following
sections.
25
Chapter 2
2.2.1 Fixed-Pattern Noise
Depending on the illumination condition, fixed-pattern noise consists of dark

fixed-pattern noise and/or light fixed-pattern noise. Dark fixed-pattern noise
originates from the non-uniformities on the dark current generation in each pixel,
and the minor differences among in-pixel transistors. Hence, fixed-pattern noise
creates a spatial noise pattern on the sensor. The in-pixel transistor parameter, such
as the threshold voltage, may vary from one pixel to another due to the fabrication
uniformity limitation [2.6]. In APS pixels, the in-pixel transistors usually refer to
the source follower and the reset transistor. Because of the in-pixel transistor
parameter mismatch, the pixel array has a pixel-level FPN. In 4T pixels, correlated
double sampling (CDS) can make the pixel-level dark FPN negligible by sampling
and subtracting two correlated pixel outputs, since the same pixel offset within two
samples can be canceled through subtraction. Fixed-pattern noise under
illumination is called light fixed-pattern noise, also known as photo-response
non-uniformity (PRNU). Light FPN is proportional to the amount of illumination,
and it mainly arises from the non-uniformities on the pixel photo-response.
Nevertheless, light FPN is also influenced by the same problems as dark FPN,
such as transistor parameter variations and pixel offset differences [2.21].
2.2.2 Temporal Noise
Compared to fixed-pattern noise, some types of temporal noise in the 4T pixel

are more difficult to eliminate because of their inherent physical limitations. In this
section, different temporal noise sources are discussed and the possible
corresponding countermeasures for noise reduction are proposed.
(a) Reset or kTC Noise
Reset noise in CMOS image sensors, also known as kTC noise in analog
circuits, is the uncertainty of the voltage on a capacitor right after that
capacitor has been charged by turning off the reset transistor [2.22]. In the
4T pixel, depending on the gate-to-drain voltage (V GD ) of the reset
transistor, the reset operation can be a hard reset or soft reset [2.7]. When
V GD is set lower than the threshold voltage of the reset transistor, a soft
reset is implemented. During a soft reset, charges move in a unidirectional
way between the FD node and the reset voltage node. Therefore, the reset
noise expressed in an rms value for a soft reset can be given as [2.21]:
kT
Vressoft , (2-1)
2CD
where Vres soft is the soft reset noise in voltage, k is Boltzmanns constant, T
is absolute temperature, and C D is the diode capacitor. If the V GD is higher
than the reset transistor threshold voltage, the FD node is hard reset.
Charges move bidirectionally between the FD node and the reset voltage
26
node. Hence, the reset noise for a hard reset is increased by a factor of 2,
which is given as [2.21]:
kT
Vreshard . (2-2)
CD
where Vres hard is the hard reset noise in voltage. However, the reset noise
reduction with a soft reset comes at the expense of image lag [2.23].
Moreover, according to Eq. (2-1) and Eq. (2-2), the reset noise can also be
easily reduced by increasing the capacitor, C D . However, this benefit also
downgrades the conversion factor of the photon-sensing node. The
conversion factor defines the efficiency of converting an electron to an
electronic signal (voltage, current, digital number in case an ADC is used),
and it is inversely proportional to the diode capacitance, the details of
which will be addressed later in Section 2.3. Therefore, as mentioned
above, correlated double sampling (CDS) in the 4T pixel is believed to be
an efficient solution to eliminate the reset noise.
(b) Photon Shot Noise and Dark Current Shot Noise
The partition and absorption of an incident photon flux in the photodiode is
a stochastic process so that the number of photons falling on a pixel and
the resulting number of thermally generated electrons are random variables,
following a Poisson distribution. Photon shot noise is the noise that
describes this statistical variation of the number of incident photons and
photon-generated electrons. The value of photon shot noise equals the
square root of photon-generated electrons, complying with the Poisson
distribution, which is given as [2.21]:
p Np , (2-3)
where p is the photon shot noise and N p represents the photon-generated

electrons.
The existence of photon shot noise in CMOS image sensors is unavoidable
since it is due to the theoretical limit and the fundamental laws of physics
[2.24]. Hence, the reduction of the photon shot noise cannot rely on the
improvement of the pixel design and technology.
Contrary to the photon-induced electron-hole pair generation, even without
light there are still a certain number of charges generated by thermal
excitation flowing inside the image sensor, forming the so-called dark
current [2.25]. Physically, the generation of electrons and holes in the
depletion region of the sensor in the dark is a random process, which
consequently induces a statistical variation of dark current. Thus, the noise
originating from dark current, which is known as dark current shot noise,
can also be modeled by the Poisson distribution, as is the case with photon
shot noise. The value of the dark current shot noise is given as [2.21]:
27
Chapter 2
d Nd , (2-4)
where d is the dark current shot noise and N d is the dark current expressed
in electrons. Dark current shows an exponential relationship with
temperature [2.25], which is given below:
E
I D D0 exp( a ) , (2-5)
kT
where I D is the dark current in electron/sec, D 0 is the pre-exponential
frequency factor, Ea is the activation energy, k is Boltzmanns constant,
and T is the absolute temperature. As shown in Eq. (2-5), lowering the
temperature can greatly reduce the dark current, which as a result can
minimize the dark current shot noise. In addition, the dark current shot
noise can also be improved by suppressing the dark current itself with
advances in pixel technology and layout design optimization [2.14].
(c) 1/f Noise
Another important noise source in 4T CMOS image sensors is 1/f noise,
which is a kind of low frequency noise mainly coming from the in-pixel
source follower. The 1/f noise voltage power can be expressed as:
K
V1/ f , (2-6)
COX WLf
where V 1/f is the 1/f noise in voltage, K is a process-dependent constant,

C OX is the gate oxide capacitance, f is the frequency, and W and L are the
MOSFET channel width and length, respectively [2.26]. As shown in Eq.
(2-6), 1/f noise is inversely proportional to the frequency. Thus, at low
frequencies, it can become considerable. Since 1/f noise in the 4T pixel is
mainly contributed by the source follower transistor [2.27], the
introduction of a buried-channel source follower to the 4T pixel together
with CDS achieves a good 1/f noise performance at the sensor level [2.28].
(d) Thermal Noise
Thermal noise, also called Johnson noise, mainly originates from the
resistors and the channel of MOSFETs. As for a pixel, the in-pixel source
follower is the main source of thermal noise [2.21]. The value of thermal
noise can be given as [2.21]:
i 4kTg m BW . (2-7)
where i is the thermal noise in ampere, k is Boltzmanns constant, T is the

absolute temperature, g m is the transistor transconductance, and analog BW
is the bandwidth. As presented in Eq. (2-7), a small bandwidth is favorable
to lower the thermal noise. Furthermore, lowering the temperature can also
be used to reduce the thermal noise. Therefore, the aforementioned two
methods can be taken as countermeasures to minimize the pixel thermal
noise.
28
The readout noise floor in 4T CMOS image sensors is usually limited by

temporal noise because it is difficult to eliminate compared to spatial noise. Some
temporal noise sources have a theoretical and physical limit, while some temporal
noises greatly depend on the technology and pixel design. Therefore, it is quite
necessary to specify the origin of each temporal noise in order to determine the
countermeasures to reduce it.
2.3 Spectral Response of 4T Pixels
The basic function of a pixel is to respond to light. Therefore, it is essential to

understand how light interacts with the pixel and generates a signal that can be
detected. In this section, the basics of the 4T pixel spectral response are discussed.
Light has a wave-particle duality, and the particle carried by light is the photon
[2.29]. Conversely, a large amount of photons comprise a ray of light. The
interaction between light and silicon physically takes place via the energy transfer
between incident photons and silicon lattice. The energy of the photon is
theoretically related to the wavelength of light, and the relationship is given as:
E ph = hc/ , (2-8)
where E ph is the energy of the photon, c is the light speed in vacuum, is the
wavelength, and h is Planks constant. Eq. (2-8) can be expressed in electron-volts
(1eV=1.6e-19J). The energy exchange between the photon and the silicon lattice
only occurs when the energy that the photon carries is at least equal to the smallest
quantum energy of the silicon lattice, which is also known as the silicon band gap.
The energy band gap of silicon is 1.12eV [2.30]. Furthermore, the light absorption
coefficient and the penetration depth in the silicon also vary with different
wavelengths.
Fig. 2-7 illustrates the process of electron-hole generation and collection in
terms of spectral response. Fig. 2-7 also shows a cross section of a pinned
photodiode, consisting of two p-n junctions, p+/n and n/p-epi, which can collect
and store electrons. When photons with an energy above 1.12eV enter the silicon
and collide with the atoms, their energy is transferred and is used to excite
electrons from the valence band to the conduction band while leaving
positively-charged holes in the valance band [2.30]. These generated electrons and
holes can usually be detected and collected via a p-n junction in the photodiode.
When n-type and p-type silicon meet they form a junction at the boundary. Then,
the majority free carriers in n-type silicon, electrons, diffuse to the p-type silicon
due to a concentration gradient, and vice versa, the majority carriers in p-type
silicon, holes, migrate to the n-type silicon as well. The departure of electrons
from the n-type silicon leaves positive ionized donor impurities in the n-side,
while the removal of holes leaves negative ionized acceptor impurities in the
p-side. As a result, a space charge region, also known as a depletion region, is
formed where the mobile charge carriers are all diffused away and only the ionized
donor and acceptor impurities are left. In the meantime, an electric field is built in
29
Chapter 2
the depletion region due to the positive and negative ionized impurities [2.31]. It is
due to this built-in electric field that electrons generated by incoming photons in
the depletion region can then drift to the n-side while holes can drift to the p-side.
This flow of free charges forms a reverse current which can be detected by the
electronic circuit as a response to light.
Figure 2-7. Cross section of a pinned photodiode and the corresponding band gap
structure for the spectral response.
In contrast to the generation process, the photon-generated electrons can also be
annihilated by mobile holes via a recombination process [2.31]. This process can
happen in both n-type silicon and p-type silicon. However, the recombination does
not occur inside the depletion region because there free charge carriers are not able
to exist, as mentioned above. Therefore, the efficiency of electron generation in
the depletion region is very high since almost all of the photon conversion is
useful and is not adversely affected by the recombination. Furthermore, for those
carriers generated outside the depletion region, the photon-induced electron
generation efficiency is inversely proportional to the distance between the
generation location and the depletion region. It is because the further the electron
30
generation is located away from the depletion region, the higher the chance is of
recombination. Hence, the efficient absorption of light inside silicon is not only
wavelength-dependent but also p-n junction-location-dependent.
In order to achieve a good spectral response to the visible light, the junction
position and the depletion region width of the photodiode in the CMOS imager
should be nicely optimized. A 4T pixel employs a pinned photodiode for photon
sensing, which is a p+/n/p-epi photodiode as shown in Fig. 2-6. There is a thin
highly-doped p layer on top of the n-well which forms a very shallow junction.
This p+/n junction depth is about 0.18m below the Si-SiO 2 for the CIS
technology used in this work, therefore the 4T pixel shows a very good blue light
response [2.13]. Additionally, the depletion region width can be modified to
strengthen the light absorption by changing the doping concentration of n-type and
p-type silicon. The expression for the depletion region width of a p-n junction can
be given as [2.31]:
2 r 0 N A N D
W Vbi V , (2-9)
q N AND
where W is the width of the depletion region, r is the relative dielectric
permittivity of the semiconductor, 0 is the dielectric permittivity, N A is the
number of ionized acceptors, N D is the number of ionized donors, V bi is the
built-in voltage, and V is the applied bias, q is the electron charge.
The depletion region leans toward the lightly doped side of a p-n junction.
Therefore, by optimizing the doping concentration of p+, n-well, and p-epi, the
n-well region in the pinned photodiode can become fully depleted when the
depletion regions of p+/n and n/p-epi merge, as illustrated in Fig. 2-5. The fully
depleted n-well region plays an important role for the pinned photodiode in the
electron-hole pair generation and storing charge carriers. The fully depleted region
of the PPD can respond to a wide range of wavelengths from 400nm to 700nm.
The p-epi region is about 2m to 4m below the Si-SiO 2 interface, and it forms a
deep p-n junction with the n-well region. The long wavelength between 550nm to
900nm can be effectively absorbed in the p-epi layer. Since the p-sub layer is
highly doped, the collection efficiency of photon-generated electrons is
significantly reduced. As for the light with a deep penetration depth, e.g. red light,
the lightly-doped p-epi layer on top of p-sub can then help to effectively collect
electrons.
The aforementioned section has discussed the pixel spectral response with a
focus on the photon interaction with silicon. Nevertheless, the additional
deposition layers of metal and inter-dielectric layers on top of the silicon are also
likely to affect the spectral response of CMOS image sensors from an optical
perspective. Fig. 2-8 illustrates the typical material structure of a 4T pixel with the
entire chip finally covered by a passiviation layer (Silicon Nitride layer). These
materials have different optical coefficients for reflection, transmission and
refraction [2.32]. When light falls on the image sensor and reaches these material
31
Chapter 2
boundaries, it has to undergo changes in amplitude and direction due to multiple

reflections and the interference effects. The ultimate optical power that reaches the
silicon is limited due to a big loss, and accordingly the pixel spectral response is
also influenced by the stack of materials.
As shown in Fig. 2-8, part of the light will be reflected back when it reaches
each boundary, and the remaining part is transmitted into the following layer
through refraction. The light which is reflected back will be partly reflected into
the silicon again at the previous boundary, while part of it is also refracted outside
of the silicon there [2.32]. The light entering into the silicon after two reflections
will interfere with the original ray of light. This interference can result in a ripple
in the spectral response curve.
Figure 2-8. 4T pixel structure with a stack of materials and their influence on the light
transmission.
The spectral response can be quantified by measuring the output of the sensor at
various wavelengths. The set-up used in this project for the measurement of the
spectral response or quantum efficiency consists of a monochromator, optics, a
beam splitter, a calibrated photon-detector, a sensor board and LabVIEW tools.
The monochromator is used to choose a narrow-band wavelength from a wide
range of wavelengths. The resulting wavelength selected by a monochromator is
usually a central wavelength with a certain bandwidth instead of an individual
32
wavelength. During the measurements, if the wavelength bandwidth needs to be

small in order to have a precise value, then the light power falling on the pixel
becomes low and the entire measurement precision is downgraded. As a result, the
measurement result shows some noise on the spectral response curve with
wavelengths. If these ripples need to be removed, the bandwidth of the central
wavelength should be enlarged to have more optical power [2.33]. A beam splitter
is used to split the beam into two rays. One goes to a calibrated photon-detector,
while the other goes to the sensor. This accurately determines how many photons
fall on the sensor via a pre-calibrated photon-detector. The number of input
photons can be calculated back from the current measured by the photon-detector.
The sensor output induced by the light incidence can be measured by a sensor
board in current or volts, which can also be expressed in the number of electrons.
Consequently, the quantum efficiency (QE), as another term of spectral response,
can be calculated and expressed as a ratio of the number of electrons produced
over the number of incident photons on the pixel, which is given below as:
Number of Electrons Generated
QE . (2-10)
Number of Input Photons
As previously discussed in this section, the volume of the depletion region has
an effect on the pixel spectral response or quantum efficiency in terms of the
amount of collectable electrons. Analogously, the fill factor, which describes the
ratio of the photon-sensing region over the overall pixel area, is another main
impact factor for the quantum efficiency, since it also determines the number of
collectable electrons.
2.4 Other Performance Parameters of the 4T Pixel
(a) Full Well Capacity and Dynamic Range

The full well (FW) capacity defines the largest amount of charges that can
be stored in the photon-sensing area. The FW can be expressed in the
number of electrons and is given by:
Qmax
FW , (2-11)
q
where FW is the full well in the number of electrons, Q max is the maximum
amount of charges that the photo-sensing area can hold, and q is the
electron charge. As for the 4T pixel, this storage capacitor usually refers to
the PPD and the FD node. The dynamic range (DR) is closely related to the
FW since it is defined as the ratio of the saturating input signal to the
smallest detectable signal. The saturating signal, S max , is the full well
capacity, while the smallest detectable signal, S min , is the sensor noise in
the dark. Thus, the dynamic range, DR, can be given in dB units as:
33
Chapter 2
S
DR 20 log10 max . (2-12)
Smin
In order to increase the dynamic range, either the full well capacity needs
to be increased or the sensor noise in the dark should be decreased.
Techniques such as the dual transfer gate pixel and multiple captures are
reported to be used to effectively increase the DR [2.34].
(b) Conversion Gain
The conversion gain (CG) is the relationship between the electrons in the
pixel and the parameters measured at the pixel output [2.21]. The pixel
output in most cases is an analog voltage obtained at the source follower
output node. Therefore, in other words, the conversion gain also defines the
efficiency of the pixel to convert collected electrons in the voltage domain.
In the 4T pixel, the conversion gain is mainly dependent on the floating
diffusion node. The conversion gain can be given as:
q
Conversion Gain ASF V / e , (2-13)
CFD
where C FD is the capacitance of the FD node in 4T pixels, q is the electron

charge, and A SF is the amplification of the source follower in voltage. Eq.
(2-13) shows that a smaller FD capacitance means a larger conversion gain.
The photon-transfer-curve (PTC) can be used as a tool to measure the pixel
conversion gain.
2.5 Dark Current in 4T Pixels
Dark current is a significant parameter for CMOS image sensors, since some of
the other sensor parameters, e.g. noise, stem from the dark current. For an ideal
image sensor in the dark, no output signal can be detected because there is no free
charge carrier generation. However, in reality there is still a small amount of current
flowing through the pixel even without light, which is known as dark current or
leakage current.
Fig. 2-9 shows a cross section of the pinned photodiode, the transfer gate and the
floating diffusion node of the 4T pixel. Additionally, Fig. 2-9 shows the leakage
current composition inside the pixel region. Generally speaking, the 4T pixel
consists of surface regions, depletion regions, and bulk neutral regions from the
viewpoint of the device structure. If there is a silicon lattice imperfection in any of
the above three regions, electrons and holes can be generated as mobile charge
carriers and later form the leakage current. Moreover, the minority carriers,
transported by diffusion through a neutral or bulk region, can also be collected by a
p-n junction so that it contributes to the pixel dark current. Therefore, the dark
current in the 4T pixel is mainly composed of three elements: a surface leakage
current, bulk current, and depletion region leakage current. Furthermore, the pixel
34
design, technology, electric field and potential distribution within the pixel, along
with the temperature, also have an effect on the dark current of the 4T pixel. In this
section, a detailed generation mechanism of the pixel dark current is presented. The
main dark current contributors in the 4T pixel are also discussed, which can help to
uncover some solutions to improve the pixel dark current performance.
Figure 2-9. Cross section of a pinned photodiode and transfer gate together with a
demonstration of the dark current generation mechanism.
2.5.1 Device Physics for Dark Current Generation
This section illustrates different physics mechanisms for the thermal generation
current originating from the depletion regions and diffusion current. The
temperature dependence of each dark current component is discussed and
demonstrated via mathematical equations.
Generation Current in the Depletion Region
Current generation through a band-to-band free carrier generation process is

difficult for silicon when there is no extra excitation energy provided, e.g. light,
because silicon has an energy band gap of 1.12eV. If there is no extra supplying
energy present, an electron needs the help of a medium in order to jump from the
valence band to the conduction band. This medium can be a defect level inside the
band gap [2.30]. Due to the imperfection of the fabrication technology, there are
different defects present in the silicon crystal, such as lattice defects (e.g.
dislocations), point defects (vacancy defect, interstitial defect, Frenkel defect) and
35
Chapter 2
cluster defects. These defects behave as additional trap energy levels, E t , located
within the silicon band gap [2.30].
Electron
Hole EC
Recombined Generation Recombination
Hole Ei
Trap Level Et
EV
Figure 2-10. Carrier generation and recombination process via a trap level in the band gap.
Fig. 2-10 shows the generation and recombination process of electrons and holes
via the additional trap energy levels in the band gap. The electron excitation to the
conduction band can take place through an indirect transition with the help of the
existing trap level [2.35]. An electron can first jump to the E t level with less than
1.12eV of energy, while a hole is generated in the valence band. In the next step,
the E t level can emit an electron to the conduction band which can be regarded as
electron generation. Through these additional trap levels, free electrons and holes
are generated which can then be collected as dark current for the pixel. Contrary to
electron generation, the E t level can also capture an electron from the conduction
band, which is known as electron recombination. Later on, electrons at the E t level
can drop further to the valence band and recombine with holes there, which is
called hole recombination. As the other option for the recombination process, a
hole can also be attracted to the E t level from the valence band and recombine
with the electrons which have been already captured there. This type of E t level
can be an acceptor level or a donor level. An acceptor level is neutral if empty and
negative if filled by an electron. A donor level is positive if empty and neutral if
filled by an electron [2.30]. This kind of indirect generation and recombination via
defect levels in the energy band gap is called the Shockley-Read-Hall model (SRH
model), which is also known as thermal generation. The thermal generation
current caused by defect states in the depletion region therefore complies with the
SRH model [2.30].
In the case of bulk defects in the depletion region, the additional trap energy
level E t introduced by the bulk defect can serve as a recombination and generation
center. The net transition rate U(E t ) between recombination and generation can be
described by the Shockley-Read-Hall statistics as [2.30]:
n p vth N t (ni2 np)
U Et , (2-14)
E Ei E Et
n n ni exp t p p ni exp i
kT kT
where n and p are the electron and hole capture cross sections, respectively, th
36
is the thermal velocity, E i is the intrinsic Fermi level, N t is the defect density per
volume, p and n are the electron and hole concentrations, n i is the intrinsic carrier
concentration, E t is the trap energy level, k is Boltzmanns constant and T is the
absolute temperature. The following derivation from Eq. (2-14) can also
mathematically illustrate the process of recombination and generation as well as
the impact factors on the generation current, e.g. temperature, trap energy level.
For a p-n junction in thermal equilibrium, the diffusion current due to the carrier
concentration difference is balanced by the drift current caused by the built-in
electric field. The net current becomes zero and the electron and hole
concentration in the depletion region follows the equation below as an equilibrium
condition:
np ni2 . (2-15)
If the thermal equilibrium condition is disturbed, then the recombination and

generation processes try to restore the equilibrium condition of the system. The
recombination process occurs when np > n i 2, and becomes thermal generation
when np < n i 2.
When the p-n junction is under reverse bias, the mobile carriers are drift away
from the depletion region edge and the thermal equilibrium is broken so that the
mobile carrier concentration is significantly lower than the equilibrium value,
which is expressed as np << n i 2 [2.31]. Consequently, the carrier generation
dominates over the recombination process in order to approach the equilibrium
again. The thermal generation rate of an electron-hole pair in the depletion region
can be derived from Eq. (2-14) with the condition of np << n i 2 as:
n p vth N t ni
U Et . (2-16)
E Ei Ei Et
n exp t p exp
kT kT
Eq. (2-16) shows that the generation rate exponentially depends on the trap
energy level, E t , and it is at its largest for the middle band gap defect when E t = E i .
Therefore, the thermal generation current is mostly attributed to the defect traps
located near the middle of the band gap. Eq. (2-16) can be further simplified for
those middle-gap defects, which can be given as:
n p
U v N n when Et Ei . (2-17)
n p th t i
The thermal generation process consists of two steps: electron emission into the
conduction band from the trap energy level, and hole generation or emission in the
valence band. Hence, both the electron lifetime and the hole lifetime determine the
generation lifetime. The hole lifetime is governed by p , which is given as [2.30]:
1
p . (2-18)
p vth N t
37
Chapter 2
The electron lifetime, n , is shown as [2.30]:

1
n . (2-19)
n vth N t
As a sum of the lifetime of electrons and holes, the generation lifetime, g , can
be given as:
1 1 p 1
g n p n . (2-20)
n vth N t p vth Nt n p vth N t
The generation rate equation can be rewritten in the form of the generation
lifetime when considering the contribution from the defects around the middle of
the band gap:
ni
U . (2-21)
g
The current density due to the trap-induced thermal generation in the depletion
region is accordingly given as [2.31]:
W qnW
J generation qU Et dx qUW i
, (2-22)
0 g
where J generation is the generation current density, q is the electron charge, U is the
generation rate, n i is the intrinsic carrier concentration, g is the generation lifetime,
and W is the depletion region width. According to Eq. (2-22), the thermal
generation current from the depletion region in the dark is highly determined by
the intrinsic carrier concentration, n i , and the depletion region width, W. The
intrinsic carrier concentration, n i , follows a certain temperature-dependence,
which is given as [2.30]:
E E
ni N C NV exp g N C NV exp g , (2-23)
kT 2kT
where N C and N V are the effective carrier density in the conduction band and
valence band, respectively, k is Boltzmanns constant, T is the absolute
temperature, and E g is the energy band gap. Moreover, N C and N V are also
dependent on temperature and the density-of-state effective mass of the conduction
band and the valence band [2.30]. Their relationships are shown as [2.30]:
3/ 2
2 mde kT
NC 2 (2-24)
h2
3/ 2
2 mdh kT
NV 2 , (2-25)
h2
where m de and m dh are the effective mass for electrons and holes, h is Plancks
constant. By integrating Eq. (2-24) and Eq. (2-25) with Eq. (2-23), the thermal
38
generation current shows a clear temperature dependency and is exponentially

proportional to the value of half the band-gap energy (-E g /2).
At a given temperature, the generation current, J generation , is proportional to the
depletion region width, which in turn is dependent on the applied bias voltage and
junction doping profile. Therefore, narrowing the depletion region may help to
reduce the pixel dark current, although it has a trade-off for the spectral response
performance according to Section 2.3. Nevertheless, reducing the defect number in
the silicon seems a more effective countermeasure to lower the thermal generation
current in the depletion region, since the thermal generation process relies on the
defect level in the band gap. In theory, the thermal generation current is then
minimized in the defect-free silicon.
What has been discussed above in accordance with Eq. (2-22) is that the
narrower the depletion region is, the lower the thermal generation current is.
However, when the depletion region becomes too narrow, carrier tunneling
prevails. As long as a highly doped p-n junction is under a large reverse bias or the
electric field distributed over the depletion region approaches 106V/cm in silicon,
the potential barrier is sufficiently thin. Fig. 2-11 shows the energy band diagram
with a thin and low potential barrier for the tunneling process. The most likely
tunneling path is through the smallest barrier. Thus, the carrier-tunneling usually
happens through two triangular-shape barriers with a height limited by the energy
band gap, as shown in Fig. 2-11 [2.31]. Those carriers with energies higher than
this sufficiently thin barrier can directly escape from the valence band to the
conduction band. This kind of direct tunneling process is also called band-to-band
tunneling. By means of intermediate traps, electrons can more easily tunnel across
the band gap to contribute to the thermal generation current, which is called
trap-assisted tunneling.
Figure 2-11. Energy band diagram showing the tunneling process and the triangular
barrier.
39
Chapter 2
The probability of the electron tunneling through a barrier with a finite width
and height can be calculated using the Wentzel-Kramers-Brillouin (WKB)
approximation [2.30], which can be given as:
Tt exp 2 k x dx ,
x
(2-26)
0
where T t is the probability of the electron tunneling, x is the width of the potential
barrier, and k here is the wave vector. k can also be written as a function of the
barrier width:
2m*
k x q x , (2-27)
2
where m* is the effective mass, is the electric field across the junction, and is
the reduced Plancks constant. Substituting Eq. (2-27) with Eq. (2-26), the
tunneling probability can be approximated as:
4 2m* E 3/ 2
Tt exp .
g
(2-28)
3q

where T t is the tunneling probability, E g is the band gap energy, and q is the
electron charge.
By integrating the tunneling probability over the depletion region, the
band-to-band tunneling current density can be given as:
2m* q 3 4 2m* E 3/ 2
J tunneling qTt dx 2 2 1/ 2 V exp ,
g
(2-29)
4 Eg 3q
W

where J tunneling is the tunneling current density, W is the width of the tunneling
barrier, and V is the applied voltage across the depletion region. According to Eq.
(2-29), lowering the applied voltage or reducing the electric field applied across
the depletion region can effectively reduce the tunneling current. Eq. (2-29) also
shows that the tunneling current has little dependence on the temperature.
Furthermore, if taking trap-assisted tunneling into consideration, the potential
ionizing radiation-induced interface traps located in the high electric field region
during the radiation application can contribute to the total dark current of a pixel in
terms of tunneling.
Surface Leakage Current
Besides the thermal generation current from the depletion region, the surface
leakage current is the other main contributor to the total pixel dark current. In this
section, the generation mechanism for the surface leakage current is discussed.
Surface leakage current occurs when the depletion region of the pinned
photodiode and/or n+/p junction expands and touches the Si-SiO 2 interface where
the interface traps are present, as demonstrated in the device structure in Fig. 2-9.
Hence, the generation mechanism of surface leakage current is similar or identical
40
to the thermal generation in the bulk depletion region [2.30]. However, the number
of interface traps is much greater than that of bulk traps. Each silicon atom has
four valence bonds and requires four bonds to saturate the valence shell. Therefore,
in the crystalline structure each silicon atom is connected to four neighboring
atoms. At the Si-SiO 2 interface, this periodicity of the crystalline structure is
interrupted. Some atoms are missing and thus the unpaired valence electrons, or
dangling bonds, form interface traps. Even though hydrogen passivation can
reduce the number of interface traps, some interface traps can still remain there
due to the technological imperfection [2.30]. Since the area of the Si-SiO 2
interface is very large, the density of the interface trap consequently becomes
substantial. Therefore, surface leakage current is a significant parameter for pixel
dark current.
Similar to Eq. (2-16), which expresses the generation rate for the bulk trap
energy level, the surface generation rate can be given as:
n p vth ni Dit Eit
U Eit , (2-30)
E Ei Ei Eit
n exp it p exp
kT kT
where U(E it ) is the surface generation rate, D it is the interface trap density, E it is
the interface trap energy level, n and p are the electron and hole capture cross
sections, respectively, th is the thermal velocity, E i is the intrinsic Fermi level, n i
is the intrinsic carrier concentration, k is Boltzmanns constant and T is the
absolute temperature. The generation current density induced by all the interface
traps located within E C and E V can thus be given as:
EC qn
J surface qU Eit d Eit i ( n p )1/2 vth Dit kT . (2-31)
EV 2
where J surface is the surface generation current density, E C is the conduction band,
E V is the valence band, and q is the electron charge.
Resembling the thermal generation induced by bulk traps, the surface leakage
current is also mainly attributed to the interface trap levels around the middle of
the band gap. Moreover, the effective surface generation velocity can be given as:
1 ( n p )1/2 vth Dit kT
se , (2-32)
s 2
where s e is the effective surface generation velocity, and s is the surface carrier
lifetime. Then, Eq. (2-31) above can be simplified in the form of the effective
surface generation velocity as:
qni
J surface qse ni . (2-33)
s
As already discussed above, according to Eq. (2-23), Eq. (2-24) and Eq. (2-25)
the intrinsic carrier concentration shows the following temperature dependence:
41
Chapter 2
E
ni T 3/ 2 exp g . (2-34)
2kT
where E g is the band gap energy.
Numerically, the surface leakage current and the thermal generation current due
to bulk traps share the same temperature dependency relationship, which is
presented as:
E
J surface or J generation T 3/ 2 exp g . (2-35)
2kT
where J generation is the thermal generation current density due to bulk traps, J surface
is the surface generation current density, T is the absolute temperature, k is
Boltzmanns constant, and E g is the band gap energy.
Therefore, it becomes difficult to distinguish the surface leakage current and the
bulk trap-induced thermal generation current. Their generation mechanism and
temperature-dependence are identical, even though their physical locations are
different.
Radiation damage can induce numerous interface traps at the Si-SiO 2 interfaces,
which can accordingly increase the total dark current of a radiated pixel in terms
of the surface leakage current. Further details about the radiation-induced surface
leakage current will be discussed below.
Bulk Diffusion Current
Compared to the surface leakage current and thermal generation current, the
diffusion current in the bulk or neutral region originates from a different
mechanism. Whenever there is a gradient in carrier concentration, a diffusion
process takes place during which carriers migrate from the region of high
concentration towards the region of low concentration. By means of diffusion, the
carrier concentration becomes uniform in space and the system is driven to
equilibrium. In the bulk or neutral region, the diffusion current is the minority
carrier current which can diffuse to the border of the depletion region [2.30].
Consequently, the diffusion current is collected by the p-n junction thus
contributing to the total dark current.
Fig. 2-12 shows the electron and hole concentration of a p-n junction together
with its energy band diagram. At the boundary of a p-n junction, as shown in Fig.
2-12, the minority carrier concentration under reverse bias is lower than that in the
neutral region. Hence, there is diffusion current flow due to both the hole
concentration gradient in the n-type region and the electron concentration gradient
in the p-type region. Moreover, as soon as a voltage is applied, the minority carrier
concentration in both the p-type side and n-type side is changed. The p-n product
no longer equals n i 2, and it is given as [2.31]:
42
E EFp
pn ni2 exp Fn , (2-36)
kT
where E Fn and E Fp are the quasi-Fermi levels for electrons and holes,
respectively. The difference between E Fn and E Fp is related to the carrier
concentrations. The carrier diffusion then tries to restore the system to the
concentration equilibrium [2.30][2.31].
Figure 2-12. Energy band diagram with the electron and hole concentration in a p-n
junction.
The derivative of the minority carrier distribution in the neutral region
determines the diffusion current from the p-type side or the n-type side, which can
be deduced from the continuity equation [2.30]. If n-type silicon is taken as an
example, in the neutral or bulk region where there is no electric field, the
continuity equation for minority carrier diffusion can be expressed as:
d 2 pn pn pn 0
0 , (2-37)
dx 2 D p p
where p n0 is the equilibrium hole concentration in the n-type silicon, p n is the hole
concentration in the n-type silicon, D p is the hole diffusion coefficient, and p is
the hole lifetime. D p has a relationship with the hole mobility, p , which is also
known as the Einstein relation [2.30]:
43
Chapter 2
D (kT / q) . (2-38)
where D is the carrier diffusion coefficient, is the carrier mobility, q is the

electron charge, k is Boltzmanns constant and T is the absolute temperature.
The product of D and (carrier lifetime) can determine another parameter, the
diffusion length, which is given as [2.30]:
L p D p p , Ln Dn n . (2-39)
where L p is the diffusion length of hole, D p is the diffusion coefficient of hole, p

is the lifetime of hole, L n is the diffusion length of electron, D n is the diffusion
coefficient of electron, and n is the lifetime of electron.
The diffusion length describes the distance that carriers can diffuse in a carrier
lifetime before they are annihilated [2.30]. Then, the diffusion current density can
be deduced from the continuity equation, and for the holes in n-type bulk silicon a
simplified result can be presented as:
qD p pn 0
Jp . (2-40)
Lp
where J p is the diffusion current density of the holes in the n-type silicon.
The same calculation can also be applied to the electrons in p-type silicon, and
the electron diffusion current density can be expressed as:
qDn n p 0
Jn . (2-41)
Ln
where J n is the diffusion current density of the electrons in the p-type silicon, and
n p0 is the equilibrium electron concentration in the p-type silicon.
If Eq. (2-40) and Eq. (2-41) are summed up, the total diffusion current from the
bulk silicon is given as:
qD p pn 0 qDn n p 0 qD p ni2
qDn ni2
J diffusion J p J n . (2-42)
Lp Ln L p N D Ln N A
where J diffusion is the general diffusion current density, N D is the ionized donor
concentration, and N A is the ionized acceptor concentration.
Eq. (2-42) also shows the total diffusion current as a function of the intrinsic
carrier concentration, n i , It is because the hole concentration in the neutral n-type
region equals n i 2/N D and the electron concentration in neutral p-type region equals
n i 2/N A that the following two equations are valid:
ni2 N D pn 0 (2-43)
ni2 N A n p 0 . (2-44)
As already shown in Eq. (2-34), the intrinsic carrier concentration has a certain
relationship with temperature. Moreover, the diffusion coefficient and the
44
diffusion length can also be influenced by temperature. The resulting temperature

dependence of the bulk diffusion current can be determined by [2.31]:
qD p pn 0 qni2 Dp Eg 3 / 2 E
J diffusion T / 2 T 3 exp T exp g . (2-45)
Lp ND p kT kT
As compared to Eq. (2-35), the diffusion current and the thermal generation
current have a different temperature dependency. When shown in an Arrhenius
plot, the slope of the diffusion current with 1/T is two times as steep as that of the
thermal generation current. Therefore, the different sources contributing to the
total dark current can be distinguished by conducting temperature measurements.
Until now, the basic device physics of the dark current generation mechanism
has been proposed in this section. Different dark current elements can more or less
find their origin in the preceding discussion. In the meantime, the dependence of
the dark current on the parameters, e.g. temperature, trap energy level, is directly
illustrated through the above mathematical equations. In the following section, the
spatial distribution of different dark current sources in the 4T pixel will be briefly
studied.
2.5.2 Spatial Dark Current Composition within the 4T Pixel
The total 4T pixel dark current is comprised of several individual dark current
sources from different locations in the pixel. It is interesting to investigate the
generation mechanism of each pixel dark current source according to the
discussion in the preceding sections. Based on the understanding of the origin of
pixel dark current sources, it is also necessary to establish the corresponding
countermeasures to reduce the dark current coming from each pixel dark current
source. As a result, the total pixel dark current can be efficiently lowered.
The pinned photodiode in the 4T pixel achieves a very low dark current by
implementing a heavily doped p+ pinning layer between the photon-sensitive
region and the oxide surface [2.14]. The purpose of this pinning layer is to
suppress and minimize the surface generation current, which is a main contributor
to the dark current in a conventional n+/p photodiode. Fig. 2-13 shows a cross
section of a conventional n+/p photodiode and a p+/n-well/p-epi pinned photodiode
with the shallow trench isolation oxide (STI) and interface traps. The dashed lines
indicate the boundary of the depletion regions. The edge of the surface depletion
region in a conventional n+/p photodiode, as shown in Fig. 2-13 (a), comes in
contact with the SiO 2 surface. The lattice imperfection at the Si-SiO 2 interface
causes interface traps to form. As discussed above, when the depletion region
touches the surface where interface traps are present, the surface generation
current commits to the dark current. The surface generation current in the
conventional n+/p photodiode is proportional to its perimeter. However, in a pinned
photodiode, the p+ pinning layer is used to pin or fill in the interface traps at the
Si-SiO 2 interface with holes [2.36]. The number of interface traps which can
45
Chapter 2
contribute to thermal generation declines significantly. Furthermore, due to the

heavily doped p+ layer, the depletion region is dragged down to the lightly doped
bulk region thus becoming isolated from the Si-SiO 2 interface. Therefore, the
probability of having surface generation current in the PPD is greatly reduced. In
addition, the PPD dark current is accordingly no longer proportional to the
photodiode perimeter [2.37].
(a) n+/p photodiode (b) p+/n-well/p-epi pinned photodiode

Figure 2-13. Cross section of the photodiodes used to illustrate the dark current generation:
(a) conventional n+/p photodiode and (b) p+/n-well/p-epi pinned photodiode.
However, the STI, which surrounds the PPD, can still be a potential trigger for
surface generation current, depending on the technology, the pixel layout design
and the application environment. Since the STI is a very vulnerable part of a
Metal-Oxide-Semiconductor (MOS) device under radiation, a separate discussion
is presented on its contribution to the pixel leakage current.
Even though the dark current contribution from the PPD has been minimized in
the 4T pixel, the transfer gate (TG), as an additional transistor, may introduce extra
dark current. As for the commercial 4T pixel used in this project, the TG overlaps
on the pinning layer with a distance of around 0.2m. Based on the device
simulation (Sentaurus), as demonstrated in Fig. 2-5, there is a high electric field at
the overlap region of PPD-TG when 3V is applied to TG and the floating diffusion
node is connected to 3V [2.13]. Because of the heavy doping profile of the pinning
layer, this electric field can reach as high as 4.67105V/cm. The electric field
near the TG is high enough to induce hot-carrier effects and impact ionization so
that the number of interface traps at the TG channel surface increases [2.38].
Moreover, even though the PPD bulk depletion region is isolated from the surface,
the depletion region of the p+/n junction in the PPD can still touch the Si-SiO 2
surface at the overlap area of PPD-TG. As a result, under the effect of the high
electric field, the surface generation current is actually enhanced near the TG
region. The dark current contribution from the TG can be measured and evaluated
by modulating the charge transfer time: a further detailed discussion on the
TG-induced dark current will be given in the next chapter.
The floating diffusion (FD) node in the 4T pixel is a sense node where the
46
voltage change induced by the integrated charges transferred from the PPD is read
out through a source follower. The device structure of the FD node is the same as
an n+/p diode where the surface depletion region touches the surface SiO 2 and the
STI oxide. Particularly for a snapshot mode [2.39], during which the
photon-generated charges globally transferred from the PPD store on the FD node
for a long time to wait for being readout, the surface generation current and
thermal generation current could therefore raise the dark current coming from the
FD to a considerable level. In addition, the contact-etching process and the
high-dose implantation can result in severe process-induced damage. By means of
an activation energy calculation, Kwon et al. have proven that the dominant
mechanism of dark current generated in the FD node is generation-recombination
[2.40]. In a radiation application, this thermal generation current from the FD can
further increase due to the extra creation of generation centers.
MOSFETs, as the elementary components in the pixel, can also contribute to the
dark current by means of an increase in the drain leakage current. The constant
electrical stress and the resulting hot-carrier effect on the MOSFETs can call for
more channel interface traps, which could raise the drain leakage current [2.41].
2.5.3 Dark Current from STI
Even though the STI cannot be regarded as an in-pixel device, it is drawing

increasing attention for its contribution to the dark current. The STI is used to
isolate the active regions within a pixel so that it has a large area bordering the
depletion regions of p-n junctions. Therefore, the sidewall and edges of the STI
become sensitive locations for thermal-generation dark current. During the
fabrication of the STI, several steps including etching, deposition and
chemical-mechanical planarization are used. These process steps result in
mechanical-stress induced lattice damage, stacking faults and dislocations for the
STI, particularly at the interface of STI-Si [2.42]. Consequently, there are
unavoidably some interface traps at the sidewall of the STI. Since the doped
silicon is surrounded by the STI, the surface generation current due to the STI
along the device perimeter has to be taken into consideration. With the scaling of
semiconductor technology, the area impact on the diode dark current is actually
mitigated while the perimeter effect starts to prevail. Thus, when making the pixel
layout, the geometrical parameter determining the contact between the depletion
region and the STI can be optimized in order to reduce the STI-induced thermal
generation current as much as possible while keeping the pixel fill factor as high
as possible. Besides the interface traps at the STI-Si interface, the STI-induced
compressive stress on the neighboring silicon can also affect the thermal
generation current in the depletion region [2.43]. This stress can narrow the silicon
band gap to raise the generation rate directly so that the thermal generation is
enhanced according to Eq. (2-35).
The STI is not only able to induce the surface leakage current in each individual
47
Chapter 2
depletion region but can also lead to the inter-device leakage current in some
applications. Fig. 2-14 shows a cross section of the STI with positive trapped
charges and the active regions. The dashed line refers to the boundary of the
depletion region of a p-n junction. If the radiation application is taken as an
example, due to radiation damage positive charges can be trapped in the STI.
When the amount of positive trapped charge is large enough, it can deplete the
p-type silicon beneath. Two adjacent depletion regions, previously isolated by the
STI, now have a high probability to merge with each other with the help of the
positive charges in the STI. In this way, the dark current increase can be
strengthened through the common contribution of multi-devices. Therefore, the
effect of the STI is of great importance for the pixel dark current performance
during the application in a radiation environment. In the following chapters, the
effect of the STI on the leakage current of the radiated in-pixel devices will be
addressed in more detail with measurements.
SiO2
STI Active STI Active STI

Region Region
n n
p-epi Depletion Region

p-sub
Hole
Figure 2-14. The effect of positively charged STI on the neighboring p-n junction.
2.6 Radiation Effects on the 4T Pixel
CMOS image sensors have been broadly applied in the field of space (such as
navigation, sun trackers, space craft telescopes) and medical equipments [2.44].
All these applications operate in a radiation environment. As with other
semiconductor devices, CMOS image sensors consist of numerous
metal-oxide-semiconductor (MOS) devices or structures. Therefore, understanding
the radiation damage on MOS structures can form a good foundation for the
radiation study on the CMOS image sensor pixels. In particular, MOS devices, as
key players in CMOS technology, have appeared in radiation studies on
semiconductor materials and devices [2.45]. Therefore, in this section,
radiation-induced degradation mechanisms are presented based on previous
studies. Additionally, the radiation effects on a 4T pixel are also briefly introduced.
Finally, device recovery after radiation damage together with the
48
radiation-hardened technology is discussed as well in this section.
2.6.1 Radiation Interaction with Silicon and Silicon Oxide
As briefly mentioned in Chapter 1, the interaction between silicon and the

radiation elements in scientific applications can be mainly classified into two
categories, non-ionizing damage and ionizing damage, depending on the energy
carried by the radiation species. In this section, the mechanisms for these two
interaction processes are briefly described.
Non-ionizing radiation ordinarily refers to the displacement damage in silicon
which can be induced by high-energy particles, such as neutrons, protons or
cosmic rays. With the incidence of a high-energy particle on a lattice target, an
atom is kicked out from its equilibrium position and becomes an interstitial defect,
while leaving a vacancy in the original lattice position. These incident particles for
displacement damage can either come from a radiation source or from the
secondary results of other radiation events [2.46]. Fig. 2-15 illustrates the
generation process of the vacancy and the interstitial defect that forms a lattice
defect in the displacement damage due to the high-energy particle interaction.
Figure 2-15. Lattice defect creation caused by the displacement damage.
Some interstitial defects can be annihilated by the vacancies later on, while
some of them can remain. Moreover, some vacancies can further form divacancies.
The crystal periodicity is interrupted by these defects. The displacement damage
therefore introduces bulk defects in semiconductor materials and devices. The
substrate current measurement can be used to analyze the displacement damage.
Compared to the interaction between non-ionizing radiation and silicon, ionizing
radiation does not transfer momentum to atoms. The energies of the incident
X-rays or gamma rays for the ionizing radiation are much lower than neutrons or
protons, although the ionizing radiation needs to have at least enough energy to
generate an electron-hole pair. This generation process can take place not only in
49
Chapter 2
silicon but also in silicon oxide. As for the MOS structure, the ionizing radiation
interaction with SiO 2 has been widely studied [2.45].
Fig. 2-16 illustrates the overall process of ionizing radiation interacting with
SiO 2 , from the generation of electron-hole pairs to the hole trapping and the
interface trap build-up. Ionizing radiation first elevates electrons from the valence
band to the conduction band to become free mobile carriers, leaving a hole in the
valence band. Electrons have a greater mobility such that they directly disappear
very fast after the incidence of radiation. Due to their lesser degree of mobility,
most of the holes remain in the SiO 2 and later undergo a hopping transport toward
the Si-SiO 2 interface with the help of an electric field. Nevertheless, right after the
generation of electron-hole pairs with the radiation incidence, some of the
electron-hole pairs recombine very quickly. Only those holes escaping the initial
recombination can be transported. During the hopping process, the holes are
trapped near the Si-SiO 2 interface by the traps present in the oxide. The trapped
charge will induce a corresponding electric field. As for the MOS device, its
flat-band and threshold voltage will be altered by these trapped holes and their
electric field. Some of the holes can be transported further and come closer to the
Si-SiO 2 interface, acting as border traps. Furthermore, the other outcome of
ionizing radiation is the build-up of interface traps at the Si-SiO 2 interface
[2.45][2.46].
Figure 2-16. Main processes for the ionizing radiation-induced damage in a MOS
structure with a positive gate bias, together with the band diagram of SiO 2 and Si.
Ionizing radiation-induced interface trap build-up takes place later than the hole
trapping, and their influence on the MOS device performance can also be different.
50
Hence, the generation mechanism of electron-hole pairs, hole trapping and

interface trap build-up will be addressed further in detail in the following sections.
2.6.2 Ionizing Radiation Damage Mechanism on Metal-Oxide-Silicon Devices
In this section, the detailed degradation mechanisms induced by ionizing

radiation are addressed by taking the MOS structure as a specimen. A discussion is
also presented here about the dependence of ionizing radiation on the electric field,
temperature, and incident photon energy.
Electron-Hole Generation and Hole Yield
Electron-hole pair generation in SiO 2 due to the ionizing radiation is highly

dependent on the energy that is carried by incident photons, X-Rays, gamma rays,
etc. This generation process is less influenced by the electric field applied to the
material or by ambient temperature. The amount of energy required can vary,
depending on different interacting materials. The energy for electron-hole
generation in SiO 2 is theoretically about 183eV, according to the work of
Ausman and McLean [2.47]. Consequently, an 18eV-energy can induce a pair
volume density per rad of 8.11012 pairs/cm3 in SiO 2 . However, not all of the pairs
will contribute to the radiation effects because a recombination process follows the
creation of an electron-hole pair. As mentioned above, some electrons can escape
the oxide a few pico-seconds after the pair generation due to their high mobility.
Some electrons are left in the oxide but they recombine with the holes. Hence, the
yield of holes is greatly correlated with this recombination process and it is in fact
the holes that ultimately play a key role in the degradation of the MOS device
parameters. The electron-hole recombination in SiO 2 can be affected by the
applied electric field and the incident photon type and energy.
The electric field during ionizing radiation can separate the electron-hole pair
right after generation, and therefore some of the holes can escape the initial
recombination. The higher the electric field is, the larger the chance is for the holes
to escape the recombination. Thus, the hole yield is proportional to the electric
field. Another factor in hole yield variation is the initial line density of the
electron-hole pairs, which defines the number of charge pair per unit length. This
line density is determined by the incident radiation type and energy. There are two
analytical models that describe the line density when the electron-hole pairs are
generated either very near or far away from each other. The geminate
recombination model, which was initially formulated by Smoluchowski [2.48], is
applicable for cases where the pair interval is much larger than the distance
between the electron and the hole. Consequently, the electrons and holes are
almost isolated from each other and the line density is quite low. The
recombination only takes place between electrons and holes from one pair, while
the recombination with other pairs can be negligible. Contrary to the geminate
51
Chapter 2
model, an opposing model was proposed by Jaffe [2.49], which is called the
columnar model. In this model, the distance between pairs is much smaller than it
is between electrons and holes. As a result, the line density is high and the holes
can recombine with the electrons not only from the same pair but also from
neighboring pairs. Comparing the geminate model and the columnar model shows
that the higher the density is of electron-hole pairs generated by incident radiation,
the lower the hole yield is due to a higher recombination probability. Since
different ionizing radiation sources can induce different initial line densities for the
generated pairs, the hole yield is highly dependent on each specific type of
ionizing radiation [2.50].
Hole Trapping and Interface Trap Building-up
In the preceding section, the resulting hole yield from the electron-hole pair
generation is discussed with regard to ionizing radiation. In a chronological
sequence, the holes are transported toward the Si-SiO 2 interface after escaping the
recombination. Later the interface traps are built-up at the Si-SiO 2 interface.
Ionizing Radiation
Gate
Distance along Oxide
Electron-Hole
Electric Generation Bulk SiO2
Field Deep Trap
20nm
Hole
Trapping
Electron
5nm Trap
Hole Annihilation
by Electron
Electron-Hole Bulk Si Tunneling
Recombination
Interface Roughness Border

Electron
about 0.2nm Trap
Injection from Si
Figure 2-17. Hole trapping and the trapped charge annihilation in the different locations of
the SiO 2 .
The hole transport process in MOS SiO 2 has been described in the form of a
continuous-time-random-walk [2.51]. The holes move forward by hopping
between localized shallow trap states, the spacing of which is randomly distributed
52
within the SiO 2 . In the transport process, the hole also creates a lattice distortion in
its vicinity. The oxide thickness greatly impacts the hole transport. The further the
hole travels, the more difficulty it has moving. Some holes can hop through the
oxide very quickly, while some holes stop at a state for a long time before they
move again. Therefore, hole transport is highly dispersive and continues over the
course of many decades after an incidence of ionizing radiation. Temperature also
plays an important role in the transport. When the temperature is below 140K, the
hole transport takes more time because it is not temperature-activated. In addition,
a stronger positive electric field on the gate can efficiently transit holes in the SiO 2
[2.45][2.51].
Fig. 2-17 shows a schematic of the hole trapping and electron injection in the
SiO 2 of a MOS structure with a distance legend. The holes approach a region near
the Si-SiO 2 interface and become trapped there after undergoing the
aforementioned hopping transport process. This main hole trapping region is
located between 5nm and 20nm away from the Si-SiO 2 interface [2.45]. Excess
oxygen vacancies, acting as hole traps, are present in this region. In the bulk SiO 2
region, one Si atom is bonded to four oxygen atoms. However, if one oxygen atom
is missing near the Si-SiO 2 interface, each Si atom has to form a weak Si-Si bond
in addition to their bonds to three oxygen atoms. This strained Si-Si bond can very
easily be broken by capturing a hole, being further converted to an E' center. The
E' center is a trivalent silicon defect associated with an oxygen vacancy in the
oxide [2.52]. The trapped holes are not permanently stable. They can be annealed
and disappear over a period of hours to even years. This trap annealing process is
dependent on the temperature, applied electric field and time. Electron injection
from the bulk Si is proposed to recombine and anneal the positive trapped holes.
This annealing process can be realized by tunneling or thermal excitation [2.53].
At high temperatures the thermal excitation is dominant, while at room
temperature the tunneling is the dominant mechanism. There are different models
to describe the concrete annealing process. Generally, annealing was assumed by
neutralizing the positively charged Si and reforming the Si-Si bond through
electron tunneling [2.53]. However, there is another model that proposes that
electrons tunnel to the neutral Si and form a dipole structure where the extra
electron can then tunnel back and forth to the substrate [2.54]. Some holes can
move as close as 5nm away from the Si-SiO 2 interface, acting as border traps. The
border traps can exchange charges with the bulk silicon based on the
above-mentioned dipole structure model, which is also discussed as an explanation
for their relationship with the 1/f noise [2.55].
Besides the trapped holes in the MOS oxide, interface traps are the other main
products of ionizing radiation. The radiation-induced interface trap is a Si atom
bonded to three other silicon atoms and a hydrogen atom. As soon as the Si-H
bond is broken, the silicon atom then has a dangling bond which works as an
interface trap extending into the oxide [2.45]. When the interface trap is located
above the middle of the band-gap, it is negative. However, at the mid-gap it is
53
Chapter 2
neutral and positively charged below the mid-gap [2.30]. The existence of a Si-H
dangling bonds is highly dependent on the oxide quality. Oxide grown using dry
oxidation usually generates fewer interface traps than using wet oxidation when
the Si-SiO 2 interface is depassivated by radiation interaction, hot carrier effect, etc.
[2.45]. In fact, the ionizing radiation-induced interface trap building-up is a
process of Si-H bond depassivation. There are different models to describe the
generation process of dangling bonds or interface traps. One model proposes that
the interface traps are converted from the trapped holes by the electron injection
[2.56]. The other model points out the hopping proton transport and the subsequent
interaction between the interface and the proton are the cause for the interface trap
build-up after the ionizing radiation [2.57]. There is some hydrogen left in the
SiO 2 due to the oxide fabrication process. When radiation-induced holes hop
through the SiO 2 , they free hydrogen to become protons. In the next stage, the
protons are transported towards, and reach, the Si-SiO 2 interface. The Si-H bond is
then broken by the coming protons and leaves a trivalent Si defect as an interface
trap. This model has been confirmed by an experimental bias switching
measurement. Furthermore, interface trap generation has a different
time-dependence than hole trapping, which usually occurs later [2.58].
Although the trapped holes and the interface trap build-up are two different
outcomes of ionizing radiation in MOS oxides, they both degrade the MOS device
parameters in terms of the flatband voltage and threshold voltage [2.58][2.59]. The
flatband voltage of a MOS device, V FB , can be given as:
Qot Qit
VFB ms , (2-46)
Cox Cox
where ms is the work function difference between metal and silicon, Q ot is the
trapped charge in the interfacial oxide, Q it is the interface charge at the Si-SiO 2
interface, and C ox is the oxide capacitance. The oxide trapped charge can be
rewritten as:
tox
1
Qot
tox x x dx
0
, (2-47)
where t ox is the oxide thickness, and (x) is the spatial distribution of the oxide
charge density. The MOS device threshold voltage, V T , is a function of the
flatband voltage, which can be shown as:
2 s qN a 2F VSB
VT VFB 2F , (2-48)
Cox
where F is the surface potential, s is the silicon permittivity, N a is the doping
concentration, V SB is the substrate bias, and q is the charge of an electron.
According to the above equations, the flatband voltage and the threshold voltage
have an identical reaction to radiation-induced trapped holes in the SiO 2 . It can be
shown as a shift of the flatband voltage and the threshold voltage in the following
54
form [2.45]:
Qot
VFB ,ot and VT ,ot q ox K g f y ft tox2 D , (2-49)
Cox
where V FB,ot is the oxide trapped charge-induced shift of the flatband voltage,
V T,ot is the oxide trapped charge-induced shift of the threshold voltage, Q ot is
the amount of radiation-induced trapped charge in the oxide, C ox is the oxide
capacitance, q is the electron charge, ox is the oxide permittivity, K g is the
energy-dependent charge generation coefficient, f y is the field-dependent fractional
free charge yield, f t is the field-dependent fraction of radiation-induced trapped
holes, t ox is the oxide thickness, and D is the ionizing radiation dose. As shown in
Eq. (2-49), the positively charged oxide-trapped holes can usually lead to a
negative shift of the flatband voltage and threshold voltage.
Radiation-induced interface traps have a similar effect as Eq. (2-49) on the
threshold voltage shift of a MOS device, which can be given as:
Qit
VT ,it . (2-50)
Cox
where V T,it is the threshold voltage shift due to the radiation-induced interface
charges, Q it is the amount of radiation-induced interface charges.
There are two types of interface traps: the acceptor-like interface traps and
donor-like interface traps. Ionizing radiation usually induces acceptor-like
interface traps in the upper half of the band gap and donor-like interface traps in
the lower half of the band gap [2.58]. When the interface traps are filled below the
Fermi level due to the downwards bending of the band-gap, they become
negatively charged. Then the interface traps make the threshold voltage shift to the
positive side based on Eq. (2-50).
Besides the threshold voltage shift, the sub-threshold swing of a MOS device, S,
is also a function of the interface trap density, which is expressed as:
1 qS
Dit 1 Cox Cb , (2-51)
q 2.3kT
where C b is the bulk capacitance, k is Boltzmanns constant, D it is the interface
trap density, and T is the absolute temperature. With an increasing number of
interface traps, the sub-threshold swing becomes larger and consequently the
leakage current in a MOS device becomes higher.
2.6.3 Radiation-Induced Degradation on the 4T Pixel
The ionizing radiation-induced degradation mechanisms in MOS oxide or in STI

oxide have been discussed in the preceding sections. The above knowledge can be
applied to the study of radiation effects on CMOS image sensor pixels, particularly
for the 4T pixels in this project. The MOS structure is still the basic element of a
55
Chapter 2
4T pixel. The STI oxide used in 0.18m technology can be regarded as the gate
oxide of a FOXFET (Field Oxide Field-Effect Transistor) when two neighboring
isolated active regions act as the source and drain node of an FET. Therefore, hole
trapping in the SiO 2 and interface trap build-up at the Si-SiO 2 interface are still the
key problems induced by ionizing radiation in the 4T pixel.
The dark current increase, as a macroscopic degradation parameter, has become
a widely-studied topic for pixels under ionizing radiation [2.60]. The following
conclusions, which are drawn from the preceding discussion, may account for the
post-radiation pixel dark current increase:
- the increased surface generation current in the depletion region along the
SiO 2 caused by the greater number of radiation-induced interface traps
- more unreliable isolation between individual devices due to the creation of
parasitic leakage paths through the trapped holes in the STI
- the shift of the threshold voltage of the MOS device
The peripheral leakage current is greatly dependent on the isolation oxide, and
the surface generation current from the STI is considered as a primary degradation
mechanism for the 4T pixel after ionizing radiation [2.40][2.61]. The emission rate
of a defect can be dramatically enhanced via a high electric field. Therefore, along
with the trapped holes and the interface traps coming from the radiation, the
existence of a high electric field inside a pixel can aggravate the radiation
degradation by means of a surge in the dark current through field-enhanced
emission or trap-assisted tunneling [2.62]. From this perspective, the high electric
field at the overlap region of PPD-TG makes the 4T pixel fragile to ionizing
radiation in terms of a sharp increase in dark current. With regard to the
radiation-induced dark current increase, the activation energy lowering and the
capture cross section broadening are the microscopic degradation mechanisms at
work behind the scene, which is addressed in detail in Chapter 4.
The spectral response degradation is also an outcome of ionizing radiation for
the 4T pixel [2.18][2.20]. There are several dielectric layers used to cover the pixel
during processing. The radiation-induced change in the transmission of these
layers can alter the pixels response to light. In addition, a loss in the spectral
response of a radiated pixel can also originate from other causes, like the increased
surface recombination of photon-generated charges and the depletion region
variation after radiation.
In the following chapters, the radiation-induced effects on pixel performance are
extensively studied through experiments and measurement results. The pixel
degradation mechanisms and potential countermeasures are also discussed.
2.7 Radiation Hardened Techniques
The final aim of studying radiation effects and mechanisms is to make

semiconductor devices radiation-hardened in order to achieve a satisfactory
performance during the application in a radiation environment. The
56
radiation-hardened techniques should be stable and reproducible. Thus, there

should be sufficient awareness of the different hardness levels achieved by various
modifications in the device design and technology. Evaluating the process
technology and the detailed device design rule is always a prerequisite considering
radiation-hardened techniques. With respect to the damage caused during radiation,
some test structures with optimized schemes can be designed and later
characterized. The techniques which achieve a certain level of radiation-hardness
can be advanced to the next step and applied to a chip design. Otherwise, the
previous steps will be recycled until a reliable technique with a reasonable level of
radiation-hardness is achieved. The final radiation-hardened performance will be
repeatedly tested to evaluate the stability of the selected radiation-hardened
techniques.
Radiation-hardness can be realized not only through the process but also through
the layout and design. As discussed above, the main products of ionizing radiation
for MOS devices are the oxide trapped holes and the interface traps. Therefore,
from the process point of view, the hardening against ionizing radiation is a matter
of optimizing oxides and interfaces. SiO 2 growth and annealing, gate electrode
deposition, implantation, sputtering, plasma etching, and high-temperature
processing are the most important factors which could influence the quality of
oxides and interfaces when considering the radiation-hardness from the
perspective of process technology [2.63].
The volume of the oxide is an important issue for a radiation-hardness target. A
larger oxide volume means a larger number of trapped holes. According to Eq.
(2-49), the shift of the flatband voltage or the threshold voltage is proportional to a
power law of the oxide thickness. Therefore, the device manufactured in a
thin-gate-oxide technology is inherently radiation-tolerant. As for the oxide growth,
dry oxide presents a better radiation performance due to a higher oxide quality.
However, wet oxide exhibits a higher density of dangling bonds and a lower
dielectric strength because water is introduced for the reaction during wet
oxidation. Moreover, the temperature during oxide growth and the post-annealing
can also affect the radiation hardness. The optimized temperature for dry oxide
growth can be 1000C. As for the post-process annealing temperature after the
oxide growth, it should be reduced to a range between 850C and 950C instead of
1100C, which is the temperature used in a normal process where
radiation-hardness is not a consideration [2.63]. The hardness or quality of the
oxides and interfaces will be degraded by these high-temperature processes, which
are operated in a very late stage.
Furthermore, some etching steps involving plasma and reactive ions should be
handled carefully during processing since the in-process radiation damage can be
introduced as well.
Besides the improvement of the processing steps, the layout (which is also
called hardening-by-design) can also be used to raise the device hardness level
against ionizing radiation [2.64]. The trapped charges in the STI can induce poor
57
Chapter 2
isolation between individual devices by forming parasitic FOXFETs. Therefore,

the main task of a radiation-hardened design is to reduce the contact area between
the STI and the active regions as much as possible. An enclosed-layout is a
sufficient solution although a guard ring surrounding the active region can also
work. Besides the trapped charges in the STI, the surface generation current due to
the interface traps is another problem caused by the ionizing radiation. When the
layout is being drawn, a pinning layer can be placed to cover the STI so that the
surface generation current can be largely suppressed.
Additionally, the substrate bias modulation can be employed to balance the
ionizing radiation-induced threshold voltage shift for MOS devices. However, the
working mode of an entire chip may also change in the meantime due to the
substrate bias. Thus, some radiation-hardened techniques always have some
trade-offs in terms of device performance, layout area, etc.
In this work, a radiation-hardened CMOS image sensor is implemented through
radiation-hardening-by-design techniques. Even though the hardening-by-design
methodologies depend on a certain technology node, these methods are also
applicable to the CMOS image sensors fabricated in other technologies.
2.8 Conclusion
This chapter first describes the basic architecture of CMOS image sensors,
followed by a discussion on different pixel structures. The pinned photodiode 4T
pixel is addressed in more detail, concerning the electro-optical performance, since
it is the main subject that will be studied in this work. Different noise sources in
the pixel are analyzed. In addition, a study on the dark current generation
mechanism in the pixel is also presented. The spatial distribution of dark current
sources in the 4T pixel is briefly discussed in this chapter.
An overall analysis of the total ionizing dose effects on MOS structures and 4T
pixels is also conducted in this chapter. A detailed introduction has been given to
the process of radiation-induced electron-hole pair generation, charge trapping in
the oxide and the interface trap build-up. The radiation-hardened methods by
means of process, layout and design are also shortly proposed in this chapter. Thus,
this chapter provides a solid background knowledge for the following chapters.
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62
Analysis of Ionizing Radiation Degradation of 4T CMOS Image Sensors
Chapter 3
Analysis of Ionizing Radiation Degradation of
4T CMOS Image Sensors
This chapter presents a radiation degradation study of 4-Transistor (4T)

complementary metal-oxide-semiconductor (CMOS) image sensors (CIS) designed
in standard 0.18m technology. The significant contribution of this chapter is a
systematic evaluation of the X-ray radiation effects on 4T image sensors from the
individual device level, to the pixel level and to the level of the entire sensor. The
major degradation parameters of the sensor have been analyzed. In Section 3.2, a
description is given of the radiation experiment details and the test devices used in
this study. The test structures consist of varying geometries of in-pixel MOSFETs,
pinned photodiodes (PPD), and transfer gates (TG). Characterization was performed
on these test structures after different X-ray doses up to 109krad. In Section 3.3.2,
the main degradationan increase in the dark signalis analyzed by modifying the
TG charge transfer time and integration time. The PPD and the TG are the elements
most sensitive to the dark signal increase of the sensor. Section 3.3.3 evaluates the
radiation-related dimensional effects on the sensors, which show different results
compared to 3T pixels. The transfer-gate length influences the dark signal due to
not only the electric field variation in the TG channel but also the generation of
local defects. A slight degradation of the quantum efficiency was observed after
radiation in the short-wavelength region, as is discussed in Section 3.3.4. In-pixel
MOSFETs are used to identify the origin of increases in a radiation-induced dark
signal. Shallow trench isolation (STI) oxides are responsible for the radiation
degradation of the sensor. The results of the discussion on the radiation-related
dimensional effects on the sensors together with the STI effect can be used as a
guideline for future layout designs of radiation-hardened CMOS image sensors, as
presented in Chapter 5.
3.1 Background of Radiation Effects Study on 4T Pixels
CMOS image sensors are inherently tolerant to ionizing radiation and thus are
suitable for applications in the fields of medicine and space. The CMOS tolerance
to ionizing radiation is due to the thinner gate oxide used in the CIS technology as
compared to CCDs. The effects of ionizing radiation on 3T CMOS image sensors
have been widely studied [3.1][3.2]. However, the radiation effects on 4T pixels and
corresponding in-pixel elementary devices have yet to be studied in-depth. The
previous knowledge gained from 3T pixel studies cannot be directly applied to 4T
pixels because of the additional pinned photodiode and transfer gate in the 4T pixel.
63
Chapter 3
These devices make the readout operation more complicated and introduce
additional sources of dark current [3.3]. In 3T pixels, the dark current is mainly
contributed by the surface depletion region of the photodiode edge, which is not a
radiation issue in the pinned photodiode 4T pixel [3.4]. The transfer gate acting as
an extra transistor in 4T pixels has been reported as an additional source of dark
current [3.5]. Presently in the fabrication process of 4T pixels, additional
implantations and processing steps are being devised to allow a cancellation of the
reset noise and improve the quality of the photon-electron collections. These
additional processing steps in turn affect the radiation hardness performance of the
in-pixel devices. These types of radiation effects which are influenced by the
additional 4T-pixel processing steps, have not yet been completely quantified based
on the results of former technologies. Radiation-induced interface trap generation
and shallow trench isolation (STI) oxide-trapped charges are still responsible for the
increase in the dark signal of the sensor [3.6][3.7]. In this work, the
radiation-induced degradation behavior of a 4T pixel, particularly in the PPD and
TG area, is presented. In view of the differences with the 3T pixel, the origin of the
dark signal is evaluated both before and after X-ray radiation, and a
radiation-hardened design is proposed.
3.2 Ionizing Radiation Degradation Measurements
In order to present a comprehensive study of the effect of radiation on CMOS

image sensors, a wide range of test devices were prepared, from in-pixel MOSFETs,
to different pixel designs, to a complete sensor. Consequently, the measurement
set-ups varied depending on different test devices. Furthermore, the details of the
radiation experiments are also necessary to be introduced here since the ionizing
radiation effects are the focus of this project. Therefore, this section presents a
description of the test structures, the measurement set-ups and the radiation source
settings used in this study.
3.2.1 Test Structures
According to previous studies, ionizing radiation is known to generate trapped

charges and interface states in MOS oxides. It can induce effects such as voltage
shifts, leakage current increases, etc. [3.8]. Therefore, it is necessary to evaluate
the post-radiation performance of the in-pixel MOSFET, TG and PPD in order to
better understand their individual contributions to the total dark current of the
pixel.
As an illustration, Fig. 3-1 (a) shows a cross section and composition of the
in-pixel elementary devices, including a pinned photodiode, a transfer gate and a
reset transistor. This test structure is used in the measurements below. The
different layout designs of in-pixel MOSFETs are presented in Fig. 3-1 (b) and (c),
which consist of a stripe-shaped gate and an enclosed-shaped gate. In order to
64
study the behavior of each individual element of the pixel, several test structures
are designed with varying geometries of pinned photodiodes, transfer gate
transistors, reset transistors and in-pixel MOSFETs. Enclosed layout transistors
(ELT) are designed and tested in order to be compared with a regular transistor
layout.
(a)
Gate
n+
n+
Oxide
(b) (c)
Figure 3-1. (a) Cross section of in-pixel elementary devices; (b) regular layout of a
MOSFET; and (c) enclosed layout of a MOSFET.
The sensors used for the radiation-effect characterization in this chapter have an
off-chip ADC (Analog-to-Digital Converter) and on-chip CDS (Correlated Double
Sampling). The CDS is used for the offset and kTC noise suppression, as mentioned
in the preceding chapter. Inside the pixel array, there are several design variations
with different transfer gate lengths and pinned photodiode lengths. The photodiode
length is defined in the same direction as the length of the transfer gate, as shown in
Fig. 3-2.
A sub-pixel array of 6x4 is used for each variation. The different PPD lengths
used in the sub-pixel array are 1.2m, 3.2m, 5.2m, 7.2m and 9.2m. The TG
length varies from 0.7m to 1.0m, 1.5m and 2m. However, as for the quantum
efficiency measurement, an entire sensor of 137x197 pixels is used with a uniform
pixel type (PPD length: 4.12m, PPD width: 8.54m, and TG length: 0.9m).
As already mentioned in Chapter 2, a 4T pixel consists of a reset transistor (RST),
a source follower transistor (SF), a row selector transistor (RS), a TG and a PPD.
65
Chapter 3
Fig. 3-2 shows the schematic of a pixel together with a cross section of the PPD and
the TG.
Figure 3-2. A 4T pixel schematic used in the sub-pixel arrays.
3.2.2 Radiation Settings and Measurement Details
The radiations were all performed with an X-ray source at Philips Healthcare at
room temperature with a dose rate of 0.32rad/s. The average energy of this X-ray
source was 46.2keV. During the radiation, none of the devices used in this chapter
were electrically biased.
The elementary in-pixel devices (MOSFETs, PPD and TG) were irradiated to
total ionizing doses (TID) of 31krad, 86krad, and 109krad after 3-turn radiation for
different samples. The measurements of the in-pixel devices were implemented
with a four-probe test bench together with a semiconductor parameter analyzer
controlled by the IC-CAP tool after each radiation session. IC-CAP is the
device-modeling software which also deals with device measurement control and
parameter extraction.
All the pixel arrays were irradiated up to 60krad, while there was one entire
sensor also exposed to a maximum dose of 109krad. The pixel/sensor
measurements were performed with a PCB board which had the controlling signals
for the pixel readout programmed using an FPGA. LabView software was used to
collect the output data. The low amplitude voltage level of the TG pulse was set at
different values below zero during the pixel operation in order to check its
influence on the pixel dark signal. Furthermore, variation in the Vrst was used for
measuring the PPD pinning voltage.
To reduce the random noise in the dark signal measurements, an average of 20
66
continuous frames was used for the pixel measurements.
3.3 Ionizing Radiation Effects on CMOS Image Sensors and Elementary Test
Devices
This section presents the reaction of the elementary in-pixel MOSFETs, the PPD
and the TG, and the entire sensor to the radiation. The radiation-induced dark signal
increase can be checked by varying different pixel parameters, which can give
further insight into the radiation degradation mechanism in CMOS image sensors.
3.3.1 Radiation Performance of In-Pixel Test Devices
Unlike 3T pixels, 4T pixels employ a TG to transfer charges, and a PPD to

reduce the dark current. Therefore, this part of the chapter evaluates the dark
signal originating from the TG and the PPD in terms of the in-pixel device leakage
current.
Since PPDs operate in the charge domain and cannot be fabricated individually,
the test structure shown in Fig. 3-1 (a) (a reset transistor with a TG and a PPD)
was manufactured to measure the current contribution from the TG and the PPD in
the dark when changing the voltage applied on the TG node. The conventional
transfer characteristic of the reset transistor is measured when taking the floating
diffusion node (FD) as a drain node of the transistor and sweeping the gate voltage
on the reset gate, referring to Fig. 3-1 (a). In the meantime, since the FD node is
applied with a voltage to measure the reset transistor drain current, the dark
current induced by the TG voltage variation coming from the overlap region of the
PPD-TG and the TG channel may also contribute to the drain leakage current of
the RST in the transfer characteristic. Here, the TG node voltage is swept from
-1V to 3V for each measurement, and its effect on the reset transistor transfer
characteristic is shown in terms of the drain leakage current.
Fig. 3-3 shows the increase in the drain leakage current before radiation of the
in-pixel reset transistor (W/L=0.5m/0.6m) with the increasing transfer gate
voltage. Here the drain node is supplied with 0.05V, V drain =0.05V and the source
node is connected to 0V, V source =0V. The substrate is biased with -2.2V,
V sub =-2.2V, due to the on-chip diode which has been proven to have no influence
on the result. There is a high electric field at the overlap region of the PPD-TG
during the charge transfer due to the local doping profile of the p+ layer and n-well,
which is also shown using a device simulation [3.9][3.10]. The overlap between
the transfer gate and the p+ pinning layer can further strengthen the electric field.
When the voltage on the TG node increases, the electric field in the PPD-TG
overlap region also increases. This increase in the electric field turns the carriers
passing through the overlap region into hot carriers [3.10]. These hot carriers will
then bombard the interface beneath the transfer gate. In this course, interface traps
are generated due to the impact ionization induced by these hot carriers and a
67
Chapter 3
leakage path is formed between the FD node and the PPD [3.11]. Furthermore,
when the voltage on the TG reaches 3V, the charges from the PPD in the dark can
then transfer through the TG channel, which further contributes to the drain
leakage current of the reset transistor measured at the FD node. From the pixel
point of view, a lower voltage level on the TG can help to reduce the pixel dark
current, which is discussed below.
1E-4
1E-5 Vtg=-1V
Vtg=1V
Ids (Drain Current) (A)
1E-6
Vtg=3V
1E-7
1E-8
1E-9 size:
1E-10 W/L=0.5 m/0.6 m
1E-11
Vsub=-2.2V
1E-12
Vdrain=0.05V
1E-13 Vsource=0V
1E-14
-2 -1 0 1 2 3 4
Vgs (Gate Voltage) (V)
Figure 3-3. Transfer characteristic of the in-pixel reset transistor with different voltages
applied to the transfer gate.
Besides the above leakage current evaluation of the in-pixel PPD and TG, it is
also important to study the post-radiation leakage current performance of the
in-pixel MOSFET, since it is the elementary pixel dark current origin after
radiation. Several single in-pixel MOSFETs fabricated with different layouts for
the purpose of studying the basic radiation degradation mechanism of the in-pixel
devices will help in the design of a radiation-hardened pixel.
Fig. 3-4 shows the ionizing radiation effects on a transistor with a regular layout
(a stripe-shaped gate), as shown in Fig. 3-1 (b). Here, the substrate is applied with
0V, V sub =0V, the drain node is still applied with 0.05V, V drain =0.05V, and the
source node is applied with 0V as well, V source =0V. A large post-radiation increase
in the drain leakage current is observed. The threshold voltage (V th ) does not shift
due to the thin gate oxide in the technology used to fabricate the image sensor.
Thus, the amount of radiation-induced trapped charges in the gate oxide can be
negligible. The STI oxide used to isolate the devices in this technology node can
trap some holes generated from radiation. Due to these trapped charges, a lateral
leakage path is formed between the source and drain node by a parasitic field
oxide transistor [3.12][3.13], which consequently leads to a large increase in the
drain leakage current, as shown in Fig. 3-4.
68
1E-3
Before Radiation
1E-4
31krad
1E-5
109krad

1E-6
1E-7
1E-8
size:
1E-9
W/L=26m/1m
1E-10
1E-11
Vsub=0V
1E-12
Vdrain=0.05V
1E-13
Vsource=0V
1E-14
1E-15
-4 -3 -2 -1 0 1 2 3 4
Figure 3-4. Radiation performance of the transfer characteristic of an nMOSFET with a

regular layout, as shown in Fig. 3-1 (b).
1E-3
1E-4
1E-5 Before Radiation
1E-6 31krad
1E-7 109krad
1E-8 size:
1E-9 W/L=26m/1m
1E-10
1E-11 Vsub=0V
1E-12 Vdrain=0.05V
1E-13 Vsource=0V
1E-14
1E-15
-4 -3 -2 -1 0 1 2 3 4
Figure 3-5. Radiation performance of the transfer characteristic of an nMOSFET with an

enclosed layout.
Compared to a regular layout, the result from the enclosed layout transistor in
Fig. 3-5 shows a much slower drain leakage current increase. The V th does not
shift. The ELT has an edgeless drain/source node and thus it has less area in
contact with the STI oxide than a regular layout does. Moreover, trapped charges
in the STI have less influence on the device characteristics. As a result, the ELT
drain leakage current increase is much lower compared to the regular layout after
radiation[3.12][3.14]. The remaining small post-radiation drain leakage current
69
Chapter 3
increase of the ELT transistor can be attributed to the interface trap generation at
the Si-SiO 2 interface. These donor-like interface traps are mostly located in the
lower half of the band gap. They mainly contribute by increasing the drain leakage
current even though they have no effect on the sub-threshold slope or the threshold
voltage shift [3.15].
1E-4
1E-5 Before Radiation
1E-6 31krad
1E-7 86krad
size:
1E-8
1E-9 W/L=0.5m/0.6m
1E-10 Vsource=0V
1E-11 Vdrain=-0.05V
1E-12 Vsub=0V
1E-13
1E-14
1E-15
1E-16
1E-17
-4 -3 -2 -1 0 1 2 3 4
Figure 3-6. Radiation effects on a pMOSFET with a regular layout.
Besides the results from nMOSFETs, a measurement of a pMOSFET fabricated

with this 0.18m technology was performed as well. Here, the drain node of the
pMOSFET is applied with -0.05V, V drain =-0.05V. There is no noticeable
parameter degradation, such as a leakage current increase or V th shift, up to 86krad,
as shown in Fig. 3-6. Due to the p-doped active region of pMOSFETs, the positive
trapped charges in the STI oxide do not help to form a lateral parasitic leakage
path through an STI-based field oxide transistor as they do in nMOSFETs. The
depletion region expansion beneath the STI in an n-well is inhibited by the trapped
positive charges. Furthermore, these trapped charges are ultimately located far
away from the Si-SiO 2 interface traps and have less effect on the interface
performance. Thus pMOSFETs in this technology are inherently radiation-tolerant
[3.16]. Future pixel designs with enclosed-layout pMOSFETs can be promising
for radiation applications, which can at least endure 110krad ionizing radiation
damage.
From the above measurements in this section, it can be seen that the ELT layout
and pMOSFETs are more radiation-tolerant because they present a low
post-radiation lateral parasitic leakage current increase. As in-pixel devices, they
contribute less to the pixel dark current.
70
3.3.2 Pixel Dark Signals Regarding Radiation Degradation
After evaluating the radiation performance of the elementary in-pixel devices in

the previous section, the dark signal origin of the pixel and the radiation
performance are studied in this section by switching the TG on and off as well as
regulating the charge transfer time. The TG of a 4T pixel can be used to
disconnect the PPD from the other three transistors. The measurement with the TG
switched off can be used to study the dark signal behavior of in-pixel MOSFETs.
When the TG is switched on, the dark signal performance of the entire pixel can
be obtained.
500 TG_On
TG_Off
450
Dark Signal (DN)
Integration Time: 384ms

400
Room Temperature
350
300
0 5 10 15 20 25 30
Radiation Dose (krad)
Figure 3-7. Mean dark signal of a pixel array with the transfer gate (TG) on and off,
before and after radiation.
Fig. 3-7 shows the mean dark signal of a pixel array before and after radiation.
The offset level of the measurements is set at 250DN. It can be seen in Fig. 3-7
that when the TG is turned on, the dark signal goes up slightly before radiation and
increases sharply after radiation, which is due to the dark signal increase
introduced by the PPD and the TG. After a radiation dose of 30krad, an obvious
increase of radiation induced dark signal can be observed. After the radiation, the
trapped charges in the STI oxide will help to form a lateral leakage path not only
within one MOSFET but also among inter-devices, which to some extent increases
the dark signal [3.17]. Meanwhile, the accumulation of the post-radiation trapped
charges in the STI oxide around the PPD boundaries could make it possible for the
inversion layer along the STI to merge with the PPD depletion region. Then, the
PPD depletion region is not well isolated from the sidewall of the STI with
interface traps, as illustrated in Fig. 3-8, which could enhance the surface
generation current. As a result, the dark signal increases [3.16]. Post-radiation
71
Chapter 3
defect generation under the TG channel together with the high electric field at the
PPD-TG region also contributes to the large dark signal increase when the TG is
switched on.
Figure 3-8. Post-radiation trapped charge-induced degradation of the isolation between the
depletion region of the PPD and the STI with interface traps.
However, the dark signal variations when the TG is switched on and off are
clearly different. When the TG is off, the dark signal is mainly contributed by the
in-pixel MOSFETs, which demonstrates a relatively small increase in the
post-radiation dark signal. However, the measurement with the TG switched on
shows a much larger post-radiation increase in the dark signal due to the additional
contribution from the PPD and the TG. Therefore, the influence of the
post-radiation leakage current increase of in-pixel MOSFETs on the dark signal
degradation of the sensor is relatively small. As a conclusion, the PPD and the TG
have a major effect on the dark signal increase particularly after radiation.
As is shown in the above result in Fig. 3-7, the PPD together with the TG
contributes more to the pixel dark signal as compared to in-pixel MOSFETs,
particularly after radiation. However, in order to further distinguish whether the
major dark signal source is the PPD or the TG, the charge transfer time and
integration time are manipulated. Fig. 3-9 shows a large relative increase in dark
signal induced by an extension of the TG charge transfer time. In order to minimize
the effects of the PPD, a very short integration time is used, and the relative increase
in dark signal is calculated, referring to the minimum charge transfer time of 20s
used in the measurement. A constant electrical stress exits when the TG gate is
biased and the transfer time is long. As a result, at the PPD-TG overlap region,
impact ionization will occur, generating more defects. Therefore, as shown in Fig.
3-9, by extending the TG pulse from 20s to 100ms, an approximate 100ms TG
72
pulse will induce almost 1000% relative increase in dark signal. By contrast, Fig.
3-10 shows a lower relative increase in dark signal caused by the PPD integration
time increase, referring to the minimum integration time of 250s used in the
measurement.
100000
Relative Dark Signal Increase (%)
10000
Integration Time: 5.05ms
PPD Length: 7.2m
TG Length: 1.0m
1000
PPD Width:12.6m
100
10
0.01 0.1 1 10 100 1000
Charge Transfer Time (ms)
Figure 3-9. Relative dark signal increase induced by TG charge transfer time increase with
an integration time of 5.05ms.
1000
Relative Dark Signal Increase (%)
Charge Transfer Time: 5ms

PPD Length: 7.2m
100 TG Length: 1.0m
PPD Width: 12.6m
10
0.1
0.1 1 10 100 1000 10000
Integration Time (ms)
Figure 3-10. Relative dark signal increase induced by a PPD integration time increase
with a TG charge transfer time of 5ms.
Comparing Fig. 3-9 and Fig. 3-10 shows that if the charge transfer time and
integration time are both extended from 10ms to 100ms, the induced relative
73
Chapter 3
increase in dark signal from the TG is around 200 times larger. Therefore, the TG
is a major dark signal source in a 4T pixel, while the dark signal contribution from
the PPD is relatively small.
3.3.3 Electrical Response of PPD and TG to Ionizing Radiation
According to previous studies, the 4T pixel dark signal is mainly attributed to

the TG and the PPD. A more detailed radiation study on the PPD and TG will be
presented in this section to further investigate their radiation behavior regarding
several aspects. This will be done by additional measurements, such as the
measurement of the PPD pinning voltage, the PPD and TG dimensional effect, and
the influence of the TG and RST signal modifications on the dark signal. These
measurements are performed over different sizes of TGs and PPDs, wherein each
variation is implemented over a small individual pixel array of 6x4 inside an entire
chip.
The pinning voltage is measured mainly to evaluate the post-radiation
degradation of the PPD bulk depletion region, which is mainly the depletion
region of the n-well/p-epi junction located in the bulk silicon, as illustrated in Fig.
3-8. The PPD surface depletion region of the p+/n-well junction may show a
different dimensional effect on the pixel dark signal than the 3T pixel because of
the pinning layer, referring to Fig. 2-13 in Chapter 2. This surface depletion region
is proportional to the PPD length. Therefore, as with the dark signal, the dark
electrons are measured with different PPD lengths and TG lengths.
Based on the results above, the TG can be considered as a major dark signal
source. The dark signal generated from the TG is sensitive to the variation in the
TG channel electric field, and channel defect generation when the TG length is
changing. Therefore, in order to evaluate the dark signal degradation mechanism
due to the TG length, the dark electrons are also measured with different TG
lengths. The dark electron measurements are performed at different integration
times in order to obtain multiple evaluation points. As mentioned in Section 3.3.1,
the voltage on the TG correlates with the pixel dark current. Moreover, the voltage
on the TG is set at the low TG clock signal value for most of the measurement
time. Therefore, the dark electrons are measured as a function of the low TG clock
signal value with radiation.
Fig. 3-11 shows the post-radiation output voltage of one pixel type as a function
of the low reset voltage, Vrst. This measurement can be used as a tool to extract
the PPD pinning voltage. The timing used for this PPD pinning voltage extraction
measurement is illustrated in Fig. 3-12. The low reset voltage is used to allow the
PPD to accept a certain amount of charge within the range of its pinning voltage.
First, a certain voltage is applied to the node of Vrst as shown in Fig. 3-2. At the
same time, the TG is turned on and simultaneously the gate of the RST is pulsed
with 3.3V to switch the RST on. By doing so, if the voltage applied to the Vrst is
smaller than the pinning voltage of the PPD, due to the potential difference a
74
certain amount of charges induced by the Vrst can flow into the PPD. Right after
that, the RST and the TG is turned off, and now there is an amount of charge
staying in the PPD. As a second step, when the Vrst is connected to Vdd, the
previous amount of charge can be read out with conventional timing. The pixel is
first selected by a row selector pulse during the readout. After that, the RST pulse
is applied to clean up the remaining charges in the FD node and to reset the FD
node to a certain reset level, while the TG is still off at this moment. When the FD
is finished resetting, the TG is then switched on to transfer the previous amount of
charges introduced by the Vrst to the FD node. As a result, the voltage level on the
FD node is lowered from the preceding reset level, which then can be readout
through an in-pixel source follower. As soon as the low reset voltage, Vrst, reaches
a value higher than the PPD pinning voltage, the PPD will no longer receive
charges from the Vrst and the output voltage of the sensor will remain low. The
knee voltage shown in Fig. 3-11 therefore is equal to the pinning voltage.
2.0
Before Radiation
30krad
Output Voltage (V)
1.5 60krad
TG Length: 2.0m
1.0 PPD Width: 12.6m
PPD Length: 7.2m
0.5
Pinning Voltage
0.0
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Low Reset Voltage (V)
Figure 3-11. Pinning voltage measurement with radiation doses.

Fig. 3-11 also shows a slight increase in the pinning voltage after radiation, with
almost no dependence on radiation dose. Therefore, neither the shallow surface
nor the bulk depletion regions of the PPD are largely expanded by the increasing
trapped charges in the surrounding STI oxide, which are induced by radiation [3.4].
The PPD depletion region is mainly determined by a lower depletion region of the
n-well/p-epi, which is deeper than the STI [3.9]. Thus, the radiation has less effect
on the pinning voltage. However, when the low reset voltage exceeds the pinning
voltage, the pixel output voltage slightly goes up with increased radiation doses.
This can be attributed to the radiation-induced PPD dark signal increase because
the Vrst (for these higher values than the pinning voltage) does not introduce any
extra charges in the PPD.
75
Chapter 3
Figure 3-12. Readout timing for the PPD pinning voltage measurement.
TG_1.0m_Before Radiation
2.0
TG_2.0m_Before Radaition
Output Voltage (V)
1.5 TG_1.0m_60krad
TG_1.5m_60krad
1.0 TG_2.0m_60krad
PPD Width: 12.6m
PPD Length: 7.2m
0.5
0.0
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Low Reset Voltage (V)
Figure 3-13. Pinning voltage measurements with the variation in TG length and radiation
doses.
76
Fig. 3-13 shows the effect of the TG length on the pinning voltage measurement
along with its dark signal before and after radiation. It proves that the PPD pinning
voltage is not correlated at all with the TG length since there is no variation in the
pinning voltage with the increase in TG length.
Moreover, after 60krad, the post-radiation output voltage is also not influenced
by the TG length when measured with a Vrst larger than the pinning voltage.
Hence, it can be further confirmed that the tiny post-radiation output voltage
increase originates mostly from the PPD dark signal. It also shows that the effect
of PPD on pixel dark signal is small after radiation.
50
40
Before Radiation
Dark Electrons (ke-)
30krad
30 60krad
Integration Time: 4240 ms
20 TG Length: 1.0m
PPD Width: 12.6m
Low Value of TG Clock: 0V
10
Room Temperature
0
0 2 4 6 8 10
Pinned Photodiode Length (m)
Figure 3-14. Effect of pinned photodiode length on dark electrons with radiation doses.
Besides the above results of the PPD pinning voltage and pixel output voltage,
in Fig. 3-14, the pixel dark signal measurement is shown for different sizes of
PPDs in order to study the post-radiation degradation of the PPD surface depletion
region. The dark signal is expressed in terms of electrons before and after radiation
with an integration time of 4240ms. In the PPD, the photodiode surface is pinned
by a highly doped p-layer. This layer eliminates the surface p-n junction depletion
region in 4T pixels that usually exists in 3T pixels. It is only due to this
perimeter-dependent surface depletion region that the surface recombination and
thermal generation in that region contribute so much to the photodiode dark
current [3.4]. Therefore, in 4T pixels this dimensional effect is greatly reduced.
Furthermore, based on the pinning voltage measurements, the chance is also small
that the 4T pixel dark signal increase can originate from a defect generated by the
depletion region expansion of the photodiode induced by the trapped charges. As
shown in Fig. 3-14, after radiation the pixel dark signal increases with radiation
doses due to the post-radiation dark signal increase mainly originating from the
77
Chapter 3
in-pixel MOSFETs, the contact area between the FD and the STI, and the overlap
region of the PPD-TG , but the influence of the PPD length effect is negligible.
Before Radiation
3.0
TG_1.0m
2.5 TG_1.5m
TG_2.0m
2.0 PPD Length: 7.2m
PPD Width: 12.6m
1.5 Low Value
of TG Clock: 0V
1.0
0.5
Room Temperature
0.0
0 5000 10000 15000 20000
Integration Time (ms)
Figure 3-15. Dark electrons with integration time for different TG lengths before
radiation.
Besides the above study on the dimensional effect of the PPD, an evaluation of
the dimensional effect on the TG is also of interest, since it is the major source of
pixel dark signal. Fig. 3-15 presents the pixel dark signal increase affected by the
TG length extension before radiation. A high electric field distribution exists at the
overlap region between the TG and the PPD [3.10]. As the TG length increases,
the probability also increases of having surface defects. Hence, the dark signal will
increase due to the thermal generation [3.5][3.10].
However, a longer TG contrarily also poses a lower electric field distribution
under the TG since the electric field, E, is inversely proportional to the distance, d,
when the electric potential, U, is constant, given by U=Ed. With a longer TG, the
dark current is mitigated. Thus, with the combination of these two effectsgate
length extension-induced defect generation and electric field reductionthe dark
electron in Fig. 3-15 does not proportionally increase with the TG length when
measured with different integration time. At the same time, the pre-radiation
increase in dark signal in Fig. 3-15 is mainly dominated by the TG length
extension-induced defect generation [3.10][3.18].
78
Contrary to Fig. 3-15, Fig. 3-16 shows that the post-radiation dark signal
decreases with the increase in TG length. Nevertheless, the radiation degradation
on the PPD and TG still gives an absolute increase in the dark signal of the pixel
due to a large amount of radiation-induced defect generation and trapped charges
in the STI oxide [3.17].
As mentioned above, a shorter TG length induces a higher electric field under
the TG. With a similar amount of post-radiation defect generation, a higher
electric field allows for a higher carrier generation-recombination probability if the
same number of defects is generated under the TG [3.18]. Thus, the relative
increase in dark signal before and after radiation in the case of a longer TG is
smaller than that of a shorter TG due to this electric field effect, as shown in Fig.
3-16. Meanwhile, the post-radiation dark signal is declining with the increasing
TG length due to a decrease in the electric field.
45
40
PPD Width: 12.6m
35
PPD Length: 7.2m

30 Low Value
25 of TG Clock: 0V
20
Before Radiation
15 30krad
10 60krad
5 Room Temperature
0
1.0 1.2 1.4 1.6 1.8 2.0
Transfer Gate Length (m)
Figure 3-16. Transfer gate length effect on dark electrons with radiation doses.
Moreover, the pixel dark signal is also related to the voltage on the TG [3.19].
Fig. 3-17 shows the dark signal variation as a function of the low value of the TG
clock for two different TG lengths before and after radiation. With a negative low
value of the TG clock, some defects under the TG can be filled by holes and thus
the dark current is reduced [3.20][3.21]. This phenomenon is more obvious with
increasing radiation doses due to more defect fillings.
79
Chapter 3
120
PPD Width: 12.6m
PPD Length: 7.2m
100
Integration
Dark Electrons (ke-) 80 Time: 4240ms TG_0.7m_Before Radiation
60
TG_0.7m_30krad
40 TG_2.0m_30krad
TG_0.7m_60krad
20 TG_2.0m_60krad
0
Room Temperature
-0.5 0.0 0.5 1.0
Low Value of Transfer Gate Clock (V)
Figure 3-17. Dark electrons with a low value of the transfer gate signal voltage before and
after radiation for TG lengths of 0.7m and 2.0m.
3.3.4 Radiation Effects on Quantum Efficiency
In the previous sections, the radiation effects on the electrical performance of the
in-pixel individual devices were evaluated, such as in-pixel MOSFETs, the PPD
and the TG. In this section, a radiation study will be performed by means of a
parameter measurement of the entire sensor output with a focus on the optical
performance. The important parameter for the image sensorthe quantum
efficiency (QE)is measured in this section. The measurements were performed
before and after radiation by taking an average of the pixel output over 20
continuous frames.
The quantum efficiency was measured by a monochromator with a 5nm
bandwidth of the wavelength. The number of input photons was measured by a
calibrated detector, which can provide an accurate value of the amount of incident
photons. The measurement set-up is used for the measurements performed on the
same pixel array before and after radiation. The measurement details have already
been described in Chapter 2. The quantum efficiency is defined as the pixel output
signal (expressed in electrons) over the number of input photons on a pixel. The
measurement was taken before radiation as well as after the radiation doses of
86krad and 109krad. As shown in Fig. 3-18, there is no significant degradation of
the quantum efficiency for most of the wavelengths after the radiation, while there
is a small reduction at the short wavelength region between 400nm and 550nm.
80
80 2
Pinned Photodiode area/Pixel: 53 m
70 Pixel Number: 5500
Quantum Efficiency (%)

60
50
40
30
20 Before Radiation
86krad
10
109krad
0
300 400 500 600 700 800 900 1000 1100
Wavelength (nm)
Figure 3-18. Quantum efficiency of a pinned photodiode of 4T CIS.
According to the previous discussion in Section 2.3 in Chapter 2, the quantum

efficiency can be affected by the change of the PPD capacitance or depletion region
width. However, this reason seems not possible regarding the preceding results of
the post-radiation pinning voltage as well as the wavelength-dependent QE
degradation. The radiation-induced interface trap generation at the surface of the
PPD with the oxide is also not a persuasive reason, since the newly-generated
interface traps can be filled by the abundant holes in the p+ pinning layer. Then, the
radiation-induced change in the transmission of the dielectric layers covered on top
of the PPD may be an explanation for the observed quantum efficiency degradation
after radiation [3.22][3.23][3.24], as shown in Fig. 3-18.
3.4 Conclusion
An overall analysis was presented in this chapter of both the ionizing radiation
effects on CMOS image sensors and the origin of pixel dark signal. The
measurements were performed on in-pixel elementary test structures and 20
different variations of pixel arrays.
The dark signal contribution from the PPD and TG is confirmed by the drain
leakage current measurement of an in-pixel reset transistor test structure integrated
with a PPD and TG. The measurement shows an increase in the drain leakage
current of the in-pixel reset transistor by raising the voltage applied to the TG node,
because the defect generation is enhanced at the overlap region of the PPD-TG by
the increasing TG voltage. After exposure to X-rays, the in-pixel MOSFET gate
oxide shows no degradation because the transistor threshold voltage does not shift.
As for a transistor with a regular layout, a large increase in the drain leakage
81
Chapter 3
current is observed after radiation. The trapped charges in the STI help to form a
lateral parasitic leakage path and enhance the leakage current of the transistor.
From the layout point of view, an ELT is shown to be more radiation-tolerant. It
also shows no radiation-induced leakage current degradation in pMOSFETs. This
is due to the lower probability of a lateral leakage path formation as well as a
larger distance between trapped charges and interface traps compared to
nMOSFETs.
In contrast with in-pixel MOSFETs, the PPD and the TG are found to be the
main dark signal contributors to the pixel before and after radiation. The large
increase in the mean dark signal induced by the on/off states of the TG confirms
that the PPD and TG are the main contributors, particularly after radiation. The TG
contributes most to the dark signal. This is confirmed by varying the integration
and charge transfer time.
Furthermore, the X-ray radiation shows no influence on the PPD pinning voltage
because the post-radiation depletion region does not expand much due to the
trapped charges. The radiation-induced dark signal increase from the PPD is small
and is not proportional to its perimeter in the presence of the pinning layer. The
effect of the TG size on the dark signal shows a different trend as a function of the
TG length before and after radiation. This is because the pre-radiation defect
creation induced by the TG extension is more dominant than the corresponding
electric field reduction, although this situation is reversed after radiation.
Moreover, with a negative low value of the TG clock, the holes play an important
role in reducing the dark current by filling in the defects. This function becomes
more effective after radiation.
In addition to the study of the radiation effects on the electrical performance of
the pixels, the post-radiation optical performance of the sensor is also briefly
presented in this chapter. The ionizing radiation-induced change in the
transmission of the dielectric layers covered on top of the PPD may be regarded as
the reason for the quantum efficiency attenuation over a certain wavelength range.
As for the future design of radiation-tolerant CMOS imagers, more enclosed
layouts can be adapted for in-pixel devices. Both the distance between the active
region and the STI, as well as the area of the active region touching the STI should
be reduced as much as possible. A p+ guard ring for the in-pixel device can also be
helpful.
Finally, compared to the 3T pixel, the 4T pixel shows a different
radiation-induced degradation performance. As an extra transistor in the 4T pixel,
the TG becomes the major source of dark signal instead of the PPD and the other
three in-pixel transistors both before and after radiation. However, most of the dark
signal in the 3T pixel is contributed by the photodiode due to the surface depletion
region degradation. The radiation degradation of the PPD in the 4T pixel is small
compared to the photodiode of the 3T pixel. As a result, there is less
radiation-induced dark signal degradation of the entire 4T pixel than the 3T pixel.
82
3.5 References
[3.1] M. Cohen and J. P. David, Radiation-induced dark current in CMOS

Active Pixel Sensors, IEEE Trans. Nucl. Sci., vol. 47, pp. 2485-2491,
2000.
[3.2] J. Bogaerts, B. Dierickx, G. Meynants and D. Uwaerts, Total dose and
displacement damage effects in a radiation-hardened CMOS APS, IEEE
[3.3] R. M. Guidash et al., A 0.6-m CMOS pinned photodiode color imager
[3.4] N. V. Loukianova et al., Leakage current modeling of test structures for
[3.5] X. Wang, Noise in Sub-Micron CMOS Image Sensors, PhD Thesis, ISBN:
9789081331647, pp. 45-69, 2008.
[3.6] F. Faccio et al., Total ionizing dose effects in shallow trench isolation
oxides, Microelectronics Reliability, vol. 48, pp. 1000-1007, 2008.
[3.7] H. Kwon, I. Kang, B. Park, J. Lee and S. Park, The analysis of dark
signals in the CMOS APS, IEEE Trans. Electron Devices, vol. 51, pp.
178-184, 2004.
[3.8] T. R. Oldham and F. B. McLean, Total ionizing dose effects in MOS
oxides and devices, IEEE Trans. Nucl. Sci., vol. 50, pp. 483-499, 2003.
[3.9] Sentaurus Device User Guide, pp. 47-144, 2006.
[3.10] X. Wang, P. R. Rao and A. J. P. Theuwissen, Fixed-pattern noise induced
by transimission gate in pinned 4T CMOS image sensor pixels,
ESSDERC 2007-Proceedings, art. no. 4430955, pp. 370-373, 2007.
[3.11] E. Takeda, C. Y. Yang and A. Miura-Hamada, Hot-Carrier Effects in MOS
Devices, San Diego, Academic Press, ISBN: 0126822409, pp. 49-90, 1995.
[3.12] F. Faccio and G. Cervelli, Radiation-induced edge effects in deep
submicron CMOS transistors, IEEE Trans. Nucl. Sci., vol. 52, pp.
2413-2420, 2005.
[3.13] O. Flament, C. Chabrerie, V. Ferlet-Cavrois and J. L. Leray, A
methodology to study lateral parasitic transistors in CMOS technologies,
IEEE Trans. Nucl. Sci., vol. 45, pp. 1385-1389, 1998.
[3.14] G. Anelli et al., Radiation tolerant VLSI circuits in standard deep
submicron CMOS technologies for the LHC experiments: practical design
aspects, IEEE Trans. Nucl. Sci., vol. 46, pp. 1690-1696, 1999.
[3.15] A. Baiano, J. Tan, R. Ishihara and K. Beenakker, Reliability analysis of
single grain Si TFTs using 2d simulation, ECS Trans., vol. 16, pp.
109-114, 2008.
[3.16] L. Gonella et al., Total ionizing dose effects in 130-nm commercial
CMOS technologies for HEP experiments, Nuclear Instruments and
Methods in Physics Research A, vol. 582, pp. 750-754, 2007.
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Chapter 3
[3.17] V. Goiffon, P. Magnan, O. Saint-P, F. Bernard and G. Rolland, Total dose

evaluation of deep submicron CMOS imaging technology through
elementary device and pixel array behavior analysis, IEEE Trans. Nucl.
Sci., vol. 55, pp. 3494-3501, 2008.
[3.18] F. Hurkx, H. L. Peek, J. W. Slotboom and R. Windgassen, Anomalous
behavior of surface leakage currents in heavily doped gated-diodes, IEEE
[3.19] B. Mheen, Y. J. Song and A. J. P. Theuwissen, Negative offset operation
of four-transistor CMOS image pixels for increased well capacity and
suppressed dark current, IEEE Electron Device Letters, vol. 29, pp.
347-349, 2008.
[3.20] N. S. Saks, A technique for suppressing dark current generated by
interface states in buried channel CCD imagers, IEEE Electron Device
Letters, vol. 1, pp. 131-133, 1980.
[3.21] A. J. P. Theuwissen, The hole role in solid-state imagers, IEEE Trans.
[3.22] V. Goiffon, M. Estribeau and P. Magnan, Overview of ionizing radiation
effects in image sensors fabricated in a deep-submicrometer CMOS
imaging technology, IEEE Trans. Electron Devices, vol. 56, pp.
2594-2601, 2009.
[3.23] P. Rao, X. Wang and A. J. P. Theuwissen, Degradation of CMOS image
sensors in deep-submicron technology due to -irradiation, Solid-State
Electronics, vol. 52, pp. 1407-1413, 2008.
[3.24] M. Fernandez-Rodriguez, C. Alvarado, A. Nunez and A. Alvarez-Herrero,
Modeling of absorption induced by space radiation on glass: A
two-variable function depending on radiation dose and post-irradiation
time, IEEE Trans. Nucl. Sci., vol. 53, pp. 2367-2375, 2006.
84
Pixel Bias Study and Microscopic View of Degradation for 4T Pixels under Radiation
Chapter 4
Pixel Bias Study and Microscopic View of
Degradation for 4T Pixels under Radiation
The macroscopic pixel dark signal is usually the main parameter used in
preceding studies to evaluate the ionizing radiation-induced degradation on a 4T
pixel without electrical bias during the radiation. Therefore, the object of this
chapter is twofold. Both the pixel bias effect and the microscopic view of pixel
degradation after radiation are investigated. In this chapter, a study on the
radiation-induced trapped charges and the pixel parameter degradation of a 4T
CMOS image sensor is first conducted by means of the pixel bias voltage
technique and trap-annealing, presented in Section 4.3.
Furthermore, in Section 4.4 the radiation-induced reduction in the trap energy
level by the Poole-Frenkel effect and trap-assisted tunneling in a 4T CMOS image
sensor are studied in terms of microscopic degradation using a per-pixel dark
current measurement. The Meyer-Neldel Relationship (MNR) between the
Arrhenius pre-exponential frequency factor and the activation energy is analyzed
for these sensors both before and after radiation. The trap capture cross section is
calculated using the MNR technique for each radiated pixel, showing
post-radiation expansion, which consequently increases the pixel dark current.
Section 4.5 presents conclusions to the results obtained in this chapter, which can
be used to understand the micro-parameter degradation mechanism after X-ray
radiation and the pixel bias condition effects on the degradation.
4.1 Research Motivation
The increase in non-biased radiation-induced dark current is a widely-studied

subject in previous work with respect to the application of CMOS image sensors in
a radiation environment [4.1][4.2]. However, the effect that the pixel bias
condition during radiation has on sensor degradation is very important because the
sensors are mostly in working mode when applied in a harsh radiation
environment, which serves as the first motivation of this chapter. The
radiation-induced trapped charges in the oxide are also highly dependent on the
pixel bias conditions [4.3]. Therefore, this chapter will present a study on the pixel
bias condition effect of the 4T imager radiation degradation by analyzing the
radiation-induced trapped charges and interface traps. The effect of post-radiation
annealing of the sensor at room temperature and at 85C is investigated as well,
since the annealing can provide insight into the performance of trapped charges
and interface traps. Moreover, the annealing of the radiated 4T pixel has not been
85
Chapter 4
substantially studied because the annealing effect highly depends on the specific
fabrication process, pixel design and radiation setting [4.2][4.4].
The previous work on the radiation effects of the 4T pixel has focused mostly on
macro-pixel parameter degradation, such as dark current and its histogram tail
with hot pixels [4.1][4.2][4.5]. Little attention has been paid to identifying the
microscopic composition of high dark current in terms of traps inside the pixels.
Investigating the sensors microscopic trap location in the bandgap and its capture
cross section is important because these micro-pixel parameters influence the
ultimate macro-pixel parameter degradation after radiation. Particularly for a 4T
pixel, there is a high electric field at the pinned photodiode-transfer gate (PPD-TG)
region where an extra microscopic degradation mechanism can be introduced after
radiation [4.1]. Therefore, as a second motivation of this chapter, a study of the
post-radiation per-pixel microscopic parameter degradation is presented. The
results can be used to determine the dependence of the macroscopic dark current
on the radiation-induced microscopic trap defects.
4.2 Measurement Setting
In order to evaluate the pixel bias effect on the radiation-induced degradation in

the same measurement environment in terms of temperature, radiation sources and
measurement set-up, three sensors were plugged into one test board and were
irradiated to 5.76krad and 8krad simultaneously by X-rays with an average energy
of 46.2keV. The dose rate was 0.32rad/s. The pixel bias voltage is applied to Vrst
and Vdd, referring to the pixel schematic in Fig. 3-2 in Chapter 3. A different bias
voltage was applied to each sensor during the radiation.
Fig. 4-1 demonstrates the set-up used for the multiple-sensor measurement in
this chapter. The set-up consisted of a sensor board (S0, S1, and S2), three
controlling boards with FPGAs, a camera link multiplexer and a PC. The set-up
was also able to synchronize the measurement with the radiation source, and the
data could be collected from three samples in series and in real-time at room
temperature.
During the measurements performed after the radiation experiments, the
temperature was increased from 303K to 345K in increments of 3K. The high
measurement temperature had very little influence over the annealing of the
radiated devices, since the maximum total measurement time for 3 sensors was as
short as 60 sec. The annealing was implemented at 85C without electrical bias for
75 hours and for 150 hours.
In addition, the sensors measured in this chapter are commercial samples
provided by a professional CMOS imager sensor supplier, CMOSIS.
86
(a)
(b)
Figure 4-1. Multiple-sensor measurement set-up: (a) PCB boards, and (b) a schematic of
the whole measurement set-up.
87
Chapter 4
4.3 Radiation Degradation with 4T Pixel Bias Condition and Trapped Charges
When the sensor is biased during the radiation, the positive TG pulse strengthens
the generation of the surface defects in the transfer-channel under the TG and at
the PPD-TG region with a high electric field. As a result, more surface generation
current from the TG region contributes to the post-radiation pixel dark signal
compared to the non-biased case. Moreover, with the pixel bias during the
radiation, the charge-trapping at the lateral shallow trench isolation oxide (STI)
surrounding the in-pixel device active region is enhanced due to the electrical
potential. The enhanced charge trapping ultimately leads to a larger pixel dark
signal as well. The details of the pixel bias condition effect during the radiation
will be discussed further in the following paragraphs and demonstrated with
measurement results.
240
220
200
180
Dark Signal (DN)
160
140
120
100 Room Temperature
80 Integration Time: 1.5s
Bias Voltage
60
During Radiation: 3.0 V
40
0 1 2 3 4 5 6 7 8 9 10 11 12
Figure 4-2. Dark signal vs. radiation dose measured during the radiation and 36 hours
later.
Fig. 4-2 shows the dark signal increasing with the radiation dose. The
measurements were taken after each radiation dose increment of 0.384krad while
at doses of 5.76krad and 8krad: the dark signal was measured two times, right after
the radiation and after 36 hours of room temperature annealing. During the
radiation, the sensor was biased at 3V, although during the room temperature
annealing, the sensor was not electrically biased. Therefore, Fig. 4-2 shows a big
drop in the dark signal at the 5.76krad dose and the 8krad dose when measured 36
hours after the radiation. This drop can firstly be explained by the fact that some of
the positive trapped charges are compensated by the negatively charged interface
traps directly after the radiation. The post-radiation interface trap generation takes
place more slowly than the radiation-induced hole trapping in the STI, which
88
follows a slower time-scale [4.3]. Hence, when the X-ray radiation is finished,
some of the trapped charges generated during the radiation are latterly recombined
or compensated with negative interface traps. Since the number of trapped charges
decreases after radiation due to the interface trap effect, the dark signal, which is
induced by the post-radiation trapped charges [4.2], drops when 36 hours later
measured. On the other hand, with a positive 3V-bias, most of the
radiation-induced holes can hop to the Si-SiO 2 interface. That is where some
trapped holes induce shallow trap levels. When settled at room temperature for 36
hours, some electrons from the substrate can tunnel to the radiation-induced
shallow trap levels and neutralize them [4.3][4.6][4.7]. Thus, the post-radiation
dark signal is annealed down at room temperature. For these two reasons, the drop
of the dark signal at 5.76krad dose and 8krad dose is noticeable, as shown in Fig.
4-2.
80
Pixel Bias_2.4V
Relative Increase in Dark Signal (%)
Pixel Bias_3.0V
60 Pixel Bias_3.3V
Integration Time: 1.5s
40
20
0 Room Temperature
1 2 3 4
Figure 4-3. Pixel bias voltage effect on the relative dark signal increase with radiation
doses.
The effect of the electric field on the post-radiation trapped charges in the oxide
can be investigated by taking measurements at different pixel bias conditions
during the radiation. Fig. 4-3 shows the relative increase in the post-radiation dark
signal with different pixel bias voltages. Three different sensors were respectively
biased with 2.4V, 3.0V and 3.3V during the radiation, while being measured after
each 0.384krad radiation. The measurement time was 30 sec, which is short
enough to eliminate annealing effects from the measurement results. Fig. 4-3
shows that a smaller bias voltage induces a lower relative increase in the dark
signal, while the difference between 3.0V and 3.3V is minor which may be due to
the approximately equal FD node bias voltage in these two cases both determined
by the gate voltage of the RST together with a drop of the RST threshold voltage.
89
Chapter 4
The electric field distribution within the pixel is strengthened when a large bias
voltage is applied. When the pixel is biased with a larger voltage and is radiated,
there are more holes that can escape the initial electron-hole recombination. As a
result, a larger number of holes are trapped in the same volume of oxide with a
larger bias voltage [4.3][4.8]. These trapped charges not only induce lateral
parasitic leakage paths within an individual device but also form an inversion layer
beneath the STI to degrade the isolation function of the STI and to worsen the
inter-device leakage paths in the pixel [4.2]. Thus, the dark signal of the sensor
ultimately becomes relatively larger due to the larger number of electric-field
enhanced trapped charges in the STI oxide caused by a larger bias voltage.
Some hydrogen may be present in the oxide due to process necessity. According
to [4.3], the radiation-induced holes can hop through the oxide, which
simultaneously frees the hydrogen in the oxide to become protons. The protons
then undergo a transport. When the protons reach the Si-SiO 2 , they might break
the Si-H bonds and might form an interface trap. Therefore, a larger positive bias
during the radiation may move more protons to the oxide interface and create more
interface traps. As mentioned above, the negative interface trap can compensate
the positive trapped charges, which can recover the pixel dark signal. Hence, on
one hand, a larger pixel bias can induce more trapped positive charges in the STI
during the radiation, which can further increase the pixel dark signal. On the other
hand, more negatively charged interface traps due to a larger bias can also greatly
decrease the dark signal through the recombination with trapped charge. If the two
aforementioned effects take place simultaneously, a large relative increase in dark
signal due to a larger bias will not be clearly observed. However, Fig. 4-3 still
shows that during the radiation a larger bias can induce a clear, large relative
increase in the dark signal. Therefore, the trapped charges generated during the
radiation by a certain pixel bias are not diminished by the interface traps. Fig. 4-3
accordingly illustrates that the interface trap build-up does follow a slower
time-scale than that of trapped charges. Moreover, during the radiation the dark
signal may initially be dominated by the generation of positive trapped charges.
As discussed above, the pixel bias voltage during the radiation can affect
radiation-induced trapped charges and interface trap generation, which causes the
sensor dark signal and activation energy to degrade [4.1]. The lowering of the
activation energy after radiation is a mutual impact factor for the increase in the
dark signal, which will be discussed in detail in the following section. In the
meantime, the pixel supply voltage effect on the trap level of a radiated sensor is
also of interest.
Fig. 4-4 shows the mean activation energy of a pixel array as a function of the
pixel supply voltage before and after radiation. Here the pixel was biased with 3V
during the radiation, while it was measured with 3V and 2.7V for the pixel supply
voltage during the measurements.
It can be seen that before radiation there is almost no change in the mean
activation energy with the pixel supply voltage during test. However, after
90
radiation the activation energy difference between 2.7V and 3.0V becomes larger.
This difference is probably due to the increased shallow trap level generation in
the band gap induced by the radiation. When a larger positive voltage is applied on
the pixel, the band gap at the Si-SiO 2 surface bends more downwards and the
energy difference between the valence band (E V ) and Fermi level (E F ) grows [4.6].
More radiation-induced shallow defects are filled and then the dark signal
increases exponentially due to the carrier densitys exponential dependence on the
energy difference of (E F -E V ) [4.6]. As a result, the activation energy measured as a
derivation of the dark current lowers with a large pixel supply voltage.
0.70
0.65
Mean Activation Energy (eV)
0.60
0.55
0.50
0.45
Before Radiation
0.40 5.76krad
8krad Integration Time: 1s
0.35
2.6 2.7 2.8 2.9 3.0 3.1
Pixel Supply Voltage (V)
Figure 4-4. Mean activation energy with pixel supply voltage during test, measured before
and after radiation.
The preceding paragraphs discussed the radiation-induced degradation of the
sensor by the oxide trapped charge and the interface trap generation. Annealing is
another tool to resolve the role of the trapped charge and interface traps in a
radiated sensor.
Fig. 4-5 shows the annealing effect on the dark random noise of a radiated
sensor after an 8krad dose. The measurement was taken after 75 hours and 150
hours, respectively, of isothermal annealing at 85oC. The dark random noise
histogram is analyzed here because the noise histogram tail of the sensor, as
indicated in Fig. 4-5, refers to the 1/f noise and the RTS (Random Telegraph
Signal) noise performance of the sensor [4.9]. The 1/f noise in radiated MOS
devices is related to the oxide trap neutralization through charge exchange and the
interface trap trapping and de-trapping [4.7]. Meanwhile, the dark random noise of
4T imagers is deduced from the dark signal measurement. The dark signal
variation of a radiated sensor is correlated with the trapped charges and interface
traps in the STI oxide. Therefore, when annealing is studied for a radiated sensor,
91
Chapter 4
the variation in the tail of the dark random noise histogram can be used to
investigate the annealing effect on the oxide trapped charges and interface traps.
Fig. 4-5 shows that the tail of the dark random noise histogram shrinks and the
pixel dark random noise also becomes smaller after annealing. In addition, the
discrete pixels with a very large noise value between 23 DN and 35 DN disappear.
Therefore, after a 75-hour annealing, many trapped charges in the oxide have been
annealed out. They are neutralized through charge exchange and thermal
excitation, which involve a recombination process with the electron tunnelling
from the valence band levels of the Si substrate, according to [4.3][4.7][4.10].
8krad
100 After 75h-Annealing
Number of Pixel (#)
After 150h-Annealing
Histogram Tail
Integration Time: 1s
10
o
Temperature: 30 C
-5 0 5 10 15 20 25 30 35 40 45
Dark Random Noise (DN)
Figure 4-5. Annealing of the dark random noise for 75 hours and 150 hours at 85oC on a
radiated sensor (biased with 3.3V during radiation).
However, when the sensor is further annealed for another 75 hours, the
histogram tail after a 150-hour annealing shows yet another small increase. Some
pixels with a very large dark random noise reappear. This effect can be explained
as follows: most of the positive trapped charges have been annealed after a
150-hour annealing, while most of the radiation-induced interface traps still
remain because the annealing temperature is low [4.2][4.3][4.4]. Directly after
radiation, some of the negative interface traps can already be compensated by the
positive trapped charge near the Si-SiO 2 interface. However, when most of the
positive trapped charges have been annealed out, the net number of interface traps
increases, unlike after a 75-hour annealing. Thus, the interface trap generation
causes the dark random noise to rebound by interface trapping and de-trapping,
which results in some pixels showing a large dark random noise again.
92
4.4 Microscopic Degradation Mechanism of Ionizing Radiation
The dark current, which is correlated with the activation energy, is given by
[4.11]:
I = Dexp(-Ea/k B T) , (4-1)
where I is the dark current, D is the pre-exponential frequency factor, Ea is the
activation energy, and k B T is the product of Boltzmanns constant and absolute
temperature [4.11]. Thus, the per-pixel activation energy can be inferred from the
dark current measurements. Based on the per-pixel activation energy, the
Meyer-Neldel relationship and the trap capture cross section can be deduced [4.12].
In this way, the radiation-induced degradation mechanism can be viewed
microscopically from the macro parameter, i.e. dark current.
Before Radiation
1000
5.76krad
Number of Pixels (#)
Integration Time:
1s
100
10
0.0 0.2 0.4 0.6 0.8 1.0

Activation Energy (eV)
Figure 4-6. Activation energy histogram of pixels before and after radiation (biased with
3.3V during radiation).
Fig. 4-6 shows the activation energy histogram before and after radiation. The
histogram peak drops significantly after radiation, shifting from 0.66eV to 0.52eV.
This large variation was unexpected and indicates that another damage mechanism
might exist, since the dark-signal activation energy of radiated sensors should be
around 0.66eV if the conventional thermal generation mechanism is still prevalent
[4.11]. Dark current sources in 4T pixels may consist of diffusion current, SRH
generation current at depleted regions, trap-assisted tunneling current, and gate
leakage current from parasitic field-oxide transistors. Since the post-radiation
activation energy diminishes, the contribution from the diffusion current is small.
The shallow trench isolation oxide together with its adjacent active regions can be
regarded as field-oxide transistors. The gate leakage current from the
direct-tunneling through the STI can thus be neglected due to the significant oxide
93
Chapter 4
thickness. In terms of the highly doped pinning layer in the PPD and the overlap
region of the PPD-TG, the tunneling and the electric field-related Poole-Frenkel
effect can therefore play an important role in the radiated 4T pixel [4.6][4.13]. The
potential barrier reduction, E in eV, induced by the Poole-Frenkel effect for
thermal emission of a trap level in the bandgap, is given by (qE/)1/2, where q is
the electron charge, E is the electric field, approximately equals to 3.14, and is
the dynamic permittivity [4.11]. In terms of device simulations of the PPD-TG
region, the 4T pixel in this work presents a strong electric field around
4.67105V/cm, which can yield an activation energy reduction of E0.15eV.
Moreover, the trap-assisted tunneling can also play an important role in lowering
the activation energy by enhancing thermal emission [4.11]. The post-radiation
histogram tail also reaches very low activation energies, thus the radiation induces
more hot pixels with a large dark current.
Figure 4-7. Per-pixel dark current pre-exponential factor, D, as a function of activation

energy showing the MNR before and after radiation (biased with 3.3V during radiation).
According to [4.14], the pre-exponential factor D in the previous dark current
equation can be written as:
D = D 0 exp(Ea/Emn) , (4-2)
where Emn is the Meyer-Neldel energy and D 0 is the true pre-exponential factor.
Thus, the per-pixel MNR relationship can be obtained from the activation energy
histogram above. The MNR is illustrated in Fig. 4-7 by a linear distribution of the
ln(D) vs. the activation energy from each pixel before and after radiation. The
slope signifies the Emn. The radiation has almost no influence on the MNR since
the slope changes very slightly. The Emn corresponds to the isokinetic temperature
of pixels, Tiso, at which the pixel dark current generation only depends on D 0 .
Thus, the MNR relationship is almost consistent before and after radiation, which
94
is as good as can be expected. In addition, as discussed above, the dark current, I,

is a function of the pre-exponential factor, D and the activation energy, Ea. In the
meantime, Fig. 4-7 shows no variation of the relationship between the dark current
pre-exponential factor and the activation energy before and after radiation.
Therefore, referring to Fig. 4-7, the macroscopic pixel dark signal degradation
after radiation is mainly induced by the post-radiation lowering of the activation
energy based on Eq. (4-1).
When the aforementioned D 0 is fed into the SRH recombination model, the
calculated trap capture cross section presents an activation energy dependence
both before and after radiation [4.14][4.15], as shown in Fig. 4-8. After radiation
some of the pixels exhibit less activation energy while the capture cross section of
all the pixels becomes one order of magnitude larger [4.16]. Thus, the radiation
introduces some trap defects with a mean energy level around 0.52eV and a
capture cross section of 1.12E-15cm2. The capture cross section (cm2) is a measure
of the proximity to a trap center location at which the carriers are able to be
captured. Thus, a larger capture cross section means both a higher generation
current and carrier capture probability for a certain trap energy level. The lowering
of the activation energy together with the capture cross section increase can even
enhance the pixel generation current increase. Therefore, Fig. 4-8 can be used to
understand the microscopic determinants behind the macroscopic sensor
degradation caused by the ionizing radiation.
Figure 4-8. Per-pixel trap capture cross section before and after radiation (biased with
3.3V during radiation).
As a further study based on Fig. 4-8, two pixels are selected from those pixels
shown in Fig. 4-8, and the dark signal performance of these two pixels are studied
before and after radiation. Pixel 1 has a pre-radiation activation energy of 0.67eV
95
Chapter 4
and a pre-radiation capture cross section of 1.12E-16cm2.The post-radiation

activation energy of pixel 1 slightly lowers to 0.65eV and its post-radiation capture
cross section increases to 1.17E-15cm2. Pixel 2 has a pre-radiation activation
energy of 0.66eV and a pre-radiation capture cross section of 1.45E-16cm2.
However, pixel 2 has a post-radiation activation energy of 0.21eV while its
post-radiation capture cross section becomes 9.82E-16cm2. As discussed above,
the capture cross section of both two pixels approximately becomes one order of
magnitude larger after radiation, while the radiation-induced lowering of the
activation energy of pixel 2 is more significant than that of pixel 1. As derived
from Fig. 4-8, Fig. 4-9 shows that the radiation-induced dark signal increase of
pixel 2 is larger than that of pixel 1. The post-radiation dark signal increase of
pixel 1 is mainly influenced by the increase in capture cross section, instead of the
activation energy reduction, since the post-radiation decrease in the activation
energy of pixel 1 is slight. Therefore, it is further confirmed that the macro pixel
dark signal degradation can be determined and enhanced by the microscopic
degradation mechanisms after radiation, in terms of the lowering of activation
energy and the increase in capture cross section.
350
Pixel_1
Pixel_2
300
o
Temperature: 30 C
250
Dark Signal (DN)
Integration Time: 1s
200
150
100
0 1 2 3 4 5 6
Figure 4-9. Dark signal performance of two pixels before and after radiation, induced by
different extents of the post-radiation reduction in activation energy and the same level of
increase in post-radiation trap capture cross section (biased with 3.3V during radiation).
4.5 Conclusion
In this chapter, measurements with different pixel bias conditions were

performed and the derivation of the microscopic degradation mechanism was dealt
with based on the radiation-induced dark signal increase.
96
First, it has been found that a larger pixel bias voltage during radiation can lead
to more severe dark signal degradation. The larger pixel bias can more effectively
halt the electron-hole pair recombination process, and consequently the initial
fraction of radiation-induced trapped charges in the oxide can be higher than it
would be without the bias. It is this amount of radiation-induced trapped charge in
the STI oxide that makes the dark signal rise after radiation. A larger pixel supply
voltage for the post-radiation measurement also shows an effect on the activation
energy lowering due to the band-gap bending and the corresponding dark signal
increase induced by filling the shallow defects. Moreover, the negative interface
trap compensation and the following shallow trap neutralization through the
electron tunnelling from the substrate at room temperature can quickly lower the
dark signal 36 hours after the radiation. A high temperature annealing at 85oC for
75 hours effectively removes many radiation-induced trapped charges. However,
after a 150-hour annealing, the dark random noise increases again because most of
the trapped charges have been annealed out, after which the increasing
non-annealed interface traps try to rebound the dark random noise.
Therefore, the aforementioned study can provide an overview of how the 4T
CMOS image sensor degradation is influenced by its working mode in a radiation
environment. A lower pixel voltage can mitigate the radiation damage. An
effective annealing at 85oC for 75 hours can be proposed for the degraded sensor
to recover, while an over-annealing may cause the sensor to degrade again.
Furthermore, this chapter analyzed two aspects of the microscopic radiation
degradation mechanism: the enhanced dark current increase via the post-radiation
activation energy reduction due to the Poole-Frenkel effect and trap-assisted
tunneling, and the radiation effects on the trap capture cross-section. The MNR
and Emn energy can be inferred from the calculation of the above per-pixel
activation energy. They are not affected by the radiation since the pixel dark
current only depends on the true pre-exponential factor at the same isokinetic
temperature. Consequently, the results from this section can provide an insight into
the radiation-induced degradation from the microscopic perspective, in addition to
the macro pixel dark signal.
4.6 References
[4.1] P. Ramachandra Rao, Charge-Transfer CMOS Image Sensors: Device and

Radiation Aspects, PhD Thesis, ISBN: 9789081331661, pp. 64-107, 2009.
[4.2] V. Goiffon, C. Virmontois, P. Magnan, S. Girard and P. Paillet, Analysis
of total dose induced dark current in CMOS image sensors from interface
state and trapped charge density measurements, IEEE Trans. Nucl. Sci.,
vol. 57, pp.3087-3094, 2010.
[4.3] T. R. Oldham and F. B. McLean, Total ionizing dose effects in MOS
oxides and devices, IEEE Trans. Nucl. Sci., vol. 50, pp. 483-499, 2003.
97
Chapter 4
[4.4] A. J. P. Theuwissen, Influence of terrestrial cosmic rays on the reliability

of CCD image sensors-part 2: experiments at elevated temperature, IEEE
[4.5] M. Innocent, A radiation tolerant 4T pixel for space applications, Proc.
of 2009 International Image Sensor workshop, Norway, 2009.
[4.7] D. M. Fleetwood et al., Unified model of hole trapping, 1/f noise, and
thermally stimulated current in MOS devices, IEEE Trans. Nucl. Sci. vol.
49, pp. 2674-2683, 2002.
[4.8] T. R. Oldham and J. M. McGarrity, Comparison of Co60 response and 10
keV X-ray response in MOS capacitors, IEEE Trans. Nucl. Sci. vol.
NS-30, pp. 4377-4381, 1983.
[4.9] X. Wang, Noise in Sub-Micron CMOS Image Sensors, PhD Thesis, ISBN:
9789081331647, pp. 74-108, 2008.
[4.10] T. R. Oldham, A. J. Lelis and F. B. McLean, Spatial dependence of
trapped holes determined from tunneling analysis and measured
annealing, IEEE Trans. Nucl. Sci., vol. NS-33, pp. 1203-1209, 1986.
[4.11] J. R. Srour and R. A. Hartmann, Enhanced displacement damage
effectiveness in irradiated silicon devices, IEEE Trans. Nucl. Sci. vol. 36,
pp. 1825-1839, 1989.
[4.12] R. Metselaar and G. Oversluizen, The Meyer-Neldel rule in
semiconductors, Journal of Solid State Chemistry, vol. 55, pp. 320-326,
1984.
[4.13] J. Frenkel, On pre-breakdown phenomena in insulators and electronic
semi-conductors, Phys. Rev. vol. 54, pp. 647-648, 1938.
[4.14] R. Widenhorn, L. Mundermann, A. Rest and E. Bodegom, Meyer-Neldel
rule for dark current in charge-coupled devices, J. Appl. Phys., vol. 89, pp.
8179-8182, 2001.
[4.15] R. Widenhorn et al., Temperature dependence of dark current in a CCD,
Proc. SPIE, vol. 4669, pp. 193-201, 2002.
[4.16] S. Kaschieva et.al., Defect formation in 18MeV electron irradiated MOS
structure, Bulg. J. Phys., vol. 33, pp. 48-54, 2006.
98
Radiation-Hardened 4T CMOS Image Sensor Pixel Design
Chapter 5
Radiation-Hardened 4T CMOS Image Sensor
Pixel Design
In this chapter, different techniques to realize the radiation-hardening-by-design

(RHBD) of 4T CMOS image sensors (CIS) are proposed based on the ionizing
radiation-induced degradation mechanisms discussed in the preceding chapters.
The ionizing radiation effects on radiation-hardened 4T CMOS imagers are also
briefly discussed here. The implementation of a radiation-tolerant sensor by means
of the RHBD, which is proposed in Section 5.1, is highly motivated because the
low-cost feature of CMOS image sensors can be maintained without the need for
converting to a high-cost radiation tolerant technology. The design and the
architecture of a radiation-hardened 4T CMOS image sensor are described in
Section 5.2 where the measurement set-up is also introduced. Section 5.3
illustrates the performance response of the 4T pixel to the total ionizing dose with
different radiation-hardened techniques. Lastly, the TG charge transfer time is
manipulated to study the post-radiation performance of the radiation-hardened 4T
CMOS image sensor pixels briefly.
However, a radiation-hardened pixel with RHBD techniques also needs to pay a
price. It is expressed in terms of a loss in spectral response, since the RHBD
techniques occupy extra silicon within a pixel area which shrinks the photon
sensitive region or fill factor.
5.1 Radiation-Hardening-by-Design of CMOS Image Sensors
The tolerance of CMOS image sensors to the radiation degradation is of a great

concern when they are applied in a harsh radiation environment [5.1][5.2]. In fact,
the study of the radiation-hardness of CMOS integrated circuits was developed in
parallel with the investigation of the radiation effects on MOS devices in terms of
the process technology [5.3] and the physical design [5.4].
The main degradation caused by the ionizing radiation is the trapped charges in
the oxide and the interface trap build-up at the Si-SiO 2 interface [5.5]. With
respect to process improvement, the significant reduction in the gate oxide
thickness below 12nm can considerably lower the number of trapped charges and
consequently abate the ionizing radiation effects [5.6]. The oxide quality is also
critical for the radiation-induced degradation so that the temperature and the
ambient of gasses during the oxide growth directly determine the radiation
hardness of MOS oxides. The use of high temperature processing does not have a
positive effect on the number of defects induced by the radiation [5.7].
99
Chapter 5
Furthermore, some process steps, such as implantation, lithography and

reactive-ion etching can also affect the radiation-hardness of the MOS devices
[5.7][5.8]. However, in order to realize the radiation tolerance through CMOS
technology progress, a great deal of efforts and investment is necessary to
optimize and stabilize the whole process flow. As a result, the radiation-hardened
CMOS image sensor fabricated with an optimized CMOS technology can no
longer remain low cost. Yet, it is exactly the low-cost advantage that makes CMOS
image sensors the superior choice to CCDs.
Therefore, the method of radiation-hardening-by-design becomes the favorable
approach for designing the radiation-tolerant 4T CMOS image sensor. The RHBD
provides countermeasures in terms of the pixel physical design that are based on
the understanding of ionizing-radiation induced degradation mechanisms, such as
the parasitic leakage path, the surface leakage current increase, etc. What is more,
the RHBD does not need to change the process, and still can obey the design rules.
Consequently, the RHBD is cost-friendly for radiation-hardened CMOS image
sensor design. Furthermore, the RHBD techniques obtained from a certain
technology can be applicable to CMOS image sensors fabricated in another
technology since it only concerns the physical design.
In this chapter, the effectiveness of different design techniques for
radiation-hardened 4T CMOS image sensors is shown with measurement results.
The radiation tolerance is demonstrated by being compared to a reference pixel
array without protection techniques against radiation damage. This work can also
provide some guidelines for designing a radiation tolerant 4T CMOS imager in
another technology. The short study of the radiation effects on a
radiation-hardened pixel in this chapter can also initiate some ideas on how the
radiation hardness of 4T CMOS image sensors can be further strengthened in the
future.
Last but not least, a trade-off of the radiation-hardening-by-design techniques is
also shown in this chapter as a decrease in the spectral response. It can help to
make a balanced decision when both the optical performance and the electrical
performance are critical for a radiation-hardened CMOS image sensor.
5.2 Sensor Design and Measurement Set-up
A CMOS image sensor was designed with 40 different pixel arrays, including a
reference pixel array, and was fabricated in a standard 0.18m CIS technology in
order to evaluate the performance of different radiation-hardened techniques. A
uniform pixel pitch of 15m is adopted. Each radiation-hardened pixel type has an
array of 16x16, and thus the size of the entire pixel array is 128x80. Fig. 5-1 shows
the sensor architecture together with a schematic of the measurement set-up. This
radiation-hardened CMOS image sensor consists of a 4T pixel array, the
column/row driver array, a current source array, the sample-and-hold circuitries, a
programmable timing-and-controlling block, a gray counter and an output buffer.
100
All the controlling signals, including the bias voltages, are generated on-chip.
Biasing
Current Source Array
Circuitry
Row Addressing
Chip
RST<n>, Architecture
Row 128x80 Pixel Array
TG<n>, Driver
RS<n>
Row
Controlling
Signal
Read_R<n>
Programmable
Controlling
Block Read_S <n> Sample and Hold (S&H) Output
Array Buffer
Column
Out_Enable <n>
Analog Output
Gray Addressing
Counter Column Driver
Col <n>
Bus_Reset <n>
Programming Analog to Digital

FPGA
Converter
Frame Grabber
PCB Board
LabView & PC
Figure 5-1. Architecture of a radiation-hardened CMOS image sensor and a schematic of

the measurement set-up.
Here, RST<n> is the reset pulse for the rows, TG<n> is the charge transfer pulse
of the transfer gate for the rows, RS<n> is the row selector pulse for the rows,
Read_R<n> is the signal to readout the reset level, Read_S<n> is the signal to
readout the signal level, col<n> is the pulse to address the column bus through the
column driver, Bus_Reset<n> is the pulse to clean up the column readout bus, and
101
Chapter 5
Out_Enable<n> is the signal to enable the analog output to be read out. A PCB
board is designed to deploy the FPGA to program the controlling block so that the
timing is generated on-chip to read out the sensor analog output. An off-chip
analog-to-digital converter (ADC) is used to digitalize the analog signal so that a
LabView software tool can collect the pixel data through a frame grabber. The
correlated double sampling (CDS) operation is performed off-chip also by the
LabView software tool. For each measurement, an average of 20 continuous
frames is taken.
Fig. 5-2 shows the microphotography of the radiation-hardened CMOS image
sensor test chip implemented based on the chip architecture described in Fig. 5-1.
Figure 5-2. Microphotograph of the radiation-hardened 4T CMOS image sensor test chip.
In order to design a radiation-hardened 4T pixel and offer a dedicated solution, it
is first necessary to understand the basic radiation-induced degradation on the 4T
pixel. A 4T pixel consists of a transfer gate (TG), a pinned photodiode (PPD), a
reset transistor (RST), a source follower (SF) and a row selector (RS), as shown in
Fig. 5-3. The blue dash lines in Fig. 5-3 (a) show the possible leakage paths in the
in-pixel devices in the 4T pixel caused by the ionizing radiation, which is derived
from the analysis in Chapter 2. The leakage path can consist of the surface leakage
current along the sidewall of the STI, the high electric-field enhanced thermal
generation current at the overlap region of PPD-TG, and the parasitic leakage path
parallel with the in-pixel transistors. Therefore, during the design of the
radiation-hardened pixels in this chapter, several physical design parameters of the
4T pixel were optimized in order to circumvent the post-radiation increase in pixel
dark signal, which is schematically illustrated in Fig. 5-3 (b). The distance
between the PPD and the STI was optimized for some pixels. In addition, the
overlap area between the PPD and the TG was also modified. The pixels with
different TG length were studied as well. Moreover, for some pixels, an extra
poly-Si gate was deposited next to the floating diffusion node (FD). As for the
in-pixel transistors, the layout design techniques of the enclosed gate and the p+
102
guard ring were applied.
(a)
Photodiode to High Transfer Gate Length Extra Gate

STI Electric Field
Gate Oxide
Pinned Photodiode
STI p+ n+ n+ STI
n-well Floating
Diffusion Node Surface
Inversion Generation
Depletion Region p-epi
p-sub
Shallow Trench Hole

Isolation Oxide (STI) Interface Trap
(b)
Figure 5-3. 4T pixel schematic: (a) illustration of the leakage path inside the pixel, and (b)
cross section with the radiation-hardened optimizations indicated.
As for the radiation experiments, the sensors were radiated to 30krad and 50krad
after two sessions by an X-ray tube. The dose rate was 0.32rad/s and the average
energy of the X-rays was 46.2keV. During the radiation, the sensors were not
electrically biased. All the measurements were performed two days after the
radiation.
103
Chapter 5
5.3 4T Pixel Performance with Radiation-Hardened Techniques
The radiation-induced trapped charges in the STI oxide around the MOSFET
were able to induce the lateral parasitic leakage current, flowing between the drain
and the source, through a field oxide transistor [5.9][5.10]. As discussed in Section
3.3.1, an enclosed-layout (ELT) gate of MOSFETs can effectively curtail the
lateral parasitic drain leakage path since the drain/source has no contact with the
STI and thus is not influenced by the radiation-induced trapped charges. Therefore,
the reset transistor and the source follower in all radiation-hardened 4T pixels in
this work deploy the enclosed-layout so that the parasitic leakage path originating
from the in-pixel MOSFETs was avoided as much as possible.
As illustrated in Fig. 5-3, the FD node is critical to the radiation damage since it
may have direct contact with the STI leading to surface generation current and the
signal from the PPD is also readout through the source follower from the FD node.
Thus, the radiation damage on the FD will have an effect on the pixel dark signal.
From point of view of the layout, the FD node is also the source node of the
in-pixel reset transistor. Therefore, it is essential to enclose the source node of the
reset transistor within a circular gate, which can also partially isolate the FD node
from the STI to some extent.
Figure 5-4. Top view of the FD regions in a radiation-hardened pixel design with an
enclosed-gate reset transistor.
104
Fig. 5-4 shows a simplified top view of the location of the FD regions in a pixel
design involving an enclosed-gate reset transistor. As described above, part of the
FD node, as a source node of the RST, is enclosed by a circular gate for the
purpose of radiation tolerance. Thus, it is protected from the radiation-induced
trapped charges in the STI.
One side of the TG is the PPD, while the other side is a part of the FD node. In
order to obey the 4T pixel design rules well, an enclosed TG layout was
abandoned, since it can lead to some errors from the design rule check. Thus, the
FD node next to the TG is still able to have contact with the STI. Since the FD
node is n+ implanted and is surrounded by the STI, the depletion region of the
n+/p-epi junction along the edge of the FD ends at the interface of the STI oxide,
according to Fig. 5-3 (b). As discussed in Chapter 2, the ionizing radiation may
build up interface traps at the Si-SiO 2 interface [5.5]. Therefore, if any trap defect
exists in the depletion region, the surface leakage current is generated along the
edge of the FD after radiation [5.11]. An extra poly-Si gate placed next to the FD
node can then simply isolate the surface depletion region of the FD node from the
STI sidewall, as presented in Fig. 5-3 (b).
1000 With Extra Gate on FD Node

Without Extra Gate on FD Node
800 Same Floating Diffusion
Node Area
600
400
200
0 Integration Time: 331ms
0 10 20 30 40 50
Figure 5-5. Reduction in the relative dark signal increase with an extra poly-Si gate on the
FD node.
Fig. 5-5 shows the extra gate effect on reducing the relative increase in dark
signal with radiation doses. Since different pixel designs are studied, a relative
increase in dark signal is used in this chapter to compare the results in order to
minimize the measurement errors. The size of the real FD node for two different
pixels is made exactly the same, thus the FD node capacitance in two situations is
approximately equal. According to Fig. 5-5, the pixel with an extra poly-Si gate on
the original FD node shows a lower increase in the radiation-induced dark signal
105
Chapter 5
since the FD node now used for sensing the charges from the PPD is simply
isolated from the defect-full sidewall of the STI.
+
Relative Increase in Dark Signal (%) 1400 p Guard Ring around In-Pixel Devices
+
No p Guard Ring around In-Pixel Devices
1200
1000
800
600
400
200
0 10 20 30 40 50
Figure 5-6. Effect of the p+ guard ring around in-pixel devices on the pixel dark signal
after radiation.
As mentioned above, an enclosed gate can suppress the parasitic leakage path
within an individual in-pixel MOSFET. However, as discussed in Chapter 2, the
positively charged post-radiation trapped charges in the STI can form an inversion
layer underneath in the p-type silicon [5.12]. In this case, inter-device leakage
paths appear within the 4T pixel after radiation since the isolation by means of the
STI becomes worse, which could increase the post-radiation dark signal. A p+
guard ring around each individual in-pixel device can be used to discontinue the
inter-device leakage path [5.13][5.14]. In the radiation-hardened pixel design, the
PPD together with the TG is surrounded by the p+ guard ring, and all the other
in-pixel MOSFETs are isolated from each other by p+ guard rings as well. Fig. 5-6
shows that the radiation-hardened pixel with p+ guard rings around the in-pixel
devices presents a smaller relative increase in dark signal after radiation, as
compared to a pixel without p+ guard rings. In these two pixel designs, the size of
the in-pixel MOSFETs, the FD node, the TG and the PPD keeps consistent.
The use of the p+ pinning layer of the pinned photodiode in the 4T pixel
dramatically reduces the surface leakage current along the photodiode edge since
the surface depletion region of the PPD is dragged away from the STI oxide and
the interface traps [5.15][5.16]. As a result, the 4T pixel with a PPD shows much
lower dark current than the 3T pixel with a conventional n+/p-well photodiode.
When the radiation damage is considered, how far the PPD can be dragged away
from the STI by the mask of the pinning layer is of great concern. It is because the
106
trapped charges in the STI may induce an inversion layer along itself to worsen the
isolation between the PPD and the STI. As illustrated in Fig. 5-3 (b), a larger
distance between the PPD and the STI can better isolate the depletion region
boundary of the PPD from the STI (that contains the interface traps and trapped
charges). Consequently, the probability of generating surface leakage current at the
STI sidewall is lowered with a large PPD-STI separation, so that the post-radiation
pixel dark signal is reduced.
1200
0.3m
1000 0.6m
1.0m
800 Distance between
the Pinned Photodiode and
600 the STI
400
200
0 10 20 30 40 50
Figure 5-7. Dependence of the post-radiation dark signal increase on the distance between
the pinned photodiode and the STI.
Fig. 5-7 shows the dependence of the relative post-radiation increase in pixel
dark signal on the distance between the PPD and the STI based on the
measurement results. When considering the radiation-hardened design techniques
viewed from the PPD point, a relatively larger distance between the PPD and the
STI is preferable, while the pixel fill-factor should also be taken into account.
The transfer gate has been proven to be the main dark current source in the 4T
pixel due to the existence of the high electric field at the overlap region of
PPD-TG [5.17][5.18]. As discussed in the previous chapter, the electric field is
inversely proportional to the distance when the applied electric potential on the TG
remains constant: therefore a longer TG length can make the electric field under
the TG drop to a lower value. Due to the reduction of the electric field under the
TG, the generation current enhancement via defects located at the region with a
strong electric field is also mitigated correspondently, when considering a similar
number of defects generated after the radiation [5.19][5.20][5.21]. Fig. 5-8 shows
the effect of the TG length on the relative post-radiation increase in the dark signal.
As for the design of a radiation-hardened pixel, a longer TG of 2.0m presents a
107
Chapter 5
lower relative increase in the pixel dark signal after radiation due to the
aforementioned electric field reduction induced by a larger TG length.
1100
TG Length: 1.0m
Relative Increase in Dark Signal (%) TG Length: 2.0m
1050
After 50krad-Radiation
950
900
850
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
Distance between the PPD and the STI (m)
Figure 5-8. Effect of the TG length on the post-radiation dark signal reduction with
respect to the distance between the PPD and the STI.
In these radiation-hardened pixels, the TG and the PPD are placed next to each
other in the physical layout design, while they are separated from the other three
in-pixel MOSFETs. Therefore, the radiation-hardened technique of enlarging the
distance between the PPD and the STI can be taken into account together with the
TG length effect as well. Fig. 5-8 also shows the influence of the distance between
the PPD and the STI on the TG length extension-induced decrease in the
post-radiation dark signal. The reduction scale of the post-radiation dark signal
induced by increasing the TG length from 1m to 2m dwindles with the increase
in the distance between the PPD and the STI. Therefore, these two parameters
need to be optimized simultaneously in terms of the pixel size when designing a
radiation-hardened pixel.
The length of the overlap region between the PPD and the TG is also varied in
these radiation-hardened designs. It attempts to reduce the high doping profile at
the overlap region of the p+ pinning layer under the TG and the high electric field
locally and to lower the post-radiation pixel dark signal, as illustrated in Fig. 5-3
(b). Fig. 5-9 shows that the relative post-radiation increase in dark signal presents
almost no change when enlarging the overlap length of p+ implantation under the
TG from 0.2m to 0.8m. Therefore, this extension of the overlap region has no
effect on the doping profile or on the electric field. This may be because the p+
implant is coming after the TG definition and is self-aligned, while the custom
physical design is not influencing this.
108
1200

+
1000 Overlap Length of p
Implantation under TG
800 0.8m
0.2m
600
400

Overlap of TG above
+
0 n Implantation: 0.56m
0 10 20 30 40 50
Figure 5-9. Variation in the overlap distance between the TG and the p+ pinning layer with
radiation doses.
The radiation-hardening-by-design techniques for the 4T pixel have been
discussed above from the in-pixel MOSFET through the FD node to the TG and
the PPD. The results can be used as physical design guidelines for circumventing
the pixel dark signal after radiation. In addition, these radiation-hardened design
techniques can also be applied to 4T pixels fabricated in another technology.
5.4 Ionizing Radiation Effects on Radiation-Hardened CMOS Image Sensors
In this section, the 4T pixels equipped with the radiation-hardening-by-design

(RHBD) techniques discussed above demonstrate a better performance in terms of
dark signal as compared to the reference pixels without the protective techniques
against ionizing radiation. In addition, a short study is conducted regarding the
radiation effects on the radiation-hardened pixels, with a focus on the TG.
Fig. 5-10 shows the performance of the radiation-hardened pixels after radiation
as compared to the reference pixels without radiation-hardened techniques. The
radiation-hardened pixels deploy an extra poly-Si gate next to the FD, the enclosed
layout gate for the reset transistor and the source follower, the p+ guard rings
around the in-pixel devices, a distance of 0.6m between the PPD and the STI and
a 1m-long TG. However, in the reference pixels, in-pixel MOSFETs are equipped
with standard strip-shaped gates, the FD node is in contact with the STI, and the
usual distance of 0.4m between the PPD and the STI is used. As a result, the
relative increase in the dark signal of the 4T pixels with the RHBD techniques is
half that of the reference pixels after radiation, as shown in Fig. 5-10.
109
Chapter 5
1800

Radiation-Hardened Pixel
1600 Reference Pixel
1400
1200
1000
800
Integration Time:
600
331ms
400
200
0
-200
0 10 20 30 40 50
Figure 5-10. Post-radiation performance of radiation-hardened pixels with a comparison

to the reference pixels.
(a) (b)
Figure 5-11. Layout of: (a) a radiation-hardened pixel design, and (b) a reference pixel
without RHBD techniques.
Fig. 5-11 shows the layouts of a radiation-hardened pixel as described above and
a reference pixel without the RHBD techniques.
Fig. 5-12 shows an image taken in the dark with an array consisting of reference
pixels and radiation-hardened pixels after 50krad of radiation. The integration time
110
was 331ms. The pixel array with the RHBD techniques obviously displays a
darker image than the reference pixel array in the same conditions, which is
because there was less radiation-induced degradation.
Figure 5-12. The dark image presented by the reference pixels and the radiation-hardened
pixels after radiation.
900
800
Before Radiation
Dark Signal (DN)
700 50krad
600
500 Radiation-Hardened Pixel

400
300
5 10 15 20 25
TG Charge Transfer Time (s)
Figure 5-13. The dark signal increase of a radiation-hardened pixel induced by the
extension of the TG charge transfer time before and after radiation.
As shown in Fig. 5-10, the radiation-hardened pixel still shows a certain amount
of relative increase in the dark signal after radiation which is mainly due to the
dark signal source originating from the overlap region of PPD-TG. Fig. 5-13
presents the dark signal performance before and after radiation of a
radiation-hardened pixel with an extended TG charge transfer time. Here, the
offset of the measurement setup is 250DN. The radiation-hardened pixel shown in
Fig. 5-10 is used for the measurement in Fig. 5-13. When the TG is biased, the
electric field at the overlap region of PPD-TG is high enough to lead to impact
111
Chapter 5
ionization and generate defects, which could induce the electric field-enhanced
increase in the pixel dark signal [5.18][5.21]. When the TG charge transfer time
becomes longer, the overlap region of PPD-TG is under electrical stress for a
longer period, causing it to suffer from more severe degradation and generate more
defects. The extra radiation-induced defect generation near the overlap region
could even intensify the pixel degradation in terms of dark signal, particularly with
the extension of the TG charge transfer time. Fig. 5-13 shows a slight pre-radiation
increase in pixel dark signal induced by a longer TG charge transfer time, while an
obvious post-radiation increase in the dark signal caused by the TG charge transfer
time extension can be observed for the radiation-hardened pixel. Therefore, the TG
remains as the main dark signal source, and the contribution of the TG to the pixel
dark signal can be enhanced by the additional radiation-induced defects located
near the overlap region of PPD-TG.
5.5 Optical Performance of Radiation-Hardened 4T Pixels
As mentioned above, the enclosed layout adopted in a radiation-hardened pixel

is not size-friendly, since it occupies more area than a conventional strip-shaped
layout. The radiation-hardened pixel also needs to spare some space for the p+
guard ring, which can be used to interrupt the inter-device leakage path. In
addition, one extra poly-Si gate in a radiation-hardened pixel aiming to isolate the
FD node from the STI oxide does further shrink the remaining area for the
photodiode. A larger recessed distance between the PPD and the STI, which is
preferable for a radiation-hardened pixel, is again not favorable for a large fill
factor.
1300 Reference Pixel

Radiation-Hardened Pixel
1200
1100
Spectral Response (AU)
1000
900
800
700
600
500
400 Integration Time:
130ms
300
300 400 500 600 700 800 900 1000
Wavelength (nm)
Figure 5-14. The spectral response of a radiation-hardened pixel and a reference pixel.
112
In general, the area-consuming radiation-hardening-by-design techniques will

make the photon sensitive region smaller, compared to a reference pixel without
radiation-hardened techniques. As a result, the pixel optical performance can be
degraded by the radiation-hardened techniques as a trade-off.
Fig. 5-14 shows the spectral response of a radiation-hardened pixel compared to
a reference pixel without radiation-hardened techniques. As discussed above, the
radiation-hardened techniques decrease the fill factor. Therefore, the
radiation-hardened pixel shows a worse spectral response than the reference pixel.
5.6 Conclusion
In this work, different radiation-hardening-by-design (RHBD) techniques for the

4T pixel are discussed and their effectiveness in reducing the post-radiation
increase in the dark signal is represented by the measurement results. The pixel
array equipped with radiation-hardened techniques shows a much lower increase
in the dark signal as compared to the reference pixel array without any
radiation-hardened techniques deployed when measured under the same
conditions.
The reset transistor (RST) and the source follower (SF) are critical to the 4T
pixel when compared to the row selector (RS) transistor, since they are connected
to the floating diffusion (FD) node where the signal from the PPD is readout
through the SF. The post-radiation trapped charges in the STI around the
source/drain region can induce the lateral parasitic leakage path in parallel with the
normal transistor. The enclosed layout is applied to the RST and the SF in a
radiation-hardened pixel in order to interrupt the aforementioned lateral parasitic
leakage path. However, the enclosed layout transistor occupies more silicon area
than a conventional transistor with a strip-shaped gate, so the enclosed concept is
not size-friendly to the pixel fill factor.
Moreover, the accumulation of positively charged trapped charges in the STI
allowed for the formation of an inversion layer along the STI in the p-type silicon
with the increase in the radiation dose. The STI was unable to continue isolating
the devices from each other with the formation of the inversion layer.
Consequently, the inter-device leakage path within the 4T pixel could appear. The
p+ guard rings around the in-pixel devices discontinued the inter-device leakage
path to reduce the post-radiation dark signal increase. As a result, it made the pixel
more radiation-tolerant.
In order to obey the design rules, the transfer gate (TG) could not deploy the
enclosed gate to isolate the active region from the STI. Thus, the FD node next to
the TG was in direct contact with the STI. The ionizing radiation could build up
the interface traps at the Si-SiO 2 interface along the STI sidewall. The surface
leakage current of the 4T pixel rose dramatically as soon as the surface depletion
region at the edge of the FD node touched with the STI sidewall. However, placing
an extra poly-Si gate on the FD node to isolate it from the STI was proven to be a
113
Chapter 5
radiation-hardened design technique that lowers the pixel dark signal increase after
radiation.
In addition, in order to reduce the probability of having surface leakage current
from the PPD, the edge of the PPD should be also isolated from the STI as much
as possible. A larger distance between the PPD and the STI could better prevent
the depletion region boundary of the PPD from being in contact with the STI,
particularly after the radiation, so that it is favorable for a radiation-hardened 4T
pixel.
A longer TG length could induce a lower electric field under the TG. Thus, the
electric field-enhanced dark signal increase through the radiation-induced defects
under the TG was mitigated when the electric field is reduced. In addition, the
number of defects induced by impact ionization also becomes smaller when the
electric field under the TG is weakened. As a result, the post-radiation pixel dark
signal decreases with the increase in the TG length. A longer TG and a larger
distance between the PPD and the STI can be deployed in a radiation-hardened 4T
pixel at the same time, but their sizes need to be optimized considering the
fill-factor. The reduction of the post-radiation dark signal induced by a longer TG
can be minimized with the increase in the distance between the PPD and the STI.
Finally, the lowering of the doping profile to reduce the electric field at the
overlap region of PPD-TG seems unfeasible when extending the overlap length of
the TG above the p+ pinning layer, since the post-radiation pixel dark signal shows
almost no change with this extension. It is possible that the masks used for the
PPD implantation are strictly defined by the foundry, therefore the custom design
could not affect the actual implantation performed in the 4T pixel fabrication.
The 4T pixel array designed with the aforementioned RHBD techniques
demonstrates a much lower increase in the post-radiation dark signal as compared
to a conventional reference pixel array. Correspondingly, the radiation-hardened
pixel also displays a darker image, which represents the visualized tolerance to the
ionizing radiation damage.
As demonstrated in the post-radiation dark signal increase with the extension of
the TG charge transfer time, the high electric field at the overlap region of
PPD-TG remains as a problematic dark signal source even for a
radiation-hardened 4T pixel. Based on the study in Chapter 3, the TG is the main
pixel dark signal source before and after radiation. Consequently, the future study
of the radiation-hardened techniques should focus on looking for an effective
method to reduce the high electric field at the overlap region of PPD-TG so that
the pixel dark signal can be minimized further.
However, as for the optical performance, the spectral response of a
radiation-hardened pixel is worsened compared to a reference pixel without
radiation-hardened techniques. It is because the radiation-hardened techniques
consume a lot of pixel area and shrink the photon sensitive region. Thus, some
attention needs to be paid to the trade-off of a radiation-hardened pixel.
114
5.7 References
[5.1] M. Cohen and J. P. David, Radiation effects on active pixel sensors, Proc.
of RADECS 1999, pp. 450-456, 1999.
[5.2] J. Bogaerts, Radiation-Induced Degradation Effects in CMOS Active Pixel
Sensors and Design of Radiation-Tolerant Image Sensor, Ph.D. Thesis,
ISBN 9056823388, pp. 1-15, 2002.
[5.3] G. F. Derbenwick and B. L. Gregory, Process optimization of
radiation-hardened CMOS integrated circuits, IEEE Trans. Nucl. Sci., vol.
NS-22, pp. 2151-2156, 1975.
[5.4] W. S. Kim et al., Radiation-hard design principles utilized in CMOS 8085
microprocessor family, IEEE Trans. Nucl. Sci., vol. NS-20, pp. 4229-4234,
1983.
[5.5] J. R. Schwank et al., Radiation effects in MOS oxides, IEEE Trans. Nucl.
Sci., vol. 55, pp.1833-1853, 2008.
[5.6] N. Saks, M. Ancona and J. Modolo, Generation of interface states by
ionizing radiation in very thin MOS oxides, IEEE Trans. Nucl. Sci., vol.
33, pp.1185-1190, 1986.
[5.7] A. Holmes-Siedle and L. Adams, Handbook of Radiation Effects, Oxford
University Press, New York, ISBN: 0198563477, pp. 48-153, 1993.
[5.8] H. I. Kwon et al., The analysis of dark signals in the CMOS APS imager
from the characterization of test structures, IEEE Trans. Electron Devices,
vol. 51, pp. 178-184, 2004.
[5.9] F. Faccio and G. Cervelli, Radiation-induced edge effects in deep
submicron CMOS transistors, IEEE Trans. Nucl. Sci., vol. 52, pp.
2413-2420, 2005.
[5.10] J. Tan, B. Buettgen and A. Theuwissen, Radiation effects on CMOS
image sensors due to X-rays, Proc. of ASDAM 2010, pp. 279-282, 2010.
[5.11] S. M. Sze and K. K. Ng, Physics of Semiconductor Devices, 3rd Ed., John
Wiley & Sons, Inc., ISBN: 0471143235, pp. 80-118, 2007.
[5.12] V. Goiffon, C. Virmontois, P. Magnan, S. Girard and P. Paillet, Analysis
of total dose-induced dark current in CMOS image sensors from interface
state and trapped charge density measurements, IEEE Trans. Nucl. Sci.,
vol. 57, pp. 3087-3094, 2010.
[5.13] W. Snoeys et al., Layout techniques to enhance the radiation tolerance of
standard CMOS technologies demonstrated on a pixel detector readout
chip, Nuclear Instruments and Methods in Physics Research A, vol. 439,
pp. 349-360, 2000.
[5.14] V. Goiffon et al., Ionizing radiation effects on CMOS imager
manufactured in deep submicron process, Proc. SPIE, 2008, vol. 6816, pp.
1-12, 2008.
115
Chapter 5
[5.16] N. V. Loukianova et al., Leakage current modeling of test structures for

[5.17] J. Tan, B. Buettgen and A. Theuwissen, Analyzing the radiation
degradation of 4-Transistor deep submicron technology CMOS image
sensors, IEEE Sensors Journal, vol. 12, pp. 2278-2286, 2012.
[5.18] X. Wang, P. R. Rao and A. Theuwissen, Fixed-pattern noise induced by
transmission gate in pinned 4T CMOS image sensor pixels, Proc.
ESSDERC 2006, pp. 331-334, 2006.
[5.19] F. Hurkx, H. L. Peek, J. W. Slotboom and R. Windgassen, Anomalous
behavior of surface leakage currents in heavily doped gated-diodes, IEEE
[5.20] J. R. Srour and R. A. Hartmann, Enhanced displacement damage
effectiveness in irradiated silicon devices, IEEE Trans. Nucl. Sci., vol. 36,
pp. 1825-1839, 1989.
[5.21] P. Ramachandra Rao, Charge-Transfer CMOS Image Sensors: Device and
Radiation Aspects, Ph.D. Thesis, ISBN: 9789081331661, pp. 64-71, 2009.
116
General Conclusions and Future Work
Chapter 6
This thesis began with a comprehensive study of the ionizing radiation effects
on the 4T pixels and the elementary in-pixel test devices. Based on the
understanding of the origins of the radiation-induced degradation on the 4T CMOS
image sensors, radiation-hardening-by-design techniques were correspondently
presented and their effectiveness was verified. Thus, this chapter summarizes some
general conclusions derived from the work in this thesis. In addition, some
suggestions are proposed for future research and improvement.
6.1 General Conclusions
In this section, some conclusions of the radiation studies on the 4T pixel are first
presented. Then, the effectiveness of different radiation-hardening-by-design
techniques are summarized with regard to the radiation-induced degradation
mechanisms.
6.1.1 Radiation-Induced Degradation in 4T CMOS Image Sensors
In this work, not only the ionizing radiation effects on 4T CMOS image sensors
were studied from the level of in-pixel MOSFETs to the level of an entire pixel
array, but also the origin of pixel dark signal was analyzed. The effects of the pixel
bias condition during radiation were also described. The investigation of the
microscopic pixel parameter degradation provided insight into the ionizing
radiation effects. The measurements were performed on in-pixel elementary test
structures and 21 different variations of pixel arrays.
Pixel dark signal origin before and after radiation:
The dark signal contribution from the PPD and TG is confirmed by the drain
leakage current measurement of an in-pixel reset transistor test structure integrated
with a PPD and TG. The drain leakage current of the in-pixel reset transistor rises
with an increase in the voltage applied to the TG node. The high electric field at
the overlap region of the PPD-TG is further intensified and the defect generation is
enhanced by an increasing TG voltage. Therefore, the thermal generation current
from the PPD and TG contributes to the drain leakage current of the in-pixel reset
transistor.
The contribution of the PPD and the TG to the total pixel dark signal can be
included and excluded during the measurements by turning the TG on and off. The
large increase in the mean pixel dark signal induced by the on/off states of the TG
confirms that the PPD and the TG are the main contributors compared to the
117
Chapter 6
in-pixel MOSFETs, particularly after radiation. Between the PPD and the TG, the
TG contributes more to the dark signal. This is confirmed in Chapter 3 by varying
the integration and charge transfer time.
Radiation effects on in-pixel elementary test devices:
As for the commercial 0.18m CMOS technology used in this work, the in-pixel
MOSFET gate oxide is inherently tolerant of X-ray damage, since the transistor
threshold voltage does not shift. However, the X-ray radiation can induce a large
increase in the drain leakage current for an nMOSFET with a regular layout (a
strip-shaped gate). The post-radiation trapped charges in the STI around the source
and the drain help to form a lateral parasitic leakage path in parallel with the
normal transistor so that the drain leakage current is enhanced. From the layout
point of view, an enclosed layout transistor (ELT) is shown to be more
radiation-tolerant, since at least the drain/source is not in contact with the STI.
Unlike nMOSFETs, pMOSFETs demonstrate almost no radiation-induced leakage
current degradation as shown by measurements. This is due to the lower
probability of lateral parasitic leakage path formation as well as a larger distance
between the post-radiation trapped charges and interface states in radiated
pMOSFETs compared to nMOSFETs.
Radiation effects on the PPD and the TG:
The X-ray damage has almost no effect on the PPD pinning voltage because the
post-radiation depletion region of the PPD does not expand much, even in the
presence of the radiation-induced trapped charges in the STI. The
radiation-induced dark signal increase from the PPD is small and is not
proportional to its perimeter in the presence of the p+ pinning layer.
The effect of the TG size on the dark signal shows a different trend as a function
of the TG length before and after radiation. The generation current can be
strengthened when a defect is located in a high electric field region, thus the low
electric field under the TG can mitigate the pixel dark signal. The defect creation
induced by the TG length extension is more dominant than the corresponding
electric field reduction before radiation, although this situation is reversed after
radiation. As a result, the pixel dark signal rises with the increasing TG length
before radiation, whereas after radiation it decreases. Moreover, with a negative
low value of the TG clock, the holes play an important role in reducing the dark
current by filling the defects. This function becomes more effective after radiation.
Radiation effects on the quantum efficiency:
The X-ray damage attenuates the quantum efficiency over the short-wavelength
range. The radiation degrades the transmission of the dielectric layers covered on
top of the PPD, which may be regarded as the reason for the loss in the sensor
optical performance.
118
Radiation effects regarding the pixel bias conditions and annealing:

A larger pixel bias voltage during radiation can lead to a more severe
post-radiation dark signal degradation. The initial fraction of radiation-induced
trapped charges in the oxide can be higher than it would be without bias, since a
larger pixel bias can more effectively impede the electron-hole pair recombination
process. The post-radiation increase in the dark signal is proportional to the
amount of radiation-induced trapped charge in the STI oxide.
The activation energy can be derived from the temperature measurements of the
pixel dark signal. A larger pixel supply voltage for the post-radiation measurement
shows an effect on lowering the activation energy due to the band-gap bending and
the corresponding dark signal increase induced by filling the shallow defects.
What is worth mentioning is that the post-radiation dark signal can be quickly
annealed down even when stored at room temperature for 36 hours. This can be
due to the negatively charged interface trap compensation and the following
shallow trap neutralization through the electron tunnelling from the silicon
substrate. As seen from the shrinking of the dark random noise histogram, an
85oC-annealing for 75 hours effectively removes many of the radiation-induced
trapped charges. However, the dark random noise increases again after a 150-hour
annealing, because most of the trapped charges have already been annealed out,
after which the non-annealed interface traps try to rebound the dark random noise.
Radiation-induced microscopic pixel parameter degradation:
The X-ray damage-induced macro dark signal increase in the 4T pixel can be
driven by two aspects of the microscopic radiation degradation mechanisms
behind the scene. They are the enhanced dark signal increase via the post-radiation
activation energy reduction due to the Poole-Frenkel effect and trap-assisted
tunneling; and the radiation effects on the trap capture cross-section. The MNR
(Meyer-Neldel Relationship) and Emn energy (Meyer-Neldel energy) can be
extrapolated from the per-pixel activation energy or dark signal. They are not
affected by the radiation since the pixel dark signal/dark current only depends on
its true pre-exponential factor at the same isokinetic temperature in accordance
with the equation of dark current and activation energy. The microscopic pixel
parameter degradation can provide a detailed insight into the radiation effects on
the 4T pixel.
Radiation-induced degradation discrepancy between 4T pixels and 3T pixels:
The 4T pixel presents a different radiation-induced degradation behavior
compared to the 3T pixel. The dark current in a 3T pixel is mainly generated by
the conventional p-n junction photodiode. The edge of the depletion region of a
p-n junction photodiode has a large area in contact with the sidewall of the STI
oxide, where there are many interface traps so that the surface generation current
prevails. Therefore, the dark current in a 3T pixel mostly comes from the
photodiode perimeter, before as well as after radiation. However, due to the pinned
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Chapter 6
photodiode in the 4T pixel, the photodiode perimeter has no effect at all on the
pre-radiation and post-radiation dark current of a 4T pixel. Moreover, the radiation
degradation of the PPD in the 4T pixel is smaller compared to the conventional
photodiode in the 3T pixel due to the suppression of surface generation current via
the p+ pinning layer. As a result, there is less radiation-induced dark current
degradation in the entire 4T pixel than the 3T pixel. However, even though the
introduction of the PPD improves the radiation hardness of the 4T pixel, as an
extra transistor in the 4T pixel, the TG becomes a major dark current source both
before and after radiation. Thus, as for a 4T pixel, the TG puts up an obstacle to
the further advancement in the radiation tolerance.
6.1.2 Radiation-Hardening-by-Design of 4T Pixels
In this section, the performance of different radiation-hardening-by-design

techniques against radiation degradation on the 4T pixels is summarized and
discussed.
The enclosed layout is applied to the in-pixel MOSFETs in a radiation-hardened
pixel so that the lateral parasitic leakage path in parallel with the normal transistor
is avoided. However, the enclosed layout transistor occupies more silicon area
than a conventional transistor with a strip-shaped gate, which is not size-friendly
for the pixel fill factor.
The STI could no longer isolate the devices from each other when the
accumulation of positively-charged trapped charges in the STI formed an inversion
layer beneath itself in the p-type silicon with the increasing radiation dose. As a
result, the inter-device leakage path within the 4T pixel could appear. The p+ guard
rings around the in-pixel devices used in a radiation-hardened pixel could interrupt
the inter-device leakage path to reduce the post-radiation dark signal increase.
The ionizing radiation could build up the interface traps at the Si-SiO 2 interface
along the STI sidewall. The surface leakage current of the 4T pixel rises
dramatically as soon as the surface depletion region at the edge of the FD node is
in contact with the STI sidewall. However, it has been proven that placing an extra
poly-Si gate on the FD node in order to isolate the FD node from the STI is an
effective radiation-hardened design technique to lower the post-radiation pixel
dark signal increase.
Moreover, a larger distance between the PPD and the STI would more
effectively prevent the depletion region boundary of the PPD from coming into
contact with the STI and suppress the generation of surface leakage current,
particularly after the radiation. Therefore, it is favorable for a radiation-hardened
4T pixel.
The post-radiation pixel dark signal decreases with the increase in the TG length
because a longer TG length induces a lower electric field under the TG. Thus, a
longer TG and a larger distance between the PPD and the STI can be deployed in a
radiation-hardened 4T pixel at the same time, although their sizes need to be
120
optimized considering the fill factor. This is also because the reduction of the
post-radiation dark signal induced by a longer TG can be minimized with the
increase in the distance between the PPD and the STI.
Furthermore, extending the overlap length of the TG above the p+ pinning layer
seems to have no effect on lowering the doping profile or decreasing the electric
field at the overlap region of PPD-TG. The post-radiation pixel dark signal shows
almost no change with this extension. The reason can be that the p+ implantation is
done by the self-alignment with the TG and the physical custom design could not
affect the actual implantation performed in the 4T pixel fabrication.
The 4T pixel designed with the radiation-hardening-by-design techniques
demonstrates a much lower increase in the post-radiation dark signal compared to
a reference pixel without radiation-tolerant designs. Correspondently, the radiation
tolerance of X-rays can be visualized through a darker image displayed by a
radiation-hardened pixel array. Finally, the TG remains the main dark signal
source even for a radiation-hardened pixel, which is demonstrated by the
post-radiation dark signal increase with the extension of the TG charge transfer
time.
However, the radiation-hardening-by-design techniques occupy quite a bit of
pixel area, which makes the photon sensitive region smaller compared to a
reference pixel without radiation-hardened techniques. As a result, the lowering of
the spectral response is a trade-off to take into account during the design of a
radiation-hardened pixel.
6.2 Future Work
This section proposes some suggestions for future research, since there is some
room for further improvement in the study of radiation effects on 4T pinned
photodiode CMOS image sensors. Suggestions for future research will not only
cover the aspects of ionizing radiation effects, but also contribute to the further
reduction of radiation-induced degradation.
Study of the dose rate sensitivity of 4T pixels:
The main topic of this work concerns the effects of total ionizing dose (TID) on
4T pixels. The laboratory dose rate used in this work to reach a certain dose was
relatively high in order to accelerate the pixel failure. However, the degradation of
MOS devices is reported to be sensitive to the dose rate of the ionizing radiation
source [6.1][6.2]. The 4T CMOS image sensor is composed of thousands of MOS
devices. Consequently, a future investigation of the dose rate sensitivity of 4T
pixels can make the study of radiation effects on 4T pixels more complete.
As mentioned in Chapter 2, ionizing radiation will induce trapped charges in the
field oxide (STI) of the 4T pixel and interface trap build-up at the Si-SiO 2
interface, which leads to pixel degradation. Some trapped charges can be
neutralized by electrons from the silicon directly after radiation, while the
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Chapter 6
interface trap build-up occurs later than charge trapping in the field oxide [6.2]. A
high dose rate significantly reduces the neutralization of oxide-trapped charge. In
addition, the interface traps have an insufficient amount of time to build up. As a
result, the amount of radiation-induced trapped charge in the STI is very large. At
a moderate dose rate, the chances for the neutralization of trapped charges and the
build-up of interface traps becomes higher than the case at a high dose rate.
Furthermore, the positively charged oxide-trapped charge can also compensate
with the negatively charged interface trap in n-type MOS devices. Therefore, the
net number of radiation-induced trapped charges is conversely lower so that the
failure level of the pixel can be relatively high. At a low dose rate, many trapped
charges can be neutralized during radiation. Furthermore, the interface trap
build-up becomes substantial, which is also difficult to be annealed later on at
room temperature [6.2]. The ionizing radiation-induced degradation on
nMOSFETs is reported to be enhanced by low dose rates, according to [6.1].
During the application of 4T pixels in a radiation environment, the dose rate will
most likely differ from the one used in the lab or in this work. Thus, a
comprehensive study of the effects of different dose rates on 4T pixel degradation
will be desirable in order to provide more practical guidelines to the application.
Study of pMOS-based 4T CMOS image sensors in terms of radiation hardness:
As demonstrated in Chapter 3, pMOSFETs show better radiation tolerance to
X-rays, compared to nMOSFETs, in terms of a low radiation-induced increase in
leakage current. Moreover, with the progress made in CMOS technology and
circuit design library, pMOSFETs have become deployed in both the 3T pixel [6.3]
and in the 4T pixel [6.4]. Some initial results have also been presented recently
about a CMOS image sensor based on hole collection 4T pixel pinned photodiode
[6.5]. Thus, the future design of a radiation-hardened 4T CMOS image sensor can
adopt pMOSFETs in the block of the pixel as well as in the block of the basic
circuitry units, e.g. current mirror, amplifier, etc. As a result, the radiation-induced
increase in the parasitic leakage current can be significantly mitigated so that the
post-radiation dark current of the entire sensor can be lowered. Furthermore, the
pixel noise can also be reduced if the pixel is composed of pMOSFETs [6.4].
Therefore, a future study of the radiation effects on pMOS-based 4T CMOS image
sensors will be valuable since the pMOSFETs give the 4T pixel the advantage of
low dark current and low noise over nMOS-based image sensors.
Study of the employment of a radiation-hardened layout for the overall circuitry of
4T CMOS image sensors:
In this work, only the in-pixel transistors adopt the enclosed layout to achieve a
better radiation tolerance, while all the readout electronics are still drawn in the
conventional stripe-shaped layout. In order to further enhance the radiation
hardness of nMOS-based 4T CMOS image sensors, an extensive modeling of
radiation-hardened layouts will be desirable for the circuit design library of an
122
entire sensor. As a result, all the transistors used in the readout electronics can also
deploy the radiation-hardened layout to achieve a higher radiation-induced failure
level. Due to the restriction of design rules, the enclosed layout is usually a
polygon instead of a square or a circle, which makes it difficult to extract the
effective W/L ratio of the transistor accurately [6.6]. Here, W is the width of the
transistor gate, while L is the length. As for the circuit blocks, which needs a
precise W/L ratio, e.g. a current mirror, an accurate device modeling of the
enclosed layout will be highly essential in any future design. Furthermore, the
enclosed layout has an obvious disadvantage of encompassing a bulky area.
Therefore, future research may also look for a replaceable radiation-hardened
layout together with device modeling which could provide acceptable radiation
tolerance and will occupy less silicon area.
Study of the radiation-hardened design of the transfer gate in 4T pixels:
The transfer gate (TG) and the overlap region of the pinned photodiode-transfer
gate (PPD-TG) are still the main dark current sources even in a radiation-hardened
4T pixel. When the TG is turned on, the highly doped p+ pinning layer of the PPD
results in a high electric field at the overlap region of PPD-TG. This high electric
field can enhance the increase in the pixel dark current. The defect generation in
the transfer channel is another source for the TG-induced increase in the pixel dark
current before and after radiation. Therefore, future research could work on the
reduction of the electric field at the overlap region of PPD-TG, probably from the
process perspective. A transfer gate electrode with a partial p-type poly-silicon
was proven to be able to reduce the 4T pixel dark current [6.7], which could give
some clues for the future design of a radiation-hardened transfer gate.
Furthermore, as demonstrated in Chapter 3, the negative low value of the TG
pulse signal can electrically minimize the 4T pixel dark current. Thus, future work
can also focus on an extensive study of the pixel radiation degradation with the
low value of the TG pulse signal.
6.3 References
[6.1] S. C. Witczak, R. C. Lacoe, J. V. Osborn, J. M. Hutson and S. C. Moss,

Dose-rate sensitivity of modern nMOSFETs, IEEE Trans. Nucl. Sci., vol.
52, pp.2602-2608, 2005.
[6.2] J. R. Schwank et al., Radiation effects in MOS oxides, IEEE Trans. Nucl.
Sci., vol. 55, pp. 1833- 1853, 2008.
[6.3] N. Xie, Low-Power Low-Noise CMOS Imager Design: in Micro-Digital
Sun Sensor Application, Ph.D. Thesis, ISBN: 9789461913487, pp. 58-78,
2012.
[6.4] E. Stevens et al., Low-crosstalk and low-dark-current CMOS
image-sensor technology using a hole-based detector, ISSCC Tech. Dig.,
pp. 60-61, 2008.
123
Chapter 6
[6.5] S. Place, J. Carrere, S. Allegret, P. Magnan, V. Goiffon and F. Roy, Rad

tolerant CMOS image sensor based on hole collection 4T pixel pinned
photodiode, IEEE Trans. Nucl. Sci., vol. 59, pp. 2888-2893, 2012.
[6.6] W. Snoeys et al., Layout techniques to enhance the radiation tolerance of
standard CMOS technologies demonstrated on a pixel detector readout
chip, Nucl. Instr. And Meth. In Phys. Research A, vol. 439, pp. 349-360,
2000.
[6.7] Y. Kunimi and B. Pain, Consideration of dark current generation at the
transfer channel region in the solid state image sensor, IEEE Image
Sensor Workshop, pp. 66-69, 2007.
124
Summary
This thesis investigates the ionizing radiation effects on 4T pixels and the
elementary in-pixel test devices with regard to the electrical performance and the
optical performance. In addition to an analysis of the macroscopic pixel parameter
degradation, the radiation-induced degradation mechanisms are also presented
from the microscopic perspective in terms of activation energy, the Meyer-Neldel
relationship, and the trap capture cross section. In order to strengthen the radiation
tolerance of 4T CMOS image sensors, some radiation-hardening-by-design
techniques are proposed based on the understanding of the preceding study on the
radiation effects. The effectiveness of the radiation-hardened techniques is also
verified by being compared to a reference pixel array without radiation protection
techniques.
In Chapter 1, the motivation of this project work is established by means of a
background introduction to the past, present, and future of CMOS image sensors,
particularly for pinned photodiode (PPD) 4T pixels. CMOS image sensors have
surpassed CCDs in medical and space applications because they offer several
advantages such as high integration capability, high readout speed, and low power
consumption. However, CMOS image sensors applied in a radiation environment
are faced with a challenge: sensor performance degradation due to radiation
damage. Therefore, the object of this thesis is not only to study the radiation
effects on 4T CMOS image sensors, but also to propose design techniques based
on the foundry design rules which can enhance the radiation hardness of the
CMOS imagers against radiation-induced degradation.
Chapter 2 first briefly summarizes the advantages of 4T pixels over 3T pixels in
terms of noise and dark current performance, which correspond to the present
popularity of 4T pixels and the motivation for studying of the radiation effects on
4T pixels. Different electro-optical parameters of 4T pixels are also discussed in
the subsequent sections of this chapter, covering the noise performance to the
spectral response. This chapter goes on to describe at great length an important
pixel performance parameter, namely different dark current generation
mechanisms in the pixel along with mathematical equations, ranging from the
surface generation current to the diffusion current. The temperature measurement
can be used to clarify different generation mechanisms of the pixel dark current. A
concise analysis of the spatial distribution of dark current sources in the 4T pixel is
also presented. Since MOS structures are the fundamental components of CMOS
image sensors, Chapter 2 provides a detailed introduction to the total ionizing dose
effects on MOS devices, which can be applicable to 4T pixels. The process of
electron-hole generation, charge trapping and interface trap build-up, which occur
during ionizing radiation, are addressed in detail, respectively. In the final section,
Chapter 2 also shortly discusses the radiation damage recovery and the
125
radiation-hardened techniques.
In Chapter 3, the effect of radiation-induced degradation on the electrical and
optical performance of the in-pixel devices as well as the pixel arrays is
demonstrated by means of measurement results. First the dark current sources in
the 4T pixel are analyzed. The transfer gate (TG) transistor proves to be the main
contributor of dark current before and after radiation. The present thin-gate-oxide
technology seems to be inherently radiation-tolerant since no threshold voltage
shift is observed for the in-pixel MOSFETs, while the effect of ionizing radiation
on in-pixel MOSFETs with strip-shaped gates is expressed in the form of a sharp
increase in the leakage current. A pMOSFET or an nMOSFET with an enclosed
layout prove to be more radiation-hardened, since the lateral parasitic leakage path
is effectively circumvented so that the radiation-induced increase in the leakage
current is mitigated.
The surface generation current along with the edge of the PPD depletion region
in the 4T pixel is significantly minimized by the p+ pinning layer. As a result, the
pre-radiation and post-radiation dark signal from the PPD is not proportional to its
perimeter. The ionizing radiation also has no effect on the PPD pinning voltage
since the post-radiation depletion region does not expand much. However, the TG
length can have varying effects on the pixel dark signal before and after radiation.
Before radiation, the defect generation induced by the TG extension dominates
over the corresponding electric field reduction so that the dark signal still rises
with the increase in the TG length. By contrast, the electric field reduction-induced
decrease in the dark signal becomes dominant after radiation, which causes the
post-radiation pixel dark signal to decline with the TG extension. It is proven that
reducing the low amplitude of the TG pulse below zero can bring the dark signal
down both before and after radiation. This is because the defects, which serve as
generation centers for the dark signal, are filled by the holes.
Chapter 3 also shows the radiation-induced degradation of the quantum
efficiency for short wavelengths. The radiation-induced change in the transmission
of the dielectric layer that is finally covered on top of the PPD can be regarded as a
cause of this degradation.
Chapter 4 first presents a study of the effects of the bias conditions during
radiation on the pixel degradation, since the preceding experiments performed in
Chapter 3 are without electrical bias during radiation. The larger the bias is, the
more severe the radiation-induced pixel degradation is with respect to dark signal.
Moreover, the role of trapped charges and interface traps is also discussed in terms
of pixel recovery after annealing. A 75-hour annealing at 85oC can anneal most of
the trapped charges in the STI so that the pixel recovers, as is illustrated by the
decrease in the pixel dark random noise. However, the extra annealing raises the
dark random noise again since the net number of interface traps rebounds after a
150-hour annealing. Chapter 4 also deals with an interesting study of the
microscopic degradation mechanism behind the macro pixel dark signal increase
caused by radiation. The ionizing radiation can lead to a lowering of the per-pixel
126
activation energy and an increase in the trap capture cross section.
Chapter 5 presents the radiation-tolerant 4T pixels designed with the
radiation-hardening-by-design techniques which show a lower increase in the
post-radiation dark signal compared to the reference pixel without any protection
techniques against radiation damage. The adoption of in-pixel transistors with the
enclosed layout can help to mitigate the radiation-induced leakage current increase
so that the post-radiation pixel dark signal is reduced. A longer TG is preferable
for a radiation-hardened pixel. As for the PPD, a larger distance between the STI
and the PPD edge can more effectively prevent the radiation-induced increase in
the pixel dark signal. Placing an extra poly gate to isolate the floating diffusion
(FD) node from the STI can effectively suppress the surface leakage current and
lower the pixel dark signal after radiation. However, due to the limitation of design
rules, the physical design of the overlap length of the TG above the p+ pinning
layer does not decrease the high electric field at the overlap region of PPD-TG
resulting in a reduction of the pixel dark signal. Therefore, the overlap region of
PPD-TG is still the main dark signal source before and after radiation even for the
radiation-hardened 4T pixel in this work.
Furthermore, Chapter 5 also shows a drawback of the radiation-hardened
techniques on the pixel optical performance, which is a reduction in the spectral
response. This is due to the fact that the radiation-hardening-by-design techniques
shrink the photon sensitive region by occupying quite some of pixel area.
Chapter 6 summarizes the main achievements from the project work with regard
to the ionizing radiation effects on 4T pixels and the
radiation-hardening-by-design techniques. Furthermore, some suggestions and
guidelines are also proposed for future work concerning pinned photodiode 4T
CMOS image sensors applied in a radiation environment.
127
Samenvatting
Dit proefschrift onderzoekt de effecten van ioniserende straling op 4T pixels en de

elementaire in-pixel teststructuren met betrekking tot de elektrische prestatie en de
optische prestatie. Naast een analyse van de macroscopische pixel parameter
degradatie worden ook de door straling genduceerde degradatiemechanismen
gepresenteerd uit microscopisch perspectief in termen van activeringsenergie, de
Meyer-Neldel relatie en de trap-capture dwarsdoorsnede. Om de straling tolerantie
van de 4T CMOS-beeldsensoren te versterken, worden sommige
radiation-hardening-by-design (door-ontwerp-straling-hardende) technieken
voorgesteld op basis van kennis over de stralingseffecten uit de voorafgaande studie.
De effectiviteit van de door straling geharde technieken wordt ook geverifieerd aan
de hand van een vergelijking met een referentie pixel-array zonder
stralingsbescherming technieken.
In Hoofdstuk 1 wordt de motivatie van dit projectwerk beschreven door middel
van een beschrijving van het verleden, het heden en de toekomst van
CMOS-beeldsensoren, vooral voor pinned-fotodiode (PPD) 4T pixels.
CMOS-beeldsensoren hebben CCDs overtroffen in medische- en
ruimtevaart-toepassingen omdat ze vele voordelen bieden zoals hoge integratie
vermogen, hoge uitlees snelheid en een laag stroomverbruik. CMOS-beeldsensoren
die toegepast worden in een stralingsomgeving worden echter geconfronteerd met
een uitdaging: degradatie van de sensorprestatie als gevolg van stralingsschade.
Daarom is het doel van dit proefschrift niet alleen de effecten van straling op de 4T
CMOS-beeldsensoren te bestuderen, maar ook ontwerp technieken voor te stellen
die gebaseerd zijn op de IC-ontwerpregels die de stralingshardheid van de
CMOS-beeldsensoren kan verbeteren.
Hoofdstuk 2 geeft eerst kort een samenvatting van de voordelen van 4T pixels in
vergelijking met 3T pixels in de vorm van ruis- en donkerstroomprestatie.
Verschillende elektro-optische parameters van 4T pixels worden ook in de volgende
secties van dit hoofdstuk besproken, van ruisprestatie tot spectrale respons. Dit
hoofdstuk gaat verder met het grondig beschrijven van een belangrijke
pixel-prestatieparameter, namelijk verschillende donkerstroom
generatiemechanismen in de pixel, varirend van oppervlakte generatiestroom tot
diffusiestroom. Een temperatuursmeting kan worden gebruikt om verschillende
generatiemechanismen van de pixel donkerstroom te verduidelijken. Tevens wordt
een beknopte analyse gepresenteerd van de ruimtelijke verdeling van
donkerstroombronnen in een 4T pixel. Omdat MOS structuren de fundamentele
componenten van CMOS-beeldsensoren vormen, geeft Hoofdstuk 2 een
gedetailleerde inleiding tot de totale ioniserende dosiseffecten op
MOS-teststructuren die voor 4T pixels toepasselijk zijn. Het proces van elektron-gat
generatie, het vasthouden van lading en oppervlakte toestanden generatie, die
129
tijdens ioniserende straling voorkomen, worden in detail behandeld. In het laatste
deel van Hoofdstuk 2 wordt ook kort ingegaan op het herstel van stralingsschade en
de stralings geharde technieken.
In Hoofdstuk 3 wordt coor middel van meetresultaten het effect aangetoond van
zowel stralingsgenduceerde degradatie op de elektrische en optische prestatie van
zowel de in-pixel componenten als van de complete pixel array. Ten eerste worden
de donkerstroombronnen in de 4T pixel geanalyseerd. De transfer gate (TG)
transistor blijkt de belangrijkste bijdrager te zijn tot de donkerstroom vr en na de
straling. De huidige dunne-gate-oxide technologie lijkt inherent stralingstolerant
doordat er geen verschuiving van de drempelspanning waargenomen wordt voor de
in-pixel MOSFETs. Echter het effect van ioniserende straling op in-pixel MOSFETs
met een stripvormige gate uitgedrukt kan wordt door middel van een sterke stijging
van de lekstroom. Een pMOSFET of een nMOSFET met een volledige omsloten
gate layout bewijst meer stralingshard te zijn, doordat de laterale parasitaire lek
effectief omzeild wordt zodat de door straling genduceerde toename van de
lekstroom verminderd wordt.
De oppervlakte generatiestroom samen met de generatie aan derand van het PPD
depletiegebied in de 4T pixel wordt aanzienlijk geminimaliseerd door de p+ pinning
laag. Als gevolg daarvan is het donkersignaal van de PPD voor en na de straling niet
proportioneel aan de omtrek. De ioniserende straling heeft geen invloed op het PPD
pinning-spanning omdat het depletiegebied na de straling zich niet verder uitbreidt.
De lengte van de TG kan echter verschillende effecten hebben op het pixel
donkersignaal voor en na de straling. Vr aanvang van de straling domineert de
lekstroom generatie, die veroorzaakt wordt door de TG extensie, over de
overeenkomstige vermindering van het elektrisch veld zodat het donkersignaal nog
steeds stijgt met de toename in lengte van de TG. Daarentegen worden de effecten
in verlaging van het donkersignaal door de vermindering van het elektrisch veld
dominant de na straling, waardoor het pixel donkersignaal na de straling afneemt
met de extensie van de TG. Het is bewezen dat met het verminderen van de lage
amplitude van de TG-puls tot onder 0 Volt, het donkersignaal zowel vr als na de
straling omlaag gebracht kan worden. Dit komt doordat de oppervlakte toestanden,
die dienen als bronnen voor de generatie van het donkersignaal, wordt opgevuld
door de gaten.
Hoofdstuk 3 toont tevens een door straling genduceerde degradatie van de
kwantumefficintie voor korte golflengten. De door straling genduceerde
verandering van de optische transmissie van de dilektrische lagenboven de PPD
kan worden beschouwd als de oorzaak van deze degradatie.
Hoofdstuk 4 presenteert een onderzoek naar de effecten van elektrische spanning
condities op de pixel degradatie tijdens de straling, omdat de voorafgaande
experimenten in Hoofdstuk 3 uitgevoerd zijn zonder elektrische voorspanning
tijdens de straling. Hoe groter de voedingsspanning is, hoe heviger de door straling
genduceerde pixel degradatie is met betrekking tot het donkersignaal. Bovendien
wordt ook de rol van vastgehouden ladingen en oppervlakte-toestanden besproken
130
in termen van pixel herstel na uitstoken (anneal). Annealing gedurende 75 uur bij
85oC kan de meerderheid van de vastgehouden ladingen in de STI uitstoken zodat
de pixel gradueel herstelt van de opgelopen stralingsschade, wat gellustreerd
wordt door de daling van de pixel ruis in donker. Echter, een verdere annealing
verhoogt de ruis in donker juist weer doordat het netto aantal
oppervlakte-toestanden terug verhoogt na uitstoken gedurende 150 uur. Hoofdstuk
4 behandelt ook een interessant onderzoek naar het microscopische
degradatiemechanisme achter de toename van het macro pixel donkersignaal dat
veroorzaakt wordt door de straling. De ioniserende straling kan leiden tot een
verlaging van de per-pixel activeringsenergie en een toename van de trap-capture
dwarsdoorsnede.
Hoofdstuk 5 presenteert de stralingstolerante 4T pixels die ontworpen zijn met de
radiation-hardening-by-design technieken die een lagere toename van het
donkersignaal na de straling tonen in vergelijking met de referentie-pixel die geen
bescherming technieken tegen stralingschade heeft verkregen. De toepassing van
in-pixel transistors met een aangepaste layout kan bijdragen aan het beperken van
de toename van stralingsgenduceerde lekstromen zodat het pixel donkersignaal na
de straling verlaagd wordt t.o.v. van voorheen. De voorkeur wordt gegeven aan een
langere lengte voor de TG bij een voor straling geharde pixel. Voor de PPD kan een
toename van het pixel donkersignaal effectiever voorkomen worden door een
grotere afstand tussen de STI en de rand van de PPD. Dit wordt bevestigd door
zowel een simulatie als een meting. Het plaatsen van een extra poly-gate om de
floating diffusie (FD) knoop te isoleren tegen de STI effecten, kan de oppervlakte
lekstroom effectief onderdrukken en het pixel donkersignaal na de straling verlagen.
Echter, vanwege de beperking van de ontwerpregels, zorgt het fysieke ontwerp van
de overlaplengte van de TG boven de p+ pinning-laag niet voor een reductie van het
hoge elektrisch veld in het PPD-TG overlapgebied. Een reductie van het electrisch
veld leidt in principe tot een verlaging van het pixel donkersignaal. Daarom is het
PPD-TG overlapgebied nog steeds de hoofdbron van het donkersignaal voor en na
de straling, zelfs voor de door straling geharde 4T pixel in dit werk.
Bovendien wordt in Hoofdstuk 5 ook het nadeel getoond van straling geharde
technieken op de pixel optische prestatie: een verlaging van de spectrale respons.
Dit komt door het feit dat de radiation-hardening-by-design technieken het
lichtgevoelige gebied verkleinen.
Hoofdstuk 6 tenslotte vat de belangrijkste resultaten van het project werk met
betrekking tot de ioniserende straling effecten van 4T pixels en de
radiation-hardening-by-design technieken samen. Bovendien worden er ook een
aantal suggesties en richtlijnen voorgesteld voor de toekomstige werkzaamheden
wat betreft pinned fotodiode 4T CMOS-beeldsensoren die toegepast worden in een
straling omgeving.
131
Abbreviation
3T: 3-Transistor
4T: 4-Transistor
ADC: analog-to-digital converter
APS: active pixel sensor
BSI: back-side illumination
CCD: charge coupled device
CDS: correlated double sampling
CG: conversion gain
CIS: CMOS image sensor
CMOS: complementary metal-oxide-semiconductor
DDS: delta double sampling
DR: dynamic range
ELT: enclosed layout transistor
FD: floating diffusion
FOXFET: field oxide field-effect-transistor
FPN: fixed pattern noise
FSI: front-side illumination
FW: full well
MNR: Meyer-Neldel relationship
MOS: metal-oxide-semiconductor
PPD: pinned photodiode
PPS: passive pixel sensor
QE: quantum efficiency
RHBD: radiation-hardening-by-design
RS: row selector transistor
RST: reset transistor
RTS: random telegraph signal
S/H: sample-and-hold
SF: source follower
133
SNR: signal-to-noise ratio
SRH: Shockley-Read-Hall
STI: shallow trench isolation
TG: transfer gate transistor
TID: total ionizing dose
WKB: Wentzel-Kramers-Brillouin
134
Acknowledgement
No words can fully express my gratitude. A PhD project work involves not only
the individual research activities but also the support from people around me. I
cannot imagine how my PhD journey would look like without the contribution
coming from all of you.
First and foremost, I would like to heartily thank my promotor, Prof. dr. ir.
Albert Theuwissen, who introduced me to the image sensor world and guided me
through my PhD research. He not only imparted knowledge to me which let me
grow academically, but also encouraged and enlightened me when I met with
challenges. In addition, I gratefully acknowledge his patience over the last few
years. He is an excellent teacher as well as a great example to the students. His
enormous support is indispensable to my PhD project and this PhD dissertation.
I would also like to express heartfelt thanks to my PhD committee members,
Prof. P. Magnan, Prof. C. Claeys, Prof. C. Beenakker, Prof. R. Dekker, Prof. P.
French and Dr. S. Nihtianov, for your efforts on my thesis and your valuable
advices. Your comments spur me on to further improvements.
I have been assisted by many people to help my PhD project along smoothly and
effectively in the last few years. I am deeply grateful to Hans Stouten and Tim
Poorter of Philips Medical Systems, Best, the Netherlands, for your help and
involvement in the radiation work on the sensors. Marc Horemans gave me a lot of
essential help to the measurement board and software. I cannot forget that Marc
came on Saturdays to help me when the project work became urgent, and I owed
much to him. My appreciation also goes to Adri Mierop of Philips, who helped me
with the measurement set-up and chip debug. He even made a day off to come to
help when he already joined another company. When need is highest, help is
highest. I have to express my thanks to Ren Leenen and Jan Bosiers of Teledyne
DALSA, Eindhoven for your great help on the spectral response measurement
when I highly needed support. I am thankful to Peter of DIMES, TU Delft for his
assistance of the device characterization test instrument. I also feel very much
indebted to CMOSIS, who provided me of the samples for measurements. I lack
words with which to express my thanks for their contribution to my PhD project.
In addition, I would like to thank Prof. Kofi Makinwa and Prof. Paddy French
for their efforts and management to make the Electronic Instrumentation lab a nice
and recommendable place to carry out research, and all my colleagues who made
my stay at the lab a truly memorable experience. I am particularly grateful to the
image sensor group: Yang, Gayathri, Xiaoliang, Bernhard, Mukul, Ning, Yue,
Xinyang, and Rao, for your assistance and valuable discussion. It has been a great
honor to work together with all of you, which also let me learn from you. I would
in particularly mention Bernhard Bttgen and Mukul Sarkar for helping me with
the chip measurement and tape-out. I also have to offer my sincere thankfulness to
135
your patience with the long and tedious discussion that we had before. Thanks,
Bernhard and Mukul.
I should not forget to mention my thanks to Berenice, Lukasz, Rosana, Gregory,
Junfeng, who shared with me a lovely office full of fun. I would also like to thank
the technical support team: Piet, Zu-Yao, Antoon, Jeroen, Jeff and Maureen for
their help with the instrumentation and the ICT. Special thanks go to Piet for his
help to administrate my computer, to Zu-Yao for his assistance with the FPGA,
and to Antoon for his help with my Linux accounts. I also acknowledge Willem,
Ilse, Joyce and Karen for their financial and administration support. I am also
grateful to the other colleagues at the lab: Zili, Qinwen, Agung, Ruimin, Lei, Arvin,
Zhichao, Eduardo, Nishant.
Moreover, I am grateful to Sarah von Galambos for her help on the language
polishing of my thesis.
My gratitude also goes to STW for supporting my PhD project.
Next, I would like to use this opportunity to express my sincere appreciation to
all my beloved friends who have been always solidly at my back and bring the
sunshine into my life. Thank you, Tan Haihua, Wang Yun, Zhang Liang, Zhou
Xiaochun, Xu Ying, Yu Junxin, Wang Jinrong, Zheng Yi, Fu Xinhai, Huang Cong,
Yan Han, Chutham, Luca, Alessandro, Giuseppe, Gunnar, Liesbeth and Claudia. I
thank all my friends and all the well-wishers for your support and understanding
during my life in Delft.
Last but not least, I would like to thank my family for your great love and
encouragements. Thank you for being a harbor whose door is eternally open for
me wherever I go. Thank you, my wife, Zhang Qin, for your great understanding
and continued support. Thank you, my papa and my mama. Well all comes down
to this: thank you, my family.
Jiaming Tan
Delft, March, 2013
136
List of Publications
Journal Articles
J. Tan, B. Bttgen and A. J. P. Theuwissen, Analyzing the radiation degradation
of 4-transistor deep submicron technology CMOS image sensors, IEEE Sensors
Journal, vol. 12, pp. 2278-2286, 2012.
A. Baiano, J. Tan, R. Ishihara, and C. I. M. Beenakker, Reliability analysis of

single grain Si TFT using 2D simulation, ECS Transactions, Thin Film
Transistors 9 (TFT 9), vol. 16, pp. 109-114, 2008.
Conference Proceedings
J. Tan and A. J. P. Theuwissen, Investigation of X-ray damage effects on 4T

CMOS image sensors, 2012 International Semiconductor Conference
Dresden-Grenoble, pp. 131-134, 2012.
J. Tan, B. Bttgen and A. J. P. Theuwissen, 4T CMOS image sensor pixel

degradation due to X-ray radiation, International Image Sensor Workshop, pp.
228-231, 2011.
J. Tan and A. J. P. Theuwissen, Total ionizing dose effects on 4-transistor CMOS

image sensor pixels, 2010 International Conference on Electron Devices and
Solid-State Circuits, pp. 1-4, 2010.
J. Tan, B. Bttgen and A. J. P. Theuwissen, Radiation effects on CMOS image

sensors due to X-rays, International Conference on Advanced Semiconductor
Devices and Microsystems, pp. 279-282, 2010.
J. Tan, B. Bttgen, and A. J. P. Theuwissen, X-ray radiation effects on CMOS

image sensor in-pixel devices, International Conference on Solid-State Devices
and Materials, pp. 299-300, 2010.
J. Tan, A. Baiano, R. Ishihara and C. I. M. Beenakker, 2D simulation of

hot-carrier-induced degradation and reliability analysis for single grain Si TFTs,
The annual workshop on semiconductor advances for future electronics and
sensors, pp. 600-603, 2008.
Y. Chen, J. Tan, X. Wang, A. Mierop and A. J. P. Theuwissen, X-ray radiation
137
effect on CMOS imagers with in-pixel buried-channel source follower, Proc.
ESSDERC, pp. 155-158, 2011.
Y. Chen, J. Tan, X. Wang, A. Mierop and A. J. P. Theuwissen, In-pixel

buried-channel source follower in CMOS image sensors exposed to X-ray
radiation, Proc. IEEE Sensors, pp. 1649-1652, 2010.
138
About the Author
Jiaming Tan was born in Shanghai, China, in September,

1984. He started with the bachelor program in 2002,
specializing in technical physics, at Xidian University. After
he received the bachelors degree in 2006, he completed the
Master degree (Cum Laude) in microelectronics from Delft
University of Technology (TU Delft), in 2008. In 2007, he
joined the Thin Film Transistor group at the Department of
Electronic Components, Technology and Materials (ECTM),
DIMES, Delft, the Netherlands, where he worked on his
masters thesis project entitled Reliability Study of Single
Grain Silicon Thin Film Transistor with Device Degradation Modeling. Since 2008,
he has been with the Image Sensor Group at the Electronic Instrumentation
Laboratory, TU Delft, the Netherlands, supervised by Prof. dr. ir. Albert
Theuwissen, starting his PhD research project. Jiamings main research interest is
radiation-tolerant CMOS image sensor design and radiation effects on solid-state
CMOS image sensors with pinned-photodiodes.
139

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4T CMOS Active Pixel Sensors under

ter verkrijging van de graad van doctor

in het openbaar te verdedigen

Prof. dr. ir. A.J.P. Theuwissen

Rector Magnificus voorzitter

Printed by: Ipskamp Drukker B.V., Enschede, The Netherlands

Copyright 2013 by Jiaming TAN

All rights reserved. No part of this publication may be reproduced or distributed in

Chapter 1 Introduction to CMOS Image Sensors in Radiation Environments .................. 1

The invention of solid-state image sensors revolutionized photography by

1.1 Development of Image Sensors and Photography

Generally speaking, photography is the practice of producing images by the

1.1.1 Early History of Photography and Cameras

1.1.2 CMOS Image Sensors: Past, Present and Future

Traditional cameras using photographic film continued evolving after 1900 in

electronic signals which utilize the photoelectric effect. Light, as a form of

transistors suffered from variation in threshold voltage and instability of their

CCD Image Sensor

1.2 CMOS Image Sensors in Radiation Environments

1.2.1 Space Application of CMOS Image Sensors

1.2.2 Medical Application of CMOS Image Sensors

The innovation of digital radiography has revolutionized medical X-ray imaging

also simultaneously in multiple locations with the help of modern digital

Amorphous Silicon TFT

1.3 Basics of Radiation Sources and Damage

As discussed in the previous section, the application of CMOS image sensors in

Figure 1-3. Classification of radiation effects on electronic instruments [1.32].

Despite the different radiation interaction mechanisms, the radiation effects on

1.4 Motivation and Objectives

1.5 Thesis Structure

the degradation of the sensor optical characteristics due to X-rays.

[1.10] P. Noble, Self-scanned silicon image detector arrays, IEEE Trans.

2.1 CMOS Image Sensor Pixels

Complementary Metal Oxide Semiconductor (CMOS) image sensors (CIS) can

Active Pixel Array

Figure 2-1. Architecture of CMOS active pixel sensor (APS).

Figure 2-2. 3T pixel schematic.

In 3T pixels, the photodiodes are composed of reverse-biased p-n junctions, as

Sample after Sample after

Figure 2-4. 4T pixel schematic.

Figure 2-5. Device simulation of the PPD and the TG in a 4T pixel.

2.2 Noise Sources in Pinned Photodiode 4T Pixel

2.2.1 Fixed-Pattern Noise

Depending on the illumination condition, fixed-pattern noise consists of dark

2.2.2 Temporal Noise

Compared to fixed-pattern noise, some types of temporal noise in the 4T pixel

where p is the photon shot noise and N p represents the photon-generated

where V 1/f is the 1/f noise in voltage, K is a process-dependent constant,

where i is the thermal noise in ampere, k is Boltzmanns constant, T is the

The readout noise floor in 4T CMOS image sensors is usually limited by

2.3 Spectral Response of 4T Pixels

The basic function of a pixel is to respond to light. Therefore, it is essential to

boundaries, it has to undergo changes in amplitude and direction due to multiple

wavelength. During the measurements, if the wavelength bandwidth needs to be

2.4 Other Performance Parameters of the 4T Pixel

(a) Full Well Capacity and Dynamic Range

where C FD is the capacitance of the FD node in 4T pixels, q is the electron

2.5 Dark Current in 4T Pixels

2.5.1 Device Physics for Dark Current Generation

Generation Current in the Depletion Region

Current generation through a band-to-band free carrier generation process is

If the thermal equilibrium condition is disturbed, then the recombination and

The electron lifetime, n , is shown as [2.30]: