Analytic Calculation of the DC-Link Capacitor Current

for Pulsed Three-Phase Inverters

Folker Renken
Automotive Systems Powertrain
Siemens VDO Automotive AG
Siemensstrae 12
D-93055 Regensburg
Phone: ++49 941 790 5385 Fax: ++49 941 790 90541 E-Mail: folker.renken@siemens.com http://www.siemensvdo.com

Abstract - For pulsed three-phase inverters with symmetrical load In figure 2 the pulsed control scheme of the three-phase
the capacitor current in the dc-link circuit is analytically inverter is presented. Above the three 120-shifted sinusoidal
calculated. These calculations can be applied for a constant dc- control voltages us1, us2, and us3 are compared with a higher
voltage as well as for sinusoidal modulated voltages and sinusoidal
frequency triangle shaped modulation voltage um. If one phase
currents at the output. The additional load of the dc-link capacitor
caused by harmonic currents of the filter circuit or by switching of the sinusoidal control voltages is higher than the
transitions of semiconductors is examined, too. At last, the modulation voltage the high-side switch of this phase is
calculations are examined by practical measurements. turned-on. In the other case the low-side switch of this bridge-
leg is connected through. In this way the frequency of the
I. INTRODUCTION
u um us1 us2 us3
Pulse inverters in uninterruptible power suppliers became
generally accepted with the further development of
disconnectible power semiconductors in the last years [1]. 1t
The dc-link capacitors contribute substantially to the volume,
to the weight and to the costs of these inverters. For this
reason the necessary expenditure of capacitors must be uP1- uP1- G
determined exactly to prohibit over design if possible. In most ud
applications the dc-link capacitor effort is dependent on the
load current. For pulsed three-phase inverters with
symmetrical load the capacitor current in the dc-link circuit is 1t
uP2- uP2- G
analytically calculated. The power stage of the pulse inverter ud
is presented in the following figure.

iE Ld id 1t
uP3- uP3- G
SH1 SH2 SH3 ud
iCd iP1 LP1 L1
uE iP2 LP2 L2 1t
Cd
iP3 LP3 L3
uP12 uP12 G
ud
SL1 SL2 SL3 uP1-
uP2- CP1 CP2 CP3
uP3- Y 1t
Fig. 1: Power stage of a pulsed three-phase inverter
-ud
The power stage consists out of three inverter-legs, an input uP23
filter circuit with dc-link capacitors and a three-phase filter ud
circuit on the alternating voltage side.
1t
II. PULSE CONTROL SCHEME OF THE INVERTER
-ud
For the calculation of the dc-link capacitor current, three sine-
uP31 uP31 G
modulated phase voltages uP1-, uP2- and uP3- are assumed, ud
whose fundamental part has the same amplitude and a phase
shift angle of 120 to each other. Beyond that a symmetrical
load with any phase shift angle P1 as well as three-phase 1t
currents iP1, iP2 and iP3 at the output of the inverter are -ud
presupposed. The dc-link voltage ud at the dc-input of the 90 180 270 360

inverter bridge is assumed as constant. Fig. 2: Pulse control scheme of the three-phase inverter
triangle shaped modulation voltage um determines the pulse In figure 4 the pulse generation of the input current id in the
frequency of the inverter. The fundamental frequency is given inverter for different fundamental phase shift angles is
by the frequency of the control voltages. presented. From the drawn envelopes it is clearly
recognizable, that the waveforms of the curves after 1/6 of the
In the middle of the figure three half-bridge voltages uP1-, uP2-, fundamental period repeat always. The average value of the
and uP3- with the fundamental oscillation frequency are input current id- is positive with small phase shift angles
shown. The lower part of the figure shows the connected (motor operation), equal to zero with P1 = 90 and takes with
voltages uP12, uP23 and uP31 between the phases. It can clearly larger angles to negative values (generator operation). The
be seen - that with subtraction of the phase voltages during difference between the input current id and their average value
one period - two pulses are formed. These voltage waveforms id- flows in the dc-link capacitors [2].
at the load have approximately sinusoidal output currents in
the individual phases of the inverter as consequence. P1 = 0 id id-
iP
For ideal sinusoidal phase currents the generation of the input
current id in a three-phase inverter is presented in figure 3.
The modulation factor amounts thereby to m = 0.8 and the 1t
fundamental phase shift angle is P1 = 45. Above the output P1 = 45 id id-
voltages uP1-, uP2- and uP3- are shown with the sinusoidal iP
output currents iP1, iP2 and iP3 of the inverter bridge-legs.
These sinusoidal currents divide themselves in each case in
the high side and low side transistor of the bridge-legs. In the 1t
figure the current pulses are shown, while the high side
transistor of the respective bridge-leg leads. The sum of the
current pulses of all three-phases results in the input current id iP P1 = 90 id id-
of the inverter bridge.
uP1- uP1- G
1t
ud
-iP
1 t

iP iP1 P1 = 135 id id-

1t 1t
-iP
-iP
uP2- uP2- G
ud
P1 = 180 id id-

1 t 1t

iP iP2 -iP
30 60 90 120 150 180
1t Fig. 4: Input current id with different phase shift angles P1
-iP

uP3- uP3- G III. CAPACITOR LOAD FOR SINE WAVE CURRENTS

ud Now the rms-current in the dc-link capacitors is analytically
calculated for sine wave output currents with arbitrary phase
1 t shift angles f P1 and modulation factors m. For this purpose
iP iP3 the three sinusoidal desired waveforms uS1, uS2 and uS3 are
presented in the following illustration above. With pulse
1t width modulation these three sinusoidal desired curves are
-iP
compared with the triangle modulation voltage um. The
frequency of the sinusoidal desired voltages determines the
P1 = 45 id- id fundamental frequency and those of the modulation voltage
iP
the pulse frequency of the inverter.

It is presupposed that the pulse frequency of the inverter is

1 t
very large, the three duty cycle curves follows in principle the
90 180 270 360 same waveforms as the desired voltages, because of the
Fig. 3: Generation at the inverter bridge input current id comparison with the triangle modulation voltage (figure 5).
With the indicated duty cycle waveforms the output of the period TPX is presented. Thereby altogether four time
bridge-leg is connected in each case to the positive pole of the durations have to be differentiated.
dc-input, so output current flows in the high side transistor of
this bridge-legs. TPX

te1(TPX)
u um us1 us2 us3

1t te2(TPX)

te te1 te2 te3

TP TP TP TP te3(TPX)
1.0

0.5

Fig. 6: The different time durations of the output currents

1t in the high side switches at the pulse period TPX

P1 iP1 iP2 iP3 In table I the input currents in the different time durations of
i the elementary period TPX of figure 6 are summarized. If all
high side switches are in the blocking state, the current in the
dc-input is zero. If only high side switch SH1 is turned on, the
1t
phase current iP1 flows in the dc-input. If the elements SH1 and
SH2 switched on, the input current id can be calculated from
90 120 150 180 210 240 the sum of phase current iP1 and iP2. If all high side switches
Fig. 5: Duty cycle waveforms and output currents are switched on, then the current in the dc input consists out
of the three-phase inverter
of the sum of all three-phase currents. With not connected
neutral point the input current becomes zero.
Duty cycle waveforms of the phase voltages:

[ ]
t e1 (t ) 1 Table I
= 1 + m sin( 1 t ) (1) Current id in the different time durations of TPX
TP 2

[ ]
t e 2 (t ) 1 Time durations Input current id:
= 1 + m sin( 1 t 120) (2)
TP 2 TPX te1 (TPX ) 0
t e3 (t ) 1
TP
[
= 1 + m sin( 1 t + 120)
2
] (3) te1 (TPX ) te 2 (TPX ) iP1 (TPX )

In the figure below the three currents at the output of the te 2 (TPX ) te3 (TPX ) iP1 (TPX ) + iP2 (TPX )

te 3 (TPX ) iP1 (TPX ) + iP 2 (TPX ) + iP 3 (TPX )

bridge-legs are presented. These currents all have the same
amplitude and are shifted to the voltage by the same phase
angle. (Symmetrical load).
Fundamental currents waveforms of the phases:
iP1 (t ) = iP sin ( 1 t P1 )
iP2 (t ) = iP sin ( 1 t 120 P1 )
iP3 (t ) = iP sin ( 1 t + 120 P1 )
Now all periods in the range 90 = t = 150 can be divided
according like elementary period TPX into time durations. If it
(4)
is considered that the sum of the three currents at the output
(5) of the bridge-legs is zero, the time durations in all periods can
be divided into three time durations with the following
(6) different current composition:

As shown in chapter II the waveform of the bridge input 1. te 31 (t ) = TP te1 (t ) + te3 (t ) (8)
currents id repeats after 1/6 of fundamental period. For this
id 31 (t ) = 0 (9)
reason the dc-link current in the range 90 = t = 150 can be
calculated. Within this range the following condition applies: 2. te12 (t ) = te1 (t ) te 2 (t ) (10)
te1 (t ) te 2 (t ) te3 (t ) id 12 (t ) = iP1 (t ) (11)
1 (7)
TP TP TP
3. te 23 (t ) = te 2 (t ) te3 (t ) (12)
Now for the elementary pulse period TPX the input current id
of the inverter within the range 90 = t = 150 is derived. In id 23 (t ) = iP 3 (t ) (13)

iP1 (t ) + iP 2 (t ) + iP 3 (t ) = 0
figure 6 the time durations of the different output currents in
with
the high side switches of the bridge-legs in the elementary
The duty cycles can be calculated by the switching on times In figure 6 the current in the dc-link capacitors normalized to
regarded to the elementary period TP. Using the duty cycle the peak value of output current as a function of the phase
and the current waveform during the fundamental period the shift angle is presented for different modulation factors.
three ranges results in the following equations:
0.5
t e 31 (t )
m cos ( 1 t + 60)
3 ICd
1. = 1+ (14) iP
0.4
TP 2
id 31 (t ) = 0 (15)
0.3

t e12 (t )
m cos( 1 t 60)
3 m = 1.0
2. = (16) 0.2 m = 0.8
m = 0.6
TP 2 m = 0.4

id 12 (t ) = iP sin ( 1 t P1 )
m = 0.2
(17) 0.1

t e 23 (t )
m cos ( 1 t )
3
3. = (18) 0.0
-180 -135 -90 -45 0 45 90 135 180
TP 2 P1
id 23 (t ) = iP sin ( 1 t + 120 P1 ) (19) Fig. 7: Current in the dc-link capacitors as a function
of the fundamental phase shift angle
Now with these equations the rms input current Id of the It can clearly be recognized that with small modulation
inverter bridge can be determined. First the rms-value at the factors the load of the dc-link capacitor current is much larger
elementary pulse periods is determined (parentheses). The with ohmic load as with inductive or capacitive load. With
total rms-current can by calculated by integration of the rms- increasing modulation factor m the rms-value of the dc-link
values of all pulse periods.
capacitor current for all phase angles P1 becomes larger.
e 12 (t ) t e 23 (t ) (20)
t = 150 Only if the capacitor current with more rising modulation

[ ] [ (t )]
2 t
i d 12 (t )
3 2
Id =

t = 90
TP
+ id 23
TP
dt factor reaches its maximum, the current reduces again with
ohmic load but with inductive or capacitive load continues to
m 3 rise.
1 + 4 cos ( P1 )
2
I d = iP (21)
4 IV. CAPACITOR LOAD WITH HARMONICS
The dc-component of the current flows over the dc input of The calculated dc-link capacitor current in chapter III is made
the inverter bridge. This component can be calculated if at for a sinusoidal current iP at the output of the inverter bridge.
first the average value at the elementary pulse periods is But by the pulse width modulated voltage however also
determined (parentheses). Subsequently the average value harmonic current in the filter circuit occurs. This currents and
within the range 90 = t = 150 will be determinate. the fundamental currents together forms the output current of
t = 150
t e 12 (t ) t e 23 (t ) the inverter bridge. The additional load in the dc-link
I d =
3
[
i d 12 (t ) ] [
+ i d 23 (t ) ] dt (22) capacitors of these higher-frequency currents must to be
t = 90
T P T P
determined with the help of the Fourier analysis.
I d = iP m cos ( P1 )
3 (23)
4 LP1 iP1 LP1 L1
For ideally smoothed current in the dc-input of the inverter LP2 iP2 LP2 L2 Symmetrical
Load
bridge iE = id-, which occurs arises by the geometrical LP3 iP3 LP3 L3
subtraction of total rms-current Id and dc-component Id-
uP1- uP1Y
results in the current of the dc-link circuit capacitors. uP2Y CP1 CP2 CP3
uP2- uP3Y
I Cd = I d I d
2 2
(24) uP3- uPY- Y

3 m 3 m 9 m2

cos ( P1 )
2
I Cd = iP + (25)
4 16 LP1 iP1 LP1 L1
The result shows: The rms-value of the current in the dc-link LP2 iP2 LP2 L2
capacitors is depended on the modulation factor, the LP3 iP3 LP3 L3
fundamental phase shift angle and the height of output
current. The maximum rms-current in the dc-link capacitors uP1- uP1Y iSou1 iSou2 iSou3
uP2Y CP1 CP2 CP3
mounts to: uP2- uP3Y
25 uP3- uPY- Y
I Cd = iP 0.46 iP 0.65 I P (26)
12 2
with P1 =0 10 3 Fig. 8: Filter circuit with symmetrical load (above) and filter circuit
and m= 0.613 with zero load and substitute load at the input (below)
9
In figure 8 (above) the filter circuit of the three-phase inverter With the pulse width modulation the pulse width 2 changes
is presented. During the design of the filter circuit elements a over the fundamental period. This is shown by the duty cycle
compromise between large losses with large inductance and waveform in equation 1. With this function the waveform of
small capacity as well as with better rule dynamics of the the pulse width 2 (1t) can be determined.
inverter with small inductance and large filter circuit capacity te1 m
must be reached. For the inductance design it is usual to use ( 1 t ) = = + cos(1 t ) (32)
the permissible maximum current in the inductance during the TP 2 2
pulse period referred to the peak value of the nominal output The pulse waveform in an elementary period is indicated by
current. the size t. This size can be calculated as a function of the
iLP = (0.1 0.3) iAN (27) fundamental period t(1t). The factor indicates the
number of pulses per fundamental period = P/1.
max

The harmonic current which is limited by the inductance, t

flow over the capacitor and produces a voltage ripple which is t ( 1 t ) = 2 = P t = 1 t (33)
superimposing the output voltage. This static voltage ripple is TP
specified to a maximum permissible value by the design of These equations now result in the voltage waveform of the
the filter capacity. A maximum voltage ripple of smaller than pulse width modulated signal at the output of the bridge-legs.
1% of the peak value of the output voltage is usual [3]. The variable in the cosine function indicates the phase shift
u AP max 0.01 u AN (28) angle of the pulses in the pulse periods. The height of the
voltage pulses amounts to ud.
For this small voltage ripple during the pulse periods
sinusoidal voltage and current waveforms at the output of the 1
[
u P1 ( 1 t ) = u d 1 + m cos( 1 t ) + ] (34)
filter can be accept in very good approximation. The 2
sinusoidal current at the output forms together with the filter


[1 + m cos(1 t )] cos [ ( p 1 t + )]
2
capacitor currents the output current of the bridge-legs. sin
=1 2
Now for the calculation of the input current id the currents in In figure 10 the half bridge voltage uP1- and their fundamental
the bridge-legs are to be derived. For this the alternate filter portion is presented. The modulation factor of this voltage
circuit is presented in the figure 8 below. In this mathematical amounts to m = 0.8 and the pulse number per fundamental
model the filter circuit of the inverter is without load, so that period is = 45. Below in the figure the spectra of this half
only the idle current flows in the filter circuit. The load of the bridge voltage can be seen. The standardized dc-component
inverter is reproduced thereby by the current sources arranged of the voltage amounts to 0.5 and the fundamental component
parallel to the filter circuit. The following equation shows the are according to the modulation factor equal 0.8. Beyond that
current waveform in the source of phase 1. by the modulation of the voltage in each case frequency bands
iSou 1 (t ) = iSou sin ( 1 t Sou ) (29) occurs with the pulse frequency and with multiples of the
pulse frequency. All harmonics of the waveform are odd.
The current waveforms of the other sources have a phase
angle of 120 to the current in equation 29, so that all sources 1.2
u uP1- G uP1-
together forms a symmetrical load. The addition of the ud 1.0
m = 0.8

currents of filter circuit and current sources results in the

0.8
output current of the bridge-legs. For the calculation of the
dc-link capacitor current first the pulse signal presented in the 0.6

following figure is to be mathematically described with the 0.4

help of the Fourier analysis. 0.2

u 2
0.0

-0.2
0 45 90 135
1t 180

ud
0.6
u uP1- m = 0.8
0 2 3 4 t ud
0.5

Fig. 9: Pulse waveform with constant pulse width

0.4

In the figure a pulse waveform with the constant pulse width 0.3

2 and the height ud is presented. This waveform can be

0.2
mathematically described by the following functions [4].
2 ud sin () sin (2 )
0.1
(30)
u ( t ) = + cos( t ) + cos( 2 t ) + ...
2 1 2 0.0
0 45 90 135 180 P/1 225

2 ud
+ sin ( ) cos( t )
1 (31) Fig. 10: Half-bridge voltages uP1- with the fundamental
u ( t ) =
2 =1
oscillation frequency uP1- G


cos [ cos( )] = cos
The voltage at the neutral point uPY- can be determined as the
k J ( ) cos( )
(40)
sum of all three half bridge voltages divided by three. To =0 2
calculate this voltage first the voltage uP2- and uP3- must be
with 1 if = 0
determined. These voltages have a phase angle of 120 to the k =
voltage uP1-. However it must be noted with the calculation 2 if = 1, 2, 3, ...
that the pulse position is equal. For this reason the expression With the help of these Bessel functions now first the phase
1t must stay unchanged. In such a way the same pulse voltage uP1Y can be calculated. With the result that in the
position is reached as shown in figure 2 and 3. following equation is presented the individual spectra are
recognizably. This makes the following calculation of the
[ u P1 (1 t ) + u P2 (1 t ) + u P3 (1 t )]
1
u PY (1 t ) = (35)
phase current possible.
3
Ud m (41)
u PY (1 t ) = [uP1 (1 t ) + u P1 (1 t 120) + u P1 (1 t + 120)] (36) uP1Y (1 t ) = cos(1 t ) +
1
3 2

The following figure shows the calculated waveform of the

2 U d 2 ( + ) m
3 1 cos 3
sin

k J
2

neutral point voltage uPY- with the average value for the =1 = 0 2
modulation factor m = 0.8 and for the pulse number = 45.
Below in the figure again the individual spectra of the voltage cos [( ) 1 + ] + cos [( + ) 1 + ]

are presented. The standardized dc-component of the voltage
amounts to 0.5. Furthermore, with this voltage all by three With the determination of the phase current iP1 the individual
dividable spectra from figure 10 arises. voltage components are in each case divided by the absolute
value of the resistance and provided with the appropriate
1.2
u uPY- m = 0.8 phase shift angle. For the fundamental component from the
ud
1.0
equation 41 only the "no-load" operation of the filter circuit is
0.8 considered. As additional fundamental load the current source
0.6
iSou1 is used as shown in figure 8.
Ud m
0.4
iP1 (1 t ) = iSou sin ( 1 t Sou ) + cos( 1 t PF ) + (42)
2 Z PF
0.2

2 U d 2 ( + ) m
0.0
3 1 cos 3
sin

k J
2

-0.2
=1 = 0 2
0 45 90 135
1t 180

cos [( ) 1 + PO (, )] +
1

PO (, )
0.6
u Z
uPY- m = 0.8
ud
0.5

cos [( + ) 1 + PO + (, )]
1
0.4 Z PO + (, )
0.3
In equation 42 the following absolute values of the resistances
0.2 ZP1 and ZPO(, ) as well as the phase shift angles P1 and
PO(, ) are to be used:
0.1

2
0.0 1
0 45 90 135 180 P/1 225 Z PF = RLP
2
+ 2 LP
2 CP
Fig. 11: Neutral point voltage uPY- with the average value
1
The phase voltage uP1Y is the difference between half bridge - 2 LP
2 CP
and neutral point voltage. Exactly as with the calculation of PF = arctan
RLP
the neutral point voltage there also must paid attention to the

correct phase shift angle and pulse position.
2

+ ( ) 2 LP
1
u P1Y (1 t ) = u P1 (1 t ) u PY (1 t ) (37) Z PO (, ) = RLP
2

( ) 2 C P

(38)
u P1Y (1 t ) = [2 u P1 (1 t ) u P1 (1 t 120) u P1 (1 t + 120)]
1

( ) 2 LP ( ) 2 C
1
3
To calculate the phase current iP1 with the voltage uP1Y the PO (, ) = arctan P

RLP
cosine function in the argument of the sine - and cosine

functions by means of the Bessel functions must be dissolved.
The following relations apply: In figure 12 the phase voltage uP1Y and the phase current iP1 is
presented with half nominal load and with a phase shift angle


sin [ cos( )] = sin k J ( ) cos( )
(39)
of P1 = 45. The fundamental current with superimposed
=0 2
harmonics, is clearly recognizable thereby. In the figure below
the individual spectra of the voltage uP1Y and the current iP1 after 1/6 of the fundamental period. This is also shown by the
can to be seen. spectra in the figure below, which are divisible by six in each
case. The dc-component corresponds to equation 23 (half
From the spectra presented in figure 10 only the not by three nominal current). Beyond that, frequency bands occur with
divisible voltage spectra remain. Each of these harmonics the pulse number and with multiples of the pulse numbers.
produced a current in the filter circuit. The more largely the
harmonic is the more the current is absorbed by the filter 0.6
id m = 0.8
i
circuit. iP1 G
0.4
u 0.8
ud m = 0.8
0.6
iP1 0.2
i 0.4
iP1G uP1Y
0.2
0.0
0.0

-0.2
-0.2
-0.4
0 45 90 135
1t 180

-0.6
0.6
i id m = 0.8
-0.8
iP1 G 0.5
0 45 90 135
1t 180

0.6 0.4
u
ud uP1Y m = 0.8
0.5 0.3
i
iP1G iP1
0.4 0.2

0.3 0.1

0.2 0.0
0 45 90 135 180 P/1 225

0.1 Fig. 13: Current id in the dc-link circuit without

harmonic output current (P1 = 45)
0.0
0 45 90 135 180 P/1 225
0.6
Fig. 12: Voltage uP1Y at the load and the output current iP1 i id m = 0.8

without and with harmonics (P1 = 45) iP1 G

0.4

With the phase current and the output voltages of the bridge-
legs now the current id in the input of the inverter bridge can 0.2
be calculated. As graphically presented in figure 3, the
respective phase current is thereby multiplied in each case by
0.0
the appropriate pulse pattern of the bridge-leg voltages and
the results afterwards added. For this calculation first the
-0.2
currents iP2 and iP3 and the voltages uP2- and uP3- must be 0 45 90 135
1t 180

derived. These currents have a phase shift angle of 120 to the

0.6
current iP1 and the voltages to voltage uP1-. However here in i
id m = 0.8
the calculation it must be noted that the pulse position is iP1 G 0.5

equal. For this reason the expression 1t must remain 0.4

unchanged. In such a way the same pulse position can be
reached as presented in figure 3. 0.3

u P1- (1t ) u ( t ) u ( t ) (43) 0.2

id (1t ) = iP1 (1t ) + iP2 (1t ) P2- 1 + iP3 (1t ) P3- 1
ud ud ud 0.1

uP1- (1t ) u ( t 120) (44) 0.0

id (1t ) = iP1 (1t ) + iP1 (1t 120) P1- 1 + 0 45 90 135 180 P/1 225
ud ud
Fig. 14: Current id in the dc-link circuit with
uP1- (1t + 120) harmonic output current (P1 = 45)
iP1 (1t + 120)
ud
In figure 14 the current id is presented with superimposed
In figure 13 the current id is presented for a sinusoidal phase harmonic phase currents iP. The phase shift angle of the
current iP and a phase shift angle P1 = 45. This curve of the fundamental waveform is P1 = 45. In opposite to the curve
current corresponds in principle to the drawn waveform of id in which is presented figure 13 still another additional higher
in figure 3. However number of the pulses ( = 45) is larger in frequency current is superimposed to the already with
this example. The course of the curve repeats in each case harmonics influenced input current. The course of the curve
repeats also here in each case after 1/6 of the fundamental instance, these large loads are important. That means that
period. This is shown at the spectra, which are presented in sinusoidal output currents for the dimensions of the dc-link
the figure below. capacitors are sufficient. The load of the capacitors for
sinusoidal output currents was presented in figure 7.
Now the influence of the harmonic filter currents (figure 12)
to the load of dc-link capacitor is calculated. Thereby it is Beside the harmonious currents at the filter circuit still current
presupposed, that an ideally dc-current flow iE = id- in the harmonics arise by switching processes in the bridge-legs.
input of the inverter (worst case). So the individual input This current was examined in [5, 6, 7] for single-phase
current harmonic components of the inverter bridge can be inverters. The tendentious results have also their validity for a
calculated in each case with sinusoidal phase currents and three-phase inverter. With small output load of the inverter
with harmonic filter current that are superimposing the the additional current of the switching processes in the dc-link
sinusoidal components. At first the rms-values of the circuit can substantially contribute to heating up of the dc-link
amplitudes of all harmonics in equation 45 are to be derived capacitors. During higher load usually again the calculated by
and then the calculated individual portions are added sine wave output current caused capacitor current dominated.
geometrically. But no statement for all semiconductor types can be made.
2 Beyond that this additional current contributed considerably
i

(45)
I d = Cd n by the pulse frequency of the inverter.
2
n =1
V. COMPARSION OF THE CALCULATIONS WITH
The calculations with additional harmonic filter currents are
PRACTICAL MESUREMENTS
related to them with sinusoidal current. In figure 15 the results
from the calculations as a function of the load are presented Now the calculated capacitor current in the dc-link circuit is
with different modulation factors. The maximum current to be compared with practical measurements of a MOSFET-
ripple specified by the dimensioning of the filter circuit inverter. The dc-link circuit of the inverter consists out of
amounts in this case to 0.3 AN. In the following figure the 7 electrolytic capacitors. For the 6 switches in each case
influence of the harmonic filter circuit current is presented 8 MOSFETs are connected in parallel. The inverter works
with 1 = 0 (above) and with 1 = 45 (below). with a pulse frequency of fP = 8 kHz. The nominal output
power of the inverter in continuous operation amounts to
4.0 PN = 6 kW and the input voltage is ud = 48V [8, 9, 10]. At the
ICd LC
iLP max = 0.3 iAN inverter output an electrical machine is attached, which can
ICd Sin
m = 1.0 1 = 0 work both in the motor and in the generator operation.
m = 0.8
2.0 m = 0.6 The currents in the individual capacitors of the dc-link circuit
are measured with current probes, whereby the individual
1.0 measured values are transfer over current transformers at first.
The waveforms of the individual capacitor currents are
0.0
presented and the rms-values are calculated with the
0.0 0.2 0.4 0.6 0.8 IP 1.0 oscilloscope.
IP N

4.0
Figure 16 above shows the current waveforms in three
iLP max = 0.3 iAN
capacitors of the inverter with an output current of IP = 158A
and with a phase shift angle of P1 = 130. At this phase angle
ICd LC
ICd Sin 1 = 45
m = 1.0 the electrical machine works in the generator operation.
m = 0.8
m = 0.6
2.0
The rms-value of the current in each individual capacitor
1.0
amounts to ICd1 12A. Beyond that the respective portions of
the peak output current P 1 32A and of the dc-current
0.0
Id- 1 -12A can be seen in the diagram waveforms apart from
0.0 0.2 0.4 0.6 0.8 IP 1.0 the period duration T1 10.2ms. The sum of the current
IP N
components in all 7 capacitors results in each case in the total
Fig. 15: Influence of the harmonic output filter current
on the dc-link capacitor current
current value. Below the current diagrams the most important
electrical parameter of the inverter are presented.
In the figure is clearly recognizable, that the harmonic ripple
current of the filter circuit only stresses the dc-link capacitors Below in the figure the current waveforms in the individual
considerable with small output currents iP < 0.3 iAN capacitors with an output current of IP = 238A and a phase
additionally. With larger output current the dc-link capacitor shift angle of P1 = 125 are presented. During this mode the
load corresponds to that with sinusoidal output current of the rms-current in each individual capacitors amounts to
inverter bridge in very good approximation. For the ICd1 18.5A. The duration of the fundamental period is
dimensioning of the capacitors in the dc-link circuit for T1 11.8ms, each peak value of output current is P 1 48A
and each input dc-current is Id- 1 -19A. Below the current necessary size of capacitors must be determined exactly to
waveforms also the most important electrical parameters of avoid over design. In most applications the dc-link capacitor
the inverter are presented. size is dependent by the current load.

In this publication the dc-link capacitor current for a three-

ich 3
40A phase inverter was analytically calculated. At first an ideal
smoothed input dc-voltage as well as sinusoidal currents at
the output of the inverter bridge is presupposed. The results
show that the input current of the inverter bridge consists out
800s of a dc-component with higher-frequency portions.
iCd 2
40A
While the dc-component flows in the input of the inverter, the
higher-frequency current portion in reality flows completely
over the dc-link circuit capacitor. This portion can amount
maximally to a value ICd = 0.46 P.
iCd 1 P 1 Id- 1

40A
In chapter IV the influence by current harmonics, which result
from the output filter circuit and from switching processes in
the inverter bridge is examined. It shows that with small
output power a clear capacitor load results by these
harmonics. But with higher output power again the calculated
UPY = 13.9 V Ud = 48 V f1 = 100 Hz P1 = 130
load caused by sine wave current dominates. The load of the
dc-link capacitors by this harmonics can be neglected.
IP = 158 A Id- = -86 A ICd = 84 A m = 0.8
At the end the calculated dc-link currents are compared with
40A iCd 3 practical measurements of an MOSFET inverter. The current
of the practical measurements corresponds in principle to the
theoretical waveforms. Beyond that a very good agreement
between the calculated and measured values exists.

iCd 2 800s
REFERENCES
40A

[1] J. Schmidt, "Einsatzbereiche, Anforderungen und Konzepte

iCd 1 P 1
40A
UPY = 15.7 V Ud = 48 V f1 = 85 Hz P1 = 125
IP = 238 A Id- = -130 A ICd = 124 A m = 0.9
Fig. 16: Current in three dc-link capacitors of the inverter
with different loads (practical measurements)
The current of the practical measurements corresponds in
principle to the waveforms of the capacitor current in figure 3.
The rms-value of this current depends to the size of output
current, on the phase shift angle and of the modulation factor.
The rms-value of the capacitor current is the same as the
calculated current which is presented in figure 7.
VI. CONCLUSION
Today pulse inverters are used world-wide within many
ranges for ac power supply, for drive train engineering and for
frequency conversion. The dc-link capacitor in the power
parts contributes thereby substantially to the volume, to the
weight and to the costs of such inverters. For this reason the
netzunabhngiger Stromversorgungen," Seminar Haus der Technik e.V.
Essen 1999
Id- 1
[2] K. Heumann, "Grundlagen der Leistungselektronik," Lehrbuch Teubner
Verlag Stuttgart 1975, 1. Auflage S. 178-182
[3] F. Renken, "Einphasige Wechselrichter mit hart und weich schaltenden
Transistoren fr statische unterbrechungsfreie Stromversorgungen",
Dissertation Univ. der Bw. Hamburg, VDI Verlag 1999, Fortschritt-
Berichte ISBN 3183271214, S. 35-82
[4] H.-J. Bartsch, "Taschenbuch mathematischer Formeln," Harry Deutsch
Verlag 1982, 6. Auflage S. 413
[5] F. Renken, "Analytic Calculation of the DC-Link Capacitor Current for
Pulsed Single-Phase H-Bridge Inverters", 10th EPE Toulouse 2003
[6] F. Renken, "Analytic Calculation of the DC-Link Capacitor Current for
Pulsed Single Phase H-Bridge Inverters", EPE Journal Volume 13
No 4 - September - October - November 2003
[7] Renken F. "Inverter with Soft-Switched Transistors for Uninterruptible
Power Supplies", 10. EPE Meeting/ Proceedings: Papers on CD ISBN
90-75815-07-7, Toulouse, France 2003
[8] V. Karrer, F. Renken, "Power Electronics for the Integrated Starter
Generator", Conference: Optimization of the power train in vehicles by
using the Integrated Starter Generator (ISG), Haus der Technik e. V.
Munich 2002, Proceedings Expert-Verlag ISBN 3-8169-2977-2, pp.
222-247
[9] F. Renken, V. Karrer, "Leistungselektronik fr den Integrierten Starter
Generator," 22. Tagung Elek-tronik im Kraftfahrzeug", Haus der
Technik Essen, Tagungs-Nr. E-H030-06-056-2, Stuttgart 2002
[10] Skotzek P., Reindl T., Poisel M., Eichenseher V., Karrer V., Allwang
R.: Steuergert fr den Integrierten Starter Generator im 42V-Bordnetz.
21. Tagung Elektronik im Kraftfahrzeug, Haus der Technik - Essen,
Mnchen Mai 2001