Course SS 0501 SDH Principle

Issue 2.0

Section 8 Transmission Performance

3 Objectives:
Understand meanings of common indices to measure error performance.
Understand the generation mechanism of system bit errors and the strategies to reduce bit errors.
Understand meanings of common indexes to measure system jitter performance.
Understand the generation mechanism of jitter and the strategies to reduce jitter.
Understand meanings of wander and availability.

Performance of the transmission system is of crucial importance to communication

quality of the whole communication network. The major transmission damage affecting
the transmission performance of SDH transmission network includes bit error, jitter and
wander.

8.1 Error Performance

Bit error refers to error in some bits of the digital bit stream after receiving, judging and
regeneration, resulting in quality deterioration of the transmission information. .

8.1.1 Generation and Distribution of Bit Errors

Bit error, which is a great harm to transmission system, will lower system stability or
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even interrupt transmission (over 10 ). Bit errors fall into two major categories in terms
of network performance.

1 Bit errors generated by internal mechanism

This kind of system bit errors, which can be judged by the long-term error performance
of the system, includes those generated by various noise sources, jitter , multiplexer,
cross-connection system and switch, and inter-symbol interference due to fiber
dispersion.

2. Bit errors generated by pulse interference

This kind of bit errors is generated by burst pulses such as electromagnetic

interference, equipment fault and transient interference of power supply. This kind of bit
errors usually occurs to the system abruptly in large amount and can be judged by the
short-term error performance of the system.

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8.1.2 Error Performance Measurement

Conventional error performance measurement is to measure the error performance of

end-to-end connected digital reference circuit of 64kbit/s channel for the whole
27500km distance based on the error conditions of the bits. As the transmission rate of
the transmission network is increasing, measurement of system error performance with
bit as the unit shows its limitation.
At present, the error performance of channels with high bit ratio is measured by block
(B1, B2 and B3 are all monitored for block errors), thus generating a group of
parameters based on block. The meanings of these parameters are as follows:

y Error Block
The block with bit errors in transmission is called error block.

B Tips:
For B1, B2 and B3 error blocks, only errors of odd bits instead of even bits can be monitored. Think why?

y Errored second (ES) and Errored second rate (ESR)

A specific second during which one or more block errors are found is called an errored
second. The ratio of total ESs to the total available time during a specified
measurement time segment is called ESR.

y Severely errored second (SES) and severely errored second rate (SESR)
A specific second during which not less than 30% block errors are contained or at least
one severe disturbance period (SDP) occurs is called SES.SDP means that during
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measurement the BER of all consecutive blocks is 10 or signal loss occurs in the time
segment equivalent to that of at least 4 consecutive blocks or 1ms (take the longer one
of the two).
The ratio of total SESs to total available time during measuring time segment is called
severely errored second rate (SESR).
Usually, SES is the burst block error generated by pulse interference, therefore, SESR
often reflects the capability of the equipment against interference.

y Background block error (BBE) and background block error rate (BBER)
The block error with errors appearing in the unavailable time and SES period deducted
is called background block error (BBE). The ratio of total BBEs to the total block errors
with block errors in the unavailable time and SES period deducted during a specific
period of measuring time is called background block error rate (BBER).
If the measuring time is long, BBER often reflects the bit errors generated inside the
equipment and is related to the performance stability of the devices used in the
equipment.

8.1.3 Bit Error Indices Related to Digital Section

ITU-T specifies the digital link as equivalent to a hypothetical reference digital link with
a full distance of 27500km, and allocates the highest error performance index for each

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section of the link, so as to meet the requirement for normal end-to-end (27500km)
transmission of digital signals after the respective sections of the main link are
connected into a string with the bit errors of each section not exceeding these indexes
(standards).
Presented below are the error performance indexes that should be complied with by
digital sections of 420km, 280km and 56km.

Table 8-1 420km HRDS error performance indexes

Rate (kbit/s) 155520 622080 2488320

ESR 3.69610-3 To be determined To be determined
SESR 4.6210-5 4.6210-5 4.6210-5
BBER 2.3110-6 2.3110-6 2.3110-6

Table 8-2 280km HRDS error performance indexes

Rate (kbit/s) 155520 622080 2488320

ESR 2.46410-3 To be determined To be determined
SESR 3.0810-5 3.0810-5 3.0810-5
BBER 3.0810-6 1.5410-6 1.5410-6

Table 8-3 50km HRDS error performance indexes

Rate (kbit/s) 155520 622080 2488320

ESR 4.410-4 To be determined To be determined
SESR 5.510-6 5.510-6 5.510-6
BBER 5.510-7 2.710-7 2.710-7

8.1.4 Strategies to Reduce Bit Errors

Reduce internal bit errors

Improvement on signal/noise ratio of the receiver is the main approach to reduce the
internal bit errors of the system. In addition, proper selection on extinction ratio of the
transmitter, improvement on equalization features of the receiver and reduce on
locating jitter will all help improve the internal error performance. It can be considered
as non bit error operation status when the average BER of the regenerator is lower
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than 10 order.

Reduce external interference bit errors

The basic strategy is to improve the capability of all equipment against electromagnetic
interference and electronic static discharge, e.g. to improve grounding. In addition,
sufficient redundancy in system designing and planning is also a simple and feasible
solution.

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8.2 Availability Parameters

y Unavailable time

When the BER of the digital signals in any transmission direction of the transmission
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system is inferior to 10 in every second of consecutive 10 seconds, the system will be
considered as entering into the unavailable time since the first of the 10 seconds.

y Available time

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When the BER of the digital signals is better than 10 in every second of consecutive
10 seconds, the system will be considered as entering into the available time since the
first of the 10 seconds.

y Availability

The percentage of available time against the total time is called availability.
To ensure normal operation, the system must satisfy specific availability indexes.

Table 8-4 Availability indexes of hypothetical reference digital section

Length (km) Availability Unavailability Unavailable time/year

420 99.977% 2.310-4 120 minutes/year

280 99.985% 1.510-4 78 minutes/year

50 99.99% 110-4 52 minutes/year

8.3. Performance of Jitter and Wander

Jitter and wander are related to the timing features of the system. Timing jitter (jitter)
refers to the short-time deviation of the specific time (e.g. optimum sampling time) of
digital signal with reference to the ideal time. Short-time deviation refers to the phase
variation with variation frequency over 10Hz.While wander refers to the long-time
deviation of the specific time of digital signal with reference to the ideal time, and
long-time deviation refers to the phase variation with variation frequency less than
10Hz.
Jitter and wander will result in signal overflow or vacancy at the receiving end and
cause signal slip damage.

8.3.1 Generation Mechanism of Jitter and Wander

Besides the common jitter sources of other transmission networks such as various
noise sources, timing filter out-of-step and inherent defects of regenerator

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(inter-symbol interference and threshold wander of amplitude limiter), there are other
two specific jitter sources in SDH network:
1) When tributary signals are encapsulated into VC, constant stuffing bits and control
stuffing bits are added. These bits must be removed during demultiplexing, which will
cause clock notch and generate residual jitter, i.e. pulse stuffing jitter, after filtering.
2) Pointer justification jitter. It is generated in pointer justification high/low or
de-justification. Similar to the case generated in high pulse justification of PDH system,
measures can be taken to reduce pulse stuffing jitter to the acceptable degree.
However, it is difficult to filter the jitter generated in pointer justification (in the unit of
byte and justified once every three frames) with common methods because of low
frequency and large amplitude.
Generally, SDH network wander is caused by variation of ambient temperature, which
changes cable transmission features and brings signal wander. In addition, the effect of
temperature variation on clock system will also cause wander. And, combination of
pointer justification and network synchronization in SDH network unit will also generate
jitter and wander with very low frequency. However, in a word, wander of SDH mainly
comes from clocks of various levels and transmission system, especially from the latter.

8.3.2 Jitter Performance Specifications

The common parameters to measure jitter performance in SDH network are as follows:

y Input jitter tolerance

Input jitter tolerance is divided into two kinds, i.e. input jitter tolerance of PDH input port
(tributary port) and that of STM-N input port (line port). Input jitter tolerance of PDH
input port is the maximum input jitter value that can be endured by this input port
without error code generated to the equipment. Long-term coexistence of PDH network
and SDH network makes it necessary to add PDH service to SDH NE in transmission
network. To achieve this, the tributary input port of this SDH NE must be capable of
accommodating the maximum jitter of PDH tributary signal, that is, the jitter tolerance of
this tributary port can endure the jitter of the PDH signal to be added.
Input jitter tolerance of line port (STM-N) is defined as the sine peak-to-peak jitter value
to enable the optical equipment to generate 1dB optical power penalty. This parameter
is used to regulate that the input jitter tolerance of local level NE should be capable of
accommodating the output jitter generated by upper level NE when SDH NEs are
interconnected to receive transmission STM-N signals.

Technical details:
What is optical power penalty?
By increasing optical transmitting power of the transmitter, it is possible to make up for the case that error
bits are increased due to decrease of system signal/noise ratio resulted from jitter, wander, fiber dispersion,
etc. That is to say, when the system performance index is degraded under a specific index because of jitter,
wander, dispersion, etc, to achieve this specific index of the system indexes, optical transmitting power
can be increased, and the optical power increased is the optical power penalty required by the system to
achieve the specific index.1dB optical power penalty is the maximum value that the system can bear.

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y Output jitter
Similar to input jitter tolerance, it is divided into jitter of PDH tributary port and that of
STM-N line port. It is defined as the maximum jitter output by the port when there is no
jitter of equipment input.
PDH tributary port output jitter of SDH equipment should guarantee that, when PDH
services are dropped from the SDH NE, the output jitter can be endured by the
equipment that receives this PDH signal. The output jitter of STM-N line port should
guarantee that it can be endured by SDH NE that receives this STM-N signal.

y Mapping and combined jitter

Special jitter of SDH will be generated at PDH/SDH network boundary because of
pointer justification and mapping, to regulate this kind of jitter, mapping jitter and
combined jitter are used to describe this kind of jitter.
Mapping jitter refers to the maximum jitter of the output PDH tributary signal at PDH
tributary port of the equipment before pointer justification of STM-N signal occurs when
PDH signals with different frequency deviations are input.
By combined jitter, it means to input pointer test sequence signals in compliance with
G.783 Specifications to SDH equipment line port, and the pointer will be justified on
SDH equipment, now adequately change the input signal frequency deviation, and the
measured maximum jitter of the output signals at PDH tributary port of the equipment is
the combined jitter of the equipment.

y Jitter transfer functionjitter transfer feature

Here, it is used to regulate the suppression capability of equipment output STM-N
signal jitter on input STM-N signal jitter (i.e. jitter gain), so as to control jitter
accumulation of the line system and prevent rapid accumulation of system jitter.
Jitter transfer function is defined as the relation that ratio of output STM-N signal jitter of
the equipment to the input STM-N signal jitter varies with the frequency. The frequency
here refers to jitter frequency.

8.3.3 Strategies to Reduce Jitter

y Reduce line system jitter

Line system jitter is the major jitter source of SDH network. To reduce jitter generated
by the line system is one of the keys to guarantee the performance of the whole
network. The basic strategy to reduce line system jitter is to reduce jitter of single
regenerator (output jitter), control jitter transfer features (improve the capability of
output signal to suppress input signal jitter), and improve jitter accumulation mode (use
scrambler to randomize transmission information, weaken correlation of system jitter
component generated by respective regenerators, and improve jitter accumulation
features.)

y Reduce output jitter at PDH tributary port

Pointer justification on SDH may cause dramatic phase jump (for pointer justification is
in the unit of byte) and result in jitter and wander, therefore, de-synchronizer, which has
the function to cache and smooth phase, is used on the tributary port of SDH/PDH
network boundary to reduce jitter and wander amplitude.

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? Questions:
What have you learned from this section?
1.Meanings of bit error and availability indexes.
2. The strategies to reduce bit errors.
3. Meanings of common indexes of jitter and wander.
4. The strategies to reduce jitter.
This section focuses on the meanings of common parameters to measure system bit error and jitter
performance.

Summary
This section describes the bit error to measure transmission performance and indexes
of jitter and wander.

Exercise
1. What is the difference between jitter and wander?

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