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This paper presents a non-isolated, high boost ratio dcdc converter with the
application for photovoltaic (PV) modules. The proposed converter utilizes a hybrid
transformer to incorporate the resonant operation mode into a traditional high boost ratio
active-clamp coupled-inductor pulse-width-modulation dc dc converter, achieving zero-
voltage-switching (ZcS) turn-on of active switches and zero-current-switching turn-off of
diodes. As a result of the inductive and capacitive energy being transferred simultaneously
within the whole switching period, power device utilization (PDU) is improved and magnetic
utilization (MU) is optimized.
The improved PDU allows reduction of the silicon area required to realize the power
devices of the converter. The optimized MU reduces the dc-bias of magnetizing current in the
magnetic core, leading to smaller sized magnetics. Since the magnetizing current has low dc-
bias, the ripple magnetizing current can be utilized to assist ZcS of main switch, while
maintaining low root mean- square (RMS) conduction loss. The voltage stresses on the active
switches and diodes are maintained at a low level and are independent of the wide changing
PV voltages as a result of the resonant capacitor in series in the energy transfer loop. The
experimental results based on 250Wprototype circuit show 97.7% peak efficiency and system
CEC efficiencies greater than 96.7% over 20 to 45 V input voltages. Due to the high
efficiency over wide power range, the ability to operate with a wide variable input voltage
and compact size, the proposed converter is an attractive design for PV module
applicationsThe simulation is carried over by the MATLAB-SIMULINK software. The
hardware design is implemented by AVR microcontroller circuit. The ATMega328
microcontroller is an easy to use yet powerful single board computer that has gained
considerable traction in the hobby as well as professional market. A prototype is developed
and tested to verify the performance of this proposed efficient solar power generation system.
i
TABLE OF CONTENTS
ii
CHAPTER TITLE PAGE
NO ABSTRACT v
NO
LIST OF TABLES ix
LIST OF FIGURES x
LIST OF ABBREVIATIONS xi
1 INTRODUCTION 1
1.1 SCOPE OF THE PROJECT 1
1.2 EXISTING SYSTEM 2
1.3 DISADVANTAGES 3
1.4 PROPOSED SYSTEM 3
1.4.1 Advantages 4
1.4.2 Block diagram 4
2 LITERATURE REVIEW 6
3 PROJECT DESCRIPTION 9
iii
3.1 GENERAL 9
3.2 MODULES NAME 9
3.3 MODULE DESCRIPTION 9
3.3.1 DC- DC Conversion 9
3.3.2 Conversion Methods 10
3.3.2.1 Linear 10
3.3.2.2 Switched modes conversion 10
3.3.2.1 Linear 10
3.3.2.2 Switched modes conversion 10
3.3.4 MPPT Control Technique 11
3.3.4.1 Perturb and observe(P&O) Method 11
3.3.4.2 HILL CLIMBING Conductance Method 12
3.3.5 Seven Level Inverter 13
3.4 MICROCONTROLLER ATMEGA 328 14
3.4.1 Microcontroller features 14
3.5 PIN CONFIGURATION 16
3.5.1 Pin Descriptions 17
3.6 THE ATMEL AVR 18
4 CIRCUIT DIAGRAM 20
4.1 CIRCUIT DIAGRAM OF THE PROJECT 20
4.2 OPERATION MODES 21
5 SIMULATION THEORY 23
5.1GENERAL 23
5.2 MATLAB HISTORY 23
5.3 SIMULINK 24
5.4 BUILDING THE MODEL 24
5.4.1 Selecting blocks 24
5.4.2 Navigating through the model hierarchy. 25
5.4.3 Managing signals and parameters 26
5.4.4 Simulating the model 26
5.4.5 Choosing a solver 27
5.4.6 Running the simulation 27
5.4.7 Analyzing simulation results 28
iv
5.4.8 Viewing simulation results 28
5.4.9 Debugging the simulation 28
5.5 SIM POWER SYSTEMS 28
5.6 MODELING ELECTRICAL POWER SYSTEMS 30
5.7 MODELING CUSTOM COMPONENTS 30
5.8 CONNECTING TO HARDWARE 32
5.8.1 Running Simulations on Hardware 32
5.9 APPLICATIONS 33
6 SIMULATION RESULTS AND DISCUSSION 35
6.1 SIMULATION DESIGN 35
6.2 SIMULATION RESULTS 35
6.3 APPLICATIONS 40
7 CONCLUSION AND FUTURE ENHANCEMENT 41
7.1 CONCLUSION 41
7.2 FUTURE ENHANCEMENT 41
REFERENCES 42
LIST OF TABLES
TABLE PAGE
TITLE
NO NO
6.1 Comparison Between Perturb & Observe and Hill climbing when 39
implemented with seven level inverter
v
LIST OF FIGURES
vi
5.3 Model Explorer Window 27
5.4 SimPower System Libraries 31
5.5 Circuit Of Transmission Line 32
5.6 Same Circuit designed in Simulink window 32
5.7 Low cost target hardware 33
6.1 Simulation Diagram of Proposed MPPT Technique(Hill climbing) 35
6.2 PV panel input voltage 36
6.3 DC-DC Boost up voltage 36
6.4 Simulation result for Output Current( Using PO Algorithm) 37
6.5 Simulation result for Output Voltage( Using PO Algorithm) 37
6.6 Simulation result for Output Current(Using IC Algorithm) 38
6.7 Simulation result for Output Voltage (Using IC Algorithm) 38
6.8 Simulation result across Seven Level inverter Load 39
vii
LIST OF ABBREVIATIONS
xi
CHAPTER 1
INTRODUCTION
The aim of this project is to achieve soft switching (ZCS of primary side and
ZVS of secondary side) of all semiconductor devices. The objective of this project is
to provide an efficient DC-DC conversion in Residential solar power system. A novel
secondary modulation technique is proposed to clamp the voltage across the primary
side devices and therefore eliminates the necessity for snubbers. Switching losses are
1
reduced significantly owing to Zero- Current Switching (ZCS) of primary switches
and Zero-Voltage Switching (ZVS) of Secondary switches. Soft switching is inherent,
load independent, and is maintained with wide variation of input voltage and power,
and thus is suitable for PV applications. The boost converter may be used in
conjunction with a high frequency transformer to boost the output voltage with the
advantage of providing isolation n between the input and output stage. Without
extreme duty cycle and high switch voltage stress that exists in the conventional boost
converter the proposed converter achieves high step-up, low cost, and high efficiency
front end DC-DC conversion thus suited for PV application. The boost converter is
usually the preferred choice in high power switching transformer applications
exceeding one kilowatt.
1.1.1 Power optimizers, Distributed MPP solutions:
We have seen how panel mismatch caused by shade across the cells as
well as other factors can lead to disproportionate losses of generation from the
array. We also see that at present, installers have addressed the panel mismatch
issue by avoiding the problem, such as designing around shade/not installing at
all, or installing a smaller array, which leads to lowered energy output.
Bypass diodes in the junction box shorted across strings of cells and
modules can nominally mitigate to a certain degree the effect of mismatch by
diverting the current around shaded cells and thereby reducing the voltage
losses through the module. However, this is an insufficient solution, all panels
today are already equipped with bypass diodes, and although they prevent entire
strings of panels from dropping out completely, we can see from the data that
there are still sizeable disproportionate losses of energy harvested.
2
magnetics is required and low voltage active switches can be utilized. The
reason that the primary side active switches of the high boost ratio
converters have low voltage stress comes from the transformer effect of
the coupled inductors. Since the primary active switches have low voltage
stresses, the circuits can use low voltage MOSFETs that generally have a
low Rds(on) and fast switching speed, decreasing both the conduction and
switching losses. To further reduce the switching losses, active-clamp
techniques have been widely used, A zero-voltage-switching (ZVS) high
boost ratio active-clamp coupled-inductor (ACCI) converter.
1.3 EXISTING SYSTEM DISADVANTAGES
1. Switching loss.
2. The power loss at switching has to be improved so that the efficiency of power will
be improved.
3. maximum efficient output is not attained.
In this project, a high boost ratio ZVS/ZCS dcdc converter with hybrid transformer
is presented to achieve high system level efficiency over wide input voltage and power
ranges. By adding a small resonant capacitor and a resonant diode into the previous ACCI
converter, a hybrid operation mode which combines pulse-width-modulation (PWM) and
resonant power conversions, is introduced into the proposed high boost ratio converter. This
converter utilizes a hybrid transformer that combines the modes where the transformer
operates under normal conditions and where it operates as a coupled-inductor to transfer the
energy to high voltage side improving the utilization of the magnetic core. The dc-bias of the
magnetizing current can be effectively reduced and smaller sized magnetics can be utilized.
Due to the low dc-bias of the magnetizing current the proposed converter can be designed
with small magnetizing inductance allowing bidirectional magnetizing current flow to
achieve ZVS of main switch while maintaining low RMS conduction loss. The output diodes
in the proposed converter can achieve zero-current-switching (ZCS) turn-off because the
resonant currents resonate back to zero at the switching transitions
1.4.1.NEAR STATE PWM SWITCHING
3
The proposed technique is the NSPWM control, which omits the open-
zero vectors and employs three adjacent voltage vectors to synthesize the output
reference voltage. Vshoot can still be inserted to boost the output voltage. The
utilized voltage vectors are changed every 60 throughout the space. Compared
to the MCB control method the sections rotate 30 in clockwise. Moreover, only
one-leg shoot-through vectors are used in order to reduce switching events, and
are changed every 120 to assure equal current stress of each leg during shoot-
through zero vectors, that isVa shoot for 30 to 150, Vb shoot for 150 to 180
and 180 to 90, and Vb shoot for 90 to 30.
1.4.2 Advantages
1. Output Power efficiency is improved by using Maximum power point tracking
algorithm which helps to overcome the shading effects of PV panel.
2. Switching losses are reduced in the proposed system.
3. Total Harmonic presents at the inverter can be reduced gradually.
4. The performance of the system is improved.
4
1.4.3 Block diagram
Dc/dc boost
conveter inveter
load
battery
Zvs/zcs circuit
Solar panel
Mppt algorthim
Micro controller
Figure.1.2 shows the Block diagram of the proposed solar power generation system.
The proposed solar power generation system is composed of a solar cell array with Hill
climbing Maximum power point tracking algorithm, a dcdc power converter, ATMega 328
Microcontroller, Battery and an seven level inverter section. The solar cell array is connected
5
to the dcdc power converter, and the dcdc power converter is a boost converter that
incorporates a transformer with a turn ratio of 2:1.
CHAPTER 2
LITRATURE REVIEW
6
A NOVEL SEVEN LEVEL MULTILEVEL INVERTER WITH
PHOTOVOLTAIC CELL
Reddiprasanna et.al(2013)presented an H-bridge inverter topology with reduced number of
switches is which produces same number of levels as that of a conventional cascaded
multilevel inverter. The proposed system consists of three sources connected in cascade with
one source is PV cell and the other two are DC sources. Sinusoidal pulse width modulation
technique is used to control the switches of inverter. This technique reduces the complexity of
the control circuit, cost and leads to less total harmonic distortion (THD). In this paper,
Proposed novel seven level multilevel inverter with photovoltaic cell topology is validated
through simulation using MATLAB/SIMULINK and the results are presented.
7
bidirectional switch, this structure allows a reduction of the system cost and size.
Effectiveness of the proposed topology has been demonstrated by analysis and simulation
8
PROJECT DESCRIPTION
3.1 GENERAL
The main advantages of solar power generation with seven level technologies are the
reduced switches, lower distortion, higher efficiency, and the more versatile cooking surfaces.
Solar inverters are mainly used in grid systems. Multilevel power conversion has become
increasingly popular in recent years due to advantages of high power quality waveforms, low
electromagnetic compatibility (EMC) concerns, low switching losses, and high-voltage
capability.
Solar array
DC-DC conversion
MPPT Controller(Hill climbing algorithm)
Seven level Inverter
9
3.3.2.1 Linear
Linear regulators can only output at lower voltages from the input. They are very
inefficient when the voltage drop is large and the current is high as they dissipate heat equal
to the product of the output current and the voltage drop; consequently they are not normally
used for large-drop high-current applications. The inefficiency wastes power and requires
higher-rated, and consequently more expensive and larger, components. The heat dissipated
by high-power supplies is a problem in itself as it must be removed from the circuitry to
prevent unacceptable temperature rises.
3.3.2.3 Magnetic
In these DC to DC converters, energy is periodically stored into and released from a
magnetic field in an inductor or a transformer, typically in the range from 300 kHz to 10
MHz. By adjusting the duty cycle of the charging voltage (that is, the ratio of on/off time),
the amount of power transferred can be controlled.
10
3.3.4 MPPT Control Technique
The weather and load changes cause the operation of a PV system to vary almost all
the times. A dynamic tracking technique is important to ensure maximum power is obtained
from the photovoltaic arrays. The following methods are the most fundamental MPPT
Technique, and they can be developed using micro controllers.
The MPPT Technique operates based on the truth that the derivative of the output
power (P) with respect to the panel voltage (V) is equal to zero at the maximum power point.
In the literature, various MPP algorithms are available in order to improve the performance of
photovoltaic system by effectively tracking the MPP. However, most widely used MPPT
Technique are considered here, they are:
1. Perturb and Observe (P&O)
2. Hill climbing (In Cond)
3. Constant Voltage Method.
11
Figure 3.1. Graph Power versus Voltage for Perturb and Observe Algorithm
where IPV and VPV are the PV array current and voltage, respectively.
When the optimum operating point in the P-V plane is to the right of the MPP, we
have (dIPv/dvPv)+(IPV/VPV)<0, whereas when the optimum operating point is to the left of the
MPP, we have (dIpv/dVpv)+(Ipv/Vpv)>0.
The MPP can thus be tracked by comparing the instantaneous conductance Ipv/Vpv to
the hill climbing dIpv/dVpv. Therefore the sign of the quantity (dIpv/dVpv)+(Ipv/Vpv)
indicates the correct direction of perturbation leading to the MPP. Once MPP has been
reached, the operation of PV array is maintained at this point and the perturbation stopped
unless a change in dIpv is noted. In this case, the algorithm decrements or increments Vref to
track the new MPP. The increment size determines how fast the Maximum power point is
tracked.
Through the IC algorithm it is therefore theoretically possible to know when the MPP
has been reached, and thus when the perturbation can be stopped. The IC method offers good
performance under rapidly changing atmospheric conditions. There are two main different IC
12
methods available in the literature. The classic IC algorithm (ICa) requires the same
measurements shown in Fig.10, in order to determine the perturbation direction a
measurement of the voltage Vpv and a measurement of the current Ipv.
The Two-Model MPPT Control (ICb) algorithm combines the CV and the ICa
methods: if the irradiation is lower than 30% of the nominal irradiance level the CV method
is used, other way the ICa method is adopted. Therefore this method requires the additional
measurement of solar irradiation S as shown in Fig.3.2
13
3.4 MICRO CONTROLLER - ATMEGA 328
1024Bytes EEPROM
14
JTAG (IEEE std. 1149.1 Compliant) Interface
Peripheral Features
Capture Mode
15
- 32 Programmable I/O Lines
Operating Voltages
Speed Grades
GND Ground.
16
Port A (PA7-PA0) Port A serves as the analog inputs to the A/D Converter. Port A also serves
as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide
internal pull-up resistors (selected for each bit). The Port A output buffers have symmetrical
drive characteristics with both high sink and source capability. When pins PA0 to PA7 are
used as inputs and are externally pulled low, they will source current if the internal pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B (PB7-PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port B output buffers have symmetrical drive characteristics with
both high sink and source capability. As inputs, Port B pins that are externally pulled low will
source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port C (PC7-PC0) Port C is an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port C output buffers have symmetrical drive characteristics with
both high sink and source capability. As inputs, Port C pins that are externally pulled low will
source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset
condition becomes active, even if the clock is not running. If the JTAG interface is enabled,
the pull-up resistors on pins PC5 (TDI), PC3 (TMS) and PC2 (TCK) will be activated even if
a reset occurs. The TD0 pin is tri-stated unless TAP states that shift out data are entered.
Port D (PD7-PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). The Port D output buffers have symmetrical drive characteristics with
both high sink and source capability. As inputs, Port D pins that are externally pulled low will
source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset
condition becomes active, even if the clock is not running
RESET Reset Input. A low level on this pin for longer than the minimum pulse length will
generate a reset, even if the clock is not running.
XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating
circuit.
17
AVCC is the supply voltage pin for Port A and the A/D Converter. It should be externally
connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to
VCC through a low-pass filter.
AREF AREF is the analog reference pin for the A/D Converter.
AVR core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two
independent registers to be accessed in one single instruction executed in one clock cycle.
The resulting architecture is more code efficient while achieving throughputs up to ten times
faster than conventional CISC microcontrollers. The ATmega32 provides the following
features: 32Kbytes of In-System Programmable Flash Program memory with Read-While-
Write capabilities, 1024bytes EEPROM, 2Kbyte SRAM, 32 general purpose I/O lines, 32
general purpose working registers, a JTAG interface for Boundary scan, On-chip Debugging
support and programming, three flexible Timer/Counters with compare modes, Internal and
External Interrupts, a serial programmable USART, a byte oriented Two-wire Serial Interface,
an 8-channel, 10-bit ADC with optional differential input stage with programmable gain
(TQFP package only), a programmable Watchdog Timer with Internal Oscillator, an SPI
serial port, and six software selectable power saving modes. The Idle mode stops the CPU
while allowing the USART, Two-wire interface, A/D Converter, SRAM; Timer/Counters, SPI
port, and interrupt system to continue functioning. The Power-down mode saves the register
contents but freezes the Oscillator, disabling all other chip functions until the next External
Interrupt or Hardware Reset.
In Power-save mode, the Asynchronous Timer continues to run, allowing the user to
maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction
mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize
switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is
running while the rest of the device is sleeping. This allows very fast start-up combined with
low-power consumption. In Extended Standby mode, both the main Oscillator and the
Asynchronous Timer continue to run. The device is manufactured using Atmels high density
nonvolatile memory technology. The On chip ISP Flash allows the program memory to be
reprogrammed in-system through an SPI serial interface, by a conventional nonvolatile
18
memory programmer, or by an On-chip Boot program running on the AVR core. The boot
program can use any interface to download the application program in the Application Flash
memory.
Software in the Boot Flash section will continue to run while the Application Flash
section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC
CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega32 is
a powerful microcontroller that provides a highly-flexible and cost-effective solution to many
embedded control applications. The Atmel AVR ATmega32 is supported with a full suite of
program and system development tools including: C compilers, macro assemblers, program
debugger/simulators, in-circuit emulators, and evaluation kits.
CHAPTER 4
CIRCUIT DIAGRAM
19
4.1 CIRCUIT DIAGRAM OF THE PROJECT
Figure. 3.1 shows the circuit diagram of the proposed converter. C is the input capacitor; HT
is the hybrid transformer with the turns ratio 1:n; S1 is the active MOSFET switch; D1 is the
clamping diode, which provides a current path for the leakage inductance of the hybrid
transformer when S1 is OFF, Cc captures the leakage energy from the hybrid transformer and
transfers it to the resonant capacitor Cr by means of a resonant circuit composed of Cc , Cr ,
L r , and Dr ; L r is a resonant inductor, which operates in the resonant mode; and Dr is a
diode used to provide an unidirectional current flow path for the operation of the resonant
portion of the circuit. Cr is a resonant capacitor, which operates in the hybrid mode by having
a resonant charge and linear discharge. The turn on of Dr is determined by the state of the
active switch S1. Do is the output diode similar to the traditional coupled inductor boost
converter and Co is the output capacitor. Ro is the resistive load . The full-bridge power
converter further converts this three-level dc voltage to a seven-level ac voltage that is
synchronized with the utility voltage. In this way, the proposed solar power generation
system generates a sinusoidal output current that is in phase with the utility voltage and is fed
into the utility, which produces a unity power factor. As can be seen, this new seven-level
inverter contains only six power electronic switches, so the power circuit is simplified.
The new topology can be effectively broken down into four distinct operating modes,
shown in below.
20
STATE I
Mode 1 [t0, t1]: In this period , MOSFET S1 is ON, the magnetizing inductor of the hybrid
transformer is charged by
input voltage, Cr is charged by Cc , and the secondary reflected input voltage nVin of the
hybrid transformer together by the resonant circuit composed of secondary side of the hybrid
transformer, Cr , Cc , Lr ,and Dr . The current in MOSFET S1 is the sum of the resonant
current and linear magnetizing inductor current.
STATE II
Mode 2 [t1, t2]:At time t1 , MOSFET S1 is turned OFF, the clamping diode D1 is turned ON
by the leakage energy stored in the hybrid transformer during the time period that the
MOSFET is ON and the capacitor Cc is charged which causes the voltage on the MOSFET to
be clamped..
STATE III
Mode 3 [t2 ,t3 ]: At time t2 , the capacitor Cc is charged to the point that the output
diode Do is forwarded biased. The energy stored in the magnetizing inductor and capacitor Cr
is being transferred to the load and the clamp diode D1 continues to conduct while Cc
remains charged.
21
STATE IV
Mode 4 [t3, t4]: At time t3 , diode D1 is reversed biased and the energy stored in magnetizing
inductor of the hybrid transformer and in capacitor Cr is simultaneously transferred to the
load. During the steady-state operation, the charge through capacitor Cr must satisfy charge
balance.
STATE V
Mode 5 [t4, t0]: The MOSFET S1 is turned ON at time t4. Due to the leakage effect of the
hybrid transformer, theoutput diode current io will continue to flow for a short time and the
output diode Do will be reversed biased attime t0 ; then the next switching cycle starts.
22
CHAPTER 5
4.1.1.SOFTWARE REQUIREMENTS
Matlab 2013a
4.1.2.HARDWARE REQUIREMENTS
Power MOSFET : IRF840
Driver IC : IR2112
23
Controller: PIC16F877A
PV Panel : 12V
4.1.3.3 FEATURES
24
MATLAB is an interactive system whose basic data element is an array that
does not require dimensioning. This allows you to solve many technical
computing problems, especially those with matrix and vector formulations, in a
fraction of the time it would take to write a program in a scalar no interactive
language such as C or FORTRAN.
MATLAB has evolved over a period of years with input from many users.
In university environments, it is the standard instructional tool for introductory
and advanced courses in mathematics, engineering, and science. In industry,
MATLAB is the tool of choice for high-productivity research, development, and
analysis.MATLAB features a family of application-specific solutions called
toolboxes. Very important to most users of MATLAB, toolboxes allow you to
learn and apply specialized technology.
MATHEMATICAL ALGORITHMS
TRANSFORMS
When data of any kind is recorded, it hardly ever reveals its true nature
from the point you are standing at. Transforms made on the data perform the
task of changing this standpoint.A basic transform in our physical world is a
transform from the time-domain to the frequency-domain and vice versa. Our
ears for example are made to find out the frequencies and phases of the sound
signal. The frequencies are used to understand the message, the phases carry
information which is mostly used for spatial hearing (low frequencies only). It
is clear that such transforms have a high analytical value.
25
BASIS FUNCTIONS
The idea of a having basis function is that any signal can be described as
a weighed sum of a family of functions. These functions are the basis functions
of the transform. Transforms are often just changes from one basis function to
another, although other transform types exist. For example in cryptology it is
not practical to have a codebook, but rather use other mathematical methods
for performing the transform.
ORTHOGONALITY
From an analysis point of view, it is practical that a set of functions is
orthogonal. For a set of functions f1...fn,orthogonality on a given interval a x
b requires that the correlation between different functions is zero. The denotes
the Kronecker delta-function.
b
f x f
a
n m
( x )dx (m n)
REDUNDANCY
Not all transforms aim on analyzing the signal afterwards. If we want to
protect the data against errors, it might be rational to add redundancy. In these
cases, the choice of basis functions leads to a redundant set, where only certain
26
basis functions exist, and others are forbidden. In case of an error, the basis
function can be corrected to the nearest legal one according to the distance
metric of the function space.
COMMAND WINDOW
Use the Command Window to enter variables and run functions and M-files.
COMMAND HISTORY
Lines you enter in the Command Window are logged in the Command History
window. In the Command History, you can view previously used functions, and
copy and execute selected lines. To save the input and output from a MATLAB
session to a file, use the diary function.
You can run external programs from the MATLAB Command Window. The
exclamation point character! is a shell escape and indicates that the rest of the
input line is a command to the operating system. This is useful for invoking
utilities or running other programs without quitting MATLAB. On Linux, for
example,!emacs magik.m invokes an editor called emacs for a file named
magik.m. When you quit the external program, the operating system returns
control to MATLAB.
LAUNCH PAD
HELP BROWSER
27
Use the Help browser to search and view documentation for all your
Math Works products. The Help browser is a Web browser integrated into the
MATLAB desktop that displays HTML documents. To open the Help browser,
click the help button in the toolbar, or type help browser in the Command
Window. The Help browser consists of two panes, the Help Navigator, which
you use to find information, and the display pane, where you view the
information.
PIC MICROCONTROLLER
DEVICE OVERVIEW
There are four devices (PIC16F873, PIC 16F874, PIC16F876 and
PIC16F877) covered by this datasheet. The PIC16F876/873 devices come in 28-
pin packages and the PIC16F877/874 devices come in 40-pin packages. The
parallel slave port is not implemented on the 28-pin devices.
ARCHITECTURE
28
Two types of architecture are followed
1. Van-Neumann architecture:
The width of address and data bus is same.
2. Howard architecture:
The bus width of address and data may not be same. Pipelining is
possible here. Microcontrollers have built-in peripherals, they are:
1. Memory
a. Program Memory (e.g. PROM, flash memory)
b. Data memory (e.g. RAM, EEPROM)
2.I/O Ports
3.Timers
4.A/D
5.USART
6.Interrupt controllers
7.PWM capture
29
Fig 4.1.4 Pin diagram of PIC16F877A
PERIPHERAL FEATURES
The PIC16F877A has five serial ports namely A, B,C, D and E. It has five
parallel ports namely:
30
Built in RAM and EPROM
RAM is used to control ADC.MSB is stored in RAM when LSB is
Outputted.
PWM:
Two captures compare PWM module. PWM is used as DAC.
Programmable low voltage detection circuitry.
USART(universal synchronous asynchronous receiver and transmitter)
It converts serial data into parallel and vice versa. for instrumentation
Standard MAX-485 data converter should be used. This external data converter
amplifies the incoming 5v (from PIC) by four times and gives 20v Output i.e.
-10v to +10v.similarly,incoming 20v(from PIC) is reduced as 5v by the same
MAX 485 converter. MAX 485 can be replaced by MAX 232 for Computer
standard. this is known as Quaver-puller action
31
the RA4/T0CK1 pin. The RA4/T0CK1 pin is a Schmitt trigger input and an
open drain output.
All other PORT A pins have TTL input levels and full CMOS
output drivers. Other PORTA pins have TTL input levels and full CMOS output
drivers. Other PORTA pins are multiplexed with analog inputs and analog
VREF input. The operation of each pin is selected by clearing/setting the control
bits in the ADCON1 register(A/D Control Register1).
Economic feasibility
Economic analysis is the most frequently used method for evaluating the
effectiveness of a new system. More commonly known as cost/benefit analysis,
the procedure is to determine the benefits and savings that are expected from a
candidate system and compare them with costs. If benefits outweigh costs, then
the decision is made to design and implement the system. An entrepreneur must
accurately weigh the cost versus benefits before taking an action.
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Cost Based Study: It is important to identify cost and benefit factors, which
can be categorized as follows: 1. Development costs; and 2. Operating costs.
This is an analysis of the costs to be incurred in the system and the benefits
derivable out of the system.
As per the cost based study this system requires the designing and
implementing environment as listed below
Legal feasibility
Determines whether the proposed system conflicts with legal
requirements, e.g. a data processing system must comply with the local software
Protection Acts. This system satisfies all the legal requirements and it also
complying with the local data protection act.
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CHAPTER 6
SIMULATION THEORY
5.1 GENERAL
In 2004, MATLAB had around one million users across industry and academia.
MATLAB users come from various backgrounds of engineering, science, and economics.
MATLAB is widely used in academic and research institutions as well as industrial
enterprises.
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students, access to LINPACK and EISPACK without them having to learn Fortran. It soon
spread to other universities and found a strong audience within the applied mathematics
community. Jack Little, an engineer, was exposed to it during a visit Moler made to Stanford
University in 1983. Recognizing its commercial potential, he joined with Moler and Steve
Bangert. They rewrote MATLAB in C and founded MathWorks in 1984 to continue its
development. These rewritten libraries were known as JACKPAC. In 2000, MATLAB was
rewritten to use a newer set of libraries for matrix manipulation, LAPACK. MATLAB was
first adopted by researchers and practitioners in control engineering, Little's specialty, but
quickly spread to many other domains. It is now also used in education, in particular the
teaching of linear algebra and numerical analysis, and is popular amongst scientists involved
in image processing.
5.3 SIMULINK
Simulink provides a set of predefined blocks that you can combine to create a detailed
block diagram of your system. Tools for hierarchical modeling, data management, and
subsystem customization enable you to represent even the most complex system concisely
and accurately.
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5.4.1 Selecting Blocks
Continuous and discrete dynamics blocks, such as Integration and Unit Delay
Algorithmic blocks, such as Sum, Product, and Lookup Table
Simulink add-on products let you incorporate specialized components for aerospace,
communications, PID control, control logic, signal processing, video and image processing,
and other applications. Add-on products are also available for modeling physical systems
with mechanical, electrical, and hydraulic components.
To build a model as shown in Figure.4.1 by dragging blocks from the Simulink Library
Browser into the Simulink Editor, we then connect these blocks with signal lines to establish
mathematical relationships between system components. Graphical formatting tools, such as
smart guides and smart signal routing, help we control the appearance of the model as
webuild it. We can add hierarchy by encapsulating a group of blocks and signals as a
subsystem in a single block.
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The Simulink Editor gives a complete control over what we see and use within the
model. For example, we can add commands and submenus to the editor and context menus.
We can also add a custom interface to a subsystem or model by using a mask that hides the
subsystem's contents and provides the subsystem with its own icon and parameter dialog box.
The Explorer bar and Model Browser in Simulink helpsto navigate the model. The
Explorer bar indicates the level of hierarchy that we are currently viewing and lets we can
move up and down the hierarchy. The Model Browser provides a complete hierarchical tree
view of your model, and like the Explorer bar, can be used to move through the levels of
hierarchy.
Simulink models contain both signals and parameters. Signals are time-varying data
represented by the lines connecting blocks. Parameters are coefficients that define system
dynamics and behavior.Simulink helps to determine the following signal and parameter
attributes as shown in Figure.4.3:
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Figure 5.2 Signal Attributes tab
We can simulate the dynamic behavior of the system and view the results as the
simulation runs. To ensure simulation speed and accuracy, Simulink provides fixed-step and
variable-step ODE solvers, a graphical debugger, and a model profiler.
Solvers as shown in Figure.4.5 are numerical integration algorithms that compute the
system dynamics over time using information contained in the model. Simulink provides
solvers to support the simulation of a broad range of systems, including continuous-time
(analog), discrete-time (digital), hybrid (mixed-signal), and multirate systems of any size.
These solvers can simulate stiff systems and systems with discontinuities. We can
specify simulation options, including the type and properties of the solver, simulation start
and stop times, and whether to load or save simulation data. We can also set optimization and
diagnostic information. Different combinations of options can be saved with the model.
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Normal (the default), which interpretively simulates the model
Accelerator, which increases simulation performance by creating and executing
compiled target code but still provides the flexibility to change model parameters
during simulation
Rapid Accelerator, which can simulate models faster than Accelerator mode by
creating an executable that can run outside Simulink on a second processing core
To reduce the time required to run multiple simulations, we can run those simulations in
parallel on a multi-core computer or computer cluster.
After running a simulation, we can analyze the simulation results in MATLAB and
Simulink. Simulink includes debugging tools to help to understand the simulation behavior.
We can visualize the simulation behavior by viewing signals with the displays and
scopes provided in Simulink. We can also view simulation data within the Simulation Data
Inspector, where we can compare multiple signals from different simulation runs. Scope is
the block in Simulink by which we can measure and view the voltage, current, and power in
electrical domain. Figure.4.6 shows the output of a multilevel converter through scope.
Alternatively, we can build custom HMI displays using MATLAB, or log signals to
the MATLAB workspace to view and analyze the data using MATLAB algorithms and
visualization tools.
Simulink supports debugging with the Simulation Stepper, which lets we step back
and forth through your simulation viewing data on scopes or inspecting how and when the
system changes states. With the Simulink debugger we can step through a simulation one
method at a time and examine the results of executing that method. As the model simulates,
you can display information on block states, block inputs and outputs, and block method
execution within the Simulink Editor.
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5.5 SIM POWER SYSTEMS
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SimPowerSystems and SimMechanics share a special Physical Modeling block and
connection line interface.
Users can rapidly put SimPowerSystems to work. The libraries contain models of
typical power equipment such as transformers, lines, machines, and power electronics.
These models are proven ones coming from textbooks, and their validity is based on
the experience of the Power Systems Testing and Simulation Laboratory of Hydro-Qubec, a
large North American utility located in Canada.
The capabilities of SimPowerSystems for modeling a typical electrical grid are
illustrated in demonstration files. And for users who want to refresh their knowledge of
power system theory, there are also self-learning case studies.
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Control and measurement: Voltage, current, and impedance measurements; RMS
measurements; active and reactive power calculations; timers, multimeters, and Fourier
analysis; HVDC control; total harmonic distortion; and abc-to-dq0 and dq0-to-abc
transformations
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supports the development of complex, self-contained power systems, such as those in
automobiles, aircraft, manufacturing plants, and power utility applications.Thus users can
rapidly put SimPowerSystems to work.
We can connect the Simulink model to hardware for rapid prototyping, hardware-in
the-loop (HIL) simulation, and deployment on an embedded system.
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5.8.1 Running Simulations on Hardware
Simulink provides built-in support for prototyping, testing, and running models on
low-cost target hardware, including Arduino, LEGO MINDSTORMS NXT, PandaBoard,
and BeagleBoard. We can design algorithms in Simulink for control systems, robotics, audio
processing, and computer vision applications and see them perform in real time.
Simulink provides built-in support for prototyping, testing, and running models on
low-cost target hardware, including Arduino, LEGO MINDSTORMS NXT, and
BeagleBoard as shown in Figure.4.6.
With Real-Time Windows Target, we can run Simulink models in real time on
Microsoft Windows PCs and connect to a range of I/O boards to create and control a real-
time system as shown in Figure.4.6. To run the model in real time on a target computer, we can
use xPC Target for HIL simulation, rapid control prototyping, and other real-time testing
applications. See xPC Target Turnkey for available target computer hardware. Simulink
models can be configured and made ready for code generation. By using Simulink with add-
on code generation products, you can generate C and C++, HDL, or PLC code directly from
your model.
5.9 APPLICATIONS
A number of MathWorks and third-party hardware and software products are available
for use with Simulink. For example, Stateflow extends Simulink with a design environment
for developing state machines and flow charts. Coupled with Simulink Coder, another
product from MathWorks, Simulink can automatically generate C source code for real-time
implementation of systems. As the efficiency and flexibility of the code improves, this is
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becoming more widely adopted for production systems, in addition to being a popular tool for
embedded system design work because of its flexibility and capacity for quick iteration.
Embedded Coder creates code efficient enough for use in embedded systems.
With HDL Coder, also from MathWorks, Simulink and Stateflow can automatically
generate synthesizable VHDL and Verilog.Simulink Verification and Validation enables
systematic verification and validation of models through modeling style checking,
requirements traceability and model coverage analysis.
Simulink Design Verifier uses formal methods to identify design errors like integer
overflow, division by zero and dead logic, and generates test case scenarios for model
checking within the Simulink environment. The systematic testing tool TPT offers one way to
perform formal test- verification and validation process to stimulate Simulink models but also
during the development phase where the developer generates inputs to test the system. By the
substitution of the Constant and Signal generator blocks of Simulink the stimulation becomes
reproducible.
SimEvents adds a library of graphical building blocks for modeling queuing systems
to the Simulink environment. It also adds an event-based simulation engine to the time-based
simulation engine in Simulink.
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CHAPTER 6
46
The major inputs for the proposed PV model were solar irradiation, PV panel
temperature and voltage and current informations. The I-V output characteristics for the PV
model are shown in following simulation results.
The major inputs for the proposed PV model where solar radiation, PV panel
temperature, voltage and current informations. The I-V output characteristics of the PV
model are shown in following simulation results.
Figure 6.4 Simulation result for Output Current( Using PO Algorithm), Iout=1.1A
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From the above Simulation result performances, the output voltage and output current of
proposed algorithm are evaluated at different simulation period. According to the simulation
period variations, the output power of the photovoltaic system is varied. Also, the output
power of the proposed MPPT system is evaluated.
From the simulation show that voltage input for both controller is
almost the same. Perturb and Observe Controller shows a not stable condition.
During the simulation the current and voltage decrease rapidly and lastly came
to same value at the initial stage. From the simulation result is shows that
controller that connected with Boost converter which will give a stable output
is the hill climbing controller.
6.3 APPLICATIONS
Solar based grid systems
AC drives
HVDC
Industrial applications
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Electric Vehicles
CHAPTER 7
CONCLUSION
7.1 CONCLUSION
This project presents highly efficient high boost ratio hybrid transformer DC-DC
converter for photovoltaic module applications with following features and benefits:
This converter transfers the capacitive and inductive energy simultaneously to increase the
total power delivery reducing losses in the system.
The conduction loss in MOSFET is reduced as a result of the low-input RMS current and
switching loss is reduced with a lower turn-off current.
With these improved performances, the converter can maintain high efficiency under low
output power and low-input voltage conditions.
REFERENCES
1) E. Miller, Smart grids a smart idea?, Renewable Energy Focus Magazine, vol. 10,
pp. 62-67, Sep.-Oct. 2009.
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2) H. Yang, Z. Wei, and L. Chengzh, Optimal design and technoeconomic analysis of a
hybrid solar-wind power generation system, Applied Energy, vol. 86, pp. 163-169,
Feb. 2009.
4) J.P. Reichling, and F.A. Kulacki, Utility scale hybrid wind-solar thermal electrical
generation: a case study for Minnesota, Energy, vol. 33, pp.626-638, Apr. 2008.
5) O. Ekren, B.Y. Ekren, and B. Ozerdem, Break-even analysis and size optimization
of a PV/wind hybrid energy conversion system with battery storage A case study
Applied Energy, vol.86, pp. 1043-1054, July-August 2009.
6) M.I.M. Ridzuan, M. Imran Hamid And Makbul Anwari Modeling and Simulation of
Synchronizing System for Grid-Connected PV/Wind Hybrid Generation.
7) Sweeka Meshram, Ganga Agnihotri and Sushma Gupta Modeling of Grid Connected
DC Linked PV/Hydro Hybrid System Electrical and Electronics Engineering: An
International Journal (ELELIJ) Vol 2, No 3, August 2013.
9) Yann Riffonneau, Seddik Bacha, Member, IEEE, Franck Barruel, and Stephane Ploix
Optimal Power Flow Management for Grid Connected PV Systems With Batteries
IEEE Transactions on Sustainable Energy, Vol. 2, No. 3, July 2011.
50
10) V.Srikanth, A. Naveen kumar Power Quality Improvement Techniques In Hybrid
Systems A Review International Journal Of Engineering And Computer Science
ISSN:2319-7242 Volume 3 Issue 4 April, 2014 Page No. 5495-5498.
11) Luigi Galotto Jr., Moacyr Aureliano Gomes de Brito, Leonardo Poltronieri Sampaio,
Guilherme de Azevedo Melo, and Carlos Alberto Canesin, Senior Member, IEEE
Evaluation of the Main MPPT Techniques for Photovoltaic Applications IEEE
Transactions On Industrial Electronics, Vol. 60, No. 3, March 2013.
12) Yoash Levron and Doron Shmilovitz, Member, IEEE Maximum Power Point
Tracking Employing Sliding Mode Control IEEE Transactions On Circuits and
Systems I: Regular Papers, Vol. 60, No. 3, March 2013.
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