XTR

116
Kynix115
XTR
Kynix116
Kynix Semiconductor Hongkong Limited . 115

http://www.kynix.com/Detail/7350/XTR116UA.html SBOS124A July 2008 REVISED April 2017

4-20m A CURRENT LOOP TRANSMITTERS

FEATURES APPLICATIONS
LOW QUIESCENT CURRENT: 200A 2-WIRE, 4-20mA CURRENT LOOP
5V REGULATOR FOR EXTERNAL CIRCUITS TRANSMITTER
VREF FOR SENSOR EXCITATION: SMART TRANSMITTER
XTR115: 2.5V INDUSTRIAL PROCESS CONTROL
XTR116: 4.096V TEST SYSTEMS
LOW SPAN ERROR: 0.05% COMPATIBLE WITH HART MODEM
LOW NONLINEARITY ERROR: 0.003% CURRENT AMPLIFIER
WIDE LOOP SUPPLY RANGE: 7.5V to 36V VOLTAGE-TO-CURRENT AMPLIFIER
SO-8 PACKAGE

DESCRIPTION used for offsetting or to excite transducers. A current

return pin (IRET) senses any current used in external
The Kynix115 and Kynix116 are precision current
circuitry to assure an accurate control of the output
out-put converters designed to transmit analog
current.
4-to-20mAsignals over an industry standard current
loop. They provide accurate current scaling and The Kynix115 is a fundamental building block
output current ofsmart sensors using 4-to-20mA current
limit functions. transmission.
The on-chip voltage regulator (5V) can be used to The Kynix115 and Kynix116 are specified for
power external circuitry. A precision on-chip VREF opera-tion over the extended industrial temperature
(2.5V for Kynix115 and 4.096V for Kynix116) can range,
be 40C to +85C.
Kynix115
Kynix116
VREG +5V V+
+5V
8 Regulator 7

Kynix115: 2.5V VREF Voltage

Kynix116: 1 Reference
4.096V

VLOOP
B
RIN
IIN 6
2 RL
+ A1

VIN E
5
RLIM
3
IRET 100 VIN
R1 R2 IO =
2.475k 25 RIN

4
I = 100 IIN

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Kynix Semiconductor Hongkong Limited products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Copyright 2008-2017, Kynix Semiconductor Hongkong Limited .
Products conform to specifications per the terms of Kynix
Semiconductor Hongkong Limited standard warranty. Production
processing does not necessarily includetesting of all parameters.

www.Kynix.com
SPECIFICATIONS Kynix Semiconductor Hongkong Limited .
At TA = +25C, V+ = 24V, RIN = 20k, and TIP29C external transistor, unless otherwise noted. http://www.kynix.com/Detail/7350/XTR116UA.html
Kynix115U Kynix115UA
Kynix116U Kynix116UA

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

OUTPUT
Output Current Equation IO IO = IIN 100
Output Current, Linear Range 0.25 25 mA
Over-Scale Limit ILIM 32 mA
Under-Scale Limit IMIN IREG = 0, IREF = 0 0.2 0.25 mA
SPAN
Span (Current Gain) S 100 A/A
Error (1) IIN = 250A to 25mA 0.05 0.2 0.4 %
vs Temperature TA = 40C to +85C 3 20 ppm/C
Nonlinearity IIN = 250A to 25mA 0.003 0.01 0.02 %
INPUT
Offset Voltage (Op Amp) VOS IIN = 40A 100 250 500 V
vs Temperature TA = 40C to +85C 0.7 3 6 V/C
vs Supply Voltage, V+ V+ = 7.5V to 36V 0.1 2 V/V
Bias Current IB 35 nA
vs Temperature 150 pA/C
Noise: 0.1Hz to 10Hz en 0.6 Vp-p
DYNAMIC RESPONSE
Small Signal Bandwidth CLOOP = 0, RL = 0 380 kHz
Slew Rate 3.2 mA/s
VREF(2)
Kynix115 2.5 V
Kynix116 4.096 V
Voltage Accuracy IREF = 0 0.05 0.25 0.5 %
vs Temperature TA = 40C to +85C 20 35 75 ppm/C
vs Supply Voltage, V+ V+ = 7.5V to 36V 1 10 ppm/V
vs Load IREF = 0mA to 2.5mA 100 ppm/mA
Noise: 0.1Hz to 10Hz 10 Vp-p
Short-Circuit Current 16 mA
VREG(2)
Voltage 5 V
Voltage Accuracy IREG = 0 0.05 0.1 V
vs Temperature TA = 40C to +85C 0.1 mV/C
vs Supply Voltage, V+ V+ = 7.5V to 36V 1 mV/V
vs Output Current See Typical Curves
Short-Circuit Current 12 mA
POWER SUPPLY V+
Specified +24 V
Voltage Range +7.5 +36 V
Quiescent Current 200 250 A
Over Temperature, 40C to +85C 240 300 A
TEMPERATURE RANGE
Specification 40 +85 C
Operating 55 +125 C
Storage 55 +125 C
Thermal Resistance JA 150 C/W

Specifications the same as Kynix115U and Kynix116U.

NOTES: (1) Does not include initial error or TCR of RIN. (2) Voltage measured with respect to IRET pin.

2
Kynix115, Kynix116
www.Kynix.com
SBOS124A
PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS(1)
Top View SO-8 Power Supply, V+ (referenced to IO pin) .......................................... 40V
Input Voltage (referenced to IRET pin) ........................................ 0V to V+
Output Current Limit ............................................................... Continuous
VREG, Short-Circuit .................................................................. Continuous
VREF, Short-Circuit .................................................................. Continuous
VREF 1 8 VREG
Operating Temperature ................................................ 55C to +125C
IIN 2 7 V+ Storage Temperature Range ....................................... 55C to +125C
Lead Temperature (soldering, 10s) .............................................. +300C
IRET 3 6 B (Base) Junction Temperature ................................................................... +165C

IO 4 5 E (Emitter) NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.

ELECTROSTATIC
PACKAGE/ORDERING INFORMATION DISCHARGE SENSITIVITY
For the most current package and ordering information, see
This integrated circuit can be damaged by ESD. Texas Instru-
the Package Option Addendum located at the end of this
ments recommends that all integrated circuits be handled with
data sheet.
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.

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TYPICAL PERFORMANCE CURVES
At TA = +25C, V+ = 24V, RIN = 20k, and TIP29C external transistor, unless otherwise noted.

CURRENT GAIN vs FREQUENCY QUIESCENT CURRENT vs TEMPERATURE

260

40
240

Quiescent Current (A)

(V+) = 36V
220
Gain (dB)

30 COUT = 0
R L = 0
(V+) = 24V
200
COUT = 10nF
20
RL = 250 (V+) = 7.5V
180

10 160
10k 100k 1M 75 50 25 0 25 50 75 100 125
Frequency (Hz) Temperature (C)

REFERENCE VOLTAGE vs TEMPERATURE OVER-SCALE CURRENT vs TEMPERATURE

0.1 34
With External Transistor
33
Over-Scale Current (mA)
Reference Voltage (%)

0
32
V+ = 36V
0.1 31
V+ = 7.5V
30
0.2 V+ = 24V

29

0.3 28
75 50 25 0 25 50 75 100 125 75 50 25 0 25 50 75 100 125
Temperature (C) Temperature (C)

VREG VOLTAGE vs VREG CURRENT

5.5
+125C

55C
VREG Voltage (V)

+25C 55C
5.0
+25C

Sinking Sourcing
+125C
Kynix Semiconductor Hongkong Limited
Current Current

4.5 http://www.kynix.com/Detail/7350/XTR116UA.html
1 0 1 2 3 4
IREG Current (mA)

Kynix115, Kynix116
4 SBOS124A
www.Kynix.com
APPLICATIONS INFORMATION and upward. Full-scale inputs greater than 0.5V are recom-
mend to minimize the effect of offset voltage and drift of A1.
The Kynix115 and Kynix116 are identical devices except
forthe reference voltage output, pin 1. This voltage is
availablefor external circuitry and is not used EXTERNAL TRANSISTOR
internally. Furtherdiscussions that apply to both devices The external transistor, Q1, conducts the majority of the full-
will refer to the scale output current. Power dissipation in this transistor can
Kynix115/6. approach 0.8W with high loop voltage (40V) and 20mA
output current. The Kynix115/6 is designed to use an
Figure 1 shows basic circuit connections with representative
externaltransistor to avoid on-chip thermal-induced
simplified input circuitry. The Kynix115/6 is a
errors. Heatproduced by Q1 will still cause ambient
two-wirecurrent transmitter. Its input signal (pin 2) controls
temperature changesthat can affect the Kynix115/6. To
the outputcurrent. A portion of this current flows into the
minimize these effects,locate Q1 away from sensitive
V+ powersupply, pin 7. The remaining current flows in
analog circuitry, including Kynix115/6. Mount Q1 so
Q1. Externalinput circuitry connected to the Kynix115/6
that heat is conducted to theoutside of the transducer
can be poweredfrom V or V . Current drawn from
housing.
these terminals
REG REF
must be returned to IRET, pin 3. This IRET pin is a local The Kynix115/6 is designed to use virtually any NPN
ground for input circuitry driving the Kynix115/6. transis-tor with sufficient voltage, current and power
rating. Casestyle and thermal mounting considerations
It is a current-input device with a gain of 100.
often influencethe choice for any given application. Several
A current flowing into pin 2 produces IO = 100 IIN. The
possible choicesare listed in Figure 1. A MOSFET transistor
input voltage at the IIN pin is zero (referred to the IRET pin).
will not improvethe accuracy of the Kynix115/6 and is not
A voltage input is created with an external input resistor, as
recommended.
shown. Common full-scale input voltages range from 1V

Kynix115
IREG Kynix116 IO
5V VREG +5V V+
Kynix115: 2.5V 8 Regulator 7
Kynix116:
4.096V IREF
VREF(1) Voltage
1 Reference

VLOOP
RIN B
20k IIN Q1 10nF
Input VIN IIN 6
Circuitry 2
A1 RL

E
5
3 RLIM

IRET
All return current R1 R2
from IREG and IREF 2.475k 25
IO
4
For IO = 4mA to 20mA I = 100 IIN
IIN = 40A to 200A
With RIN = 20k NOTE: (1) See also Figure 5.
VIN = 0.8V to 4V Possible choices for Q1 (see text).

TYPE PACKAGE

2N4922 TO-225
TIP29C TO-220
TIP31B TO-220

FIGURE 1. Basic Circuit Connections.

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Kynix115, Kynix116 5
SBOS124A www.Kynix.com
MINIMUM-SCALE CURRENT
The quiescent current of the Kynix115/6 (typically 200
A)is the lower limit of its output current. Zero input
current
(IIN = 0) will produce an IO equal to the quiescent current.
Output current will not begin to increase until IIN > IQ /100.
Current drawn from VREF or VREG will add to this minimum
output current. This means that more than 3.7mA is avail-
able to power external circuitry while still allowing the
output current to go below 4mA.
OFFSETTING THE INPUT
A low scale of 4mA is produced by creating a 40A input
current. This can be created with the proper value resistor
from VREF (Figure 2), or by generating offset in the input
drive circuitry.
MAXIMUM OUTPUT CURRENT
The Kynix115/6 provides accurate, linear output up to
25mA.Internal circuitry limits the output current to
approximately32mA to protect the transmitter and loop
power/measure-ment circuitry.
It is possible to extend the output current range of the
Kynix115/6 by connecting an external resistor from pin 3
topin 5, to change the current limit value. Since all
outputcurrent must flow through internal resistors, it is
possible todamage with excessive current. Output currents
greater than45mA may cause permanent damage.
VREG Kynix1
15
Kynix1
VREF 16

RIN
VO
D/A
Kynix115

VREG

VREG Kynix1
2.5V VREF 15
Voltage
Kynix1
40A Reference VREF 16

R0 Digital IO IIN

62.5k Control D/A
Optical
IIN Isolation IRET

A1
0 to 160A Kynix1
5V VREG
15
Kynix1
16
Filter RIN
Digital PWM

IRET
R1 Control
C Out
2.475k
Optical
Isolation
IRET

FIGURE 2. Creating Low-Scale Offset. FIGURE 3. Digital Control Methods.

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6
Kynix115, Kynix116
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SBOS124A
REVERSE-VOLTAGE PROTECTION
The Kynix115/6 low compliance voltage rating (7.5V)
per-mits the use of various voltage protection methods
withoutcompromising operating range. Figure 4 shows
a diodebridge circuit which allows normal operation even
when thevoltage connection lines are reversed. The bridge
causes a two diode drop (approximately 1.4V) loss in
loop supplyvoltage. This results in a compliance voltage
of approxi-mately 9Vsatisfactory for most applications.
A diode canbe inserted in series with the loop supply
voltage and the V+pin to protect against reverse output
connection lines with
only a 0.7V loss in loop supply voltage.
OVER-VOLTAGE SURGE PROTECTION
Remote connections to current transmitters can sometimes be
subjected to voltage surges. It is prudent to limit the maximum
surge voltage applied to the Kynix115/6 to as low as
practical.Various zener diode and surge clamping diodes are
speciallydesigned for this purpose. Select a clamp diode with
as low avoltage rating as possible for best protection. For
example, a 36V protection diode will assure proper
transmitter operationat normal loop voltages, yet will
provide an appropriate levelof protection against voltage
surges. Characterization tests onseveral production lots
showed no damage with loop supplyvoltages up to 65V.
Most surge protection zener diodes have a diode character-
istic in the forward direction that will conduct excessive
current, possibly damaging receiving-side circuitry if the
loop connections are reversed. If a surge protection diode is
used, a series diode or diode bridge should be used for
protection against reversed connections.
RADIO FREQUENCY INTERFERENCE
The long wire lengths of current loops invite radio frequency
interference. RF can be rectified by the input circuitry of the
Kynix115/6 or preceding circuitry. This generally appears
asan unstable output current that varies with the position
ofloop supply or input wiring.
Interference may also enter at the input terminals. For
integrated transmitter assemblies with short connection to
the sensor, the interference more likely comes from the
current loop connections.

8 V+ Maximum VPS must be

VREG 7 less than minimum
1 voltage rating of zener
VREF
diode.

RIN
2 Kynix1 6 0.01F
IIN B Q1 1N4148
15 D1(1) Diodes
Kynix1
VIN 16 E
5 RL VPS
3
IRET IO
4 The diode bridge causes
a 1.4V loss in loop supply
voltage.

NOTE: (1) Zener Diode 36V: 1N4753A or Motorola

P6KE39A. Use lower voltage zener diodes with loop
power supply voltages less than 30V for increased
protection. See Over-Voltage Surge Protection.

FIGURE 4. Reverse Voltage Operation and Over-Voltage Surge Protection.

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Kynix115, Kynix116 7
SBOS124A www.Kynix.com
 If capacitive loading must be placed on the VREF pin, one of the compensation schemes shown below must be used to ensure stable operation.
Values of capacitance must remain within the given ranges.

Kynix 115
RISO(1) Kynix116
10 IO
VREG +5V V+
8 Regulator 7
ILOAD CHF + CLF
(0-2.5mA) (10pF to 0.5F) (2.2F to 22F)
VREF Voltage
1 Reference

VLOOP
OR
B
IIN 6
2 RL
A1

E
+ CLF(1) 5
(2.2F to 22F) RLIM
3
ILOAD CHF
(10pF to 0.5F) IRET
(0-2.5mA) R1 R2 100 VIN
RCOMP(1) 2.475k 25 IO =
50 RIN
4
I = 100 IIN

NOTE: (1) Required compensation components.

FIGURE 5. Stable Operation with Capacitive Load on VREF.

Kynix Semiconductor Hongkong Limited

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8
Kynix115, Kynix116
www.Kynix.com SBOS124A
 PACKAGE OPTION ADDENDUM

www.Kynixi.com 20-Apr-2017

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

XTR115U ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR

& no Sb/Br) 115U
XTR115U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
XTR115U/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
XTR115UA ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
A
XTR115UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
A
XTR115UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
A
XTR115UG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
XTR116U ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
XTR116U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
XTR116U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
XTR116UA ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A
XTR116UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A
XTR116UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A
XTR116UAE4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A

Addendum-Page 1 Kynix Semiconductor Hongkong Limited .

http://www.kynix.com/Detail/7350/XTR116UA.html
 PACKAGE OPTION ADDENDUM
Kynix Semiconductor Hongkong Limited .
http://www.kynix.com/Detail/7350/XTR116UA.html
www.Kynix.com 20-Apr-2017

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

XTR116UG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR

& no Sb/Br) 116U

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: Kynix has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but Kynix does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: Kynix has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check www.Kynix.com and http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): Kynix's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement
thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, Kynix Pb-Free products are suitable for use in specified lead-free
processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): Kynix defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by
weightin homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents Kynix's knowledge and belief as of the date that it is provided. Kynix bases its knowledge and belief on
informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. Kynix
has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials
and chemicals.
Kynix and Kynix suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall Kynix's liability arising out of such information exceed the total purchase price of the Kynix part(s) at issue in this document sold by Kynix to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.Kynix.com 20-Apr-2017

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
XTR115U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
XTR115UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
XTR116U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Kynix Semiconductor Hongkong Limited

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Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.Kynix.com 20-Apr-2017

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
XTR115U/2K5 SOIC D 8 2500 367.0 367.0 35.0
XTR115UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
XTR116U/2K5 SOIC D 8 2500 367.0 367.0 35.0

Kynix Semiconductor Hongkong Limited

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Pack Materials-Page 2
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regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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