Professional Documents
Culture Documents
MODEL LIBRARY
March 2015
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
i
PSSE 34
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
ii
PSSE 34
AC5C .......................................................................................................................6-13
AC6A .......................................................................................................................6-15
AC6C .......................................................................................................................6-17
AC7B .......................................................................................................................6-20
AC8B .......................................................................................................................6-23
BBSEX1 ..................................................................................................................6-25
BUDCZT ..................................................................................................................6-27
CELIN ......................................................................................................................6-29
DC1C .......................................................................................................................6-34
DC2C .......................................................................................................................6-36
DC3A .......................................................................................................................6-39
DC4B .......................................................................................................................6-42
EMAC1T ..................................................................................................................6-44
ESAC1A ..................................................................................................................6-47
ESAC2A ..................................................................................................................6-49
ESAC3A ..................................................................................................................6-53
ESAC4A ..................................................................................................................6-55
ESAC5A ..................................................................................................................6-56
ESAC6A ..................................................................................................................6-58
ESAC8B ..................................................................................................................6-60
ESDC1A ..................................................................................................................6-62
ESDC2A ..................................................................................................................6-64
ESST1A ...................................................................................................................6-66
ESST2A ...................................................................................................................6-68
ESST3A ...................................................................................................................6-70
ESST4B ...................................................................................................................6-72
ESURRY ..................................................................................................................6-74
EX2000 ....................................................................................................................6-76
EXAC1 .....................................................................................................................6-81
EXAC1A ..................................................................................................................6-83
EXAC2 .....................................................................................................................6-85
EXAC3 .....................................................................................................................6-87
EXAC4 .....................................................................................................................6-89
EXBAS ....................................................................................................................6-90
EXDC2 ....................................................................................................................6-92
EXELI ......................................................................................................................6-94
EXNEBB ..................................................................................................................6-96
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
iii
PSSE 34
EXNI ........................................................................................................................6-98
EXPIC1 ..................................................................................................................6-100
EXST1 ...................................................................................................................6-103
EXST2 ...................................................................................................................6-105
EXST2A .................................................................................................................6-107
EXST3 ...................................................................................................................6-109
IEEET1 ..................................................................................................................6-111
IEEET2 ..................................................................................................................6-113
IEEET3 ..................................................................................................................6-115
IEEET4 ..................................................................................................................6-117
IEEET5 ..................................................................................................................6-119
IEEEX1 ..................................................................................................................6-121
IEEEX2 ..................................................................................................................6-123
IEEEX3 ..................................................................................................................6-125
IEEEX4 ..................................................................................................................6-127
IEET1A ..................................................................................................................6-129
IEET1B ..................................................................................................................6-131
IEET5A ..................................................................................................................6-133
IEEX2A ..................................................................................................................6-135
IVOEX ...................................................................................................................6-137
OEX12T .................................................................................................................6-139
OEX3T ...................................................................................................................6-143
REXSY1 ................................................................................................................6-145
REXSYS ................................................................................................................6-149
SCRX ....................................................................................................................6-153
SEXS .....................................................................................................................6-154
ST1C .....................................................................................................................6-156
ST5B .....................................................................................................................6-159
ST5C .....................................................................................................................6-162
ST7C .....................................................................................................................6-165
ST6B .....................................................................................................................6-167
ST7B .....................................................................................................................6-170
URHIDT .................................................................................................................6-173
URST5T ................................................................................................................6-176
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
iv
PSSE 34
CRCMGV ...................................................................................................................7-5
DEGOV .....................................................................................................................7-7
DEGOV1 ...................................................................................................................7-9
GAST .......................................................................................................................7-11
GAST2A ..................................................................................................................7-13
GASTWD .................................................................................................................7-16
GGOV1 ....................................................................................................................7-19
HYGOV ...................................................................................................................7-25
HYGOV2 .................................................................................................................7-27
HYGOVM .................................................................................................................7-29
HYGOVR1 ...............................................................................................................7-33
HYGOVT .................................................................................................................7-36
IEEEG1 ...................................................................................................................7-43
IEEEG2 ...................................................................................................................7-45
IEEEG3 ...................................................................................................................7-46
IEESGO ...................................................................................................................7-48
IVOGO .....................................................................................................................7-50
PIDGOV ..................................................................................................................7-52
PWTBD1 ..................................................................................................................7-55
SHAF25 ...................................................................................................................7-57
TGOV1 ....................................................................................................................7-63
TGOV2 ....................................................................................................................7-64
TGOV3 ....................................................................................................................7-66
TGOV4 ....................................................................................................................7-69
TGOV5 ....................................................................................................................7-74
TURCZT ..................................................................................................................7-78
TWDM1T .................................................................................................................7-81
TWDM2T .................................................................................................................7-84
URCSCT ..................................................................................................................7-87
URGS3T ..................................................................................................................7-89
WEHGOV ................................................................................................................7-92
WESGOV ................................................................................................................7-97
WPIDHY ..................................................................................................................7-99
WSHYDD ...............................................................................................................7-101
WSHYGP ...............................................................................................................7-104
WSIEG1 ................................................................................................................7-107
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
v
PSSE 34
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
vi
PSSE 34
DCVRFT ..................................................................................................................12-7
HVDCAT ..................................................................................................................12-9
PAUX1T ................................................................................................................12-11
PAUX2T ................................................................................................................12-12
RBKELT ................................................................................................................12-14
RUNBKT ................................................................................................................12-15
SQBAUT ................................................................................................................12-16
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
vii
PSSE 34
WT1G1 ....................................................................................................................17-6
WT2G1 ....................................................................................................................17-7
WT3G1 ....................................................................................................................17-9
WT3G2 ..................................................................................................................17-11
WT4G1 ..................................................................................................................17-13
WT4G2 ..................................................................................................................17-15
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
viii
PSSE 34
CSSCST ................................................................................................................24-13
SWSHNT ...............................................................................................................24-15
SVSMO1T2 ...........................................................................................................24-16
SVSMO2T2 ...........................................................................................................24-21
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
ix
PSSE 34
RELAY3 ...................................................................................................................32-8
VOLMAG .................................................................................................................32-9
BSDSCN ...............................................................................................................32-10
FLOW ....................................................................................................................32-11
FLOW2 ..................................................................................................................32-12
GENTRP ...............................................................................................................32-13
LINESW .................................................................................................................32-14
LINRCL ..................................................................................................................32-15
LINTRP ..................................................................................................................32-16
Index
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x
Chapter 1
Generator Models
This chapter contains a collection of data sheets for the generator models contained in the PSSE
Chapter 1 - Generator Models
Model Description
CBEST EPRI battery energy storage FACTS model
CDSMS1 American Superconductor DSMES device model
CGEN1 Third order generator model
CIMTR1 Induction generator model with rotor flux transients
CIMTR2 Induction motor model with rotor flux transients
CIMTR3 Induction generator model with rotor flux transients
CIMTR4 Induction motor model with rotor flux transients
CSMEST EPRI superconducting electromagnetic energy storage FACTS model
CSTATT Static condenser FACTS model
CSVGN1 SCR controlled static var source model
CSVGN3 SCR controlled static var source model
CSVGN4 SCR controlled static var source model
CSVGN5 WECC controlled static var source model
CSVGN6 WECC controlled static var source model
FRECHG Salient pole frequency changer model
GENCLS Classical generator model
GENDCO Round rotor generator model with dc offset torque component
GENROE Round rotor generator model
GENROU Round rotor generator model
GENSAE Salient pole generator model
GENSAL Salient pole generator model
GENTPJ1 Type J Generator model
GENTRA Transient level generator model
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1-1
Generator Models PSSE 34
CBEST PSSE Model Library
1.1 CBEST
EPRI Battery Energy Storage
STATEs # Description
K AVR state 1
K+1 AVR state 2
K+2 IQ, reactive current (pu)
K+3 Energy output (pu sec)
K+4 Energy input (pu sec) ( < 0 )
VARs # Description
L PAUX, supply signal (MW)
L+1 PINIT (pu on MBASE)
L+2 POUT (pu on SBASE)
L+3 QOUT (pu on SBASE)
L+4 EOUT total energy (pu on SBASE, sec)
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1-2
PSSE 34 Generator Models
PSSE Model Library CBEST
VARs # Description
L+5 Memory
This incorporates technology developed for the United States Electric Power Industry under the
sponsorship of the Electric Power Research Institute (EPRI).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
1-3
Generator Models PSSE 34
CDSMS1 PSSE Model Library
1.2 CDSMS1
American Superconductor DSMES Device
This model incorporates technology of American Superconductor Corporation (ASC) and was
developed under the sponsorship of ASC.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
1-4
PSSE 34 Generator Models
PSSE Model Library CDSMS1
STATEs # Description
K IQ, Q-path reactive current (pu)
K+1 AVR state 1 (pu)
K+2 AVR state 2 (pu)
VARs # Description
PAUX, active power control signal
L
(MW)
POUT, output active power (pu on
L+1
SBASE)
QOUT, output reactive power (pu on
L+2
SBASE)
L+3 IDC, output D_SMES DC current (kA)
L+4 IL, coil current (kA)
VTR, D-SMES step-up transformer low
L+5
voltage (pu)
L+6
Internal Storage
L+22
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1-5
Generator Models PSSE 34
CDSMS1 PSSE Model Library
ICONs # Description
CONV_TYPE, converter type:
M 0 current-source converter
1 voltage source converter
IBUS_CONTR:
M+1
number of remote control bus
BOOST_CONTR, boost control flag:
M+2 0 if no
1 if yes
VOLT_SEN_LOC, voltage control sensor
location flag:
M+3
0 for the D-SMES bus
1 for controlling the remote control bus
TURN_ON_VOLT, voltage control flag:
0 if no
M+4 1 if yes
No means that Vi thresholds are ignored
by P-path.
TURN_ON_POWER, active power
(damping control) flag:
M+5 0 if no
1 if yes
No means that PAUX signal is ignored.
TURN_ON_P, active power output flag:
0 if no
M+6
1 if yes
No turns off P-paths (POUT=0).
TURN_ON_Q, reactive power output flag:
0 if no
M+7
1 if yes
No turns off Q-path (QOUT=0).
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1-6
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
V1 Calculating
V2 the Voltage AVR_MODE
V3 Mode Analyzing
V4 (AVR_MODE) the
DSMES
Operation ADSOC
PAUX Conditions Output P-path
Algorithm POUT
(ADSOC)
1-7
ADSOC Q-path
BOOST_CONTR Boost Flag Output Algorithm QOUT
DT01_010
General Diagram
Generator Models
CDSMS1
Generator Models PSSE 34
CDSMS1 PSSE Model Library
V1
VAC V1 AVR_MODE=5
V2
V2 VAC < V1 AVR_MODE=4
V3
V3 VAC < V2 AVR_MODE=3 AVR_MODE
V4
V4 VAC < V3 AVR_MODE=2
VAC
VAC < V2 AVR_MODE=1
DT01_011
The MW Injection of DSMES is also enabled immediately after VAC quick crossing the
V3 > VAC V4 range.
IINIT IINIT
IMIN t
IMIN t t1 t2 t3
t* t* + TDIS t1 + t2 + t3 = TDIS
DT01_013
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1-8
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
POUT = 0
DT01_014
P-Path Algorithm
1-9
Generator Models
CDSMS1
CDSMS1
Q-Path Algorithm
VREF VQMAX IQMAX
QLIM
Generator Models
+
VAC (1+sT1) (1+sT2) KAVR IQ Q MBASE QOUT
1
(1+sT3) (1+sT4) S SBASE
POUT
QLIM
VQMIN IQMAX VDSMES
ADSOC
Output Q-path QOUT
Branch OR
Selection AVR_DROOP
QOUT = 0
1-10
DT01_015
Overload Diagram
2
2 P OUT SLIM if AVR MODE < = 2 and t > t*
I QMAX = I
ACMAX V DSMES SLIM MAX
2 2 SRATED
Q LIM = S P
LIM OUT
t
t*
S LIM MAX = KOL x S RATED TOVLD TBACK
DT01_016
2 2
at t
: S = P + Q > S RATED
OUT
PSSE 34
PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
PSSE 34 Generator Models
PSSE Model Library CGEN1
1.3 CGEN1
Third Order Complex Generator Model
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1-11
Generator Models PSSE 34
CGEN1 PSSE Model Library
STATEs # Description
K speed (pu)
K+1 Angle (radians)
K+2 rd (1)
K+3 rd (2)
K+4 rd (3)
K+5 rq (1)
K+6 rq (2)
K+7 rq (3)
VARs # Description
L Internal memory
L+1 Internal memory
All constants except S(1.0) and S(1.2) are in pu machine MVA base.
Set Rmd (2), Lmd (2), Rkd (2) and Lkd (2) to 0 for 2nd order d-axis model.
Set Rmq (2), Lmq (2), Rkq (2) and Lkq (2) to 0 for 2nd order q-axis model.
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1-12
PSSE 34 Generator Models
PSSE Model Library CGEN1
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1-13
Generator Models PSSE 34
CIMTR1 PSSE Model Library
1.4 CIMTR1
Induction Generator Model
STATEs # Description
K Eq
K+1 Ed
K+2 Eq
K+3 Ed
K+4 speed (pu)
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1-14
PSSE 34 Generator Models
PSSE Model Library CIMTR1
VARs # Description
Admittance of initial condition Mvar
L
difference
L+1 Motor, Q
L+2 Telec
ICON # Description
M Memory
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1-15
Generator Models PSSE 34
CIMTR2 PSSE Model Library
1.5 CIMTR2
Induction Motor Model
STATEs # Description
K Eq
K+1 Ed
K+2 Eq
K+3 Ed
K+4 D speed (pu)
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1-16
PSSE 34 Generator Models
PSSE Model Library CIMTR2
VARs # Description
Admittance of initial condition Mvar
L
difference
L+1 Motor, Q
L+2 Telec
ICON # Description
M Memory
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1-17
Generator Models PSSE 34
CIMTR3 PSSE Model Library
1.6 CIMTR3
Induction Generator Model
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1-18
PSSE 34 Generator Models
PSSE Model Library CIMTR3
STATEs # Description
K Eq
K+1 Ed
K+2 Eq
K+3 Ed
K+4 speed (pu)
K+5 Angle deviation
VARs # Description
Admittance of initial condition Mvar
L
difference
L+1 Motor, Q
L+2 Telec
ICON # Description
M Memory
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1-19
Generator Models PSSE 34
CIMTR4 PSSE Model Library
1.7 CIMTR4
Induction Motor Model
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1-20
PSSE 34 Generator Models
PSSE Model Library CIMTR4
STATEs # Description
K Eq
K+1 Ed
K+2 Eq
K+3 E
K+4 speed (pu)
K+5 Angle deviation
VARs # Description
Admittance of initial condition Mvar
L
difference
L+1 Motor, Q
L+2 Telec
ICON # Description
M Memory
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1-21
Generator Models PSSE 34
CSMEST PSSE Model Library
1.8 CSMEST
EPRI Current and Voltage-Source SMES Device
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1-22
PSSE 34 Generator Models
PSSE Model Library CSMEST
STATEs # Description
K IDC, coil dc current (pu)
K+1 AVR state 1
K+2 AVR state 2
K+3 IQ, reactive current (pu)
VARs # Description
L PAUX, supplementary signal (MW)
L+1 PINIT (pu on MBASE)
L+2 POUT (pu on SBASE)
L+3 QOUT (pu on SBASE)
L+4 VDC (pu)
L+5 Memory
ICON # Description
0 current-source converter
M
1 voltage-source converter
This incorporates technology developed for the United States Electric Power Industry under the
sponsorship of the Electric Power Research Institute (EPRI).
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1-23
Generator Models PSSE 34
CSMEST PSSE Model Library
IDCVDC(IDC)[IDCIDCMIN1]
PINIT
PMAX IDCVDCMAX IACMAXVAC KVACIDC
+
1 + MBASE
PAUX 1 1 1 1 1 POUT
MBASE PDC SBASE
+
PMAX IDCVDCMIN IACMAXVAC KVACIDC
IDCVDC(IDC)[IDCIDCMAX1]
KR 6 IDC0
+
1 1
PDC IDC VDC sL IDC
DROOP
P DC 2 P DC 2 or P DC 2
I = I2 ------------- I2 ------------- K u I 2 -------------
QMAX ACMAX V ACMAX V DC V AC
AC AC
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1-24
PSSE 34 Generator Models
PSSE Model Library CSTATT
1.9 CSTATT
Static Condenser (STATCON)
STATEs # Description
K First regulator
K+1 Second regulator
K+2 Thyristor
VARs # Description
L Ei, Internal voltage (pu)
L+1 ISTATC, STATCON current
L+2 Internal memory
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1-25
Generator Models PSSE 34
CSTATT PSSE Model Library
VREF
VMAX Limit Max
+ VAR(L)
(1 + sT1) (1 + sT2) K + 1
|V| MBASE
6 S 6 Xt ISTATC
(1 + sT3) (1 + sT4) SBASE VAR(L+1)
Ei
VMIN Limit Min
Other ET
Signals
VOTHSG DROOP
where:
I CMAX V T
I CMAX0 = -------------------------------
- otherwise
V CUTOUT
I LMAX V T
I LMAX0 = ------------------------------
- otherwise
V CUTOUT
Note: |V| is the voltage magnitude on the high side of generator step-up transformer, if present.
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1-26
PSSE 34 Generator Models
PSSE Model Library CSVGN1
1.10 CSVGN1
Static Shunt Compensator
STATEs # Description
K First regulator
K+1 Second regulator
K+2 Thyristor
VAR # Description
L Y (model output)
ICON # Description
M Memory
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1-27
Generator Models PSSE 34
CSVGN1 PSSE Model Library
+
+ K(1 + sT1) (1 + sT2) 1
|V| 6 X 6 Y
(1 + sT3) (1 + sT4) 1 + sT5
VMIN RMIN/RBASE
Other
Signals
VOTHSG
RBASE = MBASE
Note: |V| is the voltage magnitude on the high side of generator step-up transformer, if present.
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1-28
PSSE 34 Generator Models
PSSE Model Library CSVGN3
1.11 CSVGN3
Static Shunt Compensator
STATEs # Description
K First regulator
K+1 Second regulator
K+2 Thyristor
VAR # Description
L Y (model output)
ICON # Description
M Memory
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1-29
Generator Models PSSE 34
CSVGN3 PSSE Model Library
RBASE = MBASE
Note: |V| is the voltage magnitude on the high side of generator step-up transformer, if present.
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1-30
PSSE 34 Generator Models
PSSE Model Library CSVGN4
1.12 CSVGN4
Static Shunt Compensator
STATEs # Description
K First regulator
K+1 Second regulator
K+2 Thyristor
VAR # Description
L Y (model output)
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1-31
Generator Models PSSE 34
CSVGN4 PSSE Model Library
RBASE = MBASE
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1-32
PSSE 34 Generator Models
PSSE Model Library CSVGN5
1.13 CSVGN5
Static var Compensator
STATEs # Description
K Filter output
K+1 First regulator state
K+2 Second regulator state
K+3 Thyristor delay
VAR # Description
L Y (model output)
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1-33
Generator Models PSSE 34
CSVGN5 PSSE Model Library
Filter VEMAX
1 + 1 + sTS2 1 + sTS4
6 6 KSVS
/VOLT(IBUS)/ 1 + sTs1 1 + sTS3 1 + sTS5
or
/VOLT(ICON(M))/ + + VEMAX 1st Stage 2nd Stage
BMAX
VERR
If VERR > DVLO: BR = BMAX + KSD (VERR DV)
BR
If DVHI < VERR < DVLO: BR = BR 1 MBASE(I)
Br 1 + sTS6 B SBASE VAR(L)
SVS
If VERR < DVHI: BR = BMIN
Thyristor Delay
If DV = 0, If DV > 0,
DVLO = BMAX/KSVS DVLO = DV
DVHI = BMIN/KSVS DVHI = DV
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1-34
PSSE 34 Generator Models
PSSE Model Library CSVGN6
1.14 CSVGN6
Static var Compensator
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1-35
Generator Models PSSE 34
CSVGN6 PSSE Model Library
STATEs # Description
K Filter output
K+1 First regulator state
K+2 Second regulator state
K+3 Thyristor delay
VARs # Description
L Y (model output)
L+1 BSHUNT switch timer
Other
Signals
VREF VOTHSG
VMAX VEMAX
Filter + +
1 + 1 + sTS2 1 + sTS4
6 6 KSVS BR
VOLT(IBUS) 1 + sTs1 1 + sTS3 1 + sTS5
or
VOLT(ICON(M))
VMIN VEMIN
Position 1 is normal (open).
VERR If VERR > DV2, switch will
close after TDELAY cycles.
BMAX 1 2
BSHUNT
+
If VERR > DVLO: BR = BMAX + KSD (VERR DV)
If DVHI < VERR < DVLO: BR = BR 1 +
BR 6 Y
B R 1 + sTS6
If VERR < DVHI: BR = BMIN
+
Fast Override BMIN
BIAS
Thyristor Delay
If DV = 0, If DV > 0,
DVLO = BMAX/KSVS DVLO = DV
DVHI = BMIN/KSVS DVHI = DV
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1-36
PSSE 34 Generator Models
PSSE Model Library FRECHG
1.15 FRECHG
Frequency Changer Model
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1-37
Generator Models PSSE 34
FRECHG PSSE Model Library
STATEs # Description
K Eq
K+1 kd
K+2 q
K+3 speed (pu)
K+4 Angle (radians)
K+5 Eq
K+6 kd
K+7 q
K+8 speed (pu)
K+9 Angle (radians)
Notes:
From bus unit assumed to be on the same system base frequency as that in the working case.
CON(J) through CON(J+11), STATE(K) through STATE(K+4) are quantities for the from bus unit.
CON(J+12) through CON(J+24), STATE(K+5) through STATE(K+9) are quantities for the to bus
unit.
Xd, Xq, Xd, X, Xq, Xl, H, and D are in pu on the corresponding Machine MVA base. Xq must be
equal to Xd.
H1*MBASE1 = H2*MBASE2
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1-38
PSSE 34 Generator Models
PSSE Model Library GENCLS
1.16 GENCLS
Constant Internal Voltage Generator Model
J H, Inertia1
J+1 D, Damping constant
1 H and D are in pu machine MVA base.
If H is 0, then DSTATE(K) and DSTATE(K+1) will always be
zero.
STATEs # Description
K speed (pu)
K+1 Angle (radians)
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1-39
Generator Models PSSE 34
GENDCO PSSE Model Library
1.17 GENDCO
Round Rotor Generator Model Including dc Offset Torque Component
Note: Xd, Xq, Xd, Xq, Xd, Xq, Xl, H, and D are in pu, machine MVA base.
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1-40
PSSE 34 Generator Models
PSSE Model Library GENDCO
STATEs # Description
K Eq
K+1 Ed
K+2 kd
K+3 kq
K+4 speed (pu)
K+5 Angle (radians)
VARs # Description
L Telec
L+1 dc offset current
L+2 Phase at switch
L+3 Time of switch
L+4 id, Value at kPAUSE = 1
L+5 iq, Value at kPAUSE = 1
L+6 id
L+7 iq
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1-41
Generator Models PSSE 34
GENROE PSSE Model Library
1.18 GENROE
Round Rotor Generator Model (Exponential Saturation)
Note: Xd, Xq, Xd, Xq, Xd, Xq, Xl, H, and D are in pu, machine MVA base.
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1-42
PSSE 34 Generator Models
PSSE Model Library GENROE
STATEs # Description
K Eq
K+1 Ed
K+2 kd
K+3 kq
K+4 speed (pu)
K+5 Angle (radians)
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1-43
Generator Models PSSE 34
GENROU PSSE Model Library
1.19 GENROU
Round Rotor Generator Model (Quadratic Saturation)
Note: Xd, Xq, Xd, Xq, Xd, Xq, Xl, H, and D are in pu, machine MVA base.
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1-44
PSSE 34 Generator Models
PSSE Model Library GENROU
STATEs # Description
K Eq
K+1 Ed
K+2 kd
K+3 kq
K+4 speed (pu)
K+5 Angle (radians)
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1-45
Generator Models PSSE 34
GENSAE PSSE Model Library
1.20 GENSAE
Salient Pole Generator Model (Exponential Saturation on Both Axes)
Note: Xd, Xq, Xd, Xd, Xq, Xl, H, and D are in pu, machine MVA base.
STATEs # Description
K Eq
K+1 q
K+2 kd
K+3 speed (pu)
K+4 Angle (radians)
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1-46
PSSE 34 Generator Models
PSSE Model Library GENSAL
1.21 GENSAL
Salient Pole Generator Model (Quadratic Saturation on d-Axis)
Note: Xd, Xq, Xd, Xd, Xq, Xl, H, and D are in pu, machine MVA base.
STATEs # Description
K Eq
K+1 kd
K+2 q
K+3 speed (pu)
K+4 Angle (radians)
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1-47
Generator Models PSSE 34
GENTPJ1 PSSE Model Library
1.22 GENTPJ1
WECC Type J generator model
STATEs # Description
K E"q
K+1 E"d
K+2 E'q
K+3 E'd
K+4 (Speed deviation)
K+5 Angle (radians)
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1-48
PSSE 34 Generator Models
PSSE Model Library GENTPJ1
VAR # Description
Internal VAR used for calculation (not
L
to be changed by the user)
2. The model requires that X"d and X"q (CON(J+10) and CON(J+11)) have the same
value.
3. In power flow, the imaginary part of ZSORCE should be set equal to X"d.
4. To represent a solid rotor machine, all rotor time constants and the reactances X'd, X"d,
X'q and X"q should all be greater than zero
5. To represent a salient pole machine with a single amortisseur circuit on each axis, set
T'qo=0, X'q=Xq
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1-49
Generator Models PSSE 34
GENTRA PSSE Model Library
1.23 GENTRA
Transient Level Generator Model
Note: Xd, Xq, Xd, H, and D are in pu, machine MVA base.
STATEs # Description
K Eq
K+1 speed (pu)
K+2 Angle (radians)
VAR # Description
L Ed
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1-50
Chapter 2
Compensator Models
This chapter contains a collection of data sheets for the compensator models contained in the
PSSE dynamics model library.
Chapter 2 - Compensator Models
Model Description
COMP Voltage regulator compensating model
COMPCC Cross compound compensating model
IEEEVC 1981 IEEE voltage compensating model
REMCMP Remote bus voltage signal model
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2-1
Compensator Models PSSE 34
COMP PSSE Model Library
2.1 COMP
Voltage Regulator Current Compensating Model
This model allows the voltage regulator of machine I to sense the voltage at a point separated from
the machine terminals by an impedance of Xe.
VT VCT
VCT = V T jXe I T
IT ECOMP
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2-2
PSSE 34 Compensator Models
PSSE Model Library COMPCC
2.2 COMPCC
Voltage Regulator Current Compensating Model for Cross-Compound Units
This model allows the voltage regulators of machines I and M to sense the voltage separated from
the machine terminals.
VT
IT1
IT2
I T1 + I T2
E COMP1 = V T --------------------- ( R 1 + jX 1 ) + I T1 ( R 2 + jX 2 )
2
I T1 + I T2
E COMP2 = V T --------------------- ( R 1 + jX 1 ) + I T2 ( R 2 + jX 2 )
2
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2-3
Compensator Models PSSE 34
IEEEVC PSSE Model Library
2.3 IEEEVC
Voltage Regulator Current Compensating Model
This model allows the voltage regulator of mMachine I to sense the voltage at a point separated
from the machine terminals by an impedance of RC + jXC.
VT VCT
V V T + ( R + jX C )I T
IT CT C ECOMP
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2-4
PSSE 34 Compensator Models
PSSE Model Library REMCMP
2.4 REMCMP
Voltage Regulator Current Compensating Model
This model allows the voltage regulator of machine ID to sense the voltage at a remote bus.
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2-5
Compensator Models PSSE 34
REMCMP PSSE Model Library
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2-6
Chapter 3
Stabilizer Models
This chapter contains a collection of data sheets for the stabilizer models contained in the PSSE
Chapter 3 - Stabilizer Models
Model Description
BEPSST Transient excitation boosting stabilizer model
IEE2ST Dual-input signal power system stabilizer model
IEEEST 1981 IEEE power system stabilizer model
IVOST IVO stabilizer model
OSTB2T Ontario Hydro delta-omega power system stabilizer
OSTB5T Ontario Hydro delta-omega power system stabilizer
PSS1A IEEE Std. 421.5-2005 PSS1A Single-Input Stabilizer model
PSS2A 1992 IEEE type PSS2A dual-input signal stabilizer model
PSS2B IEEE 421.5 2005 PSS2B IEEE dual-input stabilizer model
PSS3B IEEE Std. 421.5 2005 PSS3B IEEE dual-input stabilizer model
PSS4B IEEE 421.5(2005) dual-input stabilizer model
PTIST1 PTI microprocessor-based stabilizer model
PTIST3 PTI microprocessor-based stabilizer model
ST2CUT Dual-input signal power system stabilizer model
STAB1 Speed sensitive stabilizer model
STAB2A ASEA power sensitive stabilizer model
STAB3 Power sensitive stabilizer model
STAB4 Power sensitive stabilizer model
STABNI Power sensitive stabilizer model type NI (NVE)
STBSVC WECC supplementary signal for static var system
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3-1
Stabilizer Models PSSE 34
BEPSST PSSE Model Library
3.1 BEPSST
Transient Excitation Boosting PSS
J+4 T3 (sec)1
J+8 T7 (sec)
J+9 T8 (sec)
J+10 T9 (sec)
J+11 T10 (sec)
J+12 LSMAX
J+13 LSMIN
J+14 VCU (pu) (if equal zero, ignored)
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3-2
PSSE 34 Stabilizer Models
PSSE Model Library BEPSST
STATEs # Description
K PSS state 1
K+1 PSS state 2
K+2 PSS state 3
K+3 PSS state 4
K+4 PSS state 5
K+5 PSS state 6
K+6 TEB state 1
K+7 TEB state 2
VARs # Description
L Memory
L+1 Derivative of pu bus voltage (first bus)
L+2 Memory
L+3 Derivative of pu bus voltage (second bus)
L+4 Initial bus voltage (pu)
L+5 RETREAT
L+6 VMAX
T 12
RETREAT = C RT ------------------------
T 12 T 11
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3-3
Stabilizer Models PSSE 34
BEPSST PSSE Model Library
K1
Input
Signal #1 1 + sT1
+
sT3 1 + sT5 1 + sT7 1 + sT9
1 + sT4 1 + sT6 1 + sT8 1 + sT10
+
K2
Input Output Limiter
Signal #2 1 + sT2 LSMAX
VS = VSS if VCU + VTO > VT > VCL + VTO
VS = 0 if VT < VTO + VCL +
VSS VOTHSG
VS = 0 if VT > VTO + VCU
+
LSMIN
VMAX =
If VT > VLIMIT
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3-4
PSSE 34 Stabilizer Models
PSSE Model Library IEE2ST
3.2 IEE2ST
IEEE Stabilizing Model With Dual-Input Signals
J+4 T3 (sec)1
J+5 T4 (>0) (sec)
J+6 T5 (sec)
J+7 T6 (sec)
J+8 T7 (sec)
J+9 T8 (sec)
J+10 T9 (sec)
J+11 T10 (sec)
J+12 LSMAX
J+13 LSMIN
J+14 VCU (pu) (if equal zero, ignored.)
J+15 VCL (pu) (if equal zero, ignored.)
1 If T equals 0, sT will equal 1.0.
3 3
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3-5
Stabilizer Models PSSE 34
IEE2ST PSSE Model Library
STATEs # Description
K First signal transducer
K+1 Second signal transducer
K+2 Washout
K+3 First lead-lag
K+4 Second lead-lag
K+5 Third lead-lag
VARs # Description
L Memory
L+1 Derivative of pu bus voltage, first bus
L+2 Memory
L+3 Derivative of pu bus voltage, second bus
Input K1
Signal #1 1 + sT1
+
sT3 1 + sT5 1 + sT7
1 + sT4 1 + sT6 1 + sT8
+
Input K2
Signal #2 1 + sT2 Output Limiter
LSMAX
VS = VSS if (VCU > VCT > VCL)
1 + sT9
1 + sT10 VS = 0 if (VCT < VCL) VOTHSG
VSS
VS = 0 if (VCT > VCU)
LSMIN
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3-6
PSSE 34 Stabilizer Models
PSSE Model Library IEEEST
3.3 IEEEST
IEEE Stabilizing Model
J+3 A4
J+4 A5
J+5 A6
J+6 T1 (sec)
J+7 T2 (sec)
J+8 T3 (sec)
J+9 T4 (sec)
J+10 T5 (sec)1
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3-7
Stabilizer Models PSSE 34
IEEEST PSSE Model Library
STATEs # Description
K 1st filter integration
K+1 2nd filter integration
K+2 3rd filter integration
K+3 4th filter integration
K+4 T1/T2 lead-lag integrator
K+5 T3/T4 lead-lag integrator
K+6 Last integer
VARs # Description
L Memory
L+1 Derivative of pu bus voltage
Filter
1 + A5s + A6s2
Input 1 + sT1 1 + sT3
Signal (1 + A1s + A2s2) (1 + A3s + A4s2) 1 + sT2 1 + sT4
Output Limiter
LSMAX
VS = VSS, if (VCU > VCT > VCL)
sT5
KS VS = 0, if (VCT < VCL) VOTHSG
1 + sT6 VSS
VS = 0, if (VCT > VCU)
LSMIN
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3-8
PSSE 34 Stabilizer Models
PSSE Model Library IVOST
3.4 IVOST
IVO Stabilizer Model
J+4 T2
J+5 MAX1
J+6 MIN1
J+7 K3
J+8 A3
J+9 A4
J+10 T3
J+11 T4
J+12 MAX3
J+13 MIN3
J+14 K5
J+15 A5
J+16 A6
J+17 T5
J+18 T6
J+19 MAX5
J+20 MIN5
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3-9
Stabilizer Models PSSE 34
IVOST PSSE Model Library
STATEs # Description
K Integrator 1
K+1 Integrator 2
K+2 Integrator 3
MAX1 MAX3
MAX5
A +T S A +T S A +T S
1 1 3 3 5 5
PELEC K ------------------------ K ------------------------ K ------------------------ VOTHSG
1A + T S 3A + T S 5A + T S
2 2 4 4 6 6
MIN5
MIN1 MIN3
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3-10
PSSE 34 Stabilizer Models
PSSE Model Library OSTB2T
3.5 OSTB2T
Ontario Hydro Delta-Omega Power System Stabilizer
J+18 EFDTHR
J+19 TSEAL
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3-11
Stabilizer Models PSSE 34
OSTB2T PSSE Model Library
STATEs # Description
K Washout TS block
K+1 Lead-lag T1/T3 block
K+2 Lead-lag T2/T4 block
K+3 TANG block
VARs # Description
L S1
L+1 TSEC duration
L+2 TSEAL duration
VNGMX
VMGMX
KANG
1 + sTANG
0
S1
HLIM + VSMX
K TS 1 + sT1 1 + sT2 +
VOTHSG
1 + sTS 1 + sT3 1 + sT4
Speed
LLIM VSMN
(pu)
Notes:
1. S1 normally open.
2. S1 closes if Et < ETHR and > THR or > THR within TSEAL seconds of last
time Et < ETHR.
4. S1 opens if:
a. < THR, or
b. EFD < EFDTHR, or
c. after being closed for T-OFF seconds.
5. Once open, stays open.
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3-12
PSSE 34 Stabilizer Models
PSSE Model Library OSTB5T
3.6 OSTB5T
Ontario Hydro Delta-Omega Power System Stabilizer
J+3 T2(sec)
J+4 T3/T4
J+5 T4 (>0) (sec)
J+6 HLIM
J+7 LLIM
J+8 KANG (>0)
J+9 TANG
J+10 VNGMX
J+11 VMGMX
J+12 T-ON
J+13 T-OFF
J+14 VSMX
J+15 VSMN
J+16 THR
J+17 ETHR
J+18 EFDTHR
J+19 TSEAL
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3-13
Stabilizer Models PSSE 34
OSTB5T PSSE Model Library
STATEs # Description
K Washout TS block
K+1 Quadratic lead-lag block
K+2 Quadratic lead-lag block
K+3 TANG block
VARs # Description
L S1
L+1 TSEC duration
L+2 TSEAL duration
VNGMX
VMGMX
KANG
1 + sTANG
0
S1
HLIM + VSMX
K TS 1 + sT1 1 + sT2 +
VOTHSG
1 + sTS 1 + sT3 1 + sT4
Speed
LLIM VSMN
(pu)
Notes:
1. S1 normally open.
2. S1 closes if Et < ETHR and > THR or > THR within TSEAL seconds of last
time Et < ETHR.
4. S1 opens if:
a. < THR, or
b. EFD < EFDTHR, or
c. after being closed for T-OFF seconds.
5. Once open, stays open.
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3-14
PSSE 34 Stabilizer Models
PSSE Model Library PSS1A
3.7 PSS1A
IEEE Std. 421.5-2005 PSS1A Single-Input Stabilizer Model
The PSSE model IEEEST can be used to simulate the PSS1A model. The correspondence
between the IEEEST model CONs and the PSS1A parameters (shown in the block) diagram are as
given in the table below.
PSS1A parameter
CONs IEEEST CON
(as shown in the PSS1A block diagram)
J A1 A1
J+1 A2 A2
J+2 A3 TR
J+3 A4 0.0
J+4 A5 0.0
J+5 A6 0.0
J+6 T1 T1
J+7 T2 T2
J+8 T3 T3
J+9 T4 T4
J+10 T5 Tw
J+11 T6 Tw
J+12 KS KS
J+13 LSMAX VSTMAX
J+14 LSMIN VSTMIN
J+15 VCU 0.0
J+16 VCL 0.0
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3-15
Stabilizer Models PSSE 34
PSS2A PSSE Model Library
3.8 PSS2A
IEEE Dual-Input Stabilizer Model
J+5 T7
J+6 KS2
J+7 KS3
J+8 T8
J+9 T9 (>0)
J+10 KS1
J+11 T1
J+12 T2
J+13 T3
J+14 T4
J+15 VSTMAX
J+16 VSTMIN
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3-16
PSSE 34 Stabilizer Models
PSSE Model Library PSS2A
STATEs # Description
K Washout, first signal
K+1 Washout, first signal
K+2 Transducer, first signal
K+3 Washout, second signal
K+4 Washout, second signal
K+5 Transducer, second signal
K+6
.
. Ramp Tracking Filter
.
K+13
K+14 First lead-lag
K+15 Second lead-lag
VARs # Description
L Memory
L+1 Derivative of pu bus voltage, first bus
L+2 Memory
L+3 Derivative of pu bus voltage, second bus
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3-17
Stabilizer Models PSSE 34
PSS2A PSSE Model Library
Model Notes:
M0
N0
MN8
If M = 0, then N is set equal to 0
To bypass: set M = N = 0
Washouts
Transducers
Lead-Lags
VSTMAX
N
sTw1 sTw2 1 + 1 + sT8 + 1 + sT1 1 + sT3
Input 1 + sTw1 1 + sTw2 KS1 VOTHSG
1 + sT6
Signal #1 (1 + sT9)M 1 + sT2 1 + sT4
+
VSTMIN
KS3
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3-18
PSSE 34 Stabilizer Models
PSSE Model Library PSS2B
3.9 PSS2B
IEEE 421.5 2005 PSS2B IEEE Dual-Input Stabilizer Model
J+3 Tw3
J+4 Tw4
J+5 T7
J+6 KS2
J+7 KS3
J+8 T8
J+9 T9 (> 0)
J+10 KS1
J+11 T1
J+12 T2
J+13 T3
J+14 T4
J+15 T10
J+16 T11
J+17 VS1MAX
J+18 VS1MIN
J+19 VS2MAX
J+20 VS2MIN
J+21 VSTMAX
J+22 VSTMIN
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3-19
Stabilizer Models PSSE 34
PSS2B PSSE Model Library
STATEs # Description
K Washout-first signal
K+1 Washout-first signal
K+2 Transducer-first signal
K+3 Washout-second signal
K+4 Washout-second signal
K+5 Transducer-second signal
K+6
.
. Ramp tracking filter
.
K+13
K+14 First lead-lag
K+15 Second lead-lag
K+16 Third lead-lag
VARs # Description
L Memory
L+1 Derivative of pu bus voltage-first bus
L+2 Memory
L+3 Derivative of pu bus voltage-second bus
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3-20
PSSE 34 Stabilizer Models
PSSE Model Library PSS2B
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3-21
Stabilizer Models PSSE 34
PSS2B PSSE Model Library
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3-22
PSSE 34 Stabilizer Models
PSSE Model Library PSS3B
3.10 PSS3B
IEEE Std. 421.5 2005 PSS3B IEEE Dual-Input Stabilizer Model
J+9 A3
J+10 A4
J+11 A5
J+12 A6
J+13 A7
J+14 A8
J+15 VSTMAX (pu), stabilizer output maximum limit
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3-23
Stabilizer Models PSSE 34
PSS3B PSSE Model Library
STATEs # Description
K Time lead block (first signal)
K+1 Time lead block (second signal)
K+2 First signal washout
K+3 Second signal washout
K+4 Washout block
K+5
First two-order block
K+6
K+7
Second two-order block
K+8
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3-24
PSSE 34 Stabilizer Models
PSSE Model Library PSS3B
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3-25
Stabilizer Models PSSE 34
PSS4B PSSE Model Library
3.11 PSS4B
IEEE 421.5(2005) Dual-Input Stabilizer Model
J+1 DL-I
J+3 BL-I
J+4 BL-I1
J+5 L-I1
J+6 BL-I2
J+7 L-I2
J+8 TH (>0)
J+9 AH (>0)
J+10 BH
J+11 M
J+12 BH1
J+13 H1
J+14 BH2
J+15 H2
J+16 KL1
J+17 KL11
J+18 TL1
J+19 TL2
J+20 TL3
J+21 TL4
J+22 TL5
J+23 TL6
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3-26
PSSE 34 Stabilizer Models
PSSE Model Library PSS4B
J+25 KL17
J+26 TL7
J+27 TL8
J+28 TL9
J+29 TL10
J+30 TL11
J+31 TL12
J+32 KL
J+33 VLmax
J+34 VLmin
J+35 KI1
J+36 KI11
J+37 TI1
J+38 TI2
J+39 TI3
J+40 TI4
J+41 TI5
J+42 TI6
J+43 KI2
J+44 KI17
J+45 TI7
J+46 TI8
J+47 TI9
J+48 TI10
J+49 TI11
J+50 TI12
J+51 KI
J+52 VImax
J+53 VImin
J+54 KH1
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3-27
Stabilizer Models PSSE 34
PSS4B PSSE Model Library
J+56 TH1
J+57 TH2
J+58 TH3
J+59 TH4
J+60 TH5
J+61 TH6
J+62 KH2
J+63 KH17
J+64 TH7
J+65 TH8
J+66 TH9
J+67 TH10
J+68 TH11
J+69 TH12
J+70 KH
J+71 VHmax
J+72 VHmin
J+73 VSTmax
J+74 VSTmin
STATEs # Description
K
First signal transducer
K+1
K+2
First notch filter (first signal)
K+3
K+4
Second notch filter (first signal)
K+5
K+6
K+7 Second signal transducer
K+8
K+9 Time lag block (second signal)
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3-28
PSSE 34 Stabilizer Models
PSSE Model Library PSS4B
STATEs # Description
K+10
First Notch filter (second signal)
K+11
K+12
Second notch filter (second signal)
K+13
K+14 Lead-lag (low frequency, part 1)
K+15 Lead-lag (low frequency, part 1)
K+16 Lead-lag (low frequency, part 1)
K+17 Lead-lag (low frequency, part 2)
K+18 Lead-lag (low frequency, part 2)
K+19 Lead-lag (low frequency, part 2)
K+20 Lead-lag (medium frequency, part 1)
K+21 Lead-lag (medium frequency, part 1)
K+22 Lead-lag (medium frequency, part 1)
K+23 Lead-lag (medium frequency, part 2)
K+24 Lead-lag (medium frequency, part 2)
K+25 Lead-lag (medium frequency, part 2)
K+26 Lead-lag (high frequency, part 1)
K+27 Lead-lag (high frequency, part 1)
K+28 Lead-lag (high frequency, part 1)
K+29 Lead-lag (high frequency, part 2)
K+30 Lead-lag (high frequency, part 2)
K+31 Lead-lag (high frequency, part 2)
VARs # Description
L L-I
L+1 H
L+2 VL
L+3 VI
L+4 VH
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3-29
Stabilizer Models PSSE 34
PSS4B PSSE Model Library
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3-30
PSSE 34 Stabilizer Models
PSSE Model Library PTIST1
3.12 PTIST1
PTI Microprocessor-Based Stabilizer
J+10 T3
J+11 T4
VARs # Description
L from EQ
L+1 Pe average
L+2 Vdl
L+3 Vql
L+4
L+5 States for transfer
L+6
L+7 Function
L+8 Tap setting
L+9 Pe last
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3-31
Stabilizer Models PSSE 34
PTIST1 PSSE Model Library
ICONs # Description
Number of time steps to activate frequency
M
calculation
Number of time steps to activate power
M+1
calculation
M+2 Number of time steps to activate controls
+
+ PM K(1 + sT1) (1 + sT3) Tap
Ms +
Selection X VOTHSG
1 + sTF (1 + sT2) (1 + sT4) Table
+
Et
1 Pe on MBASE base
1 + sTP
M = 2. H
TF = TP 0.2 sec
K = 1 to 10, depends on tuning
T1 = 0.1 to 0.5, depends on tuning
T2 = 1 to 3 sec
T3 = 0.1 to 0.5, depends on tuning
T4 = 0.05 sec
tF = tC = 0.025 sec
tP = 0.0125 sec
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3-32
PSSE 34 Stabilizer Models
PSSE Model Library PTIST3
3.13 PTIST3
PTI Microprocessor-Based Stabilizer
J+1 tP
J+2 tC
J+3 Xq
J+4 M
J+5 TP > 0
J+6 TF > 0
J+7 K
J+8 T1
J+9 T2 > 0
J+10 T3
J+11 T4 >0
J+12 T5
J+13 T6 (see Note 1)
J+14 A0
J+15 A1
J+16 A2
J+17 B0
J+18 B1
J+19 B2 (see Note 2)
J+20 A3
J+21 A4
J+22 A5
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3-33
Stabilizer Models PSSE 34
PTIST3 PSSE Model Library
J+27 DL
J+28 AL
J+29 LTHRES (see Note 4)
J+30 PMIN (see Note 6)
VARs # Description
L from EQ
L+1 Pe average
L+2 Vdl
L+3 Vql
L+4 Frequency filter state or store
L+5 Power filter state or store
L+6 1st lead/lag state or store
L+7 2nd lead/lag state or store
L+8 Tap setting or analog output
L+9 PELAST
L+10 3rd lead/lag state or store
L+11 Torsional filter store
L+12 Torsional filter store
L+13 Torsional filter store
L+14 Torsional filter store
L+15 Frequency filter output
L+16 Power filter output
L+17 1st lead/lag output
L+18 2nd lead/lag output
L+19 3rd lead/lag output
L+20 1st stage torsional filter output
L+21 2nd stage torsional filter output
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3-34
PSSE 34 Stabilizer Models
PSSE Model Library PTIST3
VARs # Description
L+22
.
. Output averaging table
.
L+37
L+38 Output accumulator
L+39 Analog ramp
Optional Features:
1. Third Lead/Lag
To disable: set T6 = 0
If enabled: T6 > 0
2. Torsional Filter
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3-35
Stabilizer Models PSSE 34
PTIST3 PSSE Model Library
Ms + + K(1 + sT1) (1 + sT3) 1 + sT5 (A0 + A1s + A2s2) (A3 + A4s + A5s2)
1 + sTF PM (1 + sT2) (1 + sT4) 1 + sT6 (B0 + B1s + B2s2) (B3 + B4s + B5s2)
+
1 VAR(L+1)
1 + sTP Pe average
1 Et
DL
+
ICON(M)=0 Tap
Selection X
Table
Averaging Limit VOTHSG
Function Function DL
AL
ICON(M)=1
AL
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3-36
PSSE 34 Stabilizer Models
PSSE Model Library ST2CUT
3.14 ST2CUT
Stabilizing Model With Dual-Input Signals
J+3 T2 (sec)
J+4 T3 (sec)1
J+5 T4 (>0) (sec)
J+6 T5 (sec)
J+7 T6 (sec)
J+8 T7 (sec)
J+9 T8 (sec)
J+10 T9 (sec)
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3-37
Stabilizer Models PSSE 34
ST2CUT PSSE Model Library
STATEs # Description
K First signal transducer
K+1 Second signal transducer
K+2 Washout
K+3 First lead-lag
K+4 Second lead-lag
K+5 Third lead-lag
VARs # Description
L Memory
L+1 Derivative of pu bus voltage, first bus
L+2 Memory
L+3 Derivative of pu bus voltage, second bus
L+4 Initial bus voltage (pu)
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3-38
PSSE 34 Stabilizer Models
PSSE Model Library ST2CUT
K1
Input
Signal #1 1 + sT1
+
sT3 1 + sT5 1 + sT7 1 + sT9
1 + sT4 1 + sT6 1 + sT8 1 + sT10
+
K2
Input
Signal #2 1 + sT2
Output Limiter
LSMAX
VS = VSS if VCU + VTO > VT > VCL + VTO
VS = 0 if VT < VTO + VCL VOTHSG
VSS
VS = 0 if VT > VTO + VCU
LSMIN
VT is the terminal voltage at bus IBUS.
VTO is the initial terminal voltage at bus IBUS.
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3-39
Stabilizer Models PSSE 34
STAB1 PSSE Model Library
3.15 STAB1
Speed Sensitive Stabilizing Model
J K/T (sec)-1
J+1 T (sec) (>0)
J+2 T1/T3
J+3 T3 (sec) (>0)
J+4 T2/T4
J+5 T4 (sec) (>0)
J+6 HLIM
STATEs # Description
K Washout
K+1 First lead-lag
K+2 Second lead-lag
HLIM
-HLIM
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3-40
PSSE 34 Stabilizer Models
PSSE Model Library STAB2A
3.16 STAB2A
Power Sensitive Stabilizing Unit (ASEA)
J+4 K4
J+5 K5
J+6 T5 (sec) (>0)
J+7 HLIM
STATEs # Description
K Implicit
K+1 Integration
K+2 State
K+3 Variables
K3
1 + sT3 HLIM
+
Machine
Electrical K5 2
K 2 sT 2 3
Power on ------------------ ------------------ VOTHSG
MBASE 1 + sT2 1 + sT 5
Base + -HLIM
K4
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3-41
Stabilizer Models PSSE 34
STAB3 PSSE Model Library
3.17 STAB3
Power Sensitive Stabilizing Unit
STATEs # Description
K First time constant output
K+1 Second time constant output
K+2 Unlimited signal
VAR # Description
L Power reference signal
Pref = VAR(L)
VLIM
Machine
Electrical 1 + 1 -sKX
Power on VOTHSG
1 + sTt 1 + sTX1 1 + sTX2
MBASE
VLIM
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3-42
PSSE 34 Stabilizer Models
PSSE Model Library STAB4
3.18 STAB4
Power Sensitive Stabilizer
J+4 Ta (sec)
J+5 Tb (sec)
J+6 Tc (sec) (>0)
J+7 Td (sec)
J+8 Te (sec)
J+9 L1 (pu) low limit
J+10 L2 (pu) high limit
STATEs # Description
K Transducer output
K+1 Reset state
K+2 1st lead lag
K+3 2nd lead lag
K+4 5th state
K+5 Unlimited signal
VAR # Description
L Initial electrical power
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3-43
Stabilizer Models PSSE 34
STAB4 PSSE Model Library
Pref = VAR(L)
Limiter
Machine
Electrical + sKX 1 + sTa 1 + sTb 1 1 L2
1
Power on VOTHSG
1 + sTT 1 + sTX2 1 + sTX1 1 + sTc 1 + sTd 1 + sTe L1
MBASE
Base
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3-44
PSSE 34 Stabilizer Models
PSSE Model Library STABNI
3.19 STABNI
Power Sensitive Stabilizer Model Type NI (NVE)
STATEs # Description
K Filter
K+1 Filter
K+2 Filter
K+3 Filter
K+4 Output
+ LIMIT
2
K (1 + T S)(T S)
-------------------- 1 0
PELEC(I) -------------------------------------------- 1 VOTHSG(I)
1+T S 4
2 (1 + T S)
0
LIMIT
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3-45
Stabilizer Models PSSE 34
STBSVC PSSE Model Library
3.20 STBSVC
WECC Supplementary Signal for Static var Compensator
J+8 KS2
J+9 TS10 (sec)
J+10 TS11 (sec)
J+11 TS12 (>0, if KS2 0) sec
STATEs # Description
K Filter for signal (1)
K+1 Lead-lag for signal (1)
K+2 Filter for signal (2)
K+3 Lead-lag for signal (2)
Wash out with time constant for both
K+4
signals
VAR # Description
L MW flow-through branch
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3-46
PSSE 34 Stabilizer Models
PSSE Model Library STBSVC
KS1 1 + sTS8
Signal 1
1 + sTS7 1 + sTS9 VSCS
+
sTS13
KS3 VOTHSG
1 + sTS14
+
KS2 1 + sTS11 VSCS
Signal 2
1 + sTS10 1 + sTS12
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3-47
Stabilizer Models PSSE 34
STBSVC PSSE Model Library
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3-48
Chapter 4
Minimum Excitation Limiter Models
This chapter contains a collection of data sheets for the minimum excitation limiter models con-
Chapter 4 - Minimum Excitation Limiter Models
Model Description
MNLEX1 Minimum excitation limiter model
MNLEX2 Minimum excitation limiter model
MNLEX3 Minimum excitation limiter model
UEL1 IEEE 421.5 2005 UEL1 under-excitation limiter
UEL2 IEEE 421.5 2005 UEL2 minimum excitation limiter
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4-1
Minimum Excitation Limiter Models PSSE 34
MNLEX1 PSSE Model Library
4.1 MNLEX1
Minimum Excitation Limiter
EFD
STATEs # Description
K MEL feedback integrator
K+1 MEL
VAR # Description
L PQSIG
MELMAX
+ KM + sKF2
IREAL EFD
PQSIG 1 + sTM 1 + sTF2
0 VUEL
1
K
XADIFD
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4-2
PSSE 34 Minimum Excitation Limiter Models
PSSE Model Library MNLEX2
4.2 MNLEX2
Minimum Excitation Limiter
STATEs # Description
K MEL feedback integrator
K+1 MEL
VAR # Description
L PQSIG
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4-3
Minimum Excitation Limiter Models PSSE 34
MNLEX2 PSSE Model Library
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4-4
PSSE 34 Minimum Excitation Limiter Models
PSSE Model Library MNLEX3
4.3 MNLEX3
Minimum Excitation Limiter
STATEs # Description
K MEL feedback integrator
K+1 MEL
VAR # Description
L PQSIG
Q
VT MELMAX
-
Qo + + + KM
VUEL Q/V
(1.0 pu) PQSIG 1 + sTM
+
0
sKF2
B
1 + sTF2 P/V
P Qo B = Slope
EFD (1.0 pu V)
VT
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4-5
Minimum Excitation Limiter Models PSSE 34
UEL1 PSSE Model Library
4.4 UEL1
IEEE 421.5 2005 UEL1 Under-Excitation Limiter
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4-6
PSSE 34 Minimum Excitation Limiter Models
PSSE Model Library UEL1
STATEs # Description
K Integrator
K+1 First lead-lag
K+2 Second lead-lag
VARs # Description
L Reference input signal
L+1 VUC
L+2 VUR
L+3 VUerr
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4-7
Minimum Excitation Limiter Models PSSE 34
UEL1 PSSE Model Library
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4-8
PSSE 34 Minimum Excitation Limiter Models
PSSE Model Library UEL1
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4-9
Minimum Excitation Limiter Models PSSE 34
UEL2 PSSE Model Library
4.5 UEL2
IEEE 421.5 2005 UEL2 Minimum Excitation Limiter
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4-10
PSSE 34 Minimum Excitation Limiter Models
PSSE Model Library UEL2
STATEs # Description
K Voltage filter output
K+1 Real power filter output
K+2 Reactive power filter output
K+3 Integrator
K+4 Reference feedback block
K+5 First lead-lag
K+6 Second lead-lag
VARs # Description
L Reference input signal
L+1 Q, normalized reactive power output for 1 pu voltage
L+2 QREF
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4-11
Minimum Excitation Limiter Models PSSE 34
UEL2 PSSE Model Library
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4-12
PSSE 34 Minimum Excitation Limiter Models
PSSE Model Library UEL2
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4-13
Minimum Excitation Limiter Models PSSE 34
UEL2 PSSE Model Library
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4-14
Chapter 5
Maximum Excitation Limiter Models
This chapter contains a collection of data sheets for the maximum excitation limiter models con-
Chapter 5 - Maximum Excitation Limiter Models
Model Description
MAXEX1 Maximum excitation limiter model
MAXEX2 Maximum excitation limiter model
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5-1
Maximum Excitation Limiter Models PSSE 34
MAXEX1 PSSE Model Library
5.1 MAXEX1
Maximum Excitation Limiter
J+8 KMX
J+9 VLOW
VAR # Description
K Contact position
EFDDES * EFDRATED
+
0
EFD KMX VOEL
VLOW
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5-2
PSSE 34 Maximum Excitation Limiter Models
PSSE Model Library MAXEX1
(EFD1, TIME1)
Time (sec)
(EFD2, TIME2)
(EFD3, TIME3)
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5-3
Maximum Excitation Limiter Models PSSE 34
MAXEX2 PSSE Model Library
5.2 MAXEX2
Maximum Excitation Limiter
J+8 KMX
J+9 VLOW (< 0)
VAR # Description
K Contact position
STATE # Description
L Reset integrator
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5-4
PSSE 34 Maximum Excitation Limiter Models
PSSE Model Library MAXEX2
EFDDES or IFDDES 0.
+
EFD KMX
VOEL
or IFD S
VLOW
(EFD1, TIME1)
or
(IFD1, TIME1)
Time (sec)
(EFD2, TIME2)
or
(IFD2, TIME2)
(EFD3, TIME3)
or
(IFD3, TIME3)
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5-5
Maximum Excitation Limiter Models PSSE 34
MAXEX2 PSSE Model Library
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5-6
Chapter 6
Excitation System Models
This chapter contains a collection of data sheets for the excitation system models contained in the
Chapter 6 - Excitation System Models
Model Description
AC1C IEEE 421.5 Excitation System Model
AC2C IEEE 421.5 excitation system model
AC3C IEEE 421.5 excitation system model
AC4C IEEE 421.5 excitation system model
AC5C IEEE 421.5 excitation system model
AC6A IEEE 421.5 excitation system model
AC6C IEEE 421.5 excitation system model
AC7B IEEE 421.5 2005 AC7B excitation system
AC8B IEEE 421.5 2005 AC8B excitation system
BBSEX1 Brown-Boveri static excitation system model
BUDCZT Czech proportional/integral excitation system model
CELIN ELIN brushless excitation system model
DC1C IEEE 421.5 excitation system model
DC2C IEEE 421.5 excitation system model
DC3A IEEE 421.5 2005 DC3A excitation system
DC4B IEEE 421.5 2005 DC4B excitation system
EMAC1T AEP Rockport excitation system model
ESAC1A 1992 IEEE type AC1A excitation system model
ESAC2A 1992 IEEE type AC2A excitation system model
ESAC3A 1992 IEEE type AC3A excitation system model
ESAC4A 1992 IEEE type AC4A excitation system model
ESAC5A 1992 IEEE type AC5A excitation system model
ESAC6A 1992 IEEE type AC6A excitation system model
ESAC8B Basler DECS model
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6-1
Excitation System Models PSSE 34
PSSE Model Library
Model Description
ESDC1A 1992 IEEE type DC1A excitation system model
ESDC2A 1992 IEEE type DC2A excitation system model
ESST1A 1992 IEEE type ST1A excitation system model
ESST2A 1992 IEEE type ST2A excitation system model
ESST3A 1992 IEEE type ST3A excitation system model
IEEE type ST4B potential or compounded source-controlled rectifier
ESST4B
exciter
ESURRY Modified IEEE Type AC1A excitation model
EX2000 EX2000 Excitation System
EXAC1 1981 IEEE type AC1 excitation system model
EXAC1A Modified type AC1 excitation system model
EXAC2 1981 IEEE type AC2 excitation system model
EXAC3 1981 IEEE type AC3 excitation system model
EXAC4 1981 IEEE type AC4 excitation system model
EXBAS Basler static voltage regulator feeding dc or ac rotating exciter model
EXDC2 1981 IEEE type DC2 excitation system model
EXELI Static PI transformer fed excitation system model
Bus or solid fed SCR bridge excitation system model type NEBB
EXNEBB
(NVE)
EXNI Bus or solid fed SCR bridge excitation system model type NI (NVE)
EXPIC1 Proportional/integral excitation system model
EXST1 1981 IEEE type ST1 excitation system model
EXST2 1981 IEEE type ST2 excitation system model
EXST2A Modified 1981 IEEE type ST2 excitation system model
EXST3 1981 IEEE type ST3 excitation system model
IEEET1 1968 IEEE type 1 excitation system model
IEEET2 1968 IEEE type 2 excitation system model
IEEET3 1968 IEEE type 3 excitation system model
IEEET4 1968 IEEE type 4 excitation system model
IEEET5 Modified 1968 IEEE type 4 excitation system model
1979 IEEE type 1 excitation system model and 1981 IEEE type DC1
IEEEX1
model
IEEEX2 1979 IEEE type 2 excitation system model
IEEEX3 1979 IEEE type 3 excitation system model
1979 IEEE type 4 excitation system, 1981 IEEE type DC3 and 1992
IEEEX4
IEEE type DC3A models
IEET1A Modified 1968 IEEE type 1 excitation system model
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6-2
PSSE 34 Excitation System Models
PSSE Model Library
Model Description
IEET1B Modified 1968 IEEE type 1 excitation system model
IEET5A Modified 1968 IEEE type 4 excitation system model
IEEX2A 1979 IEEE type 2A excitation system model
IVOEX IVO excitation system model
Ontario Hydro IEEE Type ST1 excitation system with continuous and
OEX12T
bang bang terminal voltage limiter
Ontario Hydro IEEE Type ST1 excitation system with semicontinuous
OEX3T
and acting terminal voltage limiter
REXSYS General purpose rotating excitation system model
REXSY1 General purpose rotating excitation system model
SCRX Bus or solid fed SCR bridge excitation system model
SEXS Simplified excitation system model
ST1C IEEE 421.5 excitation system model
ST5B IEEE 421.5 2005 ST5B excitation system
ST5C IEEE 421.5 excitation system model
ST7C IEEE 421.5 excitation system model
ST6B IEEE 421.5 2005 ST6B excitation system
ST7B IEEE 421.5 2005 ST7B excitation system
URHIDT High dam excitation system model
URST5T IEEE proposed type ST5B excitation system
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6-3
Excitation System Models PSSE 34
AC1C PSSE Model Library
6.1 AC1C
IEEE 421.5 Excitation System Model AC1C
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6-4
PSSE 34 Excitation System Models
PSSE Model Library AC1C
STATEs # Description
K Measurement lag
K+1 Lead-lag
K+2 Regulator
K+3 Exciter
K+4 Rate feedback
VARs # Description
L Output of HV gate
L+1 Output of LV gate
VARs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
VUEL VUEL
(UEL=1) (UEL=2)
VFEMAX K D I FD
VREF VAMAX K E + S E (VE )
V RMAX
+
+ +
ECOMP 1 1 + sTC KA VR 1 VE EFD
HV LV
1 + sTR + 1 + sT B 1 + sTA gate gate
+ sTE
+ s1 s2 s3 FEX
s0
V AMIN V RMIN VEMIN
VOTHSG VF FEX = f (IN )
VX
SE (EFD )
IN
+
sK F VFE
+ KE I N = KC
I FD
1 + sTF VE
s4 +
KD
1 IN 0 I FD
1 0.577 I 0 I N 0.433
N
2
FEX ( I N ) = 0.75 I N 0.433 < I N < 0.75
1.732 (1 I ) 0.75 I 1
N N
0 IN >1
Notes:
1. For AC brushless exciters, VEMIN has to be set to zero, and KC and KD have to be
greater than zero.
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6-5
Excitation System Models PSSE 34
AC2C PSSE Model Library
6.2 AC2C
IEEE 421.5 Excitation System Model AC2C
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6-6
PSSE 34 Excitation System Models
PSSE Model Library AC2C
STATEs # Description
K Measurement lag
K+1 Lead-lag
K+2 Regulator output
K+3 Exciter
K+4 Feedback output
VARs # Description
L Output of HV gate
L+1 Output of LV gate
VARs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
VOEL VOEL
(OEL=1) (OEL=2)
VUEL VUEL
(UEL=1) (UEL=2)
VFEMAX K D I FD
VREF VAMAX K E + S E (VE )
V RMAX
+
+ + VA
ECOMP 1 1 + sTC KA VR 1 VE EFD
HV LV
KB
1 + sTR + 1 + sT B 1 + sTA + gate gate
+ sTE
+ s1 s2 s3 FEX
s0 VH
V AMIN V RMIN VEMIN
VOTHSG VF FEX = f (IN )
KH VX
SE (EFD )
IN
+
sK F VFE
+ KE I N = KC
IFD
1 + sTF VE
s4 +
KD
1 IN 0 I FD
1 0.577 I 0 I N 0.433
N
FEX ( I N ) = 0.75 I N2 0.433 < I N < 0.75
1.732 (1 I ) 0.75 I 1
N N
0 IN >1
Notes:
1. For AC brushless exciters, VEMIN has to be set to zero, and KC and KD have to be
greater than zero.
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6-7
Excitation System Models PSSE 34
AC3C PSSE Model Library
6.3 AC3C
IEEE 421.5 Excitation System Model AC3C
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6-8
PSSE 34 Excitation System Models
PSSE Model Library AC3C
STATEs # Description
K Measurement lag
K+1 Lead-lag
K+2 Regulator output
K+3 Exciter
K+4 Feedback output
VARs # Description
L Output of HV gate
L+1 Output of LV gate
VARs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
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6-9
Excitation System Models PSSE 34
AC3C PSSE Model Library
VOEL
VUEL (OEL=1)
(UEL=1)
VUEL VOEL KR
(UEL=2) (OEL=2)
VFEMAX K D I FD
VREF VPIDMAX VAMAX K E + S E (VE )
+ +
ECOMP + K IA sK DA 1+ sTC KA VA VR VE EFD
1 - K PA + + + 1
1+ sTB HV LV +
1 + sTR s 1 + sTDA gate gate 1 + sTA sTE
s0
+ s5, s6 s1 s2 FEX
s3
VPIDMIN V AMIN
VEMIN
VOTHSG
VFE FEX = f (IN )
VX
VF SE (EFD )
IN
+
+
+ KE I N = KC
IFD
VE
+
KD
IFD
VN KN
s VN KF
1 + sT F
s4
EFDN EFD
1 IN 0
1 0.577 I 0 I N 0.433
N
FEX ( I N ) = 0.75 I N2 0.433 < I N < 0.75
1.732 (1 I ) 0.75 I 1
N N
0 IN >1
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6-10
PSSE 34 Excitation System Models
PSSE Model Library AC4C
6.4 AC4C
IEEE 421.5 Excitation System Model AC4C
STATEs # Description
K Measurement lag
K+1 Lead-lag
K+2 Regulator
VARs # Description
L Output of HV gate
L+1 Output of LV gate
ICONs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
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6-11
Excitation System Models PSSE 34
AC4C PSSE Model Library
VUEL VUEL
(UEL=1) (UEL=2)
VREF
VIMAX VRMAX KC I FD
+
+ +
ECOMP 1 EFD
1 + sTC HV LV KA
1 + sTR VI 1 + sT B gate gate 1 + sTA
+ s1 s2
s0
VIMIN VRMIN
VOTHSG
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6-12
PSSE 34 Excitation System Models
PSSE Model Library AC5C
6.5 AC5C
IEEE 421.5 Excitation System Model AC5C
STATEs # Description
K Measurement lag
K+1 Lead-lag
K+2 Exciter output
K+3 Washout
K+4 Feedback lead-lag
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6-13
Excitation System Models PSSE 34
AC5C PSSE Model Library
VARs # Description
L KE
L+1 Output of HV gate
L+2 Output of LV gate
ICONs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
VUEL VUEL
(UEL=1) (UEL=2)
VFEMAX K D I FD
VREF VRMAX K E + S E (VE )
+
+ +
ECOMP 1 KA VR 1 VE EFD
HV LV
1 + sTR + 1 + sTA gate gate
+ sTE
+ FEX
s0 s1 s2
V RMIN VEMIN
VOTHSG VF VFE FEX = f (IN )
VX
SE (EFD )
IN
+
+ + I FD
KE I N = KC
VE
+
1 + sT F 3 sK F KD
1 + sT F 2 1 + sTF1 I FD
s4 s3
1 IN 0
1 0.577 I 0 I N 0.433
N
2
FEX ( I N ) = 0.75 I N 0.433 < I N < 0.75
1.732 (1 I ) 0.75 I 1
N N
0 IN >1
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6-14
PSSE 34 Excitation System Models
PSSE Model Library AC6A
6.6 AC6A
Modified ESAC6A Model
J+3 TK (sec)
J+4 TB (sec)
J+5 TC (sec)
J+6 VAMAX
J+7 VAMIN
J+8 VRMAX
J+9 VRMIN
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6-15
Excitation System Models PSSE 34
AC6A PSSE Model Library
STATEs # Description
K Sensed ET
K+1 First block
K+2 Lead lag
K+3 VE
K+4 Feedback
VS V
UEL VAMAX
+ VT VRMAX
+ 1 + sTC +
1 KA(1 + sTK) + 1 VE
EC EFD
1 + sTR VC (1 + sTA) 1 + sTB VA VR sTE
+
VT VRMIN
VAMIN 0
VREF
FEX = f(IN)
VX = VE SE (VE)
VX
+
+ KE
VHMAX KCIFD
+ IN =
(1 + sTJ) + VE
KH
(1 + sTH) VH VFE
+ KD
0 IFD
VS = VOTHSG + VOEL VFELIM
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
Notes:
AC6A is a modified version of ESACA. The difference between AC6A and ESAC6A is in the way
the non-windup limit is applied on the lead-log block (STATE(K+2)). In the AC6A model, the imple-
mentation of the non-windup limit on STATE(K+2) is consistent with the recommendation as given
in the IEEE 421.5 2005 standard.
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6-16
PSSE 34 Excitation System Models
PSSE Model Library AC6C
6.7 AC6C
IEEE 421.5 Excitation System Model AC6C
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6-17
Excitation System Models PSSE 34
AC6C PSSE Model Library
STATEs # Description
K Measurement lag
K+1 First lead-lag
K+2 Second lead-lag
K+3 Exciter output
K+4 Feedback
VARs # Description
L Output of HV gate
L+1 Output of LV gate
ICONs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
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6-18
PSSE 34
VOEL VOEL
(OEL=1) (OEL=2)
VUEL VUEL
(UEL=1) (UEL=2)
PSSE Model Library
VFEMAX K D I FD
VREF VAMAX VT VRMAX K E S E (VE )
+
+ +
ECOMP 1 VA VR 1 VE EFD
1 sT K 1 sT C HV LV
6 6 KA gate gate
6 6 3
1 sTR + 1 sT A 1 sT B + + sTE
+ s1 s2 s3 FEX
s0
V AMIN VT VRMIN VEMIN
VOTHSG FEX f IN
VX
VHMAX SE EFD
IN
VFE +
1 sT J + IFD
6-19
KH 6 6 KE I N KC
1 sT H VE
+
s4
KD
0 IFD
VFELIM
1 IN d 0
1 0.577 I
N 0 d I N d 0.433
2
FEX ( I N ) 0.75 I N 0.433 I N 0.75
1.732 (1 I ) 0.75 d I d 1
N N
0 IN !1
Excitation System Models
AC6C
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Excitation System Models PSSE 34
AC7B PSSE Model Library
6.8 AC7B
IEEE 421.5 2005 AC7B Excitation System
J+11 KP (pu)1
J+12 KL (pu)
J+13 KF1 (pu)
J+14 KF2 (pu)
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6-20
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
STATEs # Description
K Sensed Vt
K+1 Integral channel 1
K+2 Derivative channel 1
K+3 Integral channel 2
6-21
K+4 VE
K+5 Rate feedback
VARs # Description
L VR
L+1 VA
AC7B
Excitation System Models PSSE 34
AC7B PSSE Model Library
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6-22
PSSE 34 Excitation System Models
PSSE Model Library AC8B
6.9 AC8B
IEEE 421.5 2005 AC8B Excitation System
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6-23
Excitation System Models PSSE 34
AC8B PSSE Model Library
STATEs # Description
K Sensed Vt
K+1 Integral channel PID
K+2 Derivative channel PID
K+3 VR
K+4 VE
VARs # Description
L VPID
L+1 FEX
L+2 VEMAX
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6-24
PSSE 34 Excitation System Models
PSSE Model Library BBSEX1
6.10 BBSEX1
Brown Boveri Static Exciter
VOEL
J+4 T3 (sec)
J+5 T4 (sec)
J+6 VRMAX
J+7 VRMIN
J+8 EFDMAX
J+9 EFDMIN
J+10 Switch
STATEs # Description
K Sensed VT
K+1 Lead lag
K+2 Regulator feedback
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6-25
Excitation System Models PSSE 34
BBSEX1 PSSE Model Library
VREF
+ VRMAX VT*EFDMAX
1 1 + sT3 T EFD
EC + 2 +
K ------ (pu)
(pu) 1 + sTF 1 + sT4 T
1
+ + VRMIN + V *EFD
T MIN
T
1- ------
1 1 ------------------
1 -
---
KT 1 + sT
2 2
0 Switch = 0
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6-26
PSSE 34 Excitation System Models
PSSE Model Library BUDCZT
6.11 BUDCZT
Czech Proportion/Integral Exciter
STATEs # Description
K Transducer
K+1 PI regulator
K+2 Actuator
K+3 Exciter
VAR # Description
L Actuator input UREG
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6-27
Excitation System Models PSSE 34
BUDCZT PSSE Model Library
Regulator
VREF
Measuring KP
Transducer + +
1 URMAX URMAX
ECOMP UREG
1 + sTR
URMIN
+ + Actuator
1
VS sT1
EFDMAX
Exciter
URMIN
KA KE
VAR EFD
1 + sTA 1 + sTE
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6-28
PSSE 34 Excitation System Models
PSSE Model Library CELIN
6.12 CELIN
ELIN Excitation System
J+2 TR3
J+3
J+4
J+5 TE2
J+6 Nominal full load EFD in IEEE pu1
J+7 KE2
J+8 TR4
J+9 T1
J+10 T2
J+11 T3
J+12 T4
J+13 T5
J+14 T6
J+15 K12
J+16 K2
J+17 p_PSS
J+18 a_PSS
J+19 Psslim
J+20 K1
J+21 KIEC
J+22 KD1
J+23 TB1 (>0)
J+24 T11
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6-29
Excitation System Models PSSE 34
CELIN PSSE Model Library
J+32 T13
J+33 K4
J+34 T14
J+35 KETB
J+36 TE
J+37 Xp
STATEs # Description
K Sensed Vt
K+1 Uw
K+2 Ub
K+3 Efd
K+4 Sensed lef
K+5 PSS_first lag
K+6 PSS_second lag
K+7 PSS_first washout
K+8 PSS_second washout
K+9 PSS_third washout
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6-30
PSSE 34 Excitation System Models
PSSE Model Library CELIN
STATEs # Description
K+10 PSS_third lag
K+11 PID1_rate-lag
K+12 PID1_integrator
K+13 Spare
K+14 PID3_integrator
K+15 PID4_integrator
K+16 Converter_lag
VARs # Description
L IEF, pu
L+1 IEF_REF, pu
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6-31
Excitation System Models PSSE 34
CELIN PSSE Model Library
0 p_PSS 2
2 p_PSS 4
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6-32
PSSE 34 Excitation System Models
PSSE Model Library CELIN
THYRISTOR CONVERTER
1ef min ref Vt Up+
Up+
+
1efref + Vr 1 + Vef
KK
21
2 KETB
1 + sTE
1ef '
+
Up- XP
1ef max 1 ref Vt Up Ief
XP
+3.56KIEC
1
sT13
0
+ +3.56KIEC
+ + BRUSHLESS EXCITATION
1ef min K3 1ef min ref
1ef ' 0
EXCITER FIELD CURRENT MAXIMUM LIMITER + 1
sTE2
Efd
+0
1
sT14 SE + KE2
Ief
3.56KIEC
+ +0
1ef max 1 + +
K4 1ef max 1 ref
1ef '
3.56KIEC
Ief 1
1 + sTR4
DT02_004
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6-33
Excitation System Models PSSE 34
DC1C PSSE Model Library
6.13 DC1C
IEEE 421.5 Excitation System DC1C
STATEs # Description
K Measurement lag
K+1 Lead-lag
K+2 Regulator
K+3 Exciter
K+4 Rate feedback
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6-34
PSSE 34 Excitation System Models
PSSE Model Library DC1C
VARs # Description
L Output of HV gate
L+1 Output of LV gate
L+2 Calculated KE IF CON(J+7) is entered as zero
ICONs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
VUEL VUEL
(UEL=1) (UEL=2)
sK F
1 + sTF
s4
Notes:
3. Saturation parameters are specified using the points E1, SE(E1), and E2, SE(E2).
Either points E1, SE(E1) or E2, SE(E2) may be the higher value and the other the lower
value if the input value of VRMAX is greater than zero, else E2 must be greater than E1.
4. The IEEE standard does not specify the limits on the exciter output. To simulate the
condition where the exciter output is unlimited, set VEMAX = 999 and VEMIN = -999
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6-35
Excitation System Models PSSE 34
DC2C PSSE Model Library
6.14 DC2C
IEEE 421.5 Excitation System DC2C
STATEs # Description
K Measurement lag
K+1 Lead-lag
K+2 Regulator
K+3 Exciter
K+4 Rate feedback
VARs # Description
L Output of HV gate
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6-36
PSSE 34 Excitation System Models
PSSE Model Library DC2C
VARs # Description
L+1 Output of LV gate
L+2 Calculated KE IF COM(J+7) is entered as zero
ICONs # Description
OEL Flag
M 1: Summation point
2: LV Gate
UEL Flag
M+1 1: Summation point
2: HV Gate
VOEL VOEL
(OEL=1) (OEL=2)
VUEL VUEL
(UEL=1) (UEL=2)
sK F
1 + sTF
s4
Notes:
3. Saturation parameters are specified using the points E1, SE(E1), and E2, SE(E2).
Either points E1, SE(E1) or E2, SE(E2) may be the higher value and the other the lower
value if the input value of VRMAX is greater than zero, else E2 must be greater than E1.
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6-37
Excitation System Models PSSE 34
DC2C PSSE Model Library
4. The IEEE standard does not specify the limits on the exciter output. To simulate the
condition where the exciter output is unlimited, set VEMAX = 999 and VEMIN = -999
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6-38
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6.15 DC3A
DC3A
Excitation System Models PSSE 34
DC3A PSSE Model Library
STATEs # Description
K Sensed Ecomp
K+1 Rheostat setting
K+2 Exciter (EFD)
VARs # Description
L VERR
L+1 VR
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6-40
PSSE 34 Excitation System Models
PSSE Model Library DC3A
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6-41
Excitation System Models PSSE 34
DC4B PSSE Model Library
6.16 DC4B
IEEE 421.5 2005 DC4B Excitation System
J+15 SE(E1)
J+16 E2 (pu)
J+17 SE(E2)
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6-42
PSSE 34 Excitation System Models
PSSE Model Library DC4B
STATEs # Description
K Sensed VT
K+1 Integral channel
K+2 Derivative Channel
K+3 VR
K+4 EFD
K+5 Rate feedback
VARs # Description
L VPID
L+1 KE
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6-43
Excitation System Models PSSE 34
EMAC1T PSSE Model Library
6.17 EMAC1T
Modified IEEE Type AC1 Excitation System
(AEP Rockport Excitation Model)
J+2 T3 (sec)
J+3 KA
J+4 TA (sec)
J+5 VRMAX
J+6 VRMIN
J+7 TE > 0 (sec)
J+8 KF
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6-44
PSSE 34 Excitation System Models
PSSE Model Library EMAC1T
STATEs # Description
K Sensed ET
K+1 2nd lead lag output
K+2 3rd lead lag output
K+3 Regulator output, VR
K+4 VE
K+5 Feedback output, VF
K+6 1st lead lag output
K+7 Rate feedback output
VARs # Description
L Feedback output, VF
L+1 2nd summer output
L+2 3rd lead lag output
L+3 VFE
L+4 2nd lead lag output
L+5 1st lead lag output
L+6 Rate feedback output
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6-45
Excitation System Models PSSE 34
EMAC1T PSSE Model Library
VREF VS
VRMAX
+ +
1 1 + sT1 1 + sT3 1 + sT5 KA VE
+ +
1
EC 1 + sTA VR EFD
(pu) 1 + sTR 1 + sT2 VC 1 + sT4 1 + sT6 sTE
0 FEX
Front End Filter PI Filter VRMIN
FEX = f(IN)
sKFE
VF VFE
1 + sTFE IN
Rate Feedback
+ Loop
sKF + KCIFD
KE + SE IN =
1 + sTF VFE VE
+
KD IFD
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6-46
PSSE 34 Excitation System Models
PSSE Model Library ESAC1A
6.18 ESAC1A
IEEE Type AC1A Excitation System
VOEL
J+1 TB (sec)
J+2 TC (sec)
J+3 KA
J+4 TA (sec)
J+5 VAMAX
J+6 VAMIN
J+7 TE > 0 (sec)
J+8 KF
J+9 TF > 0 (sec)
J+10 KC
J+11 KD
J+12 KE
J+13 E1
J+14 SE(E1)
J+15 E2
J+16 SE(E2)
J+17 VRMAX
J+18 VRMIN
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6-47
Excitation System Models PSSE 34
ESAC1A PSSE Model Library
STATEs # Description
K Sensed ET
K+1 Lead lag
K+2 Regulator output
K+3 VE
K+4 Feedback output
VOTHSG
VAMAX
VUEL
+ VRMAX
EC 1 1 + sTC KA + VE EFD
1 + sTR HV
Gate
LV
Gate 1
(pu) 1 + sTB 1 + sTA VR sTE
+ VRMIN FEX
VAMIN 0
VREF VOEL
FEX = f(IN)
VX = VE SE (VE)
VX
VF + IN
+
KE KCIFD
IN =
+ VE
sKF
1 + sTF
VFE
+
KD IFD
If I 0 F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
If 0.433 < I < 0.75 F = 0.75 I 2
IN N EX N FEX
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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6-48
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6.19 ESAC2A
J+1
J+2 TC (sec)
J+3 KA
J+4 TA (sec)
J+5 VAMAX
J+6 VAMIN
ESAC2A
J+11 VFEMAX
J+12 KH
Excitation System Models PSSE 34
ESAC2A PSSE Model Library
J+17 KE
J+18 E1
J+19 SE(E1)
J+20 E2
J+21 SE(E2)
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6-50
PSSE 34 Excitation System Models
PSSE Model Library ESAC2A
STATEs # Description
K Sensed ET
K+1 Lead lag
K+2 Regulator output
K+3 VE
K+4 Feedback output
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6-51
Excitation System Models PSSE 34
ESAC2A PSSE Model Library
VFEMAX KDIFD
VOTHSG VUEL KE + SE(VE)
VAMAX
+ VRMAX
1 + sTC KA + + VE
1 HV LV 1
1 + sTB 1 + sTA V KB Gate Gate EFD
) 1 + sTR A VR sTE
+ VRMIN FEX
VREF VAMIN VOEL 0
FEX = f(IN)
VX = VE SE (VE)
VX
+ IN
VF VH
+ KE KCIFD
IN =
+ VE
KH
sKF VFE +
KD IFD
1 + sTF
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6-52
PSSE 34 Excitation System Models
PSSE Model Library ESAC3A
6.20 ESAC3A
IEEE Type AC3A Excitation System
J+4 TA (sec)
J+5 VAMAX
J+6 VAMIN
J+7 TE > 0 (sec)
J+8 VEMIN
J+9 KR (>0)
J+10 KF
J+11 TF > 0 (sec)
J+12 KN
J+13 EFDN
J+14 KC
J+15 KD
J+16 KE
J+17 VFEMAX
J+18 E1
J+19 SE(E1)
J+20 E2
J+21 SE(E2)
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6-53
Excitation System Models PSSE 34
ESAC3A PSSE Model Library
STATEs # Description
K Sensed ET
K+1 Lead lag
K+2 Regulator output
K+3 VE
K+4 Feedback output
KR
VFEMAX - KD IFD
VS VUEL VAMAX KE + S E (VE)
+
1 + sTC + KA VE
EC 1 HV + 1
(pu) 1 + sTR VC
1 + sTB Gate 1 + sTA V
sTE
EFD
A VR
+ FEX
VAMIN VEMIN
VREF
VFE FEX = f(IN)
VX = VE SE (VE)
VX
+ IN
VF + +
KE KCIFD
IN =
+ VE
KD IFD
VN
s KN
VS = VOTHSG + VOEL 1 + sTF VN KF
EFD
EFDN
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
If 0.433 < I < 0.75 F = 0.75 I 2
IN N EX N FEX
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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6-54
PSSE 34 Excitation System Models
PSSE Model Library ESAC4A
6.21 ESAC4A
IEEE Type AC4A Excitation System
J+4 TB (sec)
J+5 KA
J+6 TA
J+7 VRMAX
J+8 VRMIN
J+9 KC
STATEs # Description
K Vmeasured
K+1 Lead lag
K+2 VR
VS = VOTHSG + VOEL
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6-55
Excitation System Models PSSE 34
ESAC5A PSSE Model Library
6.22 ESAC5A
IEEE Type AC5A Excitation System
J+2 TA (sec)
J+3 VRMAX or zero
J+4 VRMIN
J+5 KE or zero
STATEs # Description
K Sensed VT
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6-56
PSSE 34 Excitation System Models
PSSE Model Library ESAC5A
VAR # Description
L KE
VS
VRMAX
+
1 KA + 1
EC EFD
(pu) 1 + sTR 1 + sTA sTE
+
VREF VRMIN 0
+ KE
sKF (1 + sTF3)
(1 + sTF1)(1 + sTF2)
VX +
If TF2 = 0, then sTF3 = 0 VX = EFD*SE (EFD)
VS = VOTHSG + VUEL + VOEL
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6-57
Excitation System Models PSSE 34
ESAC6A PSSE Model Library
6.23 ESAC6A
IEEE Type AC6A Excitation System
J+5 TC (sec)
J+6 VAMAX
J+7 VAMIN
J+8 VRMAX
J+9 VRMIN
J+10 TE (>0) (sec)
J+11 VFELIM
J+12 KH
J+13 VHMAX
J+14 TH (sec)
J+15 TJ (sec)
J+16 KC
J+17 KD
J+18 KE
J+19 E1
J+20 SE(E1)
J+21 E2
J+22 SE(E2)
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6-58
PSSE 34 Excitation System Models
PSSE Model Library ESAC6A
STATEs # Description
K Sensed ET
K+1 First block
K+2 Lead lag
K+3 VE
K+4 Feedback
VS V
UEL VAMAX
+ VT VRMAX
+ 1 + sTC +
1 KA(1 + sTK) + 1 VE
EC EFD
1 + sTR VC (1 + sTA) 1 + sTB VA VR sTE
+
VT VRMIN
VAMIN 0
VREF
FEX = f(IN)
VX = VE SE (VE)
VX
+
+ KE
VHMAX KCIFD
+ IN =
(1 + sTJ) + VE
KH
(1 + sTH) VH VFE
+ KD
0 IFD
VS = VOTHSG + VOEL VFELIM
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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Excitation System Models PSSE 34
ESAC8B PSSE Model Library
6.24 ESAC8B
Basler DECS
J+5 KA
J+6 TA
J+7 VRMAX or zero
J+8 VRMIN
J+9 TE > 0 (sec)
J+10 KE or zero
J+11 E1
J+12 SE(E1)
J+13 E2
J+14 SE(E2)
STATEs # Description
K Sensed VT
K+1 Integral controller
K+2 Derivative controller
K+3 Voltage regulator
K+4 Exciter output, EFD
VAR # Description
L KE
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PSSE 34 Excitation System Models
PSSE Model Library ESAC8B
VREF KP
VRMAX
+ +
1 KI + KA + 1
EFD
VC 1 + sTR s 1 +sTA VR sTE
+ +
sKD VRMIN 0
VS 1 + sTD +
KE
VX +
VS = VOTHSG + VUEL + VOEL VX = EFD SE (EFD)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6-61
Excitation System Models PSSE 34
ESDC1A PSSE Model Library
6.25 ESDC1A
IEEE Type DC1A Excitation System
J+2 TA (sec)
J+3 TB (sec)
J+4 TC (sec)
J+5 VRMAX or zero
J+6 VRMIN
J+7 KE or zero
J+8 TE (>0) (sec)
J+9 KF
J+10 TF1 (>0) (sec)
J+11 0.0 Switch
J+12 E1
J+13 SE(E1)
J+14 E2
J+15 SE(E2)
STATEs # Description
K Sensed VT
K+1 Lead lag
K+2 Regulator output, VR
K+3 Exciter output, EFD
K+4 Rate feedback integrator
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6-62
PSSE 34 Excitation System Models
PSSE Model Library ESDC1A
VAR # Description
L KE
VS VUEL VRMAX
+
1 1 + sTC HV KA
EC + 1
1 + sTR VC Gate 1 + sTA EFD
(pu) 1 + sTB VR sTE
+
VREF VRMIN VFE 0
+ KE
VF
+
VX = EFD SE (EFD)
sKF
1 + sTF1
VS = VOTHSG + VOEL
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6-63
Excitation System Models PSSE 34
ESDC2A PSSE Model Library
6.26 ESDC2A
IEEE Type DC2A Excitation System
J+2 TA (sec)
J+3 TB (sec)
J+4 TC (sec)
J+5 VRMAX or zero
J+6 VRMIN
J+7 KE or zero
J+8 TE (>0) (sec)
J+9 KF
J+10 TF1 (>0) (sec)
J+11 Switch
J+12 E1
J+13 SE(E1)
J+14 E2
J+15 SE(E2)
STATEs # Description
K Sensed VT
K+1 Lead lag output
K+2 Regulator output, VR
K+3 Exciter output, EFD
K+4 Rate feedback integrator
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PSSE 34 Excitation System Models
PSSE Model Library ESDC2A
VAR # Description
L KE
VS VUEL VTVRMAX
+
1 1 + sTC HV KA + 1
EC EFD
(pu) 1 + sTR VC Gate
1 + sTB 1 + sTA VR sTE
+
VREF VTVRMIN VFE
VF + KE
+
VX
VX = EFD SE (EFD)
sKF
1 + sTF
VS = VOTHSG + VOEL
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6-65
Excitation System Models PSSE 34
ESST1A PSSE Model Library
6.27 ESST1A
IEEE Type ST1A Excitation System
J+3 TC (sec)
J+4 TB (sec)
J+5 TC1 (sec)
J+13 KC
J+14 KF
J+15 TF > 0 (sec)
J+16 KLR
J+17 ILR
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PSSE 34 Excitation System Models
PSSE Model Library ESST1A
STATEs # Description
K Vmeasured
K+1 First lead lag
K+2 Second lead lag
K+3 VA
K+4 Feedback
VUEL VUEL
UEL=1 Alternate UEL=3
UEL Inputs
VOTHSG UEL = 2 VOTHSG
VOS=1 Alternate VOS=2
Stabilizer
Inputs
VAMAX
VUEL
+ + VTVRMAX KCIFD
1 + VIMAX KA
EC HV 1 + sTC 1 + sTC1 + HV LV
(pu) 1 + sTR Gate 1 + sTB 1 + sTB1 Gate Gate EFD
VI 1 + sTA VA
+ VIMIN VTVRMIN
VREF VAMIN VOEL
VF
sKF
1 + sTF
+
KLR IFD
0
ILR
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6-67
Excitation System Models PSSE 34
ESST2A PSSE Model Library
6.28 ESST2A
Modified IEEE Type ST2A Excitation System
STATEs # Description
K Sensed VT
K+1 Regulator output, VR
K+2 Exciter output, EFD
K+3 Rate feedback integral
VAR # Description
L KI
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PSSE 34 Excitation System Models
PSSE Model Library ESST2A
VT VE
VE = |KP VT+ jKIIT|
IT
KC IFD
IN = FEX = f(IN)
IFD VE IN FEX
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
VS = VOTHSG + VOEL
If KP = 0 and KI = 0, VB = 1
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6-69
Excitation System Models PSSE 34
ESST3A PSSE Model Library
6.29 ESST3A
IEEE Type ST3A Excitation System
J+5 TB (sec)
J+6 KA
J+7 TA (sec)
J+8 VRMAX
J+9 VRMIN
J+10 KG
J+11 KP
J+12 KI
J+13 VBMAX
J+14 KC
J+15 XL
J+16 VGMAX
J+17 P (degrees)
J+18 TM (sec)
J+19 VMMAX
J+20 VMMIN
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6-70
PSSE 34 Excitation System Models
PSSE Model Library ESST3A
STATEs # Description
K Sensed VT
K+1 VA
K+2 VR
K+3 VM
VGMAX
KG
VS
VUEL VRMAX VG VMMAX
+ VIMAX
1 HV 1 + sTC KA
+ KM
EC
VI Gate
EFD
(pu) 1 + sTR 1 + sTB VA 1 + sTA VR 1 + sTM VM
+ VIMIN
VRMIN VMMIN
VB
VREF VBMAX
VT VE
V = K P V T + j ( K + K P X )I T
IT E I L
VS = VOTHSG + VOEL
j KC IFD
KP = K P IFD
IN =
VE IN
FEX = f(IN)
FEX
P
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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Excitation System Models PSSE 34
ESST4B PSSE Model Library
6.30 ESST4B
IEEE Type ST4B Potential or Compounded Source-Controlled Rectifier Exciter
J+3 VRMAX
J+4 VRMIN
J+5 TA (sec)
J+6 KPM
J+7 KIM
J+8 VMMAX
J+9 VMMIN
J+10 KG
J+11 KP
J+12 KI
J+13 VBMAX
J+14 KC
J+15 XL
J+16 THETAP in degrees
STATEs # Description
K Sensed VT
K+1 Regulator integrator
K+2 Regulator output, VR
K+3 VM
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PSSE 34 Excitation System Models
PSSE Model Library ESST4B
KG
VS
VUEL VRMAX VMMAX VOEL
+ +
K 1 K
EC 1
IR VR +
K
IM
+ ------------
LV EFD
K + ----------- PM S Gate
1 + sTR PR S 1 + sTA
+
VRMIN VMMIN
VB
VREF VBMAX
VT VE
V = K P V T + j ( K + K P X )I T
IT E I L
VS = VOTHSG
I
FD
I = K ---------- FEX = f(IN)
K P = K THETAP IFD N CV FEX
P E
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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6-73
Excitation System Models PSSE 34
ESURRY PSSE Model Library
6.31 ESURRY
Modified IEEE Type AC1A Excitation System
J+2 TB (sec)
J+3 TC (sec)
J+4 TD (sec)
J+5 K10
J+6 T1 (sec)
J+7 K16
J+8 KF
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PSSE 34 Excitation System Models
PSSE Model Library ESURRY
STATEs # Description
K Sensor
K+1 1st lead lag
K+2 2nd lead lag
K+3 Exciter field current sensor
K+4 Feed forward output
K+5 Exciter
VAR # Description
L Exciter field current reference
Vref (pu)
+
1 1 + sTA 1 + sTC
ECOMP
1 + sTR
1 + sTB 1 + sTD
K10
+
VRMAX
Vs (pu) + VR VE
1 EFD (pu)
(PSS input)
+
Iref + sTE
VRMIN
+ 0.
1
1 + sT1
K16
VX = VE SE (VE) FEX = f(IN)
+
VUEL
(Underexcition +
Limiter Signal) KCIFD
KE IN =
+ VE
KFs
1 + TF s
+
IFD (pu)
KD
+
VFE
DT02_002
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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6-75
Excitation System Models PSSE 34
EX2000 PSSE Model Library
6.32 EX2000
EX2000 Excitation System
also represents
IEEE Type AC7B Alternator-Rectifier Excitation System
(Under Excitation Limiter is not included)
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6-76
PSSE 34 Excitation System Models
PSSE Model Library EX2000
The values are given in per unit unless the unit is shown. For field current references and inverse
timing constants the value of the current is in per unit of the generator Air Gap Line base.
STATEs # Description
K Voltage Transducer
K+1 1st PI controller
K+2 2nd PI controller
K+3 Exciter field voltage
K+4 3rd PI controller (Field Current Limiter)
K+5 Lead-lag element (Field Voltage Limiter)
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6-77
Excitation System Models PSSE 34
EX2000 PSSE Model Library
VARs # Description
Inverse Timing Function Memory
L <1: Latch Gate 2 signal is 0
1: Latch Gate 2 signal is 1
ICONs # Description
0: Field Current Limiter is excluded
(and upper limit VEMAX is on)
M
1: Field Current Limiter is included
(and upper limit VEMAX is off)
0: Minimum Gate 2 is excluded.
M+1
1: Minimum Gate 2 is included.
Memory. Set to 0.
M+2 0: Latch Gate 1 signal is 0
1: Latch Gate 1 signal is 1
Memory. Set to 0.
M+3 0: Field Current Limiter Timer is not active
1: Field Current Limiter Timer is active
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PSSE 34 Excitation System Models
PSSE Model Library EX2000
VE
1
K
KPR + IR
+
K
KPA + IA
Minimum
Gate 1
+
sTE
s s
VA
VR VF VFE
VRMIN VAMIN -KLVFE VEMIN
1st PI Controller 2nd PI Controller
VX
VX = VE SE [VE]
+
KF2
nce
+ +
l
+ +
KE
KD
KF1
p is assumed equal to 1.
Frequency KVHZ
Reactive
SBASE 1 Current
QELEC KRCC
MBASE ETERM
VREF REFLIMP
+
Minimum VR
+ Gate 2
VUEL
+
VOTHSG DT01_003
Reference Signal
To represent IEEE Type AC7B System you need to set KVHZ = 0 and KRCC = 0, to set ICON(M+1)
= 0 (to exclude Minimum Gate 2) and to set TR = 0 (to exclude the Voltage Transducer).
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6-79
Excitation System Models PSSE 34
EX2000 PSSE Model Library
Inverse Timing
IFDREF2 Output = 1 if
(I1, T1) timing expired Latch OR
(I2, T2) Gate 2
(I3, T3)
(I4, T4)
IFD
IFDLIMP
A C A C
IFDREF3 To
+ KIIFD
D KPIFD + D Minimum
s
IFDREF4 Gate 1
B B
IFDLIMN
3rd PI Controller
1 + s TLEAD Switch Operation:
Output D = B if C = 0
1 + s TLAG Output D = A if C = 1
IFDADVLIM
To represent IEEE Type AC7B System you need to set ICON(M) = 0 (to exclude this limiter).
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6-80
PSSE 34 Excitation System Models
PSSE Model Library EXAC1
6.33 EXAC1
IEEE Type AC1 Excitation System
VOEL
J+1 TB (sec)
J+2 TC (sec)
J+3 KA
J+4 TA (sec)
J+5 VRMAX
J+6 VRMIN
J+7 TE > 0 (sec)
J+8 KF
J+9 TF > 0 (sec)
J+10 KC
J+11 KD
J+12 KE
J+13 E1
J+14 SE(E1)
J+15 E2
J+16 SE(E2)
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6-81
Excitation System Models PSSE 34
EXAC1 PSSE Model Library
STATEs # Description
K Sensed ET
K+1 Lead lag
K+2 Regulator output
K+3 VE
K+4 Feedback output
VREF VS
VRMAX
+ +
1 + 1 + sTC KA + 1 VE
EC EFD
(pu) 1 + sTR VC 1 + sTB 1 + sTA VR sTE
FEX
VRMIN 0
FEX = f(IN)
VF
IN
KCIFD
KE + SE IN =
+ VE
sKF
1 + sTF VFE
+
KD IFD
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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PSSE 34 Excitation System Models
PSSE Model Library EXAC1A
6.34 EXAC1A
IEEE Modified Type AC1 Excitation System
VOEL
J+1 TB (sec)
J+2 TC (sec)
J+3 KA
J+4 TA (sec)
J+5 VRMAX
J+6 VRMIN
J+7 TE > 0 (sec)
J+8 KF
J+9 TF > 0 (sec)
J+10 KC
J+11 KD
J+12 KE
J+13 E1
J+14 SE(E1)
J+15 E2
J+16 SE(E2)
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6-83
Excitation System Models PSSE 34
EXAC1A PSSE Model Library
STATEs # Description
K Sensed ET
K+1 Lead lag
K+2 Regulator output
K+3 VE
K+4 Feedback output
VREF VS
VRMAX
+ +
1 + 1 + sTC KA + 1 VE
EC EFD
(pu) 1 + sTR VC 1 + sTB 1 + sTA VR sTE
FEX
VRMIN 0
FEX = f(IN)
VF VFE
IN
KCIFD
KE + SE IN = V
+ E
sKF
1 + sTF
+
KD IFD
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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PSSE 34 Excitation System Models
PSSE Model Library EXAC2
6.35 EXAC2
IEEE Type AC2 Excitation System
VOEL
J+1 TB (sec)
J+2 TC (sec)
J+3 KA
J+4 TA (sec)
J+5 VAMAX
J+6 VAMIN
J+7 KB
J+8 VRMAX
J+9 VRMIN
J+10 TE > 0 (sec)
J+11 KL
J+12 KH
J+13 KF
J+14 TF > 0 (sec)
J+15 KC
J+16 KD
J+17 KE
J+18 VLR
J+19 E1
J+20 SE(E1)
J+21 E2
J+22 SE(E2)
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6-85
Excitation System Models PSSE 34
EXAC2 PSSE Model Library
STATEs # Description
K Sensed ET
K+1 Lead lag
K+2 Regulator output
K+3 VE
K+4 Feedback output
VREF VS
VAMAX
+ + VRMAX
1 + 1 + sTC KA + VE
EC + LV 1
(pu) 1 + sTR V 1 + sTB 1 + sTA V Gate KB EFD
C A VR sTE
VRMIN
VL FEX
VAMIN 0
KL FEX = f(IN)
VF VH
+
VLR IN
KH
K I
KE + SE IN = C FD
+ VE
sKF
1 + sTF VFE
+
KD IFD
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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6-86
PSSE 34 Excitation System Models
PSSE Model Library EXAC3
6.36 EXAC3
IEEE Type AC3 Excitation System
VOEL
J+1 TB (sec)
J+2 TC (sec)
J+3 KA
J+4 TA (sec)
J+5 VAMAX
J+6 VAMIN
J+7 TE > 0 (sec)
J+8 KLV
J+9 KR (>0)
J+10 KF
J+11 TF > 0 (sec)
J+12 KN
J+13 EFDN
J+14 KC
J+15 KD
J+16 KE
J+17 VLV
J+18 E1
J+19 SE(E1)
J+20 E2
J+21 SE(E2)
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6-87
Excitation System Models PSSE 34
EXAC3 PSSE Model Library
STATEs # Description
K Sensed ET
K+1 Lead lag
K+2 Regulator output
K+3 VE
K+4 Feedback output
KLV
HV +
Gate
VLV
VREF VS VAMAX
+ +
1 1 + sTC KA + 1 VE
EC + EFD
(pu) 1 + sTR VC VERR 1 + sTB 1 + sTA VA VR sTE
FEX
VAMIN 0
KR VFE FEX = f(IN)
+
KE + SE
VF IN
+ KCIFD
IN =
VE
KD IFD
VN
KN
s
1 + sTF VN KF
EFD
EFDN
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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PSSE 34 Excitation System Models
PSSE Model Library EXAC4
6.37 EXAC4
IEEE Type AC4 Excitation System
VOEL
J+1 VIMAX
J+2 VIMIN
J+3 TC
J+4 TB (sec)
J+5 KA
J+6 TA
J+7 VRMAX
J+8 VRMIN
J+9 KC
STATEs # Description
K Vmeasured
K+1 Lead lag
K+2 VR
VREF VS
VIMAX VRMAX KC IIFD
+ +
1 + S 1 + sTC KA
EC S EFD
1 + sTR VERR 1 + sTB 1 + sTA
VIMIN VRMIN KC IIFD
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6-89
Excitation System Models PSSE 34
EXBAS PSSE Model Library
6.38 EXBAS
Basler Static Voltage Regulator Feeding dc or ac Rotating Exciter
VOEL
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PSSE 34 Excitation System Models
PSSE Model Library EXBAS
STATEs # Description
K Sensed ET
K+1 Integral gain
K+2 Lead lag
K+3 Regulator output
K+4 VE
K+5 Feedback washout
K+6 Feedback lead lag
VREF VOTHSG
VRMAX
+ +
1 K1 1 + sTC KA + 1 VE
EC KP + EFD
(pu) 1 + sTR s 1 + sTB 1 + sTA sTE
+ +
FEX
VUEL VOEL VRMIN
FEX = f(IN)
IN
KCIFD
K E + SE
+ VE
sKF 1 + sTF1
1 + sTF 1 + sTF2
+
KD IFD
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6-91
Excitation System Models PSSE 34
EXDC2 PSSE Model Library
6.39 EXDC2
IEEE Type DC2 Excitation System
J+2 TA (sec)
J+3 TB (sec)
J+4 TC (sec)
J+5 VRMAX or zero
J+6 VRMIN
J+7 KE or zero
J+8 TE (>0) (sec)
J+9 KF
J+10 TF1 (>0) (sec)
J+11 0 Switch
J+12 E1
J+13 SE(E1)
J+14 E2
J+15 SE(E2)
STATEs # Description
K Sensed VT
K+1 Lead lag output
K+2 Regulator output, VR
K+3 Exciter output, EFD
K+4 Rate feedback integrator
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PSSE 34 Excitation System Models
PSSE Model Library EXDC2
VAR # Description
L KE
VREF VS VRMAX*VT
Regulator
+ +
1 + 1 + sTC KA + 1 EFD
EC
(pu) 1 + sTR VERR 1 + sTB 1 + sTA VR sTE (pu)
VFB VRMIN*VT SE + KE
sKF
1 + sTF1
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6-93
Excitation System Models PSSE 34
EXELI PSSE Model Library
6.40 EXELI
Static PI Transformer Fed Excitation System
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
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PSSE 34 Excitation System Models
PSSE Model Library EXELI
STATEs # Description
K First washout stabilizer state
K+1 Lag stabilizer state
K+2 Negative washout stabilizer state
K+3 Sensed voltage state
K+4 Sensed field current state
K+5 Controlled voltage state
K+6 Second washout stabilizer state
K+7 Third washout stabilizer state
VAR # Description
L Stabilizer signal
Ks1
+ SMAX
sT W 3 sTs2
PGEN ---------------------
1 + sT W 1 + sTs2
+ SMAX
Ks2
1 + sTs1
+ EFDMAX
1 + 1 + +
VCOMP VPU VPI EFD
1 + sTFV sTNU
+ + EFDMIN
VREF
XE
VPNF
+ 1
LADIFD
1 + sTFI
DPNF
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6-95
Excitation System Models PSSE 34
EXNEBB PSSE Model Library
6.41 EXNEBB
Bus or Solid Fed SCR Bridge Excitation System Model Type NEBB (NVE)
J+9 VRMAX pu
J+10 VRMIN pu
IFMAX (maximum field current)
J+11
pu1
J+12 IFMIN (minimum field current) pu
FLAG:
J+13 0 bus fed
1 solid fed
1 If I
FMAX IFMIN, only current regulation (IREF = VREF(I))
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PSSE 34 Excitation System Models
PSSE Model Library EXNEBB
STATEs # Description
K Measuring circuit
K+1 1st amplifier
K+2 1st amplifier output
K+3 2nd amplifier
K+4 2nd amplifier output
VARs # Description
L For tests
L+1 Field current limiter
IFMAX or
I or
VREF(I) IREF = FMIN
{ VREF(I) or
0
+ + VRMAX
1 K1(1 + T11s) K2(1 + T21s)
VT Efd
1 + TRs (1 + T12s)(1 + T13s) + (1 + T22s)(1 + T23s)
+ + VRMIN
VAR(L) IFMAX
IFMIN
VS
XADIFD(I)
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Excitation System Models PSSE 34
EXNI PSSE Model Library
6.42 EXNI
Bus or Solid Fed SCR Bridge Excitation System Model Type NI (NVE)
J+8 SWITCH1
J+9 R = rc / rfd2
1 SWITCH = 0 for bus fed, 1 for solid fed
2 r /
c rfd = 0 for exciter with negative current capability
> 0 without (typical = 10)
STATEs # Description
K Measuring circuit
K+1 Amplifier
K+2 Feedback
K+3 Feedback output
VAR # Description
L For tests
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PSSE 34 Excitation System Models
PSSE Model Library EXNI
VREF(I)
+ VRMAX
VT 1 KA
1 + TRs 1 + TAs
Neg.
+ + VRMIN Current Efd
Logic
VS sKF
(1 + TF2s)(1 + TF1s) XADIFD(I)
VAR(L)
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Excitation System Models PSSE 34
EXPIC1 PSSE Model Library
6.43 EXPIC1
Proportional/Integral Excitation System
J+3 VR1
J+4 VR2
J+5 TA2 (sec)
J+13 EFDMAX
J+14 EFDMIN
J+15 KE
J+16 TE (sec)
J+17 E1
J+18 SE1
J+19 E2
J+20 SE2
J+21 KP
J+22 KI
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PSSE 34 Excitation System Models
PSSE Model Library EXPIC1
STATEs # Description
K Sensed ET
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Excitation System Models PSSE 34
EXPIC1 PSSE Model Library
KE + SE
VREF
VR1
+ VRMAX EFDMAX
EC 1 + KA(1 + sTA1) 1 + sTA3 + 1
(pu) EFD
1 + sTR ET S VA (1 + sTA2)(1 + sTA4) VR E0 sTE
+ VRMIN EFDMIN
VR2
VS
sKF
(1 + sTF1)(1 + sTF2) VB
VT
V = K V T + jK I
I E P I T
T
FEX
IFD
IN = KC FEX = f(IN)
IFD VE
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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PSSE 34 Excitation System Models
PSSE Model Library EXST1
6.44 EXST1
IEEE Type ST1 Excitation System
J+2 VIMIN
J+3 TC
J+4 TB (sec)
J+5 KA
J+6 TA (sec)
J+7 VRMAX
J+8 VRMIN
J+9 KC
J+10 KF
J+11 TF (> 0) (sec)
STATEs # Description
K Vmeasured
K+1 Lead lag
K+2 VR
K+3 Feedback
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Excitation System Models PSSE 34
EXST1 PSSE Model Library
VREF VS
+ + VIMAX VT VRMAX KC IIFD
1 + 1 + sTC KA
EC EFD
1 + sTR VERR 1 + sTB 1 + sTA
VIMIN VT VRMIN KC IIFD
sKF
1 + sTF
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PSSE 34 Excitation System Models
PSSE Model Library EXST2
6.45 EXST2
IEEE Type ST2 Excitation System
J+1 KA
J+2 TA (sec)
J+3 VRMAX
J+4 VRMIN
J+5 KE
J+6 TE (>0) (sec)
J+7 KF
J+8 TF (>0) (sec)
J+9 KP
J+10 KI or zero
J+11 KC
J+12 EFDMAX
STATEs # Description
K Sensed VT
K+1 Regulator output, VR
K+2 Exciter output, EFD
K+3 Rate feedback integral
VAR # Description
L KI
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Excitation System Models PSSE 34
EXST2 PSSE Model Library
VREF VS
VRMAX EFDMAX
+ +
KA
1 + + + 1
EC EFD
1 + sTR VERR 1 + sTA VR sTE
+
VRMIN 0
VF VB
KE
sKF
1 + sTF
V VE
T V = K V T + jK I
E P I T
I
T
IFD
IN = KC FEX = f(IN)
IFD VE IN FEX
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
If KP = 0 and KI = 0, VB = 1
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PSSE 34 Excitation System Models
PSSE Model Library EXST2A
6.46 EXST2A
Modified IEEE Type ST2 Excitation System
J+1 KA
J+2 TA (sec)
J+3 VRMAX
J+4 VRMIN
J+5 KE
J+6 TE (>0) (sec)
J+7 KF
J+8 TF (>0) (sec)
J+9 KP
J+10 KI
J+11 KC
J+12 EFDMAX
STATEs # Description
K Sensed VT
K+1 Regulator output, VR
K+2 Exciter output, EFD
K+3 Rate feedback integral
VAR # Description
L KI
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Excitation System Models PSSE 34
EXST2A PSSE Model Library
VREF VS
VRMAX EFDMAX
+ +
KA
1 + + 1
EC EFD
1 + sTR VERR 1 + sTA VR sTE
VRMIN 0
VF VB
KE
sKF
1 + sTF
V V = K V T + jK I VE
T
I
E P I T
T
IFD
IN = KC FEX = f(IN)
IFD VE IN FEX
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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PSSE 34 Excitation System Models
PSSE Model Library EXST3
6.47 EXST3
IEEE Type ST3 Excitation System
J+3 KJ
J+4 TC (sec)
J+5 TB (sec)
J+6 KA
J+7 TA (sec)
J+8 VRMAX
J+9 VRMIN
J+10 KG
J+11 KP
J+12 KI
J+13 EFDMAX
J+14 KC
J+15 XL
J+16 VGMAX
J+17 P (degrees)
STATEs # Description
K Sensed VT
K+1 VA
K+2 VR
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Excitation System Models PSSE 34
EXST3 PSSE Model Library
VGMAX
KG
VREF VS VG
VRMAX
+ + VIMAX EFDMAX
1 + sTC KA
1 + +
EC V KJ EFD
1 + sTR ERR 1 + sTB VA 1 + sTA VR
VIMIN
VRMIN VB
V VE
T V = K P V T + j ( K + K p X )I
I E I L T
T
IFD
I N = KC FEX = f(IN)
IFD VE IN FEX
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
j
KP = K P
P
VS = VOTHSG + VUEL + VOEL
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PSSE 34 Excitation System Models
PSSE Model Library IEEET1
6.48 IEEET1
IEEE Type 1 Excitation System
J+1 KA
J+2 TA (sec)
J+3 VRMAX or zero
J+4 VRMIN
J+5 KE or zero
J+6 TE (>0) (sec)
J+7 KF
J+8 TF (>0) (sec)
J+9 0 Switch
J+10 E1
J+11 SE(E1)
J+12 E2
J+13 SE(E2)
STATEs # Description
K Sensed VT
K+1 Regulator output, VR
K+2 Exciter output, EFD
K+3 Rate feedback integrator
VAR # Description
L KE
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Excitation System Models PSSE 34
IEEET1 PSSE Model Library
VE = SE EFD
VE
+
+
KE
VREF VRMAX
+
EC 1 KA VR 1
+ EFD
1 + sTA (pu)
(pu) 1 + sTR + sTE
+
VRMIN
VS
sKF
1 + sTF
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PSSE 34 Excitation System Models
PSSE Model Library IEEET2
6.49 IEEET2
IEEE Type 2 Excitation System
J+1 KA
J+2 TA (sec)
J+3 VRMAX or zero
J+4 VRMIN
J+5 KE
J+6 TE (>0) (sec)
J+7 KF
J+8 TF1 (>0) (sec)
J+9 TF2 (>0) (sec)
J+10 E1
J+11 SE(E1)
J+12 E2
J+13 SE(E2)
STATEs # Description
K Sensed VT
K+1 Regulator output, VR
K+2 Exciter output, EFD
K+3 First feedback integrator
K+4 Second feedback integrator
VAR # Description
L KE
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Excitation System Models PSSE 34
IEEET2 PSSE Model Library
VE = SE EFD
VE
+
+
KE
VREF VRMAX
+
EC 1 + KA VR 1
EFD
1 + sTR 1 + sTA (pu)
(pu) + sTE
+
VS VRMIN
1 sKF
1 + sTF2 (1 + sTF1)
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PSSE 34 Excitation System Models
PSSE Model Library IEEET3
6.50 IEEET3
IEEE Type 3 Excitation System
J+3 VRMAX
J+4 VRMIN
J+5 TE (>0) (sec)
J+6 KF
J+7 TF (>0) (sec)
J+8 KP (>0)
J+9 KI or zero
J+10 VBMAX (pu voltage base)
J+11 KE
STATEs # Description
K Sensed VT
VAR # Description
L KI
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Excitation System Models PSSE 34
IEEET3 PSSE Model Library
VREF VRMAX
VBMAX
+
EC 1 + KA + 1 EFD
1 + sTR 1 + sTA VR
KE + sTE (pu)
(pu) VB
o
+ +
VRMIN
VS sKF
1 + sTF
VT
I V THEV = K P V T + jK I I T MULT
T
LadIfd 1A
2
0.78 Lad Ifd
A = -----------------------------------
-
VTHEV
If A > 1, VB = 0
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PSSE 34 Excitation System Models
PSSE Model Library IEEET4
6.51 IEEET4
IEEE Type 4 Excitation System
J+3 VRMAX
J+4 VRMIN
J+5 TE (>0) (sec)
J+6 KE
J+7 E1
J+8 SE(E1)
J+9 E2
J+10 SE(E2)
STATEs # Description
K VRH
K+1 EFD
VAR # Description
L KE
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Excitation System Models PSSE 34
IEEET4 PSSE Model Library
SE
X
VREF VRMAX
+
1 |V|<KV
V -KR 1 + 1 EFD
EC
(pu) KR sTRH VRH VR KE + sTE (pu)
-1
VRMIN
|V|>KV
VRMAX
KV
KV
VRMIN
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PSSE 34 Excitation System Models
PSSE Model Library IEEET5
6.52 IEEET5
Modified IEEE Type 4 Excitation System
J+3 VRMIN
J+4 TE (>0) (sec)
J+5 KE
J+6 E1
J+7 SE(E1)
J+8 E2
J+9 SE(E2)
STATEs # Description
K VRH
K+1 EFD
VAR # Description
L KE
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Excitation System Models PSSE 34
IEEET5 PSSE Model Library
SE
X
VREF
VRMAX
+
V 1 |V|<KV 1 EFD
EC +
(pu)
sTRH
KE + sTE (pu)
VRH VR
VRMIN
|V|>KV
VRMAX
KV
KV
VRMIN
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PSSE 34 Excitation System Models
PSSE Model Library IEEEX1
6.53 IEEEX1
IEEE Type 1 Excitation System
J+1 KA
J+2 TA (sec)
J+3 TB (sec)
J+4 TC (sec)
J+5 VRMAX or zero
J+6 VRMIN
J+7 KE or zero
J+8 TE (>0) (sec)
J+9 KF
J+10 TF1 (>0) (sec)
J+11 0.0 Switch
J+12 E1
J+13 SE(E1)
J+14 E2
J+15 SE(E2)
STATEs # Description
K Sensed VT
K+1 Lead lag
K+2 Regulator output, VR
K+3 Exciter output, EFD
K+4 Rate feedback integrator
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Excitation System Models PSSE 34
IEEEX1 PSSE Model Library
VAR # Description
L KE
VREF VS
VRMAX
Regulator
+ +
1 + sTC KA 1
1 + + EFD
EC (pu)
(pu) 1 + sTR VERR 1 + sTB 1 + sTA VR sTE
VFB VRMIN
S E + KE
sKF
1 + sTF1
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PSSE 34 Excitation System Models
PSSE Model Library IEEEX2
6.54 IEEEX2
IEEE Type 2 Excitation System
J+3 TB (sec)
J+4 TC (sec)
J+5 VRMAX or zero
J+6 VRMIN
J+7 KE or zero
J+8 TE (>0) (sec)
J+9 KF
STATEs # Description
K Sensed VT
K+1 Lead lag
K+2 Regulator output, VR
K+3 Exciter output, EFD
K+4 First feedback integrator
K+5 Second feedback integrator
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Excitation System Models PSSE 34
IEEEX2 PSSE Model Library
VAR # Description
L KE
VREF VS
VRMAX
Regulator Exciter
+ +
1 + 1 + sTC KA + 1 EFD 0
EC
(pu) 1 + sTR VERR 1 + sTB 1 + sTA VR sTE (pu)
VFB VRMIN
sKF
SE + KE
(1 + sTF1) (1 + sTF2)
Damping
VS = VOTHSG + VUEL + VOEL
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PSSE 34 Excitation System Models
PSSE Model Library IEEEX3
6.55 IEEEX3
IEEE Type 3 Excitation System
J+3 VRMAX
J+4 VRMIN
J+5 TE (>0) (sec)
J+6 KF
STATEs # Description
K Sensed VT
K+1 Regulator output, VR
K+2 Exciter output, EFD
K+3 Rate feedback integrator
VAR # Description
L KI
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Excitation System Models PSSE 34
IEEEX3 PSSE Model Library
VREF VS
VRMAX
+ + Regulator
1 + KA + 1 EFD
EC
(pu) 1 + sTR VERR 1 + sTA VR KE + sTE (pu)
+
VRMIN 0
VFB
Damping
sKF
1 + sTF
VBMAX
VT VTH
V
TH
= K V T + jK I
P I T V 2 TH ( 0.78L I )2
IT ad fd VB
0
LadIfd
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PSSE 34 Excitation System Models
PSSE Model Library IEEEX4
6.56 IEEEX4
IEEE Type 4 Excitation System
J+3 VRMAX
J+4 VRMIN
J+5 TE (>0) (sec)
J+6 KE
J+7 E1
J+8 SE(E1)
J+9 E2
J+10 SE(E2)
STATEs # Description
K Sensed VT
K+1 VRH
K+2 EFD
VAR # Description
L KE
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Excitation System Models PSSE 34
IEEEX4 PSSE Model Library
VREF
VRMAX
+ KV
1 VERR VRMAX - VRMIN
EC
(pu) 1 + sTR sKVTRH
KV VRH
VRMIN
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PSSE 34 Excitation System Models
PSSE Model Library IEET1A
6.57 IEET1A
Modified IEEE Type 1 Excitation System
J+1 TA (sec)
J+2 VRMAX
J+3 VRMIN
J+4 KE
J+5 TE (>0) (sec)
J+6 KF
J+7 TF (>0) (sec)
J+8 EFDMIN
J+9 E1
J+10 SE(E1)
J+11 EFDMAX
J+12 SE(EFDMAX)
STATEs # Description
K Regulator output
K+1 Exciter output, EFD
K+2 Rate feedback integrator
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Excitation System Models PSSE 34
IEET1A PSSE Model Library
VREF VRMAX
EFDMAX
+
+ KA + 1 EFD
EC
(pu) 1 + sTA sTE (pu)
+
EFDMIN
VS VRMIN
sKF
SE + KE
1 + sTF
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PSSE 34 Excitation System Models
PSSE Model Library IEET1B
6.58 IEET1B
Modified Type 1 Excitation System
J+1 VSMAX
J+2 VSMIN
J+3 KA
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Excitation System Models PSSE 34
IEET1B PSSE Model Library
STATEs # Description
K Sensed VT
K+1 Amplified output, VR
VARs # Description
L KE
L+1 Bias
sKF1 Switch = 1
1 + sTF1
Switch = 0 SE
VREF
Bias X
IMAG Xe VRMAX
VSMAX
+ + +
+ 1 + + KA 1 + 1 EFD
EC
(pu) 1 + sTR VT 1 + sTA1 VR1 + sTA2 V sTE (pu)
REG
+ +
VSMIN
VRMIN
VS
KE
VS = VOTHSG + VUEL + VOEL
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PSSE 34 Excitation System Models
PSSE Model Library IEET5A
6.59 IEET5A
Modified IEEE Type 4 Excitation System
J+3 VRMAX
J+4 VRMIN
J+5 TE (>0) (sec)
J+6 KE
J+7 E1
J+8 SE(E1)
J+9 E2
J+10 SE(E2)
J+11 EFDMAX
J+12 EFDMIN
STATEs # Description
K VRH
K+1 Exciter output
VARs # Description
L KE
L+1 VTO
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Excitation System Models PSSE 34
IEET5A PSSE Model Library
SE
X
VREF
VRMAX
EFDMAX
+
*
KA |V|<KV + 1
EC EFD
(pu) 1 + sTRH VR KE + sTE
EFDMIN
VTO VRMIN
+ |V|>KV
VRMAX
EC KV
(pu)
KV
VRMIN
KA
*If TRH equals zero, block becomes
s
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PSSE 34 Excitation System Models
PSSE Model Library IEEX2A
6.60 IEEX2A
IEEE Type 2A Excitation System
J+1 KA
J+2 TA (sec)
J+3 TB (sec)
J+4 TC (sec)
J+5 VRMAX or zero
J+6 VRMIN
J+7 KE or zero
J+8 TE (>0) (sec)
J+9 KF
J+10 TF1 (>0) (sec)
J+11 E1
J+12 SE(E1)
J+13 E2
J+14 SE(E2)
STATEs # Description
K Sensed VT
K+1 Lead lag
K+2 Regulator output, VR
K+3 Exciter output, EFD
K+4 Rate feedback integrator
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Excitation System Models PSSE 34
IEEX2A PSSE Model Library
VAR # Description
L KE
VREF VS VRMAX
Regulator Exciter
+ +
EC 1 + 1 + sTC KA + 1 EFD
sTE (pu)
(pu) 1 + sTR VERR 1 + sTB 1 + sTA VR
VFB VRMIN 0
sKF
SE + KE
1 + sTF1
VS = VOTHSG + VUEL + VOEL
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
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PSSE 34 Excitation System Models
PSSE Model Library IVOEX
6.61 IVOEX
IVO Excitation Model
J+1 A1
J+2 A2
J+3 T1
J+4 T2
J+5 MAX1
J+6 MIN1
J+7 K3
J+8 A3
J+9 A4
J+10 T3
J+11 T4
J+12 MAX3
J+13 MIN3
J+14 K5
J+15 A5
J+16 A6
J+17 T5
J+18 T6
J+19 MAX5
J+20 MIN5
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Excitation System Models PSSE 34
IVOEX PSSE Model Library
STATEs # Description
K Integrator 1
K+1 Integrator 2
K+2 Integrator 3
VREF
MAX1 MAX3
+ MAX5
A +T S A +T S A +T S
EC 1 1 3 3 5 5 EFD
K ------------------------ K ------------------------ K ------------------------
(pu) 1A + T S 3A + T S 5A + T S (pu)
2 2 4 4 6 6
+ MIN5
VS MIN1 MIN3
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All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6.62 OEX12T
J+1 VIMAX
J+2 VIMIN
J+3 TC
J+4 TB (>0) (sec)
J+5 KA
J+6 TA (sec)
OEX12T
J+11 TF (>0) (sec)
Excitation System Models PSSE 34
OEX12T PSSE Model Library
J+19 VEMIN
J+20 IFLMT
J+21 KIFL
J+22 ETLMT
J+23 KETL
J+24 TL1 ( TL2)
J+25 TL2
J+26 VOMX
J+27 VOMN 0
Note: Parameters (J+23) through (J+27) are for the continuous voltage limiter.
STATEs # Description
K Voltage sensing block
K+1 Lead lag TC/TB block
K+2 Regulator TA block
K+3 TF feedback block
K+4 Voltage limiter TL1/TL2
VARs # Description
L Limiter status
L+1 Period of decay
L+2 Monitored voltage Vm1
L+3 Monitored voltage Vm2
L+4 Monitored voltage Vm3
L+5 Monitored voltage Vm4
L+6 Monitored voltage Vm5
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PSSE 34 Excitation System Models
PSSE Model Library OEX12T
IFLMT
IFD + KIFL
IFD
V2
VEMAX
VS + +
Vm2 Vm3
VEMIN
Vm4 V3
VT VRMAX KCIFD
+ VIMAX +
1 + sTC + KA If ET <
EC 1 +
ETMIN EFD
1 + sTR Vm5 1 + sTB 1 + sTA EFD EFD = 0
+ + VIMIN
VSUM
VT VRMIN + KCIFD
VREF
sKF
1 + sTF
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Excitation System Models PSSE 34
OEX12T PSSE Model Library
ETLMT VOMX
+ ( 1 + sT )
K L1 -
---------------------------
ETL ( 1 + sT ) 0
L2
V 2 = V m1
VOMN V2
LIMOUT < 0.5 V SUM = 0.
V = 0.
3
Select V 2 = 0.
ET VSUM
High Vm1 0.5 < LIMOUT < 1.5 V SUM = V m1
V = 0.
3
If E > V
T
V = V
TMAX O OMX V 2 = 0. V3
1.5 < LIMOUT V SUM = 0.
V <E <V V = V
VMIN T TMAX 3 m1
If V O = V OMX
and V = V
O OMX
If E < V V = V
T TMIN O OD
B
CON
t = t + ------------------
3 2 A
CON
Voltage Limiter
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PSSE 34 Excitation System Models
PSSE Model Library OEX3T
6.63 OEX3T
Ontario Hydro IEEE Type ST1 Excitation System
With Semicontinuous and Acting Terminal Voltage Limiter
J+1 T1 (sec)
J+2 T2 (sec)
J+3 T3 (sec)
J+4 T4 (sec)
J+5 KA
J+6 T5 (sec)
J+7 T6 (sec) (<T5)
J+8 VRMAX
J+9 VRMIN
J+10 TE (>0) (sec)
J+11 KF
J+12 TF (>0) (sec)
J+13 KC
J+14 KD
J+15 KE
J+16 E1
J+17 SE(E1)
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Excitation System Models PSSE 34
OEX3T PSSE Model Library
STATEs # Description
K Voltage sensing block
K+1 Lead lag T2/T1 block
K+2 Lead lag T4/T3 block
K+3 Regulator T6/T5 block
K+4 TE block
VAR # Description
L Input to VREF junction
IFD
KCIFD
VREF IFD (pu) IN =
VTH
+ IN
KD
EC 1 +
VAR(L)
(pu) 1 + sTR VRMAX FEX = f(IN)
+ FEX
1 + sT2 1 + sT6 1 + sT4 + 1 VE
VS + EFD
KA
1 + sT1 1 + sT5 1 + sT3 sTE VTH (pu)
VRMIN 0
SE + K E
sKF
1 + sTF
[ A EX EXP ( B EX V E ) ]
F EX = 1.0 0.58 I N for I N 0.433 S E = -------------------------------------------------------
-
VE
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PSSE 34 Excitation System Models
PSSE Model Library REXSY1
6.64 REXSY1
General-Purpose Rotating Excitation System Model
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Excitation System Models PSSE 34
REXSY1 PSSE Model Library
STATEs # Description
K Sense voltage
K+1 Proportional voltage
K+2 Regulator lead-lag, first stage
K+3 Regulator output
K+4 Feedback lead-lag
K+5 Feedback state
K+6 Proportional field current
K+7 VE
K+8 Regulator lead-lag, second state
K+9 Exciter field current regulator output
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PSSE 34 Excitation System Models
PSSE Model Library REXSY1
1
1 + sTR
+ +
VS VREF
F * VRMAX
+ VIMAX
K ( 1 + sT ) ( 1 + sT ) 1
VI C1 C2
K + ----------- --------------------------------------------------------- VR
VP s ( 1 + sT ) ( 1 + sT ) 1 + sTA
B1 B2
-VIMAX
F * VRMIN
0
1 + sT sK
F1 F
---------------------- ------------------- 1 IFE
1 + sT 1 + sT
F2 F
2
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Excitation System Models PSSE 34
REXSY1 PSSE Model Library
ITERM
Exciter Field Current Regulator
XC
Rotating Exciter
F * VFMAX
VCMAX
+ VE
VR K 1 + 1 EFD
+ II ------------------- ----------
K + --------- 1 + sT sT
IP S P E
F * VFMIN
KH FEX = f(IN)
IFE IN
+ K L I
C ad fd
KE + SE ---------------------------
V
E
+ LadIfd
KD
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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PSSE 34 Excitation System Models
PSSE Model Library REXSYS
6.65 REXSYS
General-Purpose Rotating Excitation System Model
ECOMP
This model is located at system bus #____ IBUS, XADIFD
Machine identifier #____ ID, VOTHSG EFD
REXSYS
This model uses CONs starting with #____ J,
VUEL
and STATEs starting with #____ K.
VOEL
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Excitation System Models PSSE 34
REXSYS PSSE Model Library
STATEs # Description
K Sense voltage
K+1 Proportional voltage
K+2 Regulator lead-lag, first stage
K+3 Regulator output
K+4 Feedback lead-lag
K+5 Feedback state
K+6 Proportional field current
K+7 VE
K+8 Regulator lead-lag, second stage
K+9 Exciter field current regulator output
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PSSE 34 Excitation System Models
PSSE Model Library REXSYS
1
1 + sTR
+ +
VS VREF
F * VRMAX
+ VIMAX
K ( 1 + sT ) ( 1 + sT ) 1
VI C1 C2
K + ----------- --------------------------------------------------------- VR
VP s ( 1 + sT ) ( 1 + sT ) 1 + sTA
B1 B2
-VIMAX
F * VRMIN
0
1 + sT sK
F1 F
---------------------- ------------------- 1 IFE
1 + sT 1 + sT
F2 F
2
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Excitation System Models PSSE 34
REXSYS PSSE Model Library
VR K 1 1 VE EFD
+ II ------------------- + ----------
K + --------- 1 + sT sT
IP S P E
F * VFMIN
KH FEX = f(IN)
IFE IN
+ K L I
C ad fd
KE +SE ---------------------------
V
E
+ LadIfd
KD
If I 0. F = 1
N EX
If I 0.433 F = 1 0.577 I
N EX N
IN If 0.433 < I < 0.75 F 0.75 I 2
= FEX
N EX N
If I 0.75 F = 1.732 ( 1 I )
N EX N
If I >1 F = 0
N EX
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PSSE 34 Excitation System Models
PSSE Model Library SCRX
6.66 SCRX
Bus Fed or Solid Fed Static Exciter
ECOMP
This model is located at system bus #_______ IBUS,
VOTHSG
Machine identifier #_______ ID,
VUEL
This model uses CONs starting with #_______ J, EFD
VOEL SCRX
and STATEs starting with #_______ K.
XADIFD
ETERM
J+6 CSWITCH1
J+7 rc / rfd2
1 Set C
SWITCH = 0 for bus fed.
Set CSWITCH = 1 for solid fed.
2 Set CON(J+7) = 0 for exciter with negative field current capability.
Set CON(J+7) > 0 for exciter without negative field current capability.
(Typical CON(J+7) = 10)
STATEs # Description
K First integrator
K+1 Second integrator
CSWITCH = 0 CSWITCH = 1
VREF
EMAX Et 1.0
+
Ebridge
1 + TAs K
EC X
(pu) 1 + TBs 1 + TEs Negative
EFD
Current Logic
LadIfd
+
EMIN
VS
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All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6.67 SEXS
SEXS
Excitation System Models
Simplified Excitation System
STATEs # Description
K First integrator
PSSE 34
PSSE 34 Excitation System Models
PSSE Model Library SEXS
VREF EMAX
EC 1 + TAs K
EFD
(pu) 1 + TBs 1 + TEs
+
EMIN
VS
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Excitation System Models PSSE 34
ST1C PSSE Model Library
6.68 ST1C
IEEE 421.5 2005 ST1C Excitation System
STATEs # Description
K Sensed VT
K+1 First lead-lag
K+2 Second lead-lag
K+3 Regulator
K+4 Rate feedback
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PSSE 34 Excitation System Models
PSSE Model Library ST1C
VARs # Description
Input of HV gate at voltage regulator
L
input
Output of HV gate at voltage regulator
L+1
input
Output of LV gate at voltage regulator
L+2
input
Input of HV gate at voltage regulator
L+3
output
Output of HV gate at voltage regulator
L+4
output
Output of LV gate at voltage regulator
L+5
output
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Excitation System Models PSSE 34
ST1C PSSE Model Library
VOTHSG VOTHSG
(VOS=1) (VOS=2)
VIMAX VAMAX VT V
+ +
+ +
+ HV LV 1 + sTC 1 + sTC1 KA VA HV LV
sTR v0 gate v1 gate v2 1 + sT B 1 + sT B1 1 + sTA + v3 gate v4 gate v5
s0 + s1 s2 s3
VIMIN V AMIN
VREF VT V R
VF
IFD
KLR
+
0 ILR
sK F
1 + sTF1
s4
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PSSE 34 Excitation System Models
PSSE Model Library ST5B
6.69 ST5B
IEEE 421.5 2005 ST5B Excitation System
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Excitation System Models PSSE 34
ST5B PSSE Model Library
STATEs # Description
K Sensed VT
K+1 First lead-lag (voltage regulator channel)
K+2 Second lead-lag (voltage regulator channel)
K+3 EFD
K+4 First lead-lag (under-excitation channel)
K+5 Second lead-lag (under-excitation channel)
K+6 First lead-lag (over-excitation channel)
K+7 Second lead-lag (over-excitation channel)
VARs # Description
L V1
L+1 V2
L+2 V3
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PSSE 34 Excitation System Models
PSSE Model Library ST5B
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Excitation System Models PSSE 34
ST5C PSSE Model Library
6.70 ST5C
IEEE 421.5 Excitation System ST5C
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PSSE 34 Excitation System Models
PSSE Model Library ST5C
STATEs # Description
K Sensed VT
K+1 First lead-lag (voltage regulator channel)
K+2 Second lead-lag (voltage regulator channel)
K+3 EFD
K+4 First lead-lag ( under-excitation channel)
K+5 Second lead-lag (under-excitation channel)
K+6 First lead-lag (over-excitation channel)
K+7 Second lead-lag (over-excitation channel)
VARs # Description
L V1
L+1 V2
L+2 V3
L+3 Output of HV gate
L+4 Output of LV gate
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ST5C
VOEL VOEL
(OEL=1) (OEL=2)
Excitation System Models
VUEL VUEL
(UEL=1) (UEL=2)
SWUEL
VRMAX / K R VRMAX / K R
+ SWOEL
ECOMP 1 1 + sTC1 1 + sTC 2
HV LV
gate gate
V RMAX VT VRMAX
1 + sTR + 1 + sT B1 1 + sTB 2 A
s0 + s1 s2
+ B A EFD
VRMIN / K R VRMIN / K R 1
VREF VOTHSG KR
B + 1 + sT1
VRMAX / K R VRMAX / K R
6-164
s3
V RMIN VT VRMIN
1 + sTUC1 1 + sTUC 2
1 + sTUB1 1 + sTUB2
s4 s5 KC
VRMIN / KR VRMIN / KR I FD
VRMAX / K R VRMAX / K R
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PSSE 34 Excitation System Models
PSSE Model Library ST7C
6.71 ST7C
IEEE 421.5 ST7C Excitation System
STATEs # Description
K Sensed VT
K+1 Lead-lag block 1
K+2 Lead-lag block 2
K+3 First order feedback block
K+4 Thyristor bridge time constant
VARs # Description
L V1
L+1 V2
L+2 Vref_FB
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Excitation System Models PSSE 34
ST7C PSSE Model Library
Ecomp 1 1 + sTG
1 + sTR s0 1 + sTF V1
s1
KH
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All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
6.72 ST6B
ST6B
Excitation System Models PSSE 34
ST6B PSSE Model Library
STATEs # Description
K Sensed VT
K+1 Integral channel
K+2 Derivative channel
K+3 VG
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PSSE 34 Excitation System Models
PSSE Model Library ST6B
VARs # Description
L VA
L+1 VR
L+2 VI
I fd
I LR
+
KC1 KLR
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Excitation System Models PSSE 34
ST7B PSSE Model Library
6.73 ST7B
IEEE 421.5 2005 ST7B Excitation System
J+12 KIA (pu) (>0) gain of the first order feedback block
TIA (>0) time constant of the first order feedback block
J+13
(sec)
STATEs # Description
K Sensed VT
K+1 Lead-lag block 1
K+2 Lead-lag block 2
K+3 First order feedback block
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PSSE 34 Excitation System Models
PSSE Model Library ST7B
VARs # Description
L V1
L+1 V2
L+2 Vref_FB
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Excitation System Models PSSE 34
ST7B PSSE Model Library
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PSSE 34 Excitation System Models
PSSE Model Library URHIDT
6.74 URHIDT
High Dam Excitation Model
J+1 Tdv
J+2 Ki
J+3 Tdi (> 0)
J+4 Tie
J+5 Kdi
J+6 Kd2i
J+7 Kdifd
J+8 Tdifd (> 0)
J+9 Tr
J+10 Vimax
J+11 Vimin
J+12 Tb
J+13 Tc
J+14 Tb1
J+15 Tc1
J+16 Ka
J+17 Taw (> 0)
J+18 Vamax
J+19 Vamin
J+20 a
J+21 Tb2 (> 0)
J+22 Kir
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Excitation System Models PSSE 34
URHIDT PSSE Model Library
J+27 Taf
J+28 Vhithrsh
J+29 b
STATEs # Description
K Compensating voltage
K+1 First exciter stabilizing
K+2 Second exciter stabilizing
K+3 Regulator
K+4 Feedback
K+5 Voltage stabilizer
K+6 First current
K+7 Current filter
K+8 Second current
K+9 Field current stabilization
VARs # Description
L Initial current
L+1 Current flow
L+2 Timer
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PSSE 34 Excitation System Models
PSSE Model Library URHIDT
sK T
VT dv dv
------------------------
1 + sT
dv
I Ki
sT 1
di --------------------
---------------------
1 + sT 1 + sT Kdi
di ie
sT
di
--------------------- Kd2i
1 + sT
di
sK T
Lad Ifd difd difd
---------------------------------
1 + sT
difd
Vref Vs
Vamax
Vimax
+ +
+
VT 1 1 + sT 1 + sT K + +
V + I (R + jX ) ------------------ c c1 a
IT T T comp comp 1 + sT -------------------
1 + sT
----------------------
1 + sT
------------------
1 + sT
Efd
Ec r b b1 a
Vimin Vamin
a + sbT
b2
------------------------- Xe
1 + sT
b2
K +
ir Lad Ifd
0
Ilr
Forcing Before Operation:
Vterr = Vref Ec
Working Bridge Operation:
Ta = Taw If Vterr > Vlothrsh, start low-voltage timer
If timer > Tlodelay,
Ta = forcing bridge time constant (Taf)
Input of regulator (ds2) = Vamax/Ta
Reset to normal regulator when Vterr > Vhithrsh for Tlodelay
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Excitation System Models PSSE 34
URST5T PSSE Model Library
6.75 URST5T
IEEE Proposed Type ST5B Excitation System
STATEs # Description
K Sensed VT
K+1 First lead lag
K+2 Second lead lag
K+3 Final filter
VUEL VOEL
VRMAX/KR VRMAX/KR VRMAX VRMAX * VT
1 HV LV + 1 + sTC1 1 + sTC2 1 +
EC EFD
Gate Gate KR
(pu) 1 + sTr 1 + sTB1 1 + sTB2 1 + sT1
+ +
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Chapter 7
Turbine-Governor Models
This chapter contains a collection of data sheets for the turbine-governor models contained in the
Chapter 7 - Turbine-Governor Models
Model Description
BBGOV1 Brown-Boveri turbine-governor model
CRCMGV Cross compound turbine-governor model
DEGOV Woodward diesel governor model
DEGOV1 Woodward diesel governor model
GAST Gas turbine-governor model
GAST2A Gas turbine-governor model
GASTWD Gas turbine-governor model
GGOV1 GE general purpose turbine-governor model
HYGOV Hydro turbine-governor model
HYGOV2 Hydro turbine-governor model
HYGOVM Hydro turbine-governor lumped parameter model
HYGOVR1 Fourth order lead-lag hydro-turbine
HYGOVT Hydro turbine-governor traveling wave model
IEEEG1 1981 IEEE type 1 turbine-governor model
IEEEG2 1981 IEEE type 2 turbine-governor model
IEEEG3 1981 IEEE type 3 turbine-governor model
IEESGO 1973 IEEE standard turbine-governor model
IVOGO IVO turbine-governor model
PIDGOV Hydro turbine and governor model
PWTBD1 Pratt & Whitney Turboden turbine-governor Model
SHAF25 Torsional-elastic shaft model for 25 masses
TGOV1 Steam turbine-governor model
TGOV2 Steam turbine-governor model with fast valving
TGOV3 Modified IEEE type 1 turbine-governor model with fast valving
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7-1
Turbine-Governor Models PSSE 34
PSSE Model Library
Model Description
TGOV4 Modified IEEE type 1 speed governing model with PLU and EVA
TGOV5 Modified IEEE type 1 turbine-governor model with boiler controls
TURCZT Czech hydro or steam turbine-governor model
TWDM1T Tail water depression hydro governor model 1
TWDM2T Tail water depression hydro governor model 2
URCSCT Combined cycle, single shaft turbine-governor model
URGS3T WECC gas turbine governor model
WEHGOV Woodward electronic hydro governor model
WESGOV Westinghouse digital governor for gas turbine
WPIDHY Woodward PID hydro governor model
WSHYDD WECC double derivative hydro governor model
WSHYGP WECC GP hydro governor plus turbine model
WSIEG1 WECC modified 1981 IEEE type 1 turbine-governor model
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7-2
PSSE 34 Turbine-Governor Models
PSSE Model Library BBGOV1
7.1 BBGOV1
European Governor Model
J+9 K2
J+10 T5 (sec)
J+11 K3
J+12 T6 (sec)
J+13 T1 (sec)
J+14 SWITCH
J+15 PMAX
J+16 PMIN
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7-3
Turbine-Governor Models PSSE 34
BBGOV1 PSSE Model Library
STATEs # Description
K Step and gradient limiter
K+1 PI controller
K+2 Valve output
K+3 Steam output
K+4 Turbine power
K+5 Turbine power
K+6 Electrical damping feedback
VAR # Description
L Reference, Po
Govenor gain KS =1/R, PMAX and PMIN are in pu on generator MVA base.
IBUS, BBGOV1, ID, CON(J) to CON(J+16) /
PELEC
SWITCH = 0
SWITCH 0
1
Po
1 + sT1
+ PMAX
-fcut -KLS
+ 1 KD
Speed
KS KP (1+ ) 1 + sTD
fcut KLS sTN
+ PMIN
1 KG
S KLS
1 1 - K2 +
PMECH
1 + sT4
+ +
1 - K3
K2
1 + sT5
K3
1 + sT6
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7-4
PSSE 34 Turbine-Governor Models
PSSE Model Library CRCMGV
7.2 CRCMGV
Cross Compound Turbine-Governor
J PMAX (HP)1
J+1 R (HP)
J+2 T1 (HP) (>0)
J+3 T3 (HP) (>0)
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7-5
Turbine-Governor Models PSSE 34
CRCMGV PSSE Model Library
STATEs # Description
K
K+1
High-pressure unit
K+2
K+3
K+4
K+5
Low-pressure unit
K+6
K+7
VARs # Description
L PMECH1 REF
L+1 PMECH2 REF
Reference
VAR(L)
PMAX
+
1/R 1 + sFT5 +
SPEEDHP PMECHHP
1 + sT1 (1 + sT3) (1 + sT4) (1 + sT5)
PMIN = 0
High-Pressure Unit
(DH) (ET-HP)2
Reference
VAR(L+1) PMAX
+ +
1/R 1 + sFT5 +
SPEEDLP PMECHLP
1 + sT1 (1 + sT3) (1 + sT4) (1 + sT5)
PMIN = 0
Low-Pressure Unit
(DH) (ET-HP)2
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7-6
PSSE 34 Turbine-Governor Models
PSSE Model Library DEGOV
7.3 DEGOV
Woodward Diesel Governor
J+6 T6 (sec)
J+9 TMIN
STATEs # Description
K Electric control box 1
K+1 Electric control box 2
K+2 Actuator 1
K+3 Actuator 2
K+4 Actuator 3
VARs # Description
L
L+1
. Delay table
.
.
L+12
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7-7
Turbine-Governor Models PSSE 34
DEGOV PSSE Model Library
1 + Speed
TMAX
Actuator
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7-8
PSSE 34 Turbine-Governor Models
PSSE Model Library DEGOV1
7.4 DEGOV1
Woodward Diesel Governor
J+9 TMIN
J+10 DROOP
J+11 TE
STATEs # Description
K Electric control box 1
K+1 Electric control box 2
K+2 Actuator 1
K+3 Actuator 2
K+4 Actuator 3
K+5 Power transducer
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7-9
Turbine-Governor Models PSSE 34
DEGOV1 PSSE Model Library
VARs # Description
L Reference
L+1
.
. Delay table
.
L+13
VAR(L)
TMAX 1 + Speed
+
(1 + T3s) K(1 + T4s)
e-sTD X PMECH
Speed 1 + T1s + T2T1s2 s(1 + T5s) (1 +T6s)
TMIN Engine
Electric Control Box
Actuator
ICON(M)=0
DROOP
1 SBASE
ICON(M)=1 PELEC
1+sTE MBASE
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7-10
PSSE 34 Turbine-Governor Models
PSSE Model Library GAST
7.5 GAST
Gas Turbine-Governor
J+8 Dturb
STATEs # Description
K Fuel valve
K+1 Fuel flow
K+2 Exhaust temperature
VAR # Description
L Load reference
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7-11
Turbine-Governor Models PSSE 34
GAST PSSE Model Library
Speed Dturb
SPEED
1
R VMAX
Load + Low 1 1 +
Reference Value PMECH
VAR(L) Gate 1 + T1s 1 + T2s
VMIN
+ 1
KT
1 + T3s
+ +
Load Limit
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7-12
PSSE 34 Turbine-Governor Models
PSSE Model Library GAST2A
7.6 GAST2A
Gas Turbine Model
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7-13
Turbine-Governor Models PSSE 34
GAST2A PSSE Model Library
STATEs # Description
K Speed governor
K+1 Valve positioner
K+2 Fuel system
K+3 Radiation shield
K+4 Thermocouple
K+5 Temperature control
K+6 Gas turbine dynamics
K+7 Combustor
K+8 Combustor
K+9 Turbine/exhaust
K+10 Turbine/exhaust
K+11 Fuel controller delay
K+12 Fuel controller delay
VARs # Description
L Governor reference
L+1 Temperature reference flag
L+2 Low value select output
L+3 Output of temperature control
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7-14
PSSE 34 Turbine-Governor Models
PSSE Model Library GAST2A
MAX TC Radiation
Thermocouple Shield
+ Turbine
Temperature T5s + 1 1 K5
K4 + f1
Control* t s T4s + 1 T3s + 1
Wf1 Turbine Exhaust
Reference
VAR(L) e-sETD
MAX K6
Valve Fuel
Fuel Positioner System
+ + Wf
Control Fuel Combustor
W(Xs+1) Low
Flow
e-sECR
+ 1
e-sT
Value a
X K3 bs + c fs + 1
Ys + Z Select
Speed Speed
MIN Governor Control
Kf
Gas Turbine
Dynamics
1
TCDS + 1
SPEED Turbine
PMECH TRATE Wf2
(pu deviation)
X f2
+ MBASE
+
1.0 N
*Temperature control output is set to output of speed governor when temperature control input changes from positive to negative.
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7-15
Turbine-Governor Models PSSE 34
GASTWD PSSE Model Library
7.7 GASTWD
Woodward Gas Turbine-Governor Model
J+11 K3
J+12 a (> 0) valve positioner
J+13 b (sec) (> 0) valve positioner
J+14 c valve positioner
J+15 f (sec) (> 0)
J+16 Kf
J+17 K5
J+18 K4
J+19 T3 (sec) (> 0)
J+20 T4 (sec) (> 0)
J+21 t (> 0)
J+22 T5 (sec) (> 0)
J+23 af1
J+24 bf1
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7-16
PSSE 34 Turbine-Governor Models
PSSE Model Library GASTWD
J+27 cf2
STATEs # Description
K Speed governor
K+1 Valve positioner
K+2 Fuel system
K+3 Radiation shield
K+4 Thermocouple
K+5 Temperature control
K+6 Gas turbine dynamics
K+7 Combustor
K+8 Combustor
K+9 Turbine/exhaust
K+10 Turbine/exhaust
K+11 Fuel controller delay
K+12 Fuel controller delay
K+13 Power transducer
VARs # Description
L Governor reference
L+1 Temperature reference flag
L+2 Low value select output
L+3 Output of temperature control
L+4 Derivative control
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7-17
Turbine-Governor Models PSSE 34
GASTWD PSSE Model Library
Pelec
TC Setpoint for
Temperature Control
MAX
SBASE Thermocouple Radiation Shield
TRATE + Turbine
Temperature T5s + 1 1 K5
K4 + f1
Pe Control* ts T4s + 1 T3s + 1
e-sETD
KP K6
Valve Fuel
Fuel Positioner System Wf
+ Control + Fuel Combustor
Speed Low
+ Flow
Reference +
KI
Value X K3 e-sT
+ a 1
e-sECR
s bs + c fs + 1
VAR (L) Select
+
Speed
sKD Control Kf
Gas Turbine
Dynamics
MIN 1
TCDs + 1
SPEED Turbine
(pu deviation) Wf2
PMECH TRATE f2
X
+ MBASE
+
1.0
N
*Temperature control output is set to output of speed governor when temperature control input changes from positive to negative.
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7-18
PSSE 34 Turbine-Governor Models
PSSE Model Library GGOV1
7.8 GGOV1
GE General Governor/Turbine Model
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7-19
Turbine-Governor Models PSSE 34
GGOV1 PSSE Model Library
STATEs # Description
K Machine Electrical Power Measurement
K+1 Governor Differential Control
K+2 Governor Integral Control
K+3 Turbine Actuator
K+4 Turbine Lead-Lag
K+5 Turbine load limiter measurement
K+6 Turbine Load Limiter Integral Control
K+7 Supervisory Load Control
K+8 Acceleration Control
K+9 Temperature Detection Lead-Lag
VARs # Description
L Load Reference
L+1 Output of Load Limiter PI Control
L+2 Output of Governor PID Control
L+3 Low Value Select Output
L+4 Output of Turbine Actuator
L+5 Output of Turbine Lead-Lag
L+6 Supervisory Load Controller Setpoint, Pmwset
L+7
.
. Delay Table
.
L+19
L+20 Dead Band
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7-20
PSSE 34 Turbine-Governor Models
PSSE Model Library GGOV1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-21
Turbine-Governor Models PSSE 34
GGOV1 PSSE Model Library
governor output
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7-22
PSSE 34 Turbine-Governor Models
PSSE Model Library GGOV1
Notes:
a. This model can be used to represent a variety of prime movers controlled by PID
governors. It is suitable, for example, for representation of:
gas turbine and single shaft combined cycle turbines
diesel engines with modern electronic or digital governors
steam turbines where steam is supplied from a large boiler drum or a large
header whose pressure is substantially constant over the period under study
simple hydro turbines in dam configurations where the water column length is
short and water inertia effects are minimal
b. Per unit parameters are on base of the turbine MW base (Trate). If no value is
entered for Trate, parameters are specified on generator MVA base.
c. The range of fuel valve travel and of fuel flow is unity. Thus the largest possible
value of Vmax is 1.0 and the smallest possible value of Vmin is zero. Vmax may,
however, be reduced below unity to represent a loading limit that may be imposed
by the operator or a supervisory control system. For gas turbines Vmin should nor-
mally be greater than zero and less than wfnl to represent a minimum firing limit.
The value of fuel flow at maximum output must be less than, or equal to unity,
depending on the value of kturb.
d. The parameter Teng is provided for use in representing diesel engines where there
is a small but measurable transport delay between a change in fuel flow setting and
the development of torque. In the majority of cases Teng should be zero.
e. The parameter Flag is provided to recognize that fuel flow, for a given fuel valve
stroke, can be proportional to engine speed. This is the case for GE gas turbines
and for diesel engines with positive displacement fuel injectors. Flag should be set
to unity for all GE gas turbines and most diesel engines. Flag should be set to zero
where it is known that the fuel control system keeps fuel flow independent of engine
speed.
f. The load limiter module may be used to impose a maximum output limit such as an
exhaust temperature limit. To do this the time constant Tfload should be set to rep-
resent the time constant in the measurement of temperature (or other signal), and
the gains of the limiter, Kpload, Kiload, should be set to give prompt stable control
when on limit. The load limit can be deactivated by setting the parameter Ldref to a
high value.
g. The parameter Dm can represent either the variation of engine power with shaft
speed or the variation of maximum power capability with shaft speed.
If Dm is positive it describes the falling slope of the engine speed versus power
characteristic as speed increases. A slightly falling characteristic is typical for recip-
rocating engines and some aeroderivative turbines.
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7-23
Turbine-Governor Models PSSE 34
GGOV1 PSSE Model Library
Pmwset is given a value automatically when the model is initialized and stored in
VAR(L+6), and can be changed thereafter. The load controller must be adjusted to
respond gently relative to the speed governor. A typical value for Kimw is 0.01, cor-
responding to a reset time of 100 seconds. Setting Kimw to 0.001 corresponds to
a relatively slow acting load controller.
i. The parameters Aset, Ka, and Ta describe an acceleration limiter. These parame-
ters may be set to zero if the limiter is not active.
j. The parameter db is the speed governor dead band. This parameter is in terms of
per unit speed.
k. Tsa and Tsb are provided to augment the exhaust gas temperature measurement
subsystem in gas turbines.
l. Rup and Rdown specify the maximum rate of increase and decrease of the output
of the load limit controller (Kpload/Kiload).
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7-24
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOV
7.9 HYGOV
Hydro Turbine-Governor
STATEs # Description
K e, filter output
K+1 c, desired gate
K+2 g, gate opening
K+3 q, turbine flow
VARs # Description
L Speed reference
L+1 h, turbine head
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7-25
Turbine-Governor Models PSSE 34
HYGOV PSSE Model Library
VAR(L) + 1 e 1 + T rs c 1 g
nref 1 + Tfs rTrs 1 + Tgs
Velocity and
Speed + Position Limits
SPEED SPEED
R Dturb
X
g 1 q +
X X At PMECH
Tws +
q h
+
1 qNL
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7-26
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOV2
7.10 HYGOV2
Hydro Turbine-Governor
J+1 Ki
J+2 KA
J+3 T1
J+4 T2
J+5 T3 (> 0)
J+6 T4 (> 0)
J+7 T5
J+8 T6 (> 0)
J+9 TR (> 0)
J+10 r, temporary droop
J+11 R, permanent droop
J+12 +VGMAX
J+13 Maximum gate position, GMAX
J+14 Minimum gate position, GMIN
J+15 PMAX
STATEs # Description
K Filter
K+1 Governor
K+2 Governor speed
K+3 Droop
K+4 Gate position
K+5 Penstock
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7-27
Turbine-Governor Models PSSE 34
HYGOV2 PSSE Model Library
VAR # Description
L Reference
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7-28
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOVM
7.11 HYGOVM
Hydro Turbine-Governor Lumped Parameter Model
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7-29
Turbine-Governor Models PSSE 34
HYGOVM PSSE Model Library
STATEs # Description
K e, filter output
K+1 c, desired gate
K+2 g, gate opening
K+3 Relief valve opening or jet deflector position
K+4 QPEN, penstock flow (cfs or cms)
K+5 QTUN, tunnel flow (cfs or cms)
K+6 HSCH, surge chamber head (ft or m)
VARs # Description
L Speed reference
L+1 Turbine head (ft or m)
L+2 Turbine flow (cfs or cms)
Relieve valve flow or deflected jet flow
L+3
(cfs or cms)
L+4 Head at surge chamber base (ft or m)
L+5 Internal memory
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7-30
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOVM
HSCH
SCHARE
(V)
HLAKE
SURGE
(V) QSCH CHAMBER
TUNNEL
TUNL/A, TUNLOS
QTUN SCHLOS
HBSCH PENSTOCK
PENL/A, PENLOS
QPEN
TURBINE HTAIL
(V)
Q
2
PEN X
At PENLOS
2
QPEN At
Gate + +
Relief Valve X O
2 O
2 gv QPEN
INPUT s PENL/A OUTPUT
+ +
+
HBSCH
HTAIL
HBSCH
HLAKE
S +
+
HSCH +
TUNLOS
gv
1 2
s TUNL/A Q
SCHLOS s SCHARE TUN
X
2
Q SCH
X QSCH
+
QTUN
QPEN
LEGEND
gv Gravitational acceleration At Turbine flow gain
TUNL/A Summation of length/cross section of tunnel O Gate + relief valve opening
SCHARE Surge chamber cross section HSCH Water level in surge chamber
PENLOS Penstock head loss coefficient QPEN Penstock flow
TUNLOS Tunnel head loss coefficient QTUN Tunnel flow
FSCH Surge chamber orifice head loss coefficient QSCH Surge chamber flow
Summation of length/cross section of penstock,
PENL/A
scroll case and draft tube
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7-31
Turbine-Governor Models PSSE 34
HYGOVM PSSE Model Library
Jet Deflector
MXJDOR
+ 1 1
s
Tg Deflector
Position
+ MXJDCR
0.01
+
Governor Gate Servo
Speed GMAX
MXGTOR or
MXBGOR
Speed + 1 1 + Trs + 1 1
S S
Reference 1 + Tfs r Trs Tg s Gate
Opening
MXGTCR or
GMIN MXBGCR
R
+ RVLMAX
RVLVCR
1
s Relief Valve
Opening
0
Relief Valve
LEGEND
R Permanent droop MXBGCR Maximum buffered gate closing rate
r Temporary droop GMAX Maximum gate limit
Tr Governor time constant GMIN Minimum gate limit
Tf Filter time constant RVLVCR Relief valve closing rate
Tg Servo time constant RVLMAX Maximum relief valve limit
MXGTOR Maximum gate opening rate MXJDOR Maximum jet deflector opening rate
MXGTCR Maximum gate closing rate MXJDCR Maximum jet deflector closing rate
MXBGOR Maximum buffered gate opening rate
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7-32
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOVR1
7.12 HYGOVR1
Fourth order lead-lag hydro-turbine
J db1
J+1 err
J+2 Td (sec)
J+3 T1 (sec)
J+4 T2 (sec) q
J+5 T3 (sec)
J+6 T4 (sec)
J+7 T5 (sec)
J+8 T6 (sec)
J+9 T7 (sec)
J+10 T8 (sec)
J+11 KP
J+12 R
J+13 Tt
J+14 KG
J+15 TP (sec)
J+16 VELOPEN
J+17 VELCLOSE
J+18 PMAX
J+19 PMIN
J+20 db2
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7-33
Turbine-Governor Models PSSE 34
HYGOVR1 PSSE Model Library
STATEs # Description
K Output, Td
K+1 Lead-lag T1
K+2 Lead-lag T2
K+3 Lead-lag T3
K+4 Integrator Kp
VARs # Description
L Reference
L+1 Deadband1 In
L+3 Deadband2 In
R, PMAX, and PMIN are in pu on turbine MW base if Trate is > 0, else in pu of generator
MVA
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7-34
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOVR1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-35
Turbine-Governor Models PSSE 34
HYGOVT PSSE Model Library
7.13 HYGOVT
Hydro Turbine-Governor Traveling Wave Model
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7-36
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOVT
STATEs # Description
K e, filter output
K+1 c, desired gate
K+2 g, gate opening
K+3 Relief valve opening or jet deflector position
K+4 QPEN, Penstock flow at the surge chamber end
K+5 QTUN, Tunnel flow at the surge chamber end
K+6 HSCH, surge chamber head (ft or m)
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7-37
Turbine-Governor Models PSSE 34
HYGOVT PSSE Model Library
VARs # Description
L Speed reference
L+1 Turbine head (ft or m)
L+2 Turbine flow (cfs or cms)
L+3 Relieve valve flow or deflected jet flow (cfs or cms)
L+4 Head at surge chamber base (ft or m)
L+5 Internal memory
L+6 Penstock flow at surge chamber ends (cfs or cms)
L+7
.
Flows along the penstock
.
(cfs or cms)
.
L+25
L+26
.
Heads along the penstock
.
(ft or m)
.
L+45
L+46 Penstock head at surge chamber end (ft or m)
L+47
.
Flows along the tunnel
.
(cfs or cms)
.
L+65
L+66 Tunnel head at lake end (ft or m)
L+67
.
Heads along the tunnel
.
(ft or m)
.
L+85
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7-38
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOVT
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-39
Turbine-Governor Models PSSE 34
HYGOVT PSSE Model Library
HSCH
SCHARE
(V)
HLAKE
SURGE
(V) QSCH CHAMBER
TUNNEL
QTUN SCHLOS
HBSCH
PENSTOCK
QPEN
TURBINE HTAIL
(V)
Time
TUNNEL
(TUNLGTH, TUNSPD, TUNARE, TUNLOS)
Tunnel Inlet
Constraints
Surge Chamber
Constraints
DELT*ICON(M+3)
Space
Flows VAR(L+46) VAR(L+45 + ICON(M+2)) = QTUN
TUNLGTH/(ICON(M+2)+1)
Heads VAR(L+66) VAR(L+65 + ICON(M+2)) = HBSCH
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7-40
PSSE 34 Turbine-Governor Models
PSSE Model Library HYGOVT
Surge Chamber
+ 1 +
QTUN HBSCH
QSCH s SCHARE HSCH
+
QPEN X SCHLOS
Q2SCH
Time
PENSTOCK
(PENLGTH, PENSPD, PENARE, PENLOS)
Surge Chamber Turbine
Constraints Constraints
DELT*ICON(M+1)
Space
Flows VAR(L+6) = QPEN VAR(L+55 + ICON(M))
PENLGTH/(ICON(M)+1)
Heads VAR(L+26) = HBSCH VAR(L+25 + ICON(M))
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7-41
Turbine-Governor Models PSSE 34
HYGOVT PSSE Model Library
Jet Deflector
MXJDOR
+ 1 1 Deflector
s Position
Tg
+ MXJDCR
0.01
1 Relief Valve
s Opening
0
Relief Valve
LEGEND:
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7-42
PSSE 34 Turbine-Governor Models
PSSE Model Library IEEEG1
7.14 IEEEG1
IEEE Type 1 Speed-Governing Model
J+10 K2
J+11 T5 (sec)
J+12 K3
J+13 K4
J+14 T6 (sec)
J+15 K5
J+16 K6
J+17 T7 (sec)
J+18 K7
J+19 K8
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7-43
Turbine-Governor Models PSSE 34
IEEEG1 PSSE Model Library
STATEs # Description
K First governor integrator
K+1 Governor output
K+2 First turbine integrator
K+3 Second turbine integrator
K+4 Third turbine integrator
K+5 Fourth turbine integrator
VARs # Description
L Reference, P0
L+1 Internal memory
+ + +
P PMECHHP
M1
Po + + +
PMAX K1 K3 K5 K7
+ Uo
K(1 + sT2) 1 1 1 1 1 1
T3 S 1 + sT4 1 + sT5 1 + sT7
SPEEDHP 1 + sT1 1 + sT6
Uc
PMIN K2 K4 K6 K8
+ + +
+ + +
PMECHLP
PM2
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7-44
PSSE 34 Turbine-Governor Models
PSSE Model Library IEEEG2
7.15 IEEEG2
IEEE Type 2 Speed-Governing Model
STATEs # Description
K First integrator
K+1 Second integrator
K+2 Hydro turbine
VAR # Description
L Reference, P0
Po
+ PMAX
PMIN
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7-45
Turbine-Governor Models PSSE 34
IEEEG3 PSSE Model Library
7.16 IEEEG3
IEEE Type 3 Speed-Governing Model
STATEs # Description
K Servomotor position
K+1 Gate position
K+2 Transient droop compensation
K+3 Hydroturbine
VAR # Description
L Reference, P0
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7-46
PSSE 34 Turbine-Governor Models
PSSE Model Library IEEEG3
Po Uo PMAX
+
a a
13 21
1 1 a 1 + a ------------------ sT PM
23 11 a W
SPEED 23 PMECH
TG(1 + sTP) S ---------------------------------------------------------------------------
1 + a sT
11 W
Uc PMIN
+
sTR
1 + sTR
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7-47
Turbine-Governor Models PSSE 34
IEESGO PSSE Model Library
7.17 IEESGO
IEEE Standard Model
STATEs # Description
K Filter output
K+1 Valve or gate servo output
K+2 Turbine powers
K+3 Turbine powers
K+4 Turbine powers
VAR # Description
L Reference, Po
Govenor gain K1 = 1/R, Pmax and Pmin are in pu on generator MVA base.
IBUS, IEESGO, ID, CON(J) to CON(J+10) /
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7-48
PSSE 34 Turbine-Governor Models
PSSE Model Library IEESGO
Po
+
K1 (1 + sT2) PMAX 1 +
SPEED 1 K2 PMECH
(1 + sT1) (1 + sT3) PMIN 1 + sT4
+ +
1 K3
K2 K3
1 + sT5 1 + sT6
Turbine
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7-49
Turbine-Governor Models PSSE 34
IVOGO PSSE Model Library
7.18 IVOGO
IVO Governor Model
J+17 T5
J+18 T6
J+19 MAX5
J+20 MIN5
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7-50
PSSE 34 Turbine-Governor Models
PSSE Model Library IVOGO
STATEs # Description
K Integrator 1
K+1 Integrator 2
K+2 Integrator 3
VAR # Description
L Reference
Govenor gain K1 = 1/R, MAX5 and MIN5 are in pu on generator MVA base.
IBUS, IVOGO, ID, CON(J) to CON(J+20) /
REF
MAX1 MAX3
MAX5
+
A +T S A +T S A +T S
1 1 3 3 5 5
SPEED K ------------------------ K ------------------------ K ------------------------ PMECH
1A + T S 3A + T S 5A + T S
2 2 4 4 6 6
MIN5
MIN1 MIN3
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7-51
Turbine-Governor Models PSSE 34
PIDGOV PSSE Model Library
7.19 PIDGOV
Hydro Turbine-Governor
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7-52
PSSE 34 Turbine-Governor Models
PSSE Model Library PIDGOV
STATEs # Description
K Input sensor
K+1 PI controller
K+2 First regulator
K+3 Derivative controller
K+4 Second regulator
K+5 Gate position
K+6 Water inertia
VAR # Description
L Reference
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7-53
Turbine-Governor Models PSSE 34
PIDGOV PSSE Model Library
+
VAR(L) = Pref
Flag
sKd
1 + sTa
Velmax Gmax
Power
3
+ 1 1 1 - sTz +
PMECH
Tb s 2 1 + sTz/2
1 Gate
0
Tz = (Atw) * Tw
Velmin Gmin
Dturb
DT01_005
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7-54
PSSE 34 Turbine-Governor Models
PSSE Model Library PWTBD1
7.20 PWTBD1
Pratt & Whitney Turboden Turbine-Governor Model
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7-55
Turbine-Governor Models PSSE 34
PWTBD1 PSSE Model Library
STATEs # Description
K PI controller
K+1 Valve opening
K+2 Turbine power
STATEs # Description
Internal Memory (no input data
M
required for this ICON)
Notes:
1. Trate (CON(J) - Turbine MW rating) can be specified as zero or can be greater than
zero. If Trate is greater than zero, the governor model parameters have to be specified
in per unit of Trate, else the parameters are assumed to be in per unit of machine MVA
base.
2. The valve position (V) versus power output (P) curve is specified as a series of the max-
imum of 11 pairs of V-P points with the V-values assumed to be along the x-axis, and
the P-values along the y-axis. The V-P pairs of points should have values such that
V11>V10>.>V1, and P11 ? P10 ?? P1. Unused pairs must be entered as zero. The
power output (P) is limited to the P-value of the first and the last valid points. If none or
only one valid pair of P-V points is entered the output is considered equal to the input.
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7-56
PSSE 34 Turbine-Governor Models
PSSE Model Library SHAF25
7.21 SHAF25
Torsional Shaft Model for 25 Masses
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7-57
Turbine-Governor Models PSSE 34
SHAF25 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-58
PSSE 34 Turbine-Governor Models
PSSE Model Library SHAF25
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-59
Turbine-Governor Models PSSE 34
SHAF25 PSSE Model Library
STATEs # Description
K Slip at mass 1
K+1 Slip at mass 2
K+2 Slip at mass 3
K+3 Slip at mass 4
K+4 Slip at mass 5
K+5 Slip at mass 6
K+6 Slip at mass 7
K+7 Slip at mass 8
K+8 Slip at mass 9
K+9 Slip at mass 10
K+10 Slip at mass 11
K+11 Slip at mass 12
K+12 Slip at mass 13
K+13 Slip at mass 14
K+14 Slip at mass 15
K+15 Slip at mass 16
K+16 Slip at mass 17
K+17 Slip at mass 18
K+18 Slip at mass 19
K+19 Slip at mass 20
K+20 Slip at mass 21
K+21 Slip at mass 22
K+22 Slip at mass 23
K+23 Slip at mass 24
K+24 Slip at mass 25
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7-60
PSSE 34 Turbine-Governor Models
PSSE Model Library SHAF25
VARs # Description
L T electrical of exciter
L+1 T shaft 1-2
L+2 T shaft 2-3
L+3 T shaft 3-4
L+4 T shaft 4-5
L+5 T shaft 5-6
L+6 T shaft 6-7
L+7 T shaft 7-8
L+8 T shaft 8-9
L+9 T shaft 9-10
L+10 T shaft 10-11
L+11 T shaft 11-12
L+12 T shaft 12-13
L+13 T shaft 13-14
L+14 T shaft 14-15
L+15 T shaft 15-16
L+16 T shaft 16-17
L+17 T shaft 17-18
L+18 T shaft 18-19
L+19 T shaft 19-20
L+20 T shaft 20-21
L+21 T shaft 21-22
L+22 T shaft 22-23
L+23 T shaft 23-24
L+24 T shaft 24-25
L+25 Angle at mass 1
L+26 Angle at mass 2
L+27 Angle at mass 3
L+28 Angle at mass 4
L+29 Angle at mass 5
L+30 Angle at mass 6
L+31 Angle at mass 7
L+32 Angle at mass 8
L+33 Angle at mass 9
L+34 Angle at mass 10
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7-61
Turbine-Governor Models PSSE 34
SHAF25 PSSE Model Library
VARs # Description
L+35 Angle at mass 11
L+36 Angle at mass 12
L+37 Angle at mass 13
L+38 Angle at mass 14
L+39 Angle at mass 15
L+40 Angle at mass 16
L+41 Angle at mass 17
L+42 Angle at mass 18
L+43 Angle at mass 19
L+44 Angle at mass 20
L+45 Angle at mass 21
L+46 Angle at mass 22
L+47 Angle at mass 23
L+48 Angle at mass 24
L+49 Angle at mass 25
L+50
L+51
L+52
. Working storage locations
.
.
L+74
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7-62
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV1
7.22 TGOV1
Steam Turbine-Governor
J+2 VMAX1
J+3 VMIN1
J+4 T2 (sec)2
J+6 Dt1
1 V
MAX, VMIN, Dt and R are in per unit on generator MVA base.
2 T /T = high-pressure fraction.
2 3
3 T = reheater time constant.
3
STATEs # Description
K Valve opening
K+1 Turbine power
VARs # Description
L Reference
VMAX
+ 1 1 1 + T2s +
Reference
VAR(L) PMECH
R 1 + T1s 1 + T3s
VMIN
Dt
SPEED
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7-63
Turbine-Governor Models PSSE 34
TGOV2 PSSE Model Library
7.23 TGOV2
Steam Turbine-Governor With Fast Valving
STATEs # Description
K Throttle
K+1 Reheat pressure
K+2 Reheat power
K+3 Intercept valve position, V
VARs # Description
L Speed reference
L+1 Fast valving initial time, TI
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7-64
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV2
K
VMAX
+
+ 1 1 1-K v +
Reference PMECH
VAR(L) R 1 + T1s 1 + T3s 1 + Tts
VMIN
Dt
SPEED
TC
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7-65
Turbine-Governor Models PSSE 34
TGOV3 PSSE Model Library
7.24 TGOV3
Modified IEEE Type 1 Speed-Governing Model With Fast Valving
J+7 PMIN
J+8 T4 (sec)
J+9 K1
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7-66
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV3
STATEs # Description
K First governor integrator
K+1 Governor output
K+2 First turbine integrator
K+3 Second turbine integrator
K+4 Third turbine integrator
K+5 Intercept valve position, v
VARs # Description
L Reference
L+1 Fast valving initial time, TI
Govenor gain K = 1/R, PMAX and PMIN are in pu on generator MVA base.
IBUS, TGOV3, ID, CON(J) to CON(J+17) /
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-67
TGOV3
+ + PMECH
+ +
Turbine-Governor Models
Po K1 PRMAX K2 K3
+ Uo PMAX
0.8
K(1 + sT2) 1 1 1 + 1 1
Flow
SPEED V
(1 + sT1) T3 S 1 + sT4 T5s 1 + sT6
0 0.3
Uc PMIN Intercept Valve
Position
7-68
TC
TI [VAR(L+1)]: TIME to initiate fast valving. TB
TA [CON(J+8)]: Intercept valve, v, fully closed TA
seconds after fast valving initiation. TA
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV4
7.25 TGOV4
Modified IEEE Type 1 Speed-Governing Model With PLU and EVA
J+4 Uo
J+5 Uc (< 0)
J+6 KCAL
J+7 T4 (sec)
J+8 K1
J+9 T5 (> 0) (sec)
J+10 K2
J+11 T6 (sec)
J+12 PRMAX
J+13 KP
J+14 KI
J+15 TFuel (sec)
J+16 TFD1 (sec)
J+17 TFD2 (sec)
J+18 Kb
J+19 Cb (> 0) (sec)
J+20 TIV (> 0) (sec)
J+21 UOIV
J+22 UCIV
J+23 R (>0)
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7-69
Turbine-Governor Models PSSE 34
TGOV4 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-70
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV4
STATEs # Description
K CV speed controller integrator
K+1 CV #1 valve position
K+2 CV #2 valve position
K+3 CV #3 valve position
K+4 CV #4 valve position
K+5 HP steam flow ( m SHP )
VARs # Description
L Load reference
L+1 Boiler pressure reference
L+2 IV load reference
L+3 Boiler pressure
L+4 CV flow area
L+5 IV flow area
L+6 KCV
L+7 KIV
L+8 CV position demand characteristic, K
L+9 CV position demand characteristic, A
L+10 IV position demand characteristic, K
L+11 IV position demand characteristic, A
L+12 CV valve characteristic, K
L+13 CV valve characteristic, A
L+14 IV valve characteristic, K
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Turbine-Governor Models PSSE 34
TGOV4 PSSE Model Library
VARs # Description
L+15 IV valve characteristic, A
L+16 Generator current (pu on machine base)
L+17 PLU rate output signal
L+18 Time when TIMER initialized
L+19 PLU unbalance signal
L+20 EVA unbalance signal
L+21 EVA rate output signal
L+22 Time of CV signal to close
L+23 Time of IV signal to close
L+24 Time when CVs closed
L+25 Time when IVs closed
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7-72
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV4
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-73
Turbine-Governor Models PSSE 34
TGOV5 PSSE Model Library
7.26 TGOV5
IEEE Type 1 Speed-Governing Model Modified to Include Boiler Controls
J+7 VMIN
J+8 T4 (sec)
J+9 K1
J+10 K2
J+11 T5 (sec)
J+12 K3
J+13 K4
J+14 T6 (sec)
J+15 K5
J+16 K6
J+17 T7 (sec)
J+18 K7
J+19 K8
J+20 K9
J+21 K10
J+22 K11
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7-74
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV5
J+25 K14
J+26 RMAX
J+27 RMIN
J+28 LMAX
J+29 LMIN
J+30 C1
J+31 C2
J+32 C3
J+33 B
J+34 CB (>0) (sec)
J+35 KI
J+36 TI (sec)
J+37 TR (sec)
J+38 TR1 (sec)
J+39 CMAX
J+40 CMIN
J+41 TD (sec)
J+42 TF (sec)
J+43 TW (sec)
J+44 Psp (initial) (>0)
J+45 TMW (sec)
J+46 KL (0.0 or 1.0)
J+47 KMW (0.0 or 1.0)
J+48 PE (pu pressure)
STATEs # Description
K First governor integrator
K+1 Valve area
K+2
First turbine integrator, m s
K+3 Second turbine integrator
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7-75
Turbine-Governor Models PSSE 34
TGOV5 PSSE Model Library
STATEs # Description
K+4 Third turbine integrator
K+5 Fourth turbine integrator
K+6 Po
K+7 Drum pressure, PD
K+8 First controller integrator
K+9 Second controller integrator
K+10 Fuel
K+11 Water walls
K+12 First delay integrator
K+13 Second delay integrator
K+14 Third delay integrator
K+14 Fourth delay integrator
K+16 Measured MW
VARs # Description
L Internal memory
L+1 Pressure setpoint, Psp
L+2 MW demand
L+3 Pressure error, PE
L+4 Throttle pressure, PT
L+5 C2 VAR
L+6 C3 VAR
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7-76
PSSE 34 Turbine-Governor Models
PSSE Model Library TGOV5
+ + + PMECHHP
PM1
+ + +
K1 K3 K5 K7
VMAX
Uo
K(1 + sT )
2 1 1 1 ms 1 1 1
x
SPEEDHP 1 + sT1 T3 S 1 + sT4 1 + sT5 1 + sT6 1 + sT7
+ Uc
Po VMIN PT K2 K4 K6 K8
+ + +
PELEC + PMECHLP
+ +
f
PM2
KMW
B 1 + sTMW LMAX
RMAX
+ + + 1 Po
K14
MW Desired S
Demand MW RMIN
C2 + x LMIN
K13 +
PE KL
K12 (Pressure Error)
+
Dead Band
m
PSP s
x
PE
+ PE x
Po
C3
PSP x
CMAX
Controller +
KI(1 + sTI) (1 + sTR)
PT
s(1 + sTR1) PE
CMAX
PD + K9 + C
1
1
CBs
Fuel Dynamics
+ e-sTD +
m s
(1 + sTF) (1 + sTW)
+
+
K11 K10
Desired MW
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7-77
Turbine-Governor Models PSSE 34
TURCZT PSSE Model Library
7.27 TURCZT
Czech Hydro and Steam Governor
J+5 KP (pu)
J+6 SDEAD (pu)
J+7 KSTAT (pu)
J+8 KHP (pu)
J+9 TC (sec)
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7-78
PSSE 34 Turbine-Governor Models
PSSE Model Library TURCZT
STATEs # Description
K Transducer
K+1 PI regulator
K+2 Hydro converter
K+3 Regulation valves
K+4 Hydro unit/HP part
K+5 Reheater
VARs # Description
L NTREF
L+1 dFREF
L+2 YREG
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7-79
Turbine-Governor Models PSSE 34
TURCZT PSSE Model Library
Frequency Bias
Power Regulator
fMAX
+
BSFREQ fDEAD KKOR KP
fMIN Hydro Converter
+
1 +
dFREF NTREF + NTMAX YREG
1 + sTEHP
+
1
SBASE 1
PELEC KM sTI
MBASE 1 + sTC
sDEAD KSTAT
SPEED
Governor
Turbine
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-80
PSSE 34 Turbine-Governor Models
PSSE Model Library TWDM1T
7.28 TWDM1T
Tail Water Depression Hydro Governor Model 1
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7-81
Turbine-Governor Models PSSE 34
TWDM1T PSSE Model Library
STATEs # Description
K e, filter output
K+1 e, filter output
K+2 c, desired Gate
K+3 g, gate opening
K+4 q, turbine flow
K+5 GMAX state
VARs # Description
L NREF, speed reference
L+1 h, turbine head
L+2 Internal memory
L+3 Internal memory
L+4 Measured frequency rate
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-82
PSSE 34 Turbine-Governor Models
PSSE Model Library TWDM1T
+ 1 1 1 1
NREF 1 + Trs
1 + Tfs e rTr s c 1 + Tgs g
+
SPEED VELM CLOSE GATE MIN
+
1 + +
X X At 1.0 PMECH
h TWs q
+
q 0
1 qNL
Dturb
SPEED
Tail Water Depression Model 1
f < F2
Trip Tail
1 Water
FREQ sf < sF2 TF2 LATCH Depression
1 + sTft f
Measured Frequency
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7-83
Turbine-Governor Models PSSE 34
TWDM2T PSSE Model Library
7.29 TWDM2T
Tail Water Depression Hydro Governor Model 2
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7-84
PSSE 34 Turbine-Governor Models
PSSE Model Library TWDM2T
STATEs # Description
K Measured electrical power deviation
K+1 PID controller
K+2 First lag
K+3 Second lag
K+4 Rate
K+5 Rate
K+6 q, turbine flow
K+7 Measured frequency
VARs # Description
L PREF, electrical power reference
L+1 h, turbine head
L+2 Internal memory
L+3 Internal memory
L+4 Measured frequency rate
IBUS, TWDM2T, ID, ICON (M) and ICON (M+1), CON(J) to CON(J+21) /
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7-85
Turbine-Governor Models PSSE 34
TWDM2T PSSE Model Library
PREF
+
PELECT
KP
Reg
1 + sTREG
TWD Lock MAX VELMX GATMX
+ +
KI + 1 1 1
W LOGIC
SPEED s (1 + TAs)2 1 + TBs s
+
Two
TWD Lock MIN Trip VELMN GATMN
sKD
1 + +
X X At 1.0 PMECH
h TWs q
+
q 1 qNL 0
f < F2
Trip Tail
1 Water
FREQ sf < sF2 TF2 LATCH Depression
1 + sTft f
Measured Frequency
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7-86
PSSE 34 Turbine-Governor Models
PSSE Model Library URCSCT
7.30 URCSCT
Combined Cycle on Single Shaft
Note: CON(J+37) and CON(J+38) of the URCST model (which are PMAX and PMIN values corre-
sponding to the IEEEG1 model) are the pu on steam turbine MW rating specified in CON(J+51).
STATEs # Description
K
Refer to model GAST2A STATEs
K+12
K+13
Refer to model IEEEG1 STATEs
K+18
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7-87
Turbine-Governor Models PSSE 34
URCSCT PSSE Model Library
VARs # Description
L
Refer to model GAST2A VARs
L+3
L+4
Refer to model IEEEG1 VARs
L+5
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7-88
PSSE 34 Turbine-Governor Models
PSSE Model Library URGS3T
7.31 URGS3T
WECC Gas Turbine Model
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7-89
Turbine-Governor Models PSSE 34
URGS3T PSSE Model Library
J+31 T5
J+32 MWCAP
STATEs # Description
K Governor output
K+1 Engine output
K+2 Exhaust temperature delay
K+3 Load limit
K+4 Governor lead/lag
VARs # Description
L Reference
L+1 Deadband, In
L+2 Deadband, Out
L+3 Deadband2, In
L+4 Deadband2, Out
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7-90
PSSE 34
1
----------------------
PSSE Model Library
1 + sT
ltr
If (Dv > Linc), then Rlim = Ltrat +
else, Rlim = Rmax Dv
Vmax
Rlim
PGV
+ err Ka ( 1 + sT ) LV + 1 + 1 + asT + +
Pref 4 --------- 2
------------------------------- sT ---------------------- Pmech
db1 1 + sT Gate 1 1 + bsT db2
5 2
GV
7-91
Fidle
Vmin
1 + + 1
---- Fidle Kt -------------------
R 1 + sT
3
+
Lmax
Speed Dturb
Turbine-Governor Models
URGS3T
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
Turbine-Governor Models PSSE 34
WEHGOV PSSE Model Library
7.32 WEHGOV
Woodward Electric Hydro Governor Model
J R-PERM-GATE1
J+1 R-PERM-PE1
J+2 TPE (sec)
J+3 Kp
J+4 KI
J+5 KD
J+6 TD (sec)
J+7 TP (sec)
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7-92
PSSE 34 Turbine-Governor Models
PSSE Model Library WEHGOV
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-93
STATEs # Description
K Pilot valve position
K+1 Distribution valve position
K+2 Gate position
K+3 Turbine flow
K+4 Derivative controller
K+5 Integral controller
K+6 PE transducer output
VARs # Description
L Reference
L+1 Turbine head
L+2 Controller output
L+3 Gate position
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7-94
PSSE 34 Turbine-Governor Models
PSSE Model Library WEHGOV
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-95
Turbine-Governor Models PSSE 34
WEHGOV PSSE Model Library
PMECH
DTURB
+
g
X
Pmss
Flow
Pmss
Turbine Flow
Turbine Dynamics
STATE(K+3)
Turbine Flow, q
h = VAR(L+1)
Turbine Head,
Tws
1
qss
+
Steady-State
Flow, qss
Ho = 1
Gate
Flow
Position, g
Gate
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7-96
PSSE 34 Turbine-Governor Models
PSSE Model Library WESGOV
7.33 WESGOV
Westinghouse Digital Governor for Gas Turbine
J+6 T2 (sec)
J+7 ALIM
J+8 Tpe (sec)
STATEs # Description
K PE transducer
K+1 Valve position
K+2 PMECH
VARs # Description
L References
L+1 PI output
L+2 Integration for PI
L+3 Integration for PI
L+4 PE transducer output
L+5 Speed measurement
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-97
Turbine-Governor Models PSSE 34
WESGOV PSSE Model Library
*
Speed KP +
Reference + 1
(1 + T1s) (1 + T2s)
PMECH
1 +
1 ** Droop
PELEC sTI
1 + sTpe
Digital Control***
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-98
PSSE 34 Turbine-Governor Models
PSSE Model Library WPIDHY
7.34 WPIDHY
Woodward PID Hydro Governor
J+1 REG1
J+2 KP
J+3 KI
J+4 KD
J+5 TA (>0) (sec)
J+19 P2
J+20 P3
1 REG has to be input as a negative value because the input to
REG block is PELEC - PREF instead of PREF - PELEC.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-99
Turbine-Governor Models PSSE 34
WPIDHY PSSE Model Library
STATEs # Description
K Measured electrical power deviation
K+1 PID controller
K+2 First lag
K+3 Second lag
K+4 Rate
K+5 Gate
K+6 Mechanical power
VAR # Description
L Electrical power reference
(1, P3)
(MBASE)
(G2, P2)
(G1, P1)
PREF
+
PELEC
REG
1 + sTREG
KP
PMECH
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7-100
PSSE 34 Turbine-Governor Models
PSSE Model Library WSHYDD
7.35 WSHYDD
WECC Double-Derivative Hydro Governor
J+6 KP
J+7 R
J+8 Tt
J+9 KG
J+10 TP (sec)
J+11 VELOPEN (>0)
J+12 VELCLOSE (>0)
J+13 PMAX
J+14 PMIN
J+15 db2
J+16 GV1
J+17 PGV1
J+18 GV2
J+19 PGV2
J+20 GV3
J+21 PGV3
J+22 GV4
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-101
Turbine-Governor Models PSSE 34
WSHYDD PSSE Model Library
STATEs # Description
K Output, Td
K+1 K1 state
K+2 KD first
K+3 KD second
K+4 CV
K+5 Valve speed
K+6 Gate position
K+7 Generator power
K+8 Turbine
VARs # Description
L Reference
L+1 Deadband1 In
L+2 Deadband1 Out
L+3 PMAX
L+4 PMIN
L+5 Deadband2 In
L+6 Deadband2 Out
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7-102
PSSE 34 Turbine-Governor Models
PSSE Model Library WSHYDD
REF
+ +
err 1 sK
SW -------------------- 1 + K
1 + sT
----------------- ------P-
db1 D 1 + sT f S
(Speed)
+
Tt = 0
2
s KD 1 PE
-------------------------
- R -----------------
2 1 + sT PELEC
( 1 + sT ) t
f SW
(Tt > 0)
VELOPEN PMAX
VELCLOSE PMIN
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-103
Turbine-Governor Models PSSE 34
WSHYGP PSSE Model Library
7.36 WSHYGP
WECC GP Hydro Governor Plus Turbine
J+14 PMIN
J+15 db2
J+16 GV1
J+17 PGV1
J+18 GV2
J+19 PGV2
J+20 GV3
J+21 PGV3
J+22 GV4
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7-104
PSSE 34 Turbine-Governor Models
PSSE Model Library WSHYGP
J+25 PGV5
J+26 Aturb
J+27 Bturb (> 0)
J+28 Tturb (sec)
J+29 Trate
STATEs # Description
K Output, Td
K+1 Integrator state
K+2 Derivative state
K+3 Valve speed
K+4 Gate position
K+5 Generator power
K+6 Turbine
VARs # Description
L Reference
L+1 Deadband1 In
L+2 Deadband1 Out
L+3 PMAX
L+4 PMIN
L+5 Deadband2 In
L+6 Deadband2 Out
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-105
Turbine-Governor Models PSSE 34
WSHYGP PSSE Model Library
KP
PREF
+ +
SW
err 1 K + CV
(Speed) ------------------
-----I-
db1 1 + sT d
S
+
(Tt = 0)
sK D
-----------------
1 + sT f
1 PE
R -----------------
1 + sT PELEC
t
(Tt > 0)
VELOPEN PMAX
+ K 1
GVdes GV PGV 1 + s A turb T turb T PM
G -
------------------ --- ---------------------------------------------- rate
1+sB T --------------
1 + sT
P
S db2 NGV turb turb MVA PMECH
VELCLOSE PMIN
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-106
PSSE 34 Turbine-Governor Models
PSSE Model Library WSIEG1
7.37 WSIEG1
WECC Modified IEEE Type 1 Speed-Governing Model
J+6 PMAX
J+7 PMIN
J+8 T4 (sec)
J+9 K1
J+10 K2
J+11 T5 (sec)
J+12 K3
J+13 K4
J+14 T6 (sec)
J+15 K5
J+16 K6
J+17 T7 (sec)
J+18 K7
J+19 K8
J+20 db1
J+21 err
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7-107
Turbine-Governor Models PSSE 34
WSIEG1 PSSE Model Library
J+26 PGV2
J+27 GV3
J+28 PGV3
J+29 GV4
J+30 PGV4
J+31 GV5
J+32 PGV5
J+33 IBLOCK
STATEs # Description
K 1st governor integrator
K+1 Governor output
K+2 1st turbine integrator
K+3 2nd turbine integrator
K+4 3rd turbine integrator
K+5 4th turbine integrator
VARs # Description
L Reference
L+1 Internal memory
L+2 Deadband1 in
L+3 Deadband1 out
L+4 PMAX
L+5 PMIN
L+6 Deadband2 in
L+7 Deadband2 out
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7-108
PSSE 34 Turbine-Governor Models
PSSE Model Library WSIEG1
At initialization:
GV0
PMAX
+ Uo
err 1 + sT2 1 1 GV PGV
K
db1 1 + sT1 T3 S GVdes db2 NGV
CV
Uc
PMIN
+ + +
PMECHHP
PM1
+ + +
K1 K3 K5 K7
1 1 1 1
1 + sT5
1 + sT4 1 + sT6 1 + sT7
K2 K4 K6 K8
+ + +
+ + +
PMECHLP
PM2
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-109
Turbine-Governor Models PSSE 34
WSIEG1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
7-110
Chapter 8
Turbine Load Controller Models
This chapter contains a collection of data sheets for the turbine-load controller models contained in
Chapter 8 - Turbine Load Controller Models
Model Description
LCFB1 Turbine load controller model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
8-1
Turbine Load Controller Models PSSE 34
LCFB1 PSSE Model Library
8.1 LCFB1
Turbine Load Controller Model
PELEC
This model uses CONs starting with #_______ J,
reference
and STATEs starting with #_______ K, LCFB1
SPEED
and VARs starting with #_______ L,
#_______
and ICONs starting with M.
STATEs # Description
K Measured power
K+1 Integrator
VARs # Description
L Deadband input
L+1 Deadband output
L+2 Pref 0
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
8-2
PSSE 34 Turbine Load Controller Models
PSSE Model Library LCFB1
This model can be used with the following turbine governor models.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
8-3
Turbine Load Controller Models PSSE 34
LCFB1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
8-4
Chapter 9
Load Characteristic Models
This chapter contains a collection of data sheets for the load characteristic models contained in the
Chapter 9 - Load Characteristic Models
Model Description
ACMTBLU1, ACMTOWU1, ACMTZNU1, User written performance based model of
ACMTARU1, ACMTALU1 single phase air conditioner motor.
CIM5BL, CIM5OW, CIM5ZN, CIM5AR, CIM5AL Induction motor model.
CIM6BL, CIM6OW, CIM6ZN, CIM6AR, CIM6AL Induction motor model.
CIMWBL, CIMWOW, CIMWZN, CIMWAR, CIMWAL Induction motor model (WECC).
CLODBL, CLODOW, CLODZN, CLODAR, CLODAL Complex load model.
CMLDBLU1, CMLDOWU1, CMLDZNU1,
User-written composite load model
CMLDARU1, CMLDALU1
EXTLBL, EXTLOW, EXTLZN, EXTLAR, EXTLAL Extended-term load reset model.
IEELBL, IEELOW, IEELZN, IEELAR, IEELAL IEEE load model.
LDFRBL, LDFROW, LDFRZN, LDFRAR, LDFRAL Load frequency model.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-1
Load Characteristic Models PSSE 34
ACMTBLU1, ACMTOWU1, ACMTZNU1, ACMTARU1, ACMTALU1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-2
PSSE 34 Load Characteristic Models
PSSE Model Library ACMTBLU1, ACMTOWU1, ACMTZNU1, ACMTARU1, ACMTALU1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-3
Load Characteristic Models PSSE 34
ACMTBLU1, ACMTOWU1, ACMTZNU1, ACMTARU1, ACMTALU1 PSSE Model Library
4 The motor run state is characterized by an exponential characteristic. The run characteristic
is divided into two states as a function of bus voltage, State 1 for Bus voltage Vbrk, and State
2 for Vstall < Bus Voltage < Vbrk.
State 0, corresponds to 1.0 p.u. Bus voltage
P0=1-Kp1*(1-Vbrk)**Np1
Q0=((1-CompPF**2)/CompPF)-Kq1*(1-Vbrk)**Nq1
State 1 for Bus voltage Vbrk
P=P0+Kp1*(V-Vbrk)**Np1
Q=Q0+Kq1*(V-Vbrk)**Nq1
State 2 for Vstall < Bus Voltage < Vbrk
P=P0+Kp2*(Vbrk-V)**Np2
Q=Q0+Kq2*(Vbrk-V)**Nq2
5 See Compressor Unit Model Structure, below.
Motor A once stalled remains stalled.
Motor B can restart if the voltage recovers above Vrst level.
Frst is the fraction of motors that are capable of restart.
6 Frequency dependency of the load is defined by following characteristics:
P(f)=P*(1+CmpKpf*f)
Q(f)=Q*(1+CmpKqf*f/(1-CompPF**2))
7 See Thermal Relay Model, below.
Thermal relay is modelled by the following characteristics:
If Th2t is equal to zero or if Th1t is greater than or equal to Th2t, all motors are tripped
instantaneously when temperature reaches Th1t.
STATEs # Description
K Bus Voltage (pu)
K+1 Bus Frequency (pu)
K+2 Compressor Motor A Temperature
K+3 Compressor Motor B Temperature
K+4 U/V Relay Timer 1
K+5 U/V Relay Timer 2
K+6 Motor A Stall Timer
K+7 Motor B Stall Timer
K+8 Motor B Restart Timer
VARs # Description
L Bus Voltage (pu)
L+1 Bus Frequency (pu)
L+2 Aggregated AC unit real power (MW)
L+3 Aggregated AC unit reactive power (MVAr)
L+4 Aggregated AC unit current (pu on system MVA base)
Terminal current component in phase with voltage (in pu on Motor MVA
L+5
Base)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-4
PSSE 34 Load Characteristic Models
PSSE Model Library ACMTBLU1, ACMTOWU1, ACMTZNU1, ACMTARU1, ACMTALU1
VARs # Description
L+6 Terminal current component lagging voltage (in pu on Motor MVA Base)
L+7 Terminal current comp on network real axis on system MVA base (pu)
L+8 Terminal current comp on network imag axis on system MVA base (pu)
L+9 Motor A and B Initial Temperature
L+10 Fraction of motors not tripped by U/V Relay - gain Kuv
Reserved
Value Description
ICONs
Motor A Run/Stall Status, Run=1,
N
Stall=0
Motor B Run, Restart, Stall Status,
N+1
Run=1, Restart=2, Stall=0
Under Voltage Relay Trip Status, Non-
N+2
Trip=1, Trip=0
Under Voltage Relay First Pick Up
N+3
Flag, Becomes 0 on Pick Up
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-5
Load Characteristic Models PSSE 34
ACMTBLU1, ACMTOWU1, ACMTZNU1, ACMTARU1, ACMTALU1 PSSE Model Library
Reserved
Value Description
ICONs
Under Voltage Relay Second Pick Up
N+4
Flag, Becomes 0 on Pick Up
Thermal Relay Trip 1 Status for Motor
N+5
A, Non-trip=1. Trip=0
Thermal Relay Trip 2 Status for Motor
N+6
A, Non-trip=1. Trip=0
Thermal Relay Trip 1 Status for Motor
N+7
B, Non-trip=1. Trip=0
Thermal Relay Trip 2 Status for Motor
N+8
B, Non-trip=1. Trip=0
Contactors Started to Drop Out Flag,
N+9 Not Started to Drop Out=1, Started to
Drop Out=0
All Contactors Dropped out Flag, All
N+10
Not Dropped Out=1, All Dropped Out=0
Contactors Started to Reclose Flag,
N+11 Not Started to Reclose=1, Started to
Reclose=0
All Contactors Reclosed Flag, All Not
N+12
Reclosed=1, All Reclosed=0
Motor A Stall Relay Pick Up Flag,
N+13
Becomes 0 on Pick Up
Motor B Stall Relay Pick Up Flag,
N+14
Becomes 0 on Pick Up
Motor B Restart Relay Pick Up Flag,
N+15
Becomes 0 on Pick Up
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-6
PSSE 34 Load Characteristic Models
PSSE Model Library ACMTBLU1, ACMTOWU1, ACMTZNU1, ACMTARU1, ACMTALU1
Real Power
6
4 S TALL
Real Power (per uni t)
STALL RUN
1
0
0 0.2 0. 4 0.6 0. 8 1 1.2
V oltage (per unit)
Reacti ve Power
6
5
Reactive Power (per unit)
4 STALL
STA LL
1
RUN
0
0 0. 2 0.4 0.6 0.8 1 1.2
Voltage (per unit)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-7
Load Characteristic Models PSSE 34
ACMTBLU1, ACMTOWU1, ACMTZNU1, ACMTARU1, ACMTALU1 PSSE Model Library
[1] AC Unit Model specifications", WECC Load Modeling task Force, April 2008
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-8
PSSE 34 Load Characteristic Models
PSSE Model Library CIM5BL, CIM5OW, CIM5ZN, CIM5AR, CIM5AL
J+2 Xm > 0
J+3 R1 > 0
J+4 X1 > 0
J+10 S(E2)
J+11 MBASE2
J+12 PMULT
J+13 H (inertia, per unit motor base)
J+14 VI (pu)3
J+15 TI (cycles)4
J+16 TB (cycles)
J+17 D (load damping factor)
Tnom, Load torque at 1 pu speed
J+18
(used for motor starting only) ( 0)
1 To model single cage motor: set R = X = 0.
2 2
2 When MBASE = 0, motor MVA base = PMULT x MW load. When
MBASE > 0, motor MVA base = MBASE.
3 V is the per unit voltage level below which the relay to trip the
I
motor will begin timing. To disable relay, set VI = 0.
4 T is the time in cycles for which the voltage must remain below
I
the threshold for the relay to trip. TB is the breaker delay time
cycles.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-9
Load Characteristic Models PSSE 34
CIM5BL, CIM5OW, CIM5ZN, CIM5AR, CIM5AL PSSE Model Library
K+2 Eq
K+3 Ed
K+4 speed (pu)
K+5 Angle deviation
Reserved
Value Description
ICONs
N Relay action code
N+1 Relay trip flag
N+2 Breaker action code
N+3 Breaker trip flag
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-10
PSSE 34 Load Characteristic Models
PSSE Model Library CIM5BL, CIM5OW, CIM5ZN, CIM5AR, CIM5AL
LID is an explicit load identifier or may be for application to loads of any ID associated with the
subsystem type.
Type 1 Type 2
RA + jXA RA + jXA jX1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-11
Load Characteristic Models PSSE 34
CIM6BL, CIM6OW, CIM6ZN, CIM6AR, CIM6AL PSSE Model Library
J+8 S(E1)
J+9 E2
J+10 S(E2)
J+11 MBASE2
J+12 PMULT
J+13 H (inertia, per unit motor base)
J+14 VI (pu)3
J+15 TI (cycles)4
J+16 TB (cycles)
J+17 A
J+18 B
J+19 D
J+20 E
J+21 C0
Tnom, Load torque at 1 pu speed (used
J+22
for motor starting only) ( 0)
1 To model single cage motor: set R = X = 0.
2 2
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-12
PSSE 34 Load Characteristic Models
PSSE Model Library CIM6BL, CIM6OW, CIM6ZN, CIM6AR, CIM6AL
L+6 ID
L+7 Motor current (pu motor base)
L+8 Relay trip time
L+9 Breaker trip time
L+10 MVA rating
L+11 TL (pu load torque)
1 Load torque, T = T (A2 +B + C + DE)
L o
2 For motor starting, T=T
nom is specified by the user in CON (J+22).
For motor online studies, T=To is calculated in the code during
initialization and stored in VAR (L+4).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-13
Load Characteristic Models PSSE 34
CIM6BL, CIM6OW, CIM6ZN, CIM6AR, CIM6AL PSSE Model Library
Reserved
Value Description
ICONs
N Relay action code
N+1 Relay trip flag
N+2 Breaker action code
N+3 Breaker trip flag
Type 1 Type 2
RA + jXA RA + jXA jX1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-14
PSSE 34 Load Characteristic Models
PSSE Model Library CIMWBL, CIMWOW, CIMWZN, CIMWAR, CIMWAL
J+2 Xm > 0
J+3 R1 > 0
J+4 X1 > 0
J+10 S(E2)
J+11 MBASE2
J+12 PMULT
J+13 H (inertia, per unit motor base)
J+14 VI (pu)3
J+15 TI (cycles)4
J+16 TB (cycles)
J+17 A
J+18 B
J+19 D
J+20 E
1 To model single cage motor: set R = X = 0.
2 2
2 When MBASE = 0, motor MVA base = PMULT x MW load. When
MBASE > 0, motor MVA base = MBASE.
3 V is the per unit voltage level below which the relay to trip the
I
motor will begin timing. To disable relay, set VI = 0.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-15
Load Characteristic Models PSSE 34
CIMWBL, CIMWOW, CIMWZN, CIMWAR, CIMWAL PSSE Model Library
4 T is the time in cycles for which the voltage must remain below the
I
threshold for the relay to trip. TB is the breaker delay time cycles.
L+5 IQ
L+6 ID
L+7 Motor current (pu motor base)
L+8 Relay trip time
L+9 Breaker trip time
L+10 MVA rating
L+11 Co
1 Load torque T = T (A2 +B + C + DE)
L o o
where Co = 1 - Ao2 - Bo - DoE.
2 This model cannot be used for motor starting studies. T is calculated
o
in the code during initialization and stored in VAR (L+4).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-16
PSSE 34 Load Characteristic Models
PSSE Model Library CIMWBL, CIMWOW, CIMWZN, CIMWAR, CIMWAL
Reserved
Value Description
ICONs
N Relay action code
N+1 Relay trip flag
N+2 Breaker action code
N+3 Breaker trip flag
Type 1 Type 2
RA + jXA RA + jXA jX1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-17
Load Characteristic Models PSSE 34
CLODBL, CLODOW, CLODZN, CLODAR, CLODAL PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-18
PSSE 34 Load Characteristic Models
PSSE Model Library CLODBL, CLODOW, CLODZN, CLODAR, CLODAL
Reserved
Value Description
ICON
N Service status memory
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-19
Load Characteristic Models PSSE 34
CLODBL, CLODOW, CLODZN, CLODAR, CLODAL PSSE Model Library
P + jQ
Tap
R + jX
----------------
Po
Po = Load MW in pu on system base
K
I I Constant P = P RO V P
M M
V
MVA Q = Q RO V 2
V
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-20
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
J
Load MVA base1
J+1
Substation shunt B (pu on Load
MVA base)
J+2
Rfdr - Feeder R (pu on Load MVA
base)
Xfdr - Feeder X (pu on Load MVA
J+3
base)2
J+4
Fb - Fraction of Feeder
Compensation at substation end
Xxf - Transformer Reactance - pu
J+5
on load MVA base3
J+6
Tfixhs - High side fixed transformer
tap
J+7
Tfixls - Low side fixed transformer
tap
J+8 LTC - LTC flag (1 active, 0 inactive)
J+9 Tmin - LTC min tap (on low side)
J+10 Tmax - LTC max tap (on low side)
J+11 Step - LTC Tstep (on low side)
J+12 Vmin - LTC Vmin tap (low side pu)
J+13 Vmax - LTC Vmax tap (low side pu)
J+14 TD - LTC Control time delay (sec)
J+15
TC - LTC Tap adjustment time
delay (sec)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-21
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
J+16
Rcmp - LTC Rcomp (pu on load
MVA base)
J+17
Xcmp - LTC Xcomp (pu on load
MVA base)
J+18 FmA - Motor A Fraction
J+19 FmB - Motor B Fraction
J+20 FmC - Motor C Fraction
J+21 FmD - Motor D Fraction
J+22 Fel - Electronic Load Fraction4
J+23 PFel - PF of Electronic Loads
J+24
Vd1 - Voltage at which elect. loads
start to drop
J+25
Vd2 - Voltage at which all elect.load
have dropped
J+26 PFs - Static Load Power Factor
J+27
P1e - P1 exponent5
J+28 P1c - P1 coefficient
J+29 P2e - P2 exponent
J+30 P2c - P2 coefficient
J+31 Pfrq - Frequency sensitivity
J+32 Q1e - Q1 exponent
J+33 Q1c - Q1 coefficient
J+34 Q2e - Q2 exponent
J+35 Q2c - Q2 coefficient
J+36 Qfrq - Frequency sensitivity
J+37 MtypA - Motor type6
J+38
LFmA - Loading factor (MW/MVA
rating)
J+39 RaA - Stator resistance
J+40 LsA - Synchronous reactance
J+41 LpA - Transient reactance
J+42 LppA - Sub-transient reactance
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-22
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
J+43
TpoA - Transient open circuit time
constant
J+44
TppoA - Sub-transient open circuit
time constant
J+45 HA - Inertia constant
J+46 etrqA - Torque speed exponent
J+47 Vtr1A - U/V Trip1 V (pu)
J+48 Ttr1A - U/V Trip1 Time (sec)
J+49 Ftr1A - U/V Trip1 fraction
J+50 Vrc1A - U/V Trip1 reclose V (pu)
J+51
Trc1A - U/V Trip1 reclose Time
(sec)
J+52 Vtr2A - U/V Trip2 V (pu)
J+53 Ttr2A - U/V Trip2 Time (sec)
J+54 Ftr2A - U/V Trip2 fraction
J+55 Vrc2A - U/V Trip2 reclose V (pu)
J+56
Trc2A - U/V Trip2 reclose Time
(sec)
J+57 MtypB - Motor type
J+58
LFmB - Loading factor (MW/MVA
rating)
J+59 RaB - Stator resistance
J+60 LsB - Synchronous reactance
J+61 LpB - Transient reactance
J+62 LppB - Sub-transient reactance
J+63
TpoB - Transient open circuit time
constant
J+64
TppoB - Sub-transient open circuit
time constant
J+65 HB - Inertia constant
J+66 etrqB - Torque speed exponent
J+67 Vtr1B - U/V Trip1 V (pu)
J+68 Ttr1B - U/V Trip1 Time (sec)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-23
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
J+71
Trc1B - U/V Trip1 reclose Time
(sec)
J+72 Vtr2B - U/V Trip2 V (pu)
J+73 Ttr2B - U/V Trip2 Time (sec)
J+74 Ftr2B - U/V Trip2 fraction
J+75 Vrc2B - U/V Trip2 reclose V (pu)
J+76
Trc2B - U/V Trip2 reclose Time
(sec)
J+77 MtypC - Motor type
J+78
LFmC - Loading factor (MW/MVA
rating)
J+79 RaC - Stator resistance
J+80 LsC - Synchronous reactance
J+81 LpC - Transient reactance
J+82 LppC - Sub-transient reactance
J+83
TpoC - Transient open circuit time
constant
J+84
TppoC - Sub-transient open circuit
time constant
J+85 HC - Inertia constant
J+86 etrqC - Torque speed exponent
J+87 Vtr1C - U/V Trip1 V (pu)
J+88 Ttr1C - U/V Trip1 Time (sec)
J+89 Ftr1C - U/V Trip1 fraction
J+90 Vrc1C - U/V Trip1 reclose V (pu)
J+91
Trc1C - U/V Trip1 reclose Time
(sec)
J+92 Vtr2C - U/V Trip2 V (pu)
J+93 Ttr2C - U/V Trip2 Time (sec)
J+94 Ftr2C - U/V Trip2 fraction
J+95 Vrc2C - U/V Trip2 reclose V (pu)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-24
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
J+96
Trc2C - U/V Trip2 reclose Time
(sec)
J+97 Tstall - stall delay (sec)7
J+98 Trestart - restart delay (sec)
J+99
Tv - voltage input time
constant(sec)
J+100
Tf - frequency input time
constant(sec)
CompLF - compressor load factor,
J+101
p.u. of rated power8
J+102
CompPF - compressor power factor
at 1.0 p.u. voltage
J+103
Vstall - compressor stall voltage at
base condition (p.u.)
Rstall - compressor motor res. with
J+104
1.0 p.u. current9
J+105
Xstall - compressor motor stall
reactance - unsat.
LFadj - Load factor adjustment to
J+106
the stall voltage10
Kp1 - real power constant for
J+107
running state 111
J+108
Np1 - real power exponent for
running state 1
J+109
Kq1 - reactive power constant for
running state 1
J+110
Nq1 - reactive power exponent for
running state 1
J+111
Kp2 - real power constant for
running state 2
J+112
Np2 - real power exponent for
running state 2
J+113
Kq2 - reactive power constant for
running state 2
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-25
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
J+114
Nq2 - reactive power exponent for
running state 2
J+115
Vbrk - compressor motor "break-
down" voltage (p.u.)
J+116
Frst - fraction of motors capable of
restart
J+117
Vrst - voltage at which motors can
restart (p.u.)
CmpKpf - real power constant for
J+118
freq dependency12
J+119
CmpKqf - reactive power constnt for
freq dependency
J+120
Vc1off - Voltage 1 at which
contactors start dropping out (p.u.)
J+121
Vc2off - Voltage 2 at which all
contactors drop out (p.u.)
J+122
Vc1on - Voltage 1 at which all
contactors reclose (p.u.)
J+123
Vc2on - Voltage 2 at which
contactors start reclosing (p.u.)
Tth - compressor motor heating
J+124
time constant(sec)13
J+125
Th1t - temp at which comp. motor
begin tripping
J+126
Th2t - temp at which comp. all
motors are tripped
J+127
Fuvr - fraction of comp. motors with
U/V relays
J+128 UVtr1 - 1st voltage pick-up (p.u.)
J+129
Ttr1 - 1st definite time voltage pick-
up (sec)
J+130 UVtr2 - 2nd voltage pick-up (p.u.)
J+131
Ttr2 - 2nd definite time voltage pick-
up (sec)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-26
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
4 If sum of load fractions FmA, FmB, FmC, FmD, Fel is <1, remainder
is static load;
If sum of fractions FmA, FmB, FmC, FmD, Fel is >1, fractions are
normalized to 1 and there will be no static load
10 Lfadj factor is used to update the Vstall and Vbrk as defined below:
Vstall(adj)=Vstall*(1+Lfadj*(CompLF-1))
Vbrk(adj)=Vbrk*(1+Lfadj*(CompLF-1))
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-27
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
K Motor A: E'q
K+1 Motor A: E'd
K+2 Motor A: E"q
K+3 Motor A: E"d
K+4 Motor A: speed deviation (pu)
K+5 Motor A: angle deviation
K+6 Motor B: E'q
K+7 Motor B: E'd
K+8 Motor B: E"q
K+9 Motor B: E"d
K+10 Motor B: speed deviation (pu)
K+11 Motor B: angle deviation
K+12 Motor C:: E'q
K+13 Motor C:: E'd
K+14 Motor C:: E"q
K+15 Motor C:: E"d
K+16 Motor C:: speed deviation (pu)
K+17 Motor C: angle deviation
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-28
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
K+20
Motor D: non-restartable compressor motor A
temperature
K+21
Motor D: restartable compressor motor B
temperature
K+22 Motor D: U/V relay timer 1
K+23 Motor D: U/V relay timer 2
K+24 Motor D: non-restartable motor A stall timer
K+25 Motor D: restartable Motor B stall timer
K+26 Motor D: restartable Motor B restart timer
VARs Description
L Load MVA base
L+1 Motor A fraction
L+2 Motor B fraction
L+3 Motor C fraction
L+4 Motor D: fraction
L+5 Electronic load fraction
L+6 Static load fraction
L+7 Initial value of static load real part (pu on system MVA base)
L+8 Initial value of static load reactive part (pu on system MVA base)
L+9 P3 component of static load
L+10 Q3 component of static load
L+11 Calculated substation shunt compensation (pu on system MVA base)
L+12 Transformer tap
L+13 Transformer low side voltage real part
L+14 Transformer low side voltage imaginary part
L+15 Load bus voltage real part
L+16 Load bus voltage imaginary part
L+17 Initial value of load bus voltage magnitude
L+18 Feeder resistance (pu on system MVA base)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-29
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
VARs Description
L+19 Feeder reactance (pu on system MVA base)
L+20
Sum of substation shunt admittance and feeder compensation admittance
at substation end
L+21 Substation shunt admittance
L+22 Initial value of electronic load real part (pu on system MVA base)
L+23 Initial value of electronic load reactive part (pu on system MVA base)
L+24 Transformer reactance (pu on system MVA base)
L+25 Static load real part (pu on system MVA base)
L+26 Static load reactive part (pu on system MVA base)
L+27 Electronic load real part (pu on system MVA base)
L+28 Electronic load reactive part (pu on system MVA base)
L+29 Load bus voltage magnitude
L+30 Low side bus voltage magnitude
L+31 Motor A P (pu on system MVA base)
L+32 Motor A Q (pu on system MVA base)
L+33 Motor B P (pu on system MVA base)
L+34 Motor B Q (pu on system MVA base)
L+35 Motor C P (pu on system MVA base)
L+36 Motor C Q (pu on system MVA base)
L+37 Motor D P (pu on system MVA base)
L+38 Motor D Q (pu on system MVA base)
L+39 Transformer controlled bus voltage
L+40 Initial value of feeder resistance (pu on system MVA base)
L+41 Initial value of feeder reactance (pu on system MVA base)
L+42 Composite load real before load shed (pu on system MVA base)
L+43
Real part of composite load shed in a particular stage (pu on system MVA
base)
L+44
Real part of composite load shed upto a particular stage (pu on system
MVA base)
L+45 LTC control time delay counter
L+46 Tap changer timer
L+47 Initial value of Motor A P (pu on system MVA base)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-30
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
VARs Description
L+48 Initial value of Motor A Q (pu on system MVA base)
L+49 Initial value of Motor B P (pu on system MVA base)
L+50 Initial value of Motor B Q (pu on system MVA base)
L+51 Initial value of Motor C P (pu on system MVA base)
L+52 Initial value of Motor C Q (pu on system MVA base)
L+53 Initial value of Motor D P (pu on system MVA base)
L+54 Initial value of Motor D Q (pu on system MVA base)
L+55 Feeder compensation admittance at substation end
L+56 Feeder compensation admittance at far end
L+57 Static load conductance
L+58 Static load susceptance
L+59 Spare
L+60 Spare
L+61 Real component of current injection at system load bus
L+62 Reactive component of current injection at system load bus
L+63 Initial value of Motor A MVA base
L+64 Initial value of Motor B MVA base
L+65 Initial value of Motor C MVA base
L+66 Initial value of Motor D MVA base
L+67 Initial value of feeder compensation admittance at substation end
L+68 Initial value of feeder compensation admittance at far end
L+69 Motor A: Admittance of initial condition MVAr difference
L+70 Motor A: Q
L+71 Motor A: Tele (pu on motor MVA base)
L+72 Motor A: Speed deviation
L+73 Motor A: Initial load torque (pu on motor MVA base)
L+74 Motor A: Iq
L+75 Motor A: Id
L+76 Motor A: Current (pu on motor MVA base)
L+77 Motor A: UV relay1 trip time
L+78 Motor A: UV relay2 trip time
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-31
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
VARs Description
L+79 Motor A: MVA base
L+80 Motor A: TL - Load torque (pu)
L+81 Motor A: UV relay1 reclose time
L+82 Motor A: UV relay2 reclose time
L+83 Motor A: Trip-reclose factor
L+84 Motor A: Nominal load torque
L+85 Motor B: Admittance of initial condition MVAr difference
L+86 Motor B: Q
L+87 Motor B: Tele (pu on motor MVA base)
L+88 Motor B: Speed deviation
L+89 Motor B: Initial load torque (pu on motor MVA base)
L+90 Motor B: Iq
L+91 Motor B: Id
L+92 Motor B: Current (pu on motor MVA base)
L+93 Motor B: UV relay1 trip time
L+94 Motor B: UV relay2 trip time
L+95 Motor B: MVA base
L+96 Motor B: TL - Load torque (pu)
L+97 Motor B: UV relay1 reclose time
L+98 Motor B: UV relay2 reclose time
L+99 Motor B: Trip-reclose factor
L+100 Motor B: Nominal load torque
L+101 Motor C: Admittance of initial condition MVAr difference
L+102 Motor C: Q
L+103 Motor C: Tele (pu on motor MVA base)
L+104 Motor C: Speed deviation
L+105 Motor C: Initial load torque (pu on motor MVA base)
L+106 Motor C: Iq
L+107 Motor C: Id
L+108 Motor C: Current (pu on motor MVA base)
L+109 Motor C: UV relay1 trip time
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-32
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
VARs Description
L+110 Motor C: UV relay2 trip time
L+111 Motor C: MVA base
L+112 Motor C: TL - Load torque (pu)
L+113 Motor C: UV relay1 reclose time
L+114 Motor C: UV relay2 reclose time
L+115 Motor C: Trip-reclose factor
L+116 Motor C: Nominal load torque
L+117 Motor D: Bus voltage (pu)
L+118 Motor D: Bus frequency (pu)
L+119 Motor D: Aggregated AC unit real power (MW)
L+120 Motor D: Aggregated AC unit reactive power (MVAr)
L+121 Motor D: Aggregated AC unit current (pu on system MVA base)
L+122
Motor D: Terminal current component in phase with voltage (in pu on
motor MVA base)
L+123
Motor D: Terminal current component lagging voltage (in pu on motor
MVA base)
L+124
Motor D: Terminal current component on network real axis on system
MVA base (pu)
L+125
Motor D: Terminal current comp on network imaginary axis on system
MVA base (pu)
L+126
Motor D: non-restartable motor A and restartable motor B Initial
Temperature
L+127 Motor D: Fraction of motors not tripped by U/V relay - gain Kuv
L+128 Motor D: Fraction of motors not tripped by contactors - gain Kcon
L+129 Motor D: Contactor status for compressor voltage calculation 0=off, 1=on
L+130 Motor D: Input voltage from a previous step (pu)
L+131
Motor D: KthA non-restartable compressor motor A fraction not tripped by
thermal protection
L+132
Motor D: Shunt admittance (in pu on motor MVA base), computed during
the initialization
L+133 Motor D: non-restartable Motor A run / stall state (run=1/stall=0)
L+134 Motor D: restartable Motor B run / stall state (run=1/stall=0)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-33
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
VARs Description
L+135
Motor D: KthB restartable compressor motor B fraction not tripped by
thermal protection
L+136
Motor D: Internal variable used for determining non-restartable motor A
temperature
L+137
Motor D: Internal variable used for determining restartable motor B
temperature
L+138 Motor D: Real component of voltage at pervious time step (pu)
L+139 Motor D: Reactive component of voltage at previous time step (pu)
L+140 Motor D: Time instant at which the model was called previous time
L+141 Motor D: Internal variable, P0 for active power at 1.0 pu voltage4
L+142 Motor D: Internal variable, Q0 for reactive power at 1.0 pu voltage4
L+143 Motor D: Computed motor MVA base
L+144 Motor D: Adjusted Vstall based on load factor (pu)
L+145 Motor D: Adjusted Vbrk based on load factor (pu)
Reserved
Description
ICONs
N+1 LTC control delay flag
N+2 LTC control timeout flag
N+3 Tap adjustment timer status flag
N+4 Static load admittance storage status flag
N+5 Motor A: UV trip relay1 flag (0=Reset timer, 1=Start timer, 2=Test timer)
N+6
Motor A: UV trip relay1 status (1=Delay complete, motor should be
tripped)
N+7 Motor A: UV trip relay2 flag (0=Reset timer, 1=Start timer, 2=Test timer)
N+8
Motor A: UV trip relay2 status (1=Delay complete, motor should be
tripped)
N+9
Motor A: UV reclose relay1 flag (0=Reset timer, 1=Start timer, 2=Test
timer)
N+10
Motor A: UV reclose relay1 status (1=Delay complete, motor should be
reclosed)
N+11
Motor A: UV reclose relay2 flag (0=Reset timer, 1=Start timer, 2=Test
timer)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-34
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
Reserved
Description
ICONs
N+12
Motor A: UV reclose relay2 status (1=Delay complete, motor should be
reclosed)
N+13 Motor A: starting status (1=starting phase, 0=already started)
N+14 Motor B: UV trip relay1 flag (0=Reset timer, 1=Start timer, 2=Test timer)
N+15
Motor B: UV trip relay1 status (1=Delay complete, motor should be
tripped)
N+16 Motor B: UV trip relay2 flag (0=Reset timer, 1=Start timer, 2=Test timer)
N+17
Motor B: UV trip relay2 status (1=Delay complete, motor should be
tripped)
N+18
Motor B: UV reclose relay1 flag (0=Reset timer, 1=Start timer, 2=Test
timer)
N+19
Motor B: UV reclose relay1 status (1=Delay complete, motor should be
reclosed)
N+20
Motor B: UV reclose relay2 flag (0=Reset timer, 1=Start timer, 2=Test
timer)
N+21
Motor B: UV reclose relay2 status (1=Delay complete, motor should be
reclosed)
N+22 Motor B: starting status (1=starting phase, 0=already started)
N+23 Motor C: UV trip relay1 flag (0=Reset timer, 1=Start timer, 2=Test timer)
N+24
Motor C: UV trip relay1 status (1=Delay complete, motor should be
tripped)
N+25 Motor C: UV trip relay2 flag (0=Reset timer, 1=Start timer, 2=Test timer)
N+26
Motor C: UV trip relay2 status (1=Delay complete, motor should be
tripped)
N+27
Motor C: UV reclose relay1 flag (0=Reset timer, 1=Start timer, 2=Test
timer)
N+28
Motor C: UV reclose relay1 status (1=Delay complete, motor should be
reclosed)
N+29
Motor C: UV reclose relay2 flag (0=Reset timer, 1=Start timer, 2=Test
timer)
N+30
Motor C: UV reclose relay2 status (1=Delay complete, motor should be
reclosed)
N+31 Motor C: starting status (1=starting phase, 0=already started)
N+32 Motor D: non-restartable Motor A Run/Stall status, Run=1, Stall=0
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-35
Load Characteristic Models PSSE 34
CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1 PSSE Model Library
Reserved
Description
ICONs
N+33
Motor D: restartable Motor B Run, Restart, Stall status, Run=1,
Restart=2, Stall=0
N+34 Motor D: Under voltage relay trip status, Non-Trip=1, Trip=0
N+35 Motor D: Under voltage relay first pick up flag, becomes 0 on Pick Up
N+36 Motor D: Under voltage relay second pick up flag, becomes 0 on Pick Up
N+37
Motor D: Thermal relay trip 1 status for non-restartable motor A, Non-
trip=1. Trip=0
N+38
Motor D: Thermal relay trip 2 status for non-restartable motor A, Non-
trip=1. Trip=0
N+39
Motor D: Thermal relay trip 1 status for restartable motor B, Non-trip=1.
Trip=0
N+40
Motor D: Thermal relay Trip 2 status for restartable motor B, Non-trip=1.
Trip=0
N+41
Motor D: Contactors sarted to drop out flag, Not started to drop out=1,
Started to drop out=0
N+42
Motor D: All contactors dropped out flag, All not dropped out=1, All
dropped out=0
N+43
Motor D: Contactors started to reclose flag, Not started to reclose=1,
Started to reclose=0
N+44 Motor D: All Contactors reclosed flag, All not reclosed=1, All reclosed=0
N+45
Motor D: non-restartable motor A stall relay pick up flag, becomes 0 on
pick up
N+46
Motor D: restartable motor B stall relay pick up flag, becomes 0 on pick
up
N+47
Motor D: restartable motor B restart relay pick up flag, becomes 0 on pick
up
I, 'USRLOD', LID, 'CMLDxxU1', 12, IT, 0, 132, 27, 146, 48, CON(J) to CON(J+131) /
LID is an explicit load identifier or may be * for application to loads of any ID associated with the
subsystem type.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-36
PSSE 34 Load Characteristic Models
PSSE Model Library CMLDBLU1, CMLDOWU1, CMLDZNU1, CMLDARU1, CMLDALU1
"IT"
Model suffix
Description "I" Description
"xx"
BL 1 Bus number
OW 2 Owner number
ZN 3 Zone number
AR 4 Area number
AL 5 0
Note: CMLDBL internally uses induction motor model to simulate three phase motors. In case of
non-convergence, number of iterations may be increased and time step may be reduced.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-37
Load Characteristic Models PSSE 34
EXTLBL, EXTLOW, EXTLZN, EXTLAR, EXTLAL PSSE Model Library
K+1 QMULT
Reserved
Value Description
ICON
N Service status memory
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-38
PSSE 34 Load Characteristic Models
PSSE Model Library EXTLBL, EXTLOW, EXTLZN, EXTLAR, EXTLAL
Pinitial Qinitial
PMLTMX QMLTMX
+ +
1 KP 1 KQ
X X
Pactual Pinitial S PMULT Qactual Qinitial S QMULT
PMLTMN QMLTMN
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-39
Load Characteristic Models PSSE 34
IEELBL, IEELOW, IEELZN, IEELAR, IEELAL PSSE Model Library
J+6 a7
J+7 a8
J+8 n1
J+9 n2
J+10 n3
J+11 n4
J+12 n5
J+13 n6
n n n
P = P load a 1 v 1 + a 2 v 2 + a 3 v 3 ( 1 + a 7 f )
n n n
Q = Q load a 4 v 4 + a 5 v 5 + a 6 v 6 ( 1 + a 8 f )
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-40
PSSE 34 Load Characteristic Models
PSSE Model Library LDFRBL, LDFROW, LDFRZN, LDFRAR, LDFRAL
The constant power and constant current load components are made sensitive to bus frequency
according to:
m
P = P o -------
o
n
Q = Q o -------
o
r
I p = I po -------
o
s
I q = I qo -------
o
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-41
Load Characteristic Models PSSE 34
LDFRBL, LDFROW, LDFRZN, LDFRAR, LDFRAL PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
9-42
Chapter 10
Load Relay Models
This chapter contains a collection of data sheets for the load relay models contained in the PSSE
Chapter 10 - Load Relay Models
Model Description
DLSHBL, DLSHOW, DLSHZN, DLSHAR, DLSHAL Rate of frequency load shedding model
Underfrequency load shedding model with
LDS3BL, LDS3OW, LDS3ZN, LDS3AR, LDS3AL
transfer trip
LDSHBL, LDSHOW, LDSHZN, LDSHAR, LDSHAL Underfrequency load shedding model
LDSTBL, LDSTOW, LDSTZN, LDSTAR, LDSTAL Time underfrequency load shedding model
Undervoltage load shedding model with
LVS3BL, LVS3OW, LVS3ZN, LVS3AR, LVS3AL
transfer trip
LVSHBL, LVSHOW, LVSHZN, LVSHAR, LVSHAL Undervoltage load shedding model
UVUFBLU1, UVUFOWU1, UVUFZNU1, User written under-voltage and under-
UVUFARU1, UVUFALU1 frequency load shedding model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-1
Load Relay Models PSSE 34
DLSHBL, DLSHOW, DLSHZN, DLSHAR, DLSHAL PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-2
PSSE 34 Load Relay Models
PSSE Model Library DLSHBL, DLSHOW, DLSHZN, DLSHAR, DLSHAL
Reserved
Value Description
ICONs
N First point delay flag
N+1 First point timeout flag
N+2 First timer status
N+3 Second point delay flag
N+4 Second point timeout flag
N+5 Second timer status
N+6 Third point delay flag
N+7 Third point timeout flag
N+8 Third timer status
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-3
Load Relay Models PSSE 34
LDS3BL, LDS3OW, LDS3ZN, LDS3AR, LDS3AL PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-4
PSSE 34 Load Relay Models
PSSE Model Library LDS3BL, LDS3OW, LDS3ZN, LDS3AR, LDS3AL
Reserved
Value Description
ICONs
N First point delay flag
N+1 First point timeout flag
N+2 First point timer status
N+3 Second point delay flag
N+4 Second point timeout flag
N+5 Second point timer status
N+6 Third point delay flag
N+7 Third point timeout flag
N+8 Third point timer status
N+9 Fourth point delay flag
N+10 Fourth point timeout flag
N+11 Fourth point timer status
N+12 Fifth point delay flag
N+13 Fifth point timeout flag
N+14 Fifth point timer status
N+15 Transfer trip breaker status
N+16 Transfer trip timer status
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-5
Load Relay Models PSSE 34
LDS3BL, LDS3OW, LDS3ZN, LDS3AR, LDS3AL PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-6
PSSE 34 Load Relay Models
PSSE Model Library LDSHBL, LDSHOW, LDSHZN, LDSHAR, LDSHAL
Reserved
Value Description
ICONs
N First point delay flag
N+1 First point timeout flag
N+2 First timer status
N+3 Second point delay flag
N+4 Second point timeout flag
N+5 Second timer status
N+6 Third point delay flag
N+7 Third point timeout flag
N+8 Third timer status
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-7
Load Relay Models PSSE 34
LDSHBL, LDSHOW, LDSHZN, LDSHAR, LDSHAL PSSE Model Library
LID is an explicit load identifier or may be for application to loads of any ID associated with the
subsystem type.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-8
PSSE 34 Load Relay Models
PSSE Model Library LDSTBL, LDSTOW, LDSTZN, LDSTAR, LDSTAL
Reserved
Value Description
ICONs
N Relay status
N+1 Breaker timer flag
N+2 Breaker timeout flag
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-9
Load Relay Models PSSE 34
LDSTBL, LDSTOW, LDSTZN, LDSTAR, LDSTAL PSSE Model Library
Zero
f1 f2 f3 f4 Frequency
Rated
Frequency Frequency (Hz)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-10
PSSE 34 Load Relay Models
PSSE Model Library LVS3BL, LVS3OW, LVS3ZN, LVS3AR, LVS3AL
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-11
Load Relay Models PSSE 34
LVS3BL, LVS3OW, LVS3ZN, LVS3AR, LVS3AL PSSE Model Library
Reserved
Value Description
ICONs
N First point delay flag
N+1 First point timeout flag
N+2 First point timer status
N+3 Second point delay flag
N+4 Second point timeout flag
N+5 Second point timer status
N+6 Third point delay flag
N+7 Third point timeout flag
N+8 Third point timer status
N+9 Fourth point delay flag
N+10 Fourth point timeout flag
N+11 Fourth point timer status
N+12 Fifth point delay flag
N+13 Fifth point timeout flag
N+14 Fifth point timer status
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-12
PSSE 34 Load Relay Models
PSSE Model Library LVS3BL, LVS3OW, LVS3ZN, LVS3AR, LVS3AL
Reserved
Value Description
ICONs
N+15 First transfer trip breaker status
N+16 First transfer trip timer status
N+17 Second transfer trip breaker status
N+18 Second transfer trip timer status
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-13
Load Relay Models PSSE 34
LVSHBL, LVSHOW, LVSHZN, LVSHAR, LVSHAL PSSE Model Library
Reserved
Value Description
ICONs
N First point delay flag
N+1 First point timeout flag
N+2 First timer status
N+3 Second point delay flag
N+4 Second point timeout flag
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-14
PSSE 34 Load Relay Models
PSSE Model Library LVSHBL, LVSHOW, LVSHZN, LVSHAR, LVSHAL
Reserved
Value Description
ICONs
N+5 Second timer status
N+6 Third point delay flag
N+7 Third point timeout flag
N+8 Third point status
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-15
Load Relay Models PSSE 34
UVUFBLU1, UVUFOWU1, UVUFZNU1, UVUFARU1, UVUFALU1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-16
PSSE 34 Load Relay Models
PSSE Model Library UVUFBLU1, UVUFOWU1, UVUFZNU1, UVUFARU1, UVUFALU1
VARs # Description
L First voltage-based timer memory
Second voltage-based timer memory
L+1
(pu)
L+2 Third voltage-based timer memory
L+3 First frequncy-based timer memory
L+4 Second frequncy-based timer memory
L+5 Third frequncy-based timer memory
Load fractions already shed in previous
L+6
stages
Reserved
# Description
ICONs
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-17
Load Relay Models PSSE 34
UVUFBLU1, UVUFOWU1, UVUFZNU1, UVUFARU1, UVUFALU1 PSSE Model Library
Reserved
# Description
ICONs
N+9 First frequncy-based point delay flag
N+10 First frequncy-based point timeout flag
N+11 First frequncy-based timer status
Second frequncy-based point delay
N+12
flag
Second frequncy-based point timeout
N+13
flag
N+14 Second frequncy-based timer status
N+15 Third frequncy-based point delay flag
N+16 Third frequncy-based point timeout flag
N+17 Third frequncy-based timer status
"IT"
Model suffix
Description "I" Description
"xx"
BL 1 Bus number
OW 2 Owner number
ZN 3 Zone number
AR 4 Area number
AL 5 0
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
10-18
Chapter 11
Line Relay Models
This chapter contains a collection of data sheets for the line relay models contained in the PSSE
Chapter 11 - Line Relay Models
Model Description
CIROS1 Double circle or lens out-of-step tripping or blocking relay
DISTR1 mho, impedance, or reactance distance relay
DPDTR1 Rate of change of power relay
RXR1 RXR distance relay
SCGAP2 Series capacitor gap relay
SLLP1 SLLP tripping relay
SLNOS1 Straight line blinder out-of-step relay
SLYPN1 G.E. directional comparison and overcurrent relay
TIOCR1 Time inverse overcurrent relay
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-1
Line Relay Models PSSE 34
CIROS1 PSSE Model Library
11.1 CIROS1
Double Circle or Lens Out-of-Step Tripping or Blocking Relay
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11-2
PSSE 34 Line Relay Models
PSSE Model Library CIROS1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-3
Line Relay Models PSSE 34
CIROS1 PSSE Model Library
X Outer Zone
Inner Zone
Outer Zone
Inner Zone
R
R
X
X
+1
Rotation
-2
+2
R R
-1
Outer Zone
Inner Zone
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-4
PSSE 34 Line Relay Models
PSSE Model Library DISTR1
11.2 DISTR1
mho, Impedance, or Reactance Distance Relay
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11-5
Line Relay Models PSSE 34
DISTR1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-6
PSSE 34 Line Relay Models
PSSE Model Library DISTR1
Diameter
Centerline
Angle
Center
Distance
R
Zone Reach
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11-7
Line Relay Models PSSE 34
DISTR1 PSSE Model Library
Zone 3
Zone 2
Zone 1
mho Distance
Zone 3
Reach
Zone 3
Center
Distance
Zone 3 Zone 2
Centerline Zone 1 Reach
Angle Reach
Reactance Distance
Zone 3
Zone 2
Zone 1
R
Directional
Element
Impedance Distance
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-8
PSSE 34 Line Relay Models
PSSE Model Library DISTR1
Inactive Area X
2
1
X R
Intercept
R
-1 -2
R R
Blinder Types
Directional
Element
Angle
R
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-9
Line Relay Models PSSE 34
DPDTR1 PSSE Model Library
11.3 DPDTR1
Rate of Change of Power Relay
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11-10
PSSE 34 Line Relay Models
PSSE Model Library RXR1
11.4 RXR1
RXR Distance Relay
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11-11
Line Relay Models PSSE 34
RXR1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-12
PSSE 34 Line Relay Models
PSSE Model Library RXR1
X
R13,X13 R12,X12
R9,X9
R8,X8
R10,X10
Zone 3
R5,X5 Zone 2
R3,X3 R4,X4
R2,X2
R6,X5 R1,X1
Zone 1 R7,X7
Zone 4
R14,X14 R11,X11
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11-13
Line Relay Models PSSE 34
SCGAP2 PSSE Model Library
11.5 SCGAP2
Series Capacitor Gap Relay
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11-14
PSSE 34 Line Relay Models
PSSE Model Library SCGAP2
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-15
Line Relay Models PSSE 34
SLLP1 PSSE Model Library
11.6 SLLP1
SLLP Tripping Relay
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11-16
PSSE 34 Line Relay Models
PSSE Model Library SLLP1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-17
Line Relay Models PSSE 34
SLLP1 PSSE Model Library
T4 T3 T2 T1
X
(R1,X1)
(Rm,Xm) P2
P1
P3
(R2,X2)
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11-18
PSSE 34 Line Relay Models
PSSE Model Library SLNOS1
11.7 SLNOS1
Straight Line Blinder Out-of-Step Relay
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11-19
Line Relay Models PSSE 34
SLNOS1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-20
PSSE 34 Line Relay Models
PSSE Model Library SLNOS1
Inactive
Area
Intercept
1
-2 2
-1 Rotation
X X
4 3 2 1
2 1
R
Angle
R
Intercept
2nd Pair
1st Pair
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11-21
Line Relay Models PSSE 34
SLYPN1 PSSE Model Library
11.8 SLYPN1
G.E. Directional Comparison and Overcurrent Relay
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11-22
PSSE 34 Line Relay Models
PSSE Model Library SLYPN1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-23
Line Relay Models PSSE 34
SLYPN1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-24
PSSE 34 Line Relay Models
PSSE Model Library SLYPN1
Zone 1
Diameter
Zone 1
Centerline
Angle
Zone 1
Center
Distance
Center Point
Zone 2
Zone 2 Radius
Forward
Reach
Center Point
Zone 2
Centerline
Angle
Zone 2
Reverse
Reach
Reverse
Reaching
Centerline
Angle
Reverse
Reaching Reverse Reaching
Center Diameter
Distance
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11-25
Line Relay Models PSSE 34
TIOCR1 PSSE Model Library
11.9 TIOCR1
Time Inverse Overcurrent Relay
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11-26
PSSE 34 Line Relay Models
PSSE Model Library TIOCR1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-27
Line Relay Models PSSE 34
TIOCR1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
11-28
Chapter 12
Auxiliary-Signal Models
This chapter contains a collection of data sheets for the auxiliary-signal models contained in the
Chapter 12 - Auxiliary-Signal Models
Model Description
CHAAUT Chateauguay auxiliary signal model
CPAAUT Frequency sensitive auxiliary signal model
DCCAUT Comerford auxiliary signal model
DCVRFT HVDC ac voltage controller model
HVDCAT General purpose auxiliary signal model
PAUX1T Frequency sensitive auxiliary signal model
PAUX2T Bus voltage angle sensitive auxiliary signal model
RBKELT Runback model (can be used only with two-terminal dc line models)
dc line auxiliary signal model (can be used only with two-terminal dc
SQBAUT
line models)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
12-1
Auxiliary-Signal Models PSSE 34
CHAAUT PSSE Model Library
12.1 CHAAUT
Chateauguay Auxiliary Signal Model
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12-2
PSSE 34 Auxiliary-Signal Models
PSSE Model Library CHAAUT
STATEs # Description
K Integrator
K+1 Integrator
K+2 Integrator
K+3 Integrator
K+4 Transducer 1
K+5 Transducer 2
VAR # Description
L Signal, MW
fo
P1POS
FN1 MP1 KP1 + KD1s
Frequency (Hz) 1 +
ICON(M) 1 + sTM1 FP1 (1 + T1s) (1 + T2s)
MN1
*
P1NEG PMAX VAR(L)
Auxiliary
Power Signal
P2POS (MW)
PMIN
*
FN2 MP2 KP2 + KD2s
Frequency (Hz) 1 +
ICON(M+1) FP2
1 + sTM2 (1 + T3s) (1 + T4s)
MN2
P2NEG
fo
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12-3
Auxiliary-Signal Models PSSE 34
CPAAUT PSSE Model Library
12.2 CPAAUT
Frequency Sensitive Auxiliary Signal Model
STATEs # Description
K Washout
K+1 Time constant
VAR # Description
L Signal, MW
ICON # Description
M Bus number
PMAX
VAR(L)
Frequency sTB 1 Auxiliary
Cm Power Signal
Deviation (pu) 1 + sTB 1 + sTA
at Bus ICON(M) PMIN (MW)
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12-4
PSSE 34 Auxiliary-Signal Models
PSSE Model Library DCCAUT
12.3 DCCAUT
Comerford Auxiliary Signal Model
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12-5
Auxiliary-Signal Models PSSE 34
DCCAUT PSSE Model Library
STATEs # Description
K Integrator
K+1 Integrator
K+2 Integrator
K+3 Integrator
K+4 Transducer 1
K+5 Transducer 2
VAR # Description
L Signal, MW
fo P1POS
DPDTMX
Frequency (Hz) 1 FN1 MP1 KP1 + KD1s
+
ICON(M) 1 + sTM1 Rate
FP1 (1 + T1s) (1 + T2s)
MN1 Limit
*
DPDTMN VAR(L)
P1NEG Auxiliary
P2POS Power Signal
(MW)
*
Frequency (Hz) 1 FN2 MP2 KP2 + KD2s
+
ICON(M+1) 1 + sTM2
FP2 (1 + T3s) (1 + T4s)
MN2
P2NEG
fo
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12-6
PSSE 34 Auxiliary-Signal Models
PSSE Model Library DCVRFT
12.4 DCVRFT
HVDC ac Voltage Controller
J+4 TB (sec)
J+5 KA
J+6 TA (sec)
J+7 VRMAX
J+8 VRMIN
STATEs # Description
K Vmeasured
K+1 Lead lag
K+2 VR
VARs # Description
L HVDC DCV delta
L+1 Reference voltage
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12-7
Auxiliary-Signal Models PSSE 34
DCVRFT PSSE Model Library
VAR(L+1)
VRMAX
+ VIMAX
1 (1 + sTC) KA
ICON(M) VAR(L)
(V) 1 + sTR VERR (1 + sTB) (1 + sTA)
VIMIN
VRMIN
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12-8
PSSE 34 Auxiliary-Signal Models
PSSE Model Library HVDCAT
12.5 HVDCAT
General Purpose Auxiliary Signal Model
J+6 T3 (sec)
J+7 B (0 or 1)
J+8 T4 (sec)
J+9 T5 (sec)
J+10 C
J+11 D
J+12 E
J+13 F
J+14 MINOUT
J+15 MAXOUT
STATEs # Description
K Lag block
K+1 First lead-lag
K+2 Second lead-lag
K+3 2nd order block
K+4 2nd order block
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12-9
Auxiliary-Signal Models PSSE 34
HVDCAT PSSE Model Library
VARs # Description
L Signal
L+1 Internal
L+2 Storage
ICONs # Description
Input code:
1 Current on branch (pu)
2 Power on branch (pu)
M 3 Frequency difference busi - busj (pu)
4 Voltage busi (pu)
5 Frequency busi (pu)
M+1 Bus i number
M+2 Bus j number or zero for input 4 and 5
Branch ID or zero for inputs 3, 4, and 5, or -
M+3
1 for sum of parallel line flows
Input
Signal0
MAXIN MAXOUT
Ks A + sT2 B + sT4 s2 + sC + D VAR(L)
Input + Auxiliary
Signal 1 + sT1 1 + sT3 1 + sT5 s2 + sE + F Signal
MININ MINOUT
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12-10
PSSE 34 Auxiliary-Signal Models
PSSE Model Library PAUX1T
12.6 PAUX1T
Frequency Sensitive Auxiliary Signal Model
STATE # Description
K Sensor
VARs # Description
L Signal, MW
L+1
.
. Delay table
.
L+10
ICON # Description
M Bus number
MAX VAR(L)
Frequency 1 Auxiliary
Deviation (pu) -sTD KC Power Signal
1 + sTR e
at Bus ICON(M) (MW)
MIN
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12-11
Auxiliary-Signal Models PSSE 34
PAUX2T PSSE Model Library
12.7 PAUX2T
Bus Voltage Angle Sensitive Auxiliary Signal Model
J+2 KC
J+3 T1 (>0) (sec)
J+4 T2 (>0) (sec)
J+5 T3 (>0) (sec)
STATEs # Description
K Sensor
K+1 Washout
K+2 Washout
VARs # Description
L Signal, MW
L+1
.
. Delay table
.
L+9
L+10 Memory
L+11 Reference
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12-12
PSSE 34 Auxiliary-Signal Models
PSSE Model Library PAUX2T
ICON # Description
M Bus number
Angle
Reference
VAR(L+11)
MAX
VAR(L)
Voltage Angle + 1 sT1 KCsT2 Auxiliary
at Bus ICON(M)
1 + sTR e -sTD 1 + sT3 1 + sT4 Power Signal
(rad) (MW)
MIN
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
12-13
Auxiliary-Signal Models PSSE 34
RBKELT PSSE Model Library
12.8 RBKELT
Eel River Runback
(can be used with two-terminal dc line models only)
STATE # Description
K Output signal (MW)
VARs # Description
L Memory
L+1 Memory
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12-14
PSSE 34 Auxiliary-Signal Models
PSSE Model Library RUNBKT
12.9 RUNBKT
Two-Terminal dc Line Runback Model
STATE # Description
K Level of SETVAL
VARs # Description
L Starting time for ramp
L+1 Final time for ramp
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12-15
Auxiliary-Signal Models PSSE 34
SQBAUT PSSE Model Library
12.10 SQBAUT
Frequency Sensitive dc Line Auxiliary Signal Model
(can be used with two-terminal dc lines only)
J+6 B2 (>0)
J+7 IMAX (amps)
J+8 IMIN (amps)
J+9 Current step (amps)
J+10 Td Communication delay (sec) <10 time steps
J+11 TL (sec)
STATEs # Description
K Input filter
K+1 First notch filter STATE
K+2 Second notch filter STATE
K+3 First lag
K+4 Second lag
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12-16
PSSE 34 Auxiliary-Signal Models
PSSE Model Library SQBAUT
VARs # Description
L Signal, MW
L+1
.
. Delay table
.
L+10
STATE(K+1)
STATE(K) STATE(K+2) IMAX
Frequency 1 + A1s + A2s2 1 2
Deviation (pu)
KDC + KACsT2 ------------------
1 + T L s
at Bus ICON(M) 1 + sT2 1 + B1s + B2s2
IMIN CL
Input Filter Notch Filter
= min VAR(L)
Td s dc Auxiliary
e X
CUR Power Signal
Communication (MW)
Delay
Current Step
Function
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12-17
Auxiliary-Signal Models PSSE 34
SQBAUT PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
12-18
Chapter 13
Two-Terminal dc Line Models
This chapter contains a collection of data sheets for the two-terminal dc line models contained in
Chapter 13 - Two-Terminal dc Line Models
Model Description
CDC1T Two-terminal dc line model
CDC4T Two-terminal dc line model
CDC6T Two-terminal dc line model
CDC6TA Two-terminal dc line model
CDC7T dc line model
CDCABT ABB dc line model for Kontek line
New Eel River dc line and auxiliaries model. This model internally uses
CEELT the following models: CHAAUT (auxiliary-signal model), CEEL2T (two-
terminal dc line model), and RUNBKT (dc line runback model).
CEEL2T New Eel River dc line model
CHIGATT Highgate dc line model.
CMDWAST Madawaska dc line model.
CMDWS2T New Madawaska dc line model.
CMFORDT Comerford dc line model.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-1
Two-Terminal dc Line Models PSSE 34
CDC1T PSSE Model Library
13.1 CDC1T
Two-terminal dc Line Model
STATEs # Description
K Measured inverter dc voltage
K+1 Measured line dc current
VARs # Description
L Other signals (MW) [DC2SIG(1,I)]
L+1 VPCR, rectifier dc voltage
L+2 VDCI, inverter dc voltage
L+3 SETVAL, current (amps) or power (MW) demand
L+4 DC, dc current (amps)
L+5 ALPHA, alpha-rectifier (degrees)
L+6 GAMMA, gamma-inverter (degrees)
L+7 PACR, rectifier ac real power (pu)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-2
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC1T
VARs # Description
L+8 QACR, rectifier ac reactive power (pu)
L+9 PACI, inverter ac real power (pu)
L+10 QACI, inverter ac reactive power (pu)
L+11 KF, ramping factor
L+12 TON, unblocking time
ICON # Description
Control mode:1
0 Blocked
M
1 Power
2 Current
1 Not intended to be changed by user.
Note: If GAMMIN = GAMMX in power flow, line is assumed to be in GAMMA control. This model
uses auxiliary signal output stored in DC2SIG(1,I) (i.e., auxiliary signal index 1).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-3
Two-Terminal dc Line Models PSSE 34
CDC4T PSSE Model Library
13.2 CDC4T
Two-terminal dc Line Model
STATEs # Description
K Measured inverter dc voltage (V)
K+1 Measured inverter dc current (amps)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-4
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC4T
VARs # Description
L Other signals, MW [DC2SIG(1,I)]
RESTR, time unblocks or )
L+1
unbypasses (sec
L+2 VRF, voltage ramping factor
L+3 CRF, current ramping factor
L+4 VCOMP, compensating dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 TIME, reswitches mode
ICONs # Description
Note: This model uses auxiliary signal output stored in DC2SIG(1,I) (i.e., auxiliary signal index 1).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-5
Two-Terminal dc Line Models PSSE 34
CDC4T PSSE Model Library
dc Current
V1, C1
C0
Minimum dc Current (amps)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-6
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC6T
13.3 CDC6T
Two-terminal dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-7
Two-Terminal dc Line Models PSSE 34
CDC6T PSSE Model Library
STATEs # Description
K Measured inverter dc voltage (V)
K+1 Measured inverter dc current (amps)
K+2 Measured rectifier dc voltage (V)
VARs # Description
L Other signals, MW [DC2SIG(1,I)]
RESTR, time unblocks or
L+1
unbypasses (sec)
L+2 VRF, voltage ramping factor
L+3 CRF, current ramping factor
L+4 VCOMP, compensating dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 TIME, reswitches mode
TIMER, rectifier blocking and
L+15
unblocking timer
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-8
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC6T
VARs # Description
TIMEI, inverter blocking and
L+16
unblocking timer
TIBYP, inverter bypass and unbypass
L+17
timer
ICONs # Description
Note: This model uses auxiliary signal output stored in DC2SIG(1,I) (i.e., auxiliary signal index 1).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-9
Two-Terminal dc Line Models PSSE 34
CDC6TA PSSE Model Library
13.4 CDC6TA
Two-terminal dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-10
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC6TA
STATEs # Description
K Measured inverter dc voltage (V)
K+1 Measured inverter dc current (amps)
K+2 Measured rectifier dc voltage (V)
VARs # Description
L Other signals, MW [DC2SIG(1,I)]
L+1 RESTR, time unblocks or unbypasses (sec)
L+2 VRF, voltage ramping factor
L+3 CRF, current ramping factor
L+4 VCOMP, compensating dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 TIME, reswitches mode
L+15 TIMER, rectifier blocking and unblocking, timer
L+16 TIMEI, inverter blocking and unblocking, timer
L+17 TIBYP, inverter bypass and unbypass timer
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-11
Two-Terminal dc Line Models PSSE 34
CDC6TA PSSE Model Library
VARs # Description
L+18 Imeasured current in amps (Ir)
L+19 Idesired before VDCL in amps (IDESr)
L+20 VDCL output in amps IMAXr)
ICONs # Description
Note: This model uses auxiliary signal outputs stored in DC2SIG(1,I) through DC2SIG(4,I)
(i.e., auxiliary signal index 1 through 4).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-12
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC7T
13.5 CDC7T
dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-13
Two-Terminal dc Line Models PSSE 34
CDC7T PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-14
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC7T
STATEs # Description
K Measured dc voltage, inverter, V
K+1 Measured dc current, inverter, A
K+2 Measured dc voltage, rectifier, V
K+3 Measured dc current, rectifier, A
K+4 IDCR, Rectifier dc current, A
K+5 IDCI, Inverter dc current, A
K+6 VCDC, DC line capacitor voltage, V
K+7 Rectifier VDComp filter, pu
K+8 Inverter VDComp filter, pu
K+9 Rectifier VDComp measured, pu
K+10 Inverter VDComp measured, pu
K+11 PI controller integrator, rectifier, rad
K+12 PI controller integrator, inverter, rad
K+13 IF1, fault current dc fault 1
K+14 IF2, fault current dc fault 2
K+15 IF3, fault current dc fault 3
K+16 VDC filter for power order calculation
VARs # Description
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-15
Two-Terminal dc Line Models PSSE 34
CDC7T PSSE Model Library
VARs # Description
L+8 GAMA, degrees
L+9 Initial rectifier DC current order, A
L+10 Rectifier current order, limited by VDCL, pu
L+11 Inverter current order, limited by VDCL, pu
L+12 Current controller output, rectifier
L+13 Current controller output, inverter
L+14 Voltage controller output, rectifier
L+15 Voltage controller output, inverter
L+16 Gamma controller output, inverter
L+17 Selected controller output, rectifier
L+18 Selected controller output, inverter
L+19 Inverter Alpha, degrees
L+20 Initial VDComp (compensated dc voltage)
L+21 DC current order for block/unblock and overload, A
L+22 IDC1, sending end dc current, A
L+23 IDC2, receiving end dc current, A
L+24 PORD, power order, pu
ICONs # Description
Blocking and Unblocking Simulation Flag:
0 none
M
1 blocking
2 unblocking
Overload Simulation Flag:
M+1 0 none
1 overload
M+2 Control configuration: 1, 2, or 31
1 cable or cable + overhead
M+3
2 overhead
1 ICON(M+2) = 1 : Rectifier in dc current control; inverter in gamma control
ICON(M+2) = 2 : Rectifier in dc current control; inverter in dc voltage control
ICON(M+2) = 3 : Rectifier in dc voltage control; inverter in dc current control
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-16
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDC7T
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-17
Two-Terminal dc Line Models PSSE 34
CDCABT PSSE Model Library
13.6 CDCABT
Kontek ABB dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-18
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDCABT
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-19
Two-Terminal dc Line Models PSSE 34
CDCABT PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-20
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDCABT
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-21
Two-Terminal dc Line Models PSSE 34
CDCABT PSSE Model Library
STATEs # Description
K IDC_R, rectifier dc current (amps)
K+1 IM_R, rectifier dc current measurement (amps)
K+2 VM_R, rectifier dc voltage measurement (V)
K+3 IDC_I, inverter dc current (amps)
K+4 IM_I, inverter dc current measurement (amps)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-22
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDCABT
STATEs # Description
K+5 VM_I, inverter dc voltage measurement (V)
K+6 VC, cable voltage (V)
K+7 UVDCOL_R, rectifier voltage measurement VDCL (V)
K+8 UVDCOL_I, inverter voltage measurement VDCL (V)
K+9 AINT_R, rectifier integral part of alpha-order CCA
K+10 AINT_I, inverter integral part of alpha-order CCA
K+11 Rectifier alpha integrator CFC (rad)
K+12 Inverter alpha integrator CFC (rad)
K+13 S1_R, rectifier state 1, alpha-max limitation
K+14 S1_I, inverter state 1, alpha-max limitation
K+15 S2_R, rectifier state 2, alpha-max limitation
K+16 S1_I, inverter state 2, alpha-max limitation
K+17 Inverter ac voltage measurement (pu)
K+18 Inverter transient controller state (rad)
K+19 FREQ_R, rectifier frequency control (MW)
K+20 FREQ_I, inverter frequency control (MW)
K+21 DAMP1_R, rectifier power modulation state 1
K+22 DAMP2_R, rectifier power modulation state 2
K+23 DAMP1_I, inverter power modulation state 1
K+24 DAMP2_I, inverter power modulation state 2
K+25 Master dc voltage rectifier (V)
K+26 Master dc voltage inverter (V)
K+27 Phase shift correction rectifier (rad)
K+28 Phase shift correction inverter (rad)
K+29 Dynamic current compound inverter state 1 (rad)
K+30 Dynamic current compound inverter state 2 (rad)
K+31 Current order filter rectifier alpha-max (amps)
K+32 Current order filter inverter alpha-max (amps)
K+33 Voltage control for long cables (rad)
VARs # Description
L PRECT, rectifier dc active power (W)
L+1 QRECT, inverter dc reactive power (var)
L+2 PINVRT, inverter dc active power (W)
L+3 QINVRT, inverter dc reactive power (var)
L+4 UDC_R, rectifier dc voltage (V)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-23
Two-Terminal dc Line Models PSSE 34
CDCABT PSSE Model Library
VARs # Description
L+5 UDC_I, inverter dc voltage (V)
L+6 MU_I, inverter overlap angle (rad)
L+7 GAMA_I, inverter gamma (rad)
L+8 IC, current in cable capacitance (amps)
L+9 PORDER, power order master controller (W)
L+10 IOO, current order master controller (amps)
L+11 TMASTER_R, master voltage time constant if rectifier is master (sec)
L+12 TMASTER_I, master voltage time constant if inverter is master (sec)
L+13 T_R, rectifier time constant VDCL
L+14 IOMAX_R, rectifier maximum current (amps)
L+15 IORDER_R, rectifier current order from VDCL (amps)
L+16 T_I, inverter time constant VDCL
L+17 IOMAX_I, inverter maximum current order VDCL (amps)
L+18 IORDER_I, inverter current order from VDCL (amps)
L+19 I_ERROR_R, rectifier current error CCA (amps)
L+20 APROP_R, rectifier proportional part of alpha CCA (rad)
L+21 ALPHA_ORDER_R, rectifier alpha order from CCA (rad)
L+22 I_ERROR_I, inverter current error CCA (amps)
L+23 APROP_I, inverter proportional part of alpha CCA (rad)
L+24 ALFA_ORDER_I, inverter alpha order from CCA (rad)
L+25 ALFA_MAX_ORDER_R, rectifier alpha maximum segment (rad)
L+26 ALFA_MAX_ORDER_I, inverter alpha maximum segment (rad)
L+27 GAMMIN_I, inverter minimum gamma in CFC (rad)
L+28 DELT_ALFA_MAX_R, rectifier upper limit of alpha error CFC (rad)
L+29 DELT_ALFA_MIN_R, rectifier lower limit of alpha error CFC (rad)
L+30 DELT_ALFA_MAX_I, inverter upper limit of alpha error CFC (rad)
L+31 DELT_ALFA_MIN_I, inverter lower limit of alpha error CFC (rad)
L+32 ALFA_MIN_R, rectifier lower limit of alpha order CFC (rad)
L+33 ALFA_MAX_I, inverter maximum limit of alpha order CFC (rad)
L+34 ALFA_R, alpha from rectifier CFC to the converter equations (rad)
L+35 ALFA_I, alpha from inverter CFC to the converter equations (rad)
L+36 DANG_R, rectifier phase shift correction contribution to alpha (rad)
L+37 DANG_I, inverter phase shift correction contribution to alpha (rad)
TRCONR_AORDER_MIN_R, rectifier transient controller added to the
L+38
lower limit on alpha in CCA
L+39 TRCONI_T, inverter transient controller time constant (sec)
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13-24
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CDCABT
VARs # Description
DELT_PO_FREQ_R, rectifier active power modulation from frequency
L+40
controller (W)
DELT_PO_FREQ_I, inverter active power modulation from frequency
L+41
controller (W)
DELT_PO_DAMP_R, rectifier active power modulation from power
L+42
modulation (W)
DELT_PO_DAMP_I, inverter active power modulation from power
L+43
modulation (W)
L+44 EPC_POWER_R, rectifier EPC power (W)
L+45 EPC_POWER_I, inverter EPC power (W)
L+46 EPC_POWER, total EPC power (W)
L+47 DALFA_VC, inverter voltage control contribution to alpha (rad)
L+48
to Model internal memory
L+158
ICONs # Description
CURRENT DIRECTION, current from:
M 1 rectifier
0 inverter
Rectifier frequency control:
M+1 1 enable
0 disable
Inverter frequency control:
M+2 1 enable
0 disable
Rectifier power modulation:
M+3 1 enable
0 disable
Inverter power modulation:
M+4 1 enable
0 disable
Rectifier emergency power control:
M+5 1 enable
0 disable
Inverter emergency power control:
M+6 1 enable
0 disable
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13-25
Two-Terminal dc Line Models PSSE 34
CDCABT PSSE Model Library
ICONs # Description
Inverter voltage control:
M+7 1 enable
0 disable
Rectifier phase shift correction:
M+8 1 enable
0 disable
Inverter phase shift correction:
M+9 1 enable
0 disable
Note: This model does not use auxiliary signal model outputs.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-26
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CEELRIT
13.7 CEELRIT
dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-27
Two-Terminal dc Line Models PSSE 34
CEELRIT PSSE Model Library
STATEs # Description
K VDCOL, dc or ac voltage (kV or pu), VDCOL
K+1 Current order (amps)
K+2 Power controller dc voltage (V), VDCP
VARs # Description
L Other signals, MW
L+1 RESTR, time unblocks or unbypasses (sec)
L+2 VRF, voltage setpoint multiplier
L+3 CRF, current setpoint multiplier
L+4 VCOMP, compensated dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 Other VDC signals (kV)
L+15 TIMER, rectifier blocking and unblocking, timer
L+16 TIMEI, inverter blocking and unblocking, timer
L+17 TIBYP, inverter bypass and unbypass timer
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13-28
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CEELRIT
Note:
1. This model represents:
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-29
Two-Terminal dc Line Models PSSE 34
CEELRIT PSSE Model Library
CRAMP
Other Signals 0.0 CON(J+13)
VAR(L) (MW)
When When
ICON(M+1)=0 ICON(M+1)=2
1000.
VSCHED(I)
(amps) 1.0
+
+ 1
SETVAL(I) Current Control
s
(amps) (MDC(I)=2)
CRF
RLOW VAR(L+3)
1
1 + sTIDR STATE VDCOL
CON(J+3) (K+1) C0
+
106 CON(J+14)
SETVAL(I) Power Control
VDCP (MDC(I)=1)
(MW)
+ (V) VVDCOL
VDCP STATE(K)
Other Signals STATE(K+2)
VAR(L) (MW) CON(J+2) Up
1 1
CON(J+16)*VSCHED(I) 1 + sTVP 1 + sTVDCOL
CON(J+31) CON(J+4) Down
1000
1000*VCMODE(I)
VDCI/VAR(L+2) VDCR/VAR(L+2)
CON(J+11)*VSCHED(I)
If (MDC(I) = 1), RLOW =
1000 * SETVAL (I)
CON(J+11)
If (MDC(I) = 2), RLOW =
SETVAL (I)
dc Setpoint Control
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13-30
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CEELRIT
VAR(L+14)
Other Signals
(kV)
+
+
VSCHED(I) VSET (kV)
(kV)
VAR(L+2) 1.0
1
s
CON(J+10)
VSCHED(I)
0.0 VRAMP
CON(J+12)
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13-31
Two-Terminal dc Line Models PSSE 34
CEELT PSSE Model Library
13.8 CEELT
Eel River dc Line and Auxiliaries Model
(combines CHAAUT, CEEL2T and RUNBK models)
1. This model uses the following ICON, CON, STATE, and VAR assignments:
4. 4. Initially the model sets ICON(M+7) to 0. When the user wants to initiate runback of
the dc line, ICON(M+7) has to be set to 1.
5. Since CEELT has an in-built auxiliary signal model, do not attach any other external
auxiliary signal model.
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13-32
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CEEL2T
13.9 CEEL2T
Eel River dc Line Model
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13-33
Two-Terminal dc Line Models PSSE 34
CEEL2T PSSE Model Library
STATEs # Description
K Power controller dc voltage (V), VDCP
K+1 Current order (amps)
VARs # Description
L Other signals, MW [DC2SIG(1,I)]
L+1 RESTR, time unblocks or unbypasses (sec)
L+2 VRF, voltage setpoint multiplier
L+3 CRF, current setpoint multiplier
L+4 VCOMP, compensated dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
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13-34
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CEEL2T
VARs # Description
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 Other VDC signals (kV) [DC2SIG(2,I)]
L+15 TIMER, rectifier blocking and unblocking, timer
L+16 TIMEI, inverter blocking and unblocking, timer
L+17 TIBYP, inverter bypass and unbypass timer
L+18 TDELAY, reference time for current limit delay
L+19 TSAMPL, reference time for current limit sampling
L+20 DCLVAC, current limit (amps)
L+21 VACIN, voltage which determines current limit
ICONs # Description
Inverter status:1
0 Normal
M
1 Blocked
2 Ramping
Rectifier status:1
0 Normal
M+1
1 Blocked
2 Ramping
0 current limit uses inverter VDC1
M+2
> 0 current limit uses VAR (ICON(M+2))
1 VDCL on upper hysteresis path1
M+3
1 VDCL on lower hysteresis path
1 All the ICONs are set by the program.
1. When this model is called directly (i.e., not via model CEELT), the current limit uses
inverter VDC (i.e., ICON(M+2) of this model is always 0 when called directly).
2. If the user wishes to block the converter, MDC(I) should be set to zero.
3. When called directly, this model uses auxiliary signal outputs stored in DC2SIG(1,I)
(i.e., auxiliary signal index 1), and DC2SIG(2,I) (i.e., auxiliary signal index 2).
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-35
Two-Terminal dc Line Models PSSE 34
CEEL2T PSSE Model Library
VH1 VH2
VAR(ICON(M+2)) CON(J+19) CON(J+20)
CH
ICON(M+2)0
CON(J+16)
VACIN DCLVAC
VAR(L+21) VAR(L+20)
VDCI/1000 ICON(M+2)=0 CL VL1 VL2
CON(J+15) CON(J+17) CON(J+18)
1000*VCMODE(I)
ICON(M+1)=2 ICON(M+1)=2
SETVAL(I)<0 SETVAL(I)>0
0.0 CRAMP
CON(J+13)
VDCI/VAR(L+2) VDCR/VAR(L+2)
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13-36
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CEEL2T
VSET
DCSET
DCSET(1 DELTI(I))
VAR(L+14)=DC2SIG(2,I)
Other Signals
+
+
VSET (kV)
VSCHED(I)
VAR(L+2)* 1.0
1
s
CON(J+10)
VSCHED(I)
ICON(M)2 ICON(M)=2
0.0 VRAMP
CON(J+12)
*VAR(L+2) is also used by the power controller so that the current order is not
increased when voltage is depressed. VAR(L+2) is started at the lower limit when
unblocking or unbypassing.
dc Setpoint Control
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13-37
Two-Terminal dc Line Models PSSE 34
CHIGATT PSSE Model Library
13.10 CHIGATT
dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-38
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CHIGATT
STATEs # Description
K VDCOL, dc or ac voltage (kV or pu), VVDCOL
K+1 Measured inverter dc current (amps)
K+2 Power controller dc voltage (V), VDCP
VARs # Description
L Other signals, MW
L+1 RESTR, time unblocks or unbypasses (sec)
L+2 VRF, voltage setpoint multiplier
L+3 CRF, current setpoint multiplier
L+4 VCOMP, compensated dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 Other VDC signals (kV)
L+15 TIMER, rectifier blocking and unblocking timer
L+16 TIMEI, inverter blocking and unblocking timer
L+17 TIBYP, inverter bypass and unbypass timer
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-39
Two-Terminal dc Line Models PSSE 34
CHIGATT PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-40
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CHIGATT
CRAMP
0.0 CON(J+13)
Other Signals
VAR(L) (MW)
ICON(M+1)2 ICON(M+1)=2
1000
VSCHED 1.0
(amps) 1
+ s RAMPING
(1 - DELTA(I))
+
SETVAL (I) Current Control VAR(L+3)
(amps) MDC(I)=2 RLOW
VDCOL DCSET
C0
+ 106
SETVAL (I) MDC(I)=1
VDCP CON(J+14)
Power Control VVDCOL
+ V3=CON(J+19)
STATE(K)
Other Signals VDCP
VAR(L) STATE(K+2) CON(J+2) Up
1
1 1 + STVDCOL
CON(J+31) CON(J+4) Down
1 + STUP
V1=CON(J+15)
1000*VCMODE(I)
VDCI
1000
SETVAL(I)<0 SETVAL(I)>0
VDCI/VAR(L+2) VDCR/VAR(L+2)
dc Setpoint Control
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13-41
Two-Terminal dc Line Models PSSE 34
CMDWAST PSSE Model Library
13.11 CMDWAST
dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-42
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CMDWAST
STATEs # Description
K VDCOL, dc or ac voltage (kV or pu), VVDCOL
K+1 Measured inverter dc current (amps)
K+2 Power controller dc voltage (V), VDCP
VARs # Description
L Other signals, KA
L+1 RESTR, time unblocks or unbypasses (sec)
L+2 VRF, voltage setpoint multiplier
L+3 CRF, current setpoint multiplier
L+4 VCOMP, compensated dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 Other VDC signals (kV)
L+15 TIMER, rectifier blocking and unblocking timer
L+16 TIMEI, inverter blocking and unblocking timer
L+17 TIBYP, inverter bypass and unbypass timer
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13-43
Two-Terminal dc Line Models PSSE 34
CMDWAST PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-44
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CMDWAST
RAMP
RAMP RATE = CRAMP IF VDCR > VRAMPI = CON(J+30) RATE
VDCR CRAMP CON(J+13)
RAMP RATE = 2. * CRAMP IF VDCR < VRAMPI
ICON(M+1)=0 ICON(M+1)=2
1.0
1
s RAMPING
+
VDCOL DCSET
106 C0
SETVAL (I) MDC(I)=1 +
(MW) VDCP Power CON(J+14)
Control
VVDCOL
VDCP STATE(K) (1.DELTA(I))
STATE(K+2) V3=CON(J+19) 1000
CON(J+2) Up
1 1
CON(J+31) 1 + STUP 1 + S+TVDCOL
CON(J+4) Down
Other Signals
V1=CON(J+15) VAR(L)
1000*VCMODE(I)
VDCI
SETVAL(I)<0 SETVAL(I)>0 1000
VDCI/VAR(L+2) VDCR/VAR(L+2)
CON(J+11) * VSCHED(I)
If (MDC(I) = 1), RLOW =
1000 * SETVAL (I)
CON(J+11)
If (MDC(I) = 2), RLOW =
SETVAL (I)
dc Setpoint Control
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-45
Two-Terminal dc Line Models PSSE 34
CMDWS2T PSSE Model Library
13.12 CMDWS2T
Madawaska dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-46
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CMDWS2T
STATEs # Description
K Power controller dc voltage (V),VDCP
K+1 Measured inverter dc current (amps)
VARs # Description
L Other signals, KA
L+1 RESTR, time unblocks or unbypasses (sec)
L+2 VRF, voltage setpoint multiplier
L+3 DCLVDC, dc voltage dependent current limit
L+4 VCOMP, compensated dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)(V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 Other VDC signals (kV)
L+15 TIMER, rectifier blocking and unblocking timer
L+16 TIMEI, inverter blocking and unblocking timer
L+17 TIBYP, inverter bypass and unbypass timer
L+18 TDELAY, reference time for current limit delay
TSAMPL, reference time for current limit
L+19
sampling
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-47
Two-Terminal dc Line Models PSSE 34
CMDWS2T PSSE Model Library
VARs # Description
DCLVAC, ac voltage dependent current limit
L+20
(amps)
L+21 VACIN, voltage that determines current limit
L+22 DCSET
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-48
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CMDWS2T
1
s DCLVDC
VAR(L+3)
CRAMP ICON(M+1)=2 DCSMIN
CON(J+13) CON(J+11)
VAR(ICON(M+2))
ICON(M+2)0 VH1 VH2
CON(J+19) CON(J+20)
CH
CON(J+16)
VACIN DCLVAC
VAR(L+21) VAR(L+20)
VDCI/1000 CL VL1 VL2
ICON(M+2) = 0 CON(J+15) CON(J+17) CON(J+18)
SETVAL(I)
DCLVDC DCLVAC
VAR(L+3) VAR(L+20)
1
1 + sTIODC DCSET
C0
106 CON(J+3) CON(J+14)
Power
SETVAL(I) VDCP Control
(MW) MDC(I)=1 1000
VDCP
CON(J+31)
1
1 + sTVP Other Signals
VAR(L)
1000*VCMODE(I)
SETVAL(I)<0 SETVAL(I)>0
VDCI/VAR(L+2) VDCR/VAR(L+2)
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13-49
Two-Terminal dc Line Models PSSE 34
CMDWS2T PSSE Model Library
VAR(L+14)
Other Signals
+
+
VSCHED(I) VSET (kV)
VAR(L+2)* 1.0
1
s
CON(J+10)
VSCHED(I)
ICON(M)2 ICON(M)=2
0.0 VRAMP
CON(J+12)
*This VAR is also used by the power controller so that the current order is
not increased when voltage is depressed. VAR(L+2) is started at the
lower limit when unblocking or unbypassing.
VSET
GAMMA MIN CON(J+1)
DCSET
DCSET(1DELTA(I))
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13-50
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CMFORDT
13.13 CMFORDT
dc Line Model
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
13-51
Two-Terminal dc Line Models PSSE 34
CMFORDT PSSE Model Library
STATEs # Description
K VDCOL, dc or ac voltage (kV or pu), VVDCOL
K+1 Measured inverter dc current (amps)
K+2 Power controller dc voltage (V), VDCP
VARs # Description
L Other signals, MW
L+1 RESTR, time unblocks or unbypasses (sec)
L+2 VRF, voltage setpoint multiplier
L+3 CRF, current setpoint multiplier
L+4 VCOMP, compensated dc voltage (V)
L+5 PACR, rectifier ac real power (pu)
L+6 QACR, rectifier ac reactive power (pu)
L+7 PACI, inverter ac real power (pu)
L+8 QACI, inverter ac reactive power (pu)
L+9 VDCI, inverter dc voltage (V)
L+10 VDCR, rectifier dc voltage (V)
L+11 DC, dc current (amps)
L+12 ALFA, alpha (degrees)
L+13 GAMA, gamma (degrees)
L+14 Other VDC signals (kV)
L+15 TIMER, rectifier blocking and unblocking timer
L+16 TIMEI, inverter blocking and unblocking timer
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13-52
PSSE 34 Two-Terminal dc Line Models
PSSE Model Library CMFORDT
VARs # Description
L+17 TIBYP, inverter bypass and unbypass timer
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13-53
Two-Terminal dc Line Models PSSE 34
CMFORDT PSSE Model Library
1000.
VSCHED
1.0
1
+ s RAMPING
(1DELTA(I))
+
RLOW VAR(L+3)
SETVAL(I) Current Control
MDC(I)=2
VDCOL
DCSET
C0
+ 106 CON(J+14)
MDC(I)=1
SETVAL(I) VDCP Power VVDCOL
+ Control STATE(K)
V3=CON(J+19)
VDCP
Other Signals STATE(K+2) CON(J+2) Up
VAR(L) 1
1000 1 + STVDCOL
CON(J+31) CON(J+4) Down
1 + STUP
V1 = CON(J+15)
1000*VCMODE(I) +
VAR(L+14)
Other Signal
+
VDCI
VSCHED(I)
CON(J+11) * VSCHED(I)
If (MDC(I) = 1), RLOW =
1000*SETVAL (I)
CON(J+11)
If (MDC(I) = 2), RLOW =
SETVAL (I)
dc Setpoint Control
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13-54
Chapter 14
Multi-Terminal dc Line Models
This chapter contains a collection of data sheets for the multi-terminal dc line models contained in
Chapter 14 - Multi-Terminal dc Line Models
Model Description
MTDC1T Multiterminal (five converter) dc line model
MTDC2T Multiterminal (five converter) dc line model
MTDC3T Multiterminal (eight converter) dc line model
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14-1
Multi-Terminal dc Line Models PSSE 34
MTDC1T PSSE Model Library
14.1 MTDC1T
Multiterminal (Five Converter) dc Line Model
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14-2
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC1T
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14-3
Multi-Terminal dc Line Models PSSE 34
MTDC1T PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
14-4
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC1T
STATEs # Description
K Measured ac voltage, converter 1
K+1 Measured dc voltage, converter 1
K+2 Measured dc current, converter 1
K+3 Measured ac voltage, converter 2
K+4 Measured dc voltage, converter 2
K+5 Measured dc current, converter 2
K+6 Measured ac voltage, converter 3
K+7 Measured dc voltage, converter 3
K+8 Measured dc current, converter 3
K+9 Measured ac voltage, converter 4
K+10 Measured dc voltage, converter 4
K+11 Measured dc current, converter 4
K+12 Measured ac voltage, converter 5
K+13 Measured dc voltage, converter 5
K+14 Measured dc current, converter 5
VARs # Description
L VAC bus converter 1
L+1 PAC bus converter 1
L+2 QAC bus converter 1
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14-5
Multi-Terminal dc Line Models PSSE 34
MTDC1T PSSE Model Library
VARs # Description
L+17 Angle converter 3
L+18 VAC bus converter 4
L+19 PAC bus converter 4
L+20 QAC bus converter 4
L+21 VDC converter 4
L+22 IDC converter 4
L+23 Angle converter 4
L+24 VAC bus converter 5
L+25 PAC bus converter 5
L+26 QAC bus converter 5
L+27 VDC converter 5
L+28 IDC converter 5
L+29 Angle converter 5
L+30
L+31
L+32
Internal VARs required by model
L+33
L+34
L+35
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14-6
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC1T
ICONs # Description
Converter 1 flag:1, 2
0 Normal operation
M+1
1 Blocked
2 Unblocking
M+2 Converter 2 flag1, 2
M+3 Converter 3 flag1, 2
M+4 Converter 4 flag1, 2
M+5 Converter 5 flag1, 2
VARs # Description
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14-7
Multi-Terminal dc Line Models PSSE 34
MTDC2T PSSE Model Library
14.2 MTDC2T
Multiterminal (Five Converter) dc Line Model
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14-8
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC2T
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14-9
Multi-Terminal dc Line Models PSSE 34
MTDC2T PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
14-10
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC2T
STATEs # Description
K Measured ac voltage, converter 1
K+1 Measured dc voltage, converter 1
K+2 Measured dc current, converter 1
K+3 Measured ac voltage, converter 2
K+4 Measured dc voltage, converter 2
K+5 Measured dc current, converter 2
K+6 Measured ac voltage, converter 3
K+7 Measured dc voltage, converter 3
K+8 Measured dc current, converter 3
K+9 Measured ac voltage, converter 4
K+10 Measured dc voltage, converter 4
K+11 Measured dc current, converter 4
K+12 Measured ac voltage, converter 5
K+13 Measured dc voltage, converter 5
K+14 Measured dc current, converter 5
K+15 Power controller voltage
K+16 VDCL voltage
VARs # Description
L VAC bus converter 1
L+1 PAC bus converter 1
L+2 QAC bus converter 1
L+3 VDC converter 1
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14-11
Multi-Terminal dc Line Models PSSE 34
MTDC2T PSSE Model Library
VARs # Description
L+15 VDC converter 3
L+16 IDC converter 3
L+17 Angle converter 3
L+18 VAC bus converter 4
L+19 PAC bus converter 4
L+20 QAC bus converter 4
L+21 VDC converter 4
L+22 IDC converter 4
L+23 Angle converter 4
L+24 VAC bus converter 5
L+25 PAC bus converter 5
L+26 QAC bus converter 5
L+27 VDC converter 5
L+28 IDC converter 5
L+29 Angle converter 5
L+30 CRF1 current setpoint multiplier
L+31 CRF2 current setpoint multiplier
L+32 CRF3 current setpoint multiplier
L+33 CRF4 current setpoint multiplier
L+34 CRF5 current setpoint multiplier
L+35 VRF voltage setpoint multiplier
L+36
L+37
L+38
Internal memory
L+39
L+40
L+41
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14-12
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC2T
ICONs # Description
Converter 1 flag:1
0 Normal operation
M+1
1 Blocked
2 Ramp current
M+2 Converter 2 flag1
M+3 Converter 3 flag1
M+4 Converter 4 flag1
M+5 Converter 5 flag1
VARs # Description
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14-13
Multi-Terminal dc Line Models PSSE 34
MTDC2T PSSE Model Library
VAR(LAUX+N-1)=DCMSIG(N,I)
+ VAR(L+29+1)
MDC(I)=2 (See Diagram B)
+
Current Control
SETVAL(N)
Converter
VDCOL(1) DCORDR(1)
VAR(LAUX+N-1)=DCMSIG(N,I)
C0-1
+
106
MDC(I)=1
+ VDCOL(2)
DCORDR(2)
SETVAL(N) VDCP(N) C0-2
VDCP(N) VDCOL(3)
DCORDR(3)
(See Diagram C) C0-3
All Current
Controlling VDCOL(4) DCORDR(4)
Converters C0-4
Voltage Control
SETVAL(N) VDCOL(5)
Converter
+ DCORDR(5)
C0-5
106 +
MARGIN
SETVAL(N) VDCP(N) VAR(L+29+5) (CON(J+78))
All Current (See Diagram B)
Controlling
VDCP(N) Converters
(See Diagram C)
VAR(L+29+1)/SDCPF
VAR(L+29+2)/SDCPF
VAR(L+29+4)/SDCPF
VAR(L+29+5)/SDCPF
Diagram A
Block Diagram Assuming Converter #5 is a Voltage Controlling Converter
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14-14
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC2T
1 1 1 1 1
S S S S S
Diagram B
Current Ramping
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14-15
Multi-Terminal dc Line Models PSSE 34
MTDC2T PSSE Model Library
VDC of Voltage
Controlling Converter VDC of Voltage
VAR(L+35) Controlling Converter
V3 of Voltage
Controlling Converter
1 1 CON(J+76) Up
CON(J+75)
1 + sTVF 1 + sTVDCOL CON(J+77) Down
1000*VCMODE(I) V1 of Voltage
Controlling Converter
Calculated Upon
Initialization VDCOL Limits
VAR VAR VAR VAR VAR CON CON CON CON CON
(L+35+1) (L+35+2) (L+35+3) (L+35+4) (L+35+5) (J+9/J+14) (J+24/J+29) (J+39/J+44) (J+54/J+59) (J+69/J+74)
VDCP(1) VDCP(2) VDCP(3) VDCP(4) VDCP(5) VDCOL(1) VDCOL(2) VDCOL(3) VDCOL(4) VDCOL(5)
Diagram C
Converter Power Controller and
Voltage-Dependent Current Limiter
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14-16
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC2T
VAR(L+35) 1.0
1
S
RSVLT of Voltage
Controlling Converter
(VSCHED(I)
ICON(M)=2 or
ICON(M+6)=1
VRAMP of Voltage
Controlling Converter
Diagram D
dc Voltage Setpoint Control
VDC VDC
A = B*CON(J+78+N)
MARGIN MARGIN
(CON(J+78)) (CON(J+78))
IDC IDC
DCORDR DCORDR
Rectifier Inverter
Diagram E
Converter Characteristics
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14-17
Multi-Terminal dc Line Models PSSE 34
MTDC3T PSSE Model Library
14.3 MTDC3T
Multiterminal (Eight Converter) dc Line Model
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14-18
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC3T
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
14-19
Multi-Terminal dc Line Models PSSE 34
MTDC3T PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
14-20
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC3T
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
14-21
Multi-Terminal dc Line Models PSSE 34
MTDC3T PSSE Model Library
STATEs # Description
K Measured ac voltage, converter 1
K+1 Measured dc voltage, converter 1
K+2 Measured dc current, converter 1
K+3 Measured ac voltage, converter 2
K+4 Measured dc voltage, converter 2
K+5 Measured dc current, converter 2
K+6 Measured ac voltage, converter 3
K+7 Measured dc voltage, converter 3
K+8 Measured dc current, converter 3
K+9 Measured ac voltage, converter 4
K+10 Measured dc voltage, converter 4
K+11 Measured dc current, converter 4
K+12 Measured ac voltage, converter 5
K+13 Measured dc voltage, converter 5
K+14 Measured dc current, converter 5
K+15 Measured ac voltage, converter 6
K+16 Measured dc voltage, converter 6
K+17 Measured dc current, converter 6
K+18 Measured ac voltage, converter 7
K+19 Measured dc voltage, converter 7
K+20 Measured dc current, converter 7
K+21 Measured ac voltage, converter 8
K+22 Measured dc voltage, converter 8
K+23 Measured dc current, converter 8
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14-22
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC3T
VARs # Description
L VAC bus converter 1
L+1 PAC bus converter 1
L+2 QAC bus converter 1
L+3 VDC converter 1
L+4 IDC converter 1
L+5 Angle converter 1
L+6 VAC bus converter 2
L+7 PAC bus converter 2
L+8 QAC bus converter 2
L+9 VDC converter 2
L+10 IDC converter 2
L+11 Angle converter 2
L+12 VAC bus converter 3
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14-23
Multi-Terminal dc Line Models PSSE 34
MTDC3T PSSE Model Library
VARs # Description
L+32 QAC bus converter 6
L+33 VDC converter 6
L+34 IDC converter 6
L+35 Angle converter 6
L+36 VAC bus converter 7
L+37 PAC bus converter 7
L+38 QAC bus converter 7
L+39 VDC converter 7
L+40 IDC converter 7
L+41 Angle converter 7
L+42 VAC bus converter 8
L+43 PAC bus converter 8
L+44 QAC bus converter 8
L+45 VDC converter 8
L+46 IDC converter 8
L+47 Angle converter 8
L+48
.
. Internal VARs required by model
.
L+56
ICONs # Description
Converter 1 flag:1, 2
0 Normal operation
M+1
1 Blocked
2 Unblocking
M+2 Converter 2 flag1, 2
M+3 Converter 3 flag1, 2
M+4 Converter 4 flag1, 2
M+5 Converter 5 flag1, 2
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14-24
PSSE 34 Multi-Terminal dc Line Models
PSSE Model Library MTDC3T
ICONs # Description
VARs # Description
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14-25
Multi-Terminal dc Line Models PSSE 34
MTDC3T PSSE Model Library
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14-26
Chapter 15
VSC dc Line Models
This chapter contains a collection of data sheets for the VSC dc line models contained in the PSSE
Chapter 15 - VSC dc Line Models
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15-1
VSC dc Line Models PSSE 34
HVDCPL1 PSSE Model Library
15.1 HVDCPL1
Siemens VSC DC line model for the HVDC Plus
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15-2
PSSE 34 VSC dc Line Models
PSSE Model Library HVDCPL1
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15-3
VSC dc Line Models PSSE 34
HVDCPL1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
15-4
PSSE 34 VSC dc Line Models
PSSE Model Library HVDCPL1
STATEs # Description
K Rectifier Q-control lead-lag
K+1 Rectifier Q-control integrator
K+2 Ud-control lead-lag 1
K+3 Ud-control lead-lag 2
K+4 Ud-control integrator
K+5 Inverter POI synchronisation angle [deg]
K+6 Inverter Q-control lead-lag
K+7 Inverter Q-control integrator
K+8 Rectifier capacitor voltage [V]
K+9 Rectifier DC line current [A]
K+10 Voltage of the DC line's equivalent capacitor [V]
K+11 Inverter DC line current [A]
K+12 Inverter capacitor voltage [V]
K+13 Inverter P-control lead-lag 1 (used only for an Interconnected application)
K+14 Inverter P-control lead-lag 2 (used only for an Interconnected application)
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15-5
VSC dc Line Models PSSE 34
HVDCPL1 PSSE Model Library
STATEs # Description
K+15 Inverter P-control integrator (used only for an Interconnected application)
K+16 Rectifier POI synchronisation angle [deg]
K+17 Inverter P-control rate limiter (used only for an Interconnected application)
VARs # Description
L Rectifier Q-reference [pu of rectifier MVA rating]
L+1 Inverter Ud-reference [V] (only for a WP application)
L+2 Inverter Q-reference [pu of rectifier MVA rating]
Rectifier Q at the Point of Interconnection (POI) [pu of rectifier MVA
L+3
rating]
L+4 Inverter voltage phase angle [rad]
L+5 Inverter Q at the POI [pu of rectifier MVA rating]
L+6 AC voltage reference [pu] (inverter Q-control)
L+7 Rectifier voltage magnitude [p.u.]
L+8 Inverter voltage magnitude [pu]
L+9 Rectifier voltage phase angle [rad]
L+10 Inverter direct current [A]
L+11 Rectifier direct current [A]
L+12 Chopper current [A]
L+13 Limit of the active power setting value [pu]
L+14 Rectifier active power at the POI [pu of rectifier MVA rating]
L+15 Setpoint of the rectifier voltage magnitude [pu]
L+16 Rectifier AC current [kA peak]
L+17 Inverter AC current [kA peak]
L+18 Setpoint of the inverter voltage magnitude [pu]
L+19 AC voltage reference [pu] rectifier Q-control)
L+20 Inverter active power at the POI [pu of inverter MVA rating]
L+21 Rectifier Vd-reference [V], used only for Interconnected application
Inverter real power-reference from the load flow [pu of inverter MVA
L+22
rating]
L+23 ...
Internal storage
L+26
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15-6
PSSE 34 VSC dc Line Models
PSSE Model Library HVDCPL1
1. The model is suitable for time step increments in the range of 1ms - 10ms.
2. The converter transformer is a part of the model. It's reactance is used internally.
3. The model does not have provision for auxiliary signals (like damping controllers etc.).
4. Converter losses can be considered using the Aloss and Bloss coefficients, which are
part of the VSC load flow data power record.
5. The respective VSC load flow model must not have a converter MVA rating (SMAX) of
zero. If the user specifies a converter MVA rating of zero the model is ignored.
6. The DC chopper characteristics are required only for Wind park application. For inter-
connected applications, the 10 pairs of (X,Y) points representing the DC chopper
characteristics can be set to zero.
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15-7
VSC dc Line Models PSSE 34
HVDCPL1 PSSE Model Library
Model Configuration
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15-8
PSSE 34 VSC dc Line Models
PSSE Model Library HVDCPL1
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15-9
VSC dc Line Models PSSE 34
HVDCPL1 PSSE Model Library
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15-10
PSSE 34 VSC dc Line Models
PSSE Model Library VSCDCT
15.2 VSCDCT
VSC DC Model with Two VSC Converters
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15-11
VSC dc Line Models PSSE 34
VSCDCT PSSE Model Library
STATEs # Description
P_ref_pu, Active power reference auxiliary input, pu on CONVERTER
K
MVA RATING (For VSC # 1).
Uac_int, AC Voltage controller integral output, pu on converter MVA rating
K+1
(For VSC # 1.
K+2 Uac_p_filt, AC voltage measured, pu (For VSC # 1).
P_ref_pu, Active power reference auxiliary input, pu on converter MVA
K+3
rating (For VSC # 2).
Uac_int, AC Voltage controller integral output, pu on converter MVA rating
K+4
(For VSC # 2).
K+5 Uac_p_filt, AC voltage measured, pu (For VSC # 2).
K+6 P_ret_pu, Power Order, pu on SBASE (For DC Line).
K+7 Plimit, Power Order Limit, pu on SBASE (For DC Line).
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15-12
PSSE 34 VSC dc Line Models
PSSE Model Library VSCDCT
VARs # Description
P_aux, Active power reference auxiliary order, MW (For VSC # 1); uses
L
auxiliary signal index # 1
L+6 Q_ref, Reactive power order, pu on converter MVA rating (For VSC # 1).
L+7 P_ref, Interface Active power, pu on SBASE (For VSC # 1).
L+10 PELE, Active power, pu on SBASE (For VSC # 1).
L+11 QELE, Reactive power, pu on SBASE (For VSC # 1).
P_aux, Active power reference auxiliary order, MW (For VSC # 2); uses
L+12
auxiliary signal index # 2
L+18 Q_ref, Reactive power order, pu on converter MVA rating (For VSC # 2).
L+19 P_ref, Interface Active power, pu on SBASE (For VSC # 2).
L+22 PELE, Active power, pu on SBASE (For VSC # 2).
L+23 QELE, Reactive power, pu on SBASE (For VSC # 2).
L+24 P_ref_main, Active power main order, pu on SBASE (For DC Line).
L+32 Pzero_loss, DC system losses at zero current, MW (For DC Line).
L+33 Pdc_loss, DC losses, MW (For DC Line).
L+34
Isormod History, PSSE Variables for internal usage as well as: L+1
through L+5, L+8, L+9, L+13 through L+17, L+20, L+21, L+25 through
L+31.
L+45
Note: Smax (Converter MVA rating) should be non-zero in power flow input data when VSCDCT
model is used for stability simulations.
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15-13
VSC dc Line Models PSSE 34
VSCDCT PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
15-14
Chapter 16
FACTS Device Models
This chapter contains a collection of data sheets for the FACTS device (device modeled as FACTS
Chapter 16 - FACTS Device Models
Model Description
CSTCNT Static Condenser (modeled as FACTS device in power flow).
SVSMO3T2 WECC Generic STATCOM based SVC model
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16-1
FACTS Device Models PSSE 34
CSTCNT PSSE Model Library
16.1 CSTCNT
FACTS Device Static Condenser (STATCON)
25
J+4 K typical = ------------------
dv de i
STATEs # Description
K First regulator
K+1 Second regulator
K+2 Integrator
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16-2
PSSE 34 FACTS Device Models
PSSE Model Library CSTCNT
VARs # Description
|V| : Voltage of the regulated bus, |VT| : Voltage at the STATCON bus.
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16-3
FACTS Device Models PSSE 34
CSTCNT PSSE Model Library
where:
ICMAX = ICMAX when |VT| Vcutout
I CMAX V T
= -------------------------------
- otherwise
V cutout
I LMAX V T
= ------------------------------
- otherwise
V cutout
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16-4
PSSE 34 FACTS Device Models
PSSE Model Library SVSMO3T2
16.2 SVSMO3T2
WECC Generic STATCOM based SVC model
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16-5
FACTS Device Models PSSE 34
SVSMO3T2 PSSE Model Library
STATEs # Description
K+1 STATCOM main PI controller integrator
K+2 STATCOM output Lag
STATCOM slow-reset PI controller
K+3
integrator
K+4 Short-term rating integrator
K+5 Lead-lag block
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16-6
PSSE 34 FACTS Device Models
PSSE Model Library SVSMO3T2
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16-7
FACTS Device Models PSSE 34
SVSMO3T2 PSSE Model Library
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16-8
Chapter 17
Generic Renewable
Generator/Converter Models
This chapter contains a collection of data sheets for the generic wind generator models contained
Chapter 17 - Generic Renewable Generator/Converter Models
Model Description
PVGU1 User written generator model to represent photo-voltaic (PV) systems
REGCA1 Renewable Energy Generator/Converter Model
WT1G1 Direct connected (Type 1) generator
WT2G1 Induction generator with controlled external rotor resistor (Type 2)
WT3G1 Doubly-fed induction generator (Type 3)
WT3G2 Doubly-fed induction generator (Type 3), version 2
WT4G1 Wind generator model with power converter (Type 4)
WT4G2 Wind generator model with power converter (Type 4), version 2
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17-1
Generic Renewable Generator/Converter Models PSSE 34
PVGU1 PSSE Model Library
17.1 PVGU1
PV Converter
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17-2
PSSE 34 Generic Renewable Generator/Converter Models
PSSE Model Library REGCA1
17.2 REGCA1
Renewable Energy Generator/Converter Model
STATEs # Description
K Converter lag for Ipcmd
K+1 Converter lag for Iqcmd
K+2 Voltage filter for low voltage active current management
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Generic Renewable Generator/Converter Models PSSE 34
REGCA1 PSSE Model Library
VARs # Description
L Previous terminal voltage
L+1 Previous terminal voltage angle
L+2 reactive current overvoltage correction
L+3 Initial machine reactive power from power flow
CON # Description
Lvplsw (Low Voltage Power Logic) switch (0: LVPL not present,
M
1: LVPL present)
1. This model can be used with Type 3 and 4 wind machines. When used for modeling of
Type 3 wind machine, the other models to be used along with this model are reeca1,
repcta1 (optional), wtdta1, wtpta1, wtara1, and wttqa1. When used for modeling of
Type 4 machines, the other models to be used along with this model are reeca1,
wtdta1, and repca1 (optional).
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17-4
PSSE 34 Generic Renewable Generator/Converter Models
PSSE Model Library REGCA1
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17-5
Generic Renewable Generator/Converter Models PSSE 34
WT1G1 PSSE Model Library
17.3 WT1G1
Direct Connected (Type 1) Generator
STATEs # Description
K Eq, transient flux q-component
K+1 Ed, transient flux d-component
K+2 Eq, subtransient flux q-component
K+3 Ed, subtransient flux d-component
K+4 Internal
VARs # Description
Admittance of initial condition MVAr
L
difference
L+1 Machine Q
L+2 Telec
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17-6
PSSE 34 Generic Renewable Generator/Converter Models
PSSE Model Library WT2G1
17.4 WT2G1
Induction Generator with Controlled External Rotor Resistor (Type 2)
STATEs # Description
K Eq, transient flux q-component
K+1 Ed, transient flux d-component
K+2 Internal
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17-7
Generic Renewable Generator/Converter Models PSSE 34
WT2G1 PSSE Model Library
VARs # Description
L Admittance of the hidden shunt
L+1 Machine Q
L+2 Telec
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17-8
PSSE 34 Generic Renewable Generator/Converter Models
PSSE Model Library WT3G1
17.5 WT3G1
Doubly-Fed Induction Generator (Type 3)
STATEs # Description
K Converter lag for Ipcmd
K+1 Converter lag for Eqcmd
K+2 PLL first integrator
K+3 PLL second integrator
VARs # Description
Vx, Real component of Vterm in
L
generator ref. frame
VY, Imaginary component of Vterm in
L+1
generator ref. frame
Ixinj, Active component of the injected
L+2
current
Iyinj, Reactive component of the
L+3
injected current
ICON # Description
M Number of lumped wind turbines
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17-9
Generic Renewable Generator/Converter Models PSSE 34
WT3G1 PSSE Model Library
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17-10
PSSE 34 Generic Renewable Generator/Converter Models
PSSE Model Library WT3G2
17.6 WT3G2
Doubly-Fed Induction Generator (Type 3)
STATEs # Description
K Converter lag for Ipcmd
K+1 Converter lag for Iqcmd
K+2 PLL first integrator
K+3 PLL second integrator
K+4 Voltage sensor for LVPL
VAR # Description
L deltaQ, overvoltage correction factor
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17-11
Generic Renewable Generator/Converter Models PSSE 34
WT3G2 PSSE Model Library
ICON # Description
M Number of lumped wind turbines
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17-12
PSSE 34 Generic Renewable Generator/Converter Models
PSSE Model Library WT4G1
17.7 WT4G1
Wind Generator Model with Power Converter (Type 4)
STATEs # Description
K Converter lag for Ipcmd
K+1 Converter lag for Eqcmd
K+2 Voltage sensor for LVACR
VARs # Description
L through
For internal use
L+4
L+1 VAACC, previous Vterm angle
L+2 deltaQ, overvoltage correction factor
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17-13
Generic Renewable Generator/Converter Models PSSE 34
WT4G1 PSSE Model Library
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17-14
PSSE 34 Generic Renewable Generator/Converter Models
PSSE Model Library WT4G2
17.8 WT4G2
Wind Generator Model with Power Converter (Type 4)
STATEs # Description
K Converter lag for Ipcmd
K+1 Converter lag for Eqcmd
K+2 Voltage sensor for LVACR
VARs # Description
L through
For Internal Use
L+4
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17-15
Generic Renewable Generator/Converter Models PSSE 34
WT4G2 PSSE Model Library
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17-16
Chapter 18
Generic Renewable Electrical Control
Models
This chapter contains a collection of data sheets for the generic wind electrical models contained in
Chapter 18 - Generic Renewable Electrical Control Models
Model Description
PVEU1 User written electrical control model for photo-voltaic (PV) systems
REECA1 Renewable Energy Electrical Model
REECB1 Renewable Energy Electrical Control model (for large scale PV)
WT2E1 Rotor resistance control model for Type 2 wind generator
WT3E1 Electrical control for Type 3 wind generator
WT4E1 Electrical control models for Type 4 wind generator
WT4E2 Electrical control for Type 4 wind generator, version 2
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18-1
Generic Renewable Electrical Control Models PSSE 34
PVEU1 PSSE Model Library
18.1 PVEU1
Electrical Control Model for PV Converter
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18-2
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library PVEU1
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18-3
Generic Renewable Electrical Control Models PSSE 34
PVEU1 PSSE Model Library
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18-4
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library REECA1
18.2 REECA1
Generic Renewable Electrical Control Model
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18-5
Generic Renewable Electrical Control Models PSSE 34
REECA1 PSSE Model Library
STATEs # Description
K Voltage Measurement filter
K+1 Real power filter
K+2 PI controller for reactive power
K+3 PI controller for voltage error
K+4 First Order lag for reactive current
K+5 First order lag for Pord
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18-6
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library REECA1
VARs # Description
L Bus reference voltage (Vref0)
Storage of current state for state transition
L+1
(possible values: 0, 1 or 2)
L+2 Power factor reference angle (pfaref), radians
L+3 user defined bias as calculated by the model
L+4 Timer for Thld counter
L+5 Previous value of power reference
L+6 Stored Ipmax value
L+7 Timer for Thld2 counter
L+8 Storage for voltage_dip
ICONs # Description
M Bus number for voltage control; local control if 0
PFFLAG (Power factor control flag):
M+1 1 if power factor control
0 if Q control (which can be controlled by an external signal)
VFLAG:
M+2 1 if Q control
0 if voltage control
QFLAG:
M+3 1 if voltage or Q control
0 if constant pf or Q control
PFLAG:
M+4 1 if active current command has speed dependency
0 for no dependency
PQFLAG, P/Q priority flag for current limit:
M+5 0 for Q priority
1 for P priority
Notes:
1. This model can be used with Type 3 and 4 wind machines. When used for modeling of
Type 3 wind machine, the other models to be used along with this model are regca1,
repcta1 (optional), wtdta1, wtpta1, wtara1, wttqa1. When used for modeling of Type 4
machines, the other models to be used along with this control model are regca1,
wtdta1, and repca1 (optional).
2. When used for modeling Type 3 machines set Pflag (i.e., ICON (M+4)) to 0. Speed
dependency will be simulated by the Torque controller (WTTQA1).
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18-7
Generic Renewable Electrical Control Models PSSE 34
REECA1 PSSE Model Library
3. Thld could be either zero, or less than zero or greater than zero.
a) If Thld > 0, then once voltage_dip (voltage_dip is a flag which is set and reset
in the model. Voltage_dip is 0 if the Vdip<VT<Vup, else it is 1) becomes 0, Iqinj
is held at Iqfrz for Thld seconds.
b) If Thld < 0, then once voltage_dip goes to 0, Iqinj remains state (equal to Iqv)
for Thld seconds.
4. pfaref (the power factor angle reference) value is initialized by the model based on ini-
tial real and reactive power outputs from the machine.
5. g is the per unit generator speed and is set in the drive train model.
6. Qref is initialized by the model to a constant or can be connected to an external plant
controller model).
8. Normally Vbias is zero. The user specified Vbias value (which is in CON(J+21)) is used
only when the QFlag=1, VFlag=0 and PfFlag=0. For all other combinations of QFlag,
VFlag and PfFlag values, the Vbias value is either not required or is calculated and
stored in VAR(L+3).
9. ICON(M) contains the remote bus number. If this is 0 or if the remote bus number is not
specified then the local bus is used for control.
10. The VDL1 characteristics are defined by 4 pairs of Vq-Iq points (pu voltage versus
reac-tive current). Data for the first two pairs (Vq1, Iq1) and (Vq2, Iq2) is mandatory
(i.e., these cannot be specified as zero). A maximum of 4 pairs of Vq-Iq points can be
speci-fied. The first Vq entry that has a zero value, signals the end of Vq-Iq data.
Unused Vq-Iq pairs should be entered as zero. The Vq-Iq values should be such that
Vq1 < Vq2 < Vq3 < Vq4, and Iq1 < Iq2 < Iq3 < Iq4.
11. The VDL2 characteristics are defined by 4 pairs of Vp-Ip points (pu voltage versus
active current). Data for the first two pairs (Vp1, Ip1) and (Vp2, Ip2) is mandatory (i.e.,
these cannot be specified as zero). A maximum of 4 pairs of Vp-Ip points can be spec-
ified. The first Vp entry that has a zero value, signals the end of Vp-Ip data. Unused Vp-
Ip pairs should be entered as zero. The Vp-Ip values should be such that Vp1 < Vp2 <
Vp3 < Vp4, and Ip1 < Ip2 < Ip3 < Ip4.
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18-8
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library REECA1
Iqinj=0
s,
If v
go to second
olta
0
state
ge_
If (VT < Vdip) or (Vt >Vup) Voltage_dip =1
=0
Thld
else Voltage_dip =0
_dip
dip
=1
ge
After
State Transition switch position
olta
State 0 If Voltage_dip = 0; normal operation (Iqinj = 0)
If v
State 1 If Voltage_dip = 1; lqinj goes to position 1
State 2 If Thid > 0; then after voltage_dip goes back to
Iqinj=Iqfrz Iqinj=Iqv zero, set value to lqfrz for Thld seconds, after
which go back to state 0
1 If Thld <0, then after voltage_dip returns to zero
2
stay in State 1 for 1- Thld, after which go back to
state 0.
Stay in state 2 for
Thld seconds
If Thld > 0 &
voltage_dip=0, go to state
2
lql1
lqh1
+
s0 1
2 0
(lqfrz)
Vref0
(Iqinj=0)
Freeze State if Voltage_dp = 1
lqmax lqinj
pfaref tan Vmax
Qmax + lqmax
Vmax
1 VFlag QFlag
1 + Kqp + Kqi 1 + Kvp + Kvi 1
Pelec 1 + s Tp
s s
lqcmd
s1 Qref 0 - - 0
Qmin s2 s3 lqmin
PfFlag 0 Vmin
Vmin lqmin
s4
0.01
Vt_filt
(s0)
g Pmax
Ipmax
dPmax
PFlag 1 Pord
1
Pref 1 + s Tpord Ipcmd
s5 0
dPmin 0 Pmin
(VDL1) (VDL2)
(Vq3,Iq3) (Vq4,Iq4) (Vp3,Ip3) (Vp4,Ip4)
(Vq2,Iq2) (Vp2,Ip2)
(Vq1,Iq1) (Vp1,Ip1)
Vq (pu) Vp (pu)
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18-9
Generic Renewable Electrical Control Models PSSE 34
REECB1 PSSE Model Library
18.3 REECB1
Electrical Control Model for Large Scale PV
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PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library REECB1
STATEs # Description
K Voltage Measurement filter
K+1 Real power filter
K+2 PI controller for reactive power
K+3 PI controller for voltage error
K+4 First Order lag for reactive current
K+5 First order lag for TPord
VARs # Description
L Bus reference voltage (Vref0)
Power factor reference angle
L+1
(pfaref), radians
L+2 Real current command (Ipcmd)
L+3 Reactive current command (Iqcmd)
ICONs # Description
Bus number for voltage control; local
M
control if 0
PFFLAG (Power factor control flag):
1 if power factor control
M+1
0 if Q control (which can be controlled
by an external signal)
VFLAG:
M+2 1 if Q control
0 if voltage control
QFLAG:
M+3 1 if voltage or Q control
0 if constant pf or Q control
PQFLAG, P/Q priority flag for current
limit:
M+4
0 for Q priority
1 for P priority
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18-11
Generic Renewable Electrical Control Models PSSE 34
REECB1 PSSE Model Library
Notes:
1. pfaref (the power factor angle reference) value is initialized by the model based on ini-
tial real and reactive power outputs from the machine.
4. ICON(M) contains the remote bus number. If this is 0 or if the remote bus number is not
specified then the local bus is used for control.
5. In using REECB1 to model large scale PV, the other models to be used along with this
model are REGCA1 and REPCA1 (optional)
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18-12
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT2E1
18.4 WT2E1
Rotor Resistance Control Model for the Type 2 Wind Generator
STATEs # Description
K Rotor speed filter
K+1 Power filter
K+2 PI integrator
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18-13
Generic Renewable Electrical Control Models PSSE 34
WT3E1 PSSE Model Library
18.5 WT3E1
Electrical Control for Type 3 Wind Generator (for WT3G1 and WT3G2)
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PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT3E1
STATEs # Description
K Filter in voltage regulator
K+1 Integrator in voltage regulator
K+2 Filter in torque regulator
K+3 Integrator in torque regulator
K+4 Voltage sensor
K+5 Power filter
K+6 MVAR/Vref integrator
K+7 Verror/internal machine voltage integrator
K+8 Lag of the WindVar controller
K+9 Input filter of Pelec for PF fast controller
VARs # Description
L Remote bus ref voltage
L+1 MVAR order from MVAR emulator
L+2 Q reference if PFAFLG=0 & VARFLG=0
L+3 PF angle reference if PFAFLG=1
L+4 Storage of MW for computation of compensated voltage
L+5 Storage of MVAR for computation of compensated voltage
L+6 Storage of MVA for computation of compensated voltage
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18-15
Generic Renewable Electrical Control Models PSSE 34
WT3E1 PSSE Model Library
ICONs # Description
M Remote bus # for voltage control; 0 for local voltage control
VARFLG:
M+1 0 Constant Q control
1 Use Wind Plant reactive power control
-1 Constant power factor control
VLTFLG:
0 Bypass terminal voltage control
M+21 1 Eqcmd limits are calculated as VTerm + XIQmin and
VTerm + XIQmax,
i.e., limits are functions of terminal voltage
2 Eqcmd limits are equal to XIQmin and XIQ max
M+3 From bus of the interconnection transformer
M+4 To bus of the interconnection transformer
M+5 Interconnection transformer ID
1 WT3E1 model can be used with WT3G1 as well as WT3G2 models. When used with WT3G1
model, it is recommended that ICON(M+2) be set to 1; and when used with WT3G2 model,
the ICON(M+2) be set to 2.
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PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT3E1
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18-17
Generic Renewable Electrical Control Models PSSE 34
WT4E1 PSSE Model Library
18.6 WT4E1
Electrical Control for Type 4 Wind Generator
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PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT4E1
STATEs # Description
K Filter in voltage regulator
K+1 Integrator in voltage regulator
K+2 Integrator in active power regulator
K+3 Active power regulator feedback
K+4 Voltage sensor
K+5 Power filter
K+6 MVAR/Vref integrator
K+7 Verror/Internal machine voltage integrator
K+8 Lag of the WindVar controller
K+9 Input filter of Pelec for PF fast controller
VARs # Description
L Remote bus reference voltage
L+1 Q reference if PFAFLG=0 & VARFLG=0
L+2 PFangle reference if PFAFLG=1
L+3 Power reference
ICONs # Description
M Remote bus # for voltage control; 0 for local control
PFAFLG:
M+1 1 if PF fast control enabled
0 if PF fast control disabled
VARFLG:
1 if Qord is provided by WindVar
M+2
0 if Qord is not provided by WindVar
if VARFLG=PFAFLG=0 then Qord is provided as a Qref=const
PQFLAG, P/Q priority flag:
M+3 0 Q priority
1 P priority
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18-19
Generic Renewable Electrical Control Models PSSE 34
WT4E1 PSSE Model Library
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18-20
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT4E1
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18-21
Generic Renewable Electrical Control Models PSSE 34
WT4E2 PSSE Model Library
18.7 WT4E2
Electrical Control for Type 4 Wind Generator
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18-22
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT4E2
STATEs # Description
K Filter in voltage regulator
K+1 Integrator in voltage regulator
K+2 Integrator in active power regulator
K+3 Active power regulator feedback
K+4 Voltage sensor
K+5 Power filter
K+6 MVAR/Vref integrator
K+7 Verror/Internal machine voltage integrator
K+8 Lag of the WindVar controller
K+9 Input filter of Pelec for PF fast controller
K+10 IQmax filter
VARs # Description
L Remote bus reference voltage
L+1 Q reference if PFAFLG=0 & VARFLG=0
L+2 PFangle reference if PFAFLG=1
L+3 Power reference
ICONs # Description
M Remote bus # for voltage control; 0 for local control
PFAFLG:
M+1 1 if PF fast control enabled
0 if PF fast control disabled
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18-23
Generic Renewable Electrical Control Models PSSE 34
WT4E2 PSSE Model Library
ICONs # Description
VARFLG:
1 if Qord is provided by WindVar
M+2
0 if Qord is not provided by WindVar
if VARFLG=PFAFLG=0 then Qord is provided as a Qref=const
PQFLAG, P/Q priority flag:
M+3 0 Q priority
1 P priority
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18-24
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT4E2
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18-25
Generic Renewable Electrical Control Models PSSE 34
WT4E2 PSSE Model Library
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18-26
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT4E2
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18-27
Generic Renewable Electrical Control Models PSSE 34
WT4E2 PSSE Model Library
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18-28
PSSE 34 Generic Renewable Electrical Control Models
PSSE Model Library WT4E2
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18-29
Generic Renewable Electrical Control Models PSSE 34
WT4E2 PSSE Model Library
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18-30
Chapter 19
Generic Renewable Drive Train
Models
This chapter contains a collection of data sheets for the generic wind mechanical models contained
Chapter 19 - Generic Renewable Drive Train Models
Model Description
User written model to represent the linearized model of PV panels
PANELU1
output curve
WT12T1 Two mass turbine model for Type 1 and Type 2 wind generators
WT3T1 Mechanical system model for Type 3 wind generator
WTDTA1 Wind turbine Mechanical system model
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19-1
Generic Renewable Drive Train Models PSSE 34
PANELU1 PSSE Model Library
19.1 PANELU1
PV I-P Characteristics
CONs # Description
PDCMAX200, maximum power of
J panel at an irradiance of 200 W/m2, pu
on PDCMAX1000 base
PDCMAX400, maximum power of
J+1 panel at an irradiance of 400 W/m2,
pu on PDCMAX1000 base
PDCMAX600, maximum power of
J+2 panel at an irradiance of 600 W/m2, pu
on PDCMAX1000 base
PDCMAX800, maximum power of
J+3 panel at an irradiance of 800 W/m2, pu
on PDCMAX1000 base
PDCMAX1000, maximum power of
J+4 panel at an irradiance of 1000 W/m2,
pu on PDCMAX1000 base
VARs # Description
L DC power from PV array
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19-2
PSSE 34 Generic Renewable Drive Train Models
PSSE Model Library WT12T1
19.2 WT12T1
Two-Mass Turbine Model for Type 1 and Type 2 Wind Generators
STATEs # Description
K Shaft twist angle, rad.
K+1 Turbine rotor speed deviation, pu
K+2 Generator speed deviation, pu
K+3 Generator rotor angle deviation, pu
VARs # Description
L Paero on the rotor blade side, pu
L+1 Initial rotor slip
L+2 Initial internal angle
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19-3
Generic Renewable Drive Train Models PSSE 34
WT12T1 PSSE Model Library
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19-4
PSSE 34 Generic Renewable Drive Train Models
PSSE Model Library WT3T1
19.3 WT3T1
Mechanical System Model for Type 3 Wind Generator (for WT3G1 and WT3G2)
STATEs # Description
K Shaft twist angle, rad.
K+1 Turbine rotor speed deviation, pu
K+2 Generator speed deviation, pu
K+3 Generator rotor angle deviation, pu
VARs # Description
L Paero on the rotor blade side, pu
L+1 Initial rotor slip
L+2 Initial internal angle
L+3 Initial pitch angle
L+4 Paero initial
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19-5
Generic Renewable Drive Train Models PSSE 34
WT3T1 PSSE Model Library
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19-6
PSSE 34 Generic Renewable Drive Train Models
PSSE Model Library WTDTA1
19.4 WTDTA1
Generic Drive Train Model for Type 3 and Type 4 Wind Machines
STATEs # Description
K Shaft twist angle, rad.
K+1 Turbine rotor speed deviation, pu
K+2 Generator speed deviation, pu
K+3 Generator rotor angle deviation, pu
VARs # Description
L Aero-dynamic power on rotor blade, pu
L+1 Initial rotor slip
L+2 Initial internal angle
2. This model can be used with Type 3 and 4 wind machines. When used for modeling of
Type 3 wind machine, the other models to be used along with the drive train control
model are regca1, reeca1, repcta1 (optional), wtpta1, wtara1, wttqa1. When used for
modeling of Type 4 machines, the other models to be used along with the drive train
control model are regca1, reeca1, repca1 (optional).
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19-7
Generic Renewable Drive Train Models PSSE 34
WTDTA1 PSSE Model Library
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19-8
Chapter 20
Generic Renewable Pitch Control
Models
This chapter contains a collection of data sheets for the generic wind pitch control models contained
Chapter 20 - Generic Renewable Pitch Control Models
Model Description
User written model to represent the linearized model of PV panels
IRRADU1
solar irradiance profile.
WT3P1 Pitch control model for Type 3 wind generator
WTPTA1 Wind Turbine Pitch Control model
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20-1
Generic Renewable Pitch Control Models PSSE 34
IRRADU1 PSSE Model Library
20.1 IRRADU1
PV Irradiance Profile
CONs # Description
J TIME1, Time of first data point, sec
J+1 IRRADIANCE1, Irradiance at first data point, W/m2
J+2 TIME2, Time of second data point, sec
J+3 IRRADIANCE2, Irradiance at second data point, W/m2
J+4 TIME3, Time of third data point, sec
J+5 IRRADIANCE3, Irradiance at third data point, W/m2
J+6 TIME4, Time of forth data point, sec
J+7 IRRADIANCE4, Irradiance at forth data point, W/m2
J+8 TIME5, Time of fith data point, sec
J+9 IRRADIANCE5, Irradiance at fith data point, W/m2
J+10 TIME6, Time of sixth data point, sec
J+11 IRRADIANCE6, Irradiance at sixth data point, W/m2
J+12 TIME7, Time of seventh data point, sec
J+13 IRRADIANCE7, Irradiance at seventh data point, W/m2
J+14 TIME8, Time of eigth data point, sec
J+15 IRRADIANCE8, Irradiance at eigth at point, W/m2
J+16 TIME9, Time of ninth data point, sec
J+17 IRRADIANCE9, Irradiance at ninth data point, W/m2
J+18 TIME10, Time of tenth data point, sec
J+19 IRRADIANCE10, Irradiance at tenth data point, W/m2
NOTE: A maximum of 10 pairs of time versus irradiance may be specified. The unused pairs should
be entered as zero. TIME1 should be greater than 0 as the initial irradiance calculated from the
load flow output.
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20-2
PSSE 34 Generic Renewable Pitch Control Models
PSSE Model Library WT3P1
20.2 WT3P1
Pitch Control Model for Type 3 Wind Generator (for WT3G1 and WT3G2)
Note: When a WT operates with a partial output, the DSTATE(K+2) may show
INITIAL CONDITION SUSPECT. In this case no actions are needed.
STATEs # Description
K Output lag
K+1 Pitch control
K+2 Pitch compensation
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20-3
Generic Renewable Pitch Control Models PSSE 34
WT3P1 PSSE Model Library
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20-4
PSSE 34 Generic Renewable Pitch Control Models
PSSE Model Library WTPTA1
20.3 WTPTA1
Generic Pitch Control Model for Type 3 Wind Generator
STATEs # Description
K Output lag
K+1 Pitch control
K+2 Pitch compensation
VARs # Description
L Initial value of Pord
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20-5
Generic Renewable Pitch Control Models PSSE 34
WTPTA1 PSSE Model Library
Notes:
1. In modeling a Type 3 wind machine, the other models to be used along with this model
are regca1, reeca1, repcta1 (optional), wtdta1, wtara1, wttqa1.
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20-6
Chapter 21
Generic Renewable Aerodynamic
Models
This chapter contains a collection of data sheets for the generic aerodynamic wind models con-
Chapter 21 - Generic Renewable Aerodynamic Models
Model Description
WT12A1 Pseudo-governor model for Type 1 and Type 2 wind generators
WTARA1 Wind Turbine Aerodynamic model
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21-1
Generic Renewable Aerodynamic Models PSSE 34
WT12A1 PSSE Model Library
21.1 WT12A1
Pseudo-Governor Model for Type 1 and Type 2 Wind Generators
STATEs # Description
K Power filter
K+1 PI integrator
K+2 Output filter 1
K+3 Output filter 2
VARs # Description
L Reference
L+1 Power reference
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21-2
PSSE 34 Generic Renewable Aerodynamic Models
PSSE Model Library WT12A1
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21-3
Generic Renewable Aerodynamic Models PSSE 34
WTARA1 PSSE Model Library
21.2 WTARA1
Generic Aerodynamic Model for Type 3 wind machine
VARs # Description
L Initial mechanical power
1. In modeling a Type 3 wind machine, the other models to be used along with this model
are regca1, reeca1, repcta1 (optional), wtdta1, wtpta1, wttqa1.
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21-4
Chapter 22
Generic Renewable Torque Control
Models
This chapter contains a collection of data sheets for the Wind Torque Controller models contained
Chapter 22 - Generic Renewable Torque Control Models
Model Description
WTTQA1 Wind turbine Torque Control model
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22-1
Generic Renewable Torque Control Models PSSE 34
WTTQA1 PSSE Model Library
22.1 WTTQA1
Generic Torque controller for Type 3 wind machines
STATEs # Description
K Electrical Power filter
K+1 Speed reference filter
K+2 PI controller
VARs # Description
L Output of power-speed curve
L+1 Vdip value from electrical control model
L+2 Vup value from electrical control model
ICONs # Description
M Tflag, 0: for speed control, 1: for power control
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22-2
PSSE 34 Generic Renewable Torque Control Models
PSSE Model Library WTTQA1
2. The speed points are per unit shaft speed values (these are not speed deviation
values).
3. The turbine rating (TRATE) is the rating of each turbine times the total number of
lumped machines being represented. The power points specified in CONs J+6, J+8,
J+10 and J+12 are in per unit of TRATE. If TRATE is specified as zero, then the power
points are assumed to be in per unit of machine MVA base (MBASE).
4. In modeling a Type 3 wind machine, the other models to be used along with torque con-
trol model are regca1, reeca1, repcta1 (optional), wtdta1, wtara1, wtpta1.
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22-3
Generic Renewable Torque Control Models PSSE 34
WTTQA1 PSSE Model Library
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22-4
Chapter 23
Generic Renewable Plant Control
Models
This chapter contains a collection of data sheets for the generic wind auxiliary control models con-
Chapter 23 - Generic Renewable Plant Control Models
Model Description
REPCA1 & REPCTA1 Plant Controller model
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23-1
Generic Renewable Plant Control Models PSSE 34
REPCA1 & REPCTA1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
23-2
PSSE 34 Generic Renewable Plant Control Models
PSSE Model Library REPCA1 & REPCTA1
STATEs # Description
K Voltage Measurement filter
K+1 Reactive power control filter
K+2 PI controller for reactive power
K+3 Lead-lag in reactive power path
K+4 Real power filter
K+5 PI controller for real power
K+6 Power controller first order lag
VARs # Description
L Reference for voltage control (Vref)
L+1 Reactive power reference (Qref)
L+2 Frequency reference (Freq_ref)
L+3 Active Power reference (Plant_pref)
L+4 Line flow P MW
L+5 Line flow Q MVAr
L+6 Line flow MVA
L+7 Q/V Deadband output
L+8 Frequency deadband output
ICONs # Description
M Bus number for voltage control; local control if 0
Monitored branch FROM bus number for line drop compensation
M+1
(if 0 generator power will be used)
Monitored branch TO bus number for line drop compensation (if
M+2
0 generator power will be used)
Branch circuit id for line drop compensation (enter in single
M+3
quotes) (if 0 generator power will be used)
VCFlag (droop flag):
M+4 0: with droop if power factor control
1: with line drop compensation
RefFlag (flag for V or Q control):
M+5 0: Q control
1: voltage control
Fflag (flag to disable frequency control):
M+6 1: Enable control
0: disable
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23-3
Generic Renewable Plant Control Models PSSE 34
REPCA1 & REPCTA1 PSSE Model Library
Notes:
1. This model can be used with Type 3 and 4 wind machines. When used for modeling of
Type 3 wind machine, the model name is REPCTA1, and the other models to be used
along with this model are regca1, reeca1, wtdta1, wtpta1, wtara1, wttqa1. When used
for modeling of Type 4 machines, the model name is REPCA1, and the other models
to be used along with this model are regca1, reeca1, wtdta1.
2. When used with Type 3 wind machine, the output (Pref) of the REPCTA1 model goes
as an input Pref 0 into the Torque control model (wttqa1). When used with Type 4 wind
ma-chine, the output (Pref) of the REPCA1 model goes as an input into the electrical
con-trol model (reeca1).
3. If ICON(M+1) is zero, then the generator active and reactive powers are used for line-
drop compensation calculation.
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23-4
PSSE 34 Generic Renewable Plant Control Models
PSSE Model Library REPCA1 & REPCTA1
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23-5
Generic Renewable Plant Control Models PSSE 34
REPCA1 & REPCTA1 PSSE Model Library
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23-6
Chapter 24
Switched Shunt Models
This chapter contains a collection of data sheets for the Switched Shunt models contained in the
Chapter 24 - Switched Shunt Models
Model Description
ABBSVC1 ABB SVC Model
CHSVCT SVC for switched shunt
CSSCST SVC for switched shunt
SWSHNT Switched shunt model
SVSMO1T2 WECC Generic Continuous Control SVC model
SVSMO2T2 WECC Generic Discrete Control SVC Model
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24-1
Switched Shunt Models PSSE 34
ABBSVC1 PSSE Model Library
24.1 ABBSVC1
ABB SVC Model
J+4 XCC, Slope for capacitive range, on SVC base (pu voltage/pu current)
J+5 XCI, Slope for inductive range, on SVC base (pu voltage/pu current)
J+8 B1MAX, max. limit for voltage controller (pu on SVC base)
J+9 B1MIN, min. limit for voltage controller (pu on SVC base)
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24-2
PSSE 34 Switched Shunt Models
PSSE Model Library ABBSVC1
J+27 V2CLIM, controller (V2) minimum limit (pu on SVC base) (<0)
J+28 I1MAXC, maximum capacitive current limit (pu on SVC base) (>0)
J+32 IMAXCLIM, controller (I1MAXC) minimum limit (pu on SVC base) (<0)
J+33 IMINI, maximum inductive current limit (pu on SVC base) (< 0)
J+37 IMINCLIM, controller (I1MINI) minimum limit (pu on SVC base) (>0)
J+43 TCRMIN, minimum TCR limit for ITCR control (pu on SVC base)
J+44 FSHUNT, fixed shunt compensation (pu on SVC base) ( 0) (this is always the
filters, which are always capacitive; hence zero)
J+45 BREGMAX, supplementary control capacitive threshold (pu on SVC base)
J+47 VREFMAX, maximum reference voltage for regulated bus voltage (pu)
J+48 VREFMIN, minimum reference voltage for regulated bus voltage (pu)
J+49 TBREG, integrator time constant for supplementary control (s) (>0)
J+52 BMAXDES, MSC slow switching capacitive threshold (pu on system base)
J+53 BMINDES, MSC slow switching inductive threshold (pu on system base)
J+55 BMAXDES2, MSC fast switching capacitive threshold (pu on system base)
J+56 BMINDES2, MSC fast switching inductive threshold (pu on system base)
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24-3
Switched Shunt Models PSSE 34
ABBSVC1 PSSE Model Library
J+60 PODTM1, POD 1st lead-lag block lead time constant (s)
J+61 PODTM2, POD 1st lead-lag block lag time constant (s)
J+62 PODTM3, POD 2nd lead-lag block lead time constant (s)
J+63 PODTM4, POD 2nd lead-lag block lag time constant (s)
J+64 PODTM5, 3rd POD lead-lag block lead time constant (s)
J+65 PODTM6, 3rd POD lead-lag block lag time constant (s)
J+66 KPOD - POD gain (pu)
STATEs # Description
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24-4
PSSE 34 Switched Shunt Models
PSSE Model Library ABBSVC1
STATEs # Description
VARs # Description
L Auxiliary Signal
L+3 B2 effective SVC admittance (pu system base, corrected for frequency)
L+4 B1 (pu system base), effective SVC admittance seen from HV side
L+5 Mvar1 - Mvar flow as measured from the "from" (HV) end of the trans-
former towards the "to" (LV) end
L+6 EFFB1MAX - Effective B1MAX
L+9 Itcr - Reactor current when all TSCs are off; in pu on SVC base - fre-
quency corrected
L+10 through L+21 Delay table
L+25 Timer 1 for Slow Switching of MSCs (used with BMAXDES and
BMINDES)
L+26 Timer 2 for Fast Switching of MSCs (used with BMAXDES2 and
BMINDES2)
L+27 IN - POD Model VAR Input
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24-5
Switched Shunt Models PSSE 34
ABBSVC1 PSSE Model Library
ICONs # Description
M IRGBUS, bus number of the regulated bus (this cannot be the bus at which
the SVC is connected)
M+1 RPC, reactive power control flag
0: None,
1: Supplementary Control,
2: External Caps,
3: Supplementary+External Caps
M+2 MSCBUS, external bus number where the MSCs are connected (this cannot
be the bus at which the SVC is connected)
M+3 POD_ST, flag to indicate status of the aux. signal
0: No POD,
1: IRGBUS Frequency Input,
2: User input in VAR(L+27),
-1: POD disabled by user
M+4 ENAB_IN, flag to indicate if sign of the aux. signal to be changed or not
DYRE Record:
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24-6
PSSE 34 Switched Shunt Models
PSSE Model Library ABBSVC1
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24-7
Switched Shunt Models PSSE 34
ABBSVC1 PSSE Model Library
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24-8
PSSE 34 Switched Shunt Models
PSSE Model Library ABBSVC1
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
24-9
Switched Shunt Models PSSE 34
CHSVCT PSSE Model Library
24.2 CHSVCT
SVC for Switched Shunt
44
CONs # Value Description
J XC
J+1 V1
J+2 V2
J+3 TD2
J+4 T1
J+5 T2 > 0
J+6 T3
J+7 T4
J+8 K
J+9 BFMAX
J+10 BFMIN
J+11 TD1
J+12 BMAX
J+13 BMIN
J+14 Km
J+15 Tw
J+16 TD3
J+17 TM1
J+18 TM2 > 0
J+19 TM3
J+20 TM4
J+21 VSMAX
J+22 VSMIN
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24-10
PSSE 34 Switched Shunt Models
PSSE Model Library CHSVCT
STATEs # Description
K First VSF lag-lead
K+1 Second VSF lag-lead
K+2 Thyristor
K+3 First thyristor time delay
K+4 Second thyristor time delay
K+5 SMF control
K+6 First SMF time delay
K+7 Second SMF time delay
K+8 First SMF lead-lag
K+9 Second SMF lead-lag
VARs # Description
L Other signals
L+1 VREF
L+2 Y (system base)
L+3 Voltage clamp timer
L+4 I Line (system base)
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24-11
Switched Shunt Models PSSE 34
CHSVCT PSSE Model Library
I (pu current)
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24-12
PSSE 34 Switched Shunt Models
PSSE Model Library CSSCST
24.3 CSSCST
SVC for Switched Shunt
J+4 T4 (sec)
J+5 T5 (sec)
J+6 VMAX, Mvars
J+7 VMIN, Mvars
J+8 VOV (override voltage) (pu)
STATEs # Description
K First regulator
K+1 Second regulator
K+2 Thyristor
VARs # Description
L Other signals
L+1 VREF
L+2 Y (system base)
L+3 BREF
ICON # Description
M IB, remotely regulated bus
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24-13
Switched Shunt Models PSSE 34
CSSCST PSSE Model Library
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24-14
PSSE 34 Switched Shunt Models
PSSE Model Library SWSHNT
24.4 SWSHNT
Switched Shunt Model
VARs # Description
L Initial voltage
L+1 Timer
L+2 Maximum reactive
L+3 Maximum capacitive
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24-15
Switched Shunt Models PSSE 34
SVSMO1T2 PSSE Model Library
24.5 SVSMO1T2
WECC Generic Continuous Control SVC model
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24-16
PSSE 34 Switched Shunt Models
PSSE Model Library SVSMO1T2
SKATE # Description
K Controlled voltage sensor
K+1 SVC main PI controller integrator
K+2 SVC output lag
K+3 SSC PI controller imtegrator
K+4 SVC lead/lag
VAR # Description
L SVC output admittance, p.u. on SBASE
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24-17
Switched Shunt Models PSSE 34
SVSMO1T2 PSSE Model Library
VAR # Description
L+1 SVC PI controller output, p.u. on SBASE
L+2 SSC PI controller output, p.u.
L+3 Undervoltage timer, sec.
L+4 Rating dependent on voltage, p.u. on SBASE
L+5
through Timers, delays set up by the model
L+18
L+19 Vmsrd, Vreg lead/lag output
L+20
through Timers set up by the model
L+22
L+23 SVC VREF, p.u.
L+24 SVC VSCHED, p.u.
L+25 optional POD input
L+26 SVC lead-lag output before PI controller
L+27 SVC voltage error
L+28 SVC output in MVAR
ICON # Description
SVC remote bus # for voltage control (if 0 then SVC bus is
M
used)
Flag for Mechanically Switched Shunt (MSS) switching: 0 - no
M+1
MSS switching, 1 - MSS switching on Q [MVAr]
M+2 Flag for droop Control: 0 - linear droop; 1 - non-linear droop
M+3 1st MSS bus #
M+4 1st MSS Id (to be entered within single quotes)
M+5 2nd MSS bus #
M+6 2nd MSS Id (to be entered within single quotes)
M+7 3rd MSS bus #
M+8 3rd MSS Id (to be entered within single quotes)
M+9 4th MSS bus #
M+10 4th MSS Id (to be entered within single quotes)
M+11 5th MSS bus #
M+12 5th MSS Id (to be entered within single quotes)
M+13 6th MSS bus #
M+14 6th MSS Id (to be entered within single quotes)
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24-18
PSSE 34 Switched Shunt Models
PSSE Model Library SVSMO1T2
ICON # Description
M+15 7th MSS bus #
M+16 7th MSS Id (to be entered within single quotes)
M+17 8th MSS bus #
M+18 8th MSS Id (to be entered within single quotes)
Notes:
3. The MSS can all be on the same bus (with different id), or they can be on eight different
bus.
5. It is not necessary to input the MSS at all the eight buses. If MSS is not present, the
MSS bus number and the MS bus id should be set to 0.
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24-19
Switched Shunt Models PSSE 34
SVSMO1T2 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
24-20
PSSE 34 Switched Shunt Models
PSSE Model Library SVSMO2T2
24.6 SVSMO2T2
WECC Generic Discrete Control SVC Model
Tentative
CONs # Description
Value
UVSBmax, maximum capacitive limit during undervoltage
J
(assumed filter size), pu on SBASE
J+1 UV1, undervoltage setting 1, p.u.
J+2 UV2, undervoltage setting 2, p.u.
J+3 UVT, undervoltage trip setting, p.u.
J+4 OV1, overvoltage setting 1, p.u.
J+5 OV2, overvoltage setting 2, p.u.
J+6 UVtm1, undervoltage trip time 1, sec.
J+7 UVtm2, undervoltage trip time 2, sec.
J+8 OVtm1, overvoltage trip time 1, sec.
J+9 OVtm2, overvoltage trip time 2, sec.
J+10 Xs1, slope/droop, p.u. on SBASE
J+11 Xs2, slope/droop, p.u. on SBASE
J+12 Xs3, slope/droop, p.u. on SBASE
J+13 Vup, upper voltage break-point for non-linear slope/droop, p.u.
J+14 Vlow, lower voltage break-point for non-linear slope/droop, p.u.
J+15 Tc1, voltage measurement lead time constant, sec.
J+16 Tb1, voltage measurement lag time constant, sec.
J+17 Tc2, lead time constant
J+18 Tb2, lag time constant
J+19 Kpv, proportional gain, p.u.
J+20 Kiv, integral gain, p.u./sec.
J+21 Vemax, voltage error max, p.u.
J+22 Vemin, voltage error min, p.u.
J+23 T2, thyristor firing sequence control time constant, T2>0, sec.
Bshrt, short-term max. suceptance of SVC (short-term rating) ,
J+24
p.u. on SBASE
J+25 dbe, voltage error dadband (pu)
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24-21
Switched Shunt Models PSSE 34
SVSMO2T2 PSSE Model Library
Tentative
CONs # Description
Value
J+26 dbb, susceptance deadband (pu)
J+27 Tshrt, duration of short-term rating, sec.
J+28 Kps, proportional gain of slow susceptance control, p.u.
J+29 Kis, integral gain of slow susceptance control, p.u./sec.
J+30 Vrmax, maximum output of slow susceptance control, p.u.
J+31 Vrmin, minimum output of slow susceptance control, p.u.
Vdbd1, steady-state Voltage deadband; SVC is inactive between
J+32
Vref+Vdbd1 to Vref-Vdbd1, p.u.
J+33 Vdbd2, inner deadband, p.u.
J+34 Tdbd, Vdbd2 locked time, sec.
PLLdelay, delay in recovering if voltage remains below UV1 for
J+35
longer than UVtm1, sec.
xeps, small delta added to the susceptance bandwidth of the
J+36 slow-susceptance regulator in order to ensure its limits are not
exactly identical to the MSS switching point, p.u.
J+37 Blcs, larger threshold for switching MSCs, MVAr
J+38 Bscs, smaller threshold for switching MSCs, MVAr
J+39 Blis, larger threshold for switching MSRs, MVAr
J+40 Bsis, smaller threshold for switching MSRs, MVAr
J+41 Tmssbrk, time for MSS breaker to operate, sec.
J+42 Tdelay1, time delay for larger threshold, sec.
Tdelay2, time delay for smaller threshold (should be larger than
J+43
Tdelay1), sec.
Tout, time capacitor bank should be off before switching back on,
J+44
sec.
J+45 Vrefmin, lower limit of Vref, p.u.
J+46 Vrefmax, upper limit of Vref, p.u.
SKATE # Description
K Controlled voltage sensor
SVC main PI controller
K+1
integrator
K+2 SVC output lag
K+3 SSC PI controller integrator
K+4 SVC lead/lag
VAR # Description
L SVC output admittance, p.u. on SBASE
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24-22
PSSE 34 Switched Shunt Models
PSSE Model Library SVSMO2T2
VAR # Description
L+1 SVC PI controller output, p.u. on SBASE
L+2 SSC PI controller output, p.u.
L+3 Undervoltage timer, sec.
L+4 Rating dependent on voltage, p.u. on SBASE
L+5
through Timers, delays set up by the model
L+18
L+19 Vmsrd, Vreg lead/lag output
L+20
through Timers set up by the model
L+22
L+23 SVC VREF, p.u.
L+24 SVC VSCHED, p.u.
L+25 optional POD input
L+26 SVC lead-lag output before PI controller
L+27 SVC voltage error
L+28 SVC output in MVAR
Total SVC capacitor admittance, pu on
L+29
SBASE
L+30 Total SVC reactor admittance, pu on SBASE
L+31 Output of Look-up table
L+32
through Internal VARs
L+103
ICON # Description
M SVC remote bus # for voltage control (if 0 then SVC bus is used)
Flag for Mechanically Switched Shunt (MSS) switching: 0 - no MSS
M+1
switching, 1 - MSS switching on Q [MVAr]
M+2 Flag for droop Control: 0 - linear droop; 1 - non-linear droop
M+3 1st MSS bus #
M+4 1st MSS Id (to be entered within single quotes)
M+5 2nd MSS bus #
M+6 2nd MSS Id (to be entered within single quotes)
M+7 3rd MSS bus #
M+8 3rd MSS Id (to be entered within single quotes)
M+9 4th MSS bus #
M+10 4th MSS Id (to be entered within single quotes)
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24-23
Switched Shunt Models PSSE 34
SVSMO2T2 PSSE Model Library
ICON # Description
M+11 5th MSS bus #
M+12 5th MSS Id (to be entered within single quotes)
M+13 6th MSS bus #
M+14 6th MSS Id (to be entered within single quotes)
M+15 7th MSS bus #
M+16 7th MSS Id (to be entered within single quotes)
M+17 8th MSS bus #
M+18 8th MSS Id (to be entered within single quotes)
Notes:
3. The MSS can all be on the same bus (with different id), or they can be on eight different
buses.
5. It is not necessary to input the MSS at all the eight buses. If there are eight or less MSS,
the MSS bus number and the MS bus id should be set to 0 for the unused MSS entries.
6. The limits Bmax and Bmin shown on STATE(K+1) are the maximum capacitive rating
in pu (Bmax), and the minimum inductive rating in pu (Bmin) of the SVC. These are
computed by the model based on the possible combinations of available capacitor and
the inductors in power flow.
7. The undervoltage setting values (UV1 and UV2) should be such that UV1 > UV2.
8. The overvoltage setting values (OV1 and OV2) should be such that OV1 < UV2.
9. Vdb1 and Vdb2 must have either positive values or zero (i.e. not negative).
10. The deadband control, slow-susceptance regulator, and non-linear slope are intended
to keep the SVC output at a low steady state output. Only one of these controllers
should be active. The dynamic model does not allow for the use of more than one of
these controllers at the same time.
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24-24
PSSE 34 Switched Shunt Models
PSSE Model Library SVSMO2T2
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24-25
Switched Shunt Models PSSE 34
SVSMO2T2 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
24-26
Chapter 25
Branch Device Models
This chapter contains a collection of data sheets for the Branch Device models contained in the
Chapter 25 - Branch Device Models
Model Description
CRANIT Series reactor model.
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25-1
Branch Device Models PSSE 34
CRANIT PSSE Model Library
25.1 CRANIT
Series Reactor Model
STATEs # Description
K Transducer filter
K+1 Washout
K+2 Lead/lag
VARs # Description
L Input signal
L+1 Initial output
L+2 Desired reactance
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25-2
PSSE 34 Branch Device Models
PSSE Model Library CRANIT
INmax Xmax
1 sTW 1 + sT2 +
VAR(L) K VAR(L+2)
1 + sT1 1 + sTW 1 + sT3 X
+
INmin Xmin
VAR(L+1)
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25-3
Branch Device Models PSSE 34
CRANIT PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
25-4
Chapter 26
Machine and Wind Machine
Protection Models
This chapter contains a collection of data sheets for the Machine and Wind Protection models con-
Chapter 26 - Machine and Wind Machine Protection Models
Model Description
LOEXR1T Loss of excitation distance relay.
VPERHZU1 Volts per Hertz Model (to be applied only to synchronous machines)
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26-1
Machine and Wind Machine Protection Models PSSE 34
LOEXR1T PSSE Model Library
26.1 LOEXR1T
Loss of Excitation Distance Relay
(for use with non-wind machines)
CONs # Description
J T1, zone 1 operating time (cycles)
J+1 R1, zone 1 reach (diameter in pu)
J+2 A1, zone 1 centerline angle (degrees)
J+3 D1, zone 1 center distance (pu)
J+4 T2, zone 2 operating time (cycles)
J+5 R2, zone 2 reach (diameter in pu)
J+6 A2, zone 2 centerline angle (degrees)
J+7 D2, zone 2 center distance (pu)
J+8 T3, zone 3 operating time (cycles)
J+9 R3, zone 3 reach (diameter in pu)
J+10 A3, zone 3 centerline angle (degrees)
J+11 D3, zone 3 center distance (pu)
J+12 VPV, voltage pickup value (pu)
J+13 STB, self trip breaker time (cycles)
VARs # Description
L Apparent R
L+1 Apparent X
L+2
L+3 VARS required for internal program
L+4 logic
L+5
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26-2
PSSE 34 Machine and Wind Machine Protection Models
PSSE Model Library LOEXR1T
Notes:
2. The center distances are normally negative since R and X are assumed looking out
from terminals.
4. The voltage pickup value should be set to a high value (10.0 pu) to disable it.
Angle
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26-3
Machine and Wind Machine Protection Models PSSE 34
VPERHZU1 PSSE Model Library
26.2 VPERHZU1
V/Hz Generator Relay Model
STATEs # Description
K Measured voltage
K+1 Measured speed deviation
VARs # Description
L Sensed V/Hz (pu)
L+1 Timer 1 memory
L+2 Timer 2 memory
L+3 Timer 3 memory
L+4 Timer 4 memory
L+5 Timer 5 memory
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26-4
PSSE 34 Machine and Wind Machine Protection Models
PSSE Model Library VPERHZU1
ICONs # Description
0: Monitor mode
M
1: Tripping mode
Used only if ICON(M) is 1;
M+1 1: trip generator
2: disconnect the generator bus
Number of zones (any value 1 through 5)
M+2
used to model the V/Hz
ICONs
(not to be
available # Description
for user
edits)
M+3 Delay flag - (timer 1)
M+4 Time-out flag - (timer 1)
M+5 Timer status - (timer 1)
M+6 Delay flag - (timer 2)
M+7 Time-out flag - (timer 2)
M+8 Timer status - (timer 2)
M+9 Delay flag - (timer 3)
M+10 Time-out flag - (timer 3)
M+11 Timer status - (timer 3)
M+12 Delay flag - (timer 4)
M+13 Time-out flag - (timer 4)
M+14 Timer status - (timer 4)
M+15 Delay flag - (timer 5)
M+16 Time-out flag - (timer 5)
M+17 Timer status - (timer 5)
Notes:
This model uses 2 ICONs and 15 internal ICONs. ICONs (M+4) through (M+18) are
control flags that are not to be changed by the user
When ICON(M) is 1, setting ICON(M+1) equal to 1 will trip the generator, while setting
ICON(M+1) equal to 2 will disconnect the generator bus (i.e., disconnects all equipment
attached to the generator bus).
ICONs marked "Internal ICONs" have to be entered as 0 (15 zeros) in the model dyr
record.
This model is treated as a "Machine Protection" model and can be accessed under the
"Protection Models>Machine" tab in the dynamics data spreadsheet.
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26-5
Machine and Wind Machine Protection Models PSSE 34
VPERHZU1 PSSE Model Library
Since bus frequency in PSSE (which is calculated using bus voltage angle) is subject
to instantaneous changes, this model uses speed deviation instead of bus frequency
for the V/Hz calculation. In view of this, this model should be applied only to synchro-
nous machines.
ICON(M+2) specifies the number of zones used to model the relay. If this ICON has a
value of 1, then only one zone z1 is used; and hence CON(J+2) through CON(J+0) can
all be set to zero. If ICON(M+2) is set to 2 (indicating 2 zones: z1 and z2), then only
one zones z1 and z2 are used; and hence CON(J+4) through CON(J+9) can all be set
to zero.
If all 5 zones are used, then the data input for VHz1, VHz2, and Tp1, Tp2 etc. have to
be such that VHz1>VHz2>VHz3>VHz4>VHz5, and Tp1<Tp2<Tp3<Tp4<Tp5.
DYRE data report format:
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26-6
PSSE 34 Machine and Wind Machine Protection Models
PSSE Model Library VPERHZU1
+ 1
+ 1 + sT f
s1
1.0
Zone of Protection
Operation
(VHZ1,TP1) Zone #1
(VHZ3,TP3)
Zone #3
(VHZ4,TP4)
Zone #4
Allowable Zone of
equipment Operation (VHZ5,TP5)
Zone #5
Time
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26-7
Machine and Wind Machine Protection Models PSSE 34
VPERHZU1 PSSE Model Library
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26-8
Chapter 27
Two-winding Transformer Device
Models
This chapter contains a collection of data sheets for the Two-winding Device Transformer models
Chapter 27 - Two-winding Transformer Device Models
Model Description
OLTC1T Two-winding transformer online tap changer model.
OLPS1T Two-winding transformer phase shift regulator model.
VFT1 Variable frequency transformer model.
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27-1
Two-winding Transformer Device Models PSSE 34
OLTC1T PSSE Model Library
27.1 OLTC1T
Two-winding Transformer Online Tap Changer Model
VARs # Description
L Time delay
L+1 Tap changer timer
L+2 Subsequent timer
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27-2
PSSE 34 Two-winding Transformer Device Models
PSSE Model Library OLPS1T
27.2 OLPS1T
Two-Winding Transformer Phase Shifter Model
VARs # Description
L Time delay
L+1 Phase shifter timer
L+2 Subsequent timer
L+3 MW flow
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27-3
Two-winding Transformer Device Models PSSE 34
VFT1 PSSE Model Library
27.3 VFT1
GE Variable Frequency Transformer
J+10 FrateLim, ()Frequency Control, max & min rate Limits (pu/s)
J+14 Td FPstab, Time Constant, Stabilizing branch from Freq Ctrl (s)
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27-4
PSSE 34 Two-winding Transformer Device Models
PSSE Model Library VFT1
J+25 IMTRTaper Drive motor Tapered Current limit, Current Gain (pu)
J+26 SpdTaper Drive motor Tapered Current limit, Speed Gain (pu)
J+28 VPX, Shut Down Voltage, Voltage Dependant Power Limit (pu)
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27-5
Two-winding Transformer Device Models PSSE 34
VFT1 PSSE Model Library
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27-6
PSSE 34 Two-winding Transformer Device Models
PSSE Model Library VFT1
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27-7
Two-winding Transformer Device Models PSSE 34
VFT1 PSSE Model Library
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27-8
PSSE 34 Two-winding Transformer Device Models
PSSE Model Library VFT1
Notes:
The real power flowing across the VFT is stored in VAR(L+1) and VAR(L+2) for the from and to side
flows respectively, with the convention of positive flow from the bus into the VFT. Similarly the reac-
tive power is stored in VAR(L+4) and VAR(L+5). Note that the default channels for branch flow for
the VFT should NOT be used as they do not generally take into account the movement in VFT. That
is, if plotting the VTF flow is desired, the VFT model VARS should be used.
At initialization, the initial active power flow is stored in Pcmd. To simulate a change in the active
power flow setpoint, change Pcmd, VAR(L+10), to the new setpoint. Note that the relative direction
of the power flow must be taken into account.
When the VFT rotates by an angle greater than the admittance re-factorizing angle, CON(J+40),
the power flow admittance matrix will be re-factorized. This re-factorization speeds up the network
solution and prevents a potential divergent solution when the VFT alters the power flow significantly
from the initial conditions. As a starting point, Siemens PTI recommends a value of 20 degrees for
this re-factorization angle, but this angle may need to be adjusted based on the characteristics of
the power system modeled.
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27-9
Two-winding Transformer Device Models PSSE 34
VFT1 PSSE Model Library
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27-10
Chapter 28
Three-winding Transformer Device
Models
This chapter contains a collection of data sheets for the Three-winding Device Transformer models
Chapter 28 - Three-winding Transformer Device Models
Model Description
OLTC3T Online tap changer model for three-winding transformers.
OLPS3T Online phase shift regulator model for three-winding transformers.
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28-1
Three-winding Transformer Device Models PSSE 34
OLTC3T PSSE Model Library
28.1 OLTC3T
Online Tap Changer Model for Three-Winding Transformers
VARs # Description
L Time delay
L+1 Tap changer timer
L+2 Subsequent timer
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28-2
PSSE 34 Three-winding Transformer Device Models
PSSE Model Library OLPS3T
28.2 OLPS3T
Online Phase Shift Regulator Model for Three-Winding Transformers
VARs # Description
L Time delay
L+1 Phase shift timer
L+2 Subsequent timer
L+3 MW flow
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28-3
Three-winding Transformer Device Models PSSE 34
OLPS3T PSSE Model Library
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28-4
Chapter 29
Two-terminal dc Other Models
This chapter contains a collection of data sheets for the Two-terminal dc Other models contained in
Chapter 29 - Two-terminal dc Other Models
Model Description
DCTC1T Two-terminal dc line tap changer model.
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29-1
Two-terminal dc Other Models PSSE 34
DCTC1T PSSE Model Library
29.1 DCTC1T
Two Terminal Online dc Tap Changer Model
DC Name
This model is conneted to DC line #_______
VARs # Description
L Time delay (rectifier)
L+1 Tap changer timer (rectifier)
L+2 Subsequent timer (rectifier)
L+3 Time delay (inverter)
L+4 Tap changer timer (inverter)
L+5 Subsequent timer (inverter)
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29-2
Chapter 30
Miscellaneous Other Models
This chapter contains a collection of data sheets for the Miscellaneous Other models contained in
Chapter 30 - Miscellaneous Other Models
Model Description
Under/over voltage generator bus disconnection relay.
VTGDCAT/VTGTPAT
Under/over voltage generator trip relay.
Under/over frequency generator bus disconnection relay.
FRQDCAT/FRQTPAT
Under/over frequency generator trip relay.
SAT2T Transformer saturation model.
SWCAPT Switched capacitor bank model.
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30-1
Miscellaneous Other Models PSSE 34
VTGDCAT/VTGTPAT PSSE Model Library
30.1 VTGDCAT/VTGTPAT
Under/Over Voltage Generator Bus Disconnection Relay
Under/Over Voltage Generator Trip Relay
VGTDCA
This model uses CONs starting with #_______ J,
and VARs starting with #_______ L,
and ICONs starting with #_______ M.
and model instance #_______ MINS (>0)
VTGTPA
CONs # Value Description
J VL, Lower voltage threshold (pu)
J+1 VU, Upper voltage threshold (pu)
J+2 TP, Relay pickup time (sec)
J+3 TB, Breaker time (sec)
VAR # Description
L Timer memory
ICONs # Description
M Bus number where voltage is monitored
Bus number of generator bus where relay is
M+1
located
M+2 Generator ID
M+3 Delay flag (internal ICON) (1)
M+4 Timeout flag (internal ICON) (1)
M+5 Timer status (internal ICON) (1)
Note: ICONs (M+3) through (M+5) are control flags that are not to be changed by the user.
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30-2
PSSE 34 Miscellaneous Other Models
PSSE Model Library FRQDCAT/FRQTPAT
30.2 FRQDCAT/FRQTPAT
Under/Over Frequency Generator Bus Disconnection Relay
Under/Over Frequency Generator Trip Relay
FRQDCA
This model uses CONs starting with #_______ J,
and VARs starting with #_______ L
and ICONs starting with #_______ M.
and model instance #_______ MINS (>0)
FRQTPA
CONs # Value Description
J FL, Lower frequency threshold (Hz)
J+1 FU, Upper frequency threshold (Hz)
J+2 TP, Relay pickup time (sec)
J+3 TB, Breaker time (sec)
VAR # Description
L Timer memory
ICONs # Description
M Bus number where frequency is monitored
Bus number of generator bus where relay is
M+1
located
M+2 Generator ID
M+3 Delay flag (internal ICON) (1)
M+4 Timeout flag (internal ICON) (1)
M+5 Timer status (internal ICON) (1)
(1): User input not required for internal ICON. ICONS (M+3) through (M+5) are control flags and
are not to be changed by the user.
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30-3
Miscellaneous Other Models PSSE 34
SAT2T PSSE Model Library
30.3 SAT2T
Transformer Saturation Model
J+6 4
J+7 I4
J+8 Acceleration factor
J+9 Transformer MVA base
VAR # Description
L Memory
2. The SAT curve is speified as a set of 4 pairs of -I points. It is not necessary to specify
all the 4 pairs of (-I) data points. CON(J) (i.e., 1) and CON(J+1) (i.e., I1) have to be
greater than zero. After that the first that is specified as zero signifies the end of the
SAT curve points.
3. The SAT curve is specified in per unit on TRMVA. If TRMVA is zero, the data points
are assumed to be on SBASE.
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30-4
PSSE 34 Miscellaneous Other Models
PSSE Model Library SAT2T
4
2 3
1
1+f
= ----------
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30-5
Miscellaneous Other Models PSSE 34
SWCAPT PSSE Model Library
30.4 SWCAPT
Switched Capacitor Bank Model
VAR # Description
L Memory
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30-6
Chapter 31
Machine Other Models
This chapter contains a collection of data sheets for the Other models contained in the PSSE
Chapter 31 - Machine Other Models
Model Description
TSTGOV1 Frequency playback model
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31-1
Machine Other Models PSSE 34
TSTGOV1 PSSE Model Library
31.1 TSTGOV1
VGTDCA
This model is located at system bus #_______ IBUS,
Machine #_______ ID
Model Uses CONs starting with #_______ J
And VARs starting with #_______ L
And ICONs starting with #_______ M
VTGTPA
CONs # Value Description
J TSTART1 (seconds)
J+1 TEND1 (seconds)
J+2 FREQUENCY1 (Hz)
J+3 TSTART2 (seconds)
J+4 TEND2 (SECONDS)
J+5 FREQUENCY2 (Hz)
VAR # Description
L Measured frequency from file
L+! Measured Pelec of generator from file
ICONs # Description
0 : for grid code test (trapezoidal frequency
shape
M
1: to read frequency and power data points from
a file
M+1 Load id (enter in single quotes)
1. Although the model is in a user-written model format, use of this model will not require
compile or link.
2. In order to use this model, a single-machine with a load connected to it has to be cre-
ated. For details, please see Program Application Guide, Volume II, chapter on "Other
PSS/E Models"
3. If ICON(M) is 1 (i.e, read measured frequency and power data from a file), then CON(J)
through CON(J+5) can be specified as zero. The file containing the measurement has
to be supplied in a file whose name is 'FTIME1.DAT'. The file must be present in the
folder from where PSSE is started. The format of this data file must be one data
record per line, with each data record containing the measured data in this order:
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31-2
PSSE 34 Machine Other Models
PSSE Model Library TSTGOV1
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31-3
Machine Other Models PSSE 34
TSTGOV1 PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
31-4
Chapter 32
Model Functions
This chapter contains a collection of data sheets for the models functions for Models contained in
Chapter 32 - Model Functions
Model Description
FLOW1 Function to obtain branch flow.
Function to obtain branch flow for a winding of a three-winding
FLOW3
transformer.
GENTMC Function to calculate Generator terminal current.
GENTMZ Function to calculate Generator apparent impedance.
Calculation of Power totals by subsystem. Subsystem type is
PTOTOW, PTOTZN,
indicated by characters of five and six of the model name as follows:
PTOTAR, PTOTAL
OW for Owner, ZN for Zone, AR for Area, and AL for all buses.
RELAY2 Apparent impedance monitoring.
Apparent impedance monitoring for a winding of three-winding
RELAY3
transformer.
VOLMAG Bus voltage monitoring.
Model Description
BSDSCN Function for bus disconnection.
FLOW Function to obtain branch flow.
Function to obtain branch flow for a winding of a three0winding
FLOW2
transformer.
GENTRP Function to trip a generator.
LINESW Function to switch a branch.
LINRCL Line reclose function.
LINTRP Function to trip a line.
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
32-1
Model Functions PSSE 34
FLOW1 PSSE Model Library
32.1 FLOW1
Branch Flow Model
Function to calculate branch flow
Function call: CALL FLOW1 (I,N,M,L)
VARs # Description
N MW
M Mvar
L MVA
Note: Flows include the line shunt component at the from bus end.
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32-2
PSSE 34 Model Functions
PSSE Model Library FLOW3
32.2 FLOW3
Function to calculate Three-Winding Transformer Flow Model
Function call: CALL FLOW3 (I,N,M,L)
VARs # Description
N MW
M Mvar
L MVA
Note: Flows include the magnetizing admittance component at the from bus end if it is the bus to
which winding one is connected.
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32-3
Model Functions PSSE 34
GENTMC PSSE Model Library
32.3 GENTMC
Function to calculate Generator Terminal Current Model
Function call: CALL GENTMC(L,M)
VARs # Description
L Current magnitude on MBASE
L+1 Current angle (radians)
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32-4
PSSE 34 Model Functions
PSSE Model Library GENTMZ
32.4 GENTMZ
Function to call
Generator Apparent Impedance Model
Function call: GENTMZ (L,I)
VARs # Description
L Apparent resistance on MBASE
L+1 Apparent reactance on MBASE
The apparent impedance is expressed from the terminals looking out into the system.
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32-5
Model Functions PSSE 34
PTOTOW, PTOTZN, PTOTAR, PTOTAL PSSE Model Library
VARs # Description
L Mechanical power, PM
L+1 Electrical power, PE
L+2 Accelerating power, PM-PE
L+3 Load power, PL
L+4 PE-PL
This function can also be selected in activity CHSB.SU or by employing the subsystem power totals
selection of the selet channels by subsystem dialog.
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32-6
PSSE 34 Model Functions
PSSE Model Library RELAY2
32.6 RELAY2
Relay Checking Model
VARs # Description
N Apparent resistance
M Apparent reactance
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32-7
Model Functions PSSE 34
RELAY3 PSSE Model Library
32.7 RELAY3
Three-Winding Transformer Relay Checking function
Function call: CALL RELAY3 (I,N,M)
VARs # Description
N Apparent resistance
M Apparent reactance
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32-8
PSSE 34 Model Functions
PSSE Model Library VOLMAG
32.8 VOLMAG
Voltage Monitoring Function
Function Call: CALL VOLMAG (I,J,K)
VARs1 # Description
J Voltage magnitude
K Phase angle
1 J or K may be zero to bypass storing of that quantity.
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32-9
Model Functions PSSE 34
BSDSCN PSSE Model Library
32.9 BSDSCN
Function to disconnect a bus
Function call: CALL BSDSCN(M)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
32-10
PSSE 34 Model Functions
PSSE Model Library FLOW
32.10 FLOW
Function to calculate Branch Flow
Function call: CALL FLOW (I,N,M,L)
VARs # Description
N MW
M Mvar
L MVA
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
32-11
Model Functions PSSE 34
FLOW2 PSSE Model Library
32.11 FLOW2
Function to calculate Branch Flow
Function call: CALL FLOW2 (I,N,M,L)
VARs # Description
N MW
M Mvar
L MVA
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
32-12
PSSE 34 Model Functions
PSSE Model Library GENTRP
32.12 GENTRP
Function to trip a Generator
Function call: CALL GENTRP (IBUS, I)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
32-13
Model Functions PSSE 34
LINESW PSSE Model Library
32.13 LINESW
Function for Branch Switching
Function call: CALL LINESW (I,IS)
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32-14
PSSE 34 Model Functions
PSSE Model Library LINRCL
32.14 LINRCL
Function for Branch Reclosing
Function call: CALL LINRCL (M)
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32-15
Model Functions PSSE 34
LINTRP PSSE Model Library
32.15 LINTRP
Function for Branch Tripping
Function call: CALL LINTRP (M)
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
32-16
Model Index
ABB SVC Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24-2
American Superconductor DSMES Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4
Basler DECS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-60
Basler Static Voltage Regulator Feeding dc or ac Rotating Exciter . . . . . . . . . . . . . . . . . . . . .6-90
Branch Flow Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32-2
Brown Boveri Static Exciter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-25
Bus Fed or Solid Fed Static Exciter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-153
Bus or Solid Fed SCR Bridge Excitation System Model Type NEBB (NVE) . . . . . . . . . . . . . . .6-96
Bus or Solid Fed SCR Bridge Excitation System Model Type NI (NVE) . . . . . . . . . . . . . . . . . .6-98
Bus Voltage Angle Sensitive Auxiliary Signal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12-12
Chateauguay Auxiliary Signal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12-2
Combined Cycle on Single Shaft . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-87
Comerford Auxiliary Signal Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12-5
Complex Load Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9-18
Composite Load Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9-21
Constant Internal Voltage Generator Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-39
Cross Compound Turbine-Governor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-5
Czech Hydro and Steam Governor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-78
Czech Proportion/Integral Exciter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-27
dc Line Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13-13
dc Line Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13-27
dc Line Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13-38
dc Line Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13-42
dc Line Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13-51
Direct Connected (Type 1) Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17-6
Double Circle or Lens Out-of-Step Tripping or Blocking Relay . . . . . . . . . . . . . . . . . . . . . . . . .11-2
Doubly-Fed Induction Generator (Type 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17-11
Doubly-Fed Induction Generator (Type 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17-9
Eel River dc Line and Auxiliaries Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13-32
Eel River dc Line Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13-33
Eel River Runback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12-14
Electrical Control for Type 3 Wind Generator (for WT3G1 and WT3G2) . . . . . . . . . . . . . . . .18-14
Electrical Control for Type 4 Wind Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18-22
Electrical Control for Type 4 Wind Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18-18
Electrical Control for Type 4 Wind Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18-21
Electrical Control Model for Large Scale PV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18-10
Electrical Control Model for PV Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18-2
ELIN Excitation System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-29
EPRI Battery Energy Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2
EPRI Current and Voltage-Source SMES Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-22
European Governor Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-3
EX2000 Excitation System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6-76
Extended-Term Load Reset Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9-38
FACTS Device Static Condenser (STATCON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16-2
Fourth order lead-lag hydro-turbine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-33
Frequency Changer Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-37
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
Index-1
PSSE 34
PSS E Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
Index-2
PSSE 34
PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
Index-3
PSSE 34
PSS E Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
Index-4
PSSE 34
PSSE Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
Index-5
PSSE 34
PSS E Model Library
All material contained in this documentation is proprietary to Siemens Industry, Inc., Siemens Power Technologies International.
Index-6