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A LINE-INTERACTIVE UPS SYSTEM IMPLEMENTATION WITH

SERIES-PARALLEL ACTIVE POWER-LINE CONDITIONING


FOR THREE-PHASE, FOUR-WIRE SYSTEMS
Srgio Augusto Oliveira da Silva
augus@cp.cefetpr.br
Departamento de Engenharia Eltrica CEFET-PR
Av. Alberto Carazzai, 1640 - Centro.
CEP. 86.300-000 Cornlio Procpio-PR, Brasil.
Pedro F. Donoso-Garcia; Porfrio C. Cortizo; Paulo F. Seixas
pedro@cpdee.ufmg.br; porfirio@cpdee.ufmg.br; paulos@cpdee.ufmg.br
Departamento de Engenharia Eletrnica UFMG
Av. Antnio Carlos, 6627 - Pampulha.
CEP. 31.270-901 Belo Horizonte-MG, Brasil.

Abstract Keywords: Active Filter; UPS; Harmonics.

This paper presents a three-phase line-interactive Resumo


uninterruptible power supply (UPS) system with active
series-parallel power-line conditioning capabilities. Este artigo apresenta um sistema de energia ininterrupta
Synchronous reference frame (SRF)-based controller is (SEI) line-interactive trifsico com capacidade de
used for harmonic and reactive power compensation condicionamento ativo de potncia srie e paralelo. Um
generated from any configuration of non-linear loads. controlador baseado no sistema de eixo de referncia
Under normal line conditions the UPS system works with sncrona (SRF) usado na compensao de potncia reativa
universal filtering capabilities, such as compensating the e harmnica geradas por quaisquer configuraes de cargas
input currents and output voltages. Two three-phase no lineares. Sob condies normais da rede eltrica o SEI
pulsewidth modulation (PWM) converters, called series and trabalha na compensao das correntes de entrada e das
parallel active filters, are used to perform the series and tenses de sada. Dois conversores controlados em tenso e
parallel active power-line compensation. The series active modulados por largura de pulso (PWM), chamados de
filter works as sinusoidal current source in phase with the filtros ativos srie e paralelo, so usados para realizar o
input voltage, drawing from utility sinusoidal and balanced condicionamento ativo de potncia srie e paralelo. O filtro
input currents with low total harmonic distortion (THD). ativo srie trabalha como uma fonte de corrente senoidal
The parallel active filter works as sinusoidal voltage source em fase com a tenso de entrada, drenando da rede
in phase with the input voltage, providing regulated and correntes senoidais, balanceadas com baixas taxas de
sinusoidal output voltages with low THD. The performance distoro harmnica (TDH). O filtro ativo paralelo trabalha
of the UPS system is evaluated in three-phase, four-wire como uma fonte de tenso senoidal em fase com a tenso de
systems. Experimental results are presented to confirm the entrada, fornecendo para a carga tenses reguladas,
theoretical studies. senoidais e com baixas taxas de distoro harmnica. O
desempenho do SEI avaliado para sistemas trifsicos com
quatro fios. Resultados experimentais so apresentados para
confirmar os estudos tericos.
Recebido em 30/10/02
1. revisao em 20/12/02 Palavras Chaves: Filtro ativo, SEI, Harmnicas.
2 reviso em 18/02/03
3 reviso em 24/03/03
Aceito s/recom.do Ed.Ass. Prof. Jos Antenor Pomilio

200 Revista Controle & Automao/Vol.16 no. 2/Abril, Maio e Junho 2005
1 INTRODUCTION balanced with low THD. Both input currents and output
voltages are simultaneously controlled to be in phase with
The large use of non-linear loads, such as, personal respect the input voltages. Therefore, an effective power
computers, UPS, etc., has increased in the last years, factor correction is carried out.
causing problems to the power supply systems. The
The control algorithm using SRF method and the active
harmonic currents drawn by non-linear loads from utility
power flow through the UPS system are described and
have contributed to reduce the power factor and to increase
analytically studied. Design procedures, digital simulations
the total harmonic distortion (THD) in the utility input
and experimental results for a prototype are presented in
voltages. The problem increases when single-phase non-
order to verify the good performance of the proposed three-
linear loads are connected in three-phase, four-wire
phase line-interactive UPS system.
systems. In this case, as the phase currents are not
sinusoidal, even perfectly balanced single-phase loads can
result in significant neutral currents and their amplitude can 2 DESCRIPTION OF THE LINE-
exceed the amplitude of the line currents (Gruzs, 1990). If INTERACTIVE UPS TOPOLOGY
the non-linear loads are unbalanced, the input currents will
be unbalanced in terms of fundamental and harmonic The topology of the line-interactive UPS system is shown
components, and a very large third component and its in Fig. 1. Two pulsewidth modulation (PWM) converters,
multiples will flow in the neutral wire. The excessive coupled to a common dc-bus, are used to perform the series
neutral currents can cause damage both in the neutral active filter and the parallel active filter functions.
conductor and in the transformer to which it is connected Capacitors and a battery bank are placed in the dc-bus and a
(Quinn et al., 1992). Thereby, active filter topologies have static switch sw is used to provide the disconnection
been used to compensate neutral harmonic currents (Quinn between the UPS system and the power supply when an
et al., 1992; Quinn et al., 1993; Thomas el al., 1996). occasional interruption of the incoming power occurs. The
center-tap of the dc-bus is connected to the utility neutral.
Uninterruptible power supply (UPS) systems have enabled
the improvement of power source quality, providing clean
and uninterruptible power to critical loads such as industrial
process controls, computers, medical equipment, data
communication systems, and protection against power
supply disturbances or interruptions (Oliveira da Silva et
al., 2001; Kamran et al., 1995; Jeon et al., 1997, Cheung et
al., 1996; Lin et al., 1993). In (Lin et al., 1993) a three-
phase parallel processing UPS has been presented with
harmonic and reactive power compensation, but the output
voltages and the input currents cannot be controlled
simultaneously. Three-phase UPS systems with series-
parallel active power-line conditioning have been proposed
using different control strategies (Oliveira da Silva et al., Figure 1. Line-Interactive UPS system topology
2001; Kamran et al., 1995). In (Kamran et al., 1995) the
three-phase UPS system was employed for three-wire
systems, and in (Oliveira da Silva et al., 2001), albeit it can
be employed for three-wire and four-wire systems, the UPS 3 SYNCHRONOUS REFERENCE FRAME
was used to feed a non-linear load composed by a three- AND STATE FEEDBACK
phase non-controlled rectifier, in which neutral currents do CONTROLLERS
not exist.

This paper presents a three-phase line-interactive UPS 3.1 Current SRF-Based Controller
system with active series-parallel power-line conditioning (Standby Mode)
capabilities using an SRF-based controller, for three-wire An SRF-based controller is used to provide and to control
and four-wire systems in which three single-phase loads are , i , and i ) for
fed. In UPS standby operation mode, the series active the compensating reference currents ( ica cb cc
power filter acts as a sinusoidal current source and the the series PWM converter shown in Fig. 1. The block
parallel active power filter acts as a sinusoidal voltage diagram of the control scheme for current compensation is
source (Oliveira da Silva et al., 2001). The output voltages shown in Fig. 2. The three-phase load currents
are controlled to have constant rms values and low THD ( iLa , iLb , iLc ) are measured and transformed into a two-
and the source currents are controlled to be sinusoidal and phase stationary reference frame (dq)s quantities ( id s , iq s )

Revista Controle & Automao/Vol.16 no.2/Abril, Maio e Junho 2005 201


based on the transformation (1). Then, these quantities are Now, the dc components of the synchronous reference
transformed from a two-phase stationary reference frame frame id ce and iq dc
e
can be transformed into the stationary
(dq)s into a two-phase synchronous rotating (dq)e reference
frame, based on the transformation (2), where T = Zt, is reference frame (dq)s. The inverse transformation matrix
the angular position of the reference frame. The unit vectors from two-phase synchronous reference frame to two-phase
stationary reference frame is given by (4). As only the
sinT and cosT are obtained from PLL system. The currents
fundamental active component reference needs to be
at the fundamental frequency Z ( id e and iq e ) are now dc obtained, (4) can be replaced by (5).
values and all the harmonics, transformed into non-dc The matrix that provides the linear transformation from
quantities, can be filtered using a low pass filter (LPF) as two-phase system to three-phase stationary reference frame
shown in Fig. 2. Now, id dc e represents the fundamental
system is given by (6). Thereby, the dc component of the
active component of the load current and iq e represents synchronous reference frame id ce is transformed into the
dc
the fundamental reactive component of the load current, stationary reference frame (dq)s and yields the fundamental
both in dq axis. components of the load currents ( ica , i , and ).
icc Such
cb
reference currents are generated in software.
id sf cos T e
 sin T id dc
s e
iq f
sin T


cos T iq dc (4)

id sf cos T e
 sin T id dc
s sin T (5)
iq f cos T 0

i
ca 1 0 s
2 id f

icb
1 2 3 2 s (6)
3 iq
i cc  1 2  3 2 f

Figure 2. Block diagram of the current
SRF-based controller.
3.2 State Feedback Current Controller
An additional dc-bus controller is responsible for regulating (Standby Mode)
the current I dc and the voltage V dc . Apart from the The single-phase block diagram of the current controller is
conventional active filter applications, in which only the shown in Fig. 3. The load currents ( i L a ,b ,c ) are measured
dc-bus voltage is controlled, the UPS dc-bus controller is and from the current SRF controller the sinusoidal current
able to control the dc-bus current for adequate charging of
the battery bank. The dc-bus controller is also responsible references ( i c a ,b ,c ) are obtained. From Fig. 3, the closed-
to control the active power flow of the UPS system. Its
e
loop transfer function i c ( s ) / i c ( s ) is found as (7), in which
output ibdc is added to the active current in the d axis id dc
the gain of the PWM block is one.
as given by (3) and, thus, the amplitude of the reference
The dynamic stiffness transfer function of the series
currents can be controlled by id ce .
converter is given by (8), which is defined as the magnitude
i La of the difference between the input and output voltages that
id s 2 1 1 2 1 2
s i Lb (1)
iq 3 0 3 2  3 2
i Lc

id e cos T sin T id s
e  sin T (2)
iq cos T iq s

id ce e
id dc  ibdc (3)
Figure 3. Single-phase current controller of the
series active filter (series converter).

202 Revista Controle & Automao/Vol.16 no. 2/Abril, Maio e Junho 2005
ic ( s ) K Ps s  K Is
2
i c ( s ) L fs s  ( K Ps  R L fs )s  K Is (7)

v f ( s )  vs ( s ) L fs s 2  ( K Ps  R L fs )s  K Is
 (8)
ic ( s ) s

The frequency response of equation (7) is shown in Fig. 4


(a) and (b). At the power system frequency (Z = 377 rad/s),
the gain of the system transfer function is about 0 dB and
the phase shift is nearly zero degree. The bandwidth of the
system is about 1600 Hz. Fig. 5 shows the dynamic
stiffness frequency response of the current controller. It can
be noted high impedance obtained from (8) in a large range
Figure 4. Frequency Response of the series active filter of the frequency spectrum, which is enough to isolate the
line from the load with respect to current harmonics. The
i c ( s ) / i c ( s ) :
parameters and gains used to plot the curves of Figs. 4 and
(a) Amplitude response, (b) Phase response. 5 are listed in Table 1.

3.3 State Feedback Voltage Controller


(Standby and Backup Modes)
The parallel converter controls the output voltages to be in
phase with the input voltages. Besides, the output voltages
should be constant rms values with low THD. Similar to the
control algorithm for input current compensation, the
reference voltages ( v ) are generated by software
f a ,b,c
using a PLL system (Oliveira da Silva et al., 2001).

Fig. 6 shows the single-phase block diagram of the voltage


controller, with an outer voltage loop and an inner current
loop. To anticipate any errors to occur in the output voltage,
Figure 5. Dynamic Stiffness of Current Controller a disturbance input decoupling is implemented by
(v f ( s )  vs ( s )) / ic ( s) : Frequency response. measuring the load current i L and the source current i s .
The difference between them is used as an additional
current loop command. Thus, only the capacitor current is
causes a unit deviation in input current is (ic ) :
used as a feedforward command ( i SC ). To
C fp fp
(v f ( s )  v s ( s )) ic ( s ) . The voltage difference is
simplify the control, such command was used only to plot
considered as a disturbance. the curves of Figs. 7 and 8 but it was not implemented in
laboratory. From Fig. 6, the closed-loop transfer function
Table 1 Parameters and Controller Gains
(Current Controller)
Series Filter Inductor, L fs 1.4mH

Inductor Resistance, R Lfs 0,05:

Proportional gain, K Ps 11,21 :

Integral gain, K Is 95231 : s


Figure 6. Single-phase voltage controller of the parallel
active filter (parallel converter).

Revista Controle & Automao/Vol.16 no.2/Abril, Maio e Junho 2005 203


Figure 7. Frequency response of the parallel Figure 8. Dynamic Stiffness of Voltage Controller
active filter v f ( s ) / v f (s) : (iL ( s )  is ( s )) / v f ( s ) : Frequency response.
(a) Amplitude response, (b) Phase response.
The parameters and gains used to plot the curves of Figs. 7
v f ( s ) / v f ( s ) is found as (9), in which the gain of the and 8 are listed in Table 2.
PWM block is one.
Table 2 Parameters and Controller Gains
The dynamic stiffness transfer function of the parallel (Voltage Controller)
converter is given by (10), which is defined as the
Parallel Filter Inductor, L fp 250PH
magnitude of the difference between the output and input
currents that causes a unit deviation in output voltage v f :
Inductor Resistance, R Lfp 0,05:
(i L ( s )  i s ( s )) v f ( s ) . The current difference is considered
as a disturbance. Parallel Filter Capacitor, C fp 130PF

The coefficients X n and Yn of the equation (9) and (10)


Feed-Forward Capacitor, C fp 130PF
are given by (11).
vf (s) X 1s 2  X 2 s  X 3 Proportional gain, K Pi 7,85 :
(9)
v*f (s) 3 2
Y1 s  Y2 s  Y3 s  Y4
Proportional gain, K Pv 2,09 : 1

iL ( s )  is ( s ) Y1 s 3  Y2 s 2  Y3 s  Y4 Integral gain, K Iv 24253 : 1 s


 (10)
vf (s) 2
Z1s  Z 2 s

X1 C fp .K Pi Y1 L fp .C fp Z 1 L fp
X2 K pv .K Pi Y2

C fp .( K Pi  RLfp ) Z 2 RLfp (11)
3.4 Relation between the series | Z S | and
X3 Y4 K Iv .K Pi Y3 K pv .K Pi  1

the parallel | Z p | Impedances.
The frequency response of equation (9) is shown in Fig. 7 From Fig. 8, it can be noted that the higher impedance of
(a) and (b). At the power system frequency (Z = 377 rad/s), the parallel converter occurs at 3 KHz ( | Z p max | 0,4: ).
the gain of the system transfer function is about 0 dB and At this same frequency, from Fig. 5, the impedance of the
the phase shift is nearly zero degree. The bandwidth of the
series converter is | Z S | 20: . Thus, the relation between
system is about 6000 Hz. Fig. 8 shows the dynamic
stiffness frequency response of the voltage controller. It can | Z S | and | Z p max | is approximately 50. This is enough
be seen a high admittance obtained from (10) in a large for the parallel converter to absorb the harmonic currents of
range of the frequency spectrum, which is enough to absorb the load.
the harmonic currents of the load.

204 Revista Controle & Automao/Vol.16 no. 2/Abril, Maio e Junho 2005
From Fig. 5 it can be seen that the lower series impedance ( cos I1 = 1.0 and cos I1 = 0.7). These curves can be used to
occurs at 1,15 KHz ( | Z s min | 12: ). At this same determine the power rate of the series and the parallel
frequency, from Fig. 8, the impedance of the parallel PWM converters.
converter is | Z p | 0,05: . Thus, the relation between
If the charging of the batteries is taking into account,
| Z s min | and | Z p | is approximately 240. This is enough additional active power Pb , given by (14), should be
for the series converter to isolate the line from the load with included in the analysis.
respect to current harmonics of the load.
Thus, equations (16) and (17) replace equations (12) and
(13), respectively, where the charging factor k b is ever
4 ACTIVE POWER FLOW THROUGH
greater than zero, and P , given by equation (15), is the
THE UPS SYSTEM
sum of active load power PL and active power Pb , used to
The direction of the active power flow through the UPS charge the battery bank.
system is shown in Fig. 9. It can ever change because the
amplitude of the input voltages is variable. 2 2
Vf Vf
PL2 1  cos I1 1 
V V (12)
Ss s s
SL PL2  Q L2  H L2 2
1  THDiL

(a)

(b)
Figure 9. Power flow of the UPS system: (a) Vs ! V f ;
(b) V f ! Vs .

Both the apparent powers S s and S p , handled by the (a)

series and by the parallel converters, respectively, depend


on the ratio between the output and input rms voltages
( V f V s ), the displacement factor ( cos I 1 ) and the THD of
the load current i L ( THDiL ). In steady state, assuming a
balanced sinusoidal system, the normalized powers handled
by the parallel converter | S p S L | and by the series
converter | S s S L | are given by equations (12) and (13),
respectively. The quantities S L , PL , Q L and H L are the
apparent, active, reactive and harmonic powers of the load,
respectively.

In Fig. 10 (a) and (b) the normalized powers handled by the (b)
parallel converter | S p S L | and by the series converter
Figure 10. Normalized powers: (a) Parallel converter
| S s S L | are plotted for two different displacement factors | S p S L |, (b) Series converter | S s S L |.

Revista Controle & Automao/Vol.16 no.2/Abril, Maio e Junho 2005 205


Vf Vf
The plots of the normalized powers for two different values
cos 2 I1  2 of k b ( k b = 0 and k b = 0.1) are shown in Fig. 11 (a) and
Sp Vs Vs 1 (13) (b).
SL 2
1  THDiL
Pb kb PL (14) To fixed displacement factor ( cos I 1 ) and load current
THD, depending on the k b value and the input voltage
P PL  Pb PL ( 1  k b ) (15) deviation from the desired output voltage, the batteries
charging can be realized either from the series or parallel
converters or from both as can be observed in Fig. 11 (a).
2 2
2 Vf Vf
P 1  cos I 1 1  kb 1 
(16)
5 EXPERIMENTAL RESULTS
Ss Vs Vs
SL PL2  QL2  H L2 2
1  THDiL The complete scheme of the three-phase line-interactive
UPS system is shown in Fig. 12. To verify the performance
of the three-phase line-interactive UPS system, a prototype
Vf Vf was developed and tested. Three single-phase non-linear
cos2 I1 1  kb 1  kb  2
Sp Vs Vs  1 (17) loads with high load current THD are used to test the line
2 interactive UPS system. The parameters used in the
SL 1  THDiL
prototype are: L fp = 300PH, L fs = 1.4mH, C fp = 130PF,
R La = 62 :, R Lb = 55 :, R Lc = 70:, C L a ,b,c = 470PF,
nominal rms line-to-neutral input voltages - V s a ,b ,c =
120V, nominal rms line-to-neutral output voltages -
V f a,b,c = 115V and dc-bus voltage - Vdc = 570V. The
apparent power rates of the unbalance loads are: S a = 560
VA, S b = 630 VA, and S c = 540 VA.

The part of the scheme shown in the shaded area uses a


400MHz PC computer, a 12 bits resolution data acquisition
system and a 12 bits resolution D/A converter board. Both
current SRF controller and PLL system (Fig. 2) are
implemented in software and are responsible to generate the
(a) current and voltage references for the current and voltage
analog controllers. Both data acquisition systems and
digital controllers run at 5kHz frequency.

The output voltages ( v f a ,b,c ) and load currents ( i L a,b,c )


are shown in Fig. 13 (a), (b) and (c). Despite of the load
current THD to be approximately 100% the THD of the
regulated and balanced output voltages is less than 4%.

Fig. 14 (a) shows the three-phase source voltages V s a ,b , c


and Fig. 14 (b) shows the source currents i s a ,b,c . The
parallel compensation currents ( i ca p , icbp , icc p ) are shown
in Fig. 14 (c). It can be noted that the source currents are
(b) almost sinusoidal and balanced and their THDiL are
Figure 11. Normalized Powers for kb 0 and approximately 10%.
kb 0.1 ( cos I1 1 ):
Details of the source currents, parallel compensation
(a) Parallel converter | S p S L |, currents and uncompensated currents, for phases a, b and c,
(b) Series converter | S s S L |. are shown in Fig. 15 (a), (b), and (c), respectively. Fig. 16

206 Revista Controle & Automao/Vol.16 no. 2/Abril, Maio e Junho 2005
shows output voltage and input current of the phase a. Both *
The quantities v fa , i sa , iLa and i sa (reference input
input currents and output voltages are in phase with the
input voltages. The measured power factor (cos M) is equal current) are shown in Fig. 19 (a), for standby to backup
to 0,982. transition mode that occurs at 0.02s. When the input power
is out the input switch sw is opened and the input current
The neutral conductor load current and the neutral i sa drops to zero, but the output voltage v fa remains
conductor utility current are shown in Fig. 17 (a) and (b), providing power to the load. Thus, the PLL system forces
respectively. It is observed from Fig. 17 (b) that the
amplitude of the utility neutral current has been reduced the UPS to operate at a fixed reference frequency ( Z =
considerably. 377 rad/s).

The input voltage ( v sa ), the output voltage ( v fa ) and the The transition from backup to standby operation mode of
the UPS system occurs at 0.31s, as shown in Fig. 19 (b) and
difference between them ( v ca ) are shown in Fig. 18 (a), (c). When the input power returns, the PLL system
which shows that the output voltages are in phase with synchronizes the UPS system with respect the utility and
respect the input voltages. For the load currents shown in the switch sw is closed. Thereby, immediately the input
Fig. 13 and the ratio between the output and input rms *
current i sa follows the reference i sa .
voltages ( V f V s ) presented in Fig. 18 (a), the source
* *
reference currents i sa ,b,c i ca,b,c obtained from the SRF-
based controller of Fig. 2, can be seen in Fig. 18 (b).

Figure 12. Complete scheme of the line-interactive series-parallel UPS system.

Revista Controle & Automao/Vol.16 no.2/Abril, Maio e Junho 2005 207


(a) (b) (c)
Figure 13. Output voltages ( v fa , v fb , v fc ), and output currents ( iLa , iLb , iLc ): (a) Phase a; (b) Phase b; (c) Phase c.

(a) (b) (c)


Figure 14. (a) Input voltages ( vsa , vsb , vsc ); (b) Input Currents ( isa , isb , isc ). (c) Parallel compensation currents
( ica p , icb p , icc p ).

(a) (b) (c)


Figure 15. Details of the currents: (a) Phase a currents ( iLa , ica p , isa ); (b) Phase b currents ( iLb , ica p , isb );
(c) Phase c currents ( iLc , icc p , isc ).

Note that the output voltage is unaffected by the transitions


from standby to backup mode and from backup to standby 6 CONCLUSIONS
mode. Fig. 19 (d) shows the UPS operating in standby A three-phase line-interactive UPS system topology with
mode. active series-parallel power-line conditioning capabilities
has been implemented and tested for four-wire systems.
Both Figs. 18 and 19 were obtained from data acquisition
With SRF-based controller implementation, balanced and
software.
almost sinusoidal input currents with low THD were
obtained. The levels of both fundamental and harmonic
contents of the utility neutral current have been reduced

208 Revista Controle & Automao/Vol.16 no. 2/Abril, Maio e Junho 2005
Figure 16. Phase a output voltage v fa , and phase a input current isa .

(a) (b)
Figure 17. Neutral currents: (a) Load neutral current inL ; (b) Utility neutral current i ns .

(a) (b)
Figure 18. (a) Input voltage vsa , output voltage v fa , and compensation voltage vca ; (b) Source reference currents
* * *
( isa , isb , and isc ).

considerably. The output voltages are balanced and almost


It has been demonstrated that the experimentally obtained
sinusoidal with low THD.
results agree with good approximation with the
The main advantage of the presented line-interactive UPS theoretically predicted results.
topology, when compared to the on-line topology, which
uses two cascaded PWM power converters working at full REFERENCES
power rating, is the smaller power rating handled by both
series and parallel converters during the standby mode, Gruzs, T. M. (1990). A Survey of Neutral Currents in Three-Phase
Computer Power Systems. IEEE Transactions on Industry
increasing the efficiency of the UPS. The high series
Applications, Vol. 26, No. 4, pp.719-725.
impedance and the low parallel impedance can protect the
load against mains transients.

Revista Controle & Automao/Vol.16 no.2/Abril, Maio e Junho 2005 209


(a) (b)

(c) (d)
Figure 19. Transition modes: (a) Standby-Backup transition mode output voltage v fa , input current isa , reference input
*
current isa , and output current iLa ; (b) and (c) Backup-Standby transition mode; (d) Standby mode.

Quinn, C. A., Mohan, N. (1992). Active Filtering of Harmonic Jeon, S. J., Cho, G. H. (1997). A Series-Parallel Compensated
Currents in Three-Phase, Four-Wire Systems with Three- Uninterruptible Power Supply with Sinusoidal Input
Phase and Single-Phase Non-Linear Loads. Proceedings Current and Sinusoidal Output Voltage. Proceedings of
of the 7th Applied Power Electronics Conference and the 28th Power Electronics Specialist Conference, PESC,
Exposition, APEC, pp. 829-836. pp. 297-303.

Quinn, C. A., Mohan, N., Mehta, H. (1993). A Four-wire, Current- Cheung, R., Cheng, L., Yu, P., Sotudeh, R. (1996). New Line-
Controlled Converter Provides Harmonic Neutralization in Interactive UPS System with DSP-Based Active Power-
Three-Phase, Four-Wire Systems. Proceedings of the 8th Line Conditioning. Proceedings of the 27th Power
Applied Power Electronics Conference and Exposition, Electronics Specialist Conference, PESC, pp. 981-985.
APEC, pp. 841-846.
Lin, Y., Joos, G., Lindsay, J. F. (1993). Performance Analysis of
Thomas T., Haddad K., Jos G., Jaafari A. (1996). Performance Parallel-Processing UPS Systems. Proceedings of the 8th
Evaluation of Three-Phase Three and Four Wire Active Applied Power Electronics Conference and Exposition,
Filters. Proceedings of the 31th Industry Applications APEC, pp. 533-539.
Society Annual Meeting, IAS, pp. 1016-1023.

Oliveira da Silva, S. A.; Donoso-Garcia, P.; Cortizo, P. C.; Seixas,


P. F. (2001). A three-phase line-interactive UPS system
implementation with series-parallel active power-line
conditioning capabilities. Proceedings of the 36th Industry
Applications Society Annual Meeting, IAS, Vol. 4; pp-
2389-2396.

Kamran, F., Habtler T. (1995). A Novel On-Line UPS with


Universal Filtering Capabilities. Proceedings of the 26th
Power Electronics Specialist Conference, PESC, pp. 500-
506.

210 Revista Controle & Automao/Vol.16 no. 2/Abril, Maio e Junho 2005

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