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P RINCIPLES OF SS TECHNIQUE
Receiver:
Bit stream
d(t)
Waveform Filtering / Amplification &
10001 Demodulator Baseband Demodulation
t
TS
Pseudo-Noise
Generator
Wideband
noise-like Synchronization
signal
Pseudo-Noise
SS Receiver: Generator
c (t)
Bit stream
d(t)
Waveform Filtering/Amplification &
Demodulator Baseband Demodulation
10001
t
TS
1
0
Power spectrum of d(t)
00
11
0
1
00
11 0
1
0
1
0
1
Power spectrum of d(t)c(t)
1
0
0
1
00
11
0
1 0
1
P
0
1
P0 0
= 2B
0
1
P0
010110
00
11 00000000
11111111
0
1 0
1 P0
00000000
111111110
1
d(t) d(t)c(t) = G
0
1
2W
frequency W + T1 W frequency
s
B T1
s
c(t)
1
0
0
1
0
1
0
1
00000000
11111111
1
0
1
00000000
11111111
0
1 Power spectrum of c(t) W frequency
0.4
0.2
0
3 2 1 0 1 2 3
Frequency normalised to the symbol rate
0.8
0.6
0.4
0.2
0
3 2 1 0 1 2 3
0.6
0.4
0.2
0
3 2 1 0 1 2 3
Frequency normalised to the symbol rate
0.8
0.6
0.4
0.2
0
3 2 1 0 1 2 3
The ratio
W
G
= W Ts
B
is called the spreading factor (SF), spreading gain or processing gain of the
SS system.
A DVANTAGES OF SS TECHNIQUE
A DVANTAGES OF SS S YSTEMS
3. High tolerance against interference (contd).
0
1
1111
0000
0
1
0000
1111
0
1
0000
1111
P 0
1
0000
1111
0
1
11111111
00000000
0000
1111
0B
1
Baseband digital signal
0110
1010 10
f
111
000
Bandwidth expansion
000
111 0
1
000
111
J Baseband spread digital signal
1010 10 00
11
+ interference
000
111
0000000
1111111
0000000
1111111
11111111
00000000
0
1 10
W f
Bandwidth compression
Bandwidth expansion
0000
1111
0000
1111
0000
1111 0
1
0
1
P
0000
1111
Baseband digital signal
0000
1111 0
1
J
+ residual interference
0000
1111
11111111
00000000 0
1 B W f
P
SIRd = G = SIRi G
J
In dB:
[SIRd ]dB = [SIRi ]dB + [G]dB
SIRi : Input signal-to-interference ratio.
SIRd : Signal-to-interference ratio after despreading.
A DVANTAGES OF SS S YSTEMS
4. Multiple access operation (CDMA).
2B
2B 2B
1 2W
1 1
1 /G
2 /G 2 /G
d1 (t) Lowpass d1 (t)
filter
c1 (t) c
1 (t)
2W
2B
2B 2B
2
2 2W
2 2
2 /G 1 /G 1 /G
d2 (t) Lowpass d2 (t)
filter
c2 (t) c
2 (t)
0.4
0.2
0
3 2 1 0 1 2 3
Frequency normalised to the symbol rate
0.8
0.6
0.4
0.2
0
3 2 1 0 1 2 3
0.6
0.4
0.2
0
3 2 1 0 1 2 3
Frequency normalised to the symbol rate
0.8
0.6
0.4
0.2
0
3 2 1 0 1 2 3
c(t) t
Tc = Ts /N
PN sequence
generator
1
1/2W
f
W T1
c
Power spectrum of c(t)
f0
1.5
1
Th
{d(t) c(t)}
0.5
d(t) Ts 0
0.5
1.5
Ts
0 1 2 3 4 5 6
d(t) c(t)
Th
PN-Sequence Digital Frequency
1
0.5
{c(t)}
Generator Synthesizer 0
0.5
1.5
Ts
0 1 2 3 4 5 6
Th
f
2W
f0
2B
t
W
Processing gain, G = B
chip #1 chip #1
fc [1] fc [1]
Combiner
bit stream chip #2 chip #2 bit stream
Modulator Demodulator
fc [2] fc [2]
chip #M chip #M
fc [M ] fc [M ]
Code vector Code vector
PN-Sequence PN-Sequence
Generator Generator
Synchronized
ACCESS TECHNIQUES
User 3
User 2
User 1
Time Time Time
User 1
User 2
D UPLEX TECHNIQUES
frequency
Downlink (DL)
duplex
separation
Uplink (UL)
FDD
TDD frame
DL UL DL UL DL UL
TDD
time
S = {(000111101011001), (010011010111100)}
Shift Property
The numbers of disagreements and agreements between each se-
quence in S and its cyclically shifted versions are approximately the
same.
0 0 0 1 1 1 1 0 1 0 1 1 0 0 1
1 0 0 1 0 0 0 1 1 1 1 0 1 0 1
+ + + + + + +
+ = agreement
- = disagreement
Separation Property
The numbers of disagreements and agreements between any two
sequences in S or their cyclically shifted versions are approximately
the same
0 0 0 1 1 1 1 0 1 0 1 1 0 0 1
0 0 1 1 0 1 0 1 1 1 1 0 0 0 1
+ + + + + + + + +
+ = agreement
- = disagreement
Autocorrelation of a:
N 1
Ra (l) = an a(l)
n
n=0
Example:
l=2 a 1 1 1 1 1 1 1
a(2) 1 1 1 1 1 1 1
a a(2) 1 1 1 1 1 1 1 Ra (2) = 1
l
-1
Ra (l) = # of agreements
- # of disagreements
between a and a(l) .
Properties of Ra (l):
1. Ra (0) = N .
2. |Ra (l)| Ra (0) = N .
(l)
Ra,b (l) is a measure of the resemblance between a and b n .
|Ra,b (l)| = N a = b
Ra,b (l) = 0 a and b are orthogonal
Ra,b (l)
3
l
-1
-5
S
S contains M sequences
b of length N
a
Welch bound:
M 1
max {|Ra,a (l)|} , max {|Ra,b (l)|} N = Rc
l=cN l MN 1
For M large
Rc N
The Welch bound gives a lower bound on the minimum resemblance
between any arbitrary shifted, distinct versions of any two selected se-
quences in S.
Spread-Spectrum Technique and its Application to DS/CDMA, Fall 2008 # 35
1 0 0 0 0 Output
Clock
pulses
01011101100011111001101001
00001
init.
am f1 f2 f3 fn
Clock
pulses
f (x) = 1 + f1 x + f2 x2 + + fn xn
N 2n 1.
Example: N = 31.
Ra (l)
31
-1 l
0 31
Given the binary sequence a and the circularly shifted version a (l) , both
with period N , the auto-correlation R a (l) can be written as
where
Notice that
A(a, a(l) ) + D(a, a(l) ) = N.
Thus,
Ra (l) = N W (a a ) W (a a(l) ).
(l)
For ML sequences,
Hence,
Ra (l
= iN ) = N 2W (a a(l) )
= N 2W (a)
= 1.
n N = 2n 1 Np (n) n N = 2n 1 Np (n)
2 3 1 11 2047 176
3 7 2 12 4095 144
4 15 2 13 8191 630
5 31 6 14 16383 756
6 63 6 15 32767 1800
7 127 18 16 65535 2048
8 255 16 17 131071 7710
9 511 48 18 262143 8064
10 1023 60 19 524287 27594
p (2n 1)
Np (n) = n , p (m) Euler totient function (number of integers less
than m which are relatively prime to m).
l
l
lag l
Example: N = 31, Np (5) = 6 different PN sequences.
Let c and c denote two Gold sequences from the above set.
Autocorrelation property:
= N, l=0
Rc (l)
{t(n), 1, t(n) 2} l = 1, . . . , N 1
Crosscorrelation property:
Rc,c (l) {t(n), 1, t(n) 2}
bm f1 f2 f3 fn
Clock Output
pulses cm
am f1 f2 f3 fn
G OLD SEQUENCES
1 2 3 4 5
f1 (x) = 1 + x2 + x5
seq1: N = 25 1 = 31 chips
N = 31 chips
f2 (x) = 1 + x2 + x3 + x4 + x5
seq2: N = 25 1 = 31 chips
1 2 3 4 5
Sequence 1: 1111100011011101010000100101100
Sequence 2: 1111100100110000101101010001110
0 shift combination: 0000000111101101111101110100010
1 shift combination: 0000101010111100001010000110001
..
.
30 shift combination: 1000010001000101000110001101011
Cyclic shift of sequence 2 to the left.
35 10
30 8
6
25
4
20
Ra,b (l)
15
Ra (l)
0
10
2
5
4
0
6
5 8
10 10
0 10 20 30 40 50 60 0 10 20 30 40 50 60
lag l lag l
Infinite field : F has infinite elements, e.g. the field of real numbers.
Let
c1 () = c1,0 () + c1,1 + + c1,n1 n1 GF (2n )
c2 () = c2,0 () + c2,1 + + c2,n1 n1 GF (2n )
Addition
c1 ()+c2 () = (c1,0 c2,0 )+(c1,1 c2,1 )+ +(c1,n1 c2,n1 )n1
Multiplication
c1 () c2 () = (c1,0 + c1,1 + + c1,n1 n1 )
(c2,0 + c2,1 + + c2,n1 n1 )
Spread-Spectrum Technique and its Application to DS/CDMA, Fall 2008 # 55
n = fn1 n1 + . . . + f1 + f0
P RIMITIVE P OLYNOMIAL
Primitive polynomial: An irreducible polynomial f (x) of degree n is said to
be primitive if one of its roots is a primitive element of GF (2 n ).
c1 c2 cn1
x1 x2 xn1 xn
D D D
c1 c2 cn1
x1 x2 xn1 xn
D D D
X(t + 1) = TX(t),
where X(t) = [xn (t), xn1 (t), . . . , x1 (t)]T is the state vector.
0 1 0
D
x1
D
x2
D
x3 TS = 0 0 1
1 1 0
MSRG:
1 1 0
D
x1
D
x2
D
x3 TM = 0 0 1
1 0 0
SSRG MSRG
Clock Memory State vectors Memory State vectors
t=0 001 1 001 1
t=1 010 010
t=2 101 3 100 2
t=3 011 5 101 3
t=4 111 4 111 4
t=5 110 6 011 5
t=6 100 2 110 6
g(x)
a(x) = , g(x) = g0 + g1 x + . . . + gn xn1 .
f (x)
In modulo-2 arithmetic,
1 1
1 + xN + x2N + x3N + . . . = = .
1x N 1 + xN
Thus,
b(x)
N 1
g(x) a0 + a1 x + . . . + aN 1 x
= a(x) = .
f (x) 1 + xN
(N 1) Db = n 1 Dg zeros.
n=3
Dg = 1
Period: N = 2n 1 = 23 1 = 7
Number of trailing zeros: n 1 Dg = 3 1 1
1+x
= 1 + x3 + x4 + x5 + x7 + x10 + x11 + x12 + . . .
1 + x + x3
7-bit period
1 0 0
1 1 1 0 1 0 0 1 1 1 0...
Initial
conditions
One trailing zero
S HIFTED SEQUENCES
bk (x), first period, with n 1 Dg zeros at end
Spread-Spectrum Technique and its Application to DS/CDMA, Fall 2008 # 69
SSRG I MPLEMENTATION
n1 zeros
Initial loading: 1 00 . . . 0
c1 c2 c3 cn1
xn1
1 0 0 0 0 f (x)
1 x x2 xn2 xn1
f (x) f (x) f (x) f (x) f (x)
n1 zeros
Initial loading: 00 . . . 0 1
c1 c2 c3 cn1
gn(x)
0 0 0 0 1 f (x)
x x2 xn1 gn(x) xn modf (x)
f (x) f (x) f (x) f (x) = f (x)
c1 c2 c3 cn1
xn1
1 0 0 0 0 f (x)
1 x x2 xn2 xn1
f (x) f (x) f (x) f (x) f (x)
Mask
m0 m1 m2 mn2 mn1
m(x)
f (x)
S YNCHRONISATION
Signal model Channel noise
w(t)
Received signal
{b(l)}l=0
L1
s(t)
Delay y(t)
+
+
1
Amplification
cos(0 t + 1 )
2P
L1
y(t) = P Ts b(l) s(t lTs 1 ) 2 cos (0 t + 1 ) + w(t).
l=0
sl (t;1 ,1 )
s(t;,,b)
L1
exp {b(l) z1 (l; , )}
l=0
ML SYNCHRONIZATION ( CONT D )
Likelihood function for (, )
L1
log (, ) = log cosh {z1 (l; , )} .
l=0
d log (, ) L1
= z2 (l; , ) tanh{z1 (l; , )}
d
l=0
with
d
z2 (l; , ) = z1 (l; , )
d
(l+1)Ts +
d
= sl (t; , ) dt
y(t)
lTs + d
(l+1)Ts +
= y(t) s(t lTs ) 2 sin (0 t + ) dt
lTs +
lTs + 1
s(t) tanh()
cos(w0 t + 1 )
90o tanh(z1 (l; 1 , 1 ))
y(t)
L1
VCO l=0
sin(w0 t + 1 ) z2 (l; 1 , 1 ))
lTs + 1
s(t)
lTs + 1
s(t)
sin(w0 t + 1 )
90o z1 (l; 1 , 1 )
y(t)
L1
VCO l=0
cos(w0 t + 1 ) z2 (l; 1 , 1 )
lTs + 1
s(t)
z1 (t)
Filter
s(t)
90o
y(t) (t)
VCO F (p)
z2 (t)
Filter
s(t)
Phase
Loop Locked
y(t) Square y(t) 2 Band z(t) (t) Filter Loop (PLL)
Law Pass
Device Filter F (p)
To next
synchronization
stage Frequency
Scaling rVCO(t)
VCO
f
2
L1
y(t) = P Ts b(l)s(t lTs 1 ) 2 cos (0 t + 1 ) + w(t)
l=0
Hence it follows for the error signal at the input of the loop filter:
where 1 1 .
1
21 = F (p){(t)}
p
L1
1 P Ts
= F (p) s(t lTs 1 )2 sin 2 + n
(t, ) .
p 2
l=0
Phase diagram
2 2
2
T IMING SYNCHRONISATION
Pilot sequence with larger SNR
Pilot chip sequence (unmodulated)
data data
time
ACQUISITION
Correlation method
ACQUISITION ( CONT D )
Serial Search
Z 2 Yes
y(t) = 1 c(t 1 ) + w(t)
Threshold Tracking
()dt
T Detector
D No
1 )
c(t
1
PN Adjust delay
Generator
Uncertainty interval
ACQUISITION ( CONT D )
Serial Search Strategies
t Yes
Bandpass Square law Signal above Tracking
() dt
+
ACQUISITION ( CONT D )
Probability of Detection and False Alarm
1
= 1
1 = 1
Output of
the correlator
Threshold h
No
Yes
No Verification State:
Output above Integration time
threshold ? TD2 > TD1
Yes
Hypothesis accepted
Acquisition completed
T RACKING
Early-late gate tracking (coherent)
This is equivalent to
d
1 = arg zero ( ) arg zero{( + ) ( )}
d
arg zero y(t)c(t ( + )) dt y(t)c(t ( )) dt
TD TD
Early
T RACKING ( CONT D )
A non-coherent delay-locked loop
- (t)
y(t) c(t 1 + ) +
c(t 1 )
Delay c(t 1 )
T RACKING ( CONT D )
Transfer function of the VCC in operator notation
1 F (p)
= {(t)}
Tc p
2
1 P Ts CV F (p) 2
= {Rc (1 1 ) Rc2 (1 1 + )) + ntotal (t, )}
Tc p
.
1
Tc = 1T
c
1
+ D( ) + P Ts CV F (p)
1 loop filter
Tc
1
p
VCC
T RACKING ( CONT D )
Discriminator characteristic
D( ) = Rc ([ 1
Q ]Tc )
2
Rc ([ + 1
Q ]Tc )
2
+1
1 1
Q 1 + 1
Q Q
1
1
Q
1 1
Q 1+ 1
Q
1 = Tc
Q
+1
1 1
Q Q
1
1 1
Q 1 + 1
Q
1
Q
1+ 1
Q
PATH DIVERSITY
Selection diversity(SD): take the signal diversity component with the
highest SNR.
ZL
Diversity channel #L MFL
c,L
S ELECTION DIVERSITY
Let the average SNR of any diversity channel (path) be
Eb
c = c,1 = c,2 = . . . = c,L = E 2
LN0
The probability that SNRs at all L receivers are below the value
L L
P {c,1 , c,2 , . . . , c,L < } = P {c,l < } = pc,l () d
l=1 l=1 0
L
c
= 1e
d
pmax () = P {c,1 , c,2 , . . . , c,L < }
d
L
= (1 e c )L1 e c
c
For BPSK,
Eb 1 2
Pb = Q 2 , Q(x) = ex /2
dx
N0 2 x
and hence,
Pb = Q 2 pmax () d
0
L1 ! "
L L1 (1)k c
= 1 .
2 k k+1 k + 1 + c
k
1
10
Probability of biterror
2
10 L=1
L=2
3
10
AWGN
L=3
L=4
4
10
0 5 10 15 20
SNR per bit (dB)
and hence
! L+l1 "
L1
Pb = Q 2 pc () d = pL (1 p)l
0 l
l
! "
1 c
p 1 .
2 1 + c
1
10
Probability of biterror
2
10
L=1
3
10 L=2
AWGN
L=3
L=4
4
10
0 5 10 15 20
SNR per bit (dB)
nTs +
1
c(t
1 )
PN c(t)
1
Delay
Generator
1
|h( )|
|1 |( 1 )
(n+1)Ts +
1
Z1 (n) = y(t)c(t 1 ) dt
nTs +
1
1 1 ) + W1 (n)
= 1 Rc (
Hence,
Z1 (n)
1 =
.
Rc (0)
1
PL nTs +
2
y(t) = =1 c(t ) + w(t) Z (n+1)T +
s 2 Detection
()dt Decoding
nTs +
2
2
nTs +
L
Z (n+1)T +
s L
()dt
nTs +
L
c(t
1 )c(t
2 )c(t
L )
L
PN c(t) 1
L
2
Generator Delay line
|h( )| |1 |(t 1 )
|L |(t L )
|2 |(t 2 )
1 2 L
l ,
l = l = 1, . . . , L
l )) ,
l = exp (j arg( l = 1, . . . , L
k
K
User of interest
2
Base station
strong
1 Interferer
weak
P OWER CONTROL
Pt1
d
Pr1
Duplexer AGC
BTS Pr2
Measure Rx
Pt2 power
PA
Adjust Tx power
Mobile station
Open loop power control relies on the assumption that the power-
loss in the uplink and downlink channels are identical.
The uplink and downlink channels are separated by 130 MHz in the
UMTS system, which far exceeds the coherence bandwidth.
Consequently, fluctuation of the channel coefficients in the two
bands are uncorrelated and open loop power control fails in com-
pensating for fast fading!
User data
MUX Demultiplexer Decoding
AGC
adjust Eb/No
target Eb/No, SNR
measurement Power control
commands
Measure Quality
Base station closed loop power control functions Mobile station closed loop power control functions
Pt (n) = Pt (n 1) + PC (n)
MS1
BTS1
MS2
MS3
BTS2
H ANDOVER
Interfrequency Handover
Intrafrequency Handover
f1 f1
f3
f2 f2
f1 f1
f2
f2 f1
f1 f1
a) b)
I NTERFREQUENCY H ANDOVER
Instantaneous power
Idle time
Time
Normal transmission Slotted Transmission
M ULTIPLEX TECHNIQUES
frequency
Downlink (DL)
duplex
separation
Uplink (UL)
FDD
TDD frame
DL UL DL UL DL UL
TDD
time
clong,1,n
MSB LSB
f1 (X) = X 25 + X 3 + 1
f2 (X) = X 25 + X 3 + X 2 + X + 1 clong,2,n
The selected codes are defined from the family of periodically extended
S(2) Codes (N=255)
2
7 6 5 4 3 2 1 0
d(i)
f0 (X) = X 8 + X 5 + 3x2 + x2 + 2x
mod 2
+ + + 2
f1 (X) = X 8 + X 7 + X 5 + x + 1
zn(i)
7 6 5 4 3 2 1 0
b(i)
+ Mapper
cshort,2,n(i)
multiplication mod 4
mod 2
+ + +
7 6 5 4 3 2 1 0
f2 (X) = X 8 + X 7 + X 5 + X 4 + x
a(i)
3 3
2
3
mod 4
+ + + +
I
Sdl,n
Any downlink
S
S
physical channel I+jQ
Cch,SF,m
except SCH
P Q
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
f1 (X) = X 18 + X 7 + 1 I
f2 (X) = X 18 + X 10 + X 7 + X 5 + 1
Q
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
C ONVOLUTIONAL E NCODER
Input
D D D D D D D D
Output 0
G0 = 561 (octal)
Output 1
G1 = 753(octal)
(a) Rate 1/2 convolutional coder
Input
D D D D D D D D
Output 0
G0 = 557 (octal)
Output 1
G1 = 663 (octal)
Output 2
G2 = 711 (octal)
(b) Rate 1/3 convolutional coder
DPCCH DPDCH
Pilot TPC TFI Data
Npilot bits NTPC bits NTFI bits Ndata bits
Time slot
Data
DPDCH Ndata bits
Pilot: Known pilot bits
k
Tslot = 2560 chips, Ndata = 10*2 bits (k=0..6) support channel estima-
tion for coherent detec-
Pilot TFCI FBI TPC tion.
DPCCH Npilot bits NFBI bits NTPC bits
NTFCI bits
TPC: Transmit power-
Tslot = 2560 chips, 10 bits control commands
FBI: Feedback informa-
tion
TFCI: Optional transport
format combination indi-
Slot #0 Slot #1 Slot #i Slot #14
cator
1 radio frame: Tf = 10 ms
cd,1 bd
DPDCH1
cd,3 bd
S
DPDCH3 I
cd,5 bd
DPDCH5
Sdpch,n
I+jQ
cd,2 bd
S
DPDCH2
cd,4 bd
DPDCH4
bd
S
cd,6 Q
DPDCH6
j
cc bc
DPCCH
DPCCH DPDCH
Pilot TPC TFI Data
Npilot bits NTPC bits NTFI bits Ndata bits
Tsuper = 720 ms