You are on page 1of 12

Analog Filter Design

(EET3132)

Lab 1: Design of OPAMP based circuits

Siksha O Anusandhan University, Bhubaneswar.

Branch: EEE Section: C Sub-group Number:


Sl. No. Name Registration No. Signature
1. Rishav Chakraborty 1441014131

Lab Partners

Sl. No. Name Registration No. Signature


2.

3.

4.

5.

6.
AFD (EET3132) 2

Siksha O Anusandhan University, Bhubaneswar.

1. Assignment Set 1.1

Design a practical audio amplifier with a gain K N = 500 in the frequency range
f f [ 3 dB ] =30 KHz . The circuit should be very inexpensive and should use LM741 ICs.

a. Use the circuit shown in Fig. 1. Derive the expression for the transfer function.
Find the values of R1and R2 for achieving the required gain.

b. Implement the circuit in Multisim and perform an AC analysis of the same.

c. Is the behavior of the frequency response acceptable? Suggest ways to improve


the frequency response.

Fig. 1. A modified high gain amplifier circuit

a. Calculations
i. Derive the expression for the transfer function.

Lab.: 1
AFD (EET3132) 3
Ans.Let the current I1 flows through R1 from the source voltage V1 which is equals to
the summation of Iin that is the current due to virtual ground concept and the IR 2 ,
where Iin=0.
Thus I1 = IR2
V V 2

R2
V
V 1 =
R1

V V 2

R2 R2
V
=
R1
V1

R1
G2V 2 G2
G 1=V
V 1 G1V
G
( 1+G 2)=V 1 G 1 +V 2 G 2

V

G
( 1+G 2)(1)
V G +V G
= 1 1 2 2

V
Both the Opamps we have choosen are identical ones.
Thus V2 = (A- x A2)V-
V2 = -A2V- --------------------------- (2)
Now substituting V- from equation (1) in (2) we have:
V 1 G 1 +V 2 G 2
V 2=A
2
( G 1 +G 2 )
A 2 V 1 G 1 A 2 V 2 G 2
V 2= +
G 1 +G 2 G 1 +G 2

A 2 V 2 G 2 A 2 V 1 G 1
V 2+ =
G1 +G2 G1 +G2
V2 G 1
=
V1 G 1 +G 2
G2 + 2
A
Lab.: 1
AFD (EET3132) 4
1
V2 R1
=
V1 1 1
+
1 R1 R 2
+
R2 A2
V 2 R 2 1

(( ( ) ))
=
V1 R1 R2
+1
R1
1+
A2
R2
Assuming =K N
R1

We have:
V2 1
V1
=K N
(( 1+ ))
( K N +1 )
A2
( 3)

The above equation-3 represents the transfer function of the given system of
combination of opamps.
ii. Calculate the values of the parameters of the circuit shown in Fig. 1.
t
Ans. Integrator model A(s) =
s
1
V2
V 1 = -KN x 1 [
2 1+ K N
2
]
t
500
= 501
12 [ 2 ]
t
V2
V1
= when
1 2
[ ]501
t
2
=0

2
[ ]501
t 2
=1

ft
f= = 67kHz
501

iii. Choose suitable values of the parameters.


Ans. R1 = 1k and R2 = 500 k.

Lab.: 1
AFD (EET3132) 5
b. Observations
i. Implement the circuit in Multisim.
ii. Perform an AC analysis of the Circuit.
iii. Paste the circuit and the results in this section.

Ans. Circuit Diagram:

Without Potentiometer

Result:
AC Analysis Without Potentiometer:

Lab.: 1
AFD (EET3132) 6
Frequency at which it occurs is 65.88kHz.

c. Suggested Improvements
i. Does the frequency response look alright?
Ans. No the frequency response does not look right since there is step in frequency
curve at 65kHz.
ii. Find the reason of the badly-behaved frequency response of this circuit.
Ans.This occurred because of these frequency specifications.
iii. Can this be avoided?
Ans. This error can be avoided only if we add a potentiometer in the feedback circuit in
relevance with the first opamp.
iv. Suggest the improvements for this circuit.
Ans. The improvements done in this circuit is using a 20 k potentiometer.

d. Observations from the improved circuit


i. Implement the improved circuit in Multisim.
ii. Perform an AC analysis of the Circuit.
iii. Paste the circuit and the results in this section.

Ans. With Potentiometer

Lab.: 1
AFD (EET3132) 7

Result:
AC Analysis With Potentiometer:

Frequency at which it occurs is 37.3971kHz

Lab.: 1
AFD (EET3132) 8

e. Conclusion
1. Did the suggested improvement work? Why?
Ans.Yes, it worked. The overshoot is minimised.

2. Assignment Set 1.2

An operational amplifier in a summing configuration can be used to convert a digital


signal expressed as a binary number to an analog value. Consider, for example, the
following 4 bit binary weighted ladder DAC (Digital to Analog Converter) shown in Fig.
2. The binary inputs, ai (where i = 1, 2, 3 and 4) have values of either 0 or 1. The value,
0, represents an open switch while 1 represents a closed switch. :

Lab.: 1
AFD (EET3132) 9
a. Show that the output voltage, given by

V ref Rf a1 a 2 a3 a4
V out = ( R )( + + +
2 4 8 16 )
b. Implement the circuit in MultiSim and compare the values of output voltages for all
16 combinations of a1, a2, a3 and a4.

Fig. 2. A binary weighted Resistor DAC

a. Calculations
i. Derive the expression for the output voltage for the circuit shown in Fig. 2.

Ans. We have I = V ref ( 21R + 41R + 81R + 161R )


V out
similarily we have Iout =
Rf

Since we know I = - Iout

Thus by substituting the valuesd of I and Ioutwe have,

1 1 1 1 V out
V ref ( + + +
2 R 4 R 8 R 16 R
=
Rf )
Lab.: 1
AFD (EET3132)
10
V ref 1 1 1 1
+( + +
R f 2 R 4 R 8 R 16 R
=V out )
V ref 1 1 1 1
V out = ( + + +
Rf 2 R 4 R 8 R 16 R )
(1)

The above equation 1 is only valid when all the switches i.e. a 1 , a2 , a3 and a4 are
connected.

But if we take combinations of switches then the equation 1 can be rewritten as :

V ref a 1 a2 a3 a4
V out = ( + + +
R f R 2 4 8 16 ) , which is the output voltage relationship equation

with respect to the input.

ii. Choose Rf = R and Vref = 5V.

Ans. Assuming the given circuit we have assumed the feedback resistance i.e. R f =
1k and the other resistors are corresponding said to be 2 k , 4k , 8k , 16k.

iii. Choose suitable values of the parameters.


Ans. The reference voltage chosen is +5 voltsVcc and Vee will be 12V , and the
resistors that is the feedback resistor Rf is taken to be 1 k and simultaneously the
other value of the input resistors are taken to be 2 k , 4k , 8k , 16 k .

b. Observations
i. Implement the circuit in Multisim.
ii. Paste the circuit and the results in this section.
Ans.

Lab.: 1
AFD (EET3132)
11

iii. Find the calculated and observed values of the output voltage and complete the
following table.
Sl. No. Digital Inputs Calculate Observed
a1 a2 a3 a4 d Vout (V) Vout (V)

1. 0 0 0 0 0 1.116 mV

2. 0 0 0 1 -312 mV -311.31 mV

3. 0 0 1 0 -625 mV -623.75 mV

4. 0 0 1 1 -937 mV -936.18 mV

5. 0 1 0 0 -1.25 V -1.249 V

6. 0 1 0 1 -1.562 V -1.561 V

7. 0 1 1 0 -1.875 V -1.873 V

8. 0 1 1 1 -2.187 V -2.186 V

9. 1 0 0 0 -2.5 V -2.498V

10. 1 0 0 1 -2.812 V -2.811 V

11. 1 0 1 0 -3.125 V -3.123 V

12. 1 0 1 1 -3.437 V -3.436 V

Lab.: 1
AFD (EET3132)
12
13. 1 1 0 0 -3.75 V -3.748 V

14. 1 1 0 1 -4.06 V -4.061 V

15. 1 1 1 0 -4.375 V -4.373 V

16. 1 1 1 1 -4.687 V -4.685 V

c. Conclusion
i. What are the limitations in this circuit?
Ans. The limitations of this binary weighted resistor summing circuit are:
Need large range of resistor values with high precision in low resistor
values
Need very small switch resistances
Op-amp may have trouble producing low currents at the low range of a
high precision DAC

ii. List some of the better DAC circuits and their relative merits.
Ans. Some of the better DAC circuits are:
Motor speed controller
Digital Motor Control
Computer Printers
Sound Equipment (e.g. CD/MP3 Players, etc.)
Digital Thermostat
The merits of these circuits are:
The settling time required for the voltage to settle within +/- the voltage
associated with the VLSB. Any change in the input time will not be reflected
immediately due to the lag time.
When the output voltage overshoots the desired analog output voltage , then the
overshoot occurs

Lab.: 1