DELL Vostro 1400 QUANTA Fm5-Corsica PDF

1 2 3 4 5 6 7 8
Cosica / Gilligan UMA VER : 2B

C&G UMA M/B PCB
A A
SYSTEM PG 38 POWER
POWER Merom CLOCK
RESET CIRCUIT gen.
(478 Micro-FCPGA) REGULATOR PG 43
BATT +1.5V_RUN/+1.05V_VCCP CPU VR PG 45 CK505
PG 40 PG 3,4
AC/BATT CHARGER
REGULATOR PG 42 PG 17
CONNECTOR +1.8V_SUS/+1.25V_SRC_M
RUN POWER SW (Symbol Rev.09) DC/DC PG 44
PG 41 PG 39
+3.3V_SUS/+5V_SUS/+3.3V_M +1.05V_M/+0.9V_DDR_VTT +3.3V_ALW/+5V_ALW/+15V_ALW
+5V/+3.3V/+1.8V/+1.25_RUN
PG 41
667/800 MHz FSB
LVDS
Panel Connector PG 18
Crestline
DDR2-SODIMM1 533/667 MHZ DDR II TVOUT S-Video CONN.
B
1299 uFCBGA B
PG 15,16 PG 19
PG 5,6,7,8,9,10
VGA CRT CONN.
www.kythuatvitinh.com
533/667 MHZ DDR II
DDR2-SODIMM2 PG 19
(Symbol Rev.09)
PG 15,16
USB2.0 (P0,P1) (EXT SIDE)
USB X 4
USB2.0 (P2,P3) (EXT BACK)
IDE PG 27
DMI interface
Fix ODD 1394 & Conn.
PG 23 PG 21
R5C833 Controller
33MHz PCI
PG 20-22
ICH8-M 8 in 1 Conn.
SATA - HDD SATA PG 22
33MHz PCI LOM BCM4401 B0
PG 23 676 BGA
PG 35,36
IHDA PG 11,12,13,14 PCIEx1 EXPRESS-CARD
C USB2.0 (P6) C
PG 26
MDC BTB PCIEX3
AUDIO/AMP connector. (Symbol Rev.09) USB2.0 (P7,P9)
PG 32,33 MINI-CARD x3
PG 26
WPAN & WWAN & WLAN
LPC PG 24,25
SPI
Audio jack
S/PDIF
BTB Conn.
PG 20
PG 33 PG 28 SIO SIO USB2.0 (P5) Dig Camera
MEC5025 ECE5011
BC PG 33
To connector for Media 128KB Flash BC Expander
PS/2 TMKBC GPIOs
board/Touch pad/KBC
module Media board
PG 31 Controller signal 128 Pins VTQFP 128 Pins VTQFP
PG 28 PG 29
D Digitally signed by fdsf D
SPI
DN: cn=fdsf, o=fsdfsd,
USER FAN & THERMAL QUANTA ou=ffsdf,
FLASH CIR INTERFACE EMC4001 COMPUTER
PG 30 PG 31 PG 37 PG 34
Title
Schematic Block Diagram1
email=fdfsd@fsdff, c=US
Size Document Number
C & G UMA
Date: 2010.03.29 Rev
2A
Date: Thursday, January 25, 2007 18:08:03 +07'00'

Sheet 1 of 60
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
INDEX Power & Ground

Pg# Description DNI LIST Label Pg# Description Control Signal
1 Schematic Block Diagram DC_IN+ AC ADAPTER (19V)
2 Front Page PBATT+ MAIN BATTERY + (10~17V)
3-4 Merom PBATT+ SECOND BATTERY + (10~17V)

A A
5-10 Crestline PWR_SRC MAIN POWER (10~19V)
11-14 ICH8M RTC_PWR3_3V RTC & +3.3V_RTC_LDO(3.3V)
15-16 DDRII SO-DIMM(200P) +VCC_CORE CPU CORE POWER (1.5V) RUNPWROK
17 Clock Generator +15V_ALW LARGE POWER (15V) SUS_ON
18-19 VGA/LVDS/CRT/S-Video +3.3V_RUN SLP_S3# CTRLD POWER RUN_ON
20 8 in 1 controller +3.3V_SUS SLP_S5# CTRLD POWER SUS_ENABLE
21 1394 function +3.3V_ALW 8051 POWER (3.3V) ALWON/THERM_STP#
22 8 in 1 connector +5V_RUN SLP_S3# CTRLD POWER RUN_ON
23 SATA & IDE Conn +5V_SUS SLP_S5# CTRLD POWER SUS_ON
24-25 Mini Card (WLAN/WPAN/WWAN) +5V_HDD HDD POWER (5V) +5V_RUN

B B
26 Express Card + MDC BTB Connector +5V_MOD MODULE POWER (5V) HDD_EN
27 USB Conn. +5V_ALW LCD/CHARGE POWER (5V)
28 SIO (MEC5025) +VDDA AUDIO ANALOG POWER (5V) AUDIO_AVDD_ON
29 SIO (MEC5011) +1.5V_RUN CALISTOGA/ICH7 POWER RUN_ON
30 Flash / RTC +1.05V_VCCP CPU/CALISTOGA/ICH7 POWER RUN_ON
31 TP/KB/Media/CIR Conn. +1_8V_SUS SODIMM POWER SUSPWROK_5V
32-33 Audio CODEC(STAC9200)/Phone Jack +1.8V_RUN SDVO POWER RUN_ON
34 FAN & Thermal +0.9V_DDR_VTT SODIMM POWER RUN_ON
35-36 LOM (BCM4401) +3.3V_LAN LAN POWER AUX_EN
C 37 Dash/LED/BT Conn. C
38 System reset CKT.

39 RUN Power Switch GND ALL PAGES DIGITAL GROUND
40 Battery Charger AGND_ISL6260 CPU GND
41 DCIN/Batt Conn. AGND_TPS51120 DC/DC POWER GND
42 1.25V,1.8V,0.9V AGND1 VTT POWER GND
43 1.5VSUS,1.05V(VTT) AGND2 VTT POWER GND
44 D/D Power 8731AGND CHARGER GND
45 CPU_ISL6260(3phase)
46 EMI CAP & Screw Hole.
D D
QUANTA
Title
COMPUTER
Index, DNI, Power & Ground
Size Document Number Rev

C & G UMA 2A
Date: Friday, January 19, 2007 Sheet 2 of 60

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
H_D#[0..63] U14B H_D#[0..63]

5 H_D#[0..63] H_D#[0..63] 5
H_D#0 E22 Y22 H_D#32
H_A#[3..16] U14A H_D#1 D[0]# D[32]# H_D#33
5 H_A#[3..16] F24 D[1]# D[33]# AB24
H_A#3 J4 H1 H_D#2 E26 V24 H_D#34
A[3]# ADS# H_ADS# 5 D[2]# D[34]#
H_A#4 L5 E2 H_D#3 G22 V26 H_D#35
A[4]# BNR# H_BNR# 5 D[3]# D[35]#
H_A#5 L4 G5 H_D#4 F23 V23 H_D#36
A[5]# BPRI# H_BPRI# 5 D[4]# D[36]#
H_A#6 K5 H_D#5 G25 T22 H_D#37
H_A#7 A[6]# H_D#6 D[5]# D[37]# H_D#38
M3 A[7]# DEFER# H5 H_DEFER# 5 E25 D[6]# D[38]# U25
H_A#8 N2 F21 H_D#7 E23 U23 H_D#39
A[8]# DRDY# H_DRDY# 5 D[7]# D[39]#
DATA GRP 0
DATA GRP 2
H_A#9 J1 E1 H_D#8 K24 Y25 H_D#40
A[9]# DBSY# H_DBSY# 5 D[8]# D[40]#
H_A#10 N3 H_D#9 G24 W22 H_D#41
A A[10]# H_BR0# 5 D[9]# D[41]# A
ADDR GROUP 0
H_A#11 P5 F1 H_D#10 J24 Y23 H_D#42
H_A#12 A[11]# BR0# H_D#11 D[10]# D[42]# H_D#43
P2 A[12]# 1 2 +1.05V_VCCP J23 D[11]# D[43]# W24
H_A#13 L2 D20 H_IERR# R384 56_0402 H_D#12 H22 W25 H_D#44
CONTROL
H_A#14 A[13]# IERR# H_D#13 D[12]# D[44]# H_D#45
P4 A[14]# INIT# B3 H_INIT# 11 F26 D[13]# D[45]# AA23
H_A#15 P1 H_D#14 K22 AA24 H_D#46
H_A#16 A[15]# H_D#15 D[14]# D[46]# H_D#47
R1 A[16]# LOCK# H4 H_LOCK# 5 H23 D[15]# D[47]# AB25
5 H_ADSTB#0 M1 ADSTB[0]# 5 H_DSTBN#0 J26 DSTBN[0]# DSTBN[2]# Y26 H_DSTBN#2 5
H_REQ#[0..4] C1 H_RESET# H26 AA26
5 H_REQ#[0..4] RESET# H_RESET# 5 5 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
H_REQ#0 K3 F3 H25 U22
REQ[0]# RS[0]# H_RS#0 5 5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5
H_REQ#1 H2 F4
REQ[1]# RS[1]# H_RS#1 5 H_D#[0..63] H_D#[0..63]
H_REQ#2 K2 G3
REQ[2]# RS[2]# H_RS#2 5 5 H_D#[0..63] H_D#[0..63] 5
H_REQ#3 J3 G2 H_D#16 N22 AE24 H_D#48
REQ[3]# TRDY# H_TRDY# 5 D[16]# D[48]#
H_REQ#4 L1 H_D#17 K25 AD24 H_D#49
H_A#[17..35] REQ[4]# H_D#18 D[17]# D[49]# H_D#50
5 H_A#[17..35] HIT# G6 H_HIT# 5 P26 D[18]# D[50]# AA21
H_A#17 Y2 E4 H_D#19 R23 AB22 H_D#51
A[17]# HITM# H_HITM# 5 D[19]# D[51]#
H_A#18 U5 Layout Note: H_D#20 L23 AB21 H_D#52
H_A#19 A[18]# ITP_BPM#0 H_D#21 D[20]# D[52]# H_D#53
R3 A[19]# BPM[0]# AD4 Place voltage M24 D[21]# D[53]# AC26
H_A#20 W6 AD3 ITP_BPM#1 H_D#22 L22 AD20 H_D#54
A[20]# BPM[1]# divider within D[22]# D[54]#
ADDR GROUP 1
DATA GRP 1
DATA GRP 3
H_A#21 U4 AD1 ITP_BPM#2 H_D#23 M23 AE22 H_D#55
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# ITP_BPM#3 0.5" of GTLREF H_D#24 D[23]# D[55]# H_D#56
Y5 A[22]# BPM[3]# AC4 P25 D[24]# D[56]# AF23
H_A#23 U1 AC2 ITP_BPM#4 pin H_D#25 P23 AC25 H_D#57
H_A#24 A[23]# PRDY# ITP_BPM#5 H_D#26 D[25]# D[57]# H_D#58
R4 A[24]# PREQ# AC1 P22 D[26]# D[58]# AE21
H_A#25 T5 AC5 ITP_TCK H_D#27 T24 AD21 H_D#59
H_A#26 A[25]# TCK ITP_TDI +1.05V_VCCP H_D#28 D[27]# D[59]# H_D#60
T3 A[26]# TDI AA6 R24 D[28]# D[60]# AC22
H_A#27 W2 AB3 ITP_TDO H_D#29 L25 AD23 H_D#61
H_A#28 A[27]# TDO ITP_TMS H_D#30 D[29]# D[61]# H_D#62
W5 A[28]# TMS AB5 T25 D[30]# D[62]# AF22
2
H_A#29 Y4 AB6 ITP_TRST# H_D#31 N25 AC23 H_D#63
H_A#30 A[29]# TRST# ITP_DBRESET# R448 D[31]# D[63]#
U2 A[30]# DBR# C20 ITP_DBRESET# 13,29 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#31 V4 1K/F_0402 M26 AF24
A[31]# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
B H_A#32 W3 2 1 +1.05V_VCCP N24 AC20 B
A[32]# 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
H_A#33 AA4 THERMAL R383 56_0402
1
H_A#34 A[33]# CPU_PROCHOT# 1 V_CPU_GTLREF AD26 COMP0
AB2 A[34]# 2 EC_CPU_PROCHOT# 28 GTLREF COMP[0] R26 Note:
H_A#35 AA3 D21 R367 0_NC CPU_TEST1 C23 MISC U26 COMP1 H_DPRTSTP need to daisy chain
A[35]# PROCHOT# TEST1 COMP[1]
2
V1 A24 H_THERMDA CPU_TEST2 D25 AA1 COMP2
5 H_ADSTB#1 ADSTB[1]# THERMDA H_THERMDA 34 TEST2 COMP[2] from ICH8 to IMVP6 to CPU.
B25 H_THERMDC CPU_TEST3 C24 Y1 COMP3
THERMDC H_THERMDC 34 TEST3 COMP[3]
A6 R454 CPU_TEST4 AF26
11 H_A20M# A20M# TEST4
A5 C7 H_THERMTRIP# 2K/F_0402 CPU_TEST5 AF1 E5
11 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 34 TEST5 DPRSTP# H_DPRSTP# 6,11,45
ICH
C4 CPU_TEST6 A26 B5
11 H_IGNNE# H_DPSLP# 11
1
IGNNE# TEST6 DPSLP#
1 2 +1.05V_VCCP DPWR# D24 H_DPWR# 5
D5 H CLK R370 56_0402 B22 D6
11 H_STPCLK# STPCLK# 6,17 CPU_MCH_BSEL0 BSEL[0] PWRGOOD H_PWRGOOD 11
11 H_INTR C6 LINT0 6,17 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5
11 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 17 6,17 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 45
11 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 17
MLX_47387-4784
M4 RSVD[01]
N5 RSVD[02]
T2 RSVD[03]
V3 H_THERMDA 1 2 H_THERMDC PAD T19 CPU_TEST3
RSVD[04]
RESERVED
B2 C168 1 2 CPU_TEST1 PAD T95 CPU_TEST5

RSVD[05] 2200P/50V/0402_NC R368 1K/F_0402_NC
C3 RSVD[06]
D2 1 2 CPU_TEST2 For the purpose of testability, route these signals
RSVD[07] R374 1K/F_0402_NC
D22 RSVD[08] through a ground referenced Z0 = 55ohm trace that
D3 2 1 CPU_TEST4
RSVD[09] C538 .1U/10V/0402_NC ends in a via that is near a GND via and is
F6 RSVD[10]
1 2 CPU_TEST6 accessible through an oscilloscope connection.
R153 0_0402_NC
MLX_47387-4784 Place C close to the

C CPU_TEST4 pin. Make sure COMP0 C
CPU_TEST4 routing is FSB BCLK BSEL2 BSEL1 BSEL0
COMP1
reference to GND and away 533 133 0 0 1 COMP2
Populate ITP700Flex for bringup For Support XDP: from other noisy signal. COMP3
1. TIP_BPM#5 need PU 51ohms to +1.05V_VCCP. 667 166 0 1 1
+1.05V_VCCP 2. Populate R5,R1. Change R4 & R361 to 51 ohms.
2
800 200 0 1 0 R416
3. Changed R6 & R346 to 51 ohms. R429 27.4/F_0402
4. Depopulate R2 and changed R8 to 1K/F. R459 54.9/F_0402
R452 27.4/F_0402
1
54.9/F_0402
1
R447 R460 Layout Note: ITP700 layout guidelines
R443 51_0402 R457 150_0402 +1.05V_VCCP Placecouple 0.1uF Decoupling
51/F_0402 39/F_0402 Signal Resistor Value Connect To Resistor Placement Comp0,2 connect with Zo=27.4ohm,Comp1,3
JITP1 caps with in 0.1" ITP connector.
connect with Zo=55ohm, make those traces
2
TDI 150 ohm 5% VCCP Place the pull-up near CPU length shorter than 0.5".Trace should be
ITP_TDI 1 27 2 1
ITP_TMS TDI VTT0 C479 .1U/10V/0402 at least 25 mils away from any other
2 TMS VTT1 28 TMS 39 ohm 1% VCCP Within 200ps of ITP connector
ITP_TCK 5 26 2 1 +3.3V_SUS toggling signal.
ITP_TDO TCK VTAP C483 .1U/10V/0402
1 2 7 TDO 500 to 680
ITP_TRST# R449 0_0402 3 1 2 TRST# ohm 5% GND Place the pull-down near CPU
TRST# R420 0_0402
Connect to TCK pin of CPU and then
H_RESET# 1 2 12 25 ITP_DBRESET# 2 1 connect it to FBO pin of ITP connector
RESET# DBR#
Layout Note:R442 22.6/F_0402
DBA# 24 R413 150_0402 +3.3V_ALW TCK 27 ohm 1% GND in daisy chain. Place the pull-down
ITP_TCK
Place R8 close ITP. near TCK0 pin of ITP connector
11 FBO 1 2
R419 0_0402_NC
17 CLK_CPU_ITP# 8 BCLKN
TDO 51 ohm 5% VCCP Place the pull-up near ITP
D 9 23 ITP_BPM#0 D
17 CLK_CPU_ITP BCLKP BPM0#
21 ITP_BPM#1 +1.05V_VCCP Connect to CPURST# pin of GMCH through
BPM1# ITP_BPM#2
BPM2# 19 22.6 ohm 1% the series resistor placed within
ITP_BPM#3
10
14
16
GND0
GND1
BPM3#
BPM4#
17
15
13
ITP_BPM#4
ITP_BPM#51 2
RESET#
series resistor
and pullup 51 VCCP 200ps of ITP connector. Place the
pull-up after the series resistor from
QUANTA
GND2 BPM5#
2
R461
1 ITP_TCK
27/F_0402
18
20
GND3
GND4
NC0
NC1
4
6
R438 51_0402_NC
Reserved R3 for support
ohm 1%. ITP connector.
Title
COMPUTER
22 GND5 GND_0 29 XDP debug.
2 1 ITP_TRST# 30 Merom Processor (HOST BUS)
R453 649/F_0402 GND_1
ITP700Flex_NC Size Document Number Rev
C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+VCC_CORE +VCC_CORE
U14C U14D
A7 VCC[001] VCC[068] AB20 A4 VSS[001] VSS[082] P6
A9 VCC[002] VCC[069] AB7 A8 VSS[002] VSS[083] P21
+VCC_CORE All use 10U 4V(+-20%,X6S,0805)Pb-Free. A10 AC7 A11 P24
VCC[003] VCC[070] VSS[003] VSS[084]
A12 VCC[004] VCC[071] AC9 A14 VSS[004] VSS[085] R2
1
C504 C221 C222 C223 C224 A18 AC17 AF2 T1
10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 VCC[008] VCC[075] VSS[008] VSS[089]
A20 AC18 B6 T4
2
2
A VCC[009] VCC[076] VSS[009] VSS[090] A
B7 VCC[010] VCC[077] AD7 B8 VSS[010] VSS[091] T23
B9 VCC[011] VCC[078] AD9 B11 VSS[011] VSS[092] T26
B10 VCC[012] VCC[079] AD10 B13 VSS[012] VSS[093] U3
+VCC_CORE B14 AD14 B19 U21
VCC[014] VCC[081] VSS[014] VSS[095]
B17 VCC[016] VCC[083] AD17 B24 VSS[016] VSS[097] V2
B18 VCC[017] VCC[084] AD18 C5 VSS[017] VSS[098] V5
1
1
B20 VCC[018] VCC[085] AE9 C8 VSS[018] VSS[099] V22
C522 C521 C225 C226 C472 C9 AE10 C11 V25
10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 VCC[019] VCC[086] VSS[019] VSS[100]
C10 AE12 C14 W1
2
2
VCC[020] VCC[087] VSS[020] VSS[101]
C12 VCC[021] VCC[088] AE13 C16 VSS[021] VSS[102] W4
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C22 VSS[024] VSS[105] Y3
C18 VCC[025] VCC[092] AE20 C25 VSS[025] VSS[106] Y6
D9 VCC[026] VCC[093] AF9 D1 VSS[026] VSS[107] Y21
+VCC_CORE D10 AF10 D4 Y24
VCC[027] VCC[094] VSS[027] VSS[108]
D12 VCC[028] VCC[095] AF12 D8 VSS[028] VSS[109] AA2
1
1
C517 C516 C520 C519 C518 D18 AF18 D19 AA14
10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 VCC[032] VCC[099] +1.05V_VCCP VSS[032] VSS[113]
E7 AF20 D23 AA16
2
2
VCC[033] VCC[100] VSS[033] VSS[114]
E9 VCC[034] D26 VSS[034] VSS[115] AA19
E10 VCC[035] VCCP[01] G21 E3 VSS[035] VSS[116] AA22
E12 VCC[036] VCCP[02] V6 E6 VSS[036] VSS[117] AA25
1
E13 VCC[037] VCCP[03] J6 E8 VSS[037] VSS[118] AB1
+VCC_CORE E15 K6 + C431 E11 AB4
VCC[038] VCCP[04] 220U/2.5V/7343 VSS[038] VSS[119]
B E17 VCC[039] VCCP[05] M6 E14 VSS[039] VSS[120] AB8 B
E18 J21 E16 AB11
2
VCC[040] VCCP[06] VSS[040] VSS[121]
E20 VCC[041] VCCP[07] K21 E19 VSS[041] VSS[122] AB13
1
1
F7 VCC[042] VCCP[08] M21 E21 VSS[042] VSS[123] AB16
C450 C449 C515 C452 C451 F9 N21 E24 AB19
VCC[043] VCCP[09] VSS[043] VSS[124]
10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 F10 N6 F5 AB23
2
2
VCC[044] VCCP[10] VSS[044] VSS[125]
F12 VCC[045] VCCP[11] R21 F8 VSS[045] VSS[126] AB26
F14 R6 +1.5V_RUN F11 AC3
VCC[046] VCCP[12] VSS[046] VSS[127]
F15 VCC[047] VCCP[13] T21 F13 VSS[047] VSS[128] AC6
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F16 VSS[048] VSS[129] AC8
F18 VCC[049] VCCP[15] V21 F19 VSS[049] VSS[130] AC11
F20 VCC[050] VCCP[16] W21 F2 VSS[050] VSS[131] AC14
AA7 VCC[051] F22 VSS[051] VSS[132] AC16
+VCC_CORE AA9 B26 F25 AC19
VCC[052] VCCA[01] VSS[052] VSS[133]
AA10 VCC[053] VCCA[02] C26 G4 VSS[053] VSS[134] AC21
AA12 VCC[054] G1 VSS[054] VSS[135] AC24
1
AA13 AD6 C429 C433 G23 AD2
VCC[055] VID[0] VID0 45 VSS[055] VSS[136]
1
AA15 AF5 10U/6.3V/0805 G26 AD5

VCC[056] VID[1] VID1 45 VSS[056] VSS[137]
C500 C468 C445 C446 C447 C448 AA17 AE5 .01U/25V/0402 H3 AD8
VID2 45
2
10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 VCC[057] VID[2] VSS[057] VSS[138]
AA18 AF4 VID3 45 H6 AD11
2
VCC[058] VID[3] VSS[058] VSS[139]

AA20 VCC[059] VID[4] AE3 VID4 45 H21 VSS[059] VSS[140] AD13
AB9 VCC[060] VID[5] AF3 VID5 45 H24 VSS[060] VSS[141] AD16
AC10 VCC[061] VID[6] AE2 VID6 45 J2 VSS[061] VSS[142] AD19
6 inside cavity, north side, primary layer. AB10 VCC[062] J5 VSS[062] VSS[143] AD22
AB12 VCC[063] Layout Note: J22 VSS[063] VSS[144] AD25
AB14 AF7 VCCSENSE Place C105 near PIN J25 AE1
VCC[064] VCCSENSE VCCSENSE 45 VSS[064] VSS[145]
+VCC_CORE AB15 K1 AE4
VCC[065] B26. VSS[065] VSS[146]
AB17 VCC[066] K4 VSS[066] VSS[147] AE8
AB18 AE7 VSSSENSE K23 AE11
VCC[067] VSSSENSE VSSSENSE 45 VSS[067] VSS[148]
K26 VSS[068] VSS[149] AE14
1
C C
MLX_47387-4784 L3 AE16
C200 C201 C202 C203 C204 C205 VSS[069] VSS[150]
. L6 VSS[070] VSS[151] AE19
10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 10U/4V/0805 L21 AE23
2
+VCC_CORE VSS[071] VSS[152]

L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2
1
M5 VSS[074] VSS[155] AF6
6 inside cavity, south side, primary layer. R463 M22 AF8
100/F_0402 VSS[075] VSS[156]
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
N4 AF16
2
VSS[078] VSS[159]
N23 VSS[079] VSS[160] AF19
VCCSENSE N26 AF21
VSSSENSE VSS[080] VSS[161]
P3 VSS[081] VSS[162] A25
+PWR_SRC AF25
VSS[163]
1
+1.05V_VCCP
R464 MLX_47387-4784
1
1
100/F_0402 .
+ C123 + C130 + C106 + C34
1
100U/25V 100U/25V 100U/25V 100U/25V_NC
2
C503 C471 C502 C470 C501 C469
2
.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402

2
Route VCCSENSE and VSSSENSE

Layout Note: traces at 27.4ohms and
Layout out: Need to add 100uF cap on PWR_SRC for cap singing. length matched to within 25
Place these inside socket cavity on North side secondary. Place on PWR_SRC near +VCC_CORE. mil. Place PU and PD within
2 inch of CPU.
D D
QUANTA
Title
COMPUTER
Merom Processor (POWER)

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U16A H_A#[3..35]
H_D#[0..63] H_A#[3..35] 3
J13 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
+1.05V_VCCP H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#17 H_D#_16 H_A#_20 H_A#21
W10 H_D#_17 H_A#_21 H20
R392 H_D#18 Y8 L19 H_A#22
221/F_0402 H_D#19 H_D#_18 H_A#_22 H_A#23
V4 H_D#_19 H_A#_23 D17
H_D#20 M3 M17 H_A#24
H_D#21 H_D#_20 H_A#_24 H_A#25
J1 H_D#_21 H_A#_25 N16
H_SWING H_D#22 N5 J19 H_A#26
H_D#23 H_D#_22 H_A#_26 H_A#27
N3 H_D#_23 H_A#_27 B18
H_D#24 W6 E19 H_A#28
R391 H_D#25 H_D#_24 H_A#_28 H_A#29
W9 H_D#_25 H_A#_29 B17
100/F_0402 C442 H_D#26 N2 B15 H_A#30
.1U/10V/0402 H_D#27 H_D#_26 H_A#_30 H_A#31
Y7 H_D#_27 H_A#_31 E17
H_D#28 Y9 C18 H_A#32
H_D#29 H_D#_28 H_A#_32 H_A#33
P4 H_D#_29 H_A#_33 A19
H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# 3
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3
HOST
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 3
+1.05V_VCCP H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 AD11 F12
H_D#_38 H_BREQ# H_BR0# 3
H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 17
H_D#42 AB1 AM7
H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 17
R450 R446 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 3
54.9/F_0402 54.9/F_0402 H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AC5 C6
H_D#_46 H_HITM# H_HITM# 3
H_SCOMP H_D#47 AG3 G10
H_D#_47 H_LOCK# H_LOCK# 3
H_SCOMP# H_D#48 AJ9 B7
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AH8
H_RCOMP H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9
H_D#52 H_D#_51
AE11 H_D#_52
R390 H_D#53 AH12 K5
H_D#_53 H_DINV#_0 H_DINV#0 3
24.9/F_0402 H_D#54 AJ5 L2
H_D#55 AH5 AD13
Layout Note: H_D#56 AJ6 AE13
H_RCOMP trace should be H_D#57 AE7
H_D#58 H_D#_57
AJ7 H_D#_58 H_DSTBN#_0 M7 H_DSTBN#0 3
10-mil wide with 20-mil H_D#59 AJ2 K3
H_D#_59 H_DSTBN#_1 H_DSTBN#1 3
C
spacing. H_D#60 AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 3 C
H_D#61 AJ3 AH11
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AH2
H_D#63 H_D#_62
AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 3
H_DSTBP#_1 K2 H_DSTBP#1 3
H_DSTBP#_2 AC2 H_DSTBP#2 3
H_SWING B3 AJ10
+1.05V_VCCP H_SWING H_DSTBP#_3 H_DSTBP#3 3
H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 3
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 3
H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 3
R394 H13
H_REQ#_3 H_REQ#3 3
1K/F_0402 B6 B12
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E5 H_CPUSLP#
H_RS#_0 E12 H_RS#0 3
H_RS#_1 D7 H_RS#1 3
H_RS#_2 D8 H_RS#2 3
H_REF B9 H_AVREF
A9 H_DVREF
CRESTLINE_1p0_ES2
R393 C444
2K/F_0402 .1U/10V/0402
Layout Note:
Place the 0.1 uF
D decoupling capacitor D
within 100 mils from
GMCH pins.
QUANTA
Title
COMPUTER
Crestline (HOST)

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U16B
+1.8V_SUS +3.3V_RUN
P36 RSVD1 UMA R388 0_0402 LCTLA_CLK
P37 RSVD2 SM_CK_0 AV29 M_CLK_DDR0 15
R35 BB23 R387 0_0402 LCTLB_DATA
RSVD3 SM_CK_1 M_CLK_DDR1 15
N35 RSVD4 SM_CK_3 BA25 M_CLK_DDR2 15
R255 AR12 AV23 LCD_DDCCLK
RSVD5 SM_CK_4 M_CLK_DDR3 15
1K/F_0402 AR13 R385 2.2K_0402 LCD_DDCDAT
RSVD6 R386 2.2K_0402
AM12 RSVD7 SM_CK#_0 AW30 M_CLK_DDR#0 15
SM_RCOMP_VOH AN13 BA23
RSVD8 SM_CK#_1 M_CLK_DDR#1 15 +VCC_PEG
J12 AW25 U16C
RSVD9 SM_CK#_3 M_CLK_DDR#2 15
AR37 RSVD10 SM_CK#_4 AW23 M_CLK_DDR#3 15
C278 C282 AM36 J40
RSVD11 18 BIA_PWM L_BKLT_CTRL
.01U/25V/0402 2.2U/6.3V/0603 R253 AL36 BE29 H39 N43 VCC3G_PCIE_R
A RSVD12 SM_CKE_0 DDR_CKE0_DIMMA 15,16 29 PANEL_BKEN L_BKLT_EN PEG_COMPI A
3.01K/F_0402 AM37 AY32 LCTLA_CLK E39 M43 R439
RSVD13 SM_CKE_1 DDR_CKE1_DIMMA 15,16 L_CTRL_CLK PEG_COMPO
D20 BD39 LCTLB_DATA E40 24.9/F_0402
RSVD14 SM_CKE_3 DDR_CKE2_DIMMB 15,16 L_CTRL_DATA
MUXING
BG37 L_IBG LCD_DDCCLK C37
SM_CKE_4 DDR_CKE3_DIMMB 15,16 18 LCD_DDCCLK L_DDC_CLK
SM_RCOMP_VOL 48 LCD_DDCDAT D35 J51 LCD_ACLK-
18 LCD_DDCDAT L_DDC_DATA PEG_RX#_0
SM_CS#_0 BG20 DDR_CS0_DIMMA# 15,16 18 ENVDD K40 L_VDD_EN PEG_RX#_1 L51
BK16 R427 N47 C475
SM_CS#_1 DDR_CS1_DIMMA# 15,16 PEG_RX#_2
C279 C283 BG16 3.3K_0402 L_IBG L41 T45 8.2P/16V/0402_NC
SM_CS#_2 DDR_CS2_DIMMB# 15,16 LVDS_IBG PEG_RX#_3
.01U/25V/0402 2.2U/6.3V/0603 R254 H10 BE13 PAD T93 L43 T50
RSVD20 SM_CS#_3 DDR_CS3_DIMMB# 15,16 LVDS_VBG PEG_RX#_4
1K/F_0402 B51 N41 U40 LCD_ACLK+
RSVD21 LVDS_VREFH PEG_RX#_5
BJ20 RSVD22 SM_ODT_0 BH18 M_ODT0 15,16 N40 LVDS_VREFL PEG_RX#_6 Y44
RSVD
BK22 BJ15 D46 Y40 LCD_A0-
RSVD23 SM_ODT_1 M_ODT1 15,16 18 LCD_ACLK- LVDSA_CLK# PEG_RX#_7
BF19 RSVD24 SM_ODT_2 BJ14 M_ODT2 15,16 UMA 18 LCD_ACLK+ C45 LVDSA_CLK PEG_RX#_8 AB51
DDR
BH20 BE16 D44 W49 C481
RSVD25 SM_ODT_3 M_ODT3 15,16 18 LCD_BCLK- LVDSB_CLK# PEG_RX#_9
BK18 E42 AD44 3.3P/16V/0402_NC
RSVD26 18 LCD_BCLK+ LVDSB_CLK PEG_RX#_10
LVDS
+3.3V_RUN BJ18 BL15 SMRCOMPP AD40
RSVD27 SM_RCOMP SMRCOMPN PEG_RX#_11 LCD_A0+
BF23 RSVD28 SM_RCOMP# BK14 18 LCD_A0- G51 LVDSA_DATA#_0 PEG_RX#_12 AG46
PM_EXTTS#0 BG23 +1.8V_SUS E51 AH49
RSVD29 18 LCD_A1- LVDSA_DATA#_1 PEG_RX#_13
R421 10K_0402 PM_EXTTS#1 BC23 BK31 SM_RCOMP_VOH F49 AG45 LCD_A1-
RSVD30 SM_RCOMP_VOH 18 LCD_A2- LVDSA_DATA#_2 PEG_RX#_14
R418 10K_0402 BD24 BL31 SM_RCOMP_VOL AG41
DDR_A_MA14 RSVD31 SM_RCOMP_VOL PEG_RX#_15 C476
15,16 DDR_A_MA14 BJ29 RSVD32
GRAPHICS
DDR_B_MA14 BE24 AR49 V_DDR_MCH_REF G50 J50 3.3P/16V/0402_NC
15,16 DDR_B_MA14 RSVD33 SM_VREF_0 18 LCD_A0+ LVDSA_DATA_0 PEG_RX_0
BH39 AW4 R471 E50 L50
RSVD34 SM_VREF_1 18 LCD_A1+ LVDSA_DATA_1 PEG_RX_1
AW20 20/F_0402 F48 M47 LCD_A1+
RSVD35 18 LCD_A2+ LVDSA_DATA_2 PEG_RX_2
BK20 RSVD36 PEG_RX_3 U44
C48 SMRCOMPP T49 LCD_A2-
RSVD37 SMRCOMPN PEG_RX_4
D47 RSVD38 DPLL_REF_CLK B42 MCH_DREFCLK 17 18 LCD_B0- G44 LVDSB_DATA#_0 PEG_RX_5 T41
B44 C42 B47 W45 C477
RSVD39 DPLL_REF_CLK# MCH_DREFCLK# 17 18 LCD_B1- LVDSB_DATA#_1 PEG_RX_6
C44 H48 B45 W41 3.3P/16V/0402_NC
RSVD40 DPLL_REF_SSCLK DREF_SSCLK 17 18 LCD_B2- LVDSB_DATA#_2 PEG_RX_7
A35 H47 AB50
CLK
+1.05V_VCCP RSVD41 DPLL_REF_SSCLK# DREF_SSCLK# 17 R470 PEG_RX_8 LCD_A2+
B37 RSVD42 PEG_RX_9 Y48
B36 K44 20/F_0402 E44 AC45
RSVD43 PEG_CLK CLK_MCH_3GPLL 17 18 LCD_B0+ LVDSB_DATA_0 PEG_RX_10
THERMTRIP_MCH# B34 K45 A47 AC41 LCD_BCLK-
B RSVD44 PEG_CLK# CLK_MCH_3GPLL# 17 18 LCD_B1+ LVDSB_DATA_1 PEG_RX_11 B
R440 56_0402 C34 A45 AH47
RSVD45 18 LCD_B2+ LVDSB_DATA_2 PEG_RX_12
AG49 C480
PEG_RX_13 8.2P/16V/0402_NC
AH45
PCI-EXPRESS
PEG_RX_14
Layout Note: DMI_RXN_0 AN47 DMI_MRX_ITX_N0 12 PEG_RX_15 AG42
AJ38 LCD_BCLK+
Location of all MCH_CFG strap DMI_RXN_1 DMI_MRX_ITX_N1 12
DMI_RXN_2 AN42 DMI_MRX_ITX_N2 12 19 TV_CVBS E27 TVA_DAC PEG_TX#_0 N45
resistors needs to be close to AN46 G27 U39 LCD_B0-
DMI_RXN_3 DMI_MRX_ITX_N3 12 19 TV_Y TVB_DAC PEG_TX#_1
minmize stub. 19 TV_C K27 TVC_DAC PEG_TX#_2 U47
AM47 N51 C485
DMI_RXP_0 DMI_MRX_ITX_P0 12 PEG_TX#_3
TV
P27 AJ39 UMA only F27 R50 3.3P/16V/0402_NC
3,17 CPU_MCH_BSEL0 CFG_0 DMI_RXP_1 DMI_MRX_ITX_P1 12 TVA_RTN PEG_TX#_4
N27 AN41 R424 J27 T42
3,17 CPU_MCH_BSEL1 CFG_1 DMI_RXP_2 DMI_MRX_ITX_P2 12 TVB_RTN PEG_TX#_5
N24 AN45 Layout Note: R403 150/F_0402 L27 Y43 LCD_B0+
3,17 CPU_MCH_BSEL2 CFG_2 DMI_RXP_3 DMI_MRX_ITX_P3 12 TVC_RTN PEG_TX#_6
PAD T84 CFG3 C21 R415 150/F_0402 W46
CFG4 CFG_3 Place 150 ohm 150/F_0402 PEG_TX#_7 LCD_B1-
C23 AJ46 M35 W38
DMI
PAD T24 CFG_4 DMI_TXN_0 DMI_MTX_IRX_N0 12 termination resistors TV_DCONSEL_0 PEG_TX#_8

CFG5 F23 AJ41 P33 AD39
CFG_5 DMI_TXN_1 DMI_MTX_IRX_N1 12 TV_DCONSEL_1 PEG_TX#_9
R407 PAD T924.02K/F_0402_NCCFG6 N23 CFG_6 DMI_TXN_2 AM40 DMI_MTX_IRX_N2 12
close to GMCH. PEG_TX#_10 AC46 C458
PAD T87 CFG7 G23 AM44 AC49 3.3P/16V/0402_NC
CFG_7 DMI_TXN_3 DMI_MTX_IRX_N3 12 PEG_TX#_11
PAD T86 CFG8 J20 AC42
CFG_8 PEG_TX#_12
CFG
CFG9 C20 AJ47 AH39 LCD_B1+

CFG_9 DMI_TXP_0 DMI_MTX_IRX_P0 12 PEG_TX#_13
R401 PAD T944.02K/F_0402_NCCFG10 R24 AJ42 AE49
PAD T88 CFG11 L23 AM39 AH44 LCD_B2-
PAD T85 CFG12 J23 AM43
CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 12
PAD T22 CFG13 E23 VGA_BLU H32 M45 C459
CFG_13 19 VGA_BLU CRT_BLUE PEG_TX_0
PAD T83 CFG14 E20 G32 T38 3.3P/16V/0402_NC
CFG15 CFG_14 VGA_GRN CRT_BLUE# PEG_TX_1
PAD T89 K23 CFG_15 19 VGA_GRN K29 CRT_GREEN PEG_TX_2 T46
CFG16 M20 J29 N50 LCD_B2+
+3.3V_RUN CFG_16 CRT_GREEN# PEG_TX_3
GRAPHICS VID
R423 PAD T914.02K/F_0402_NCCFG17 M24 VGA_RED F29 R51

CFG_17 +1.05V_VCCP 19 VGA_RED CRT_RED PEG_TX_4
VGA
PAD T90 CFG18 L32 E29 U43
CFG19 CFG_18 CRT_RED# PEG_TX_5
N33 CFG_19 PEG_TX_6 W42
R422 4.02K/F_0402_NCCFG20 L35 Y47
R417 4.02K/F_0402_NC CFG_20 PEG_TX_7
19 G_CLK_DDC2 K33 CRT_DDC_CLK PEG_TX_8 Y39
19 G_DAT_DDC2 G35 CRT_DDC_DATA PEG_TX_9 AC38
C C
GFX_VID_0 E35 19 VGAHSYNC F33 CRT_HSYNC PEG_TX_10 AD47
G41 A39 R139 22K_0402 R411 30/F_0402 C32 AC50
13 PM_BMBUSY# PM_BM_BUSY# GFX_VID_1 CRT_TVO_IREF PEG_TX_11
L39 C38 R137 22K_0402 R404 1.3K/F_0402 E33 AD43
3,11,45 H_DPRSTP# PM_DPRSTP# GFX_VID_2 19 VGAVSYNC CRT_VSYNC PEG_TX_12
PM_EXTTS#0 L36 B39 R152 22K_0402 R405 30/F_0402 AG39
15 PM_EXTTS#0 PM_EXT_TS#_0 GFX_VID_3 PEG_TX_13
PM
PM_EXTTS#1 J36 E36 R138 22K_0402 AE50

15 PM_EXTTS#1 PM_EXT_TS#_1 GFX_VR_EN PEG_TX_14
13,38 ICH_PWRGD AW49 PWROK T27 PAD PEG_TX_15 AH43
PLTRST#_R AV20 +1.25V_RUN
THERMTRIP_MCH# N20 RSTIN#
34 THERMTRIP_MCH# THERMTRIP# CRESTLINE_1p0_ES2
13,45 DPRSLPVR R406 0_0402
G36 DPRSLPVR Non-iAMT
AM49 R244
CL_CLK CL_CLK0 13
AK50 1K/F_0402 VGA_BLU
CL_DATA CL_DATA0 13
PAD T38 TP_NC1 BJ51 AT43 VGA_GRN
ICH_CL_PWROK 13,28
ME
TP_NC2 NC_1 CL_PWROK VGA_RED

PAD T39 BK51 NC_2 CL_RST# AN49 ICH_CL_RST0# 13
PAD T41 TP_NC3 BK50 AM50 MCH_CLVREF UMA only
TP_NC4 NC_3 CL_VREF MCH_CLVREF
PAD T44 BL50 NC_4
PAD T46 TP_NC5 BL49 R410 Layout Note:
TP_NC6 NC_5 C273 R246 R425 150/F_0402
PAD T47 BL3 NC_6 Place 150 ohm
PAD T45 TP_NC7 BL2 .1U/10V/0402 392/F_0402 R412 150/F_0402
NC_7 termination resistors
NC
PAD T42 TP_NC8 BK1 150/F_0402

NC_8
PAD T40 TP_NC9 BJ1 NC_9 SDVO_CTRL_CLK H35 close to GMCH.
PAD T33 TP_NC10 E1 K36
NC_10 SDVO_CTRL_DATA
MISC
PAD T26 TP_NC11 A5 G39

NC_11 CLK_REQ# CLK_3GPLLREQ# 17
PAD T31 TP_NC12 C51 G40
NC_12 ICH_SYNC# MCH_ICH_SYNC# 13
PAD T29 TP_NC13 B50 Low=DMIx2
TP_NC14 NC_13
PAD T28 A50 NC_14
CFG5 DMI X2 Select High=DMIx4(Default)
PAD T23 TP_NC15 A49 A37
TP_NC16 NC_15 TEST_1
PAD T43 BK2 NC_16 TEST_2 R32 PCI Express Low= Reveise Lane
CFG9 Graphic Lane High=Normal operation
CRESTLINE_1p0_ES2
R433 R389 FSB Dynamic Low=Dynamic ODT Disable
20K_0402 0_0402 CFG16 ODT High=Dynamic ODT Enable(default).
D D
DMI Lane Low=Normal(default).
CFG19 Reversal High=Lane Reversed
PLTRST#_R Low=Only SDVO or PCIEx1 is
12,28 PLTRST# R468 0_0402 R462 100_0402
CFG20
SDVO/PCIE
Concurrent
operational (defaults) QUANTA
High=SDVO and PCIEx1 are operating
12 SB_NB_PCIE_RST# R469 0_0402_NC Operation simultaneously via PEG port
Title
COMPUTER
Low=No SDVO Device Present Crestline (LVDS,VGA,TV,DMI)
(default) Size Document Number Rev
SDVO_CRTL_DATA SDVO Present.
High=SDVO Device Present C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
15 DDR_A_D[0..63] 15 DDR_B_D[0..63]
U16D U16E
DDR_A_D0 AR43 BB19 DDR_A_BS0 DDR_B_D0 AP49 AY17 DDR_B_BS0
SA_DQ_0 SA_BS_0 DDR_A_BS0 15,16 SB_DQ_0 SB_BS_0 DDR_B_BS0 15,16
DDR_A_D1 AW44 BK19 DDR_A_BS1 DDR_B_D1 AR51 BG18 DDR_B_BS1
A SA_DQ_1 SA_BS_1 DDR_A_BS1 15,16 SB_DQ_1 SB_BS_1 DDR_B_BS1 15,16 A
DDR_A_D2 BA45 BF29 DDR_A_BS2 DDR_B_D2 AW50 BG36 DDR_B_BS2
SA_DQ_2 SA_BS_2 DDR_A_BS2 15,16 SB_DQ_2 SB_BS_2 DDR_B_BS2 15,16
DDR_A_D3 AY46 DDR_B_D3 AW51
DDR_A_D4 SA_DQ_3 DDR_A_CAS# DDR_B_D4 SB_DQ_3 DDR_B_CAS#
AR41 SA_DQ_4 SA_CAS# BL17 DDR_A_CAS# 15,16 AN51 SB_DQ_4 SB_CAS# BE17 DDR_B_CAS# 15,16
DDR_A_D5 AR45 DDR_B_D5 AN50
SA_DQ_5 DDR_A_DM[0..7] 15 SB_DQ_5 DDR_B_DM[0..7] 15
DDR_A_D6 AT42 AT45 DDR_A_DM0 DDR_B_D6 AV50 AR50 DDR_B_DM0
DDR_A_D7 SA_DQ_6 SA_DM_0 DDR_A_DM1 DDR_B_D7 SB_DQ_6 SB_DM_0 DDR_B_DM1
AW47 SA_DQ_7 SA_DM_1 BD44 AV49 SB_DQ_7 SB_DM_1 BD49
DDR_A_D8 BB45 BD42 DDR_A_DM2 DDR_B_D8 BA50 BK45 DDR_B_DM2
BF48 SA_DQ_9 SA_DM_3 AW38 BB50 SB_DQ_9 SB_DM_3 BL39
DDR_A_D10 BG47 AW13 DDR_A_DM4 DDR_B_D10 BA49 BH12 DDR_B_DM4
BJ45 SA_DQ_11 SA_DM_5 BG8 BE50 SB_DQ_11 SB_DM_5 BJ7
DDR_A_D12 BB47 AY5 DDR_A_DM6 DDR_B_D12 BA51 BF3 DDR_B_DM6
BG50 SA_DQ_13 SA_DM_7 AN6 AY49 SB_DQ_13 SB_DM_7 AW2
DDR_A_D14 BH49 DDR_B_D14 BF50
SA_DQ_14 DDR_A_DQS[0..7] 15 SB_DQ_14 DDR_B_DQS[0..7] 15
DDR_A_D15 BE45 AT46 DDR_A_DQS0 DDR_B_D15 BF49 AT50 DDR_B_DQS0
SA_DQ_15 SA_DQS_0 SB_DQ_15 SB_DQS_0
A
DDR_A_D16 AW43 BE48 DDR_A_DQS1 DDR_B_D16 BJ50 BD50 DDR_B_DQS1
SA_DQ_16 SA_DQS_1 SB_DQ_16 SB_DQS_1
B
DDR_A_D17 BE44 BB43 DDR_A_DQS2 DDR_B_D17 BJ44 BK46 DDR_B_DQS2
DDR_A_D18 SA_DQ_17 SA_DQS_2 DDR_A_DQS3 DDR_B_D18 SB_DQ_17 SB_DQS_2 DDR_B_DQS3
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ43 SB_DQ_18 SB_DQS_3 BK39
DDR_A_D19 BE40 BB16 DDR_A_DQS4 DDR_B_D19 BL43 BJ12 DDR_B_DQS4
BF44 BH6 BK47 BL7
MEMORY
BH45 BB2 BK49 BE2
MEMORY
BG40 SA_DQ_22 SA_DQS_7 AP3 DDR_A_DQS#[0..7] 15 BK43 SB_DQ_22 SB_DQS_7 AV2 DDR_B_DQS#[0..7] 15
DDR_A_D23 BF40 AT47 DDR_A_DQS#0 DDR_B_D23 BK42 AU50 DDR_B_DQS#0
DDR_A_D24 SA_DQ_23 SA_DQS#_0 DDR_A_DQS#1 DDR_B_D24 SB_DQ_23 SB_DQS#_0 DDR_B_DQS#1
AR40 SA_DQ_24 SA_DQS#_1 BD47 BJ41 SB_DQ_24 SB_DQS#_1 BC50
DDR_A_D25 AW40 BC41 DDR_A_DQS#2 DDR_B_D25 BL41 BL45 DDR_B_DQS#2
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ37 SB_DQ_26 SB_DQS#_3 BK38
DDR_A_D27 AW36 BA16 DDR_A_DQS#4 DDR_B_D27 BJ36 BK12 DDR_B_DQS#4
AW41 SA_DQ_28 SA_DQS#_5 BH7 BK41 SB_DQ_28 SB_DQS#_5 BK7
DDR_A_D29 AY41 BC1 DDR_A_DQS#6 DDR_B_D29 BJ40 BF2 DDR_B_DQS#6
AV38 SA_DQ_30 SA_DQS#_7 AP2 BL35 SB_DQ_30 SB_DQS#_7 AV3
B DDR_A_D31 AT38 DDR_B_D31 BK37 B
SA_DQ_31 DDR_A_MA[0..13] 15,16 SB_DQ_31 DDR_B_MA[0..13] 15,16
DDR_A_D32 AV13 BJ19 DDR_A_MA0 DDR_B_D32 BK13 BC18 DDR_B_MA0
DDR_A_D33 SA_DQ_32 SA_MA_0 DDR_A_MA1 DDR_B_D33 SB_DQ_32 SB_MA_0 DDR_B_MA1
AT13 BD20 BE11 BG28
SYSTEM

AW11 BK27 BK11 BG25
SYSTEM
AV11 SA_DQ_35 SA_MA_3 BH28 BC11 SB_DQ_35 SB_MA_3 AW17
DDR_A_D36 AU15 BL24 DDR_A_MA4 DDR_B_D36 BC13 BF25 DDR_B_MA4
AT11 SA_DQ_37 SA_MA_5 BK28 BE12 SB_DQ_37 SB_MA_5 BE25
DDR_A_D38 BA13 BJ27 DDR_A_MA6 DDR_B_D38 BC12 BA29 DDR_B_MA6
BA11 SA_DQ_39 SA_MA_7 BJ25 BG12 SB_DQ_39 SB_MA_7 BC28
DDR_A_D40 BE10 BL28 DDR_A_MA8 DDR_B_D40 BJ10 AY28 DDR_B_MA8
BD10 SA_DQ_41 SA_MA_9 BA28 BL9 SB_DQ_41 SB_MA_9 BD37
DDR_A_D42 BD8 BC19 DDR_A_MA10 DDR_B_D42 BK5 BG17 DDR_B_MA10
AY9 SA_DQ_43 SA_MA_11 BE28 BL5 SB_DQ_43 SB_MA_11 BE37
DDR_A_D44 BG10 BG30 DDR_A_MA12 DDR_B_D44 BK9 BA39 DDR_B_MA12
AW9 SA_DQ_45 SA_MA_13 BJ16 BK10 SB_DQ_45 SB_MA_13 BG13
DDR_A_D46 BD7 DDR_B_D46 BJ8
DDR
DDR_A_D47 SA_DQ_46 DDR_B_D47 SB_DQ_46 DDR_B_RAS#

BB9 BJ6 AV16
DDR
SA_DQ_47 SB_DQ_47 SB_RAS# DDR_B_RAS# 15,16
DDR_A_D48 BB5 BE18 DDR_A_RAS# DDR_B_D48 BF4 AY18 T98 PAD
SA_DQ_48 SA_RAS# DDR_A_RAS# 15,16 SB_DQ_48 SB_RCVEN#
DDR_A_D49 AY7 AY20 T102 PAD DDR_B_D49 BH5
DDR_A_D50 SA_DQ_49 SA_RCVEN# DDR_B_D50 SB_DQ_49 DDR_B_WE#
AT5 SA_DQ_50 BG1 SB_DQ_50 SB_WE# BC17 DDR_B_WE# 15,16
DDR_A_D51 AT7 BA19 DDR_A_WE# DDR_B_D51 BC2
SA_DQ_51 SA_WE# DDR_A_WE# 15,16 SB_DQ_51
DDR_A_D52 AY6 DDR_B_D52 BK3
DDR_A_D53 SA_DQ_52 DDR_B_D53 SB_DQ_52
BB7 SA_DQ_53 BE4 SB_DQ_53
DDR_A_D54 AR5 DDR_B_D54 BD3
AR8 SA_DQ_55 BJ2 SB_DQ_55
DDR_A_D56 AR9 DDR_B_D56 BA3
AN3 SA_DQ_57 BB3 SB_DQ_57
DDR_A_D58 AM8 DDR_B_D58 AR1
AN10 SA_DQ_59 AT3 SB_DQ_59
DDR_A_D60 AT9 DDR_B_D60 AY2
C
DDR_A_D61 SA_DQ_60 DDR_B_D61 SB_DQ_60 C
AN9 SA_DQ_61 AY3 SB_DQ_61
DDR_A_D62 AM9 DDR_B_D62 AU2
AN11 SA_DQ_63 AT2 SB_DQ_63
CRESTLINE_1p0_ES2 CRESTLINE_1p0_ES2
D D
QUANTA
Title
COMPUTER
Crestline (DDR2)

C & G UMA 2A

1 2 3 4 5 6 7 8
5 4 3 2 1
+3.3V_RUN
U16G U16F
+VCC_GMCH AT35 +VCC_GMCH_L 1 2 AB33

VCC_1 R432 10_0402 D34 VCC_NCTF_1
AT34 VCC_2 VCC_AXG_NCTF_1 T17 AB36 VCC_NCTF_2
AH28 T18 SDMK0340L-7-F AB37
VCC_3 VCC_AXG_NCTF_2 VCC_NCTF_3
AC32 VCC_5 VCC_AXG_NCTF_3 T19 AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AC31 VCC_4 VCC_AXG_NCTF_4 T21 AC35 VCC_NCTF_5 VSS_NCTF_2 T37
AK32 T22 AC36 U24
VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 +1.05V_VCCP AD36 V31
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF36 VCC_NCTF_10 VSS_NCTF_7 AA19 D
AH29 U17 +VCC_GMCH AH33 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35
VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19
U21 + AH37 AD37
VCC_AXG_NCTF_13 C181 C535 C557 C513 C543 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 Layout Note: 220U/2.5V/7343 22U/4V/0805 .22U/10V/0603 .22U/10V/0603 .1U/10V/0402 AJ35 AF35
VCC_AXG_NCTF_16 V16 370 mils from edge. AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
VCC_AXG_NCTF_17 V17 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
VCC_AXG_NCTF_18 V19 Layout Note: AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
VCC_AXG_NCTF_19 V20 Inside GMCH cavity. AK37 VCC_NCTF_20 VSS_NCTF_17 AP26
VCC_AXG_NCTF_20 V21 AD33 VCC_NCTF_21 VSS_NCTF_18 AP28
VCC_AXG_NCTF_21 V23 AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
VCC_AXG_NCTF_22 V24 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19
VCC NCTF
Y15 Layout Note: AL33 AR28
+VCC_SM
POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
370 mils from edge.
+1.05V_VCCP AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21
AU32 Y19 +VCC_AXG AA35

VCC_SM_1 VCC_AXG_NCTF_26 VCC_NCTF_27
AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 AP36 VCC_NCTF_30
AW33 Y24 + + + + AR35
VCC_SM_5 VCC_AXG_NCTF_30 C182 C166 C455 C435 VCC_NCTF_31
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 AR36 VCC_NCTF_32
AY35 Y28 220U/2.5V/7343 220U/2.5V/7343 220U/2.5V/7343_NC220U/2.5V/7343_NC Y32
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 VCC_SM_11 VCC_AXG_NCTF_36 AB16 Y37 VCC_NCTF_37 VSS_SCB1 A3
BC32 AB19 T30 B2
VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 T35 VCC_NCTF_40 VSS_SCB4 BL1 C
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Layout Note: U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 VCC_SM_16 VCC_AXG_NCTF_41 AD15 Inside GMCH cavity for VCC_AXG. U31 VCC_NCTF_42 VSS_SCB6 A51
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 U32 VCC_NCTF_43
BE33 AD17 +VCC_AXG U33
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U35 VCC_NCTF_45
VCC GFX NCTF
BF33 AF19 U36

VCC SM

BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 V32 VCC_NCTF_47
BG32 AH16 C548 C551 C546 V33
VCC_SM_22 VCC_AXG_NCTF_47 .1U/10V/0402 C540 .47U/10V/0603 C537 10U/6.3V/0805 C547 VCC_NCTF_48
BG33 VCC_SM_23 VCC_AXG_NCTF_48 AH17 V36 VCC_NCTF_49
BG35 AH19 .1U/10V/0402 1U/10V/0603 22U/4V/0805 V37
BH32 VCC_SM_25 VCC_AXG_NCTF_50 AJ16
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 VCC_AXM_1 AT33 +VCC_AXM
BH35 AJ19 AT31
VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 +1.05V_VCCP AL24 AJ26
VCC_SM_31 VCC_AXG_NCTF_56 Inside GMCH cavity. VCC_AXM_NCTF_1 VCC_AXM_6
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK34 AL20 +VCC_AXM AL28
VCC_SM_33 VCC_AXG_NCTF_58 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 AM28 VCC_AXM_NCTF_5
VCC AXM NCTF

AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 AM29 VCC_AXM_NCTF_6
AM16 C508 C527 C507 AM31
VCC_AXG_NCTF_62 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 VCC_AXM_NCTF_7
VCC_AXG_NCTF_63 AM19 AM32 VCC_AXM_NCTF_8
VCC_AXG_NCTF_64 AM20 AM33 VCC_AXM_NCTF_9
+VCC_AXG R20 VCC_AXG_NCTF_65 AM21
AM23
Non-iAMT AP29
AP31
VCC_AXM_NCTF_10
VCC_AXG_1 VCC_AXG_NCTF_66 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
B
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13 B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 AL29 VCC_AXM_NCTF_14
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL31 VCC_AXM_NCTF_15
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 AL32 VCC_AXM_NCTF_16
AA23 AP21 C528 C533 C514 AR31
VCC_AXG_7 VCC_AXG_NCTF_72 22U/4V/0805 .22U/10V/0603 .22U/10V/0603 VCC_AXM_NCTF_17
AA26 VCC_AXG_8 VCC_AXG_NCTF_73 AP23 AR32 VCC_AXM_NCTF_18
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR33 VCC_AXM_NCTF_19
AB21 VCC_AXG_10 VCC_AXG_NCTF_75 AR20
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 Place close to GMCH edge.
AC21 AR26 CRESTLINE_1p0_ES2
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX
AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26

AC28 Y31 +1.8V_SUS +VCC_SM
VCC_AXG_18 VCC_AXG_NCTF_83
AC29 VCC_AXG_19
AD20 VCC_AXG_20
AD23 VCC_AXG_21
AD24 AW45 VCCSM_LF1
VCC SM LF
VCC_AXG_22 VCC_SM_LF1 VCCSM_LF2 +

AD28 VCC_AXG_23 VCC_SM_LF2 BC39
AF21 BE39 VCCSM_LF3 C572 C285 C281 C562
VCC_AXG_24 VCC_SM_LF3 VCCSM_LF4 .1U/10V/0402 330U/2.5V/ESR15 22U/4V/0805 22U/4V/0805
AF26 VCC_AXG_25 VCC_SM_LF4 BD17
AA31 BD4 VCCSM_LF5
VCC_AXG_26 VCC_SM_LF5 VCCSM_LF6
AH20 VCC_AXG_27 VCC_SM_LF6 AW8
AH21 AT6 VCCSM_LF7 Layout Note:
VCC_AXG_28 VCC_SM_LF7
AH23 VCC_AXG_29 Place C901 where LVDS
AH24 VCC_AXG_30 and DDR2 taps. Layout Note:
AH26 C559 C561 C573 C571 C582 C563 Place on the edge.
VCC_AXG_31 .1U/10V/0402 .1U/10V/0402 .22U/10V/0603 .22U/10V/0603 .47U/10V/0603 1U/10V/0603 C566
AD31 VCC_AXG_32
A AJ20 1U/10V/0603 A
VCC_AXG_33
AN14 VCC_AXG_34
QUANTA
CRESTLINE_1p0_ES2 Title
COMPUTER
Crestline (VCC,NCTF)

C & G UMA 2A

5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
U16H
+1.05V_VCCP
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC VCC_HV
J32 VCCSYNC VTT_1 U13
2
VTT_2 U12
+3.3V_RUN L38 +VCCA_CRTDAC +VCCA_CRTDAC_R +VCCA_CRTDAC_R A33 U11
BLM18PG181SN1D R399 0_0402 VCCA_CRT_DAC_1 VTT_3 D32
B33 VCCA_CRT_DAC_2 VTT_4 U9
U8 C524 C532 CH751H-40HPT_NC
CRT
C491 VTT_5 2.2U/6.3V/0603 4.7U/6.3V/0603
U7
1
C453 C462 .1U/10V/0402 +VCC_TVBG_R VTT_6 +VCC_HV_L
A30 VCCA_DAC_BG VTT_7 U5
.1U/10V/0402 22nF/3P_NC U3
VTT_8
B32 VSSA_DAC_BG VTT_9 U2
U1 +1.05V_VCCP
D VTT_10 R437 D
VTT_11 T13 Place on the edge.
+VCCA_DPLLA B49 T11 10_0402_NC
VCCA_DPLLA VTT_12
VTT
VTT_13 T10
+VCCA_DPLLB H49 T9
VCCA_DPLLB VTT_14
Non-iAMT 45mA MAx. 40mA MAx. T7
PLL
+VCCA_HPLL VTT_15 C536
FB_120ohm+-25%_100mHz +1.25V_RUN
10uH+-20%_100mA
AL2 VCCA_HPLL VTT_16 T6
T5 C529 4.7U/6.3V/0603 + C434 Non-
+1.25V_RUN VTT_17
_200mA_0.2ohm DC
L36
+VCCA_DPLLA C465
+VCCA_MPLL AM2 VCCA_MPLL VTT_18 T3 .47U/6.3V/0402 220U/2.5V/7343 iAMT +3.3V_RUN
VTT_19 T2
10uH/100MA 1000P/50V/0402 R3
A LVDS
L43 +VCCA_HPLL +VCC_TX_LVDS VTT_20 +1.25V_RUN
2 1 A41 VCCA_LVDS VTT_21 R2
BLM11A05 + C460 R1 +1.25V_RUN
C426 .1U/10V/0402 VTT_22
B41 VSSA_LVDS
Place on the edge. PJP7
470U/2.5V/ESR9 +3.3V_RUN
C539 C544 AT23 +VCC_AXD_L +VCC_AXD_R 2 1
22U/10V/1206 .1U/10V/0402 VCC_AXD_1 L32 0_0402
VCC_AXD_2 AU28
K50 VCCA_PEG_BG VCC_AXD_3 AU24 Reserved L81 pad for
L42 AT29
A PEG
VCC_AXD_4 inductor.
AXD
+VCCA_DPLL +VCCA_DPLLB K49 AT25 C556 C276
10uH/100MA VSSA_PEG_BG VCC_AXD_5 1U/10V/0603 22U/10V/1206 +VCC_AXF
VCC_AXD_6 AT30
L31 +VCCA_MPLL C489 Place caps close
BLM11A05 0.1Caps should be + C487 .1U/10V/0402 +VCCA_PEG_PLL U51 AR29 to VCC_AXD.
C510 .1U/10V/0402 VCCA_PEG_PLL VCC_AXD_NCTF
placed 200 mils 470U/2.5V/ESR9 C531 C530
R229 0.5/F_0603 with in its pins. AW18 B23 +VCC_AXF 1U/10V/0603 10U/6.3V/0805
+VCCA_MPLL_L C552 VCCA_SM_1 VCC_AXF_1
AV19 B21
AXF
C240
.1U/10V/0402 AU19
AU18
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
POWER VCC_AXF_2
VCC_AXF_3 A21
22U/10V/1206 AU17 AJ50 +1.25V_RUN

PJP19 VCCA_SM_5 VCC_DMI
C Place caps close C
A SM
+1.25V_RUN 1 2 +VCCA_SM AT22 to VCC_AXF
VCCA_SM_7 +VCC_SM_CK C271
AT21 BK24
SM CK
VCCA_SM_8 VCC_SM_CK_1 .1U/10V/0402
AT19 VCCA_SM_9 VCC_SM_CK_2 BK23
+ C576 C553 C550 AT18 BJ24 Place PJP62 for +1.8V_SUS
VCCA_SM_10 VCC_SM_CK_3
100U/6.3V/7343 C549 22U/4V/0805 C554 1U/10V/0603 AT17 BJ23
4.7U/6.3V/0603 22U/4V/0805 VCCA_SM_11 VCC_SM_CK_4 +1.8V_SUS
Non-iAMT AR17
AR16
VCCA_SM_NCTF_1
1uH+-20%_300mA
VCCA_SM_NCTF_2 PJP6
A43 +VCC_TX_LVDS L26 +VCC_TX_LVDS_R 2 1
A CK
PJP20 VCC_TX_LVDS
BC29 1uH/300MA
+VCCA_SM_CK VCCA_SM_CK_1 +3.3V_RUN
+1.25V_RUN 1 2 BB29 VCCA_SM_CK_2
1
VCC_HV_1 C40 +
+VCC_TVDACA_R C25 B40 C425
HV
C574 C568 VCCA_TVA_DAC_1 VCC_HV_2 C464 220U/2.5V/7343
B25
2
22U/4V/0805 C581 1U/10V/0603 C585 +VCC_TVDACB_R VCCA_TVA_DAC_2 1000P/50V/0402
C27 VCCA_TVB_DAC_1
1U/10V/0603 .1U/10V/0402 B27 AD51 C492
TV
+1.25V_RUN +VCC_TVDACC_R VCCA_TVB_DAC_2 VCC_PEG_1 .1U/10V/0402 +VCC_PEG +1.05V_VCCP
B28 VCCA_TVC_DAC_1 VCC_PEG_2 W50
A28 VCCA_TVC_DAC_2 VCC_PEG_3 W51
PEG
L40 +VCCA_PEG_PLL V49
D TV/CRT
BLM21PG221SN1D VCC_PEG_4 L41
VCC_PEG_5 V50
+VCCD_TVDAC_R M32 91nH/1.5A
VCCD_CRT
L29 VCCD_TVDAC 91uH+-20%_1.5A
FB_220ohm+-25%_100MHz R426 +VCC_RXR_DMI
Non-iAMT AH50 +
DMI
1/F_0603 +1.25V_RUN +VCCQ_TVDAC_R VCC_RXR_DMI_1 C534
_2A_0.1ohm DC Place PJP54 for N28 VCCD_QDAC VCC_RXR_DMI_2 AH51
+1.8V_SUS C241 10U/6.3V/0805
C509 AN2 220U/2.5V/7343
.1U/10V/0402 VCCD_HPLL +VTTLF1 +1.05V_VCCP
A7
VTTLF
C496 +VCCA_PEG_PLL VTTLF1 +VTTLF2
U48 VCCD_PEG_PLL VTTLF2 F2
10U/6.3V/0805 PJP8 AH1 +VTTLF3
LVDS
B
+VCCD_LVDS VTTLF3 L44 B
+1.8V_SUS 1 2 J41 VCCD_LVDS_1
C545 C511 H42 91nH/1.5A
.1U/10V/0402 .1U/10V/0402 VCCD_LVDS_2
91uH+-20%_1.5A
+
C541
C490 CRESTLINE_1p0_ES2 C262 10U/6.3V/0805
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC C493 10U/6.3V/0603_NC 220U/2.5V/7343
1U/10V/0603
+3.3V_RUN L37 +VCC_TVDACA +VCC_TVDACA_R +VTTLF1

BLM18PG181SN1D R402 0_0402 +VTTLF2
+VTTLF3
22nF & 0.1uF for
C457 C440 C466 L45 +1.8V_SUS
VCC_TVDACA:C_R should 10U/6.3V/0805 .1U/10V/0402 22nF/3P_NC C542 C484 C443 1uH/300mA
be placed with in 250 .47U/10V/0603 .47U/10V/0603 .47U/10V/0603 +VCC_SM_CK
mils from Crestline.
1uH+-20%_300mA
R252
+VCC_TVBG_R +VCC_TVBG +VCC_TVDACB +VCC_TVDACB_R 1/F_0603
R396 0_0402 R167 R397 0_0402 C583
.03/F_2010 +1.5V_RUN C277 .1U/10V/0402+VCC_SM_CK_L
22U/10V/1206
C454 C439 C456 C467 +VCCD_TVDAC_R C280
22nF/3P_NC .1U/10V/0402 .1U/10V/0402 22nF/3P_NC R428 0_0402 10U/6.3V/0805
C499 +VCCQ_TVDAC_R
.1U/10V/0402 C498
A 22nF/3P_NC A
+3.3V_RUN +VCC_TVDACC +VCC_TVDACC_R L39 C629

+1.5V_RUN R400 0_0402 +VCCQ_TVDAC 1U/10V/0603
2 1 +VCC_TVDAC_L
100/F_0603 R431 0_0402
Place close to
QUANTA
D33 R441 10_0402_NC C441 C463 C505
CH751H-40HPT_NC
TV DAC Voltage Follower Circuit -700 mV.
.1U/10V/0402 22nF/3P_NC
FB_180ohm+-25%_
100mHz_1500mA_
.1U/10V/0402 C506
22nF/3P_NC
U8.AN2
Title
COMPUTER
0.09ohm DC Crestline (POWER)

C & G UMA 2A

5 4 3 2 1
5 4 3 2 1
U16I U16J
C46 VSS_199 VSS_287 W11
A13 VSS_1 VSS_100 AW24 C50 VSS_200 VSS_288 W39
A15 VSS_2 VSS_101 AW29 C7 VSS_201 VSS_289 W43
A17 VSS_3 VSS_102 AW32 D13 VSS_202 VSS_290 W47
A24 VSS_4 VSS_103 AW5 D24 VSS_203 VSS_291 W5
AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
VSS_42 VSS_141 VSS_241
VSS
AH40 VSS_43 VSS_142 BD2 J35 VSS_242
AH41 VSS_44 VSS_143 BD28 J39 VSS_243
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 VSS_85 VSS_184 BK8 U50 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19
AU29 BL37 CRESTLINE_1p0_ES2
VSS_90 VSS_189
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41
CRESTLINE_1p0_ES2
QUANTA
Title
COMPUTER
Crestline (VSS)

C & G UMA 2A

5 4 3 2 1
1 2 3 4 5 6 7 8
32.768KHZ +RTC_CELL +RTC_CELL

2 1
1
R83 10M_0402
W1
R340 R345
ICH_RTCX1 1 4 1 2 ICH_RTCX2 332K/F_0402 332K/F_0402
R77 0_0402
2
2 3 ICH_INTVRMEN ICH_LAN100_SLP
1
C88 32.768KHZ C75
A A
15P/50V/0402 15P/50V/0402
2
R339 R346
0_0402_NC 0_0402_NC
2
+RTC_CELL ICH8M Internal VR Enable Strap ICH8M LAN100 SLP Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5) (Internal VR for VccLAN1.05 and VccCL1.05)
Low = Internal VR Disabled Low = Internal VR Disabled
2
ICH_INTVRMEN High = Internal VR Enabled(Default) ICH_LAN100_SLP High = Internal VR Enabled(Default)
R341 R62 +1.05V_VCCP
1M_0402 20K_0402
U11A
2
1
ICH_RTCRST# ICH_RTCX1 AG25 E5
RTCX1 FWH0/LAD0 LPC_LAD0 28
2
ICH_INTRUDER# ICH_RTCX2 AF24 F5 R344
RTCX2 FWH1/LAD1 LPC_LAD1 28
G8 R107 56_0402
FWH2/LAD2 LPC_LAD2 28
1
ICH_RTCRST# AF23 F6 R108 56_0402_NC
RTCRST# FWH3/LAD3 LPC_LAD3 28
C86 56_0402_NC
LPC
RTC
1U/10V/0603 ICH_INTRUDER# AD22 C4 LPC_LFRAME# 28
2
1
INTRUDER# FWH4/LFRAME# H_DPRSTP#
ICH_INTVRMEN AF25 G9 LPC_LDRQ0# H_DPSLP#
INTVRMEN LDRQ0# PAD T73
ICH_LAN100_SLP AD21 E6 LPC_LDRQ1# H_FERR#
LAN100_SLP LDRQ1#/GPIO23 PAD T74
T82 PAD GLAN_CLK B24 AF13 SIO_A20GATE

GLAN_CLK A20GATE SIO_A20GATE 28
A20M# AG26 H_A20M# 3
+3.3V_RUN D22 LAN_RSTSYNC H_DPRSTP# +3.3V_RUN
DPRSTP# AF26 H_DPRSTP# 3,6,45
B 1 2 RTC_BAT_DET# T81 PAD LAN_RXD0 C21 AE26 H_DPSLP# B
LAN / GLAN
LAN_RXD0 DPSLP# H_DPSLP# 3
R20 100K_0402 T30 PAD LAN_RXD1 B21
LAN_RXD2 LAN_RXD1 H_FERR#
T80 PAD C22 LAN_RXD2 FERR# AD24 H_FERR# 3
2
T77 PAD LAN_TXD0
T78 PAD LAN_TXD1 D21 AG29 R70 R86
LAN_TXD0 CPUPWRGD/GPIO49 H_PWRGOOD 3
T79 PAD LAN_TXD2 E20 10K_0402 10K_0402
LAN_TXD1
C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# 3
CPU
1
T14 PAD AH21 AE24 SIO_A20GATE
GLAN_DOCK#/GPIO13 INIT# H_INIT# 3
26 ICH_AZ_MDC_BITCLK
R85 1 2 33_0402ACZ_BIT_CLK INTR AC20 H_INTR 3
SIO_RCIN#
R84 1 2 10_0402 R395 24.9/F_0402 D25 AH14 SIO_RCIN#
32 ICH_AZ_CODEC_BITCLK GLAN_COMPI RCIN# SIO_RCIN# 28
+1.5V_PCIE_ICH 1 2 GLAN_COMP C25 GLAN_COMPO
NMI AD23 H_NMI 3
2
ACZ_BIT_CLK AJ16 AG28

HDA_BIT_CLK SMI# H_SMI# 3 +1.05V_VCCP
C76 C92 ACZ_SYNC AJ15
27P/50V/0402_NC 27P/50V/0402_NC HDA_SYNC
AA24 H_STPCLK# 3
1
ACZ_RST# STPCLK#
AE14 HDA_RST#
2
AE27 THERMTRIP#_ICH
THRMTRIP# R106
32 ICH_AZ_CODEC_SDIN0 AJ17 HDA_SDIN0 PAD T64
R56 1 2 33_0402ACZ_SYNC AH17 AA23 56_0402
26 ICH_AZ_MDC_SYNC 26 ICH_AZ_MDC_SDIN1
IHDA
R57 33_0402 HDA_SDIN1 TP8 IDE_DD[0..15]
32 ICH_AZ_CODEC_SYNC 1 2 T15 PAD AH15 HDA_SDIN2 IDE_DD[0..15] 23
R53 1 2 33_0402ACZ_RST# T59 PAD AD13 V1 IDE_DD0
26 ICH_AZ_MDC_RST#
1
R54 33_0402 HDA_SDIN3 DD0 IDE_DD1 THERMTRIP#_ICH
32 ICH_AZ_CODEC_RST# 1 2 DD1 U2
R55 1 2 33_0402ACZ_SDOUT ACZ_SDOUT AE13 V3 IDE_DD2
26 ICH_AZ_MDC_SDOUT HDA_SDOUT DD2
R50 1 2 33_0402 T1 IDE_DD3
32 ICH_AZ_CODEC_SDOUT DD3
32 SPEAKER_DET# AE10 V4 IDE_DD4
RTC_BAT_DET# HDA_DOCK_EN#/GPIO33 DD4 IDE_DD5
30 RTC_BAT_DET# AG14 HDA_DOCK_RST#/GPIO34 DD5 T5
Place all series terms close to ICH8 except for SDIN input AB2 IDE_DD6
DD6 IDE_DD7
lines,which should be close to source.Placement of R292, R286, 37 SATA_ACT# AF10 SATALED# DD7 T6
T3 IDE_DD8
C R283 & R289 should equal distance to the T split trace point as DD8 IDE_DD9 C
23 SATA_RX0- AF6 SATA0RXN DD9 R2
R291, R285, R284 & R290 respective. Basically,keep the same 23 SATA_RX0+ AF5 SATA0RXP DD10 T4 IDE_DD10
distance from T for all series termination resistors. SATA_TX0-_C AH5 V6 IDE_DD11
SATA_TX0+_C SATA0TXN DD11 IDE_DD12
AH6 SATA0TXP DD12 V5
U1 IDE_DD13
IDE
DD13 IDE_DD14
AG3 SATA1RXN DD14 V2
AG4 U6 IDE_DD15
SATA1RXP DD15
23 SATA_TX0-
C95 2 1 3900P/25V/0402SATA_TX0-_C AJ4 SATA1TXN
C94 2 1 3900P/25V/0402SATA_TX0+_C AJ3 AA4 IDE_DA0
SATA
23 SATA_TX0+ SATA1TXP DA0 IDE_DA0 23
AA1 IDE_DA1
DA1 IDE_DA1 23
AF2 AB3 IDE_DA2
23 SATA_RX2- SATA2RXN DA2 IDE_DA2 23
C96 2 1 3900P/25V/0402_NC
SATA_TX2-_C AF1
23 SATA_TX2- 23 SATA_RX2+ SATA2RXP
C97 2 SATA_TX2+_C
1 3900P/25V/0402_NC SATA_TX2-_C AE4 Y6 IDE_DCS1#
23 SATA_TX2+ SATA2TXN DCS1# IDE_DCS1# 23
SATA_TX2+_C AE3 Y5 IDE_DCS3#
SATA2TXP DCS3# IDE_DCS3# 23
Populate C96, C97 (P/N:CH23904KB13) for Gilligan
17 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_DIOR# 23
Distance between the ICH-8 M and cap on the "P" 17 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_DIOW# 23
signal should be identical distance between the DDACK# Y2 IDE_DDACK# 23
ICH-6 M and cap on the "N" signal for same pair. Place within 500mils AG1 SATARBIAS# IDEIRQ Y3 IDE_IRQ 23
of ICH8 ball 2 1 SATABIAS AG2 SATARBIAS IORDY Y1 IDE_DIORDY 23
R109 24.9/F_0402 W5
DDREQ IDE_DDREQ 23
ICH8M ES2
+3.3V_RUN
2
D XOR Chain Entrance Strap R51 D

1K_0402_NC
ICH RSVD HDA SDOUT Description
QUANTA
1
0 0 RSVD ACZ_SDOUT
ICH_RSVD 13
0 1 Enter XOR Chain
COMPUTER
2
1 0 Normal Operation (Default) R93 Title

1K_0402_NC ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
1 1 Set PCIE port config bit 1
1
C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U11D
25 PCIE_RX1- P27 PERN1 DMI0RXN V27 DMI_MTX_IRX_N0 6
Place TX DC blocking caps close ICH8. P26 V26
Direct Media Interface

25 PCIE_RX1+ PERP1 DMI0RXP DMI_MTX_IRX_P0 6
PCIE_TXN1_C N29 U29
PETN1 DMI0TXN DMI_MRX_ITX_N0 6
C162 1 2 .1U/10V/0402 PCIE_TXN1_C WWAN PCIE_TXP1_C N28 U28
25 PCIE_TX1- PETP1 DMI0TXP DMI_MRX_ITX_P0 6
C165 1 2 .1U/10V/0402 PCIE_TXP1_C
25 PCIE_TX1+
24 PCIE_RX2- M27 PERN2 DMI1RXN Y27 DMI_MTX_IRX_N1 6
24 PCIE_RX2+ M26 PERP2 DMI1RXP Y26 DMI_MTX_IRX_P1 6
C172 1 2 .1U/10V/0402 PCIE_TXN2_C PCIE_TXN2_C L29 W29
24 PCIE_TX2- PETN2 DMI1TXN DMI_MRX_ITX_N1 6
C169 1 2 .1U/10V/0402 PCIE_TXP2_C WLAN PCIE_TXP2_C L28 W28 ICH_USBP5-
24 PCIE_TX2+ PETP2 DMI1TXP DMI_MRX_ITX_P1 6
2
K27 AB26
PCI-Express
24 PCIE_RX3- PERN3 DMI2RXN DMI_MTX_IRX_N2 6
C179 1 2 .1U/10V/0402 PCIE_TXN3_C K26 AB25 C652
A 24 PCIE_TX3- 24 PCIE_RX3+ PERP3 DMI2RXP DMI_MTX_IRX_P2 6 A
C174 1 2 .1U/10V/0402 PCIE_TXP3_C PCIE_TXN3_C J29 AA29 12pF/50V/0402_NC
24 PCIE_TX3+ DMI_MRX_ITX_N2 6
1
PCIE_TXP3_C PETN3 DMI2TXN ICH_USBP5+
WPAN J28 PETP3 DMI2TXP AA28 DMI_MRX_ITX_P2 6
C188 1 2 .1U/10V/0402 PCIE_TXN4_C H27 AD27
26 PCIE_TX4- 26 PCIE_RX4- PERN4 DMI3RXN DMI_MTX_IRX_N3 6
C184 1 2 .1U/10V/0402 PCIE_TXP4_C H26 AD26
26 PCIE_TX4+ 26 PCIE_RX4+ PERP4 DMI3RXP DMI_MTX_IRX_P3 6
PCIE_TXN4_C G29 AC29
PETN4 DMI3TXN DMI_MRX_ITX_N3 6
Express Card PCIE_TXP4_C G28 AC28
PETP4 DMI3TXP DMI_MRX_ITX_P3 6
F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 17
F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 17
E29 PETN5
E28 PETP5 DMI_ZCOMP Y23
Y24 DMI_COMP 2 1 Place within 500mils of ICH8
DMI_IRCOMP +1.5V_PCIE_ICH
D27 R350 24.9/F_0402
PERN6/GLAN_RXN
D26 PERP6/GLAN_RXP USBP0N G3 ICH_USBP0- 27
C29 PETN6/GLAN_TXN USBP0P G2 ICH_USBP0+ 27 USB[1B]
C28 PETP6/GLAN_TXP USBP1N H5 ICH_USBP1- 27
USBP1P H4 ICH_USBP1+ 27 USB[1A]
R408 1 2 ICH_EC_SPI_CLK_R C23 H2 ICH_USBP2- 27 PCI Pullups +3.3V_RUN
28 ICH_EC_SPI_CLK SPI_CLK USBP2N RP19
Layout Note: 15_0402 ICH_SPI_CS# B23 H1 ICH_USBP2+ 27 USB[2B]
ICH_SPI_CS1#_R SPI_CS0# USBP2P
Place R288,R688 and R282 E22 J3 ICH_USBP3- 27 6 5
SPI
SPI_CS1# USBP3N
within 500 mils from ICH. USBP3P J2 ICH_USBP3+ 27 USB[2A] 7 4
R409 1 2 ICH_EC_SPI_DO_R D23 K5 ICH_USBP4- 24 8 3 PCI_FRAME#
28 ICH_EC_SPI_DO SPI_MOSI USBP4N
15_0402 F21 K4 ICH_USBP4+ 24 3rd Mini Card 9 2 PCI_DEVSEL#
28 ICH_EC_SPI_DIN SPI_MISO USBP4P
K2 ICH_USBP5- ICH_USBP5- 33 10 1 PCI_REQ1#
USB_OC0_1# USBP5N ICH_USBP5+ +3.3V_RUN
27 USB_OC0_1# AJ19 OC0# USBP5P K1 ICH_USBP5+ 33 CAMERA
AG16 OC1#/GPIO40 USBP6N L3 ICH_USBP6- 26 10P8R-8.2K
+3.3V_ALW USB_OC2_3# +3.3V_RUN
27 USB_OC2_3# AG15 OC2#/GPIO41 USB USBP6P L2 ICH_USBP6+ 26 Express Card RP20
AE15 OC3#/GPIO42 USBP7N M5 ICH_USBP7- 37
B U30 R436 25 OC4# AF15 M4 ICH_USBP7+ 37 Blue tooth SB_WLAN_PCIE_RST# 6 5 B
OC4#/GPIO43 USBP7P
5
15_0402 OC5# AG17 M2 ICH_USBP8- 27 SB_NB_PCIE_RST# 7 4 PCI_STOP#

ICH_SPI_CS# OC6# OC5#/GPIO29 USBP8N PCI_SERR#
2 1 2 25 AD12 OC6#/GPIO30 USBP8P M1 ICH_USBP8+ 27 USB[3] 8 3
1 2 4 OC7# AJ18 N3 ICH_USBP9- 25 PCI_PIRQD# 9 2 SB_MCARD3_PCIE_RST#
30 SPI_CS0# OC7#/GPIO31 USBP9N
R434 1 USB_OC8# AD14 N2 ICH_USBP9+ 25 WWAN 10 1 PCI_TRDY#
SIO_SPI_CS# 28 27 USB_OC8# OC8# USBP9P +3.3V_RUN
15_0402_NC OC9# AH18
7SH08_NC OC9#
1 2 USBRBIAS# F2 10P8R-8.2K
R435 F3 USBRBIAS +3.3V_RUN
0_0402 USBRBIAS RP21
29
ICH8M ES2 6 5
+3.3V_SUS PCI_REQ0# PCI_PIRQC#
35 7 4
2
35 Short F2 and F3 at the package PCI_PLOCK# 8 3 PCI_PIRQB#
1 2 USB_OC0_1# and keep length to less than R174 PCI_PERR# 9 2 PCI_PIRQA#
C661 .1U/10V/0402_NC OC4# 22.6/F_0402 PCI_IRDY#
1 2 USB_OC2_3# Non-iAMT 2
R569
1
10K_0402 500mils. Trace Impedance +3.3V_RUN 10 1
C662 .1U/10V/0402_NC 25 should be 60ohms +/- 15%. 10P8R-8.2K
1
1 2 USB_OC8# OC7# 6 5
C663 .1U/10V/0402_NC OC9# 7 4 USB_OC0_1#
1 2 OC5# OC5# 8 3 USB_OC2_3#
C664 .1U/10V/0402_NC OC6#
1 2 OC6#
9
10
2
1 USB_OC8# ICH_SPI_CS1#_R Boot BIOS Strap
Non-iAMT +3.3V_SUS Add Buffers as needed for
C665 .1U/10V/0402_NC +3.3V_SUS PCI_GNT0#
OC7# RP35
Loading and fanout concerns.
1 2 25 GNT0# SPI_CS1# 1 2
2
C666 .1U/10V/0402_NC 10P8R-10K C153
1 2 OC9# LPC 11 No stuff No stuff .047U/10V/0402
5
C667 .1U/10V/0402_NC R201 R379 U12
20,35 PCI_AD[0..31] U11B 1K_0402 1K_0402_NC PCI 10 No stuff Stuff 2
PCI_AD0 D20 A4 PCI_REQ0# 4
PCI_REQ0# 35 PCI_RST# 20,35
1
PCI_AD1 AD0 REQ0# PCI_GNT0# PCI_RST#_G
E19 AD1 PCI GNT0# D7 PCI_GNT0# 35 SPI 01 Stuff No stuff 1
PCI_AD2 D19 E18 PCI_REQ1#
C AD2 REQ1#/GPIO50 PCI_REQ1# 20 C
PCI_AD3 A20 C18 PCI_GNT1# TC7SZ32FU
AD3 GNT1#/GPIO51 PCI_GNT1# 20
PCI_AD4 D17 B19 SB_WWAN_PCIE_RST#
AD4 REQ2#/GPIO52 SB_WWAN_PCIE_RST# 25
PCI_AD5 A21 F18 +3.3V_SUS
PCI_AD6 AD5 GNT2#/GPIO53 SB_LOM_PCIE_RST#
A19 AD6 REQ3#/GPIO54 A11
PCI_AD7 C19 C10 1 2
PCI_AD8 AD7 GNT3#/GPIO55 SB_NB_PCIE_RST# C115
A18 AD8
PCI_AD9 B16 C17 .047U/10V/0402
AD9 C/BE0# PCI_C_BE0# 20,35
5
PCI_AD10 A12 E15 U6
AD10 C/BE1# PCI_C_BE1# 20,35
PCI_AD11 E16 F16 2
AD11 C/BE2# PCI_C_BE2# 20,35
PCI_AD12 A14 E17 R209 4
AD12 C/BE3# PCI_C_BE3# 20,35 PLTRST1# 24,25,26
PCI_AD13 G16 1K_0402_NC PCI_PLTRST# 1
PCI_AD14 AD13 PCI_IRDY#
A15 C8 PCI_IRDY# 20,35
1
PCI_AD15 AD14 IRDY#
B6 D9 PCI_PAR 20,35 TC7SZ32FU
PCI_AD16 AD15 PAR PCI_RST#_G
C11 AD16 PCIRST# G6
PCI_AD17 A9 D16 PCI_DEVSEL#
AD17 DEVSEL# PCI_DEVSEL# 20,35
PCI_AD18 D11 A7 PCI_PERR# A16 away override strap. +3.3V_SUS
AD18 PERR# PCI_PERR# 20,35
PCI_AD19 B12 B7 PCI_PLOCK#
AD19 PLOCK# PCI_PLOCK#
PCI_AD20 C12 F10 PCI_SERR# Low = A16 swap override enabled. 1 2
AD20 SERR# PCI_SERR# 20,35
PCI_AD21 D10 C16 PCI_STOP# PCI_GNT3# High = Default. C128
AD21 STOP# PCI_STOP# 20,35
PCI_AD22 C7 C9 PCI_TRDY# .047U/10V/0402
AD22 TRDY# PCI_TRDY# 20,35
5
PCI_AD23 F13 A17 PCI_FRAME# U9
AD23 FRAME# PCI_FRAME# 20,35
PCI_AD24 E11 2
PCI_AD25 AD24
E13 AD25 PLTRST# AG24 PCI_PLTRST# CLK_PCI_ICH 4 PLTRST# 6,28
PCI_AD26 E12 B10 CLK_PCI_ICH PCI_PLTRST# 1
AD26 PCICLK CLK_PCI_ICH 17
2
PCI_AD27 D8 G7
AD27 PME# ICH_PME# 29
PCI_AD28 A6 39 TC7SZ32FU
PCI_AD29 AD28 R200
E8 AD29
PLTRST1# for WWAN/WLAN/WPAN/Express card
PCI_AD30 D6 33_0402 PLTRST# for MCH/SIO
PCI_AD31 AD30
A3
2 1
AD31
D D
PCI_PIRQA# F9
Interrupt I/F F8 SB_MCARD3_PCIE_RST# C220
PIRQA# PIRQE#/GPIO2 SB_MCARD3_PCIE_RST# 24
PCI_PIRQB# B5 G11 SB_WLAN_PCIE_RST# 9P/50V/0402
35 PCI_PIRQB#
20 PCI_PIRQC#
PCI_PIRQC# C5
PCI_PIRQD# A10
PIRQB#
PIRQC#
PIRQF#/GPIO3
PIRQG#/GPIO4 F12 SB_NB_PCIE_RST#
B3
SB_WLAN_PCIE_RST# 24
SB_NB_PCIE_RST# 6 29
1
QUANTA
20 PCI_PIRQD# PIRQD# PIRQH#/GPIO5 PCIE_MCARD2_DET# 25
PCI_PIRQB: for LOM

ICH8M ES2 SB_LOM_PCIE_RST#
SB_WWAN_PCIE_RST#
R207
R202
2 1 20K_0402_NC
20K_0402
Reserved for EMI.
Place resister and cap Title
COMPUTER
2 1
PCI_PIRQC: for Media Card LOM REQ0 GNT0 PIRQB SB_WLAN_PCIE_RST# R372 2 1 20K_0402_NC close to ICH. ICH8-M (USB,DMI,PCIE,PCI)
PCI_PIRQD: for 1394 SB_MCARD3_PCIE_RST# R203 2 1 20K_0402
SB_NB_PCIE_RST# R208 20K_0402_NC Size Document Number Rev
Card reader PIRQC 2 1
C & G UMA 2A
with 1394 REQ1 GNT1 PIRQD BIOS should not enable the
internal GPIO pull up resistor. Date: Friday, January 19, 2007 Sheet 12 of 60
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_SUS Non-iAMT Place these close to ICH7.

ICH_SMBDATA R548 2 1 0_0402_NC AMT_SMBDAT R342 2 1 10K_0402 AMT_SMBDAT
ICH_SMBCLK R547 2 1 0_0402_NC AMT_SMBCLK R352 2 1 10K_0402 AMT_SMBCLK CLK_ICH_48M
1
A A
+3.3V_RUN
53
R349 2 1 10K_0402_NC ICH_CL_RST1# R157
R348 2 1 10K_0402 ICH_RI# 33_0402
R334 2 1 10K_0402 SIO_EXT_SCI#
R337 2 1 1K_0402 ICH_PCIE_WAKE#
1 2
2
+3.3V_SUS
Non-iAMT
RP23 R90 C180
1 2 ICH_SMBDATA 8.2K_0402 6.8P/50V/0402
2
3 4 ICH_SMBCLK
1
U11C
4P2R-2.2K ICH_SMBCLK AJ26 AJ12
24,25,26 ICH_SMBCLK ICH_SMBDATA SMBCLK SATA0GP/GPIO21
24,25,26 ICH_SMBDATA AD19 SMBDATA SATA1GP/GPIO19 AJ10
Clocks SATA
GPIO
ICH_CL_RST1# AG21 AF11 CLK_ICH_14M
SMB
ICH_CL_RST1# AMT_SMBCLK LINKALERT# SATA2GP/GPIO36
AC17 SMLINK0 SATA3GP/GPIO37 AG11
1
T58 PAD AMT_SMBDAT AE19 40
SMLINK1 CLK_ICH_14M
CLK14 AG9 CLK_ICH_14M 17
+3.3V_RUN ICH_RI# AF17 G5 CLK_ICH_48M R94
T63 PAD RI# CLK48 CLK_ICH_48M 17
33_0402
T76 PAD RSV_LPCPD# F4 D3 ICH_SUSCLK
PAD T25
1 2
SUS_STAT#/LPCPD# SUSCLK
2
3,29 ITP_DBRESET# AD15 SYS_RESET#

SLP_S3# AG23 SIO_SLP_S3# 28
R88 AG12 AF21 C93
6 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# PAD T53
8.2K_0402 AD18 4.7P/50V/0402
SIO_SLP_S5# 28
2
LOM_SMB_ALERT# SLP_S5#
28 LOM_SMB_ALERT# AG22
1
CLKRUN# SMBALERT#/GPIO11 SIO_S4_STATE#

S4_STATE#/GPIO26 AH27 PAD T16
17 H_STP_PCI# AE20
GPIO
STP_PCI#/GPIO15
1
AG18 AE23 ICH_PWRGD
SYS
17 H_STP_CPU# STP_CPU#/GPIO25 PWROK ICH_PWRGD 6,38
B R73 CLKRUN# AH11 AJ14 DPRSLPVR B
Power MGT
20,28,35 CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 DPRSLPVR 6,45
10_0402_NC
ICH_PCIE_WAKE# AE17 AE21 ICH_BATLOW# 2 1 +3.3V_SUS
29 ICH_PCIE_WAKE#
2
IRQ_SERIRQ WAKE# BATLOW# R336 8.2K_0402 ICH_PWRGD R314 2

20,28 IRQ_SERIRQ AF12 SERIRQ 1 10K_0402
T48 PAD RSV_THRM# AC13 C2
THRM# PWRBTN# SIO_PWRBTN# 28
Option to " Disable " DPRSLPVR R69 1 2 100K_0402
clkrun. Pulling it down IMVP_PWRGD AJ20 AH20 ICH_LAN_RST#
28,38,45 IMVP_PWRGD VRMPWRGD LAN_RST# ICH_LAN_RST#
WOL_EN R329 1 2 100K_0402
will keep the clks AJ22 AG27 ICH_RSMRST#
T13 PAD TP7 RSMRST# ICH_RSMRST# 28
running. ICH_RSMRST# R100 2 1 10K_0402
USB_IDE# AJ8 E1
TACH1/GPIO1 CK_PWRGD CLK_PWRGD 17
T5 PAD RSVD_GPIO6 AJ9 ICH_LAN_RST# R89 2 1 1M_0402
SIO_EXT_WAKE# TACH2/GPIO6 ICH_CL_PWROK
29 SIO_EXT_WAKE# AH9 TACH3/GPIO7 CLPWROK E3 ICH_CL_PWROK 6,28
SIO_EXT_SMI# ICH_CL_PWROK R187 2 1 1M_0402
30
28 SIO_EXT_SMI#
SIO_EXT_SCI#
AE16
AC19
GPIO8
AJ25 RSV_SIO_SLP_M# Non-iAMT
28 SIO_EXT_SCI# GPIO12 SLP_M# PAD T11
PCIE_MCARD1_DET# AG8
24 PCIE_MCARD1_DET# TACH0/GPIO17
USB_MCARD1_R_DET# AH12 F23
Controller Link
24 USB_MCARD1_DET# GPIO18 CL_CLK0 CL_CLK0 6
R577 29 AE11 AE18 RSV_ICH_CL_CLK1
GPIO
T54 PAD GPIO20 CL_CLK1 PAD T60
4.7K_0402 USB_MCARD2_DET# AG10
25 USB_MCARD2_DET# SCLOCK/GPIO22
USB_MCARD3_DET# AH25 F22
24 USB_MCARD3_DET# QRT_STATE0/GPIO27 CL_DATA0 CL_DATA0 6
AD16 AF19 RSV_ICH_CL_DATA1
23 IDE_RST_MOD# QRT_STATE1/GPIO28 CL_DATA1 PAD T52
17 SATA_CLKREQ# AG13 SATACLKREQ#/GPIO35
T50 PAD RSVD_GPIO38 AF9 D24 CL_VREF0
WPAN_RADIO_DIS_MINI# AJ11 SLOAD/GPIO38 CL_VREF0 CL_VREF1
24 WPAN_RADIO_DIS_MINI# SDATAOUT0/GPIO39 CL_VREF1 AH23 PAD T3
33 CCD_VDD_ON CCD_VDD_ON AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 ICH_CL_RST0# 6
SPKR AD9
32 SPKR SPKR
AJ27 PCIE_MCARD3_DET#
MISC
MEM_LED/GPIO24 PCIE_MCARD3_DET# 24
R87 2 1 MCH_ICH_SYNC#_R AJ13 AJ24
6 MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10 PAD T12
0_0402 AF22
C EC_ME_ALERT/GPIO14 PAD T10 C
+3.3V_RUN AJ21 AG19 WOL_EN
11 ICH_RSVD TP3 WOL_EN/GPIO9 PAD T56
ICH8M ES2
1 2WPAN_RADIO_DIS_MINI#
R558 100K_0402 R92 2 1 8.2K_0402 +3.3V_SUS
+3.3V_RUN +3.3V_ALW
Non-iAMT
2
+3.3V_RUN +3.3V_RUN +3.3V_RUN
Non-iAMT R380 R52
SMbus address D2 3.24K/F_0402 3.24K/F_0402_NC
2
2 1 IMVP_PWRGD 2
R78 2.2K_0402_NC 4
1
R74 These are for
1K_0402_NC backdrive issue. RP22 CL_VREF0 CL_VREF1
4P2R-2.2K
1
SPKR
2
1
+3.3V_RUN R60
1
3
1
Q24 C437 C73 453/F_0402_NC
R315 2 1 10K_0402 RSV_THRM# No Reboot strap. 3 1 .1U/10V/0402 R381 .1U/10V/0402_NC
24,25,26 ICH_SMBDATA MEM_SDATA 15
R44 2 1 10K_0402_NC MCH_ICH_SYNC#_R 453/F_0402
2
R45 2 1 10K_0402 IRQ_SERIRQ Low = Default.
2
SPKR High = No Reboot. 2N7002W-7-F
R47 2 1 10K_0402 RSVD_GPIO6
R46 2 1 10K_0402 RSVD_GPIO38 +3.3V_RUN
R316 2 1 100K_0402_NCCCD_VDD_ON
2
D +3.3V_RUN Q25 D
24,25,26 ICH_SMBCLK 3 1 MEM_SCLK 15

2
R333
2N7002W-7-F QUANTA
8.2K_0402
COMPUTER
1
+3.3V_SUS USB_IDE# Title

ICH8-M (PM,GPIO,SMB,CL)
2 1 SIO_EXT_SMI#
R68 10K_0402 Size Document Number Rev
R132 2 1 10K_0402 LOM_SMB_ALERT# C & G UMA 2A
Date: Tuesday, January 23, 2007 Sheet 13 of 60

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+RTC_CELL U11E
+1.05V_VCCP
A23 VSS[001] VSS[099] K7
2
A5 VSS[002] VSS[100] L1
2
C98 C74 C84 AA2 L13
1U/10V/0603 .1U/10V/0402 .1U/10V/0402 C423 C420 VSS[003] VSS[101]
AA7 L15
1
U11F .1U/10V/0402 .1U/10V/0402 +1.05V_VCCP +1.5V_RUN VSS[004] VSS[102]
34 A25 L26
1
D14 VSS[005] VSS[103]
+5V_RUN 1 2 AD25 VCCRTC VCC1_05[01] A13 AB1 VSS[006] VSS[104] L27
R205 10_0402 B13 1 AB24 L4
VCC1_05[02] VSS[007] VSS[105]
A16 V5REF[1] VCC1_05[03] C13 AC11 VSS[008] VSS[106] L5
2 1 +ICH_V5REF_RUN T7 C14 3 1 2 AC14 M12
+3.3V_RUN V5REF[2] VCC1_05[04] VSS[009] VSS[107]
D13 D14 R221 10_0805 AC25 M13
VCC1_05[05] VSS[010] VSS[108]
2
SDMK0340L-7-F G4 E14 2 AC26 M14
C211 V5REF_SUS VCC1_05[06] VSS[011] VSS[109]
A VCC1_05[07] F14 AC27 VSS[012] VSS[110] M15 A
.1U/10V/0402 AA25 G14 BAT54C AD17 M16
1
VCC1_5_B[01] VCC1_05[08] VSS[013] VSS[111]
Non-iAMT AA26
AA27
VCC1_5_B[02] VCC1_05[09] L11
L12
AD20
AD28
VSS[014] VSS[112] M17
M23
VCC1_5_B[03] VCC1_05[10] VSS[015] VSS[113]
+5V_SUS 1 2 AB27 VCC1_5_B[04] VCC1_05[11] L14 AD29 VSS[016] VSS[114] M28
R151 10_0402 AB28 L16 AD3 M29
VCC1_5_B[05] VCC1_05[12] VSS[017] VSS[115]
AB29 VCC1_5_B[06] VCC1_05[13] L17 AD4 VSS[018] VSS[116] M3
2 1 +ICH_V5REF_SUS D28 L18 AD6 N1
+3.3V_SUS D12 VCC1_5_B[07] VCC1_05[14] VSS[019] VSS[117]
D29 VCC1_5_B[08] VCC1_05[15] M11 AE1 VSS[020] VSS[118] N11
2
CORE
SDMK0340L-7-F E25 M18 AE12 N12
C170 VCC1_5_B[09] VCC1_05[16] VSS[021] VSS[119]
E26 VCC1_5_B[10] VCC1_05[17] P11 1uH+-20%_800mA AE2 VSS[022] VSS[120] N13
.1U/10V/0402 E27 P18 41 AE22 N14
1
VCC1_5_B[11] VCC1_05[18] L21 +1.5V_RUN VSS[023] VSS[121]

F24 VCC1_5_B[12] VCC1_05[19] T11 AD1 VSS[024] VSS[122] N15
F25 T18 1uH_800MA AE25 N16
VCC1_5_B[13] VCC1_05[20] +1.5V_DMIPLL VSS[025] VSS[123]
G24 VCC1_5_B[14] VCC1_05[21] U11 2 1+1.5V_DMIPLL_R 2 1 AE5 VSS[026] VSS[124] N17
H23 U18 R149 1_0603 AE6 N18
VCC1_5_B[15] VCC1_05[22] VSS[027] VSS[125]
H24 VCC1_5_B[16] VCC1_05[23] V11 AE9 VSS[028] VSS[126] N26
2
J23 VCC1_5_B[17] VCC1_05[24] V12 AF14 VSS[029] VSS[127] N27
J24 V14 C151 C152 AF16 N4
VCC1_5_B[18] VCC1_05[25] .01U/25V/0402 10U/6.3V/0805 VSS[030] VSS[128]
K24 V16 AF18 N5
1
VCC1_5_B[19] VCC1_05[26] VSS[031] VSS[129]
K25 VCC1_5_B[20] VCC1_05[27] V17 AF3 VSS[032] VSS[130] N6
+1.5V_RUN L23 V18 AF4 P12
VCC1_5_B[21] VCC1_05[28] VSS[033] VSS[131]
L24 VCC1_5_B[22] AG5 VSS[034] VSS[132] P13
VCCA3GP
L25 VCC1_5_B[23] VCCDMIPLL R29 AG6 VSS[035] VSS[133] P14
1
M24 VCC1_5_B[24] AH10 VSS[036] VSS[134] P15

FB_330ohm+-25%_100mHz_ M25 AE28 +VCC_DMI +1.25V_RUN AH13 P16
L17 VCC1_5_B[25] VCC_DMI[1] VSS[037] VSS[135]
N23 AE29 AH16 P17
1.5A_0.09 ohm DC VCC1_5_B[26] VCC_DMI[2] VSS[038] VSS[136]
1
BLM21PG331SN1D N24 AH19 P23
VCC1_5_B[27] +V_CPU_IO C120 C119 VSS[039] VSS[137]
N25 VCC1_5_B[28] V_CPU_IO[1] AC23 AH2 VSS[040] VSS[138] P28
+1.5V_PCIE_ICH P24 AC24 .1U/10V/0402 22U/10V/1206 AF28 P29
2
2
VCC1_5_B[29] V_CPU_IO[2] +1.05V_VCCP VSS[041] VSS[139]
B P25 VCC1_5_B[30] AH22 VSS[042] VSS[140] R11 B
R24 VCC1_5_B[31] VCC3_3[01] AF29 +3.3V_RUN AH24 VSS[043] VSS[141] R12
R25 +V_CPU_IO AH26 R13
VCC1_5_B[32] VSS[044] VSS[142]
1
R26 VCC1_5_B[33] VCC3_3[02] AD2 AH3 VSS[045] VSS[143] R14

1
+ R27 VCC1_5_B[34] AH4 VSS[046] VSS[144] R15
1
C136 C427 C421 T23 AC8 C212 C409 C412 AH8 R16
C140 22U/10V/1206 22U/10V/1206 2.2U/6.3V/0603 VCC1_5_B[35] VCC3_3[03] C397 C90 .1U/10V/0402 .1U/10V/0402 4.7U/6.3V/0603 VSS[047] VSS[145]
T24 AD8 AJ5 R17
2
VCC1_5_B[36] VCC3_3[04] VSS[048] VSS[146]
VCCP_CORE
220U/2.5V/7343 T27 AE8 .1U/10V/0402 .1U/10V/0402 B11 R18
2
VCC1_5_B[37] VCC3_3[05] VSS[049] VSS[147]
T28 VCC1_5_B[38] VCC3_3[06] AF8 B14 VSS[050] VSS[148] R28
T29 VCC1_5_B[39] B17 VSS[051] VSS[149] R4
U24 VCC1_5_B[40] VCC3_3[07] AA3 B2 VSS[052] VSS[150] T12
U25 VCC1_5_B[41] VCC3_3[08] U7 B20 VSS[053] VSS[151] T13
V23 VCC1_5_B[42] VCC3_3[09] V7 B22 VSS[054] VSS[152] T14
2
V24 VCC1_5_B[43] VCC3_3[10] W1 B8 VSS[055] VSS[153] T15
V25 W6 C213 C24 T16
IDE
+1.5V_RUN VCC1_5_B[44] VCC3_3[11] .1U/10V/0402 VSS[056] VSS[154]

W25 W7 C26 T17
1
VCC1_5_B[45] VCC3_3[12] VSS[057] VSS[155]
Y25 VCC1_5_B[46] VCC3_3[13] Y7 C27 VSS[058] VSS[156] T2
C6 VSS[059] VSS[157] U12
1
+VCCSATPLL AJ6 A8 D12 U13

R75 VCCSATAPLL VCC3_3[14] VSS[060] VSS[158]
VCC3_3[15] B15 D15 VSS[061] VSS[159] U14
0_0402 +1.5V_RUN AE7 B18 D18 U15
VCC1_5_A[01] VCC3_3[16] VSS[062] VSS[160]
2
AF7 VCC1_5_A[02] VCC3_3[17] B4 D2 VSS[063] VSS[161] U16
ARX
AG7 B9 C89 C461 C139 D4 U17

1 2
VCC1_5_A[03] VCC3_3[18] VSS[064] VSS[162]

1
+VCCSATPLL_L AH7 C15 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 E21 U23
1
C135 VCC1_5_A[04] VCC3_3[19] VSS[065] VSS[163]
AJ7 D13 E24 U26
PCI
L10 1U/10V/0603 VCC1_5_A[05] VCC3_3[20] VSS[066] VSS[164]

D5 E4 U27
2
10uH/100MA VCC3_3[21] VSS[067] VSS[165]

AC1 VCC1_5_A[06] VCC3_3[22] E10 E9 VSS[068] VSS[166] U3
10uH+-20%_100mA AC2 VCC1_5_A[07] VCC3_3[23] E7
+3.3V_SUS +3.3V_RUN
F15 VSS[069] VSS[167] U5
ATX
AC3
AC4
VCC1_5_A[08] VCC3_3[24] F11 Non-iAMT E23
F28
VSS[070] VSS[168] V13
V15
2
C
+VCCSATPLL VCC1_5_A[09] VSS[071] VSS[169] C
+1.5V_RUN AC5 VCC1_5_A[10] VCCHDA AC12 F29 VSS[072] VSS[170] V28
F7 VSS[073] VSS[171] V29
1
AC10 VCC1_5_A[11] VCCSUSHDA AD11 G1 VSS[074] VSS[172] W2
2
C82 C72 C138 AC9 E2 W26
VCC1_5_A[12] VSS[075] VSS[173]
2
1U/10V/0603 10U/6.3V/0805 1U/10V/0603 J6 TP_VCCSUS1.05_1 C403 G10 W27
2
VCCSUS1_05[1] TP_VCCSUS1.05_2 PAD T72 C418 .1U/10V/0402 VSS[076] VSS[174]

AA5 AF20 G13 Y28
1
VCC1_5_A[13] VCCSUS1_05[2] PAD T57 .1U/10V/0402 VSS[077] VSS[175]
AA6 G19 Y29
1
VCC1_5_A[14] TP_VCCSUS1.5_1 VSS[078] VSS[176]
VCCSUS1_5[1] AC16 PAD T65 G23 VSS[079] VSS[177] Y4
G12 VCC1_5_A[15] G25 VSS[080] VSS[178] AB4
TP_VCCSUS1.5_2 +3.3V_SUS
G17
H7
VCC1_5_A[16] VCCSUS1_5[2] J7 PAD T70 Non-iAMT G26
G27
VSS[081] VSS[179] AB23
AB5
VCC1_5_A[17] +VCCSUS3_3[0~6] VSS[082] VSS[180]
VCCSUS3_3[01] C3 H25 VSS[083] VSS[181] AB6
AC7 VCC1_5_A[18] H28 VSS[084] VSS[182] AD5
1
+1.5V_RUN AD7 AC18 C111 H29 U4
VCC1_5_A[19] VCCSUS3_3[02] C149 .022U/16V/0603 VSS[085] VSS[183]
VCCSUS3_3[03] AC21 H3 VSS[086] VSS[184] W24
D1 AC22 .022U/16V/0603 H6
2
VCCUSBPLL VCCSUS3_3[04] VSS[087]
VCCPSUS
VCCSUS3_3[05] AG20 J1 VSS[088] VSS_NCTF[01] A1

+1.5V_RUN F1 VCC1_5_A[20] VCCSUS3_3[06] AH28 J25 VSS[089] VSS_NCTF[02] A2
USB CORE
Non-iAMT L6 VCC1_5_A[21] J26 VSS[090] VSS_NCTF[03] A28

2
L7 VCC1_5_A[22] VCCSUS3_3[07] P6 J27 VSS[091] VSS_NCTF[04] A29

Place C929 C404 C91 M6 P7 J4 AH1
.1U/10V/0402 .1U/10V/0402 VCC1_5_A[23] VCCSUS3_3[08] VSS[092] VSS_NCTF[05]
close to A24. M7 C1 J5 AH29
1
VCC1_5_A[24] VCCSUS3_3[09] +VCCSUS3_3[7~19] VSS[093] VSS_NCTF[06]

VCCSUS3_3[10] N7 K23 VSS[094] VSS_NCTF[07] AJ1
W23 VCC1_5_A[25] VCCSUS3_3[11] P1 K28 VSS[095] VSS_NCTF[08] AJ2
1
+1.5V_RUN P2 C405 K29 AJ28
TP_VCCSUSLAN1 F17 VCCSUS3_3[12] .1U/10V/0402 VSS[096] VSS_NCTF[09]
Non-iAMT T75 PAD VCCLAN1_05[1] VCCSUS3_3[13] P3 K3 VSS[097] VSS_NCTF[10] AJ29
VCCPUSB
TP_VCCSUSLAN2 G18 P4 K6 B1
2
T71 PAD VCCLAN1_05[2] VCCSUS3_3[14] VSS[098] VSS_NCTF[11]
VCCSUS3_3[15] P5 VSS_NCTF[12] B29
+VCCGLANPLL +3.3V_RUN F19 R1
VCCLAN3_3[1] VCCSUS3_3[16] ICH8M ES2
D G20 VCCLAN3_3[2] VCCSUS3_3[17] R3 D
2
11 VCCSUS3_3[18] R5
C482 C406 +VCCGLANPLL A24 R6
.1U/10V/0402 .1U/10V/0402 VCCGLANPLL VCCSUS3_3[19]
QUANTA
1
GLAN POWER
A26 G22 TP_VCCCL1.05

+1.5V_PCIE_ICH VCCGLAN1_5[1] VCCCL1_05 PAD T67
A27 VCCGLAN1_5[2]
B26 VCCGLAN1_5[3] VCCCL1_5 A22 +VCCCL1_5
COMPUTER
2
B27 C478
VCCGLAN1_5[4] C473 1U/10V/0603_NC Title
B28 VCCGLAN1_5[5] VCCCL3_3[1] F20 +3.3V_RUN
1
G21 .1U/10V/0402_NC ICH8-M (POWER,GND)

1
C416 VCCCL3_3[2]
4.7U/6.3V/0603
B25 VCCGLAN3_3 Non-iAMT Size Document Number Rev
2
ICH8M ES2 C & G UMA 2A

+3.3V_RUN
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
A is required to route to Top +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS

DDR_A_DM[0..7] 7
SoDIMM for AMTto function. DDR_A_D[0..63] 7 DDR_B_DM[0..7] 7
V_DDR_MCH_REF V_DDR_MCH_REF
Ch.A SODIMM needs to be
TOP DDR_A_DQS[0..7] 7 BOT DDR_B_D[0..63] 7
DDR_A_DQS#[0..7] 7 DDR_B_DQS[0..7] 7
populated for Intel AMT support. JDIM1 REV DDR_A_MA[0..14] 6,7,16
JDIM2 STD DDR_B_DQS#[0..7] 7
DDR_B_MA[0..14] 6,7,16
1 VREF VSS46 2 1 VREF VSS46 2
3 4 DDR_A_D1 V_DDR_MCH_REF 3 4 DDR_B_D0
DDR_A_D4 VSS47 DQ4 DDR_A_D0 DDR_B_D1 VSS47 DQ4 DDR_B_D4 V_DDR_MCH_REF
5 DQ0 DQ5 6 5 DQ0 DQ5 6
DDR_A_D5 7 8 DDR_B_D5 7 8
DQ1 VSS15 DDR_A_DM0 DQ1 VSS15 DDR_B_DM0
9 VSS37 DM0 10 9 VSS37 DM0 10
DDR_A_DQS#0 11 12 DDR_B_DQS#0 11 12
DQS#0 VSS5 DQS#0 VSS5
1
DDR_A_DQS0 13 14 DDR_A_D6 DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DQS0 DQ6
1
A A
15 16 DDR_A_D7 C602 C603 15 16 DDR_B_D7
DDR_A_D2 VSS48 DQ7 .1U/10V/0402 2.2U/6.3V/0603 DDR_B_D2 VSS48 DQ7 C607 C606
17 18 17 18
2
DDR_A_D3 DQ2 VSS16 DDR_A_D13 DDR_B_D3 DQ2 VSS16 DDR_B_D13 .1U/10V/0402 2.2U/6.3V/0603
19 20 19 20
2
DQ3 DQ12 DDR_A_D9 DQ3 DQ12 DDR_B_D12
21 VSS38 DQ13 22 21 VSS38 DQ13 22
DDR_A_D8 23 24 DDR_B_D9 23 24
DDR_A_D12 DQ8 VSS17 DDR_A_DM1 DDR_B_D8 DQ8 VSS17 DDR_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
DDR_A_DQS#1 29 30 DDR_B_DQS#1 29 30
DQS#1 CK0 M_CLK_DDR0 6 DQS#1 CK0 M_CLK_DDR2 6
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32
DQS1 CK0# M_CLK_DDR#0 6 DQS1 CK0# M_CLK_DDR#2 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D15 35 36 DDR_A_D10 DDR_B_D15 35 36 DDR_B_D10
DDR_A_D14 DQ10 DQ14 DDR_A_D11 DDR_B_D11 DQ10 DQ14 DDR_B_D14
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 VSS54 40 39 VSS50 VSS54 40
PC4800 DDR2 SDRAM
PC4800 DDR2 SDRAM

41 VSS18 VSS20 42 41 VSS18 VSS20 42
45 DQ17 DQ21 46 45 DQ17 DQ21 46
47 VSS1 VSS6 48 47 VSS1 VSS6 48
DDR_A_DQS#2 49 50 PM_EXTTS#0 PM_EXTTS#0 6 DDR_B_DQS#2 49 50 PM_EXTTS#1 PM_EXTTS#1 6
DDR_A_DQS2 DQS#2 NC3 DDR_A_DM2 DDR_B_DQS2 DQS#2 NC3 DDR_B_DM2
51 52 51 52
SO-DIMM (200P)
SO-DIMM (200P)
DQS2 DM2 DQS2 DM2
53 VSS19 VSS21 54 53 VSS19 VSS21 54
DDR_A_D23 55 56 DDR_A_D22 DDR_B_D18 55 56 DDR_B_D22 +1.8V_SUS Place these Caps near So-Dimm1.
57 DQ19 DQ23 58 57 DQ19 DQ23 58
59 VSS22 VSS24 60 59 VSS22 VSS24 60
DDR_A_D25 DQ24 DQ28 DDR_A_D29 DDR_B_D24 DQ24 DQ28 DDR_B_D29 C304 C310 C309
63 DQ25 DQ29 64 63 DQ25 DQ29 64
1
65 66 65 66 2.2U/6.3V/0603 2.2U/6.3V/0603 2.2U/6.3V/0603
DDR_A_DM3 VSS23 VSS25 DDR_A_DQS#3 DDR_B_DM3 VSS23 VSS25 DDR_B_DQS#3 C303 C311
67 DM3 DQS#3 68 67 DM3 DQS#3 68
69 70 DDR_A_DQS3 69 70 DDR_B_DQS3 2.2U/6.3V/0603 2.2U/6.3V/0603
2
NC4 DQS3 NC4 DQS3
B 71 VSS9 VSS10 72 71 VSS9 VSS10 72 B
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 VSS4 VSS8 78 77 VSS4 VSS8 78
79 80 79 80 +1.8V_SUS
6,16 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6,16 6,16 DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB 6,16
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84 Place these Caps near So-Dimm2.
DDR_A_BS2 85 86 DDR_A_MA14 DDR_B_BS2 85 86 DDR_B_MA14
7,16 DDR_A_BS2 A16_BA2 A14 7,16 DDR_B_BS2 A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11 C609 C611 C599
A12 A11 A12 A11
1
DDR_A_MA9 91 92 DDR_A_MA7 DDR_B_MA9 91 92 DDR_B_MA7 2.2U/6.3V/0603 2.2U/6.3V/0603 2.2U/6.3V/0603
DDR_A_MA8 A9 A7 DDR_A_MA6 DDR_B_MA8 A9 A7 DDR_B_MA6 C598 C610
93 A8 A6 94 93 A8 A6 94
95 96 95 96 2.2U/6.3V/0603 2.2U/6.3V/0603
2
DDR_A_MA5 VDD5 VDD4 DDR_A_MA4 DDR_B_MA5 VDD5 VDD4 DDR_B_MA4
97 A5 A4 98 97 A5 A4 98
DDR_A_MA3 99 100 DDR_A_MA2 DDR_B_MA3 99 100 DDR_B_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102 101 A1 A0 102
103 VDD10 VDD12 104 103 VDD10 VDD12 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_B_MA10 105 106 DDR_B_BS1
A10/AP BA1 DDR_A_BS1 7,16 A10/AP BA1 DDR_B_BS1 7,16
DDR_A_BS0 107 108 DDR_A_RAS# DDR_B_BS0 107 108 DDR_B_RAS# +1.8V_SUS
7,16 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 7,16 7,16 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 7,16
DDR_A_WE# 109 110 DDR_B_WE# 109 110 Place these Caps near So-Dimm1.
7,16 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 6,16 7,16 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 6,16
111 VDD2 VDD1 112 111 VDD2 VDD1 112
DDR_A_CAS# 113 114 M_ODT0 DDR_B_CAS# 113 114 M_ODT2
7,16 DDR_A_CAS# CAS# ODT0 M_ODT0 6,16 7,16 DDR_B_CAS# CAS# ODT0 M_ODT2 6,16
115 116 DDR_A_MA13 115 116 DDR_B_MA13 C308 C305
6,16 DDR_CS1_DIMMA# S1# A13 6,16 DDR_CS3_DIMMB# S1# A13
1
117 118 117 118 .1U/10V/0402 .1U/10V/0402
M_ODT1 VDD3 VDD6 M_ODT3 VDD3 VDD6 C306 C307
6,16 M_ODT1 119 ODT1 NC2 120 6,16 M_ODT3 119 ODT1 NC2 120
121 122 121 122 .1U/10V/0402 .1U/10V/0402
2
DDR_A_D32 VSS11 VSS12 DDR_A_D36 DDR_B_D32 VSS11 VSS12 DDR_B_D37
123 DQ32 DQ36 124 123 DQ32 DQ36 124
DQ33 DQ37 DQ33 DQ37
127 VSS26 VSS28 128 127 VSS26 VSS28 128
DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_B_DQS#4 129 130 DDR_B_DM4 +1.8V_SUS
C
DDR_A_DQS4 DQS#4 DM4 DDR_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132 Place these Caps near So-Dimm2.
133 134 DDR_A_D34 133 134 DDR_B_D38
DDR_A_D35 VSS2 DQ38 DDR_A_D39 DDR_B_D34 VSS2 DQ38 DDR_B_D35
135 DQ34 DQ39 136 135 DQ34 DQ39 136
DDR_A_D38 +3.3V_RUN DDR_B_D39 C597 C601
137 DQ35 VSS55 138 Non-iAMT 137 DQ35 VSS55 138
1
139 140 DDR_A_D40 139 140 DDR_B_D45 .1U/10V/0402 .1U/10V/0402
DDR_A_D44 VSS27 DQ44 DDR_A_D41 DDR_B_D41 VSS27 DQ44 DDR_B_D44 C608 C600
141 DQ40 DQ45 142 141 DQ40 DQ45 142
DDR_A_D45 143 144 DDR_B_D40 143 144 .1U/10V/0402 .1U/10V/0402
2
DQ41 VSS43 DQ41 VSS43
1
145 146 DDR_A_DQS#5 145 146 DDR_B_DQS#5

DDR_A_DM5 VSS29 DQS#5 DDR_A_DQS5 C605 C604 DDR_B_DM5 VSS29 DQS#5 DDR_B_DQS5
147 DM5 DQS5 148 147 DM5 DQS5 148
149 150 2.2U/6.3V/0603 .1U/10V/0402 149 150
2
DDR_A_D42 VSS51 VSS56 DDR_A_D43 DDR_B_D47 VSS51 VSS56 DDR_B_D43

151 DQ42 DQ46 152 151 DQ42 DQ46 152
DQ43 DQ47 DQ43 DQ47
155 VSS40 VSS44 156 155 VSS40 VSS44 156
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 NCTEST CK1 164 M_CLK_DDR1 6 163 NCTEST CK1 164 M_CLK_DDR3 6
165 VSS30 CK1# 166 M_CLK_DDR#1 6 165 VSS30 CK1# 166 M_CLK_DDR#3 6
DDR_A_DQS#6 DDR_B_DQS#6 +3.3V_RUN
DDR_A_DQS6
167
169
DQS#6 VSS45 168
170 DDR_A_DM6 DDR_B_DQS6
167
169
DQS#6 VSS45 168
170 DDR_B_DM6 Non-iAMT
DQS6 DM6 DQS6 DM6
171 VSS31 VSS32 172 171 VSS31 VSS32 172
DQ50 DQ54 DQ50 DQ54
1
DQ51 DQ55 DQ51 DQ55 C295 C302
177 VSS33 VSS35 178 177 VSS33 VSS35 178
DDR_A_D56 179 180 DDR_A_D61 DDR_B_D61 179 180 DDR_B_D57 2.2U/6.3V/0603 .1U/10V/0402
2
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 VSS3 VSS7 184 183 VSS3 VSS7 184
DDR_A_DM7 185 186 DDR_A_DQS#7 DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS#7 DDR_A_DQS7 DM7 DQS#7 DDR_B_DQS7
D DDR_A_D62
187
189
VSS34 DQS7 188
190 DDR_B_D59
187
189
VSS34 DQS7 188
190
Non-iAMT D
DDR_A_D59 DQ58 VSS36 DDR_A_D63 DDR_B_D62 DQ58 VSS36 DDR_B_D58
191
193
DQ59 DQ62 192
194 DDR_A_D58 Non-iAMT 191
193
DQ59 DQ62 192
194 DDR_B_D63
MEM_SDATA VSS14 DQ63 MEM_SDATA VSS14 DQ63 +3.3V_RUN
13
13
MEM_SDATA
MEM_SCLK
MEM_SCLK
195
197
199
SDA
SCL
VSS13
SA0
196
198
200
MEM_SCLK
195
197
199
SDA
SCL
VSS13
SA0
196
198
200 2 1
QUANTA
+3.3V_RUN VDD(SPD) SA1 +3.3V_RUN VDD(SPD) SA1 R490 10K_0402
COMPUTER
2
FOX_ AS0A426-N2RN-7F FOX_ AS0A426-N2SN-7F

R264 R491 Title
SMbus address A0 R263 10K_0402
SMbus address A4 10K_0402 DDR2 SO-DIMM (200P) X 2
Non-iAMT CLOCK 0,1 10K_0402 CLOCK 2,3
CKE 0,1 CKE 2,3
1
C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
TOP
+0.9V_DDR_VTT Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
A A
C613 C614 C616 C618 C287 C292 C289
1
.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402
C612 C615 C617 C290 C293 C291 C301
.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402
2
+0.9V_DDR_VTT BOT
1 C313 C288 C314 C316 C296 C298 C300
1
.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402
C317 C312 C315 C297 C294 C299 C318
.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402
2
2
B B
+0.9V_DDR_VTT
6,7,15 DDR_A_MA[0..14] DDR_B_MA[0..14] 6,7,15
RP34 RP43
DDR_A_MA7 2 1 1 2 DDR_B_MA7
4P2R-S-56 4P2R-S-56
RP31 RP42
4P2R-S-56 4P2R-S-56
RP33 RP40
7,15 DDR_A_RAS# DDR_A_RAS# 2 1 1 2 DDR_B_RAS#
DDR_B_RAS# 7,15
7,15 DDR_A_BS1 DDR_A_BS1 4 3 3 4 DDR_B_BS1
DDR_B_BS1 7,15
4P2R-S-56 4P2R-S-56
RP32 RP39
M_ODT0 4 3 3 4 M_ODT2
6,15 M_ODT0 M_ODT2 6,15
4P2R-S-56 4P2R-S-56
RP25 RP46
7,15 DDR_A_BS2 DDR_A_BS2 2 1 1 2 DDR_B_MA3
4P2R-S-56 4P2R-S-56
RP27 RP48
C C
Please these resistor DDR_A_MA9 2 1 1 2 DDR_B_MA12 Please these resistor
closely DIMMA,all DDR_A_MA8 4 3 3 4 DDR_B_MA9 closely DIMMB,all
trace length<750 mil. 4P2R-S-56 4P2R-S-56 trace length<750 mil.
RP29 RP47
4P2R-S-56 4P2R-S-56
RP26 RP45
DDR_A_BS0 4 3 3 4 DDR_B_BS0
7,15 DDR_A_BS0 DDR_B_BS0 7,15
4P2R-S-56 4P2R-S-56
RP28 RP44
DDR_A_WE# 2 1 1 2 DDR_B_WE#
7,15 DDR_A_WE# DDR_B_WE# 7,15
DDR_A_CAS# 4 3 3 4 DDR_B_CAS#
7,15 DDR_A_CAS# DDR_B_CAS# 7,15
4P2R-S-56 4P2R-S-56
RP30 RP41
4P2R-S-56 4P2R-S-56
R259 1 2 56_0402 R492 2 1 56_0402
6,15 M_ODT1 M_ODT3 6,15
DDR_A_MA1 R258 1 2 56_0402 R495 2 1 56_0402
DDR_B_BS2 7,15
R265 1 2 56_0402 R488 2 1 56_0402
6,15 DDR_CS0_DIMMA# DDR_CS2_DIMMB# 6,15
R262 1 2 56_0402 R493 2 1 56_0402
6,15 DDR_CS1_DIMMA# DDR_CS3_DIMMB# 6,15
R260 1 2 56_0402 R494 2 1 56_0402
6,15 DDR_CKE0_DIMMA DDR_CKE2_DIMMB 6,15
D R266 1 2 56_0402 R261 2 1 56_0402 D
6,15 DDR_CKE1_DIMMA DDR_CKE3_DIMMB 6,15
DDR_A_MA14 R267 1 2 56_0402 R489 2 1 DDR_B_MA14
56_0402
QUANTA
Title
COMPUTER
DDR2 RES ARRAY

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
TH25 TH24
H-RE87X16DR87X16P2
H-RE16X87DR16X87P2
Y2
CLK_XTAL_IN 1 2 CLK_XTAL_OUT +3.3V_RUN
CLK_3GPLLREQ# R32 10K_0402

14.318MHZ
1
SATA_CLKREQ# R309 10K_0402
1
C101 C100 CARD_CLK_REQ# R31 10K_0402
Non-iAMT 27P/50V/0402 27P/50V/0402 MINI1CLK_REQ# R324 10K_0402
2
MINI2CLK_REQ# R323 10K_0402
+3.3V_RUN +3.3V_RUN MINI3CLK_REQ# R105 10K_0402
A 14.318MHz A
PGMODE
R312 R310 10K_0402_NC
10K_0402_NC R326 CLK_ICH_48M Populate for Napa platforms only.
10K_0402_NC CLK_ICH_14M U5
CLK_PCI_5025 1 7 +CK_VDD_A
FSA PCI_LOM VDD_SRC_01 VDDA
53 40 49 VDD_SRC_02 VSSA 8
2
36
C71 C395 C113
54
65
VDD_SRC_03
VDD_SRC_04
CK505 PCI_STP# 25 H_STP_PCI# 13
R317 22P/50V/0402_NC 1P/50V/0402 1P/50V/0402 24 H_STP_CPU# 13
1
R327 +CK_VDD_MAIN2 CPU_STP#
10K_0402_NC 30 VDD_PCI_01
10K_0402 39 38 36 11 MCH_BCLK 4 3 RP11
VDD_PCI_02 CPUT1_MCH CLK_MCH_BCLK 5
2
37 10 MCH_BCLK# 2 1 4P2R-S-33
CPUC1_MCH CLK_MCH_BCLK# 5
0=UMA C108 C104 C116 +CK_VDD_MAIN 12 VDD_CPU CPU_BCLK
10P/50V/0402 4.7P/50V/0402 10P/50V/0402 14 4 3 RP14 CLK_CPU_BCLK 3
1
1
CLK_PCI_PCCARD +CK_VDD_48 CPUT0 CPU_BCLK#
1 = Disc. GRFX down 40 VDD_48 CPUC0 13 2 1 4P2R-S-33 CLK_CPU_BCLK# 3
CLK_PCI_LOM
CLK_PCI_ICH +CK_VDD_REF 18 6 CPU_ITP 4 3 RP9
VDD_REF CPUT2_ITP/SRCT_10 CLK_CPU_ITP 3
Place those close U44 within 20mils 5 CPU_ITP# 2 1 4P2R-S-33
+3.3V_RUN CPUC2_ITP/SRCC_10 CLK_CPU_ITP# 3
CLK_XTAL_IN
Non-iAMT 53 CLK_XTAL_OUT
20 XIN PGMODE R313 10K_0402_NC
Enable ITP CLK_ICH_48M R65 33/F_0402
19 XOUT PGMODE 9 +3.3V_RUN Non-iAMT
13 CLK_ICH_48M
3,6 CPU_MCH_BSEL0 1 2 R319 2.2K_0402 FSA 41 48M/FSA SRCT_9 3 PCIE_EXPCARD 4 3 RP8 CLK_PCIE_EXPCARD 26
10K_0402 L64 0_0603 FSB 45 2 PCIE_EXPCARD# 2 1 4P2R-S-33
3,6 CPU_MCH_BSEL1 FSB/TEST_MODE SRCC_9 CLK_PCIE_EXPCARD# 26
R321 R96 2.2K_0402 FSC 23 72
3,6 CPU_MCH_BSEL2 REF0/FSC_TEST_SEL CLKREQ9# CARD_CLK_REQ# 26
4 40 23 SRCT_8 70
CLK_ICH_14M 1 2 R95 33/F_0402 CLKREF 22 69 35
13 CLK_ICH_14M REF1 SRCC_8
B PCI_ICH L65 CX08T250000 36 71 B
CLK_PCI_5025 R97 51/F_0402 PCI_SIO CLKREQ8# PCIE_ICH
28 CLK_PCI_5025 27 PCI1 SRCT_7 66 2 1 RP3 CLK_PCIE_ICH 12
CLK_PCI_PCCARD R98 10/F_0402 PCI_PCCARD 32 67 PCIE_ICH# 4 3 4P2R-S-10
20 CLK_PCI_PCCARD PCI2/TME SRCC_7 CLK_PCIE_ICH# 12
37 33 PCI3 CLKREQ7# 38
+3.3V_RUN CLK_PCI_LOM R99 33/F_0402 PCI_LOM MCH_3GPLL 1 RP5
Non-iAMT 35 CLK_PCI_LOM 34 PCI4/FCTSEL1 SRCT_6 63 2 CLK_MCH_3GPLL 6
38 64 MCH_3GPLL# 4 3 4P2R-S-22
SRCC_6 CLK_MCH_3GPLL# 6
PCI_PCCARD 4 3 27M_NSS 43 62
6 MCH_DREFCLK DOT96T/27M_NSS CLKREQ6# CLK_3GPLLREQ# 6
R325 10K_0402
6 MCH_DREFCLK# 2 1 4P2R-S-33 27M_SS 44 DOT96C/27M_SS SRCT_5 60 PCIE_MINI2 2 1 RP4 CLK_PCIE_MINI2 24
RP13 61 PCIE_MINI2# 4 3 4P2R-S-33
SRCC_5 CLK_PCIE_MINI2# 24
CLK_PCI_ICH R81 27/F_0402 PCI_ICH 37 29 1 2
12 CLK_PCI_ICH PCIF0/ITP_SEL CLKREQ5# MINI2CLK_REQ# 24
39 58 R563 0_0402
SRCT_4
13 CLK_PWRGD 39 VTT_PWRDG#/PD(CKPWRGD/PD#) SRCC_4 59
CLKREQ4# 57
CLK_SCLK 16 55 PCIE_MINI1 2 1 RP6
SCLK SRCT_3 CLK_PCIE_MINI1 24
CLK_SDATA 17 56 PCIE_MINI1# 4 3 4P2R-S-33
SDATA SRCC_3 CLK_PCIE_MINI1# 24
CLKREQ3# 28 1 2 MINI1CLK_REQ# 24
PCIE_MINI3 R49 1 0_0402
4P2R-S-33
+3.3V_RUN UMA without iAMT 15
SRCT_2 52
53 PCIE_MINI3#
2
4 3 RP7
CLK_PCIE_MINI3 25
VSS_01 SRCC_2 CLK_PCIE_MINI3# 25
31 VSS_02 CLKREQ2# 26 1 2 MINI3CLK_REQ# 25
35 50 PCIE_SATA 2 R72 1 RP10 0_0402
VSS_03 SRCT_1/SATAT CLK_PCIE_SATA 11
L8 +CK_VDD_MAIN 21 51 PCIE_SATA# 4 3 4P2R-S-10
VSS_04 SRCC_1/SATAC CLK_PCIE_SATA# 11
BLM21PG600SN1D 4 46
VSS_05 CLKREQ1# SATA_CLKREQ# 13
120 ohms@100Mhz 42 VSS_06 37
68 47 DOT96_SSC 3 4 RP12
T-GND
VSS_07 SRCT_0/LCD100MT DREF_SSCLK 6
C64 C68 C37 C51 C36 C48 48 DOT96_SSC# 1 2 4P2R-S-33
SRCC_0/LCD100MC DREF_SSCLK# 6
.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 10U/6.3V/0805
CY28547LFXCT FSC FSB FSA CPU SRC PCI
79
C 1 0 1 100 100 33 C
+CK_VDD_A +3.3V_ALW +3.3V_RUN 0 0 1 133 100 33

R42 2.2_0402 Non-iAMT
SMbus address D2 0 1 1 166 100 33
2
4
C62 C63 0 1 0 200 100 33
.047U/10V/0402 4.7U/6.3V/0603 These are for
L14 +CK_VDD_MAIN2 backdrive issue. R101 RP15 0 0 0 266 100 33
BLM21PG600SN1D 2.2K_0402 4P2R-2.2K
120 ohms@100Mhz 1 0 0 333 100 33
1
3
C103 C105 C110 Q16 1 1 0 400 100 33
.1U/10V/0402 .1U/10V/0402 10U/6.3V/0805 3 1 CLK_SDATA
28 CKG_SMBDAT
1 1 1 RSVD 100 33
2N7002W-7-F
PCI_LOM = FCTSEL1
+CK_VDD_48 R80 0_0402_NC FCTSEL1 PIN43 PIN44 PIN47 PIN48
R320 2.2_0402
+3.3V_ALW +3.3V_RUN (PIN34)
C79 96/ 96/
C78 4.7U/6.3V/0603 0=UMA DOT96T DOT96C
.047U/10V/0402 100M_T 100M_C
R48 1 = Disc.
2.2K_0402
GRFX down 27Mout 27MSSout SRCT0 SRCC0
D D
2
+CK_VDD_REF
R322 1_0402 Q15
CLK_SCLK
C83
.047U/10V/0402
28 CKG_SMBCLK 3 1
QUANTA
2N7002W-7-F
Title
COMPUTER
CLOCK GENERATOR
R61 0_0402_NC
C & G UMA 2A

1 2 3 4 5 6 7 8
E D C B A
LCD_B_CLK-
J1
44 LCD_B_CLK- LCD_BCLK- R538
44 LCD_BCLK- 6
43 LCD_B_CLK+ R534 0_0402 LCD_BCLK+ 0_0402_NC
43 LCD_BCLK+ 6
42 R535 0_0402
42 LCD_B2-
41 41 LCD_B2- 6
+15V_ALW +3.3V_RUN +LCDVCC 40 LCD_B2+ LCD_B_CLK+
40 LCD_B2+ 6
Q8 39
SI3456BDV 39 LCD_B1- LCD_A_CLK-
38 38 LCD_B1- 6
6 37 LCD_B1+
37 LCD_B1+ 6
5 4 36 36
2 45 35 LCD_B0- R539
4 35 LCD_B0- 6 4
R24 1 5 34 LCD_B0+ 0_0402_NC
34 LCD_B0+ 6
330K_0402 33
R22 C28 33 LCD_A_CLK- LCD_ACLK-
32 LCD_ACLK- 6
3
100_0805 C26 .01U/25V/0402 32 LCD_A_CLK+ R537 0_0402 LCD_ACLK+ LCD_A_CLK+
31 31 LCD_ACLK+ 6
LCDVCC_ON 22U/10V/1206_NC 30 R536 0_0402
30 LCD_A2-
29 29 LCD_A2- 6
28 LCD_A2+
28 LCD_A2+ 6
27 27
C27 26 LCD_A1-
26 LCD_A1- 6
R25 .01U/25V/0402 25 LCD_A1+
25 LCD_A1+ 6
100K_0402_NC 24
24 LCD_A0- +LCDVCC +3.3V_RUN
23 23 LCD_A0- 6
22 LCD_A0+
22 LCD_A0+ 6
+3.3V_RUN +3.3V_ALW 21
21
3
20 LCD_DDCCLK
20 LCD_DDCCLK 6
2 2 19 LCD_DDCDAT
19 LCD_DDCDAT 6
Q5 18
18
1
Q7 2N7002W-7-F 17 C41 C40 C39

+3.3V_RUN
1
R21 R23 2N7002W-7-F 17 .1U/10V/0402 .047U/10V/0402 .1U/10V/0402
16 16
R15 47K_0402_NC 47K_0402 15
0_NC 15 +LCDVCC
14 14
1 2 13 LCD_TST 29
2
13
12 12
11 INV_PWR_SRC
D3 11
10 10
3
6 ENVDD 1 9 9 Adress : A9H --Contrast

8 BACKLITEON +5V_ALW
3 2
8
7
AAH --Backlight
Q6 7
6 6 LCD_SMBCLK 28
2 DTC124EUAT-106 5
28 LCDVCC_TST_EN 5 LCD_SMBDAT 28
4
1
BAT54C 4 C47
3 3 +5V_ALW
3 LAMP_STAT# C46 .1U/10V/0402 3
2 2 T1 PAD
1 C45 47P/50V/0402_NC
1 47P/50V/0402_NC
JAE_FI-TD44SB-E-R750
UMA +3.3V_RUN
Populate R614 for DPST
implementation only.
R39
10K_0402_NC
BACKLITEON Populate R74 for

6 BIA_PWM +PWR_SRC
R40
0_0402 platform without DPST
support. No Stuff for 40mil
Discrete DSPT support 40mil 4
6
5
due to back up plan. 2
1
Q13 C59 C61
3
R33 C60 SI3457BDV-T1-E3 .1U/50V/0603 .1U/50V/0603
100K_0402 .1U/50V/0603
2 2
R34
100K_0402
3
2 Q12
28,38,39 RUN_ON
2N7002W-7-F
1
1 1
QUANTA
Title
COMPUTER
LCD CONN

C & G UMA 2A

E D C B A
A B C D E
+5V_RUN
2
D23
Setting R,G,B treac SDM10K45-7-F
impedance to 50 ohm. L11
1
RED
6 VGA_RED
BLM18BB750SN1D
PAD T4 M_SEN#_R R318
L12 0_1206
GREEN Place D4,D5,D6 close
6 VGA_GRN
BLM18BB750SN1D JVGA1 to JVGA1 <200 mils
4 4
6
CRT_VCC_R
L15 11
BLUE 1
6 VGA_BLU
BLM18BB750SN1D 7
R58 C81 12 +3.3V_RUN
150/F_0402 22P/50V/0402_NC 2
R64 C118 C67 C112 C99 C77 8
R102 150/F_0402 22P/50V/0402_NC 22P/50V/0402_NC 10P/50V/0402_NC 10P/50V/0402_NC 10P/50V/0402_NC 13 1
150/F_0402 3
9 3 RED
D24
14
PAD T17 M_ID2# 4 2
10
+3.3V_RUN CRT_VCC 15 DA204U_NC
5
CRT_VCC
FOX_DZ11A91-ND219-9F
3
1
3
1
RP37 RP36 +3.3V_RUN
4P2R-2.2K 4P2R-2.2K
Q39
34 2N7002W-7-F 1
D27 SDM10K45-7-F
4
2
4
2
+5V_RUN 2 1 1 3 3 GREEN
6 G_DAT_DDC2 D25
R332 1K_0402 2
C399
2
.01U/25V/0402 +3.3V_RUN DA204U_NC
5
2
3 U24 3
2 4 VGAHSYNC_R 1 3
6 VGAHSYNC 6 G_CLK_DDC2
R328 10_0402
C394
74AHCT1G125GW 10P/50V/0402_NC +3.3V_RUN
C396 Q38 C393
.1U/10V/0402 Place near 2N7002W-7-F 10P/50V/0402_NC
U31 < 200 1
mil L13 3 BLUE
JVGA_HS D26
5
BLM11A05 2
U25
L16
DA204U_NC
2 4 VGAVSYNC_R JVGA_VS
6 VGAVSYNC
R335 10_0402 Place All of those BLM11A05
Inductors Caps close C87 C122 +3.3V_RUN
74AHCT1G125GW to JTV <200 mils 10P/50V/0402_NC 10P/50V/0402
C125 C107
10P/50V/0402_NC 10P/50V/0402 1
C4 22P/50V/0402_NC 3 SVIDEO_C
6 TV_C 2
L3
BLM18BD151SN1D Place near JVGA1 connector < D21
200 mil DA204U_NC
R5 C7 C1
150/F_0402 6P/50V/0402 6P/50V/0402 JTV1
2 2
3
SVIDEO_C 6 +3.3V_RUN
SVIDEO_CVBS 7
C6 22P/50V/0402_NC D22
5
2 1
6 TV_Y SVIDEO_Y 4
L5 1 3 SVIDEO_Y
BLM18BD151SN1D
2
R7 C9 C3 FOX_MH1177L-BG6N-7F
150/F_0402 6P/50V/0402 6P/50V/0402
DA204U_NC
+3.3V_RUN
C5 22P/50V/0402_NC
34 +3.3V_RUN
6 TV_CVBS
L4 R299
+5V_RUN BLM18BD151SN1D 47K_0603 1
R6 C8 C2 3 SVIDEO_CVBS
150/F_0402 6P/50V/0402 6P/50V/0402
C362 SP_DIF_E 2
.1U/10V/0402 2 1 R300 0_0805
R294 10K_0402 D20
Populate R878 & De-populate R877 DA204U_NC
R298 when component VIDEO is enable.
5
1 C366 0_0805_NC 1
300P_NC
2 4 SP_DIF SP_DIFB SP_DIFC SP_DIF_D

32 AUD_SPDIF_OUT
U21
R297 220_0603 C364 .01U/25V/0402 R295 0_0805 QUANTA
74AHCT1G125GW
COMPUTER
3
Add R454 pre

R293 ref Title
110_0603 schematic. CRT&TV CONN
1 2
R296 0_0603_NC Size Document Number Rev
C & G UMA 2A

A B C D E
A B C D E
+3.3V_R5C832
+3.3V_R5C832
1 +3.3V_R5C832 1
C474 C197 C196 C216 C195 C208
10U/6.3V/0805 .01U/25V/0402 .01U/25V/0402 .01U/25V/0402 .01U/25V/0402 .01U/25V/0402
+3.3V_RUN +3.3V_R5C832
Place the power caps close
U15B to the relation pins.
10 VCC_PCI1 VCC_3V 67 1 2
C247 C242 C236 C230 Place the power caps close 20 R451 0_0805
10U/6.3V/0805 .01U/25V/0402 .1U/10V/0402 .01U/25V/0402 VCC_PCI2
to the relation pins. 27 VCC_PCI3
32 VCC_PCI4
41 C263 C264
VCC_PCI5 .01U/25V/0402 10U/6.3V/0805
128 VCC_PCI6
61 VCC_RIN
16 VCC_ROUT1
34 VCC_ROUT2
64 VCC_ROUT3
114 VCC_ROUT4
C192 C217 C219 C258 120
.01U/25V/0402 .01U/25V/0402 .47U/10V/0603 .47U/10V/0603 VCC_ROUT5
VCC_MD 86
12,35 PCI_AD[31..0] GND1 4

GND2 13
PCI Bus PCI_AD31 125 22
PCI_AD30 AD31 GND3
126 AD30 GND4 28
PCI_AD29 127 54
2 PCI_AD28 AD29 GND5 2
PowerOnReset for VccCore 1 AD28 GND6 62
PCI_AD27 2 63
PCI_AD26 AD27 GND7
3 AD26 GND8 68
PCI_AD25 5 118
PCI_AD24 AD25 GND9
6 AD24 GND10 122
PCI_AD23 9
PCI_AD22 AD23
11 AD22
+3.3V_R5C832 PCI_AD21 12 99
PCI_AD20 AD21 AGND1 +3.3V_R5C832
14 AD20 AGND2 102
PCI_AD19 15 103
AD19 AGND3
1
PCI_AD18 17 107
PCI_AD17 AD18 AGND4
18 AD17 AGND5 111
2
R238 PCI_AD16 19
100K_0402 PCI_AD15 AD16 R455 +3.3V_R5C832 +3.3V_R5C832
36 AD15
PCI_AD14 37 10K_0402
2
PCI_AD13 AD14
38 AD13
PCI_AD12 39
1
AD12
1
PCI_AD11
PCI / OTHER
40 AD11
GBRST# should be asserted only C272 PCI_AD10 42 69
1U/10V/0603 PCI_AD9 AD10 HWSPND# R445 R444
43
when system power supply is on. PCI_AD8 44
AD9 10K_0402 100K_0402
PCI_AD7 AD8
46
2
PCI_AD6 AD7 Memory Stick Enable
47 AD6 MSEN 58
PCI_AD5 48
PCI_AD4 AD5
49 AD4 XDEN 55 XD Card Enable
PCI_AD3 50
PCI_AD2 AD3
PCI Bus 51 AD2 Serial ROM disable
PCI_AD1 52 57
PCI_AD0 AD1 UDIO5
53 AD0
12,35 PCI_PAR 33 SD Card Enable
PAR
12,35 PCI_C_BE3# 7 C/BE3# UDIO3 65 MMC Card Enable
12,35 PCI_C_BE2# 21 C/BE2# UDIO4 59
3 3
12,35 PCI_C_BE1# 35 C/BE1#
12,35 PCI_C_BE0# 45 C/BE0# UDIO2 56
PCI_AD17 1 2 8
R193 100_0402 IDSEL
UDIO1 60
12 PCI_REQ1# 124 REQ#
12 PCI_GNT1# 123 GNT# UDIO0/SRIRQ# 72 IRQ_SERIRQ 13,28
12,35 PCI_FRAME# 23 FRAME#
12,35 PCI_IRDY# 24 IRDY#
12,35 PCI_TRDY# 25 TRDY# PCI Bus
12,35 PCI_DEVSEL# 26 DEVSEL#
12,35 PCI_STOP# 29 115 PCI_PIRQD# 12
1394 Interrupt
STOP# INTA#
12,35 PCI_PERR# 30 PERR#
12,35 PCI_SERR# 31 116 PCI_PIRQC# 12
Media card Interrupt
SERR# INTB#
71 GBRST#
12,35 PCI_RST# 119 PCIRST#
17 CLK_PCI_PCCARD 121 PCICLK
29,35 SYS_PME# 2 1 70 PME# TEST 66 T36 PAD

R458 0_0402_NC
117 CLKRUN#
13,28,35 CLKRUN#
The ICH schematics need to include a
CoreLogic CLOCKRUN# pull-up resistor to implement CLKRUN#,
2
and the ICH schematics must have a

pull-down, or constantly drive thesignal R5C833T_V00
R242
low, in order to disable CLKRUN#. 100K_0402
33
1
CLK_PCI_PCCARD
4 Refer to DELL 4
1
37 M07 schematic
R198 X06
22_0402
QUANTA
1 2
C215
1P/50V/0402 Title
COMPUTER
2
5 IN 1 CONTROLLER

C & G UMA 2A

A B C D E
A B C D E
+3.3V_R5C832
80 mils
+3.3V_RUN_PHY
L30
BLM18PG181SN1D
1 modify 1
U15A C512 C228 C523 C255
10U/6.3V/0805 .1U/10V/0402 .01U/25V/0402 1000P/50V/0402
98 Place these caps as close to the U26 as possible.

AVCC_PHY1
AVCC_PHY2 106
AVCC_PHY3 110
AVCC_PHY4 112
AS CLOSE AS POSSIBLE TO R5C833

113 TPBIAS0
GUARD GND TPBIAS0 C229 .33U/16V/0603
1394_XI 94
C265 XI R212 R214
22P/50V/0402 56.2/F_0402 56.2/F_0402 C232 .01U/25V/0402
Y4
24.576MHz 104 TPB0N
TPBN0
1394_XO 1 2 95 105 TPB0P
C267 R236 0_0402 XO TPBP0
22P/50V/0402
IEEE1394/SD
Populate C266 for *TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible.

R5C832 chipset. 108 TPA0N *TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically.
TPAN0 *Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out).
RICOH_FILO 96 109 TPA0P
C266 FIL0 TPAP0
2 .01U/25V/0402_NC 2
31
RICOH_REXT101
R225 REXT
10K/F_0402 R220 R223 C237 270P/25V/0402
56.2/F_0402 56.2/F_0402
RICOH_VREF100
C525 VREF
.01U/25V/0402 R224 5.11K/F_0402
Circuit area : As small as possible.

Place these caps as close L25
to the U26 as possible. 87 XD_DATA7 DLW21HN121SQ2_NC
MDIO17 XD_DATA7 22
3 3 4 4 AS CLOSE AS POSSIBLE TO
92 XD_DATA6
MDIO16 XD_DATA6 22
XD_DATA5
2 2 1 1 1394 CONNECTOR.
MDIO15 89 XD_DATA5 22
CON2
91 XD_DATA4 FOX_UV31413-WSU0D-7F
MDIO14 XD_DATA4 22
90 SD/XD/MS_DATA3 TPB0N TPB0- 1
MDIO13 SD/XD/MS_DATA3 22 1
1
R197 0_0805
93 SD/XD/MS_DATA2 TPB0P TPB0+ 2
R194 0_0805
81 SD/XD/MS_DATA1 TPA0N TPA0- 3
R142 0_0805
82 SD/XD/MS_DATA0 TPA0P TPA0+ 4
R136 0_0805
5
6
7
8
75 XD_WP# 22
5
6
7
8
MDIO05
3 3 4 4
3 SD/XD/MS_CMD 3
MDIO08 88 SD/XD/MS_CMD 22
+3.3V_R5C832 2 2 1 1
MDIO19 83 XD_ALE 22
L20
85 DLW21HN121SQ2_NC
MDIO18 XD_CLE 22
2
MDIO02 78 XD_CE# 22
R245
SD_WP#(XDR/B#) 10K_0402_NC
MDIO03 77 SD_WP#(XDR/B#) 22
1
80 SD_CD# 2 1
MDIO00 D17 1SS355
SD_CD# 22 close to the Chip
XD_CDSW# 22
79 MS_INS# 2 1
MDIO01 D16 1SS355
MS_INS# 22
MDIO09 84 SD/XD/MS_CLK 22
MDIO04 76 MC_PWR_CTRL_0 22
MDIO06 74
T37 PAD
97 RSV
MDIO07 73
R5C833T_V00
33
4 4
QUANTA
Title
COMPUTER
IEEE 1394

C & G UMA 2A

A B C D E
A B C D E
+3.3V_RUN_CARD
+3.3V_RUN_CARD
+3.3V_RUN_CARD
C495 C526 C494 R414
.01U/25V/0402 .01U/25V/0402 .01U/25V/0402 150K_0402
1 1
CON6
1 22 SD/XD/MS_DATA2
SD_CD# SD(CD2/WP2/GND) MS-5(DATA2)
21 SD_CD# 2 SD(CD1) XD-9(GND) 23
SD_WP# 3 24
SD(WP1) MS-6(INS) MS_INS# 21
9 4 XD-18(VCC) SD-3(VSS1) 25
XD_DATA7 5 26 SD/XD/MS_DATA3
XD_DATA6 XD-17(D7) MS-7(DATA3) XD_WP#
6 XD-16(D6) XD-8(-WP) 27
XD_DATA5 7 28 2 1 SD/XD/MS_CLK
SD/XD/MS_DATA1 XD-15(D5) MS-8(SCLK) R430 0_0402 SD/XD/MS_CMD
8 SD-8(DAT1) SD-2(CMD) 29
XD_DATA4 9 30
SD/XD/MS_DATA0 XD-14(D4) MS-9(VCC) SD/XD/MS_CMD
10 SD-7(DAT0) XD-7(WE) 31
SD/XD/MS_DATA3 11 32
SD/XD/MS_DATA2 XD-13(D3) MS-10(VSS) SD/XD/MS_DATA3
12 XD-12(D2) SD-1(DAT3) 33
13 34 XD_ALE
SD-6(GND/VSS2) XD-6(ALE) SD/XD/MS_DATA2
14 MS-1(VSS) SD-9(DAT2) 35
SD/XD/MS_DATA1 15 36 XD_CLE
SD/XD/MS_CMD XD-11(D1) XD-5(CLE) XD_CE#
16 MS-2(BS) XD-4(CE) 37
SD/XD/MS_CLK 2 1 17 38 SD/XD/MS_CLK
SD/XD/MS_DATA1 R456 0_0402 SD-5(CLK) XD-3(RE) SD_WP#(XDR/B#)
18 MS-3(VCC/DATA1) XD-2(R/-B) 39
SD/XD/MS_DATA0 19 40 XD_CDSW#
SD/XD/MS_DATA0 XD-10(D0) XD-1(CD)
20 MS-4(SDIO/DATA0) XD-0(GND) 41
21 SD-4(VCC/VDD)
47
47 TAS_144-2400000900 C673
270P/25V/0402_NC
C674 C560
270P/25V/0402_NC 2.2U/6.3V/0603
2
8 IN1 CARD READER 2
R570 0_0402_NC
9
Q53
2N7002W-7-F
21 XD_CDSW#
SD_WP#(XDR/B#) 3 1 SD_WP#
21 SD_WP#(XDR/B#)
21 XD_DATA7
2
21 XD_DATA6
XD_CDSW#
21 XD_DATA5
21 XD_DATA4
+3.3V_R5C832
21 SD/XD/MS_DATA3
21 SD/XD/MS_DATA2 U29
5 1 +3.3V_RUN_CARD
21 SD/XD/MS_DATA1 IN OUT
3 NC
21 SD/XD/MS_DATA0
21 MC_PWR_CTRL_0 4 EN GND 2
C497
21 SD/XD/MS_CMD
TPS2051BDBV 1U/10V/0603
21 XD_WP#
C488
3 21 XD_ALE 3
.1U/10V/0402
21 XD_CLE
21 XD_CE#
21 SD/XD/MS_CLK
4 4
QUANTA
Title
COMPUTER
CARD READER CONN

C & G UMA 2A
Date: Thursday, January 25, 2007 Sheet 22 of 60

A B C D E
1 2 3 4 5 6 7 8
SATA 1 & 2 Connector. Change CON4 P/N to DFHS44FS611 for Gilligan.

+5V_MOD +5V_MOD
CON4 ODD Connector.
CON5
1 2
23 GND1 GND1 1 3 4
24 2 SATA_TX2+ 11 2 1 IDE_RST_MOD_R# IDE_DD8
11 SATA_TX0+ RXP RXP 13 IDE_RST_MOD# 5 6
25 3 SATA_TX2- 11 R285 56_0402IDE_DD7 IDE_DD9
11 SATA_TX0- RXN RXN 7 8
26 4 IDE_DD6 IDE_DD10
C648 GND2 GND2 9 10
11 SATA_RX0- 2 1 3900P/25V/0402 27 TXN TXN 5 C630 2 1 3900P/25V/0402_NC SATA_RX2- 11
+3.3V_RUN IDE_DD5
11 12
IDE_DD11
C634 2 1 3900P/25V/0402 28 6 C647 2 1 3900P/25V/0402_NC IDE_DD4 IDE_DD12
11 SATA_RX0+ TXP TXP SATA_RX2+ 11 13 14
29 7 IDE_DD3 IDE_DD13
GND3 GND3 15 16
1
Populate C630, C647 (P/N: IDE_DD2 IDE_DD14
IDE_DD1 17 18 IDE_DD15
A CH23904KB13) for Gilligan 19 20 A
+3.3V_RUN 30 8 +3.3V_RUN R509 IDE_DD0 IDE_DDREQ
3.3V_0 3.3V_0 4.7K_0402 21 22 IDE_DIOR#
31 3.3V_1 3.3V_1 9 23 24
32 10 IDE_DIOW# +5V_MOD
2
3.3V_2 3.3V_2 IDE_DIORDY 25 26 IDE_DDACK#_R 2
33 GND4 GND4 11 27 28 1 IDE_DDACK#
34 12 IDE_IRQ R508 22_0402
GND5 GND5 IDE_DA1 29 30 PDIAG#
35 GND6 GND6 13 31 32 2 1
+5V_HDD 36 14 +5V_HDD +5V_MOD IDE_DA0 IDE_DA2 R271 100K_0402_NC
5V_0 5V_0 IDE_DCS1# 33 34 IDE_DCS3#
37 5V_1 5V_1 15 35 36
38 16 2 1 IDE_LED#
5V_2 5V_2 R506 510/F_0402_NC 37 38
39 GND7 GND7 17 39 40
40 RSVD RSVD 18 PLATFORM_BID 29 41 42
41 19 +5V_MOD
GND8 GND8 43 44
SATA BTB Conn. 42 12V_0 12V_0 20 45 46
Changed to R-angle connector for Cossica 43 12V_1 12V_1 21 2 1 47 48
44 22 R505
51
52
TOP Side 12V_2 12V_2 49 50
470_0402_NC
51
52
FOX_QT600806-400S-7F Pin.47 Cable select TYC_1909380-1
H=Slave,L=Master
2
+3.3V_RUN
TH21 TH18 R504
470_0402
2
2
1 H-C276D126P2 1 H-C276D126P2
R507 8.2K_0402 IDE_IRQ
1
B 5 3 5 3 B
+5V_MOD
IDE_DD[0..15]
11 IDE_DD[0..15]
4
4
IDE_DDREQ
11 IDE_DDREQ
1
IDE_DIOW#
11 IDE_DIOW#
SATA BTB Conn. Nut IDE_DIOR# C320 C321 C322 C323 C631
11 IDE_DIOR#
Added for Gilligan IDE_DIORDY 10U/10V/0805 1U/10V/0603 .1U/10V/0402 1000P/50V/0402 .1U/10V/0402
11 IDE_DIORDY
2
(P/N:MBFM5002011) IDE_DDACK#
11 IDE_DDACK#
IDE_IRQ
TOP Side 11 IDE_IRQ
IDE_DA1
11 IDE_DA1
IDE_DA0
11 IDE_DA0
IDE_DCS1# Place closed to
11 IDE_DCS1#
IDE_DA2 MOD connector
11 IDE_DA2
IDE_DCS3#
11 IDE_DCS3#
SATA 1 PWR
+5V_ALW +5V_HDD
Q52
SI3456BDV
6 +5V_HDD
+3.3V_ALW2 +5V_ALW2 5 4 +5V_MOD +5V_RUN
2
1
1
1
1
C628 1 2
C C
10U/10V/0805 R503 C658 C659 C655 C654 R515 0_0805
3
28 100K_0402 .1U/10V/0402 1U/10V/0603 .1U/10V/0402 1000P/50V/0402

2
2
+15V_ALW
2
1
R576 R546 R501

100K_0402 100K_0402_NC 100K_0402
HDD_EN_5V
2 1 Removed C654,C655,
2
C658,C659 for Gilligan.

3
2 C626 +3.3V_RUN
.1U/25V/0603
3
Q51
1
2 2N7002W-7-F
29 HDDC_EN
1
1
1
Q69 C657 C660 C653 C656

1
R497 2N7002W-7-F 10U/10V/0805_NC 1U/10V/0603_NC .1U/10V/0402_NC 1000P/50V/0402_NC

2
2
100K_0402
2
SATA drive vendors will use only 5V

supply from the system and will derive
3.3V on the drive. If drive power
goals are not achieved, drive vendors
will use both 5V and 3.3V supplies
D from the system. Initial power saving D
using 3.3V from system is less than 5%.
Power Estimate:
SATA drive power consumption estimate at QUANTA
MobileMark is 1.1W. An additional 150mW
can be saved using Intel's IMST driver.
Title
COMPUTER
SATA (HDD&CD_ROM)

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_RUN
R232 2 1 100K_0402 PCIE_MCARD1_DET# WLAN_RADIO_OFF# 2 1 +1.5V_RUN

R218 2 WLAN_RADIO_DIS# 29
1 100K_0402 USB_MCARD1_DET#
D15
SDMK0340L-7-F
1
2 1
R231 C234 C243
0_0402_NC .047U/10V/0402 .047U/10V/0402
2
A A
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN
J6
+3.3V_WLAN
25,26,29 PCIE_WAKE# 1 WAKE# 3.3V_1 2
R241 1 2 0_0402 3 4
37 COEX2_WLAN_ACTIVE RESERVED_1 GND0
R240 1 2 0_0402 5 6
37 COEX1_BT_ACTIVE RESERVED_2 1.5V_1
1
MINI1CLK_REQ#_R 7 8 J8
17 MINI1CLK_REQ# CLKREQ# UIM_PWR
2
9 10 MOLEX_48099-6701 + C275
GND1 UIM_DATA C257 C254 C269 C270 C268 330U/6.3V/ESR25_NC
17 CLK_PCIE_MINI1# 11 REFCLK- UIM_CLK 12 14
13 14 .1U/10V/0402 .047U/10V/0402 .1U/10V/0402 .047U/10V/0402 4.7U/6.3V/0603
2
17 CLK_PCIE_MINI1 REFCLK+ UIM_RESET
15 GND2 UIM_VPP 16 HOST_DEBUG_TX 28
MINI1CLK_REQ#_R 14
1 2 PLTRST1# 12,25,26
1
17 18 R216 0_0402
28 HOST_DEBUG_RX UIM_C8 GND3
C649 19 20 WLAN_RADIO_OFF#
220P/50V/0402 28 8051_TX UIM_C4 W_DISABLE#
21 22 1 2
2
GND4 PERST# R215 0_0402_NC SB_WLAN_PCIE_RST# 12

12 PCIE_RX2- 23 PERn0 3.3VAUX1 24 +3.3V_WLAN
12 PCIE_RX2+ 25 PERp0 GND5 26
27 28 +3.3V_WLAN
GND6 1.5V_2 WLAN_SMBCLK
29 GND7 SMB_CLK 30
31 32 WLAN_SMBDATA
12 PCIE_TX2- PETn0 SMB_DATA
12 PCIE_TX2+ 33 PETp0 GND8 34
35 36 +3.3V_ALW +3.3V_WLAN +3.3V_RUN
GND9 USB_D- PAD T105
PCIE_MCARD1_DET# 37 38 +PWR_SRC
13 PCIE_MCARD1_DET# RESERVED_3 USB_D+ PAD T106
4
2
39 40 USB_MCARD1_DET#
RESERVED_4 GND10 USB_MCARD1_DET# 13
41 42 RP49 6
RESERVED_5 LED_WWAN# 8051_RX 28
B 43 RESERVED_6 LED_WLAN# 44 LED_WLAN_OUT# 37 5 4 1 2 B
1
RSV_ICH_CL_CLK1 45 46 1 2 LED_WPAN# 37 4P2R-2.2K 2 R235 0_0805
T100 PAD RESERVED_7 LED_WPAN#
RSV_ICH_CL_DATA1 47 48 R222 0_0402_NC 15 1 Q26
T101 PAD RESERVED_8 1.5V_3
2
RSV_ICH_CL_RST1# 49 50 R251 R248 FDC655BN_NC
T99 PAD
3
1
RESERVED_9 GND11 100K_0402_NC 100K_0402_NC
51 52 14
3
RESERVED_10 3.3V_2 WLAN_SMBCLK 1 3
2
ICH_SMBCLK 13,25,26 WLAN_ENABLE
GND
GND
GND
GND
MOLEX_67910-6700
Q61
1
55
56
57
58
COEX2_WLAN_ACTIVE 2N7002W-7-F_NC R247
3
1 2 470K_0402_NC
1
R199 0_0402_NC 2 5
28 AUX_EN_WOWL
R156 C173 +3.3V_WLAN Q30B
2
1
1
100K_0402_NC 33P/50V/0402_NC 2N7002DW_NC Q30A
2
4
2N7002DW_NC C274
R249 4700P/50V/0603_NC
2
2
2
+3.3V_RUN +3.3V_RUN +1.5V_RUN 200K_0402_NC
2
J4 WLAN_SMBDATA 1 3
R173 ICH_SMBDATA 13,25,26
0_0402 1 2
25,26,29 PCIE_WAKE# WAKE# 3.3V_1
37 COEX2_WLAN_ACTIVE COEX2_WLAN_ACTIVE 1 2 3 4
R172 1 RESERVED_1 GND0 Q62
37 COEX1_BT_ACTIVE_MINI 2 0_0402 5 RESERVED_2 1.5V_1 6
MINI2CLK_REQ#_R 7 8 2N7002W-7-F_NC
17 MINI2CLK_REQ# CLKREQ# UIM_PWR
9 GND1 UIM_DATA 10 1 2
11 12 R533 0_0402_NC
17 CLK_PCIE_MINI2# REFCLK- UIM_CLK J7
17 CLK_PCIE_MINI2 13 REFCLK+ UIM_RESET 14
15 16 MOLEX_48099-6701
GND2 UIM_VPP
C C
MINI2CLK_REQ#_R 1 2
R362 0_0402 PLTRST1# 12,25,26
1
17 18 +1.5V_RUN
C650 UIM_C8 GND3
19 UIM_C4 W_DISABLE# 20 WPAN_RADIO_DIS_MINI# 13
220P/50V/0402 21 22 1 2
2
GND4 PERST# R358 0_0402_NC SB_MCARD3_PCIE_RST# 12

12 PCIE_RX3- 23 PERn0 3.3VAUX1 24 +3.3V_RUN
25 26 C155
12 PCIE_RX3+ PERp0 GND5
1
27 28 .047U/10V/0402
GND6 1.5V_2 C158 C159
29 GND7 SMB_CLK 30 ICH_SMBCLK 13,25,26
31 32 100P/50V/0402_NC .047U/10V/0402
2
12 PCIE_TX3- PETn0 SMB_DATA ICH_SMBDATA 13,25,26
35 36 USBP4 D-
PCIE_MCARD3_DET# GND9 USB_D- USBP4 D+
13 PCIE_MCARD3_DET# 37 RESERVED_3 USB_D+ 38
41 RESERVED_5 LED_WWAN# 42
43 RESERVED_6 LED_WLAN# 44
45 46 R573 1 2 0_0402 LED_WPAN# LED_WPAN# 37 +3.3V_RUN
RESERVED_7 LED_WPAN#
47 RESERVED_8 1.5V_3 48
+3.3V_SUS 49 50 16
RESERVED_9 GND11
51 RESERVED_10 3.3V_2 52
R175 2 1 100K_0402 PCIE_MCARD3_DET# C187 C58
2
R140 2 1 100K_0402 USB_MCARD3_DET# .047U/10V/0402 .047U/10V/0402
GND
GND
GND
GND
MOLEX_67910-6700 C160 C183 C414

.1U/10V/0402 .1U/10V/0402 4.7U/6.3V/0603
1
55
56
57
58
D L22 D
USBP4 D- 1 2 ICH_USBP4- 12
USBP4 D+ 4 3 ICH_USBP4+ 12
DLW21SN900SQ2B_NC QUANTA
1
R145
2
0_0402 Title
COMPUTER
MINI-PCI
1 2
R144 0_0402 Size Document Number Rev
C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
A A
+3.3V_RUN
R234 2 1 100K_0402 PCIE_MCARD2_DET#

R226 2 1 100K_0402 USB_MCARD2_DET#
MiniCard WWAN connector
+3.3V_RUN +3.3V_RUN +1.5V_RUN
J5
UIM_CLK
24,26,29 PCIE_WAKE# 1 WAKE# 3.3V_1 2
B
T97 PAD 3 RESERVED_1 GND0 4 B
1
T96 PAD 5 RESERVED_2 1.5V_1 6
MINI3CLK_REQ#_R 7 8 UIM_PWR J15 C245
17 MINI3CLK_REQ# CLKREQ# UIM_PWR MOLEX_48099-4000
9 10 UIM_DATA 100P/50V/0402_NC
2
GND1 UIM_DATA UIM_CLK
17 CLK_PCIE_MINI3# 11 REFCLK- UIM_CLK 12 Place C245 close to J5
13 14 UIM_RESET
17 CLK_PCIE_MINI3 REFCLK+ UIM_RESET UIM_VPP
15 GND2 UIM_VPP 16
MINI3CLK_REQ#_R 1 2
R213 0_0402 PLTRST1# 12,24,26
1
17 18 +1.5V_RUN
C651 UIM_C8 GND3
19 UIM_C4 W_DISABLE# 20 WWAN_RADIO_DIS# 29
220P/50V/0402 21 22 1 2
2
GND4 PERST# R217 0_0402_NC SB_WWAN_PCIE_RST# 12

12 PCIE_RX1- 23 PERn0 3.3VAUX1 24 +3.3V_RUN
25 26 C251
12 PCIE_RX1+ PERp0 GND5
1
27 28 33P/50V/0402
GND6 1.5V_2 C249
29 GND7 SMB_CLK 30 ICH_SMBCLK 13,24,26
31 32 .047U/10V/0402
2
12 PCIE_TX1- PETn0 SMB_DATA ICH_SMBDATA 13,24,26
35 36 ICH_USBP9_D-
PCIE_MCARD2_DET# GND9 USB_D- ICH_USBP9_D+
13 PCIE_MCARD2_DET# 37 RESERVED_3 USB_D+ 38
PCI-Express TX and RX direct to connector 41 RESERVED_5 LED_WWAN# 42 PAD T35 Place caps close to connector.
43 RESERVED_6 LED_WLAN# 44
45 46 +3.3V_RUN
RESERVED_7 LED_WPAN#
47 RESERVED_8 1.5V_3 48
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52
1
C558 C235 C564
1
.047U/10V/0402 +
.047U/10V/0402 + 330U/6.3V/ESR25
GND
GND
GND
GND
C C
MOLEX_67910-0002 C231 C555 C565
33P/50V/0402 33P/50V/0402 330U/6.3V/ESR25
2
55
56
57
58
ESD1 L28
JSIM1 UIM_RESET UIM_VPP UIM_PWR ICH_USBP9_D-
1 1 6 6 1 2 ICH_USBP9- 12
UIM_PWR 5 6 2 5 UIM_PWR ICH_USBP9_D+ 4 3 ICH_USBP9+ 12
VCC GND UIM_CLK 2 5 UIM_DATA
3 3 4 4
UIM_RESET 3 4 UIM_VPP DLW21SN900SQ2B_NC
RST VPP
2
2
C381 SRV05-4.TCT C380 C388 Layout Note:
1
UIM_CLK 1 2 UIM_DATA 33P/50V/0402 C379 33P/50V/0402 1U/10V/0603 R921 and R922

CLK DATA C389 C382 C378 33P/50V/0402
Place C378 close 1 2
1
1
100P/50V/0402_NC 33P/50V/0402 100P/50V/0402_NC R228 0_0402 close to choke
to JSIM1
2
as possible to
SUY_254020MA006H555ZL 1 2 minimize stubs.
Place C389 close to JSIM1 R227 0_0402
Note: Place caps on UIMlines close to WWAN connector

Place as close as possible to WWAN connector
D D
QUANTA
Title
COMPUTER
WWAN

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
EXPRESS+MDC
Update PN +1.5V_CARD Max. 650mA, Average 500mA.
CON3 +3.3V_SUS
+3V_CARD Max. 1300mA, Average 1000mA.
1 GND0 IAC_SDATAOUT 28 ICH_AZ_MDC_SDOUT 11
12 ICH_USBP6- 2 USB- RSV2 29
12 ICH_USBP6+ 3 USB+ RSV3 30
CPUSB# 4 31 +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
CPUSB# +3.3VMDC U33
A
5 RSV0 GND5 32 A
6 RSV1 GND6 33
13,24,25 ICH_SMBCLK 7 SMBCLK IAC_SYNC 34 ICH_AZ_MDC_SYNC 11 17 AUXIN AUXOUT 15
13,24,25 ICH_SMBDATA 8 SMBDATA GND7 35 2 3.3VIN_0 3.3VOUT_0 3
MDC I/F
Express card I/F
9 +1.5VCARD0 IAC_SDATAIN 36 ICH_AZ_MDC_SDIN1 11 4 3.3VIN_1 3.3VOUT_1 5
+1.5V_CARD 10 +1.5VCARD1 GND8 37 12 1.5VIN_0 1.5VOUT_0 11
11 38 ICH_AZ_MDC_RST1# 14 13
24,25,29 PCIE_WAKE# WAKE# IAC_PESET# 1.5VIN_1 1.5VOUT_1
+3.3V_CARDAUX 12 +3.3VAUX IAC_BITCLK 39 ICH_AZ_MDC_BITCLK 11
CARD_RESET# 13 40 +3.3V_SUS 2 1
PERST# GND9 R499 +3.3V_SUS
+3.3V_CARD 14 +3.3VCARD0 ExpressSwitch
15 100K_0402 CARD_RESET#
+3.3VCARD1
17 CARD_CLK_REQ# 16 CLKREQ# 20 SHDN# PERST# 8
17 1 2 1 10 EXPRCRD_PWREN# R500 2 1 100K_0402
29 EXPRCRD_PWREN# CPPE# 29 EXPRCRD_STDBY# STBY# CPPE#
18 R498 0_0402_NC 6 9 CPUSB# R502 2 1 100K_0402
17 CLK_PCIE_EXPCARD# REFCLF- 12,24,25 PLTRST1# SYSRST# CPUSB#
17 CLK_PCIE_EXPCARD 19 REFCLK+ OC# 19
20 GND1 16 NC
21 GND2 7 GND0 RCLKEN 18
12 PCIE_RX4- 22 PERn0
12 PCIE_RX4+ 23 PERp0
24 R5538D001-TR-F
GND3
12 PCIE_TX4- 25 PETn0
12 PCIE_TX4+ 26 PETp0
27 GND4 +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
1
FOX_QT10040A-5101-9F
C620 C619 C627 C625 C622 C621
.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402
2
B TH20 TH19 B
2
2
1 H-C276D138P2 1 H-C276D138P2 Please the cap Please the cap Please the cap Please the cap Please the cap Please the cap
near pin 12 & near pin 2 & 4 near pin 17 near pin 15 near pin 3 & 5 near pin 11 &
14(1.5VIN). (3.3VIN). (AUXIN). (AUXOUT). (3.3VOUT). 13(1.5VOUT).
5 3 5 3
4
R269 0_0402
1 2
Express + Modec
BTB Conn. Nut
TOP side Q34
BSS138_NL_NC
11 ICH_AZ_MDC_RST# 3 1 ICH_AZ_MDC_RST1#
2
+5V_SUS
2
2
R270
100K_0402_NC
R273
1
10K_0402_NC
1
34 MDC_RST_DIS#
C C
NOTE : MDC DISABLE

If platform requires MDC disable,populate this circuit.
If MDC disable isn't required, connect ICH_AZ_MDC_RST# directly to
JMDC connector.
D D
QUANTA
Title
COMPUTER
ExpressCard/SmartCard

C & G UMA 2A

1 2 3 4 5 6 7 8
A B C D E
L34
12 ICH_USBP1- 1 2 ICH_USB_P1-
12 ICH_USBP1+ 4 3 ICH_USB_P1+
DLW21SN900SQ2B_NC
1 2
R302 0_0402
1 2
R301 0_0402
1 1
L35
12 ICH_USBP0- 1 2 ICH_USB_P0-
+5V_ALW 12 ICH_USBP0+ 4 3 ICH_USB_P0+
PJP16
1 2 DLW21SN900SQ2B_NC
Right
1 2 USB_SIDE_PWR JUSB3
FS2 R304 0_0402 52 TYC_1909388-1
U3
1
455/5A_NC
1
1 2 2 1 USB_SIDE_PWR 1 2 + 1
IN GND R303 0_0402 C17 C22 C675 ICH_USB_P1- A_VCC
2 A_DATA-
150U/6.3V/ESR45 .1U/10V/0402 ICH_USB_P1+
150P/25V/0402 3
2
A_DATA+
29 USB_SIDE_EN# 3 EN1# OUT1 7 4 A_GND SHIELD1 9
OC1# 8 SHIELD2 10
L1 11
ICH_USB_P3+ SHIELD3
4 EN2# OUT2 6 12 ICH_USBP3+ 1 2 SHIELD4 12
1
C13 5 12 ICH_USBP3- 4 3 ICH_USB_P3- 5

OC2# USB_OC0_1# 12 B_VCC
C12 10U/10V/0805_NC 52 ICH_USB_P0- 6 B_DATA-
1
.1U/10V/0402 DLW21SN900SQ2B_NC ICH_USB_P0+ 7
2
B_DATA+
1
C371 + C373 8
TPS2062DR .1U/25V/0603 C372 .1U/10V/0402 C676 B_GND
1 2 150U/6.3V/ESR45_NC 150P/25V/0402
2
Each channel is 1A R1 0_0402
1 2
R3 0_0402
+5V_ALW
PJP15
L2
1 2 12 ICH_USBP2- 1 2 ICH_USB_P2-
2 ICH_USB_P2+ 2
12 ICH_USBP2+ 4 3
FS1
DLW21SN900SQ2B_NC
USB_BACK_PWR JUSB1
Back
455/5A_NC U22
52 TYC_1909387-1
1
1 2 2 1 USB_BACK_PWR 1 2
IN GND
1
R4 0_0402 + 1
C11 C368 C677 ICH_USB_P3- A_VCC
2 A_DATA-
3 7 1 2 150U/6.3V/ESR45.1U/10V/0402 ICH_USB_P3+
150P/25V/0402 3
29 USB_BACK_EN#
2
EN1# OUT1 R2 0_0402 A_DATA+
OC1# 8 4 A_GND SHIELD1 9
SHIELD2 10
4 EN2# OUT2 6 SHIELD3 11
1
C370 5 12
OC2# USB_OC2_3# 12 SHIELD4
C365 10U/10V/0805_NC 5
.1U/10V/0402 ICH_USB_P2- B_VCC
52 6
2
B_DATA-
1
ICH_USB_P2+ 7 B_DATA+
1
1
TPS2062DR C369 Place ESD diodes as + C367 8
.1U/25V/0603 C363 .1U/10V/0402 C678 B_GND
close as USB connector.
Each channel is 1A 150U/6.3V/ESR45_NC 150P/25V/0402
2
2
U2
ICH_USB_P1- 1 6 ICH_USB_P0-
I/O I/O
2 VN VP 5 USB_SIDE_PWR
ICH_USB_P1+ 3 4 ICH_USB_P0+
I/O I/O
SRV05-4.TCT
Place ESD diodes as

close as USB connector.
U1
ICH_USB_P3+ 1 6 ICH_USB_P2+
I/O I/O
2 VN VP 5 USB_BACK_PWR
3 ICH_USB_P3- ICH_USB_P2- 3
3 I/O I/O 4
For Gilligan
SRV05-4.TCT
+5V_ALW
JUSB2
8
7
29 USB_BACK2_EN# 6
25 USB_OC8#
12 USB_OC8# 5
4
12 ICH_USBP8+ 3
12 ICH_USBP8- 2
1
MLX_53398-0871
Ext. USB WTB Conn.

Populate for Gilligan
(P/N: DFHD08MS731)
TOP Side
4 4
QUANTA
Title
COMPUTER
External USB

C & G UMA 2A

A B C D E
1 2 3 4 5 6 7 8
13
+3.3V_ALW +3.3V_ALW 33 LCD_CBL_DET_L 1 2 LCD_CBL_DET +3.3V_ALW 1 2 INVERTER_CBL_DET#
R115 100K_0402 R30
1 100K_0402
2 AUX_LCD_CBL_DET#
R378 2 1 10K_0402_NC SIO_SPI_CS# R377 2 1 10K_0402 DOCK_SMB_ALERT# 1 2 R29 100K_0402
R376 1 2 100K_0402 TP_DET# USIO1 R116 200K_0402 +RTC_CELL
ATI_Intel R366 1 2 100K_0402_NCBC_A_DAT Place cap close
R286 10K_0402 R117 1 2 100K_0402 BC_DAT +RTC_CELL
SUS_ON to pin 121.
20
R188 2.7K_0402
17 CKG_SMBDAT 12 KSO17/GPIOA1/AB1H_DATA
MEC5025 EC-08 VCC0 121 MEC5025_VCC0 R143 R158
2 1 DDR_ON 13 0_0402 100K_0402
R371 100K_0402
RUN_ON
17 CKG_SMBCLK
ATI_Intel 14
KSO16/GPIOA0/AB1H_CLK
GPIO5/KSO15 128 PIN VTQFP VCC1 21 +3.3V_ALW
C161
32 AUD_AMP_MUTE# 15 GPIO4/KSO14 VCC1 44
R189 2.7K_0402 R382 0_0402_NC
16 65 .1U/10V/0402 MAIN_PWR_SW#
42 1.8V_SUS_PWRGD KSO13/GPIO18 VCC1 31,34 POWER_ SW_IN0#
2 1AUX_EN_WOWL 3 EC_CPU_PROCHOT# EC_CPU_PROCHOT# 17
KSO12/OUT8 POWER PLANES VCC1 83 R165
R359 100K_0402_NC 10K_0402
A Non- T49 PAD 18
19
KSO11/GPIOC7 (6) VCC1 116
C186 A
6,13 ICH_CL_PWROK KSO10/GPIOC6
+3.3V_ALW iAMT T21 PAD SUSPWROK 20 KSO9/GPIOC5 ALWON
1U/10V/0603
13 ICH_RSMRST# 23 KSO8/GPIOC4 ALWON 120 ALWON 44
+5V_RUN T69 PAD RSV_M_ON 24 119
KSO7/GPIO3 POWER_ SW_IN2#/GPIO23 SNIFFER_PWR_SW# 33
1
T66 PAD RSV_SIO_SLP_M# 25 KEYBOARD/MOUSE 126 INSTANT_ON_SW#
R375 DDR_ON KSO6/GPIO2 POWER_ SW_IN1#/GPIO22 MAIN_PWR_SW#
42 DDR_ON 27 KSO5/GPIO1 (26) POWER_ SW_IN0# 127
100K_0402_NC 28 128 +RTC_CELL
31 TP_DET# KSO4/GPIO0 ACAV_IN ACAV_IN 34,40
ALW_PWRGD_3V_5V 29 POWER SWITCH BGPO0/GPIOA5 118 T18 PAD
44 ALW_PWRGD_3V_5V KSO3/GPIOC3
2
4
6
8
13 SIO_SLP_S3# 30 (6)
2
RP17 ALW_PWRGD_3V_5V KSO2/GPIOC2

13 SIO_SLP_S5# 31 KSO1/GPIOC1
8P4R-4.7K 32 8 LCD_SMBCLK R159
39 3.3V_RUN_ON KSO0/GPIOC0 AB1B_CLK/GPIOA4 LCD_SMBCLK 18
1
7 LCD_SMBDAT 100K_0402
AB1B_DATA/GPIOA2 LCD_SMBDAT 18
C430 33 ACCESS BUS 6 DOCK_SMBCLK
1
3
5
7
CLK_KBD .1U/10V/0402_NC SUS_ON KSI7/GPIO19 AB1A_CLK DOCK_SMBDAT

38,39 SUS_ON 34 (4) 5
2
DAT_KBD RUN_ON KSI6/GPIO17 AB1A_DATA INSTANT_ON_SW#

18,38,39 RUN_ON 35 KSI5/GPIO10 31 INSTANT_POWER_SW#
CLK_DOCK 1.8V_RUN_ON R166
DAT_DOCK Non- 41 AC_OFF 36
RSV_1.05V_1.25V_M_PWRGD 37 KSI4/GPIO9 GPIO11/AB2_DATA 93
94 10K_0402
T20 PAD KSI3/GPIO8 GPIO12/AB2_CLK LCDVCC_TST_EN 18
iAMT 31 BC_A_INT# BC_A_DAT
38 KSI2/GPIO7/BC_A_INT# GPIO13/AB1G_DATA 95 C185
1U/10V/0603
31 BC_A_DAT 39 KSI1/GPIO6/BC_A_DAT GPIO14/AB1G_CLK 96
40 111 PBAT_SMBDAT
31 BC_A_CLK KSI0/SGPIO30/BC_A_CLK GPIO87/AB1C_DATA PBAT_SMBDAT 40,41
CLK_PCI_5025 112 PBAT_SMBCLK
GPIO86/AB1C_CLK PBAT_SMBCLK 40,41
36 92 9 SBAT_DH_SMBDAT
11 SIO_A20GATE SGPIO34/A20M GPIO85/AB1D_DATA SBAT_DH_SMBCLK
33 SNIFFER_GREEN# 50 OUT5/KBRST GPIO84/AB1D_CLK 10
R129 97 +5V_ALW
GPIO93/AB1F_DATA 1.5V_RUN_ON 43
10_0402 75 98
31 CLK_TP_SIO GPIO94/IMCLK GPIO92/AB1F_CLK 1.25V_RUN_ON 42
Place close 76 99 THRM_SMBDAT
31 DAT_TP_SIO GPIO95/IMDAT GPIO91/AB1E_DATA THRM_SMBDAT 34
CLK_KBD 77 (10) 100 THRM_SMBCLK DOCK_SMBCLK R182 8.2K_0402
to pin 58. DAT_KBD 78
KCLK GPIO90/AB1E_CLK THRM_SMBCLK 34
KDAT
1
CLK_DOCK 79 43
GPIOA6/EMCLK GPIO82/FAN_TACH3 IMVP_PWRGD 13,38,45
B C141 DAT_DOCK 80 42 +3.3V_RUN DOCK_SMBDAT R181 8.2K_0402 B
2.2P/50V/0402 8051_RX GPIOA7/EMDAT GPIO16/FAN_TACH2 R180 2.2K_0402_NC
24 8051_RX 81 41 FAN1_TACH 34
2
8051_TX GPIO20/PS2CLK/8051RX GPIO15/FAN_TACH1 +3.3V_ALW

24 8051_TX 82 GPIO21/PS2DAT/8051TX
48 R135 0_0402
OUT2/PWM3 IMVP_VR_ON 45
GPIO 47 AUX_EN_WOWL
OUT9/PWM2 AUX_EN_WOWL 24
57 (36) 46 LCD_SMBCLK R184 7.5K_0402
6,12 PLTRST# LRESET# OUT11/PWM1 3.3V_SUS_ON 39
CLK_PCI_5025 58 45
+3.3V_ALW 17 CLK_PCI_5025 PCICLK OUT10/PWM0 BREATH_LED# 37
11 LPC_LFRAME# 59 LFRAME#
60 66 SIO_EXT_SCI# LCD_SMBDAT R183 7.5K_0402
11 LPC_LAD0 LAD0 nEC_SCI/SPDIN2 SIO_EXT_SCI# 13
11 LPC_LAD1 61 LAD1 PCI POWER/LPC BUS SGPIO45/MSDATA/SPDOUT2 55 PS_ID 41
11 LPC_LAD2 62 LAD2 (9) SGPIO44/MSCLK/SPCLK2 54 SIO_RCIN# 11
C154 C150 63 69 PBAT_SMBDAT R133 2.2K_0402
11 LPC_LAD3 LAD3 SGPIO46/SPDIN1 BEEP 32
.1U/10V/0402 .1U/10V/0402 64 68
13,20,35 CLKRUN# CLKRUN# SGPIO47/SPDOUT1
C189 C133 C132 56 67 DEBUG_ENABLE#
10U/6.3V/0805 .1U/10V/0402 .1U/10V/0402 13,20 IRQ_SERIRQ SER_IRQ SGPIO31/TIN1/SPCLK1 PBAT_SMBCLK R134 2.2K_0402
SYSOPT0/SGPIO32/LPC_TX 70 HOST_DEBUG_TX 24
12 ICH_EC_SPI_CLK 102 HSTCLK SYSOPT1/SGPIO33/LPC_RX 71 HOST_DEBUG_RX 24
105 R110 1M_0402 +3.3V_ALW SBAT_DH_SMBDAT R185 2.2K_0402
12 ICH_EC_SPI_DIN HSTDATAIN
Place these caps close to MEC5025. 107 91 LCD_CBL_DET 63
12 ICH_EC_SPI_DO HSTDATAOUT SGPIO40
SGPIO41 90 INVERTER_CBL_DET# 33
103 89 SBAT_DH_SMBCLK R186 2.2K_0402
30 EC_FLASH_SPI_CLK FLCLK SGPIO42 AUX_LCD_CBL_DET# 33
106 HOST/8051 SPI 4 SIO_SPI_CS#
30 EC_FLASH_SPI_DIN FLDATAIN SGPIO43 SIO_SPI_CS# 12
108 (8) R177 100K_0402 +3.3V_ALW
30 EC_FLASH_SPI_DO FLDATAOUT
SGPIO35 1 LOM_SMB_ALERT# 13
SFPI_EN R131 0_0402_NC +3.3V_ALW
AMT Non-AMT 13 SIO_PWRBTN# 109 GPIO80 SGPIO36 (SFPI_EN) 2
Net & Part 110 3 DOCK_SMB_ALERT# 13
Intel Broadcom 33 SNIFFER_YELLOW# GPIO81 SGPIO37
GPIO96/TOUT1 52 0.9V_DDR_VTT_ON 42 1 = Enabled.
3.3V_M_PWRGD Pin15 of 5025 NC 87 11 R178
29 BC_CLK
BC_DAT 86
BC_CLK
BC OUT7/nSMI SIO_EXT_SMI# 13 0 = Disabled 1K_0402_NC
29 BC_DAT BC_DAT
C ICH_RSMRST# Pin23 of 5025 NC 29 BC_INT# 85 BC_INT# (3) C
MISCELLANEOUS nPWR_LED 115 BAT2_LED# 37
M_ON Pin24 of 5025 NC (8) 114 SFPI_EN
nBAT_LED BAT1_LED# 37
MEC5025_XTAL1 122 CLOCK 84 FWP#
MEC5025_XTAL2 XTAL1 nFWP
SIO_SLP_M# Pin25 of 5025 NC 124 XTAL2 (3) GPIOA3/WINDMON 73 T107 PAD
123 117 R179
XOSEL GPIO83/32KHZ_OUT EC_32KHZ 29
1.05V_1.25V_M_PWRGD Pin37 of 5025 NC R148 10K_0402 49 Flash Recovery. 1K_0402
PWRGD RUNPWROK 29,38,45
nRESET_OUT/OUT6 53 RESET_OUT# 38
R238 Pin24 of 5025 NC VR_CAP 22 72 MEC_TEST_PIN T61 PAD
C190 4.7U/6.3V/0603 VR_CAP TEST_PIN
Refer to UMA MEC_AGND 125 Populate
L23 AGND
LOM_SUPER_IDDQ NC ref pg 32. VSS 113 for flash
BLM11A05 104 88
MEC_VCC_PLL VCC_PLL VSS R112 corruption
Refer to UMA +3.3V_ALW POWER PLANES VSS 74
+3.3V_ALW
LOM_LOW_PWR NC L19 (9) 51 0_0402 issue.
ref pg 32. BLM11A05 101
VSS
26
C134 VSS_PLL VSS
Refer to UMA
LOM_CABLE_DETECT NC .1U/10V/0402 Low = R114
ref pg 32. MEC5025-NU 100K_0402
L18 LQFP128-16X16-4-FX2 +3.3V_ALW Write Protected.
BLM11A05 Rev 0.01 (11/09/05)
FWP#
For MEC5025 Rev.C: C685=22uF and
2
4
+3.3V_ALW Flash Write
32KHz Clock. External Work Around populate workaround circuit.
Debug Serial Port RP16 R113
MEC5025_XTAL2 Circuit. For MEC5025 Rev.D: C685=4.7uF and +3.3V_ALW 4P2R-4.7K
Protect bottom 100K_0402_NC
Flash Recovery Port.
depopulate workaround circuit. 4K of internal
2
R120
bootblock flash.
63
1
3
R150 R122 10K_0402_NC THRM_SMBCLK
D 0_0402 100K_0402_NC THRM_SMBDAT D
W2
D11 R123 R126 R124
1
4 1 MEC5025_XTAL1 CH501H_NC C142 JDEBUG1 1M_0402 10K_0402 10K_0402

1
4.7U/6.3V/0603_NC VR_CAP
3 2 ALWON 1 2 2 R191 5
4
8051_RX QUANTA
1
R121 Q17 0_0402_NC 8051_TX

3
3
C164 32.768KHZ C163 10K_0402_NC MMBT3906-7-F_NC DEBUG_ENABLE#

COMPUTER
3
22P/50V/0402 22P/50V/0402 Q46 2 R127 0_0402_NC

2
2
2N7002W-7-F_NC 1 Title
MLX_53398-0571_NC Ultra I/O Controller MEC5025
1
R398 Size Document Number Rev

100K_0402_NC C & G UMA 2A

1 2 3 4 5 6 7 8
A B C D E
55 Update to 5021:
Depopulate R549, R550, R551, R552, R170, R176, R553, R554, R555, R556, R557, C178, C442, C175, C176, C199, C218, C209, L24.
Populate R542, C349.
RP18
2 1 PCIE_WAKE#
+3.3V_ALW
4 3 SYS_PME#
6 5 PWRUSB_OC#
8 7
13
8P4R-10K
R568 2 USIO2
+5V_ALW 1 10K_0402
DOCK_SMB_PME#
1
41 PBAT_PRES# 97 GPIOA[0]
ECE5021 GPIOD[3]/VBUS_DET 63 1
SBAT_PRES# 98 28 MODPRES# VDD18_CAP VDDA18PLL_CAP
GPIOA[1] GPIOD[4]/OCS1_N
RP38
CHG_PBATT
CHG_SBATT
99
100
GPIOA[2] 128 Pin GPIOD[5]/OCS2_N 29
30
DBAY_MODPRES#
PBAT_DSCHG GPIOA[3] GPIOD[6]/OCS3_N HDDC_EN 23

SBAT_PRES# C178 C422 C175 C176
+3.3V_ALW 2
4
1
3 20,35 SYS_PME#
SYS_PME#
101
102
GPIOA[4]
GPIOA[5]
VTQFP GPIOD[7]/OCS4_N 31 MODC_EN
+3.3V_ALW .1U/10V/0402_NC 4.7U/6.3V/0603_NC 4.7U/6.3V/0603_NC .1U/10V/0402_NC
6 5 PCIE_WAKE# 103
24,25,26 PCIE_WAKE# GPIOA[6]
8 7 DBAY_MODPRES# 104 119
27 USB_BACK_EN# GPIOA[7] VCC1_6/GPIOI[1]
120 R549 0_0402_NC VDD18_CAP
8P4R-10K VDD18(CAP)/GPIOI[2] R550 0_0402_NC ECE5011_CTAL2
27 USB_SIDE_EN# 65 GPIOB[0] XTAL2/GPIOI[3] 122
PWRUSB_OC# 66 123 ECE5011_CTAL1 R147
MODPRES# GPIOB[1] XTAL1/CLKIN/GPIOI[4] VDDA18PLL_CAP 10K_0402_NC
+3.3V_ALW 1
R211
2
100K_0402
27 USB_BACK2_EN# HP_NB_SENSE
82
81
GPIOB[2] USB
VDDA18PLL(CAP)/GPIOI[5] 124
125 R551 0_0402_NC VDDA33
DOCK_HP_MUTE# GPIOB[3] VDDA33PLL(CAP)/GPIOI[6] R552 0_0402_NC
80 GPIOB[4] ATEST(VCC1)/GPIOI[7] 126 +3.3V_ALW
SPDIF_SHDN 79 R170 10K_0402_NC
GPIOB[5] ECE5011_CTAL1
78 GPIOB[6]
77 127 C171
32 NB_MUTE# GPIOB[7] RBIAS/GPIOIJ[0]
128 R176 10K_0402_NC 33P/50V/0402_NC
R204 1 VSS_25/GPIOIJ[1]
2 100K_0402 DOCKED DOCK_SMB_PME# 76 GPIOC[0] USBDP0/GPIOIJ[2] 9 R553 0_0402_NC T104 PAD
R206 1 2 100K_0402 PANEL_BKEN DOCKED 75 10 T108 PAD R160 Y3
QBUFEN# GPIOC[1] USBDN0/GPIOIJ[3] 1M_0402_NC 24MHz_NC
DOCK_PWR_EN
67
68
GPIOC[2] GPIOs VSS_0/GPIOIJ[4] 11
12 R554 0_0402_NC
GPIOC[3] USBDN1/GPIOIJ[5] T109 PAD
69 13 ECE5011_CTAL2
40 ADAPT_OC GPIOC[4] USBDP1/GPIOIJ[6] T110 PAD
70 14 VDDA33 C167
40 ADAPT_TRIP_SEL GPIOC[5] VDDA33_1/GPIOIJ[7]
+3.3V_ALW 71 R555 0_0402_NC 33P/50V/0402_NC
3,13 ITP_DBRESET# GPIOC[6]
41 PS_ID_DISABLE# 73 GPIOC[7]
15 T111 PAD +3.3V_ALW
USBDP2/GPIOIK[0]
R196 1 2 100K_0402 PLATFORM_BID 6 PANEL_BKEN
PANEL_BKEN 74 GPIOD[0] USBDN2/GPIOIK[1] 16 T112 PAD
1 18 T113 PAD L24
USBDN3/GPIOIK[2] VDDA33
31 M_LED_BK# 1 GPIOE[0] USBDP3/GPIOIK[3] 19 T114 PAD
2
SW_LED 2 20 VDDA33 BLM11A20_NC

+3.3V_ALW R564 SUB_SHDN_ON_BATT GPIOE[1] VDDA33_2/GPIOIK[4] R556 0_0402_NC
3 GPIOE[2] USBDP4/GPIOIK[5] 21 T115 PAD
2 TOUCH_PAD_LED# C199 C218 C209 C193 2
100K_0402_NC 4 GPIOE[3] USBDN4/GPIOIK[6] 22 T116 PAD
LOW_LIGHT 5 23 .1U/10V/0402_NC .1U/10V/0402_NC
CAM_IMG_CAPTURE GPIOE[4] VSS_2/GPIOK[7] R557 0_0402_NC .1U/10V/0402_NC 10U/6.3V/0805
84
1
MIC_SWITCH GPIOE[5]
83 GPIOE[6]
LID_CL_PRES# 6 GPIOE[7]
R169 R162
10K_0402_NC 10K_0402_NC 118
R171 R163 GPIOF[0] LID_CL_SIO#
34 ATF_INT# 117 GPIOF[1] GPIOD[1]/CIRTX 61
10K_0402_NC 10K_0402 BID0 116 62
GPIOF[2] GPIOD[2]/CIRRX 1.05V_RUN_ON 43
42 BID1
BID0 CHIPSET_ID1
115
112
GPIOF[3] CIRCC CIRTX 113
114
GPIOF[4] CIRRX CIRRX 31
BID1 42 VGA_IDENTIFY 111
CHIPSET_ID1 Rsvd_LOM_IDDQ GPIOF[5] VDDA33 +3.3V_ALW
110 GPIOF[6]
VGA_IDENTIFY Rsvd_LOM_TPM_EN# 109 8
GPIOF[7] VDDA33_0/VCC1_0 R542 0_0402
88
POWER 34
35 LOM_LOW_PWR# SC_DET# GPIOG[0] VCC1_0/VCC1_1
R155 R154 R164 R161 89 42
10K_0402 10K_0402 10K_0402_NC 10K_0402 GPIOG[1] VCC1_1/VCC1_2
37 LED_MASK# 90 GPIOG[2] VCC1_2/VCC1_3 43
PLATFORM_BID 91 57 C177 C210 C244 C248 C250
23 PLATFORM_BID GPIOG[3] VCC1_3/VCC1_4
92 85 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402
13 SIO_EXT_WAKE# GPIOG[4] VCC1_4/VCC1_5
43 12 ICH_PME# 93 GPIOG[5] VCC1_5/VCC1_6 108
94 C349
13 ICH_PCIE_WAKE# GPIOG[6]
95 86 .1U/10V/0402
24 WLAN_RADIO_DIS# GPIOG[7] CAP_LDO
Place C349 close
33 WIRELESS_ON/OFF# 24 GPIOH[0] VSS_1 17 to USIO2.8
25 36 C207
37 BT_RADIO_DIS_DC# GPIOH[1] VSS_3
26 37 4.7U/6.3V/0603
26 EXPRCRD_PWREN# GPIOH[4] VSS_4
26 EXPRCRD_STDBY# 27 GPIOH[5] VSS_5 38
BID3 BID2 BID1 BID0 Board Revision IMVP6_PROCHOT# 32 39
45 IMVP6_PROCHOT# GPIOH[6] VSS_6
0 0 0 0 SST (X00) 33 40
38 5V_3V_1.8V_1.25V_RUN_PWRGD GPIOH[7] VSS_7
0 0 0 1 PT (X01) 41
0 0 1 0 ST (X02) VSS_8
18 LCD_TST 105 OUT65 VSS_9 44
3 0 0 1 1 QT (A00) 3
VSS_10 45
0 0 0 0 RAMP(A01)
25 WWAN_RADIO_DIS# LOM_CABLE_DETECT
106 GPIOH[2] VSS VSS_11 47
107 GPIOH[3] SIO Reset VSS_12 48
49
VSS_13
28 BC_INT# 58 BC_INT# VSS_14 50
28 BC_DAT 59 BC_DAT VSS_15 51
28 BC_CLK 60 BC_CLK
BC VSS_16 52
VSS_17 53
PROCHOT# change to 28,38,45 RUNPWROK 7 PWRGD VSS_18 54
CPU_PROCHOT# per VSS_19 55
ref schematic. 35 TEST_PIN MISCELLANEOUS VSS_20 56
PAD T34 64 +3.3V_ALW
VSS_21
28 EC_32KHz 96 32KHz_IN VSS_22 72
VSS_23 87
1
46 NC VSS_24 121
R230
100K_0402
ECE5021-NU
R233 10_0402
2
LID_CL_SIO# 1 2 LID_CL# LID_CL# 31
IMVP6_PROCHOT#
+3.3V_RUN
1
R219 100K_0402
C261
.047U/10V/0402
2
4 4
QUANTA
Title
COMPUTER
SIO (GPIO/BC/USB/CIRR)

C & G UMA 2A

A B C D E
A B C D E
4 4
RTC BATTERY
+RTC_CELL +3.3V_RTC_LDO +PWR_SRC
8Mbit (1M Byte), SPI
+3.3V_SUS
Non-iAMT
Layout Note: U4
Place R471 within 500 mils from SPI flash. 1 2 3 OUT IN 1
1
D1 4
Place R498 & R534 within 500 mils of the R192 R210 SDMK0340L-7-F 5/3#
1
MEC5025. 10K_0402 10K_0402 2 GND SHDN 5 C24
C21 1U/25V/0805
2.2U/6.3V/0603 MAX1615_NC
2
U13
1 8 J3
12 SPI_CS0# CE# VDD
R119 1 2 15_0402 6
28 EC_FLASH_SPI_CLK SCK 11 RTC_BAT_DET#
1
R125 1 2 15_0402 5 C227 RTC_BAT_DET# 1
28 EC_FLASH_SPI_DO SI
R168 1 2 15_0402 2 7 .1U/10V/0402 1 2 +RTC_1 1 2 +RTC 2
28 EC_FLASH_SPI_DIN SO HOLD# D2 R8 1K_0402 3
2
SDMK0340L-7-F
Non-iAMT 3 WP# VSS 4
2
MOLEX_53261-0371 RTC-BATTERY
SST25VF016B-50-4C-S2AF C14
1U/10V/0603
1
21
32
3 3
2 2
1 1
QUANTA
Title
COMPUTER
FLASH, RTC & KC

C & G UMA 2A

A B C D E
1 2 3 4 5 6 7 8
34
+5V_RUN
Q31
+3.3V_RUN DTA114YUA
1 3 M_LED_BK_O 1 2 M_LED_BK_R
47K
R250 0_0805
R562
10K
A A
4.7K_0402_NC
2
1
2
29 M_LED_BK# 1 3
Q14
2N7002W-7-F
TP
+3.3V_ALW
19
+5V_ALW +3.3V_ALW
1
3
RP24
4P2R-4.7K
2
4 JTP1
28 DAT_TP_SIO 1 2 28 TP_DET# 1 Diag_loop
L27 BLM18AG601SN1D 2 SMB_DATA
28 CLK_TP_SIO 1 2 3 SMB_CLK
L29 BLM18AG601SN1D 4
M_LED_BK_R GND1
B 5 BL_EN
B
28,34 POWER_ SW_IN0# 6 PWR_SW#
2
28 INSTANT_POWER_SW# 7 MD_SW#
2
2
C260 C239 8
C246 C259 10P/50V/0402 10P/50V/0402 +3.3VALW
9
1
+3.3VRUN
10P/50V/0402 10P/50V/0402 10
28 BC_A_DAT
1
BC_DATA
11 GND2
28 BC_A_CLK 12 BC_CLK
28 BC_A_INT# 13 BC_INIT#
29 LID_CL# 14 Hall_SW
15 Diag_loop_N
FOX_HS6115E-M
C C
+3.3V_ALW
JCIR1
4 4
3 3
2 2 CIRRX 29
1 1
1
MLX_ 53398-0471
C361
.1U/10V/0402
2
D D
QUANTA
Title
COMPUTER
TP/KB/Media/CIR Conn.

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3.3V_RUN
R330 100K_0402
1 2 SPEAKER_DET#
Package 1206 for THD+N INTERNAL SPEAKER AMP SPEAKER_DET#
11 SPEAKER_DET#
performance for Vista Logo
62 U19 49
requirements. JSPK1
AUD_LINE_OUT_L C331 1 2 .033U/25V/X7R/1206 LIN- 3 6 AUD_SPK_L1 1
AUD_LINE_OUT_R C332 1 RIN- SPKR_INL OUTL+ AUD_SPK_L2 AUD_SPK_L1 1
2 .033U/25V/X7R/1206 2 SPKR_INR OUTL- 7 R572 2 1 0_0603 2 2
AUD_SPK_L2 R578 2 1 0_0603 3
AUD_HP_OUT_L C351 2 HP_OUT_L AUD_SPK_R1 AUD_SPK_R1 3
1 1uF/25V/X7R/1206 27 20 R579 2 1 0_0603 4
A
AUD_HP_OUT_R C354 2 1 1uF/25V/X7R/1206 HP_OUT_R 26
HP_INL
HP_INR
MAX9789A OUTR+
OUTR- 19 AUD_SPK_R2 AUD_SPK_R2 R580 2 1 0_0603 5
4
5 A
C355 C338 C359 1U/10V/0603 6
TQFN 32PIN 6
1
47P/50V/0402_NC 47P/50V/0402_NC 1 2 24 16 AUD_HP_JACK_L 33
BIAS HPL
2
C352 C337 AUD_SPK_ENABLE# 23 15 AUD_HP_JACK_R 33 MLX_ 53398-0671
47P/50V/0402_NC 47P/50V/0402_NC AUD_HP_EN SPKR_EN# HPR C641 C642 C643 C644
22
2
AUD_AMP_MUTE# HP_EN REGEN 100P/50V/0402_NC
100P/50V/0402_NC
100P/50V/0402_NC
100P/50V/0402_NC
28 AUD_AMP_MUTE# 25 4
1
+5V_SPK_AMP AUD_AMP_GAIN1 MUTE# REGEN SET
31 GAIN1 SET 1
For TPA6040A,pop AUD_AMP_GAIN2 32 GAIN2
29 +VDDA
R530,depop R531. VOUT
1
+5V_SPK_AMP 17 HPVDD
9 30 VDD
R531 C341 CPVDD VDD
PVDD_8 8 +5V_SPK_AMP L35
1
100K_0402 10U/10V/0805 C636 1 2 1U/10V/0603 10 18 +5V_SPK_AMP +VDDA
C1P PVDD_18 +5V_SPK_AMP FB_600ohm+-25%_100MHz
R530 C353 12
2
+5V_SPK_AMP C1N
0_0402_NC 1U/10V/0603 11 28 _200mA_0.6ohm DC
2
AUDIO_AVDD_ON 1 AUD_AMP_MUTE# CPGND GND_28
2 PGND_5 5
1
14 21 VDD
PVSS PGND_21 C638 C346
1 13 CPVSS
1
C360 +5V_SPK_AMP 1U/10V/0603 1U/10V/0603
2
1
1
.1U/10V/0402 C347 C340 C633 C343
1U/10V/0603 MAX9789AETJ+ 1U/10V/0603 1U/10V/0603 .1U/10V/0402
2
2
5
Layout Note:
2
5
CODEC_GPIO_PIN_4 1
AUD_HP_NB_SENSE 1 4 AUD_HP_EN AUDIO_AVDD_ON Place close Layout Note:
AUDIO_AVDD_ON 34
4 2 U22. Place close U22.
1
NB_MUTE# 2
U35 R529 C1425/C331 value need to
3
U20 NC7SZ08P5X_NL_NC 0_0402
3
+5V_SPK_AMP NC7SZ08P5X_NL match with C326/C290. This Layout Note:

+5V_SPK_AMP +5V_RUN +5V_SPK_AMP
2 1 value be chosen in PT phase Place close to
2
B R541 0_0402 REGEN B
L33 pin 18.
2
1
+5V_SPK_AMP
For TPA6040A,pop 2 1
C640 BLM21PG600SN1D
R290 R291 .033U/16V/0402_NC C640,depop R529.
1
100K_0402 C335 Layout Note: C358
100K_0402 C344 10U/10V/0805 C357 C356 .1U/10V/0402
Place close to
1
AUD_SPK_ENABLE# R513 1U/10V/0603 1U/10V/060310U/10V/0805
2
100K_0402 For TPA6040A,pop pin 8.
R510 R512
C331,depop R406.
3
100K_0402_NC 2.2K_0402_NC FB_60ohm+-25%_100MHz

AUD_EAPD# 2 SET 2 1 +VDDA _3A_0.05ohm DC
2
AUD_AMP_GAIN1
2
Q37 AUD_AMP_GAIN2
1
2
2N7002W-7-F R511 R527 2 1 0_0603
2
C632 0_0402 R275 2 1 0_0603

R281 GAIN1 GAIN2 GAIN .033U/16V/0402_NC R292 0_0603
2 1 EMI Request
1
3
100K_0402 R282 0 0 6dB R283 2 1 0_0603
1
2 100K_0402_NC
29 NB_MUTE#
0 1 10dB
1
Q36
1
2N7002W-7-F 1 0 15.6dB +VDDA Layout Note: R520 +VDDA

1 1 21.6dB 5.1K/F_0402
Close to Pin 13. AUD_SENSE_A 1 2
2
AZALIA (HD) CODEC
1
ICH_AZ_CODEC_BITCLK U18 R284 C637
100K_0402 R519 R521 1000P/50V/0402
2
ICH_AZ_CODEC_BITCLK 6 13 AUD_SENSE_A 39.2K/F_0402 20K/F_0402

11 ICH_AZ_CODEC_BITCLK
2
C
R276 R277 2 HDA_BITCLK SENSE_A C
11 ICH_AZ_CODEC_SDIN0 1 33_0402
SDIN 8 HDA_SDI_CODEC SENSE_B 34 AUD_SENSE_B
47_0402_NC ICH_AZ_CODEC_SDOUT 5
11 ICH_AZ_CODEC_SDOUT STAC9205 PORT_A_L
3 2
3 2
HDA_SDO AUD_HP_OUT_L
11 ICH_AZ_CODEC_SYNC 10 HDA_SYNC 39
Close to pin 6. 11 41 AUD_HP_OUT_R
11 ICH_AZ_CODEC_RST#
LQFP 48PIN VREFOUT_A
2 1
HDA_RST# PORT_A_R AUD_HP_NB_SENSE 2

8 37 33 AUD_HP_NB_SENSE 2 AUD_MIC_SWITCH 33
+3.3V_RUN
C329 51 AUD_DMIC_CLKR565 0_0402 46 21 Q57 Q58
33 AUD_DMIC_CLK AUD_EXT_MIC_L 33
1
.1U/10V/0402_NC AUD_DMIC_IN0 R566 0_0402 DMIC_CLK PORT_B_L 2N7002W-7-F 2N7002W-7-F
33 AUD_DMIC_IN0 2 22 AUD_EXT_MIC_R 33
1
DMIC0/VOL_UP/GPIO1 PORT_B_R
1
CODEC_GPIO_PIN_4 4 28
DMIC1/VOL_DN/GPIO2 VREFOUT_B AUD_VREFOUT_B 33
For tuning. 23 AUD_INT_MIC_IN_L
SBK160808T-301Y-N R289 0_0402 AUD_EAPD# PORT_C_L AUD_INT_MIC_IN_R +VDDA
47 SPDIF_IN/EAPD#/GPIO0 PORT_C_R 24
L48 2 1 SPDIF_OUT 48 29
19 AUD_SPDIF_OUT SPDIF_OUT VREFOUT_C
ICH_AZ_CODEC_SDOUT +VDDA
2
1
35 AUD_LINE_OUT_L C326
PORT_D_L
2
43 36 AUD_LINE_OUT_R R280 R279 .1U/16V/0603

NC_43 PORT_D_R
2
R278 C635 R567 44 10K_0402 2 1

NC_44
1
47_0402_NC .1U/10V/0402 C328 R288 100K_0402 45 14 10K_0402

C339 1U/10V/0603 0_0402 NC_45 PORT_E_L
15 Close to U17.
2
PORT_E_R
5
Close to pin 5. 10U/10V/0805_NC 12 31 DOCK_HP_MUTE# C325 R272
2 1
GPIO4/VREFOUT_E .1U/10V/0402 20K_0402

1 1 BEEP 28
1
DVDD_CORE_1 AUD_PC_BEEP
9 DVDD_CORE_9 PORT_F_L 16 2 1BEEP2 1 2 BEEP1 4
C333 +3.3V_RUN 40 17 2
DVDD_CORE_40 PORT_F_R SPKR 13
1
.1U/10V/0402_NC 3 30 AUD_SPDIF_SHDN
1
+VDDA DVDD_IO GPIO3/VREFOUT_F R274 22
3
1
51 60 12 C334 25 18 +VDDA 10K_0402 U17

AVDD_25 CD_L
2
.1U/10V/0402 38 19 74LVC1G86GW
AVDD_38 CD_GND
1
C639 C348 C679 C672 20

2
2
CD_R
2
AUD_DMIC_CLK 8 .1U/10V/0402_NC 1000P/50V/0402

1
D .1U/16V/0603 560P/10V/0402 7 12 AUD_PC_BEEP 10_0402_NC D

SBK160808T-301Y-N DVSS PC_BEEP
1
32 R287
C668 L49 MONO_OUT
26 AVSS_26
4.7P/50V/0402_NC Depop R441 & pop C394 & C312 for AD1984. 42 27 AC97VREFI
QUANTA
2
AVSS_42 VREFFILT CAP2

CAP2 33
60
1
C680 C336 C330 C342

COMPUTER
1
AUD_DMIC_IN0 .1U/10V/0402 STAC9205_B2 10U/10V/0805 .1U/10V/0805_NC

C345 C327 C350 10U/10V/0805 Title
2
.1U/16V/0603 1U/10V/0603 10U/10V/0805_NC Azelia CODEC(STAC9205))

2
2
1
C669 Pop C315 & R603 for AD1984. Size Document Number Rev
4.7P/50V/0402_NC C288 need change to 1uF. C & G UMA 2A
2

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+5V_RUN
1 2
R308 0_0402
+3.3V_RUN
C29 C31 C32 C392 +3.3V_RUN
5
.01U/25V/0402 .1U/10V/0402 .1U/10V/0402 150U/6.3V/ESR45 U23
1
VCC
OE#
1
2 4 AUD_DMIC_CLK_R
32 AUD_DMIC_CLK IN OUT R528 R526
2 1 3 100K_0402 100K_0402
R311 10K_0402_NC GND
A A
SN74LVC1G125DBVR_NC
2
32 AUD_MIC_SWITCH AUD_HP_NB_SENSE 32
JAUDIO1 50
1 2
24 1 2 3 4
R575 0_0603_NC R581 0_0603
Digital Microphone & Camera SNIFFER G_R 5 6 R582
2
2
1
1 0_0603
AUD_HP_JACK_R 32
7 8 AUD_HP_JACK_L 32
SNIFFER Y_R
Q9 SNIFFER2 9 10
+5V_RUN SI2301BDS-T1-E3 +3.3V_RUN SNIFFER1 11 12
13 14 R583 0_0603
15 16 2 1 AUD_EXT_MIC_R 32
2 3 +5V_CCD L9 +3V_DMIC R584 2 1 0_0603
17 18 AUD_EXT_MIC_L 32
BLM11A05
32 AUD_VREFOUT_B 19 20
2
1
1
1
C33 R91 C50
1
1U/10V/0603 100K_0402 C30 C49 +3.3V_RUN 10U/10V/0805 FOX_HT1310F
2
1U/10V/0603 10U/10V/0805
2
2
1
R27 C386 C384 C385

10K_0402 10U/6.3V/0805 .1U/10V/0402 .1U/10V/0402
B B
JCAMERA1
3
AUX_LCD_CBL_DET# +3.3V_RUN
28 AUX_LCD_CBL_DET# 1
Q10 +5V_CCD
2
1
DTC144EUA +3V_DMIC
47K ICH_USB_P5+ 3 R517
13 CCD_VDD_ON 2 4
ICH_USB_P5- 100K_0402
AUD_DMIC_CLK_R 5
AUD_DMIC_IN0 6 R516 10K_0402
47K 32 AUD_DMIC_IN0
2
7
8 29 WIRELESS_ON/OFF# 2 1 SNIFFER1
INVERTER_CBL_DET#
28 INVERTER_CBL_DET#
1
1
28 LCD_CBL_DET_L 10 C646
11 1U/10V/0603
2
12
MLX_ 53398-1271
L6 8 AUD_DMIC_CLK_R +RTC_CELL
1 2 ICH_USB_P5-
12 ICH_USBP5-
1
4 3 ICH_USB_P5+ 46
12 ICH_USBP5+
R532
1
DLW21SN900SQ2B_NC 100K_0402
C670
33P/50V/0402 R518 10K_0402
2
2
1 2 28 SNIFFER_PWR_SW# 2 1 SNIFFER2
R28 0_0402
1
1 2 C645
R26 0_0402 AUD_DMIC_IN0 1U/10V/0603
2
C C
1
C671
33P/50V/0402
2
Sniffer LED
+3.3V_SUS +3.3V_SUS
1
1 Diag Loop Diag MB connector (Local Loop)
47K 47K
2 Mic Signal 2 2
SNIFFER_YELLOW# 28 SNIFFER_GREEN# 28
Q56 Q55
3 Mic Pwr Mic Power 3.3v (run) 10K
DTA114YUA
10K
DTA114YUA
4 Mic clock Mic Clock
3
3
5 GND SNIFFER Y_R SNIFFER G_R
6 USB Signal
D 7 USB Pwr Camera Power 3.3v (Camera) D
8 USB Clock
9 Diag CAM Diag Camera/Inverter QUANTA
10 Diag LVDS Diag 5v return (LVDS connector)
11 Diag Loop Diag MB connector (Local Loop) Title
COMPUTER
AUDIO&Sniffer&Camera CONN.

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
REM_DIODE1_N REM_DIODE3_N REM_DIODE4_N
1
1
1
C578 2 Q23 C569 2 Q32 C570 2 Q45
2200P/50V/0402 MMST3904-7-F C214 2200P/50V/0402 MMST3904-7-F C286 2200P/50V/0402 MMST3904-7-F C436
2200P/50V/0402_NC 2200P/50V/0402_NC 2200P/50V/0402_NC
2
+3.3V_RUN
REM_DIODE1_P REM_DIODE3_P REM_DIODE4_P
A
2 Put C149 close to Guardian. Put C150 close to Guardian. Put C151 close to Guardian. A
R257 Put C86 close to Diode Put C87 close to Diode Put C88 close to Diode
10K_0402
1
FAN1_TACH 28 Place under CPU Place under DIMM ( TOP ) Place under Minicard ( BOT )
2
R256
0_0402
D18 JFAN1
1
CHN202UPT_NC FAN1_VOUT
FAN1_VOUT_FB 1
2 Put C144 close to
3
Guardian. U31
3
1
MLX_53398-0371 11 43
3 H_THERMDA 28 THRM_SMBDAT SMDATA VCP1 PWR_MON 45
C284 12 46 VCP2
22U/10V/1206
28 THRM_SMBCLK SMBCLK EMC 4001 VCP2
2
2
REM_DIODE1_P 38 45 REM_DIODE3_P
QFN PIN48
1
C579 REM_DIODE1_N DP1 DP3 REM_DIODE3_N

37 DN1 DN3 44
470P/50V/0402 +RTC_CELL +3.3V_ALW +3.3V_SUS
1
H_THERMDA 41 48 REM_DIODE4_P
DP2 DP4
2
H_THERMDC 40 47 REM_DIODE4_N
3 H_THERMDC DN2 DN4
2
2 REM_DIODE5_P R485 R484 R483
+3VSUS_THRM DP5 REM_DIODE5_N 10K_0402 10K_0402
35 3V_SUS DN5 1
10K_0402_NC
1
REM_DIODE5_N +RTC_CELL 21
1
RTC_PWR3V
ATF_INT# 20 ATF_INT# 29
1
38 SUSPWROK
R480 1 2 1K_0402 THERM_PWRGO 23 VSUS_PWRGD POWER_SW# 3 POWER_ SW_IN0# 28,31
1
B C575 2 Q49 R477 1 2 1K_0402 +3V_PWROK# 16 4 B

38 ICH_PWRGD# 3V_PWROK# ACAVAIL_CLR ACAV_IN 28,40
2200P/50V/0402 MMST3904-7-F C596 25
2200P/50V/0402_NC THERMTRIP_SIO
24
2
SYS_SHDN# THERM_STP# 44
REM_DIODE5_P THERMATRIP1# 17 THERMTRIP1#
THERMATRIP2# 18 27 LDO_SHDN#_ADDR 2 1 +3.3V_SUS
THERMATRIP3# THERMTRIP2# LDO_SHDN#/ADDR R478 7.5K/F_0402
Put C153 close to Guardian. 19 THERMTRIP3#
Put C89 close to Diode LDO_POK 33 2.5V_RUN_PWRGD 38
THERM_VEST 42
R479 1 VSET THERM_LDO_SET
2 1K_0402 26 XEN LDO_SET 28
Place under DIMM ( BOT ) 34 VSS
LDO_OUT 32 +2.5V_RUN
LDO_OUT 31
FAN1_VOUT 7 FAN_OUT_1 THERM_LDO_IN
8 FAN_OUT_2 LDO_IN 30
+3.3V_SUS R475 2 1 10K_0402_NC 29
R467 LDO_IN
T103 PAD 39 FAN_DAC1
49.9/F_0402
+3.3V_SUS 1 2 +3VSUS_THRM +RTC_CELL
26 MDC_RST_DIS# 10 GPIO1
SIO_GFX_PWR 13 9
GPIO2 VDD_3V +3.3V_RUN
5V_CAL_SIO1# 14 GPIO3
1
C595 5V_CAL_SIO2# 15 5
GPIO4 VDD_5V_1 +5V_RUN
C577 .1U/10V/0402 22 6
.1U/10V/0402 32 AUDIO_AVDD_ON GPIO5 VDD_5V_2
36
2
GPIO6/FAN_DAC2
EMC4001
+2.5V_RUN
Placement should be near the WWAN minicard
1
C C
+3.3V_SUS
connector just under the inserted minicard.
R473
+5V_SUS +3.3V_SUS Voltage margining 31.6K/F_0402_NC
1
C617 needs to be placed circuit for LDO
2
near Guardian IC. R482 Thermistor P/N: +3.3V_SUS THERM_LDO_SET
output.For Vmargin
2
8.2K_0402
TH11-3H103FT
1
R357 R360 stuff R592 and
1
2.2K/F_0402 10K_0402 R113=30K. R113=1K for 0603 R474
2
THERMATRIP1# R476 1K_0603

production. package.
8.2K_0402
1
VCP2 1 2
2
3
R486 2.2K_0402 Q47 C593 R355 10K/F_0603
2
2
+1.05V_VCCP 1 2 THERM_B1 2 MMST3904-7-F .1U/10V/0402 0603 THERMATRIP3#

2 5V_CAL_SIO1#
package.
2
C411
1
2200P/50V/0402 Q42
3 H_THERMTRIP#
1
2N7002W-7-F +3.3V_RUN Layout Note:

Place those capacitors THERM_LDO_IN 1 2 +3.3V_RUN
R472 0_1210
close to EMC4001. This Value of
1
1
R396 can be 0.27
1
+3.3V_SUS C592 C591 C590 C589
.1U/10V/0402 10U/6.3V/0805 .1U/10V/0402 1U/10V/0603 or 0 ohm
2
2 and the package
2
1
is 1210.
C613 needs to be placed R481 +3.3V_SUS
near Guardian IC. 8.2K_0402
R465 332K/F_0402
D 1 2 THERM_VEST Note: +5V_RUN +2.5V_RUN D
2
THERMATRIP2# VSET = (Tp-70)/21, where

1
Tp = 70 to 101 degrees C.
1
2 C586
QUANTA
3
1
Q48 C594 C567 R466 C580 Tp set at 88 degrees C. .1U/10V/0402_NC
+1.05V_VCCP 1 2 THERM_B2 2 .1U/10V/0402 .1U/10V/0402 118K/F_0402 2200P/50V0402Guardian temp tolerance = C588 C587 C584
2
R487 2.2K_0402 MMST3904-7-F .1U/10V/0402 10U/10V/0805 10U/4V/0805_NC

+-3 degrees C. COMPUTER
2
2
1
Title
6 THERMTRIP_MCH#
FAN & THERMAL

C & G UMA 2A

1 2 3 4 5 6 7 8
A B C D E
+3.3V_LAN +1.8V_LOM
+3.3V_LAN
+3.3V_SUS +3.3V_LAN
1
1 1
C137 C148 C131 C126 C127 C124 C144 C70 C109 C85 C57 C54 C55 C52 C102 C146 C56 C145 C114 C121 C117
4.7U/6.3V/0603 1000P/50V/0402 47P/50V/0402
2 47P/50V/0402 .1U/10V/0402 47P/50V/0402 47P/50V/0402 1000P/50V/0402 1000P/50V/0402 47P/50V/0402 47P/50V/0402 .1U/10V/0402 1000P/50V/0402 1000P/50V/0402 47P/50V/0402 47P/50V/0402 47P/50V/0402 47P/50V/0402 47P/50V/0402 .1U/10V/0402 4.7U/6.3V/0603 1 2
2
R354 0_0805
Close to power pins

Refer to M07_LOM4401_X06 schematic.
Refer to M07_LOM4401_X06 schematic. 0.1U*13 pcs EMI requirement on 0812 '+3VLAN should be sourced from
+3VSUS instead of +3VSRC since WOL
These three pin is not supported on Cosica/Gilligan.
LINK_LED10#,
LINK_LED100#,
ACT_LED are
TH27 TH26
H-RE16X87DR16X87P2
H-RE87X16DR87X16P2 open-drain type.
+3.3V_LAN +1.8V_LOM
+3.3V_LAN
2
R82
114
115
125
106
112
R79 10K_0402_NC
25
56
19
30
40
52
79
94
65
96
97
91
92
17
44
U7
7
R71 10K_0402_NC
10K_0402_NC Place C69, R66, C80
VDDCORE
VDDCORE
VDDCORE
VESD
VESD
VESD
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO
VDDIO
VDDIO
XTAL_AVDD
REGULATOR_AVDD
REGULATOR_AVDD
REGULATOR_VOUT1
REGULATOR_VOUT2
1
close to pin69.
2 +3.3V_LAN 2
12,20 PCI_AD[31..0] 3
PCI_AD31 122 75 1 2
PCI_AD31 LINK_LED10# LINK_LED10# 36
PCI_AD30 123 76 R66
PCI_AD30 LINK_LED100# LINK_LED100# 36
PCI_AD29 124 77 BK1608LM152
PCI_AD29 ACT_LED# ACTLED# 36
1
PCI_AD28 126 78
PCI_AD28 COL_LED# T6
PCI_AD27 127 C69 C157 C80
PCI_AD26 PCI_AD27 47P/50V/0402 .1U/10V/0402 .1U/10V/0402
128
2
PCI_AD25 PCI_AD26 +1.8V_LOM
1 PCI_AD25
PCI_AD24 3 69 +3.3V_LAN_BIAS_AVDD 3
PCI_AD23 PCI_AD24 EPHY_BIAS_AVDD
6 PCI_AD23
PCI_AD22 8 57 1 2
PCI_AD21 PCI_AD22 EPHY_AVDD L47
9 PCI_AD21 3
PCI_AD20 10 64 +1.8V_LOM_PLLVDD 1 2 +1.8V_LOM BK1608LM152
PCI_AD20 EPHY_PLLVDD
1
PCI_AD19 11 L7
PCI_AD18 PCI_AD19 BK2125LM152 C53 C252Place
14 PCI_AD18
L47, C53
1
PCI_AD17 15 Place R942 47P/50V/0402 .1U/10V/0402
close to pin57.
2
PCI_AD16 PCI_AD17 C42 C38
16 PCI_AD16 EPHY_VREF 71 close to U62.72
PCI_AD15 33 72 47P/50V/0402 2.2U/6.3V/0603
2
PCI_AD14 PCI_AD15 RDAC R59 1.27K/F_0402 Place L90, C1295, C1296
34 PCI_AD14 EPHY_TESTMODE 88
PCI_AD13 36 close to pin64.
PCI_AD12 PCI_AD13
37 PCI_AD12 EPHY_TDP 62 LOM_TX+ 36
PCI_AD11 38 61
PCI_AD11 EPHY_TDN LOM_TX- 36
PCI_AD10 39 59
PCI_AD10 EPHY_RDP LOM_RX+ 36
PCI_AD9 41 60
PCI_AD9 EPHY_RDN LOM_RX- 36
PCI_AD8 42
PCI_AD7 PCI_AD8
45 PCI_AD7 NC 104
PCI_AD6 48 105 Resistors must be rated at least
PCI_AD6 VSS
1
PCI_AD5 49 103 1/16W. Place termination
PCI_AD4 PCI_AD5 NC
50 PCI_AD4 NC 108 resistors close to the ASIC.
PCI_AD3 51 102 R37 R38 R36 R35
PCI_AD2 PCI_AD3 NC 49.9/F_0402 49.9/F_0402 49.9/F_0402 49.9/F_0402
53 PCI_AD2 NC 109
3 PCI_AD1 54 110 +3.3V_LAN 3
2
PCI_AD0 PCI_AD1 NC
55 PCI_AD0 NC 107
1
12,20 PCI_C_BE3# 4 PCI_CBE_L3 GPIO2/VAUXAVAIL 87 2 1
18 86 R63 1K_0402 C44 C43
12,20 PCI_C_BE2# PCI_CBE_L2 GPIO1 T8
32 85 .1U/10V/0402 .1U/10V/0402
12,20 PCI_C_BE1# T7
2
PCI_CBE_L1 GPIO0 Delete R630&R631 +3.3V_LAN
12,20 PCI_C_BE0# 43 PCI_CBE_L0
20 90 per 4401 ref
12,20 PCI_FRAME# PCI_FRAME_L BOOTROM_SCL T51 schematic
12,20 PCI_IRDY# 21 PCI_IRDY_L BOOTROM_SDA 93 T55
23 U10
12,20 PCI_TRDY# PCI_TRDY_L
26 98 SPROM_CS 1 8
12,20 PCI_DEVSEL# PCI_DEVSEL_L SPROM_CS CS VCC
1
27 95 SPROM_CLK 2 7 C143
12,20 PCI_STOP# PCI_STOP_L SPROM_CLK SK NC
28 101 SPROM_DOUT 3 6 C253 47P/50V/0402
12,20 PCI_PERR# PCI_PERR_L SPROM_DOUT DI ORG
29 99 SPROM_DIN 4 5 .1U/10V/0402 Note: BCM4401 requires
12,20 PCI_SERR#
2
PCI_SERR_L SPROM_DIN DO GND
12,20 PCI_PAR 31 PCI_PAR
12 PCI_PIRQB# 116 M93C46-WDW6TP 16-bit R/W data width
PCI_INT_L
EXT_POR_L 89 LOM_LOW_PWR# 29
12,20 PCI_RST# 117 PCI_RST_L
17 CLK_PCI_LOM 118 PCI_CLK JTAG_TDP 83 Note: The BCM4401 has weak internal pulldown resistors on
12 PCI_GNT0# 119 80 Note: EXT_POR_L has a internl pull up.
PCI_GNT_L JTAG_TCK the following signals:
38 12 PCI_REQ0# 121 PCI_REQ_L JTAG_TDI 82
R130
20,29 SYS_PME#
PCI_IDSEL
113 PCI_PME_L JTAG_TRST_L 73 SPROM_CS, SPROM_CLK, SPROM_DOUT, SPROM_DIN.
5 PCI_IDSEL JTAG_TMS 81
10_0402 PCI_AD16 1 2 22
Place R948, C1300 R111 100_0402 PCI_CLKRUN_L
EPHY_BIAS_AVSS
13,20,28 CLKRUN#
close to U62.118 67 XTAL_IN
1
EPHY_PLLGND
EPHY_AGND
C147 66
XTAL_AVSS
8.2P/50V/0402 XTAL_OUT
2
Refer to M07_LOM4401_X06 schematic.

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
R948 and R949 removed from

4 4
schematic because of Bios can
R43 BCM4401KQLG
configure the state of CLKRUN#
12
46
111
100
84
2
24
74
13
47
120
35
68
70
58
63
800_0402
signal. Y1 BCM4401 B0
2
25MHz
XI 2 1 XO QUANTA
COMPUTER
1
C66 C35 Title

27P/50V/0402 27P/50V/0402 LAN (BCM4401)
2

C & G UMA 2A

A B C D E
A B C D E
4 4
2 1 CON1
35 LINK_LED10#
R307 150_0402 TYC_1368458-1
17 GREEN
35 LINK_LED100# 2 1 15 ORANGE
+3.3V_LAN R306 150_0402
3
L46
G
O
BK2125LM152 16 COMMON
35 LOM_TX+ 11 TRD1+/TX
12 TRCT1/TX
35 LOM_TX- 10 TRD1-/TX
35 LOM_RX+ 4 TRD2+/RX
3 3
6 TRCT2/RX
35 LOM_RX- 5 TRD2-/RX
14 LED2_YP
13 LED2_YN Y
1 1
2 2
3 3
7 7
8
MGND
MGND
8
9 9
Place close
to CON1.6 & C376 C375
18
19
CON1.12. 47P/50V/0402 .1U/10V/0402
Place close
to CON1.6.
35 ACTLED# 1 2
R305 150_0402
2 2
1 1
QUANTA
Title
COMPUTER
LAN Jack

C & G UMA 2A

A B C D E
A B C D E
Power & Suspend. +3.3V_ALW +5V_SUS +5V_SUS
1
R524 R540
10K_0402 100K_0402
+3.3V_ALW +3.3V_ALW
2 1
2
Battery status.
1
U8
1
Q19
1 3 2 4 BREATH_PWRLED
1 2 RBREATH_PWR_LED
2 1 Q18 DTA114YUA
1 28 BREATH_LED# 47K 1
Q63 R41 220_0402 D6 DTA114YUA
47K
2N7002W-7-F 19-217BHCYL2M2TY3T +5V_ALW 2 BAT2_LED# 28
74LVC1G04GW 28 BAT1_LED# 2 10K
3
10K BAT1_LED_B# 3 1 RBAT1_LED 2 1
D8 R104 220_0402
19-22UYOSUBC
3
3
4 2 RBAT2_LED 1 2 BAT2_LED
3
34 R103 220_0402
47K
2
This circuit is +3.3V_RUN +5V_RUN
only needed if the HDD activity LED. 47K Q64
platform has the DTC144EUA
1
R146
SNIFFER.
1
10K_0402 Q21
1
1 2 DTA114YUA
R141
10K_0402_NC
2
47K
11 SATA_ACT# 1 3 2
Q65 10K 34
+3.3V_ALW 2N7002W-7-F
2
+5V_RUN
WLAN
3
1
HDD_LED 1 2 RHDD_LED2 1
R525 R76 220_0402 D7 +3.3V_RUN
2
10K_0402_NC 22 19-217BHCYL2M2TY3T
+3.3V_WLAN R118
2
LED_MASK# 27 R67 220_0402

29 LED_MASK#
1
0_0402
1
2 R561 2
47K_0402 LED_WLAN_OUT
1 2
D9
1
19-217BHCYL2M2TY3T
2
2 1 2 Q20
24 LED_WLAN_OUT#
R559 10K_0402 MMBT3906-7-F
3
3
47K Q66
2
34 34 DTC144EUA
+3.3V_RUN
BT +5V_RUN +5V_RUN
47K
1
2
R543 17 R338
100K_0402 100K_0402_NC
47K
2
Q11
1
24 LED_WPAN# 1 BT_ACTIVE# 2 DTA114YUA

10K
3
Q67
3
SI2301BDS-T1-E3 2 BT_ACTIVE
2 Q68 18
3
2
Q22
1
2
2N7002W-7-F R190
1
R544 2N7002W-7-F 100K_0402_NC BT_LED 1 2 BT_LED_R 2 1

100K_0402 R128 220_0402 D10 This circuit is only needed if
BT_MASK 19-217BHCYL2M2TY3T
the platform has the SNIFFER.
1
1
3 3
6
3
R331
29 LED_MASK# 2 0_0402_NC 2 1 BT_ACTIVE
R560 10K_0402
Q40
1
1
2N7002W-7-F This circuit is only needed if
Q35 2 LED_MASK#
the platform has the SNIFFER. MMBT3906-7-F_NC
3
+3.3V_RUN
1 2 J2
R545 0_NC
1 GND Activity LED 2
3 3.3V(Logic) COEX2 4 COEX2_WLAN_ACTIVE 24
+3.3V_RUN 5 6 COEX1_BT_ACTIVE_DC
29 BT_RADIO_DIS_DC# Radio Enable/Disable# COEX1 COEX1_BT_ACTIVE_DC
PAD T32 7 RSVD USB- 8 ICH_USBP7- 12
12 ICH_USBP7+ 9 USB+ GND 10
5
U34
24 COEX1_BT_ACTIVE_MINI 2 TYC_1566995-1
2
4 COEX1_BT_ACTIVE 24
1
1
COEX1_BT_ACTIVE_DC 1 R574
C194 C206 Bluetooth 10K_0402 R195 C198
TC7SZ32FU 0.1U/10V 100P/50V/0402 10K_0402 33P/50V/0402
2
2
1
1
18
1 2
R571 0_NC
4
44 4
QUANTA
Title
COMPUTER
SWITCH & LED

C & G UMA 2A

A B C D E
1 2 3 4 5 6 7 8
Non-iAMT
R9 0_0402
42 1.25V_RUN_PWRGD
+3.3V_RUN +3.3V_SUS
R19 0_0402
43 1.5V_RUN_PWRGD
R18 0_0402
43 1.05V_RUN_PWRGD
34 R11 0_0402_NC R363
34 2.5V_RUN_PWRGD
R351 100K_0402
2.2K_0402_NC
A A
+5V_RUN +5V_ALW
ICH_PWRGD# 34
3
D4
SDMK0340L-7-F 2 Q43
1
2N7002W-7-F
2 1 2 Q3
1
R14 MMBT3906-7-F
10K_0402
3
C20 Q1 U28D
.1U/10V/0402 C15 2 MMST3904-7-F 12
13,28,45 IMVP_PWRGD
R13 2200P/50V/0402 R10 11 ICH_PWRGD 6,13
200K_0402 4.7K_0402 13
28 RESET_OUT#
1
SN74AHC08PW
Keep Away from high speed buses
+3.3V_SUS +3.3V_ALW +3.3V_ALW +3.3V_ALW
R369
20K_0402 C438
.1U/10V/0402
5
+3.3V_RUN +3.3V_ALW U27A U27B
B B
1 6 3 4
D5 C424
1
SDMK0340L-7-F R17 .1U/10V/0402

10K_0402 Q4 C432 NC7WZ14P6X_NL NC7WZ14P6X_NL
14
2 1 2
MMBT3906-7-F .01U/25V/0402 U28A
1
3
C18 Q2 3
C23 R16 2200P/50V/0402 2 MMST3904-7-F 2
200K_0402 R12 18,28,39 RUN_ON R373
.1U/10V/0402
4.7K_0402 0_0402 SN74AHC08PW
1
U28B
4
5V_3V_1.8V_1.25V_RUN_PWRGD 29 6 RUNPWROK 28,29,45
5
SN74AHC08PW
U28C
28,39 SUS_ON 9
8 SUSPWROK 34
10
SN74AHC08PW
C C
+3.3V_SUS +3.3V_ALW +3.3V_ALW
C417
D28 .1U/10V/0402
1
SDMK0340L-7-F R356
2 1 10K_0402 2 Q41
MMBT3906-7-F
5
D29 U26
3
SDMK0340L-7-F
C410 R347 C408 2 1 2 4
.1U/10V/0402 200K_0402 2200P/50V/0402
3
NC7SZ14P5X_NL
R343
200K_0402
+5V_SUS +5V_ALW
D31
1
SDMK0340L-7-F R365
2 1 10K_0402 2 Q44
MMBT3906-7-F
D30
3
SDMK0340L-7-F
D C415 R364 C419 2 1 D
.1U/10V/0402 200K_0402 2200P/50V/0402
R361
200K_0402
R353
200K_0402
QUANTA
Title
COMPUTER
System Reset Circuit

C & G UMA 2A

1 2 3 4 5 6 7 8
1 2 3 4 5
39
+3.3V_ALW2 +5V_ALW2 +15V_ALW +3.3V_ALW +3.3V_SUS

+3.3V_ALW2 +5V_ALW2 +15V_ALW +5V_ALW +5V_RUN PQ17
PQ27 34 SI4800BDY-T1-E3
SI4800BDY 8 3
1
8 3 7 2
1
7 2 PR190 PR53 PR52 6 1
PR189 PR180 PR179 6 1 100K_0402 100K_0402_NC 100K_0402 5
2
100K_0402 100K_0402_NC 100K_0402 5 PC54
1
PC177 PR178 10U/6.3V/1206 PR54
4
10U/25V/1206 20K_0402 SUS_3.3V_ENABLE 20K_0402
2
RUN_ENABLE
3
A A
1
3
SUS_ON_3.3V# 5
RUN_ON_5V# 5 PQ16A
1
PQ38A 2N7002DW
4
6
1
2N7002DW PC178 2 PC53 PR51
28 3.3V_SUS_ON
4
2 4700P/50V/0603 PQ16B 4700P/50V/0603 100K_0402_NC
18,28,38 RUN_ON
PQ38B 2N7002DW
2
1 2N7002DW
2
+5V_ALW +5V_SUS
PQ26
+3.3V_ALW2 +5V_ALW2 +15V_ALW SI4800BDY-T1-E3
8 3
39 7 2
1
6 1
1
PR79 PR78 5
2
PR191 100K_0402_NC 100K_0402
1
100K_0402 PC80 PR74
4
10U/6.3V/1206 20K_0402
2
SUS_5V_ENABLE
1
3
SUS_ON_5V# 5
PQ28A
1
2N7002DW
1
2 PC86 PR77
28,38 SUS_ON
PQ28B 4700P/50V/0603 100K_0402_NC
2N7002DW
2
B B
2
www.kythuatvitinh.com +3.3V_ALW2 +5V_ALW2 +15V_ALW +3.3V_ALW
8
PQ35
PHK12NQ03LT
3
+3.3V_RUN
Reserve discharge path

+1.8V_SUS +5V_SUS +3.3V_SUS
1
7 2
1
PR192 6 1
1
100K_0402 PR48 PR49 5
1
100K_0402_NC 100K_0402 PC142 PR140 R522 R523 R514
C C
PD5 10U/6.3V/1206 20K_0402 30/F_0402_NC 1K_0402_NC 1K_0402_NC
2
CH751H-40HPT_NC
2
1 2 2
3 2
3 2
3 2
3
PR50
1
5 0_0402 SUS_ON_5V# 2 2 2
PQ12A 1 2 PC52
6
2N7002DW 4700P/25V/0402 Q59 Q60 Q54

4
1
2 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC
28 3.3V_RUN_ON
PQ12B
2N7002DW
1
Reserve discharge path

34
+5V_RUN +3.3V_RUN +1.5V_RUN +0.9V_DDR_VTT +1.25V_RUN
1
R237 R243 R239 R496 R268

1K_0402_NC 10_0402_NC Delete 1K_0402_NC 1K_0402_NC 1K_0402_NC
+1.8V_RUN
3 2
3 2
3 2
3 2
3 2
discharge
D circuit per D
RUN_ON_5V# 2 2 UMA no need 2 2 2
Q27 Q29 Q28 Q50 Q33

QUANTA
1
2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC
Title
COMPUTER
RUN POWER SW

M-08 2A

1 2 3 4 5
A B C D E
Id=9.6A@Vgs=10V
+PWR_SRC PQ31
57 SI4835BDY-T1-E3
Need to update QCI PN
1 8
2 7
PQ4 54 3 6
SI4835BDY-T1-E3 CHGR_IN 5
PR35 FL5
8 1 .01/F_2512 FBMH3225HM202NT
1 4
+DC_IN_SS +DC_IN_SS 7 2 1 2 1 2 +DC_IN_SS
6 3
5 PR112
1
PC28 PC29
1 470K_0402 1
4
PR36 2200P/50V0402 .1U/50V/0603
2
PR37 100K_0402
1 2 2 1
10K_0402
CSSP
3
2
PQ6
1
2N7002W-7-F
CSSN
+DC_IN_SS
LDO
2
PD10 +5V_ALW
1
SDM10K45
1
PC27 PC30 PC95 PC25
2
PR118 PC109
1
365K/F_0402 PR114 0_0603 2200P/50V0402 .1U/50V/0603 10U/25V/1206 10U/25V/1206
28
27
2
1
1U/25V/0805 PD9
2
PR117 SDM10K45_NC
CSSP
GND
CSSN
LDO 49.9K/F_0402 22 PC41 1U/10V/0603
1
DCIN LDO
2 1 2 1
1
1
2 1 8731_ACIN 2 25 BST RDS(ON)=30m ohm
ACIN BST
5
6
7
8
2 PR46 PR109 PC102 2
1
10K/F_0402 PC112 .01U/25V/0402 33/F_0603 .1U/50V/0603 PQ5 PR100
21 4 SI4800BDY-T1-E3 1K_0402_NC
2
LDO +VCHGR_1
28,34 ACAV_IN 13
2
ACOK PC108 PL1 PR34 FL6
VCC 26 2 1
1
11 3300P/50V/0402 5.8UH 30% 5.5A 24m(SIL104R-5R8PF) .01/F_2512 HI1206T161R-10
+3.3V_ALW
1
2
3
VDD DHI PC110 1U/10V/0603
DHI 24 1 2 2 1CHG_CS 1 2 1 2 +VCHGR 41
PR47 1 2
5
6
7
8
1
15.8K/F_0402 MAX8731ETI+ LX 23 LX PR113
4
PC136 .1U/50V/0603 1_0603
2
1
10 20 DLO 4 PR105 PC196 PC195 PC84 PC16
28,41 PBAT_SMBCLK SCL DLO
1
3300P/50V/0603
1000P/50V/0402
.1U/50V/0603
9 3.8_0805_NC PC21 PC20 PC197
28,41 PBAT_SMBDAT SDA
2200P/50V0402
14 19 RDS(ON)=20m
2 2
2
BATSEL PGND
10U/25V/1206/X5R
10U/25V/1206/X5R
10U/25V/1206/X5R
SMBUS Address 12 GNDA_CHG
1
2
3
2
IINP 8 IINP CSIP 18 ohm PQ7
12H
Adress :
SI4810BDY-T1-E3 PC100
17 1000P/50V/0402_NC
1
CSIN
6 CCV
PR130 PR134 CSIP Max Charging current
2
10K_0402 5 15 2 1+VCHGR
CCI FBSA CSIN setting 4.7A
FBSB 16
2
4 100_0402
CCS PC107
GND
DAC
1
PC137 3 220P/50V/0402
1
REF
1
1
.1U/10V/0402
PR139 PC43 PC127 PC126

TABLE 1
1 7
12
8.45K_0402 8731REF PU8

1
.01U/25V/0402
.01U/25V/0402
.01U/25V/0402
2
PC123 PC130
2
1U/10V/0603
3 .1U/10V/0402 3
TRIP CURRENT
2
PR138 0_0603
ADAPTER(W) PR99 PR106 PR110 **PR96
(A)
GNDA_CHG 65 3.17 57.6K 13K 105 N/A
90 4.43 51.1K 17.8K 348 33.2K
+3.3V_ALW
130 6.43 32.4K 20.5K 100 27.4K
150 7.43 30.9K 24.9K 432 88.7K
1
+5V_ALW
+5V_ALW PR42
1
100K_0402
PR95 PC47
200 9.75
11.28
19.1K 28K 301 36.5K
1
PR99 1M/F_0402 PC50 100P/50V/0402

230 (see note3) 32.4K 6.49K 115 N/A
2
1
51.1K/F_0402 ADAPT_OC 29
SEE TABLE 1 SEE TABLE 1 .01U/25V/0402 PR45
2
100K_0402 Note 1: PR96 is popluated if ADAPT_TRIP_SEL is used to program for

the next lower adapter.
3
PU6A
2
8
SEE TABLE 1 LM393DR2G 1 ADAPT_TRIP_SET is floating for the higher adaptor,

1 2 3 PR39
29 ADAPT_TRIP_SEL grounded for the lower adaptor.
PR96 33.2K/F_0402 1 2 PQ8 1K_0402_NC
1 2 2 2N7002W-7-F
0_0402PR188
0_0402PR188 Note 2: 24.9K at PR96 allows the 65W adaptor seetting to switch
2
1
PC96
4
down to 45W.
1
.01U/25V/0402
1
4 PR106 PC48 PC42 4

1
17.8K/F_0402 PC97 100P/50V/0402 .1U/10V/0402_NC Note 3: PR35 must be 5mOhms instead of 10mOhms for the 230W adaptor.
2
SEE TABLE 1 100P/50V/0402

2
QUANTA
1
PC49
.01U/25V/0402
PR110
348/F_0402
SEE TABLE 1 For GPRS immunity place PC41 & PC39 as close to Title
COMPUTER
2
CHARGER
the IC as possible
GNDA_CHG Size Document Number Rev
FM5 2A

A B C D E
A B C D E
+3.3V_ALW
PD4 PD3 PD2
2
DA204U_NC DA204U_NC DA204U_NC PD1
DA204U_NC
PC15 2200P/50V0402
1 2 +3.3V_ALW
3
1 1
PC19 .1U/50V/0603
1 2 +VCHGR 40
1
PR15
JABT1 10K_0402
1 RP2 SMBUS Address 16
BATT1+ 4P2R-100
2
Adress : 16H
2
BATT2+
SMB_CLK 3 1 2 PBAT_SMBCLK 28,40
SMB_DAT 4 3 4 PBAT_SMBDAT 28,40
BATT_PRES# 5
SYSPRES# 6 1 2 PBAT_PRES# 29
BAT_ALERT 7 3 4 PBAT_ALARM#
BATT1- 8
9 RP1
BATT2- 4P2R-100
SUY_200185MR009S509ZL +5V_ALW
+3.3V_ALW
2
PD8
DA204U
1
PR85
2.2K_0402
3
PQ29
2
2N7002W-7-F
PR82
DOCK_PSID 3 1 1 2 PS_ID 28
2 2
100_0402
2
PR81 +5V_ALW +5V_ALW
100K/F_0402
2
2
1
2
PD7
D19 PR83
DA204U
3
SSM24PT_NC 10K_0402
2
3
1 2 PS_ID_DISABLE# 29
1
1
PQ30
PR80 MMST3904-7-F PR84 100_0402_NC
15K/F_0402
2
PL11
1 2 DOCK_PSID
BLM11B102S
3
Change Value per GG updated 3
EMI requirement on 0812
JDCIN1 PQ3
FOXCONN_JPD113D-509-TR +DC_IN SI4835BDY-T1-E3 +DC_IN_SS
1 FL2
BLM41PG600SN1L 1 8
2 +DCIN_JACK 1 2 2 7
1 2 3 6
1
1
3 BLM41PG600SN1L 5 1 PC5
1
FL1 PC1 +
1
PC3 PR4 PC93 PC4
10U/25V/1206
9
8
7
6
5
4
-DCIN_JACK .1U/50V/0603 PR2 10K/F_0603

2
2
3
240K_0402 .01U/50V/0603 .1U/50V/0603 .1U/50V/0603

1
2
2
RV2 RV1 PC2

1
VZ0603M260AGT_NC VZ0603M260AGT_NC .47U/25V/0805

2
PQ1
28 AC_OFF
2
IMD2A_NC
PR3
47K_0402
1
4 4
QUANTA
Title
COMPUTER
DCIN,BATT CONNECTOR

FM5 2A

A B C D E
5 4 3 2 1
+PWR_SRC PJP23 +DC_PWR_SRC

POWER_JP
1 2
1
PC166 PC169 PC64 PC65
1
PC168 PC165 PC70 PC71 + +
1
+ + PR56 PR57
2200P/50V/0402
10U/25V/1206
.1U/50V/0603
10U/25V/1206_NC
0_0805 0_0805
2200P/50V/0402
10U/25V/1206
10U/25V/1206
.1U/50V/0603
2
+5V_VCC3
2
D D
2
PC163 PR59
1
0_0402_NC
.1U/50V/0603
1
PR155
1.8 Volt +/- 5%;f=400kHz
2
0_0402
1 2
Thermal Design current: 5.61A PR156
1.25V +/- 5%;f=300kHz
2
Maximum current: 8.015A 2 1
0_0402_NC PC164 PR154
PR153 .1U/25V/0603 Thermal Design Current: 0.924A
OCP: 12.36A 10K/F_0603
2
2 1 0_0402_NC
PC185 1 2 Maximum Current: 1.32A
2 1
+1.8V_SUS
.1U/50V/0603 OCP: 1.67A
8
7
6
5
4
3
2
1
PC180 PR157 +3.3V_ALW
LDOREFIN
LDO
VIN
EN_LDO
VCC
TON
VREF3
REF
2
16.9K_0603
.1U/25V/0603_NC
2
+1.25V_RUN
1
9 32 PR158 PR168
BYP REFIN2
1
10 31 100K/F_0402 100K/0603_NC
PJP10 PJP9 OUT1 PU9 ILIM2 1 2
11 FB1 OUT2 30
2
POWER_JP POWER_JP PR65 309K/F_0402 12 29 1 2
1
ILIM1 SKIP#
5
1 2 13 MAX8778ETJ+ 28 0_0402 PR173
0_0402PR173 PJP11
POK1 POK2 1.25V_RUN_ON 28 D1 D1
28 DDR_ON 14 27 PQ23B POWER_JP
2
EN1 EN2 1.25V_DH 4

15 UGATE1 UGATE2 26 FDS8984
8
7
6
5
C 16 25 G1 C
1
PHASE1 PHASE2 PL9
37 PAD S1
LGATE1
LGATE2
PQ19 4 1.8V_DH 36 6.8uH_SIQ74-6R8_2.1A/45mohm
BOOT1
BOOT2
SECFB
3
PAD
PGND
PVCC
FDS8878 1.25V_LX +1.25V_RUN_P
GND
PAD
PAD
PAD
PL8
1
PC61
3
2
1
1.0UH_SIL104_11A/6mohm 2 PC172 D1 D1 + +
35
34
33
17
18
19
20
21
22
23
24
+1.8V_SUSP 2 1 1.8V_LX .1U/25V/0603 1.25V_DL 2 PC59
10U/25V/1206_NC
2
PC171 G1 PQ23A
1
2
1
.1U/25V/0603 PR171 1 PR172 2 PC187 FDS8984
150U/2V/ESR18
S1
9
8
7
6
5
PQ20 1_0603 1_0603 4700P/50V/0603_NC Rdson=30mOhm
1
1
+ + FDS6680AS 1 2
2
PC60 PC162 PC58 Rdson=12.5mOhm 4 1.8V_DL Del PC66
.1U/25V/0603
330U/2.5V/ESR15
330U/6.3V/ESR25_NC
+5V_ALW
1
+3.3V_ALW PC181
3
2
1
2
1
PC179 .1U/25V/0603_NC
PR162 4700P/50V/0603 +5V_VCC3
PR58
1
27.4K/F_0603
2
2
2 1
PR167 PR164
1
10_0603 100K/F_0402
100K_0402_NC
PC174 PC66
PR163 1U/10V/0603 1U/10V/0603
2
1
17.4K/F_0603 Power Sequencing, Vcore Regulator
1.25V_RUN_PWRGD 38
2
1.8V_SUS_PWRGD 28 Power Sequencing

SJ5
B B
2 2 1 1
Jump20X10
0.9V +/- 5%
Design current 1.05 A
+1.8V_SUSP +5V_ALW V_DDR_MCH_REF +0.9V_P
Peak Current 1.5 A
+0.9V_DDR_VTT
PJP21
U32
10 IN VTT 3 1 2
1 2 2 VLDOIN POWER_JP
PJP22 5
POWER_JP VTTSNS
1 VDDQSNS
VTTREF 6
28 0.9V_DDR_VTT_ON 7 S3 (STBY)
2
PC159
4 10U/6.3V/0805
PGND PC158
9
PAD
28 DDR_ON
1
S5 (OFF)
1
8 10U/6.3V/0805
AGND PC157
2
PC161 TPS51100
.1U/25V/0603
11
A 10U/4V/0603_NC PC160 A
.1U/25V/0603
1
QUANTA
Title
COMPUTER
1.25V,1.05V,1.8V,0.9V

FM5 2A

5 4 3 2 1
5 4 3 2 1
+1.5V_RUN /+1.05V_VCCP /+3.3V_ALW /+3.3_RTC_LDO

+PWR_SRC
PJP2 +DC2_PWR_SRC
POWER_JP
1 2
D D
PC145
1
+ PC141 + PC140 PC143
.1U/50V/0603
PC46 PR38 PR41
2200P/50V/0402
1
2
1
1
0_0805 0_0805
10U/25V/1206
10U/25V/1206
2
2
+ PC138 PC51
.1U/50V/0603
2
10U/25V/1206 2200P/50V/0402
2
2
PC111
2
.1U/50V/0603 Note:PC104 use
0.1uFfor Intersil,
1
Use 1uF for
MAX8778
+5V_VCC2 +3.3V_RTC_LDO
1.5V +/- 5% ; f=200kHz
Thermal Design Current: 2.3A
1.05V +/- 5%; f=300kHz
Maximum Current: 3.3A
2
UMA Thermal Design Current: 12.3A
1
PR116 PR119
OCP: 4.15A PR124 0_0402 PC104
0_0402 PR120
0_0402
PR121 1U/10V/0603 UMA Maximum Current:17.5A
2
93.1K/F_0402_NC 105K_0402_NC
UMA OCP: 21.94A
1
+1.5V_RUN 1 2 1 2
1
+1.05V_VCCP
REF
2
6
1 2
5
6
7
8
C PJP3 PQ14B D1 D1 C
POWER_JP FDS8984 4 1.5V_DH PR115 PC105 PQ15
1
1G 0_0402_NC .1U/25V/0603 1.05V_DH 4 FDS6298
2
8
7
6
5
4
3
2
1
S1 PJP4 PJP5
1
POWER_JP POWER_JP
LDOREFIN
LDO
VIN
EN_LDO
VCC
TON
VREF3
REF
3
5.2UH_SIL104R_5.5A/22mohm
1
2
3
+1.5V_RUN_P 2 1 1.5V_LX PL6
2
PL5 PR125 0.45U_MPC1040LR45_25A_20%
7
9 32 174K_0603 1.05V_LX 2 1
D1 D1 BYP REFIN2
10 OUT1 ILIM2 31 1 2
2
1
21.5V_DL 11 FB1
PU7
OUT2 30 PC186
5
6
7
8
9
1
PR122 PQ14A 1G 1 2 12 29 2 PR150 1 PC153 PC154
ILIM1 SKIP#
1
1
0_0402_NC FDS8984 S1 PC188 PR126 POK1 13 MAX8778ETJ+ 28 0_0402 POK2 2200P/50V0402 + +
2
POK1 POK2
1
PC144 + Rdson=30mOhm 4700P/50V/0603_NC 249K_0402 EN1 MAX8778 EN2 1.05V_DL 4 PC156 PC152
330U/2V/ESR6
330U/2V/ESR6
14 27
1
PC155 PC139 EN1 no QCI P/N EN2

15 26
1
2
UGATE1 UGATE2
1
.1U/25V/0603 PQ13 PR55 PR151
.1U/25V/0603
10U/6.3V/1206
16 25
2
PHASE1 PHASE2
SI7336ADP
10U/6.3V/1206
150U/2V/ESR18
37
1
2
3
PAD
2
LGATE1
LGATE2
2/F/1206
2/F/1206
36
BOOT1
BOOT2
SECFB
PAD
2
PGND
PVCC
PR123 Rdson=4.0mOhm
GND
PAD
PAD
PAD
1
0_0402_NC PC129 PC135
2
2
.1U/25V/0603 .1U/25V/0603
1
PC116 PR137
1
35
34
33
17
18
19
20
21
22
23
24
2
.1U/50V/0603_NC PR136 1_0603
1
1_0603 1 2
2
1 2
PC128
.1U/25V/0603_NC
1
+5V_VCC2 PR108 +5V_ALW
10_0603
B
1 2 B
Notes:
SJ2
1. For Inspirion +3.3V_ALW2 becomes +3.3V_ALW.
1
1
2 2 1 1
PC101 PC132 2. For Inspirion +3.3V_ALWP becomes +3.3V_SUSP.
1U/10V/0805 1U/10V/0603 3. For Inspirion +5V_ALW2 becomes +5V_ALW
2
Jump20X10
For Inspirion see note 3

+3.3V_SUS
2
PR132 0_0402 PR127 PR131
EN1 1 2 178K_0402 178K_0402
1.5V_RUN_ON 28
PR135 0_0402
1
EN2 1 2 1.05V_RUN_ON 29
POK2
1.05V_RUN_PWRGD 38
POK1
1.5V_RUN_PWRGD 38
A A
QUANTA
Title
COMPUTER
1.5V,1.05V

C & G UMA 2A

5 4 3 2 1
5 4 3 2 1
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW Ton:OUT1/OUT2 Switching Frequency

VDD 200kHz/300kHz
Place these CAPs OPEN (REF): 400kHz/300kHz
close to FETs GND: 400kHz/500kHz
No Install PR70 for ISL6236 Place these CAPs
+DC1_PWR_SRC Install PR70=0Ohm for MAX8778 No Install for ISL6236 3.3 Volt +/- 5%
PJP13 Install 10 ohm for MAX8778 close to FETs
D
POWER_JP Design Current:7.18A D
1 2
+PWR_SRC Maximum current:10.25A
2
PC170 PC173 PC175 PC176 PC75 PC79 +5V_ALW2 PR170 +5V_VCC1 PC77 PC73
OCP: 12.36A
1
1
10_0603
1
+ + + + PR175 PR176
2200P/50V/0402
2200P/50V/0402
10U/25V/1206
10U/25V/1206
10U/25V/1206
.1U/50V/0603
.1U/50V/0603
2 1
10U/25V/1206_NC
0_0805 0_0805
1
2
2
2
2
PC76 PR64 PR161 +3.3V_ALW
4.7U/10V/1206 0_0402_NC 0_0402
2
5 Volt +/- 5% PC78
+3.3V_ALW2
Need to update QCI PN 56
1
2
2
PR169 PC74
1U/10V/0603
.1U/50V/0603
Design Current: 7.43 A
1
PR70 0_0402_NC 59
0_0402_NC PC184 PC72
Maximum current:10.6A
2
1U/10V/0603 .1U/10V/0402 PR60
2
1 2 0_0402_NC FL10 FL9 FL8
OCP: 12.96A
1
FBMH3225HM202NT
FBMH3225HM202NT
FBMH3225HM202NT
5
6
7
8
2 1
1
PR165 +3.3V_DH 4 PQ22
1
0_0402_NC FDS8878
+5V_ALW
8
7
6
5
4
3
2
1
PC82
1
2
3
8
7
6
5
LDOREFIN
LDO
VIN
EN_LDO
VCC
TON
VREF3
REF
1
.1U/50V/0603_NC PL7
PJP14 PQ25 4 +5V_DH 1.5uH_SIL1055RC-12.5A/7.6mOhm
1
POWER_JP FDS8878 PR63 +3.3V_LX 1 2 +3.3V_ALWP
C +5V_ALWP 9 32 309K/F_0402 C
PL10 BYP REFIN2
10 31 1 2
2
3
2
1
OUT1 ILIM2
2
2.2uH_SIQH125A-13A/5.5mOhm 11 PU5 30 PC62
+5V_ALWP +5V_LX FB1 OUT2
1 2 1 PR72 2 12 ILIM1 SKIP# 29 2 1 PR159
324K/F_0402 POK1 13 MAX8778ETJ+ POK2 0_0603
.1U/50V/0603
POK1 POK2 28
2
2
PC87 14 MAX8778 27 0_0402 + PC63
EN1 EN2
5
6
7
8
9
PR71 15 26 PR182 PQ21 330U/6.3V/ESR25
1
0_0402_NC UGATE1 UGATE2
FDS6680AS
.1U/50V/0603
16 25
1
PHASE1 PHASE2
2
9
8
7
6
5
PC88 + PQ24 37 +3.3V_DL4

PAD
2
2
LGATE1
LGATE2
330U/6.3V/ESR25 FDS6680AS PC85 36 PC68 Rdson=12.5mOhm
BOOT1
BOOT2
SECFB
1
PAD
2
PGND
PVCC
Rdson=12.5mOhm 4+5V_DL .1U/50V/0603 .1U/50V/0603 PR61
GND
PAD
PAD
PAD
1
PR181 0_0603_NC
1
2
3
240_0805_NC
1
2
PR62
1
3
2
1
35
34
33
17
18
19
20
21
22
23
24
1
PR76 PR75 1_0603
0_0402 1_0603 1 2
1 2
1
+3.3V_ALWP +3.3V_ALWP
.1U/50V/0603_NC
PD12 SJ4
+5V_ALW2
PC67
1 PC83 2 1
2 1
1
.1U/50V/0603
32 1 PR73 PR160
1
Jump20X10 100K_0402 100K_0402_NC
1
2
PD6
2
2
BAT54S-7-F PC81 SDM10K45
2
PC69 PD11 .1U/50V/0603 POK2

.1U/50V/0603
2
1
B B
3 PR166
0_0402
2
1
BAT54S-7-F POK1
ALW_PWRGD_3V_5V 28
SJ3
2 1 +15V_ALWP 1 2
+15V_ALW 2 1
2
1
PC167 PR174
Jump20X10 200K/F_0402 PR177
.1U/50V/0603 39K/F_0402
1
2 LDO = 5V (LDOREFIN = GND) or

PR68 LDOREFIN RANGE: 0.3V to 2V
1K/F_0402 LDO = 2x LDOREFIN
28 ALWON 2 1
1
34 THERM_STP# 2 1
PR69
PR67 200K_0402
0_0402
REFIN2: DYNAMIC 0 to 2V
2
REFIN2 = RTC: 1.05V Fixed

REFIN2 = VCC: 3.3V Fixed
A A
QUANTA
Title
COMPUTER
3VALW,5V,3V, power on

FM5 2A

5 4 3 2 1
A B C D E F G H
54
Need to update QCI PN FL3 +PWR_SRC
+CPU_PWR_SRC FBMH3225HM202NT
1 2
FL4
+CPU_PWR_SRC FBMH3225HM202NT
+5V_ALW 1 2
2
5
6
7
8
9
PR102 Intersil Note: PIN 39 is PQ34 PC39 PC40 PC125 PC124
2
10_0603_NC FDS6298 PR128 PC106 PC113 PC189 PC190
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
+3.3V_RUN. I would like to
1
+5V_ALW
2200P/50V0402
PR30 2.2/F/1206_NC
2200P/50V0402_NC
.1U/50V/0603
4
.1U/50V/0603_NC
suggest this change to
1
PC98 0_0603
1
+3.3V_ALW. It will be the same 1U/10V/0805 1 2
2
as +5V_ALW sequence which is
1
2
3
1
for ISL6260C and drivers PU3
1
PC23
1 1
PR111 5 1 .22U/10V/0603 PC133
2
VCC BOOT
1
10_0603 PC24 1.5nF/50V/0603_NC
(VDD)
2
.01U/25V/0402_NC 2 8 UG1 PL4
+3.3V_RUN FCCM PWM UGTE 0.45U_MPC1040LR45_25A_20%
6
2
FCCM PH1
(SKIP#) PHSE 7 2 1 +VCC_CORE
3 GND
9 4 LG1
3
PAD LGTE
5
6
7
8
9
2
PC26 MAX8791GTA+ PC45 PR148
1
1
1U/10V/0805 4 1.5nF/50V/0603_NC 0_0402
2
PR23 PR145 PC103
1
1.91K/F_0603 PQ11 2.2K/F_0603 .22U/10V/0603 PC55 PC147
2
1
1
1
SI7336ADP 1 2 1 2 PC149 + +
1
2
3
220U/2V/ESR7
220U/2V/ESR7
2
2
1
PR44
.1U/16V/0603
IMVP_PWRGD 13,28,38
2
PR104 1 2.2/F/1206_NC PR32
0_0603 PU1 PR142 0_0402
2
PR107 7.68K/F_0805_NC
19
20
18
39
40
13K/F_0402
1
2
(GND)
VSS
3V3
VDD
VIN
PGOOD
(IMVPOK)
(V3P3)
(NC)
(VCC)
PR88 VSUM VO
2
29 IMVP6_PROCHOT# 1 2 4 VR_TT#
PR11 0_0402
143K/F_0402 (VRHOT#)
2 1 3 24 FCCM
PR13 RBIAS (OSC) FCCM
2 PR8 1 2 1 5 NTC (THRM)
(DRSKP#)
0_0402_NC
470P/50V/0402 100K_0402_NC MAX8786_PWM1 +CPU_PWR_SRC
PWM1 27 RDS(ON)=12.5m ohm
1 2 6 SOFT (CCV)
PC12 +5V_ALW
2 1 23 CSP1
CPU_VID0 ISEN1
28 VID0
2
PC7 4 VID0 (CSP1) PC114 PC117 PC120 PC119 PC34 PC35
5
6
7
8
9
2
2200P/50V/0402_NC CPU_VID1 PQ33 PR129 PC191 PC192
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
.1U/50V/0603
4 VID1 29 VID1
1
2200P/50V0402
PR29 FDS6298 2.2/F/1206_NC
2200P/50V0402_NC
.1U/50V/0603_NC
CPU_VID2 30 PC33 0_0603 4
4 VID2
1
VID2 1U/10V/0805
2 1 2 2
2
CPU_VID3 31 26 MAX8786_PWM2
4 VID3 VID3 PWM2
1
2
3
PU2
1
34 PWR_MON CPU_VID4 32 PC22
4 VID4 VID4
22 CSP2 5 1 .22U/10V/0603 PC131
2
CPU_VID5 ISEN2 VCC BOOT 1.5nF/50V/0603_NC
4 VID5 33 (VDD)
2
VID5
2
(CSP2) 2 8 UG2 PL3
PC13 PR12 CPU_VID6 FCCM PWM UGTE 0.45U_MPC1040LR45_25A_20%
4 VID6 34 VID6 6 FCCM
1U/10V/0603_NC 10K_0402_NC 7 PH2 2 1 +VCC_CORE
1
(SKIP#) PHSE
3,6,11 H_DPRSTP# 37 DPRSTP# 3 GND
9 4 LG2
2
3
PAD LGTE
5
6
7
8
9
2
2 PR31 1 36 25 MAX8786_ PWM3
6,13 DPRSLPVR DPRSLPVR PWM3
499/F_0402 MAX8791GTA+ PC44 PR147
3 H_PSI# 2 PR18 1 1 4 1.5nF/50V/0603_NC 0_0402
1 2
0_0402 PSI# CSP3 PR144 PC32
ISEN3 21
1
2 Intersil Note: PR155 2.2K/F_0603 .22U/10V/0603
PWR_MON (PGD_IN)
1
PR26 (CSP3) change to 13.7K for PQ10 PR43 1 2 1 2 PC150 + PC56 + PC146
T2
1
2
3
1 2 PR10 SI7336ADP 2.2/F/1206_NC
60A OCP. We heard
1
PR28 0_0402 CLK_ENABLE# 226K/F_0402
.1U/16V/0603
220U/2V/ESR7
220U/2V/ESR7
38
2
,29,38 RUNPWROK CLK_EN# Santa Rosa CPU might
1 2 2 1
2
0_0402_NC PR27 have ~50A peak PR141
28 IMVP_VR_ON PAD 7.68K/F_0805_NC
1 2 35 VR_ON (SHDN#) current with 10uS
0_0402 PR90 RDS(ON)=4m ohm
duration
1
11.5K/F_0402_NC
4 VCCSENSE 2 1 12 7 1 2 VSUM PR94 PR33
PR6 VSEN (FBS) OCSET 0_0402 1_0402_NC
1
10_0603 PC14 (ILIMPK)
2
1000P/50V/0402 4.99K/F_0402 13
2
PR17 PR91 RTN (GNDS) VSUM
17
2
10K/F_0603 VSUM CSN2 VO

.33U/16V/0603_NC
.012U/50V/0603_NC
.033U/16V/0402_NC
1 2 B=3435 11 (PWR) PR103

2
VDIFF (VPS)
2
PR92
PC18 17.8K/F_0402
1000P/50V/0402 PR14
4 VSSSENSE 2 1 2.43K/F_0402_NC +CPU_PWR_SRC
PR7 10_0603 MAX8786GTL+
1
1
1
PR87 10
4.53K/F_0402_NC
PWR_MON 34
1
FB (TIME)
2
1 2 1 2 2 1
2
PR98
2
2
2
2
3 +5V_ALW 3
332/F_0402_NC PC90 6.49K/F_0603 PR20 PC121 PC37 PC36 PC122
2
PC17
PC10
PC8
680P/50V/0402_NC PR93 6.8K_0402_NC PC94 PC115 PC118
10U/25V/1206
10U/25V/1206
10U/25V/1206
10U/25V/1206
5
6
7
8
9
PR21 .1U/10V/0402 PQ32 PR133 PC193 PC194
.1U/50V/0603
2.2K/F_0402_NC 9 COMP (REF)
1
1
2200P/50V0402
15K/F_0402_NC FDS6298 2.2/F/1206_NC
2200P/50V0402_NC
.1U/50V/0603_NC
1
1
16 VO 1 PR101 4
1
1
(CSN1) VO PC99 0_0603
1 2 8
2
VW (TRC)
1
DROOP
1U/10V/0805
15 (CSN3)
1 2
(CSN2)
PR9 71.5K/F_0402 PR25

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
DFB
1
2
3
PU4
1
0_0402_NC
1 2 1 2 5 1 PC92 PC134
VCC BOOT
41
42
43
44
45
46
47
48
49
50
14
PC89 PR89 .22U/10V/0603 1.5nF/50V/0603_NC

2
2
1500P/50V/0402_NC 82.5K/F_0402_NC PR86 (VDD) UG3 PL2
2 PWM UGTE 8
2
1K/F_0402 CSN2 FCCM 6 0.45U_MPC1040LR45_25A_20%

FCCM
1
2 1 2 1 PC183 7 PH3 2 1
(SKIP#) PHSE +VCC_CORE
1
PC9 PR97 3
PR24 .1U/16V/0603 22.1K/F_0402 GND LG3
9 4
2
3
.01U/25V/0402 PAD LGTE
5
6
7
8
9
2
PC11 0_0402_NC
CSN3
1
1
1
1000P/50V/0402_NC MAX8791GTA+ PR149
PR5 2 1 PC6 4 PC38 0_0402
2
0_0402 330P/50V/0603_NC 1.5nF/50V/0603_NC 2.2K/F_0603 PC31
1
2 1 PR146 .22U/10V/0603
1
PQ9 1 2 1 2 PC151 + PC57 + PC148
2
1
2
3
1
SI7336ADP
1
PC182 PC91 PR40
.1U/16V/0603
220U/2V/ESR7_NC
220U/2V/ESR7_NC
2
2
2.2/F/1206_NC PR143
.1U/16V/0603 .1U/16V/0603 7.68K/F_0805_NC
2
2
VSUM
1
PR22 PR19
0_0402
1_0402_NC
2
VO
CSN3
4 4
PHASE 3 populate QUANTA

Title
COMPUTER
CPU POWER

FM5 2A

A B C D E F G H
A B C D E
61
TH11 TH1 TH22 TH3 TH10 TH9 TH14 TH15
2
1 H-TE276X315BE354X354D126P2 1 H-E354X354D126P2 1 H-E354X354D126P2 1 H-E354X354D126P2 1 H-TC8BC6I6D2_6P2-4 1 H-TC8BC6I6D2_6P2-4 1 H-TC8BC6I6D2_6P2-4 1 H-TC8BC6I6D2_6P2-4
5 3 5 3 5 3 5 3 5 3 5 3 5 3 5 3
4
4
1 1
TH5 TH17 TH13 TH12 TH6 TH16 TH23 TH4

2
2
1 H-TC217BE354X354D126P2 1 H-TC354BE354X354D126P2 1 H-TC217BC256D126P2 1 H-TC217BE354X354D126P2 1 H-TC354BE354X354D126P2 1 H-TC236BE354X354D126P2 1 H-TC354BE354X354D126P2 1 H-TC256BE354X354D126P2
5 3 5 3 5 3 5 3 5 3 3 5 3 5 3
4
4
TH2 TH8 TH7
7
2
2
1 H-TC217BC236D126P2 1 H-TC217BC236D126P2 1 H-TC217BC236D126P2
H1
H-C114D114N
5 3 5 3 5 3
2 2
1
4
PV10 PV11 PV9 PV12 PV13 PV14 PV16 PV15 PV17
150-265525-C1(H:5.5)150-265525-C1(H:5.5)150-265525-C1(H:5.5)150-265525-C1(H:5.5)150-265525-C1(H:5.5)150-265525-C1(H:5.5)T0336-A7AB1-1(H:5.5)
T0336-A7AB1-1(H:5.5)
T0336-A7AB1-1(H:5.5)
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
3 3
+DC_IN_SS +DC_IN_SS +3.3V_RUN +3.3V_RUN +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +DC_IN_SS

26
26
C383 C377 C407 C428 C398 C10 C25 C319 C387
.1U/25V/0603 .1U/25V/0603 .1U/10V/0402 .1U/10V/0402 .1U/25V/0603 .1U/25V/0603 .1U/25V/0603 .1U/25V/0603 .1U/25V/0603
+PWR_SRC +PWR_SRC +1.5V_RUN +1.5V_RUN +3.3V_RUN +5V_ALW +5V_ALW +5V_ALW
+3.3V_SUS +3.3V_RUN +3.3V_RUN +PWR_SRC +PWR_SRC +PWR_SRC +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +1.5V_RUN +3.3V_SUS
26 26
C256 C413 C374 C324 C16 C19 C156 C233 C238 C129 C486 C191 C624 C623
.1U/10V/0402_NC.1U/10V/0402_NC
.1U/10V/0402_NC .1U/25V/0603_NC .1U/25V/0603_NC
.1U/25V/0603_NC .1U/10V/0402_NC
.1U/10V/0402_NC
.1U/10V/0402_NC
.1U/10V/0402_NC
.1U/10V/0402_NC
.1U/10V/0402_NC
.1U/10V/0402_NC
.1U/10V/0402_NC
+5V_SUS +5V_SUS +5V_SUS +5V_ALW
4 4
+PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC
QUANTA
C65
.1U/25V/0603
C402
.1U/25V/0603
C391
.1U/25V/0603
C390
.1U/25V/0603
C400
.1U/25V/0603
C401
.1U/25V/0603
Title
COMPUTER
EMI & Screw hole

EMI requirement added on 0812 C & G UMA 2A
A B C D E
5 4 3 2 1
POWER STATES
Signal SLP SLP SLP S4 SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# STATE# M# PLANE PLANE PLANE PLANE USB PORT# DESTINATION
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON 0 Right Top

D D
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF ON 1 Right Bottom
S4 (Suspend to DISK) / M1 LOW HIGH HIGH LOW HIGH ON ON ON OFF ON 2 Side TOP
S5 (SOFT OFF) / M1 LOW HIGH LOW LOW HIGH ON ON ON OFF ON 3 Side Bottom
ICH8-M 4 Ext. USB TOP
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON OFF ON OFF OFF
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 5 DIgital Camera
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF 6 Express Card
7 WPAN/Bluetooth
PM TABLE
C 8 Ext. USB Bottom C
+3.3V_ALW +1.8V_SUS +0.9V_DDR_VTT +3.3V_RUN_CARD +DC_IN
+3.3V_RTC_LDO +1.8V_LOM +1.05V_VCCP +2.5V_RUN +DC_IN_SS 9 WWAN
power +3.3V_WLAN +3.3V_LAN +1.25V_RUN +5V_MOD +PWR_SRC
plane +5V_ALW +3.3V_SUS +1.5V_CARD +5V_RUN +RTC_CELL 1 None
+15V_ALW +5V_SUS +1.5V_RUN +5V_SPK_AMP
+3.3V_CARD +CPU_PWR_SRC 2 None
+3.3V_CARDAUX +VCC_CORE ECE 5011
+3.3V_R5C832 +VDDA 3 None
State
+3.3V_RUN
S0 ON ON ON ON 4 None
S3 ON ON OFF ON
PCI EXPRESS DESTINATION
S5 S4/AC ON OFF OFF ON
B
Lane 1 MINI CARD-1 WWAN B
S5 S4/AC don't exist OFF OFF OFF ON

Lane 2 MINI CARD-2 WLAN
Lane 3 MINI CARD-3 WPAN

PCI TABLE Lane 4 Express Card
PCI DEVICE IDSEL REQ#/GNT# PIRQ Lane 5 None
Lane 6 None
BCM4401B AD16 REQ#0 / GNT#0 PIRQB
R5C833 AD17 REQ#1 / GNT#1 PIRQC: Card reader

A
PIEQD: 1394 A
QUANTA
Title
COMPUTER
Schematic Block Diagram1

C & G UMA 2A

5 4 3 2 1
1 2 3 4 5 6 7 8
+3.3V_SUS +3.3V_RUN +3.3V_RUN

197
Express Card WLAN WWAN WPAN 2N7002 DIMM 0 0A0h

2.2K 2.2K 2.2K 2.2K 195
7 8 30 32 30 32 30 32
G
AJ26 ICH_SMBCLK D S MEM_SCLK 197
A
ICH8-M G DIMM 1 0A4h A
AD19 ICH_SMBDATA D S MEM_SDATA 195

AC17
AE19
+3.3V_SUS
10K 10K
AMT_SMBDAT
+3.3V_ALW +3.3V_RUN +3.3V_RUN

AMT_SMBCLK
2N7002
2.2K 2.2K 2.2K 2.2K
B B
G
13 CKG_SMBCLK D S CLK_SCLK 16
G CLK GEN 0D2h
12 CKG_SMBDAT D S CLK_SDATA 17
+3.3V_ALW
4.7K 4.7K
100 THRM_SMBCLK 12
99 THRM_SMBDAT 11 GUARDIAN 05Eh
C C
+3.3V_ALW
8.2K 8.2K
SIO
8 LCD_SMBCLK S39
MEC5025 Inverter A9H:Contrast
7 LCD_SMBDAT S40
AAH:Backlight
+3.3V_ALW
+5V_ALW
D 10 D
8.2K 8.2K 9 012h

CHARGER
8 PBAT_SMBCLK
100
3 QUANTA
7 PBAT_SMBDAT 4 Primary 016h
Title
COMPUTER
BATTERY Schematic Block Diagram1
100 Size Document Number Rev
C & G UMA 2A

1 2 3 4 5 6 7 8
6 5 4 3 2 1
Model Item Page Date Rev. Description

1 P.3 0619 1A Update no populated ITP schmatic per ref. Intel checklist V:1.201a. And added ITP to XDP implement txt.
F
C&G 2 P.23,25,46 0620 1A Update Screw hole per ME update. F
UMA 3 P.17 0620 1A Update SRC CLK per followed Discrete schematic changed.
4 P.12 0620 1A Swap RP21.2, RP21.3, RP52.3, RP52.4, RP52.6 net for layout requirement.
5 P.15,16 0620 1A Swap RP14.2, RP14.4, JDIM2.136, JDIM2.137, JDIM2.141, JDIM2.143 per layout requirement.
6 P.13,28 0620 1A Change USIO2.28 net name from SIO_S4_STATE# to TP_DET# and delete U25.AH27.
7 P.18 0620 1A Update +LCDVCC circuit per ref. CD_Diag_0619.ppt file.
8 P.33 0620 1A Added AUX_LCD_CBL_DET#, INVERTER_CBL_DET#, LCD_CBL_DET Pull-up resistor.
9 P.13,28 0620 1A Delete WOL_EN of U25.AG19 and R571. Changed USIO2.94 net-name from WOL_EN to EC_ENVDD per ref BITS WI74741.
E
10 P.32 0620 1A Update JSPK1 and added SPK DET. PU Resistor. E
11 P.28 0620 1A Delete R479 per ref BITS WI75517
12 P.24,28 0620 1A Added WoWL power SW circuit per ref BITS WI74552.
13 P.6 0620 1A Delete all of NC pins connected to test pad per ref. BITS issue WI75504.
14 P.6 0620 1A Populate R1, R5, R9 per implement ITP function.
15 P.31 0621 1A DAT_TP_SIO & CLK_TP_SIO pull up to +3.3V_ALW, Added PU to +3.3V_ALW for TP_DET#.
16 P.33 0621 1A Correction LCD_CBL_DET pull up circuit.
17 P.11,30 0621 1A Change RTC_BAT_DET# PU resistor from 10K to 100K and moved to P.30
18 P.11,32 0621 1A Change SPEAKER_DET# PU resistor from 10K to 100K and moved to P.32
D D
19 P.24,25 0621 1A Change Mini card DET. PU resistor from 10K to 100K.
20 P.29 0621 1A Delete PBAT_ALERT# per M08 GPIO table removed.
21 P.39-45 0621 1A Update power schematic per ref power team updated schematic.
22 P.22 0622 1A Per TaiSol suggest, the CD2/WP2 is a dynamic pin; CD1 is a fixed pin, CD2 will touch CD1 when SD card insert into connecter
23 P.22 0622 1A After discussion withe Taisol's FAE, pin-1 must connect to GND
24 P.20 0622 1A Ricoh check result: UDIO3 &UDIO4 apply NC required. Removed pull high resistor from UDIO3 and UDIO4.
Ricoh check result: INTA# and INTB# interrupt line hange required. Please apply PCI_PIRQC# interrupt line for INTA#, PCI_PIRQD# interrupt line
25 P.20 0622 1A for INTB#
C 26 P.21 0622 1A Ricoh check result: Shield GND for XTAL for XO/XI Please apply shield GND for XTAL for XO/XI to reduce external noise for XTAL. C
27 P.12,20 0627 1A Changed REQ2/GNT2 to REQ1/GNT1 and swap PIRQD/PIRQC for C&G card reader+1394.
28 P.12,35 0627 1A Changed REQ3/GNT3 to REQ0/GNT0 and change PIRQB for C&G LOM.
29 P.35 0629 1A L90 changed to BLM11A601.
30 P.24,25 0629 1A Update PCI-E chennals. Update WPAN LED signal circuit.
31 P.23 0629 1A Delete SATA power2 for ref. Discrete schematic.
32 P.9 0629 1A De-populate C1 per Intel review update.
33 P.13 0629 1A Delete ICH_CL_RST1# per Intel review.Delete AMT_SMBCLK & AMTSMBDAT per not support AMT function.
34 P.39 0703 1A Added ALW power transfer circuit per power changed.
B B
35 P.25 0703 1A Change ESD2 from CDA6C05GTH to SRV05-4 per refer Dawson schematic update.
36 P.40-45 0704 1A Power update schematic.
37 P.29 0705 1A The net name of IMVP6_PROCHOT# is for pin32 not for pin33. So, I change the the net name of IMVP6_PROCHOT# from pin 33 to pin 32.
38 P.27 0707 1A Ref Discrete schematic, changed the pin define of JCAMERA2 between pin 5 & pin6
QUANTA
A
Title
COMPUTER A
EMI & Screw hole

C & G UMA 2A

6 5 4 3 2 1
6 5 4 3 2 1
39 P.26 0707 1A Ref Discrete schematic, Move R24 and C25 to DB.
F
C&G F
UMA 40 P.26 0707 1A Ref Discrete schematic, Move R317 and C405 to DB.
41 P.26 0707 1A Ref Discrete schematic, Move C293 and C396 to DB.
42 P.27 0707 1A Ref Discrete schematic, Add a fuse on U64
43 P.27 0707 1A Ref Discrete schematic, Add a fuse on U67

44 P.32 0707 1A Ref Discrete schematic, added a net name SPEAKER_DET# on U21.4. Delete off-page connection from JSPK1.
45 P.11 0707 1A Ref Discrete schematic, deleted off-page connection from U25.AE10
E 46 P.32 0707 1A Ref Discrete schematic, added an offpage connection name SPDIF_SHDN on U21.30. E
47 P.37 0707 1A Ref Discrete schematic, changed LED schematic of BT based on Discrete schemaitc. Remove U72, R23, D6 and Q7. Add Q?, R? and D? on page 37.
48 P.29 0707 1A Ref Discrete schematic, USIO.98 pull up to +3.3V_ALW through a 10k ohm.
53 P.21 0710 1A Per vendor check result, UDIO3 and UDIO4 pull-up resistor through a 10K ohm. (UDIO3 pull-up: SD enabled, UDIO4 pull-up: MMC enabled)
54 P.24 0711 1A Ref Discrete schematic, connect 0 ohm from J10 pin 22 to Sourth Bridge SB_WLAN_PCIE_RST#.
D D
55 P.12 0711 1A Ref Discrete schematic, U25B.F18: change the net name from PCI_GNT2# to SB_WLAN_PCIE_RST#; Add 20K pull down resistor at U25B pin F18
56 P.24 0711 1A Ref Discrete schematic, connect 0 ohm from J9 pin 22 to Sourth Bridge SB_MCARD3_PCIE_RST#.
57 P.12 0711 1A Ref Discrete schematic, U25B.F8: connect 0 ohm population option to J9.22. GPIO table suggests that we add 20k pull down. Dis NO.
58 P.25 0711 1A Ref Discrete schematic, connect 0 ohm from J16 pin 22 to Sourth Bridge SB_WWAN_PCIE_RST#.
59 P.12 0711 1A Ref Discrete schematic, U25B.B19: change the net name from PCI_REQ2# to SB_WWAN_PCIE_RST#; Add 20K pull down resistor at U25B pin B19
60 P.25 0711 1A Ref Discrete schematic, UIM_DATA: add a 100pF(NC) capacitor at the point nearest the SIM connector.
61 P.25 0711 1A Ref Discrete schematic, change the net name of J16 pin 40 from USB_MCARD3_DET# to USB_MCARD2_DET#
C 62 P.24 0711 1A Ref Discrete schematic, change the net name of J9 pin 40 from USB_MCARD2_DET# to USB_MCARD3_DET# C
63 P.33 0711 1A Ref Discrete schematic, Reserve SN74LVC1G125DBVR buffer and Add 0 ohm between buffer input and output pin for AUD_DMIC_CLK
64 P.31 0711 1A Ref Discrete schematic, Remove R451 between JTP1 pin 1 and +3.3V_ALW
65 P.19 0711 1A Ref Discrete schematic, Remove RP45,Q54 and Q55 from G_DAT_DDC2 and G_CLK_DDC2
66 P.32 0711 1A Per GG item 7 and Discrete schematic, C&G can remove this reserve circuit without no docking support. U59 pin1 pull down 10K. EC pin79 NC. Del R867
69 P.32 0711 1A Ref Discrete schematic, Reserve R603 and C315 at U21 pin 33
70 P.32 0711 1A Ref Discrete schematic, Reserve R441,C394 and C312 at U21 pin 1.
B B
71 P.32 0711 1A Ref Discrete schematic, Remove 3.3V_LAN_PWRGD circuit.
72 P.27 0712 1A Ref Discrete schematic, Add common choke
73 P.26 0712 1A Common choke and capacitor move to DB, delete L25,R145,R142,C180,C183,C656,C654,C198.
73 P.28 Ref Discrete schematic, USIO2.17 change the net name from DDR_ON to EC_CPU_PROCHOT#
P.3
0712 1A Ref Discrete schematic, U9.D21 connect to EC_CPU_PROCHOT# through a 0 ohm.
QUANTA
A
Title
COMPUTER A
EMI & Screw hole

C & G UMA 2A

6 5 4 3 2 1
6 5 4 3 2 1

74 P.28 0712 1A Ref Discrete schematic, Add net name ALW_PWRGD_3V_5V on USIO.18 Per GPIO table,Del. RC circuit. 100K and 0.1 uF.
F
C&G P.28 Ref Discrete schematic, USIO2.27 change the net name from SIO_SLP_S4# to DDR_ON and then add a 100k pull down. F
75 0712 1A
UMA P.13 U25.AF21: change to TEST PAD
76 P.28 0712 1A Ref Discrete schematic and GG item 41, AUX_EN_WOWL add 100K pull down
77 P.28 0712 1A Ref Discrete schematic, change net name IMVP_PWRGD from USIO2 pin3 to USIO2 pin43.
78 P.28 0712 1A Ref Discrete schematic, add a off-page connection at USIO2 pin66
P.28
79 P.13 0712 1A Ref Discrete schematic, SB side add test pad. EC side ME_EC_ALERT change net name to LOM_SMB_ALERT# reserver pull high.
80 P.28 0712 1A Ref Discrete schematic,USIO2 pin 3 change signal name to DOCK_SMB_PME# and Add Pull up to +3.3V_ALW by 10K resister.
81 P.28 0712 1A Ref Discrete schematic,USIO2 pin 4 reserve 10K NC resister Pull high to +3.3V_ALW.
E 82 P.28 0712 1A E
P.18 Per GPIO pin table 0.1, UMA Use "LCDVCC_TST_EN" signal name for LCD TST.Change net name from EC_ENVDD to LCDVCC_TST_EN.
83 P.28 0712 1A Per Dell's Diag implementation and ref Discrete schematic,USIO2 pin 28 add 10K resister Pull high to +3.3V_ALW.
P.32 Per GG list, AUD_HP_NB_SENSE/NB_MUTE# come into a AND gate output to U22 pin22 HP EN.
84 P.29
0712 1A Delete AUD_HP_NB_SENSE from USIO1 pin 81.
85 P.29 0712 1A Ref Discrete schematic, Delete R658 between USIO1 and NB_MUTE#
86 P.29 0712 1A Ref Discrete schematic, Add Pull down 100K.
87 P.29 0712 1A Ref Discrete schematic, USIO1 pin 95 add a off-page connection named WLAN_RADIO_DIS#
88 P.29 0712 1A Ref Discrete schematic, Add a TEST PAD on USIO1.35
D D
P.29 Ref Discrete schematic,USIO1 pin 61 Add 100K ohm and 0.047uF cap. RC circuit to+3.3V_ALW and serial 10 ohm resister.
89 P.31
0712 1A Change net name of JTP1 from LID_CL_SIO# to LID_CL#
90 P.29 0712 1A Ref Discrete schematic, delete net name DOCK_SIO_ALERT# from RP59
91 P.29 0712 1A Ref Discrete schematic, USIO1 pin 75 pull down through a 100k.
P.29 Ref Discrete schematic, USIO1 pin 31 add an off-page connection named MODC_EN#
92 P.23
0712 1A Ref Discrete schematic, Reserve MODC_EN# circuit.
93 P.12 0712 1A Ref Discrete schematic, U25C pin AE19 pull high to +3.3V_SUS
94 P.12 0712 1A Ref Discrete schematic, U25C pin AC17 pull high to +3.3V_SUS
C
Ref Discrete schematic, U25C pin AG21 pull high to +3.3V_SUS C
95 P.12 0712 1A Ref Discrete schematic, add a off-page connection at AG21

96 P.12 0712 1A Ref Discrete schematic, add a off-page connection at F4
97 P.12 0712 1A Ref Discrete schematic, U25.AJ18 reserve 8.2K pull up to +3.3V_RUN
98 P.12 0712 1A Per GG list, DOCKED# should pull high to +3.3V_SUS.
99 P.25 0712 1A Ref Discrete schematic, delete off-page connection ICH_LAN_RST# and add TEST PAD
100 P.12 0712 1A Ref Discrete schematic, U25 pin AG19 pull down through a 100k
101 P.17 0712 1A Added C788-C793 per GG updated.
B 102 P.34 0712 1A Added VCP2 circuit per GG updated. B
103 P.6 0713 1A TV_DCONSEL_0 & TV_DCONSEL_1 connected to GND.

104 P.11 0713 1A Update LAN function circuit per ref Discrete update.
105 P.12 0713 1A SB_LOM_PCIE_RST# Pull High to +3.3V_RUN per ref GPIO recommend. SB_NB_PCIE_RST# pull down per refer Discrete added.
106 P.13 0713 1A Change SIO_EXT_SMI# pull up power from +3.3V_ALW to +3.3V_SUS.
107 P.17 0713 1A Update CLK Gen. circuit per GG & Discrete update.
QUANTA
A
Title
COMPUTER A
EMI & Screw hole

C & G UMA 2A

6 5 4 3 2 1
6 5 4 3 2 1

108 P.17 0713 1A Update CLK Gen. circuit per GG & Discrete update.
F
C&G 109 P.18 0713 1A Update LVDS power control method per ref JM7. F
UMA 110 P.19 0713 1A Update SPDIF CIRCUIT per ref Discrete & GG.
111 P.24,25 0713 1A Update WLAN,WPAN,WWAN circuit per GG requirement.
112 P.26 0713 1A Update MDC_RST_DIS# circuit per GG requirement.
113 P.27 0713 1A Correction USB connector side signals name.
114 P.28,29 0713 1A Update SIO circuit per ref GG requirement and GPIO list.
115 P.32,33 0713 1A Update Audio,AMP,SPK circuit per refer GG.
116 P.39 0713 1A Populated PC10,PC13,PC63,PC66 per GG requirement.
117 P.39-45 0713 1A Power updated schematic.(File name changed to FM5 MB UMA-0714_JM-5)
E E
118 P.46 0714 1A Per ME's drawing, add clips.
119 P.31 0714 1A Depopulate RP61 per GG requirement
120 P.27 0714 1A Added C313 & C323 per GG requirement.
121 P.6 0714 1A Populate R411 per GG requirement.
122 P.17 0714 1A Populate R487 per GG requirement
123 P.11,30 0714 1A Changed RTC_BAT_DET# PU from P.30 to P.11 per GG requirement.
124 P.12 0714 1A Changed SB_LOM_PCIE_RST# to PD. Delete PCI_PIRQA# off page symbol.
125 P.13 0714 1A Added R529, De-pop R655, R657, C936 per GG requirement.
D D
126 P.16 0714 1A Added C690,C702 per GG requirement.
127 P.24 0714 1A Populate Q67 per support Sniffer function.
128 P.31 0714 1A Removed C3 & R436 to DB per GG requirement.
129 P.24 0717 1A De-populate WoWL power SW circuit.
130 P.17 0717 1A Removed R429 & R859 per Vendor review update.
131 P.9,28,38,39 0718 1A Removed +1.8V_RUN power for UMA no need.
132 P.31 0718 1A Populate RP61 per provide TP AMB BUS driving.
133 P.6,12,24 0718 1A Split PLTRST to 2 single gate. PLTRST1# for WWAN?WLAN/WPAN/Express Card. PLTRST2# for MCH/SIO.
C 25,26,28 C
134 P.37 0719 1A Added BT circuit.

135 P.25 0719 1A De-populate C1249 per ref JM7 schematic update.
136 P.39-45 0720 1A Power update schematic.
137 P.9 0720 1A Added R429,R436,R456,R461 pull up/down for Crestline sighting report V:9.0 P.16 update.
138 P.6,12,28 0720 1A Change net name from PLTRST2# to PLTRST# for same as Discrete.
139 P.14 0720 1A Change R253 package from 0402 to 0603.
140 P.29 0724 1A Delete R927, Change R929 value from 12K/F to 10K per SMSC revier updated.
141 P.28 0724 1A Changed R325&R265 vlaue from 1M to 47K per SmSC review updated.
B B
142 P.31 0724 1A Added Media board LED control signal cirfuit, changed enable signals to low active per GG updated.
143 P.29,33 0724 1A Added CCD control power circuit, DMIC filter circuit, USB common choke circuit, per GG requirement.
144 P.23 0724 1A Added R927 and R595. Depopulate R917,R918 per GG updated.
145 P.6 0724 1A LCTLA_CLK/LCTLA_DATA changed to connect GND per GG updated.
146 P.27,29 0724 1A Change Signal net from Gilligan USB EN# to USB_BACK2_EN# per GG updated.
147 P.24 0724 1A Change Signal net PCIE_MCARD3_DET#/USB_MCARD3_DET# PU to +3.3V_SUS
per GG updated.
P.39-45 Update power schematic for layout requirement and checked updated.
QUANTA
148 0725 1A
A
149 P.29 0727 1A Added R647 for BC_DAT pull-up per Dell requirement. Title
COMPUTER A
P.28,29 Update GPIO table per DELL update A12 include ITP_DBRESET# / BEEP / PS_ID EMI & Screw hole
149 0727 1A
C & G UMA 2A

6 5 4 3 2 1
6 5 4 3 2 1

1 24 9/18/2006 2A Add SMBus isolation circuitry for WLAN.Add isolation circuitry for SMBus on WLAN.
F
C&G 2 37 9/18/2006 2A Update footprint name of D8. F
UMA 3 39- 45 9/21/2006 2A Per Power schematic 0920, update power schematic.
4 27 10/02/2006 2A Update footprint name of JUSB2, and change to 8 pin.
5 12 10/02/2006 2A Delete ICH_USBP8+ and ICH_USBP8-
6 19 10/02/2006 2A Update footprint name of JVGA1.
7 31 10/02/2006 2A Update footprint name and QCI PN of JTP1.
8 25 10/02/2006 2A Update footprint name and QCI PN of JSIM1.
9 11&23 10/16/2006 2A Changed SATA port1 to port2 for Gilligan used.
10 18 10/16/2006 2A De-populate C45&C46 for LCD SMBUS rise/fall time issue.
E E
11 12&24 10/16/2006 2A Update USB ports assigment
12 18 10/16/2006 2A Update LVDS per EMC requirement.
13 35 10/23/2006 2A Added L47, Change R66 to bead, Change L7 vlaue, Change C42, C69, C143, C145, C56, C114, C124, C144, C102, C126, C57, C146, C109, C70, C55,
C148 pre Dell RF EMI requirement.
14 36 10/23/2006 2A Added L46 and changed C376 value for Dell RF EMI requirement.
15 13 10/24/2006 2A Change R67 value from 100K to 10K per GG list checked. Because GPIO update, Delete R67 by change item 49.
16 34 10/24/2006 2A Change R360 power up rail from +5V_SUS to +3.3V_SUS pwe GG updated.
17 28 & 33 10/24/2006 2A Per change Sniffer control same as M07 of GG list, Change Q55, Q56 from 3904 to DTA114YUA, delete R131, R132, R524, R525.
D D
18 28 10/24/2006 2A Change R188&R189 value from 1M to 2.7K per GG requirement.
19 23 10/24/2006 2A Change HDD EN control power rail from +5V_ALW to +5V_ALW2 per GG requirement.
20 13 10/24/2006 2A Depopulate R329 and change R92 value from 10K to 8.2K per GG requirement.
21 17 10/24/2006 2A Change Single End serial damping value for fine tune value per GG requirement.
22 11&37 10/25/2006 2A Changed the LED control method. Move SATA LED mask to P.37. 1109 JM: Corrected LED of WLAN circuit.
23 13 10/25/2006 2A Depopulate R342, R352 per GG requirement.
24 46 10/25/2006 2A Pop C377, C407, C428, C383, C398, C10, C25, C319, C387 with 0.1uF caps for GG requirement
25 24 & 25 10/25/2006 2A Remove C252, C157, C253 per Mini-card no used +3V_LAN.
C
26 24 10/25/2006 2A Add R541 and non-populate for GG requirement, Changed PD on P.28 C
27 24 10/25/2006 2A Added 2 TP for GG requirement.

28 25 10/25/2006 2A Added R542 and non-populate per GG requirement.
Moved the LED_MASK# circuit to 37 and followed GG to update BT LED control method, for this change, added R543,R544, Q67,Q68. Change Q11
29 24 & 37 10/25/2006 2A from DTA114YUA to 2N7002W-7-F. Change R383 from 10K to 100K. Change R128 from 220 to 2K.
30 24 10/25/2006 2A Change the net of pin 5 of J4 from "COEX1_BT_ACTIVE" to "COEX1_BT_ACTIVE_Mini" per GG requirement.
31 37 10/25/2006 2A Change the net of pin 6 of J2 from "COEX1_BT_ACTIVE" to "COEX1_BT_ACTIVE_DC" pre GG requirement
32 37 10/25/2006 2A Added U34 Circuit per GG requirement.
B 33 33 10/25/2006 2A Update Audio DB BTB circuit per update connector pin define. B
35 11 10/27/2006 2A Change CODEC bitclok with 10 ohm damping resistor per GG requirement.
36 24 10/27/2006 2A Added "BT_ACTIVE#" with 0_NC on J3.46 per GG requirement.
37 17 10/27/2006 2A Change RP10 from 33 to 10, RP3, RP5 from 33 to 22 per EA updated.
38 17 10/27/2006 2A Pop C71, C395, C113, C108, C104, C116 with 22p caps per GG requirement.
39 39 10/27/2006 2A Change +3.3V_SUS & +5V_SUS EN power up to +5V_ALW2 per GG requirement.
Change C331, 332 to 0.033uF/16V/X7R/1206 & C351, C354 to 1uF/16V/X7R/1206 per Gg
40 32 10/27/2006 2A requirement. QUANTA
A 41 29 10/27/2006 2A Depopulate EC non control resistor. Dell don't agree to do it.
Title
COMPUTER A
42 28 10/27/2006 2A Depopulate EC non control resistor. Dell don't agree to do it. EMI & Screw hole
43 13&28 10/27/2006 2A Per GPIO A14, changed U11.AG22 to LOM_SMB_ALERT#. Size Document Number Rev
44 28&29 10/27/2006 2A Per GPIO A14, Swap DOCK_SMB_ALERT# and DOCK_SMB_PME. C & G UMA 2A

6 5 4 3 2 1
6 5 4 3 2 1

45 28&38 10/27/2006 2A Per GPIO A14, changed USIO1.14 to ATI_Intel. Delete 3.3V_LAN_PWRGD.
F
C&G 46 28&32 10/27/2006 2A Reserved the AUD_AMP_MUTE# for 'PO' noise back up solution. F
UMA 47 28 & 38 10/27/2006 2A Per GPIO A14, swap USIO1.18 & USIO1.29. Base on Dawson, delete '3V_5V_SUS_PWRGD' and added TP.
48 29&13 10/27/2006 2A Per GPIO A14, change USIO2.66 to PWRUSB_OC#. CCD_VDD_ON changed to U11.AD10.
49 13 10/27/2006 2A Per GPIO A14, change U11.AC19 to SIO_EXT_SCI#.
50 29&37 10/27/2006 2A Per Comm. requirement, Change USIO2.25 & J2.5 net-name from "BT_RADIO_DIS#" to "BT_RADIO_DIS_DC#"
51 13 10/30/2006 2A Change LOM_SMB_ALERT# PU to +3.3V_SUS per GG requirement.
52 28 10/30/2006 2A Change R183,R184 to 7.5K per EA fine tune requirement.
53 9 10/30/2006 2A Change L39 to BLM18PG101SN1D and added C629 for Intel requirement.
54 39-45 10/30/2006 2A Power update schematic.
E E
55 29 10/30/2006 2A Added 5021 co-layout schematic.
56 13 & 24 10/30/2006 2A Update WPAN_RADIO_DIS_MINI# circuit.
57 23 10/30/2006 2A Change SATA RX caps from DB to MB.
58 14 11/01/2006 2A Chnage R205 from 100 to 10 per GG requirement.
59 39 11/01/2006 2A Change PC52 to 4700pF pre GG requirement.
60 24 11/01/2006 2A Depopulate R156 & C173 & C158 per WWAN requirement.
61 23&24 11/01/2006 2A Added C649, C650, C651, R541, R561, R562 on CLK_REQ# per EMI requirement.
62 32 11/01/2006 2A Populate C639 and changed to 0.1uF per EMI requirement.
D D
63 39-45 11/02/2006 2A Update power schematic1102-1 per power update.
64 17 11/03/2006 2A Added 0_0402 RSV resistor per EMI requirement.
65 46 11/03/2006 2A Added 2EMI spring for EMI requirement.
66 17 11/07/2006 2A Leverage JM7 to added ferri bead on FSA for EMI solution. PT used 0ohms for fine tune.
67 17 11/07/2006 2A Change R319 to 2.2K per Intel recommend value.
68 34 11/07/2006 2A De-populate Q48 to prevent thermal strip issue.
69 12 11/08/2006 2A Added C652 for EMI solve CCD USB issue.
70 32 11/08/2006 2A Added U35 & R541 per audio 'po' issue reserved.
C
71 17 11/09/2006 2A Reserve L65 and used 0 ohms for Dawson check 14M noise emilination solution C
14,19,31,
72 37,38,39 11/09/2006 2A Reserve PR66 (0 ohms) for RF concern 14M noise coupling from +5V_RUN power trace.
73 23 11/09/2006 2A Added decoupling caps of +5V_HDD for Cosica.

74 12 11/10/2006 2A Added OC# docupling caps per refer Dawson solution to avoid 48MHz noise.
75 11,32 11/10/2006 2A For 'PO' noise, change SPEAKER_DET# from U18.4 to U11.AE10. Change U35.1 connection to U18.4.
B B
QUANTA
A
Title
COMPUTER A
EMI & Screw hole

C & G UMA 2A

6 5 4 3 2 1
6 5 4 3 2 1

38 17,35 01/10/2006 3A Per fine-tune table, change R99 from 91ohm to 33 ohm,and pop R133 and change from 33 to 10, C104 change to 4.7P,Pop C147 and change to 8.2P
F
C&G 39 12,17 01/10/2006 3A Per fine-tune table, change R81 from 91ohm to 33 ohm,and pop R200 and change to 33,C108 change to 10P,Pop C320 and change to 9P. F
UMA 40 13,17 01/10/2006 3A Per fine-tune table, change R95 from 100ohm to 33 ohm,and pop R94 and change to 33, C395 change to 1P, Pop C93
41 14 01/10/2006 3A Footprint not match, change footprint size of R149 from 0402 to 0603
42 29 01/11/2006 3A Per GG list item 31, Chnage the net name of 112 as CHIPSET_ID1
43 29 01/11/2006 3A For ST board ID, Pop R163, Depop R164
44 37 01/11/2006 3A Per GG list item 33, Add 0ohm_NC(R571) resistor pad connected from Coex1_BT_Active_MINI to Coex1_BT_Active
45 18 01/15/2006 3A Per GG list item 38, change R22 from 470 ohme to 100 ohms for LCD on/off timing EA requirement.
46 33 01/15/2006 3A Per GG list item 35, change C670,C671 to 33P
47 22 01/15/2006 3A Per RICHO's check result, apply 270pF(NC) for SD_CD# and MS_CD#.
E E
48 6 01/16/2006 3A Per GG list item 40, Change R427 from 2.4K to 3.3K
49 32 01/17/2006 3A Audio solution for pass EMI 225MHz and 451MHz radiation emission test.
Added R572, R578, R579 and R580 on AUD_SPK_L1, AUD_SPK_L2, AUD_SPK_R1, AUD_SPK_R2 trace
50 33 01/17/2006 3A Audio solution for pass EMI 225MHz and 451MHz radiation emission test.
Added R581, R582, R583 and R584 on AUD_LINE_OUT,AUD_HP_OUT
51 32 01/17/2006 3A Added L48, L49 on +.3.3V_RUN and +VADD -- 600 ohm power bead.
52 27 01/17/2006 3A USB device radiates strong R/W noise when the full device normal working,especially USB daughter
board and PCI express card.we suggest EE solution as follow.
Added C675, C676, C677, C678 150pF.
D D
53 13,17 01/17/2006 3A Per fine-tune table, change R65 to 33 ohm,and depop C71,R157 change to 33,Pop C180 and change to 6.8P.
54 40,45 01/18/2006 3A FL3,FL4 and FL5: Change footprint size as RC1210 and PN to FBMH3225HM202NT
55 40 01/18/2006 3A Add FL7 between PQ31 and +PWR_SRC
56 44 01/18/2006 3A Add FL8 and FL9 between +3.3V_ALW and +3.3V_ALWP
57 40 01/19/2006 3A Remove FL7 between PQ31 and +PWR_SRC. Because there is no spacing for layout.
58 44 01/19/2006 3A Remove PJP12
59 44 01/19/2006 3A For current ration concern, add a FL10
C
60 32 01/19/2006 3A Based on David mail, The pin 1, 9 need to populate both 0.1 uF // 560pF in Codecs +3.3V run power node. Added one .1uF on pin 40 for EMI C
requirement.-JM(0119)
61 46 01/19/2006 3A Update TH9,TH10,TH14,TH15 footprint for ESC concern.
62 32 01/19/2006 3A C331,C332 change PN to CH33306KL14
63 28 01/19/2006 3A R110 and R123 change to 1M
B B
QUANTA
A
Title
COMPUTER A
EMI & Screw hole

C & G UMA 2A

6 5 4 3 2 1
6 5 4 3 2 1

1 29 21/12/2006 3A Add R564,move the 'PLATFORM_BID' signal from SATA DB to MB
F
C&G 2 34 21/12/2006 3A Pop Q48, per JM's mail. F
UMA 3 35,36 21/12/2006 3A Base on internal notice,Change L7,L46 P/N from CX8LM152000 to CX5LM152000;L47,R66 P/N from CX5LM152000 to CX8LM152000.
4 17 21/12/2006 3A Base on internal notice, L65: Change QCI PN from CS00003J951 to CX08T250000
5 18 21/12/2006 3A Base on internal notice, Delete location C26 at CH31004KB17
6 37 21/12/2006 3A Per "Reference Schematic & Checklist Updates" mail, Change R560 from 0 to 10K
7 46 01/02/2006 3A Add a TH.
8 32,33 01/02/2006 3A Per EMI request, to reserve the filtering components for MIC signals.
9 22 01/02/2006 3A Add a switch, to prevnet XD card no detect issue. 0110: Reserve R570
10 39-45 01/02/2006 3A Power update schematic.
E E
11 14 01/03/2006 3A C482 change the footprint to CC0402-C.
12 32 01/04/2006 3A Per GG list item 2:add 100kohm resistor (R567) between pin 40 and +3.3V_RUN and a 1000pF cap
(C672 below) from Pin 40 to ground
13 28,29 01/04/2006 3A Per GG list item 3:DOCK_SMB_PME# should be pulled up to +5V_ALW DOCK_SMB_ALERT# should be pulled up to +3.3V_ALW
14 24 01/04/2006 3A Per GG list item 6: add series resistors(0ohm) on host debug signal.
15 24 01/05/2006 3A Per GG list item 7: Change the pin BT_ACTIVE# to LED_WPAN#
16 24 01/05/2006 3A Per GG list item 10: Add a series 0ohm resistor on the trace of pin 46 of J3
17 37 01/05/2006 3A Per GG list item 11: Delete the offpage connection of BT_ACTIVE#
D D
18 37 01/05/2006 3A Per GG list item 12:Add a 10K pull down on J2 pin2. and R190 100K NC.
19 31 01/05/2006 3A Per GG list item 13: Change TP MB connecter JTP1 pin9 from +3.3V_RUN to +5V_ALW
20 28 01/05/2006 3A Per GG list item 17: NC R382
21 29 01/05/2006 3A Per GG list item 20: BIOS ROM 1M change to 2M
22 32 01/05/2006 3A Per GG list item 24: Pop R274
23 17 01/05/2006 3A Per GG list item 18: R96 change to 2.2K
24 33 01/05/2006 3A Per GG list item 19: CCD soft-start circuit correct and Add reserve 0 ohm for remove Camera VCCD_ON.
JM: For layout placement spacing concern, I need removed R569,R570,R571,R572.
C
25 12,27 01/05/2006 3A Per GG list item 25: USB_OC4_8# channel separate C
26 46 01/08/2006 3A Per Derating report, C383,C377,C398,C10,C25,C319,C387,C16,C19,C324 change part number to CH41004M912
27 37 01/08/2006 3A Per GG list item 15, R67 47K change to 0 ohm and R561 10K change to 47K.
28 23 01/08/2006 3A Per GG list item 1:+5V_ALW2 changes to +3.3V_ALW2 Pop R576, Depop R546
29 12,13 01/08/2006 3A Per GG list item 15: PCIE_MCARD2_DET# from GPIO20 to ICH8 GPIO5/PIRQH# pin B3.( GPIO20 add test pad)
30 13 01/08/2006 3A Per GG list item 15: Add R577 (4.7K) series resistor at ICH8 pin AH12 (USB_MCARD1_DET#).
31 21 01/08/2006 3A Depop C266, for R5C833
32 30 01/08/2006 3A Delete RTC battery PN for moving to ME BOM
33 20,21 01/08/2006 3A Change U15 PN from 5C832 to R5C833
B B
14,19,31 RF had requiest split +5V_RUN for 14MHz noise fine tune resistor PR66 on PT stage. Now removed PR66 and change net name from +5V_RUN2 to
34 37,38,39 01/09/2006 3A +5V_RUN.
35 17 01/10/2006 3A Per fine-tune table, change PR3 from 22 ohm to 10 ohm.
36 17,28 01/10/2006 3A Per fine-tune table, change R97 from 100ohm to 51 ohm,and pop R129,C113 change to 10P,Pop C141 and change to 2.2P
37 17,20 01/10/2006 3A Per fine-tune table, change R98 from 100ohm to 10 ohm,and pop R198 and change from 10 to 22, C116 change to 10P, Pop C215 and change to 1P
QUANTA
A
Title
COMPUTER A
EMI & Screw hole

C & G UMA 2A

6 5 4 3 2 1

DELL Vostro 1400 QUANTA Fm5-Corsica PDF

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1 2 3 4 5 6 7 8

Cosica / Gilligan UMA VER : 2B

Date: Thursday, January 25, 2007 18:08:03 +07'00'

INDEX Power & Ground

2 Front Page PBATT+ MAIN BATTERY + (10~17V)

3-4 Merom PBATT+ SECOND BATTERY + (10~17V)

5-10 Crestline PWR_SRC MAIN POWER (10~19V)

11-14 ICH8M RTC_PWR3_3V RTC & +3.3V_RTC_LDO(3.3V)

15-16 DDRII SO-DIMM(200P) +VCC_CORE CPU CORE POWER (1.5V) RUNPWROK

17 Clock Generator +15V_ALW LARGE POWER (15V) SUS_ON

18-19 VGA/LVDS/CRT/S-Video +3.3V_RUN SLP_S3# CTRLD POWER RUN_ON

20 8 in 1 controller +3.3V_SUS SLP_S5# CTRLD POWER SUS_ENABLE

21 1394 function +3.3V_ALW 8051 POWER (3.3V) ALWON/THERM_STP#

22 8 in 1 connector +5V_RUN SLP_S3# CTRLD POWER RUN_ON

23 SATA & IDE Conn +5V_SUS SLP_S5# CTRLD POWER SUS_ON

24-25 Mini Card (WLAN/WPAN/WWAN) +5V_HDD HDD POWER (5V) +5V_RUN

28 SIO (MEC5025) +VDDA AUDIO ANALOG POWER (5V) AUDIO_AVDD_ON

29 SIO (MEC5011) +1.5V_RUN CALISTOGA/ICH7 POWER RUN_ON

30 Flash / RTC +1.05V_VCCP CPU/CALISTOGA/ICH7 POWER RUN_ON

31 TP/KB/Media/CIR Conn. +1_8V_SUS SODIMM POWER SUSPWROK_5V

32-33 Audio CODEC(STAC9200)/Phone Jack +1.8V_RUN SDVO POWER RUN_ON

34 FAN & Thermal +0.9V_DDR_VTT SODIMM POWER RUN_ON

35-36 LOM (BCM4401) +3.3V_LAN LAN POWER AUX_EN

38 System reset CKT.

40 Battery Charger AGND_ISL6260 CPU GND

41 DCIN/Batt Conn. AGND_TPS51120 DC/DC POWER GND

42 1.25V,1.8V,0.9V AGND1 VTT POWER GND

43 1.5VSUS,1.05V(VTT) AGND2 VTT POWER GND

44 D/D Power 8731AGND CHARGER GND

Size Document Number Rev

Date: Friday, January 19, 2007 Sheet 2 of 60

H_D#[0..63] U14B H_D#[0..63]

B2 C168 1 2 CPU_TEST1 PAD T95 CPU_TEST5

MLX_47387-4784 Place C close to the

Date: Friday, January 19, 2007 Sheet 3 of 60

AA15 AF5 10U/6.3V/0805 G26 AD5

VCC[058] VID[3] VSS[058] VSS[139]

+VCC_CORE VSS[071] VSS[152]

100U/25V 100U/25V 100U/25V 100U/25V_NC

.1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402

Route VCCSENSE and VSSSENSE

Size Document Number Rev

Date: Friday, January 19, 2007 Sheet 4 of 60

Size Document Number Rev

Date: Friday, January 19, 2007 Sheet 5 of 60

PAD T24 CFG_4 DMI_TXN_0 DMI_MTX_IRX_N0 12 termination resistors TV_DCONSEL_0 PEG_TX#_8

CFG9 C20 AJ47 AH39 LCD_B1+

R423 PAD T914.02K/F_0402_NCCFG17 M24 VGA_RED F29 R51

PM_EXTTS#1 J36 E36 R138 22K_0402 AE50

TP_NC2 NC_1 CL_PWROK VGA_RED

PAD T42 TP_NC8 BK1 150/F_0402

PAD T26 TP_NC11 A5 G39

Date: Friday, January 19, 2007 Sheet 6 of 60

DDR_A_D34 SA_DQ_33 SA_MA_1 DDR_A_MA2 DDR_B_D34 SB_DQ_33 SB_MA_1 DDR_B_MA2

DDR_A_D47 SA_DQ_46 DDR_B_D47 SB_DQ_46 DDR_B_RAS#

Size Document Number Rev

Date: Friday, January 19, 2007 Sheet 7 of 60

+VCC_GMCH AT35 +VCC_GMCH_L 1 2 AB33

AU32 Y19 +VCC_AXG AA35

BF33 AF19 U36

VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_46

VCC AXM NCTF

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26