Si Ge Photodiodes

UNIVERSITY OF CALIFORNIA
Santa Barbara
Si/Ge photodiodes for coherent and analog

communication
A Dissertation submitted in partial satisfaction of

the requirements for the degree
Doctor of Philosophy in Electrical and Computer Engineering
by
Molly Piels
Committee in charge:
Professor John E. Bowers, Chair
Professor Larry A. Coldren
Professor Nadir Dagli
Professor Mark J. Rodwell
December 2013
UMI Number: 3612014
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The dissertation of Molly Piels is approved.
Professor Mark J. Rodwell
Professor Nadir Dagli
Professor Larry A. Coldren
Professor John E. Bowers, Chair
July 2013
Si/Ge photodiodes for coherent and analog

communication
Molly Piels
c December 2013
Copyright
typeset in LATEX
iii
Acknowledgments
As an undergraduate looking at graduate schools, what attracted me most
to UCSB was the apparent willingness of everyone to work together and help
each other out. The reality did not disappoint. Even though my project was
somewhat outside of the mainstream of what was going on in the department
at the time, I never felt like I was ying solo. It is dicult to t, in a
reasonable amount of space, everything everyone did to help me nish my
Ph.D., which says great things about the environment there.
Firstly, I would like to thank my advisor, John Bowers, for supporting
me professionally and personally as well as establishing a truly collaborative research group. I will always appreciate his insights on and willingness to discuss anything from the most minute technical detail to the big
picture. Professors Larry Coldren and Mark Rodwell consistently provided
useful feedback in weekly PICO meetings. Both have an incredible depth
of knowledge in semiconductor device fabrication and microwave design that
they were willing to share with me. I also benetted from the advice of Prof.
Nadir Dagli, the nal member of my committee.
I would especially like to thank Anand Ramaswamy for mentoring me
when I rst joined the group and through the end of my Ph.D. I have greatly
enjoyed and proted from our discussions on photodiode design, microwave
measurements, and life in general. I hope everyone has the opportunity to
learn from someone so generous with their time and expertise. Hui-Wen
Chen, Jon Peters, Siddharth Jain, and Geza Kurczveil also deserve thanks
for introducing me to the cleanroom with extraordinary patience. My initial
process follower and design rules were the result of their willingness to share
their own processes and spend time diving into the details of mine.
I have been fortunate to have a strong network of friend-colleagues. Mike
iv
Davenport, Jared Bauters, and I spent most of our rst year in the same
oce, taking the same classes, and studying for the screening exam together.
It turned out that between the three of us, with enough caeine, time and
Taylor Swift, most problems would eventually get solved. This led to some really interesting discussions over the years as we all pursued dierent research
projects, and ultimately culminated in one of the more fun collaborations I
had at UCSB, the SOUL-PIC project. The PICO team: John Parker, Abi
Sivananthan, Mingzhi Lu, Hyun-chul Park, and Leif Johansson, helped me
rene detector designs and my fabrication process. Various growers I harassed, most notably Yan Zheng, Phil Mages, and Dan Haeger, explained
what are most likely extremely basic growth concepts to me. John Garcia,
Wenzao Li, and Henrik Poulsen all helped with the coherent receiver measurements. Ben Curtin was always great to talk to about mobility and silicon
processing. Current and former members of the Bowers group: Jin-Wei Shi,
Alex Fang, Matt Sysak, Martijn Heck, Di Liang, Peter Burke, Gehong Zeng,
Ashok Ramu, Tony Lin, Shane Todd, Jock Bovington, Daryl Spencer, and
Sudha Srinivasan, provided equally valuable feedback at various stages of the
project.
The UCSB nanofab community has been extremely welcoming and supportive. None of the work in this thesis would have been possible without
the work of the nanofab sta in maintaining the equipment and order in the
cleanroom. Aidan Hopkins, Adam Abrahamsen, Don Freeborn, Brian Lingg,
Bob Hill, and Tony Bosch in particular went above and beyond to make
the cleanroom a friendly and functional place. Andy Carter, Matt Hardy,
Dan Denningho, Vijay Jayaraman, Demis John, Biljana Stamenic, Antonio Labaro, and Jeong Kim were friendly faces and occasional collaborators
(some on pranks in addition to research).
v
I learned a lot from the groups collaboration with Huapu Pan, Andreas
Beling, and Joe Campbell at the University of Virginia. Ali Shakouri at UC
Santa Cruz was kind enough to let me use his groups thermal imaging setup,
where Dustin Kendig ran the measurement. I was lucky to have opportunities to mentor bright and hard-working people while at UCSB. Travis Lloyd
performed the minority carrier lifetime measurements in Chapter 3 and Haoran Li did the OIP3 measurements of the surface-normal photodetectors in
Chapter 5.
I would also like to thank my friends and family for their continued support through my Ph.D.
vi
Vita of Molly Piels

EDUCATION
Bachelor of Science in Engineering and Bachelor of Arts in History, Swarthmore College, Pennsylvania, June 2008
Master of Science in Electronics and Photonics, Electrical and Computer
Engineering Department, University of California Santa Barbara, December
2009
JOURNAL PUBLICATIONS
[1] M. Piels, J. F. Bauters, M. L. Davenport, M. J. R. Heck, and J. E.
Bowers, Low-loss silicon nitride AWG demultiplexer heterogeneously integrated with hybrid III-V/silicon photodetectors, Journal of Lightwave
Technology (in press), 2014.
[2] A. Beling, A. S. Cross, M. Piels, J. Peters, Q. Zhou, J. E. Bowers,
and J. C. Campbell, Inp-based waveguide photodiodes heterogeneously
integrated on silicon-on-insulator for photonic microwave generation,
Opt. Express, vol. 21, no. 22, pp. 25 90125 906, Nov 2013.
[Online]. Available: http://www.opticsexpress.org/abstract.cfm?URI=
oe-21-22-25901
[3] M. Piels, A. Ramaswamy, and J. E. Bowers, Nonlinear modeling
of waveguide photodetectors, Optics Express, vol. 21, no. 13, pp.
15 63415 644, Jul. 2013. [Online]. Available: http://www.opticsexpress.
org/abstract.cfm?URI=oe-21-13-15634
[4] M. Piels and J. E. Bowers, Si/Ge uni-traveling carrier photodetector, Optics Express, vol. 20, no. 7, p. 7488, Mar. 2012.
[Online]. Available: http://www.opticsinfobase.org/oe/fulltext.cfm?uri=
oe-20-7-7488&id=230429
[5] Z. Li, Y. Fu, M. Piels, H. Pan, A. Beling, J. E. Bowers,
and J. C. Campbell, High-power high-linearity ip-chip bonded
modied uni-traveling carrier photodiode, Optics Express, vol. 19,
http:
no. 26, pp. B385B390, Dec. 2011. [Online]. Available:
//www.opticsexpress.org/abstract.cfm?URI=oe-19-26-B385
vii
[6] M. Sysak, D. Liang, R. Jones, G. Kurczveil, M. Piels, M. Fiorentino,

R. Beausoleil, and J. Bowers, Hybrid silicon laser technology: A thermal
perspective, IEEE Journal of Selected Topics in Quantum Electronics,
vol. 17, no. 6, pp. 14901498, 2011.
[7] A. Ramaswamy, M. Piels, N. Nunoya, T. Yin, and J. E. Bowers, High
power silicon-germanium photodiodes for microwave photonic applications, IEEE Transactions on Microwave Theory and Techniques, vol. 58,
no. 11, pp. 33363343, Nov. 2010.
[8] A. Ramaswamy, N. Nunoya, K. J. Williams, J. Klamkin, M. Piels, L. A.
Johansson, A. Hastings, L. A. Coldren, and J. E. Bowers, Measurement
of intermodulation distortion in high-linearity photodiodes, Optics
Express, vol. 18, no. 3, pp. 23172324, Feb. 2010. [Online]. Available:
http://www.opticsexpress.org/abstract.cfm?URI=oe-18-3-2317
CONFERENCE PUBLICATIONS
[1] M. Piels, A. Ramaswamy, and J. E. Bowers, Harmonic balance modeling for photodetector nonlinearity, in 2013 IEEE International Topical
Meeting on Microwave Photonics, ser. OSA Technical Digest (online),
Oct. 2013, pp. 264266.
[2] H.-c. Park, M. Piels, E. Bloch, M. Lu, A. Sivananthan, Z. Grith, L. Johansson, J. E. Bowers, L. Coldren, and M. Rodwell, Integrated circuits
for wavelength division de-multiplexing in the electrical domain, in European Conference on Optical Communications, 2013, 2013.
[3] M. L. Davenport, J. F. Bauters, M. Piels, A. Chen, A. W. Fang, and
J. E. Bowers, A 400 Gb/s WDM receiver using a low loss silicon
nitride AWG integrated with hybrid silicon photodetectors, in Optical
Fiber Communication Conference/National Fiber Optic Engineers
Conference 2013, ser. OSA Technical Digest (online). Optical Society
of America, Mar. 2013, p. PDP5C.5. [Online]. Available: http:
//www.opticsinfobase.org/abstract.cfm?URI=OFC-2013-PDP5C.5
[4] S. Jain, M. N. Sysak, M. Piels, and J. E. Bowers, Hybrid
silicon transmitter using quantum well intermixing, in Optical
of America, Mar. 2013, p. OTh1D.2. [Online]. Available: http:
//www.opticsinfobase.org/abstract.cfm?URI=OFC-2013-OTh1D.2
viii
[5] A. Beling, A. S. Cross, M. Piels, J. Peters, Y. Fu, Q. Zhou, J. E. Bowers,

and J. C. Campbell, High-power high-speed waveguide photodiodes
and photodiode arrays heterogeneously integrated on silicon-oninsulator, in Optical Fiber Communication Conference/National Fiber
Optic Engineers Conference 2013, ser. OSA Technical Digest (online).
Optical Society of America, Mar. 2013, p. OM2J.1. [Online]. Available:
http://www.opticsinfobase.org/abstract.cfm?URI=OFC-2013-OM2J.1
[6] A. Beling, Y. Fu, Z. Li, H. Pan, Q. Zhou, A. Cross, M. Piels,
J. Peters, J. E. Bowers, and J. C. Campbell, Modied unitraveling carrier photodiodes heterogeneously integrated on siliconon-insulator (SOI), Integrated Photonics Research, Silicon, and
Nano-Photonics (IPR 2012), Colorado Springs, CO, 2012. [Online]. Available: http://optoelectronics.ece.ucsb.edu/sites/default/les/
publications/IPR%202012%20Beling.pdf
[7] M. Piels, A. Ramaswamy, and J. Bowers, A germanium on silicon
uni-traveling carrier photodiode, in 2011 IEEE Photonics Conference
(PHO), 2011, pp. 2526.
[8] J. E. Bowers, M. Piels, A. Ramaswamy, and T. Yin, High power
waveguide Ge/Si photodiodes, ECS Transactions, vol. 33, no. 6, pp.
729738, Oct. 2010. [Online]. Available: http://ecst.ecsdl.org/content/
33/6/729
[9] A. Ramaswamy, L. Johansson, U. Krishnamachari, S. Ristic, C.-H.
Chen, M. Piels, A. Bhardwaj, L. Coldren, M. Rodwell, J. Bowers,
R. Yoshimitsu, D. Scott, and R. Davis, Demonstration of a linear ultracompact integrated coherent receiver, in 2010 IEEE Topical Meeting
on Microwave Photonics (MWP), 2010, pp. 3134.
[10] U. Krishnamachari, S. Ristic, A. Ramaswamy, L. Johansson, C.-H.
Chen, J. Klamkin, M. Piels, A. Bhardwaj, M. Rodwell, J. Bowers, and
L. Coldren, Ultra-compact integrated coherent receiver for high linearity RF photonic links, in 2010 IEEE Topical Meeting on Microwave
Photonics (MWP), 2010, pp. 2730.
[11] A. Huard, M. Piels, A. Ramaswamy, J. Bowers, and D. Derickson, Improved RF power extraction from 1.55 m Ge/Si n-i-p photodiodes with
load impedance optimization, in IEEE Photonics Society, 2010 23rd
Annual Meeting of the, 2010, pp. 431432.
[12] M. Piels, A. Ramaswamy, J. E. Bowers, D. Kendig, A. Shakouri,
and T. Yin, Three-dimensional thermal analysis of a waveguide
Ge/Si photodiode, in Integrated Photonics Research, Silicon and
ix
Nanophotonics and Photonics in Switching, ser. OSA Technical

Digest (CD). Optical Society of America, Jul. 2010, p. ITuA5.
[Online]. Available: http://www.opticsinfobase.org/abstract.cfm?URI=
IPRSN-2010-ITuA5
[13] A. Ramaswamy, N. Nunoya, M. Piels, L. Johansson, L. Coldren, J. Bowers, A. Hastings, K. Williams, and J. Klamkin, Experimental analysis
of two measurement techniques to characterize photodiode linearity,
in International Topical Meeting on Microwave Photonics, 2009. MWP
09, 2009, pp. 14.
[14] M. Piels, A. Ramaswamy, W. Sfar Zaoui, J. E. Bowers, Y. Kang, and
M. Morse, Microwave nonlinearities in Ge/Si avalanche photodiodes
having a GainBandwidth product of 300 GHz, in Optical Fiber Communication Conference/National Fiber Optic Engineers Conference 2013,
ser. OSA Technical Digest (online). San Diego: Optical Society of
America, Mar. 2009.
Abstract
Si/Ge photodiodes for coherent and analog communication
by
Molly Piels
High-speed photodiodes have diverse applications in wireless and ber

communications. They can be used as output stages for antenna systems as
well as receivers for ber optic networks. Silicon is an attractive substrate
material for photonic components for a number of reasons. Low cost manufacturing in CMOS fabrication facilities, low material loss at telecommunications wavelengths, and relatively simple co-packaging with electronics are
all driving interest in silicon photonic devices. Since silicon does not absorb
light at telecommunications wavelengths, photodetector fabrication requires
the integration of either III-V materials or germanium. Recent work on germanium photodetectors has focused on low-capacitance devices suitable for
integration with silicon electronics. These devices have excellent bandwidth
and eciency, but have not been designed for the levels of photocurrent
required by coherent and analog systems. This thesis explores the design,
fabrication, and measurement of photodetectors fabricated on silicon with
germanium absorbing regions for high speed and high power performance.
There are numerous design trade-os between speed, eciency, and output power. Designing for high bandwidth favors small devices for low capacitance. Small devices require abrupt absorption proles for good eciency,
xi
but design for high output power favors large devices with dilute absorption.
The absorption prole can be controlled by the absorber layer thickness, but
this will also aect the bandwidth and power handling. This work quanties the trade-os between high speed, high eciency, and high power design. Intrinsic region thickness and absorption prole are identied as the
most important design variables. For PIN structures, the absorption prole
and intrinsic region thickness are both functions of the Ge thickness, but
in uni-traveling carrier (UTC) structures the absorption prole and intrinsic
region can be designed independently. This allows optimization of the absorption prole independently from the RC-limited frequency response and compression current and ultimately enables larger saturation current-bandwidth
products. This thesis includes the rst theory, fabrication, and measurement
of a uni-traveling carrier photodiode on the Si/Ge platform. Key contributions include an accurate nonlinear device model and a complete set of
processes and design rules for fabricating Ge devices in the UCSB nanofab.
The UTC structure is shown to be useful in extending the bandwidth and
power handling capabilities of waveguide-integrated photodiodes, especially
at high frequencies.
xii
Contents
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . .
iv
Vita of Molly Piels . . . . . . . . . . . . . . . . . . . . . . . . . . . vii

Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
xi
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . xii

List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xviii
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xxvii
1 Introduction
1.1
Photodiode design trade-os . . . . . . . . . . . . . . . . . . .
1.2
Receiver demands . . . . . . . . . . . . . . . . . . . . . . . . .
1.2.1
Analog links . . . . . . . . . . . . . . . . . . . . . . . .
1.2.2
Coherent receivers . . . . . . . . . . . . . . . . . . . .
1.2.3
Optical interconnects . . . . . . . . . . . . . . . . . . .
1.3
Thesis overview . . . . . . . . . . . . . . . . . . . . . . . . . . 10
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2 Linear and nonlinear modeling of photodiodes
2.1
2.2
15
Uni-traveling carrier absorber transport . . . . . . . . . . . . . 17

2.1.1
Collection eciency . . . . . . . . . . . . . . . . . . . . 24
2.1.2
Transit time . . . . . . . . . . . . . . . . . . . . . . . . 26
Bandwidth of UTC and PIN photodiodes . . . . . . . . . . . . 30
xiii
2.3
2.4
2.5
2.2.1
Transit time limit . . . . . . . . . . . . . . . . . . . . . 31
2.2.2
RC and transit-time limits . . . . . . . . . . . . . . . . 32
Analytical model for power handling . . . . . . . . . . . . . . 35

2.3.1
Saturation in PIN photodetectors . . . . . . . . . . . . 36
2.3.2
Relationship between Imax and I1dB . . . . . . . . . . . 39
2.3.3
Load voltage swing . . . . . . . . . . . . . . . . . . . . 42
2.3.4
Non-uniform illumination . . . . . . . . . . . . . . . . 45
2.3.5
Model verication and accuracy . . . . . . . . . . . . . 48
Numerical model for power handling . . . . . . . . . . . . . . 49

2.4.1
Cross-section model . . . . . . . . . . . . . . . . . . . . 50
2.4.2
Traveling-wave model . . . . . . . . . . . . . . . . . . . 51
2.4.3
Thermal model . . . . . . . . . . . . . . . . . . . . . . 53
2.4.4
Numerical model results . . . . . . . . . . . . . . . . . 59
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3 Design and measurement of Si/Ge UTC photodiodes
3.1
3.2
69
Optical design . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.1.1
Infrared absorption in germanium . . . . . . . . . . . . 70
3.1.2
Surface-normal photodiodes . . . . . . . . . . . . . . . 71
3.1.3
Waveguide photodiodes . . . . . . . . . . . . . . . . . . 73
3.1.4
Excess optical loss . . . . . . . . . . . . . . . . . . . . 79
Diode impedance . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.2.1
Physical origins . . . . . . . . . . . . . . . . . . . . . . 82
3.2.2
Measurement . . . . . . . . . . . . . . . . . . . . . . . 87
3.3
Practical limitations to transit time . . . . . . . . . . . . . . . 91
3.4
Experimental characterization of threading defects . . . . . . . 97
xiv
3.5
3.4.1
Electrostatic analysis . . . . . . . . . . . . . . . . . . . 97
3.4.2
Dark current . . . . . . . . . . . . . . . . . . . . . . . 102
3.4.3
Minority carrier lifetime . . . . . . . . . . . . . . . . . 107
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
4 Si/Ge processing
118
4.1
Process overview . . . . . . . . . . . . . . . . . . . . . . . . . 118
4.2
N-layer patterning . . . . . . . . . . . . . . . . . . . . . . . . 120
4.3
Germanium growth . . . . . . . . . . . . . . . . . . . . . . . . 122

4.3.1
Absorber doping . . . . . . . . . . . . . . . . . . . . . 123
4.3.2
Selective-area vs. non-selective epitaxy . . . . . . . . . 127
4.4
Metallization and vias . . . . . . . . . . . . . . . . . . . . . . 132
4.5
Processing summary . . . . . . . . . . . . . . . . . . . . . . . 134
4.6
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
5 Surface-normal detectors
143
5.1
Device design and fabrication . . . . . . . . . . . . . . . . . . 144
5.2
DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 146
5.3
Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
5.3.1
Diode impedance . . . . . . . . . . . . . . . . . . . . . 148
5.3.2
Transit time . . . . . . . . . . . . . . . . . . . . . . . . 152
5.4
Power handling . . . . . . . . . . . . . . . . . . . . . . . . . . 153
5.5
Linearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
5.6
Thermal impedance . . . . . . . . . . . . . . . . . . . . . . . . 158
5.7
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
xv
6 Waveguide UTCs
6.1
6.2
First generation . . . . . . . . . . . . . . . . . . . . . . . . . . 169

6.1.1
Design and fabrication . . . . . . . . . . . . . . . . . . 169
6.1.2
Dark current . . . . . . . . . . . . . . . . . . . . . . . 172
6.1.3
Responsivity . . . . . . . . . . . . . . . . . . . . . . . . 174
6.1.4
Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 176
6.1.4.1
Diode impedance . . . . . . . . . . . . . . . . 176
6.1.4.2
Transit time . . . . . . . . . . . . . . . . . . . 178
Second generation . . . . . . . . . . . . . . . . . . . . . . . . . 180

6.2.1
Design and fabrication . . . . . . . . . . . . . . . . . . 180
6.2.2
Dark current . . . . . . . . . . . . . . . . . . . . . . . 183
6.2.3
Responsivity . . . . . . . . . . . . . . . . . . . . . . . . 185
6.2.4
Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 187
6.2.5
6.3
165
6.2.4.1
Diode impedance . . . . . . . . . . . . . . . . 187
6.2.4.2
Transit time . . . . . . . . . . . . . . . . . . . 191
6.2.4.3
Voltage dependence . . . . . . . . . . . . . . 193
Power Handling . . . . . . . . . . . . . . . . . . . . . . 195
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
7 Coherent Receivers
7.1
7.2
204
Receiver design and fabrication . . . . . . . . . . . . . . . . . 205

7.1.1
Waveguide routing . . . . . . . . . . . . . . . . . . . . 205
7.1.2
MMI design . . . . . . . . . . . . . . . . . . . . . . . . 209
7.1.3
Thermal phase tuners
7.1.4
Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . 211
. . . . . . . . . . . . . . . . . . 210
Hybrid characterization . . . . . . . . . . . . . . . . . . . . . . 213
xvi
7.3
Operation as a coherent receiver . . . . . . . . . . . . . . . . . 216
7.4
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
8 Summary and Future Work
8.1
8.2
219
Summary of thesis . . . . . . . . . . . . . . . . . . . . . . . . 219

8.1.1
Modeling and material characterization . . . . . . . . . 219
8.1.2
Device fabrication and results . . . . . . . . . . . . . . 220
Future work . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221

8.2.1
Improved germanium models . . . . . . . . . . . . . . . 221
8.2.2
Improved Si/Ge UTCs . . . . . . . . . . . . . . . . . . 222
8.2.3
Next-generation receivers . . . . . . . . . . . . . . . . . 224
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
A List of symbols
227
B Silicon doping
230
B.1 Implant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230

B.2 Activation anneal . . . . . . . . . . . . . . . . . . . . . . . . . 233
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
C Si/Ge vertical etching and sidewall passivation
238
C.1 Si/Ge vertical etching . . . . . . . . . . . . . . . . . . . . . . . 239

C.1.1 Cl-based etches . . . . . . . . . . . . . . . . . . . . . . 241
C.1.2 Fluorine/oxygen-based etches . . . . . . . . . . . . . . 242
C.1.2.1
Etch chemistry . . . . . . . . . . . . . . . . . 243
C.1.2.2
Power . . . . . . . . . . . . . . . . . . . . . . 246
C.2 Sidewall passivation . . . . . . . . . . . . . . . . . . . . . . . . 248

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
xvii
D RF probe pad design and measurement
253
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
E Process follower
260
xviii
List of Figures
1.1
Optical coupling schemes for photodiodes. . . . . . . . . . . .
1.2
Band diagrams of a PIN photodiode and a UTC photodiode. .
2.1
Low-eld mobility and velocity-eld curves for silicon and germanium. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.2
Comparison between BJTs, III/V UTCs, and Si/Ge UTCs. . . 18
2.3
Coordinate system and boundary conditions for absorber transport. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.4
Electron concentration and current in a Si/Ge UTC absorber

with no built-in eld. . . . . . . . . . . . . . . . . . . . . . . . 23
2.5
Electron concentration and current in a Si/Ge UTC absorber

with a built-in eld. . . . . . . . . . . . . . . . . . . . . . . . . 23
2.6
Collection eciency for various minority carrier lifetimes . . . 25
2.7
Collection eciency as a function of built-in eld. . . . . . . . 26
2.8
Absorber transit time as a function of absorber thickness. . . . 28
2.9
Comparison of absorber transit times for PIN and UTC detectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.10 Transit-time limited bandwidth of a uni-traveling carrier photodiode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2.11 RC/transit-time trade-os for a Si/Ge UTC with varying absorber and collector thicknesses. . . . . . . . . . . . . . . . . . 33
xix
2.12 RC/transit-time trade-os for a Si/Ge UTC with a xed absorber thickness. . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.13 UTC and PIN bandwidths as a function of absorber thickness. 35
2.14 Coordinate system and boundary conditions for maximum
current density in a PIN photodiode. . . . . . . . . . . . . . . 37
2.15 Time-domain representation of a clipped signal. . . . . . . . . 40
2.16 1 dB compression current as a function of modulation depth. . 42
2.17 Simulated 1 dB compression currents for Ge PIN and Si/Ge
UTC photodiodes at 2 V bias. . . . . . . . . . . . . . . . . . . 44
2.18 Simulated 1 dB compression currents for Ge PIN and Si/Ge
UTC photodiodes biased at half the breakdown voltage. . . . . 45
2.19 Nonlinear photodiode cross-section equivalent circuit. . . . . . 51
2.20 Cascaded photodiode unit cells. . . . . . . . . . . . . . . . . . 52
2.21 Cross-section schematic and temperature distribution of an
n-i-p photodiode. . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.22 Simulated and measured surface temperature of a high-power
photodetector. . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.23 Simulated and measured surface temperature of a high-power
photodetector. . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
2.24 Measured and simulated RF output power and compression
for a waveguide Si/Ge PIN photodiode. . . . . . . . . . . . . . 60
2.25 Measured and simulated 1 dB compression current and power
for a waveguide Si/Ge PIN photodiode. . . . . . . . . . . . . . 61
2.26 Simulated output power as a function of photodetector width
and length. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
2.27 Simulated and measured output power as a function of thermal
impedance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
xx
3.1
Refractive index and absorption coecient of germanium. . . . 70
3.2
Measured responsivities of germanium photodiodes at 1310

and 1550 nm. . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
3.3
Limits to photocurrent from surface-normal PIN and UTC

photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.4
Evanescently coupled waveguide cross-section and mode types. 75
3.5
(a) Connement factor in germanium and overlap with input

mode as a function of germanium thickness. . . . . . . . . . . 76
3.6
Absorption eciency as a function of germanium thickness

for evanescently coupled Si/Ge photodiodes for TE- and TMpolarized inputs. . . . . . . . . . . . . . . . . . . . . . . . . . 77
3.7
Simulated eciency as a function of wavelength for a Si/Ge

waveguide detector. . . . . . . . . . . . . . . . . . . . . . . . . 78
3.8
Absorption due to free-carrier absorption in germanium. . . . 80
3.9
Absorption due to free-carrier absorption in silicon and n-type

indium phosphide. . . . . . . . . . . . . . . . . . . . . . . . . 81
3.10 Eective index and modal loss as a function of germanium

thickness for real and ideal top contacts. . . . . . . . . . . . . 82
3.11 Waveguide photodiode cross-section schematic and impedance. 83
3.12 Rectangular TLM measurement results for n- and n+ silicon
with nickel contacts. . . . . . . . . . . . . . . . . . . . . . . . 84
3.13 Electric eld distribution for a waveguide photodiode with an
undoped n-well and a highly doped n-well. . . . . . . . . . . . 86
3.14 RC-limited bandwidth as a function of photodetector length
assuming realistic parasitics. . . . . . . . . . . . . . . . . . . . 87
3.15 Small-circuit equivalent a photodiode. . . . . . . . . . . . . . . 88
3.16 Photodiode equivalent circuit with pad parasitics . . . . . . . 88
xxi
3.17 Systematic errors in diode impedance extracted from S11 data. 90

3.18 Band diagrams of a single grain boundary in doped germanium. 93
3.19 Band diagrams of a Si/Ge UTC with and without threading
defects at the heterojunction. . . . . . . . . . . . . . . . . . . 93
3.20 Threading-defect-induced barrier height as a function of pdoping and interface trap density. . . . . . . . . . . . . . . . . 94
3.21 Absorber electric eld as a function of thickness. . . . . . . . . 96
3.22 Doping prole extracted from C-V curves for surface-normal
photodetector epi material. . . . . . . . . . . . . . . . . . . . . 100
3.23 Doping prole extracted from C-V curves for waveguide photodetector epi material. . . . . . . . . . . . . . . . . . . . . . . 101
3.24 Absorber conductivity predicted by SIMS and measured by
SRP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
3.25 Dark current as a function of diode diameter and expected
reverse I-V curve. . . . . . . . . . . . . . . . . . . . . . . . . . 103
3.26 Dark current as a function of temperature and extracted trap
state energy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
3.27 Recombination lifetime of threading defect trap state. . . . . . 107
3.28 Setup for open circuit voltage decay and short circuit current
decay measurements. . . . . . . . . . . . . . . . . . . . . . . . 109
3.29 Open circuit voltage and short circuit current decay of a surfacenormal device. . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
4.1
Cross-sections of completed surface-normal and waveguide Si/Ge

photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
4.2
One possible process ow for a waveguide Si/Ge photodetector.120
xxii
4.3
Cross-sections of photodiodes using dierent n+ contact implant processes. . . . . . . . . . . . . . . . . . . . . . . . . . . 121
4.4
Band diagrams for UTCs with graded absorbers formed by ion

implantation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
4.5
Counter-doping tolerance. . . . . . . . . . . . . . . . . . . . . 126
4.6
Simulated implant prole for boron in germanium. . . . . . . . 127
4.7
Process ows for non-selective and selective germanium growth.128
4.8
Ridge prole after simultaneous vertical silicon and germanium etching. . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
4.9
Silicon surface after selective germanium wet etching. . . . . . 130
4.10 Photodiode cross-section after selective area growth . . . . . . 131

4.11 SEM image of waveguides patterned near mesas. . . . . . . . . 132
4.12 Via etched using the developed vertical, low-damage SiO2 via
process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
4.13 Process ows used in this work . . . . . . . . . . . . . . . . . 139
5.1
Cross-section schematic and micrograph of a surface-normal

Si/Ge UTC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
5.2
Diode I-V characteristic for a 14 m diameter surface-normal

photodetector. . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
5.3
Responsivity of surface-normal photodiode as a function of

wavelength and input power. This device has an 80 m diameter and a single layer T a2 O5 anti-reective coating and
otherwise has the same cross-section as shown Figure 5.1. In
(a), the bias voltage was -1 V and the photocurrent was well
below the saturation point. . . . . . . . . . . . . . . . . . . . . 147
xxiii
5.4
Small-circuit equivalent and measured capacitance of surfacenormal photodiodes. . . . . . . . . . . . . . . . . . . . . . . . 149
5.5
Bandwidth of a 14 m diameter surface normal photodiode. . 152
5.6
Bandwidth as a function of photocurrent for a surface-normal

photodiode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
5.7
Large-signal power-handling for surface-normal UTC photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
5.8
Schematic of OIP3 measurement. . . . . . . . . . . . . . . . . 157
5.9
OIP3 of a surface-normal Si/Ge UTC. . . . . . . . . . . . . . 158
5.10 Thermal performance of surface-normal Si/Ge UTCs. . . . . . 159

6.1
Bandwidth-eciency trade-os for germanium-based photodiodes in literature. . . . . . . . . . . . . . . . . . . . . . . . . . 166
6.2
First generation waveguide photodiode design . . . . . . . . . 170
6.3
Design considerations for the collector of the rst generation

waveguide detector. . . . . . . . . . . . . . . . . . . . . . . . . 171
6.4
Measured dark current of rst generation waveguide photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
6.5
Measured and simulated responsivity of rst generation waveguide photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . 175
6.6
Extracted capacitance and series resistance of rst-generation

waveguide photodiodes. . . . . . . . . . . . . . . . . . . . . . . 177
6.7
RC-limited bandwidth as a function of area for rst generation

6.8
Bandwidth contributions of rst generation waveguide Si/Ge

uni-traveling carrier photodiodes. . . . . . . . . . . . . . . . . 180
xxiv
6.9
Dierence between optical coupling schemes for waveguide

UTCs grown by selective-area and non-selective-area epitaxy. . 181
6.10 Second generation waveguide photodiode design. . . . . . . . . 182

6.11 Simulated n-well doping levels for rst and second generation
waveguide devices. . . . . . . . . . . . . . . . . . . . . . . . . 183
6.12 Measured dark current of second generation waveguide photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
6.13 Responsivity of the second generation of waveguide photodiodes vs. length and bias voltage.
. . . . . . . . . . . . . . . . 186
6.14 Responsivity as a function of wavelength for second generation

photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
6.15 Extracted capacitance and series resistance of second-generation
6.16 Series resistance contributions for second-generation waveguide photodiodes. . . . . . . . . . . . . . . . . . . . . . . . . . 189
6.17 RC-limited bandwidth as a function of area for second generation waveguide photodiodes. . . . . . . . . . . . . . . . . . . 190
6.18 Measured 3 dB frequency as a function of RC-limited frequency for second-generation waveguide photodiodes. . . . . . 191
6.19 Bandwidth of a 3 m x 50 m second generation photodiode. 192
6.20 Bandwidths of a 4 m x 13 m and a 3 m x 90 m second
generation device at -2, -4, and -5 V bias. . . . . . . . . . . . . 194
6.21 Transit-time limited frequency response as a function of heterojunction barrier height. . . . . . . . . . . . . . . . . . . . . 195
6.22 Output power at 30 GHz as a function of photocurrent for a
4 m x 13 m and a 3 m x 90 m waveguide photodetector. 196
xxv
6.23 Small-signal and low-photocurrent RF attenuation as a function of bias voltage for the second generation waveguide UTC. 197
6.24 Compression currents for two detectors as a function of voltage
and frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . 198
7.1
Fabricated coherent receivers. . . . . . . . . . . . . . . . . . . 204
7.2
Diagram of fabricated coherent receivers. . . . . . . . . . . . . 205
7.3
Cross-sections of the routing waveguides used for coherent receivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
7.4
MMI fabrication tolerance (in width) for coherent receivers.
. 210
7.5
Thermal phase tuner cross-section schematic. . . . . . . . . . . 211
7.6
On-chip bias circuit used for rst generation of coherent receiver.211
7.7
Simulated detector bandwidth for dierent values of bias capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
7.8
C-V and I-V characteristics of integrated bias capacitors. . . . 213
7.9
Measurement setup used to characterize 90 optical hybrids. . 215
7.10 Hybrid phase tuning for rst generation and second generation
coherent receivers.
. . . . . . . . . . . . . . . . . . . . . . . . 216
7.11 Eye diagram of rst generation coherent receiver with 5 Gb/s

BPSK data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
8.1
Vertical taper for selectively grown Si/Ge UTCs. . . . . . . . . 223
B.1 Cross-section, mask layout, and SEM for self-aligned n+ contact implant. . . . . . . . . . . . . . . . . . . . . . . . . . . . 232
B.2 Germanium annealed at 600 C without a dielectric encapsulation layer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
B.3 Dependence of anneal temperature on thermocouple position. 236
xxvi
C.1 Chemical etch mechanism. . . . . . . . . . . . . . . . . . . . . 239

C.2 Physical etch mechanism.
. . . . . . . . . . . . . . . . . . . . 240
C.3 Sidewall passivation during dry etching. . . . . . . . . . . . . . 240

C.4 Bowers Si etch prole on silicon and germanium. . . . . . . . . 242
C.5 Sidewall proles for CF4 and SF6 -based etches. . . . . . . . . 243
C.6 Eect of O2 content on Ge sidewall prole for SF6 /O2 etches. 244
C.7 ICP etching of silicon with SF6 /O2 . . . . . . . . . . . . . . . . 245
C.8 Eect of chamber pressure on sidewall texture for SF6 /O2 ICP
etch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 246
C.9 Eect of RF power on sidewall texture for SF6 /O2 ICP etch. . 248
C.10 Eect of increasing the ICP power for the SF6 /O2 ICP etch. . 248
D.1 RF probe pad schematic, capacitance, and inductance. . . . . 254
D.2 Eect of substrate resistivity on Z0 and microwave loss. . . . . 255
D.3 Layout of the probe pads measured. . . . . . . . . . . . . . . . 256
D.4 Top view and cross-section of probe pads with anchors. . . . . 258
xxvii
List of Tables
2.1
Simulation parameters for Si/Ge UTC absorber transport . . . 24
2.2
Si/Ge material parameters for power handling and capacitance. 43
2.3
Measured and expected values for compression current in literature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
2.4
Simulation parameters for numerical nonlinear model verication. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
C.1 Dry etch summary . . . . . . . . . . . . . . . . . . . . . . . . 247

C.2 Sidewall passivation summary . . . . . . . . . . . . . . . . . . 251
D.1 Extracted RF probe pad capacitance and inductance. . . . . . 257
xxviii
Chapter 1
Introduction
Optical ber is an integral part of modern communications infrastructure.
Due to its low loss and low dispersion, much larger amounts of data can be
transported over single-mode ber than copper wiring. Using ber requires
electrical/optical and optical/electrical conversion at either end (and often
in between). In a generic ber-optic link, at the transmit end, the data is
impressed on the light by an external modulator or by directly modulating the
laser. The receiver usually consists of some optical ltering, a photodetector
that performs the optical-electrical conversion, and additional electronics.
Optical links have traditionally been divided into two categories: analog and digital. An analog link is one in which the nal desired output can
lie anywhere in a range of values, while in a digital link the desired output
comes from a nite set of values. Twenty years ago, the analog/digital distinction applied to the photodiode output. Most digital communication used
on-o keying, so the desired photodiode output was either a lot of photocurrent or no photocurrent. Most analog communication was entirely analog:
the primary application areas for analog links were antenna remoting, cable
television, and phased-array antenna systems, none of which involved digi-
tal signals [1]. In recent years, the line has blurred. In a digital coherent
receiver (used in long-haul telecommunications), the signal coming from the
photodiode is analog in the sense that having 90% of the maximum possible
photocurrent is meaningfully distinct from having 100%. As the distribution
of wireless Internet over optical ber has increased in popularity, many links
considered analog are in fact encoded with digital data [2]. From a photodetector design standpoint, both digital coherent and analog applications require devices with large bandwidths and signicant amounts of output power.
This thesis focuses on design considerations for photodiodes to be used in
these kinds of applications and fabricated in the silicon/germanium material system. The primary, but not the only, benet of fabricating photonic
devices in Si/Ge is the low cost relative to traditional III/V materials.
1.1
Photodiode design trade-os
Photodetector performance is usually assessed in terms of the eciency,

bandwidth, dark current (and excess noise factor for avalanche photodiodes
(APDs)), and linearity. There are several design trade-os involved in achieving good performance in any one area. The specic trade-os involved depend mostly on the cross-section design and the general device geometry.
The way light is coupled into the photodiode plays a large role in dening
design trade-os. There are two main coupling schemes for photodetectors:
surface-normal, where the light enters the absorbing region perpendicular to
the substrate, and waveguide-coupled, where the light enters parallel to the
substrate. This is illustrated in Figure 1.1. In general, surface-normal photodiodes have better eciency and power-handling while waveguide photodiodes have larger bandwidths [3]. Both kinds of photodiodes are demonstrated
in this thesis.
Top-illuminated
Evanescently coupled
optical input
top contact
Absorber
top contact
side
contact
optical input
input
waveguide
Absorber
Substrate
Substrate
Backside-illuminated
Butt-coupled
top contact
Absorber
side
contact
optical input
input
waveguide
top contact
Absorber
Substrate
Substrate
optical input
(a) Surface-normal photodiodes
(b) Waveguide photodiodes
Figure 1.1: Optical coupling schemes for photodiodes.
The primary focus of this thesis is a novel cross-section for silicon/germanium

photodiodes, the uni-traveling carrier (UTC) design. The rst demonstrations of UTC-PDs for high output power and high speed were in 1996 by
Davis et al. [4] and 1997 by Ishibashi et al. [5] and used InGaAs/InP; this
thesis represents the rst Si/Ge demonstration. The dierences between
the UTC design and the more standard PIN design are illustrated in Figure 1.2. The PIN consists of a single, fully depleted, absorbing layer, while
the UTC has an undepleted absorber and an additional depleted layer in a
wider bandgap material (silicon, in this case).
Regardless of optical coupling scheme, the germanium layer thickness controls the quantum eciency of a photodiode. In a PIN photodiode, it also
Ge
Si
absorber
Si
Ge
collector
Wi
Wc
Wa
PIN
UTC
Figure 1.2: Band diagrams of (a) a PIN photodiode and (b) a UTC photodiode in Si/Ge. In the Si/Ge system, most of the band oset appears in
the valance band, which is the source of the spike in the valance band at the
p-Si/i-Ge interface in (a).
controls the diode capacitance, the transit-time limited bandwidth, and the
maximum output power. As the germanium is made thicker, the capacitance
decreases, which increases the RC limited bandwidth, but it takes longer for
carriers to be collected, which decreases the transit-time limited bandwidth.
The optimum point may or may not coincide with good eciency and output power. In a uni-traveling carrier photodiode, the germanium thickness
typically dominates the transit-time limited bandwidth but has no eect on
the RC limit or output power. These are instead determined by the silicon collector thickness, which also contributes to the transit-time limit. The
benet of the UTC topology in the Si/Ge material system is that it allows
for additional degrees of freedom in the cross-section design, decoupling the
transit-time limited bandwidth and the eciency from the RC-limited bandwidth and the saturated output power.
1.2
Receiver demands
The system in which a photodiode is going to be used ultimately denes the

most important metrics. In a 20 Gb/s communication system, for example, using a 100 GHz photodiode with 10% quantum eciency will result in
worse performance than using a 10 GHz detector with 100% eciency. The
focus of this thesis is on optimizing germanium photodiode design for both
power-handling and bandwidth performance simultaneously, while maintaining suciently high responsivity and low dark current for the nal device to
be useful in a real system. The two main application areas for high-speed
high-power photodiodes are analog optical links and coherent receivers. As
a general principle, photodiodes for use in analog systems must have large
output powers, but need not be integrated with other optical components.
Coherent receivers do not generally require as high levels of output power,
but the photodiodes must be waveguide-integrated if the 90 optical hybrid
is to be included on the same chip.
1.2.1
Analog links
Analog links are used to carry signals over a very broad range of frequencies,
from the MHz range for some military applications to 110 GHz (W-band)
radio-over-ber systems. Though these applications are diverse, they share
key performance metrics: noise gure, gain, and spurious-free dynamic range
(SFDR) [2]. Both noise gure and SFDR are improved by using photodiodes
with larger saturated output powers.
The Si/Ge material system is attractive for high-power applications because the thermal conductivities of Si and Ge are higher than competitive
III/V materials (InGaAs and InP). This can increase the thermal failure5
limited output power of the photodiode and relax cooling and packaging requirements. Apart from thermal conductivity, germanium is not a very good
material for power handling. The breakdown eld is lower than the breakdown eld of silicon due to the narrower band gap. This means that the
maximum bias that can be applied across the device is relatively low, which
negatively impacts the saturated output power. The uni-traveling-carrier
cross-section design overcomes these limitations by shifting the critical region
for current saturation from the germanium to the silicon. Surface-normal devices with a saturation current of 20 mA and bandwidth of 20 GHz are shown
in Chapter 5, and waveguide devices with a saturation current of 2 mA and
bandwidth of 40 GHz are shown in Chapter 6. Detailed design considerations, including concerns unique to the material system, are presented in
Chapters 2 and 3.
1.2.2
Coherent receivers
Most Internet trac is currently carried on wavelength division multiplexed

(WDM) channels on the 50 GHz spaced ITU grid [6, 7]. As demand for data
capacity has increased, the bit rate of these channels has scaled up from
10 Gb/s to 40 Gb/s [8] and more recently to 100 Gb/s [9, 10]. The recongurable optical add-drop multplexers (ROADMs) currently used to direct
internet trac act as optical lters, and limit the bandwidth of each optical
channel to about 16 GHz [9]. Thus although data rates have increased
substantially in recent years, channel bandwidth has not. Instead, polarization division multiplexing and quadrature phase shift keying (QPSK) have
been used to increase the spectral eciency of each channel [6, 7]. This has
been enabled by increasing analog-to-digital converter (ADC) speeds and
advanced digital signal processing techniques, and does not require photodi6
odes with bandwidths in excess of 20 GHz or with linear operating ranges

far beyond 2 mA [11].
Increasing capacity requirements can be met by using even higher order
modulation formats (such as 16- or 64-QAM) with the same restrictions
on channel bandwidth, but this would come at the cost of exponentially
increasing signal-to-noise ratio requirements [12]. Alternatively, the spectrum
could be re-allocated to eliminate or reduce the large guard bands currently
in use [13, 14]. In this case, bandwidth requirements for photodiodes could
increase substantially, depending on the way the spectrum is allocated. There
is no consensus as to what receiver bandwidths will be required by future
(1 Tb/s) channels, but there is a general agreement that digital coherent
receivers will be used and that the channel bandwidth will most likely be
larger than in currently deployed systems [6, 15].
The photonic part of a digital coherent receiver consists of a 90 optical
hybrid and four photodiodes. There are a number of competitive technologies for fabricating coherent receivers for use in current and future optical
networks. Up to about 20 GHz, surface-normal InP-based PIN photodiodes
with acceptable responsivities are available [16], and can be co-packaged with
optical hybrids made from bulk components. A more compact approach is to
bond a chip containing the detectors to a polymer or silica waveguide-based
hybrid, and couple light from the hybrid to the detectors vertically, using an
angled mirror [17, 18]. This can decrease packaging costs relative to bulk optic approaches, as well as facilitate path-length matching because all optical
and electrical paths can be dened lithographically.
For larger channel bandwidths, waveguide photodiodes, and thus monolithic integration, are necessary [16]. The photodetectors are usually the
smallest components on a coherent receiver photonic integrated circuit, so
7
total chip footprint is dominated by the 90 optical hybrid and any decoupling capacitors used (e.g. [19,20]). Indium phosphide is an excellent material
for photodiode fabrication, but die area is expensive relative to silicon-based
platforms, and neither optical hybrid nor capacitor performance is better in
III/V materials than in silicon. Silicon photonic platforms can potentially
oer further savings by taking advantage of mature, high-volume CMOS infrastructure to lower manufacturing costs. Thus germanium-based photodetectors with bandwidths in excess of 20 GHz and linear operation up to about
2 mA have potential applications in future telecom networks. Chapter 7 covers a demonstration of a coherent receiver based on germanium photodiodes
with 30 GHz bandwidth.
1.2.3
Optical interconnects
The focus of this thesis is on germanium photodiodes for analog and digital
coherent applications, but there are some ideas developed here that can be
directly applied to the design of Ge PDs for optical interconnects. Optical
interconnects have been proposed as a way to reduce power dissipation and
delay relative to copper wiring for chip-to-chip or core-to-core communication
in microprocessors. Germanium is an attractive absorbing material for this
application because it is easier to incorporate into silicon-CMOS processes
than other narrow-bandgap materials. Fabricating photodiodes and transistors on the same chip allows for low-parasitic interconnects between photonics and electronics, enabling receivers with lower energy consumption [21].
Two processes for monolithically integrating waveguide germanium photodiodes with CMOS electronics have been demonstrated: Luxteras Lux-G
process [22], and an IBM process [23].
A direct consequence of monolithic integration of photodiodes and elec8
tronics is the possibility of fabricating receiverless photonic front ends, or

photodiodes connected directly to CMOS logic circuits (rather than transimpedance ampliers (TIAs)) [24]. The benet of this scheme is reduced
power consumption due to the elimination of the TIA and limiting amplier,
but it places more stringent requirements on the photodiode.
The data rate and energy consumption necessary for a optical interconnect to be competitive with an electrical one are functions of both interconnect length [25] and width. For a 1 cm interconnect (approximately the
distance from one side of a chip to the other) and a wire/waveguide width of
500 nm, in order to be competitive with CMOS electronics at the 32 nm node,
an optical interconnect would need to operate below 300 fJ/bit at 1 Gb/s
or the same eciency at a higher data rate [26]. Assuming a perfectly ecient laser, unity quantum eciency, and neglecting power consumption in
the modulator (or from dynamic switching of the laser), at 1 Gb/s the maximum photocurrent available to the detector would be 375 A (300 W at
1550 nm). Loads on the order of 1 10 k are required to transform this
photocurrent to a voltage large enough to drive CMOS electronics [27]. The
limit on bandwidth due to this increased load impedance has been explored
quantitatively: since the load resistance is expected to be very large, photodiode series resistances in the 100s of s would be acceptable, but the
device capacitance would have to be on the order of 1 fF [27]. Photodetectors with suciently low capacitances to maintain high data rates have been
reported [28,29], but to date there has been no analysis of whether or not the
ultra-compact designs necessary to achieve such low capacitance can provide
the voltage swing required.
In large part, this is because nonlinear modeling and experiments are
dicult. The two existing processes for fabricating photodiodes on the same
9
chips as electronics use photodiodes with capacitances larger than the recordlow ones (10 fF for IBMs photodiodes [23] and larger for Luxteras). This
eectively rules out a germanium-based experiment. Chapter 2 contains an
analytical model that can be used to determine the maximum voltage swing
available from a waveguide photodiode as a function of device dimensions,
input power, and load impedance, that could be directly applied to this
problem.1
1.3
Thesis overview
In Chapter 2, we will establish a theoretical framework in which highly idealized UTC and PIN detectors in Si/Ge can be compared on equal footing. In Chapter 3, the theoretical work from Chapter 2 will be applied to
the Si/Ge material system. Chapter 4 describes the fabrication of surfacenormal and waveguide Si/Ge UTC photodiodes. Experimental results from
surface-normal and waveguide photodiodes are covered in Chapters 5 and 6,
respectively. Chapter 7 contains coherent receiver characterization. Finally,
Chapter 8 summarizes the thesis and provides some potential future research
directions.
Receiverless circuits are interesting in contexts other than optical interconnects, where
there is likely to be more photocurrent available. The model applies to these situations as
well, though accurate simulation is less important because experiments are possible.
10
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14
Chapter 2
Linear and nonlinear modeling
of photodiodes
To aid in the design phases of this project, several analytical models were
developed to describe Si/Ge UTCs. Simulating some aspects of Si/Ge UTC
performance requires nite-element techniques, but the closed-form expressions oer close approximations to measured performance. Analytical formulae can also be computed more quickly than numerical simulations, which
allows for generation of design curves on reasonable time scales. Si/Ge UTCs
dier from III/V ones primarily in the absorber design, in a way that aects
both the quantum eciency and the transit-time limited bandwidth of the
device, and several commonly-used design equations for III/V UTCs had to
be re-examined. From a power handling perspective, the very clear advantage of a UTC topology in III/V is substantially less clear in Si/Ge. In
order to predict whether a UTC or PIN cross-section would be preferable,
closed-form expressions for maximum output power had to be developed.
For transport modeling, most of the analysis centers around the semicon-
15
ductor drift-diusion equations,

dp
1 dJp
= Gopt R
dt
q dx
(2.1)
dn
1 dJn
= Gopt R +
dt
q dx
(2.2)
where p is the hole concentration, n is the electron concentration, Gopt is the

photogeneration rate, R is the recombination rate, q is the electron charge,
and Jp and Jn are the hole and electron currents, respectively. Poissons
equation relates the charge density to the electric eld:
dE
q
= (p n + ND NA )
dx
(2.3)
where E is the electric eld, is the permittivity of the semiconductor

( = s 0 ), and ND and NA are the donor and acceptor concentrations.
In general, drift-diusion modeling is only as accurate as the material
models used. This presents some diculties for Si/Ge UTCs, as the low-eld
electron mobility is an important parameter, and there is no consensus as to
its value in strained p+ germanium. Figure 2.1 (a) shows the values used
for low-eld electron and hole mobility in germanium as a function of doping
concentration. These are not consistent with experimental results. More
likely ranges of values (consistent with literature and experimental results)
will be discussed in Chapters 3, 5, and 6. Figure 2.1 (b) shows velocity-eld
relations for undoped silicon and germanium. Saturated carrier velocities in
both silicon and germanium are very similar, but the minimum eld necessary
to achieve velocity saturation is much higher for holes.
16
6
10 x 10
4000
Ge: electrons
Velocity (cm/s)
Low-field mobility
(cm2/Vs)
5000
3000
2000
Ge: holes
1000
0
1015 1016 1017 1018 1019 1020
Doping (cm-3)
Si: electrons
8
6
4
Ge: electrons
Ge: holes
Si: holes
2
0 2
10
103
104
105
Field (V/cm)
Figure 2.1: (a) Low-eld mobility for holes and electrons in germanium as
a function of doping. (b) Velocity-eld curves for silicon and germanium.
Germanium data is from [1] and [2], while silicon is from [3]
2.1
Uni-traveling carrier absorber transport
Uni-traveling carrier photodiodes have very similar band structures and current transport to the base-collector portion of bipolar junction transistors
(BJTs). In the photodiodes, the optical input takes the place of the emitter in injecting minority electrons into the base/absorber. The transit-time
limited frequency response of a BJT has been derived in the past [4], and
the transit-time limited frequency response of a typical III/V UTC has as
well [5]. Si/Ge UTCs dier substantially from III/V ones because the boundary condition at the p-contact is dierent. In a BJT, the minority carrier
concentration at the base-emitter junction is controlled by the base-emitter
voltage. Since the base-collector junction is reverse-biased, the minority carrier concentration there goes to zero, ensuring a concentration gradient that
forces electrons to travel through the base and enter the collector. This is
illustrated in Figure 2.2 (a).
In a UTC, the electrons are generated ev-
erywhere, and in theory could diuse into the p-contact and recombine with
17
emitter
p(x)
base
collector
n(x)
(a) BJT
d-block absorber
collector
n(x)
(b) III/V UTC
absorber
collector
n(x)
(c) Si/Ge UTC
Figure 2.2: Comparison between (a) BJTs, (b) III/V UTCs, and (c) Si/Ge
UTCs. The minority carrier distributions shown are simplied built-in
electric elds in the base/absorber and recombination are neglected. The
conduction band oset for a III/V device will only be small if band-smoothing
layers are used. The conduction band oset between Si and Ge is drawn to
scale: it is close to zero.
excess holes there. This would decrease the eciency of the device, so usually
in III/V UTCs a wider bandgap material is inserted between the absorber
and p-contact as a diusion-blocking layer. In the Si/Ge system, there are
limited options for growing a wider bandgap material due to the large lattice mismatch between the two materials and relative immaturity of growth
technology. Silicon growth on germanium-on-silicon has been demonstrated
by molecular beam epitaxy (MBE) [6], but the commercial growth vendors
used in this work did not have a functional process for growing a similar
structure. Polysilicon could also be used as a diusion-blocking layer, but at
the cost of additional optical loss as well as fabrication complexity. The difference (due to the lack of a diusion block) in minority carrier concentration
between III/V UTCs and Si/Ge ones is shown in Figure 2.2 (b-c). Because
electrons are prevented from diusing into the p-contact in the III/V case,
the electron concentration decreases monotonically from the p-contact to the
absorber-collector junction. In the Si/Ge case, electrons can go either way,
18
so the electron distribution is more symmetrical. This has an impact on both

the eciency and the bandwidth of the device.
Jn
P-contact
Absorber
Collector
Jn=qns
Jn=-qnve
x=0
x=Wa
Figure 2.3: Coordinate system and boundary conditions for absorber transport.
Figure 2.3 shows the coordinate system and boundary conditions assumed in the derivation of the collection eciency and transit-time limited
bandwidth for Si/Ge UTCs. The electron current shown decreases linearly
through the absorber. This happens to be the correct shape at DC, but only
the end values are assumed for the derivation. For the purpose of simplicity, we will consider the case of uniform photogeneration in the absorber.
For surface-normal photodiodes, the photogeneration rate decreases exponentially away from the surface, and for waveguide photodiodes it can vary
over the length of the device, but the eect of this for the devices considered in this thesis is not large. It is well-known that the minority electron
current dominates the frequency response of the absorber in UTC PDs [5].
Substituting Gopt = Gopt ejt and n = n0 ejt , Equation 2.2 becomes
19
jn0 ejt = Gopt ejt
n0 ejt 1 dJn
+
n
q dx
(2.4)
Here, n refers to the excess minority carrier concentration, and ShockleyRead-Hall recombination with un-saturated traps has been assumed (R =
n
).
n
The absorber is usually designed so that there is an electric eld pushing the
electrons toward the collector. In the coordinate system used, the electric
eld is negative. In principle, a eld can be induced either by grading the doping or the composition, but for germanium absorbers, compositional grades
would decrease the responsivity at 1550 nm, so a doping grade is used. The
electron current is then
(
dn
Jn = q nn E + Dn
dx
)
.
(2.5)
The built-in electric eld E can be a function of position, but here we will
assume it is constant. The electron mobility n and diusion coecient Dn
are a function of both eld and doping. If the eld is constant, and it is
caused by a doping gradient, then the mobility and diusion coecient have
to be position-dependent, but this eect is small for practical levels of doping
and complicates the algebra substantially, so it is ignored. Equation 2.4 then
becomes
jn0 = Gopt
n0
dn0
d2 n0
+ n E
+ Dn 2 .
n
dx
dx
(2.6)
The solution to Equation 2.6 is of the form

n0 (x) = A1 ek1 x + A2 ek2 x +
where
k1,2
n E
=
2Dn
n E
2Dn
20
Gopt
.
j + 1n
)2
+
1
n
+ j
Dn
(2.7)
(2.8)
(k1 is the sum and k2 is the dierence). The electron current is

1
Gopt
Jn (x) = (n E + Dn k1 ) A1 ek1 x + (n E + Dn k2 ) A2 ek2 x + n E
. (2.9)
q
j + 1n
At the absorber-collector junction (x = Wa ), the electrons exit with a
velocity ve , and Jn is
Jn |x=Wa = qn0 (Wa ) ve .
(2.10)
The eect of a heterojunction barrier or charge trapping at the interface is

usually excluded from this kind of analysis, and would lower the exit velocity
slightly from the thermal velocity. In the Si/Ge material system, the conduction band oset is very small (0.05 eV [7]), so it is not considered here.
At the p-contact (x = 0), the electrons exit with velocity s that depends on
the properties of the metal-semiconductor junction, and Jn is
Jn |x=0 = qn0 (0) s.
(2.11)
The signs of Equations 2.10 and 2.11 are opposite because both velocities have
been dened as positive, but the particle currents are in opposite directions.
Equation 2.11 is the only dierence between the derivation given here and one
for BJTs or UTCs with diusion blocks. For BJTs, the boundary condition
is the electron concentration at the emitter-base junction, which is set by the
emitter-base bias, while for UTCs with diusion blocking layers s is set to
zero. Solving Equations 2.7, 2.9, 2.10, and 2.11 for A1 and A2 yields
Gopt (n E + Dn k2 s) (n E + ve ) (n E + Dn k2 + ve ) (n E s) ek2 Wa
A1 =
|A|
j + 1n
(2.12)
21
and
A2 =
Gopt (n E + Dn k1 + ve ) (n E s) ek1 Wa (n E + Dn k1 s) (n E + ve )
|A|
j + 1n
(2.13)
where
A=
n E + Dn k1 s
n E + Dn k2 s
(n E + Dn k1 + ve ) e
(n E + Dn k2 + ve ) e
k1 Wa
(2.14)
k2 W a
If s = 0, Equations 2.12 and 2.13 simplify to the expressions in [5]. If s = ve

and there is no built-in electric eld, k1 = k2 and
k1 Wa
Gopt e 2
A1 =
j + 1n |A|
(Dn k1 + ve ) (ve ) e
k1 Wa
2
(Dn k1 ve ) (ve ) e
k1 Wa
2
(2.15)
and
k1 Wa
]
k1 Wa
k W
Gopt e 2 [
12 a
2
(D
k
+
v
)
(v
)
e
A2 =
(D
k
v
)
(v
)
e
n
1
e
e
n
1
e
e
j + 1n |A|
(2.16)
so that A1 = A2 ek1 Wa and the excess electron concentration is symmetric

about the center of the absorption region. This is shown (at DC) in Figure 2.4 (a) and the associated electron current is shown in (b). The electric
eld adds asymmetry to the solution. The electron concentration and current
for an absorber with a built-in eld are shown in Figure 2.5. The simulation
parameters for both are given in Table 2.1. The optical generation rate Go pt
roughly corresponds to 500 A of photocurrent for a 10 m diameter device
with unity collection eciency.
Since the hole current at the absorber-collector junction is near zero and
22
1.5
s=0
1
0.5
0
s = ve
Distance
Wa
Electron current (A/cm2)
Electron conc. (cm-3)
x 1015
400
s = ve
0
s=0
-400
-800
0
Distance
Wa
x 1014
s=0
6
s = ve
4
2
0
Distance
Wa
Electron current (A/cm-2)
Electron conc. (cm-3)
Figure 2.4: (a) Electron concentration and (b) current in a Si/Ge UTC
absorber with no built-in eld. Simulation parameters are given in Table 2.1.
0
s = ve
-400
-800
0
s=0
Distance
Wa
Figure 2.5: (a) Electron concentration and (b) current in a Si/Ge UTC
absorber with a built-in eld. Simulation parameters are given in Table 2.1.
the total current in the absorber must be constant, the total photocurrent is
Jtot = Jn (Wa )
(2.17)
as long as the operating frequency is smaller than 1/R , where R is the

dielectric relaxation time of the absorber.
23
Table 2.1: Simulation parameters for Figures 2.4 and 2.5

Parameter
Value
Gopt
n
n
Dn
ve
Wa
E
1 1026 cm3 s1
10 ns
2000 cm2 /V s
52 cm2 /s
3 107 cm/s
400 nm
0 or 1.5 kV/cm
The mobility, diusion coecient, and eld are consistent

with an absorber doping in the
range of 1 1018 to 1 1019 cm3 .
The exit velocity is the thermal
velocity of electrons in germanium [8].
2.1.1
Collection eciency
As mentioned previously, a nonzero back-diusion velocity at the p-contact

will reduce photodiode eciency. We can dene the collection eciency c
c =
Jtot
Jtot |s=0,n
(2.18)
where the total current is normalized to the zero-recombination no-backdiusion case and all currents are evaluated at DC. The collection eciency of
an absorber with a built-in electric eld is plotted in Figure 2.6 as a function
of minority lifetime and the back-diusion velocity at the p-contact. Other
parameters for the calculation are given in Table 2.1. For back-diusion
velocities much less than the exit velocity, any minority lifetime greater than
1 ns will lead to 100% collection eciency. Despite high defect densities
relative to bulk germanium, germanium on silicon typically has minority
carrier lifetimes far in excess of 1 ns.
24
1
n = 1 ns
n = 100 ps
Collection efficiency
0.8
n = 10 ps
0.6
0.4
0.2
n = 1 ps
unlikely
0
100
impossible
105
s (cm/s)
1010
Figure 2.6: Collection eciency as a function of s for various minority carrier

lifetimes
In a real device, s will depend on the properties of the p-contact, and is

dicult to predict or measure. At most, it is equal to the thermal velocity
(physically impossible values are marked in red in Figure 2.6). Measured
collection eciencies imply it is large enough to aect performance (unlikely
values are marked in green in Figure 2.6). The worst-case (high s) collection eciency is determined by the magnitude of the built-in electric eld.
Collection eciency as a function of eld strength is plotted in Figure 2.7.
If the electron velocity can be saturated (E> 3 kV/cm), then the collection
eciency will be above 90% even for a relatively large value of s.
25
Collection efficiency
s=1105
s=1106
0.8
s= 1107
0.6
0.4
0.2
2
4
Built-in field strength (kV/cm)
Figure 2.7: Collection eciency as a function of built-in eld. s is in cm/s.
2.1.2
Transit time
In this thesis, the word bandwidth refers to the 3 dB electrical power

bandwidth of a photodetector. Since the electrical power is proportional to
the photocurrent squared, in decibels, the frequency response H is
(
H(f ), dB = 20 log10
IP D (f )
Iava
)
(2.19)
where IP D(f ) is the measured photocurrent and Iava is the available photocurrent at the same frequency. In the nomenclature of Agilent or HP lightwave
component analyzers, H(f ) = 20 log10 (S21 ) [9]. Occasionally in literature,
the current response will be used instead, or the 20 in Equation 2.19 will
be replaced with a 10. This is sometimes called the optical frequency response, or just the frequency response. For a standard single-pole low-pass
system with a pole at , the 3 dB bandwidth will be at f3dB = 1/2 . If the
26
current response is instead used to calculate the bandwidth, then the 3 dB
bandwidth will be at f3dB = 3/2 . For the purpose of comparing pole

locations, the denition of bandwidth used here is preferable, as the relationship between the characteristic time and bandwidth is simpler. The second
denition is surprisingly common in Si/Ge photodiode literature. Unfortunately, real photodiodes do not always have frequency responses that look
like single-pole low-pass lters, so comparison between reported values where
dierent bandwidth denitions are used is more dicult than multiplication
by 3.
A large number of expressions for the transit time in the base of a BJT
with a built-in eld have been proposed [10]. Usually, the transit time a is
an equation of the form
a = f1 (E)
Wa2
Wa
+ f2 (E)
Dn
ve
(2.20)
where f1 and f2 are functions of the built-in eld and vary depending on the
assumptions made in the calculation. For UTCs with both a eld and backdiusion, the situation is further complicated. Figure 2.8 shows the inverse
of the absorber 3 dB cut-o frequency as a function of Wa for a xed value
of electric eld and dierent values of s. All simulation parameters are given
in Table 2.1. Comparing s = 1 105 to s = 1 106 , it is clear that large values
of s increase the bandwidth. The gure also shows two dierent canonical
expressions for the absorber transit time. The rst, in light blue, neglects the
built-in eld. As the gure indicates, the built-in eld substantially decreases
the transit time. The second, in yellow, includes the built-in eld but not
back-diusion and lies on top of the calculated response for low s.
It is worthwhile to compare the absorber transit-time limit to the equiv-
27
100
a =
1/f3dB (ps)
80
Wa2 Wa
+
3Dn
ve
60
s=1107
s<1105
40
20
0
a =
200
2(1+(
Wa2
2Wa
kBT
3/2
400
600
Wa (nm)
W
+ va
)Dn
e
800
1000
Figure 2.8: Absorber transit time as a function of absorber thickness. The

dark blue and green curves show values calculated from Equations 2.72.14
for dierent values of s. The expression in the light blue curve is from [11]
and the expression in the yellow curve is from [12].
alent limit for a PIN photodiode. For a PIN diode, the transit-time limited
current density is [12]
J = qGopt
1 ejWi /vsat jt
e
jWi /vsat
(2.21)
assuming the hole and electron velocities are equal. For PIN photodiodes,
the bias eld is nearly always large enough to saturate the velocities of the
holes and electrons, which are about equal in germanium. For UTC detectors, when the built-in eld is large enough to saturate the electron velocity
and when s is small, the characteristic absorber transit time is also Wa /vsat
and the transit-time limits are similar for both kinds of detector. Calculated
frequency responses for both kinds of detector are shown in Figure 2.9. The
absorber is 400 nm thick and the carrier velocity is 6 106 cm/s for both de-
28
tectors. Even though the characteristic time is the same for both detectors,
the shapes of the frequency response are dierent. The PIN stays at longer
but rolls o faster. This leads to a higher 3 dB bandwidth but worse performance beyond the 3 dB point. Unlike III/V UTCs, Si/Ge UTCs do not
have shorter transit times than comparable PIN detectors because the electron velocity is not several times larger than the hole velocity. The saturated
electron velocity in germanium is actually slightly larger than the saturated
hole velocity, enough to pull the UTC curve up to the PIN curve from DC to
the 3 dB point, but the dierence is nowhere near as dramatic as in III/V materials. Since the collector transit time is never zero, a Si/Ge UTC will never
have a higher transit-time limited bandwidth than a Ge PIN with the same
absorber thickness. The primary benet from the UTC structure in terms
of bandwidth is that the capacitance is determined by the silicon collector
thickness, which favorably aects the transit-time/capacitance trade-o.
29
Response (dB)
0
PIN
-5
UTC
-10
-15
0
50
Frequency (GHz)
100
Figure 2.9: Comparison of absorber transit times for PIN and UTC detectors.
The absorber is 400 nm thick and the electric eld is chosen such that the
carrier velocity is 6 106 cm/s for both detectors. Other parameters are given
in Table 2.1
2.2
Bandwidth of UTC and PIN photodiodes
The correct way to calculate the bandwidth is to solve Equations 2.1, 2.2,
and 2.3 under boundary conditions imposed by the external circuit. This is
dicult to do by hand, but it can be done using most commercial TCAD
software. Since there are a number of other transport-related eects in real
devices that are too dicult to include in analytical expressions for bandwidth, TCAD simulation is most often necessary as a nal step in a design
process anyway. However, analytical expressions are very useful for understanding how dierent design and material parameters aect device performance, and several useful conclusions about when a UTC will oer superior
performance to a PIN can be drawn directly from them.
30
2.2.1
Transit time limit
The total transit-time limited frequency response of a UTC is
Jtot
1
=
W a + Wc
sin(c ) jc
Wa Jn (Wa ) + Wc Jn (Wa )
e
c
)
(2.22)
where
c =
Wc
2vn
(2.23)
and vn is the electron velocity in the collector. Figure 2.10 shows the simulated frequency response of a Si/Ge UTC for low and high values of s. The
collector was 300 nm thick, and other simulation parameters are the same as
in Table 2.1. The bandwidth-eciency product is about 30 GHz for both devices, even though the device with a high value of s has a bandwidth 15 GHz
larger than the more ecient design.
Response (dB)
-5
s = 1107
s=0
-10
-15
20
40
60
Frequency (GHz)
80
100
Figure 2.10: Transit-time limited bandwidth of a uni-traveling carrier photodiode. The collector is 300 nm thick and the saturated electron velocity of
silicon is 1 107 . Other parameters are given in Table 2.1
31
2.2.2
RC and transit-time limits
The RC response primarily comes from the interaction of the diode capacitance with the load resistance and is fairly straightforward to calculate. The
relevant resistance is the load plus parasitic series resistance, and the diode
capacitance is
CP D =
s 0 A
,
W
(2.24)
where s is the relative permittivity of the depleted semiconductor, 0 is

the permittivity of free space, A is the area, and W is the depletion region
thickness of the diode. For a PIN diode, this is approximately the intrinsic
region thickness, while for UTCs it is the collector thickness. There is also
usually a parasitic capacitance due to the probe pads that is discussed in
Appendix D.
The easiest method to combine the RC limit with the transit time limit
is to simply add the time constants together, which is useful for gaining intuitive understanding, but tends to be inaccurate when the time constants are
close together [13]. A compromise approach is to calculate the transit-time
and RC limits separately, and then multiply transfer functions together. This
is often done for BJTs and has worked well for other photodiodes [14, 15].
Figure 2.11 shows the calculated 3 dB bandwidth of a Si/Ge UTC as a
function of collector and absorber thickness. The back-diusion velocity s
was 1 106 cm/s and all other transit-time related parameters are given in
Table 2.1. The capacitance was calculated using Equation 2.24 assuming
a 50 m diameter photodiode, with the relative dielectric constant of silicon s = 11.7, and the parasitic series resistance and pad capacitance were
ignored. The bandwidth increases monotonically with decreasing absorber
thickness, which is expected since the absorber thickness does not aect the
32
10
1000
capacitance.
10
12
12
12
4
6
8
600
14
14
16
14
400
18
12
16
18
200
4
6
8
16
10
Wa (nm)
10
800
500
1000
1500 2000
Wc (nm)
2500
3000
Figure 2.11: RC/transit-time trade-os for a Si/Ge UTC with varying absorber and collector thicknesses. Contour lines indicate 3 dB bandwidths in
GHz. The device diameter is 50 m. The capacitance was calculated using a
simple parallel-plate model. The load resistance is assumed to be 50 , and
the parasitic series resistance and pad capacitance are ignored. Transit-time
related parameters are given in Table 2.1. Devices with smaller areas can
have much larger bandwidths.
Figure 2.12 shows the calculated 3 dB bandwidth of a Si/Ge UTC as

a function of collector thickness. There is an optimum collector thickness
where the RC and transit-time limits are balanced, and this thickness varies
with area.
Figure 2.13 shows the calculated 3 dB bandwidth of a Si/Ge UTC and a
PIN as a function of absorber thickness for a 50 m diameter (or 1960 m2 )
device. A dierent collector thickness is chosen for each absorber thickness in
order to maximize bandwidth at each point. These vary from 1.8 m at the
peak bandwidth to 2.1 m for thicker absorbers. For thin absorbers, where
the PIN diode is RC limited, the UTC is faster because the silicon collector
33
30
3 dB bandwidth (GHz)
10 m
25
20
50 m
15
10
100 m
5
0
1000
2000
Collector thickness (nm)
3000
Figure 2.12: RC/transit-time trade-os for a Si/Ge UTC with a xed absorber thickness (400 nm) for various device diameters. The capacitance
was calculated using a simple parallel-plate model. The load resistance is
assumed to be 50 , and the parasitic series resistance and pad capacitance
are ignored. Transit-time related parameters are given in Table 2.1.
is used to decrease the capacitance. In this region, the transit-time limited

bandwidth for the UTC is controlled by the silicon thickness. As a result,
the maximum bandwidth achievable is controlled by the material properties
of silicon rather than germanium. Since electrons in silicon are faster than
electrons or holes in germanium, and because the dielectric constant of silicon
is lower than the dielectric constant of germanium, the UTC with the highest
bandwidth is faster than the best PIN.
34
20
3 dB bandwidth (GHz)
UTC
15
PIN
10
1000
2000
Absorber thickness (nm)
3000
Figure 2.13: UTC and PIN bandwidths as a function of absorber thickness

for a 50 m diameter device.
2.3
Analytical model for power handling
Drift-diusion modeling can also be used to estimate the maximum current

density in a photodetector. In the intrinsic region of a photodetector, under
low-injection conditions, there is a roughly constant electric eld due to the
applied bias that separates the charge carriers. As the current density in the
intrinsic region increases, the carriers (holes and electrons for PIN, electrons
only for a UTC) screen the electric eld. Under high injection the eld
distribution redistributes with the minimum occurring in the intrinsic region.
The maximum current density is reached when the minimum of the electric
eld drops below the value necessary for the carriers to be able to maintain
their saturation velocities. For a UTC, the corresponding current density is
35
the same as the Kirk current density in a BJT [16]:
Jkirk
2s 0 vn
=
Wc2
qWc2
Vbi + VP D Ecrit Wc +
ND
2s 0
)
(2.25)
where here vn is the saturated electron velocity, Vbi is the diode built-in
voltage, VP D is applied (reverse) voltage, Ecrit is the minimum electric eld,
and ND is donor density in the collector. The equivalent expression for a
PIN photodiode is derived in Sub-Section 2.3.1. For both PIN and UTC
photodiodes, increasing the applied voltage increases the maximum current
density. In an RF system where there is a load, the voltage swing across the
load subtracts from the bias voltage, which decreases the maximum possible
output power. In order to estimate the impact of load voltage swing, the
relationship between the maximum current density and the 1 dB compression current must be known; this is derived in sub-section 2.3.2. Complete
expressions for the 1 dB compression current are given in sub-section2.3.3.
2.3.1
Saturation in PIN photodetectors
The coordinate system used to derive the maximum current density is shown
in Figure 2.14. The p-i interface is at x = 0 and the i-n interface is at x = Wi .
If the bias electric eld is large enough that the holes and electrons reach
their saturation velocities, the diusion current can be neglected and we have
Jp = qpvp
(2.26)
Jn = qnvn .
(2.27)
and
36
P-contact
holes
Intrinsic region
N-contact
electrons
x=0
x=Wi
Figure 2.14: Coordinate system and boundary conditions on hole and electron concentrations for maximum current density in a PIN photodiode.
In this context, vp and vn refer to the saturated carrier velocities and are
positive quantities. Neglecting recombination, Equations 2.1 and 2.2 become
0 = Gopt vp
dp
dx
(2.28)
0 = Gopt vn
dn
.
dx
(2.29)
and
Equations 2.28 and 2.29 are both rst-order dierential equations with solutions of the form:
p, n(x) =
Gopt
x + B1,2 .
vp,n
(2.30)
The steady-state excess hole concentration at the n-contact (x = Wi ) is zero

because all holes generated there will move toward the p-contact. The excess
electron concentration at the p-contact (x = 0) is zero for the same reason.
37
This yields
B1 =
Gopt Wi
vp
(2.31)
for holes and

B2 = 0
(2.32)
for electrons. Since the current is constant through the device, the electron
and hole concentrations are related
Jtot = qp(x)vp qn(x)vn
(2.33)
= qGopt Wi
so that
(
)
Gopt Wi
x vp + vn
p(x) n(x) =
1
vp
Wi v n
(
)
Jtot
x vp + vn
=
1
.
qvp
Wi v n
(2.34)
In this coordinate system, Jtot is negative, so the net charge at x=0 is positive.
Integrating Equation 2.3 to get the electric eld,
Jtot
E(x) =
vp
x2 vp + vn
x
2Wi vn
)
+ E(0).
(2.35)
Here, has been substituted for s 0 . There is an additional boundary condition imposed by the terminal voltage that determines the value of E(0).
Integrating the electric eld over the photodiode yields the terminal voltage
VP D plus the built-in voltage Vbi :
VP D + Vbi =
Wi
E dx.
)
(
Jtot Wi2 2vn vp
E(0)Wi .
=
6
vp vn
0
38
(2.36)
To nd the critical current, we set the electric eld minimum to be -Ecrit .

The minimum of E is at
xmin = Wi
vn
.
vp + vn
(2.37)
As a result,
E(0) = Ecrit +
Jtot Wi
vn
.
2 vp (vn + vp )
(2.38)
Substituting Equation 2.38 into Equation 2.36

Jtot Wi2
VP D + Vbi =
vn
vn
6vp (vn + vp ) 2vp,sat (vn + vp )
)
+ Ecrit Wi .
(2.39)
Rearranging,
|Jmax | =
2.3.2
6 vn vp
(Vbi + VP D Ecrit Wi ) .
Wi2 vn + vp
(2.40)
Relationship between Imax and I1dB
Equations 2.25 and 2.40 give the maximum current density a device can sustain. Beyond these densities, the electric eld in the intrinsic region collapses
completely and no more photocurrent is available from a device. If the input
is a sinusoidal signal, so that the input optical power
Pin = P0 (1 + m cos(t))
(2.41)
where P0 is the amplitude, m is the modulation depth (so that the available
electrical power is proportional to mP02 ), and is the angular frequency,
then the output will be clipped at the maximum current. Figure 2.15 shows
a likely time-domain waveform.
Both the DC and the RF components of
the output signal will be attenuated due to the clipping. The Fourier series
39
Tc
Photocurrent
Imax
IDC
IRF
-T
2
Time
T
2
Figure 2.15: Time-domain representation of a clipped signal. The rst two

terms of the Fourier series representation are also shown.
of the signal shown in Figure 2.15 is

(
(
)
(
))
sin TTc
Tc
Tc
Iph (t) =I0 1 m
+ m cos
T
T
( Tc ) )
)(
(
2t
Tc sin 2 T
1
+
+ mI0 cos
T
T
2
)
(
( Tc )
( nTc )
(n1)Tc
(
)
sin
T
2nt cos 2T sin T
.
+ mI0
cos
T
n
(n
1)
n odd
n>2
(2.42)
I0 is the amplitude of the uncompressed input sine wave. The series does not
converge point-wise (because the function is not continuously dierentiable),
so the Fourier series should not be used to predict time-domain values. The
rst two terms of the series are also plotted in Figure 2.15. The 1 dB compression point is dened as the point where the actual output power is less
40
than the output power predicted by the DC part of the photocurrent by 1 dB.
So the compression is
( T )
(
))2 2 2
c
sin T
Tc
Tc
m I 0 RL
Compression (dB) =10 log10 1 m
+ m cos
T
T
2
(
( Tc ) )2
2
2
Tc sin 2 T
m I 0 RL
10 log10 1
+
T
2
2
(
)
sin( Tc )
1 m T + m TTc cos TTc
.
=20 log10
sin(2 TTc )
Tc
1 T +
2
(2.43)
For 100% modulation depth, the compression is equal to -1 dB when Tc /T
is 0.38. At this point, the DC part of the photocurrent is equal to 0.6Imax .
Figure 2.16 shows the DC and RF photocurrents at the 1 dB compression
point as a function of Imax . Over the full range of possible values of m, the
DC part of the photocurrent
(
)
I1dB,DC 0.24m2 0.627m + 0.993 Imax
and the RF part is approximately IRF Imax IDC .
41
(2.44)
Current at I1dB
(frac. of Imax)
0.8
DC
0.6
RF
0.4
0.2
0
0.5
Modulation depth
Figure 2.16: Relationship between the 1 dB compression current and the

maximum current as a function of modulation depth. Values were obtained
by setting the compression from Equation 2.43 to -1 dB, solving for Tc /T ,
and then using that value in Equation 2.42.
2.3.3
Load voltage swing
In a typical circuit, and at the point of peak output current, the photodiode
voltage VP D from Equation 2.25 or 2.40 can be expressed as
VP D = Vbias IDC Rs IRF (RL + Rs )
(2.45)
where RL is the load resistance and Rs is the diode parasitic resistance.

There may be a dierence in phase between the RF part of the photodiode
voltage and the current due to the complex impedance of the photodiode and
load, but this is neglected here for the purpose of simplicity. At the 1 dB
compression point, IRF = kImax , where k comes from Equation 2.44. For
uniform illumination, Imax = AJmax , where A is the diode area. Neglecting
the series resistance and substituting Equation 2.45 into Equation 2.25 and
42
2.40,
2vn Vbi + Vbias Ecrit Wc
n
Wc2
1 + kARL 2v
W2
(2.46)
6 vn vp Vbi + Vbias Ecrit Wi

vp .
Wi2 vn + vp 1 + kARL W62 vvnn+v
p
(2.47)
Imax,U T C = A
and
Imax,P IN = A
For 100% modulation depth, k is 0.4 and the 1 dB compression current is

0.6Imax .
Equations 2.46 and 2.47 would imply that the output power decreases
monotonically with intrinsic region thickness. For a xed bias voltage, this
is the case. Figure 2.17 shows the 1 dB compression current as a function of
intrinsic region thickness for germanium PIN and Si/Ge UTC photodiodes
of dierent areas at 2 V bias. Simulation parameters are given in Table 2.2.
The calculated values are nearly the same for both PIN and UTC detectors
because 3Ge vsat,Ge 2Si vnsat,Si and the critical elds are the same for both.
It should be noted that due to the relatively low dielectric constant of silicon, if a germanium PIN and Si/Ge UTC have the same depletion region
thickness, the RC limit for the UTC will be at a higher frequency.
Table 2.2: Si/Ge material parameters for power handling and capacitance.
Parameter
Value
Si
Ge
11.7
16.1
6 106 cm/s
6 106 cm/s
1 107 cm/s
10 kV/cm (for holes)
10 kV/cm (for electrons)
100 kV/cm
300 kV/cm
vsat,n,Ge
vsat,p,Ge
vsat,n,Si
E,G
E,S
EB,G
EB,S
These are relative dielectric constants.
43
PIN
100 m
60
UTC
80
1 dB compression
current (mA)
1 dB compression
current (mA)
80
50 m
40
10 m
20
0
0
0.5
1
1.5
2
Intrinsic region thickness (m)
100 m
60
50 m
40
10 m
20
0
0.5
1
1.5
2
Collector thickness (m)
Figure 2.17: Simulated 1 dB compression currents for (a) Ge PIN and (b)
Si/Ge UTC photodiodes at 2 V bias. The compression currents were calculated using Equations 2.46 and 2.47 with k=0.4 and the material parameters
in Table 2.2.
Figure 2.18 shows 1 dB compression currents as a function of intrinsic region thickness when the PD is biased at half its estimated breakdown voltage
EB . The bias voltage is an important enough parameter that considering
the breakdown eld in the calculation reverses the trend in Figure 2.17: for
both UTCs and PINs, the compression current increases with increasing intrinsic region thickness. The breakdown eld in silicon is about 3x larger
than the breakdown eld in germanium, and as a result, Si/Ge UTCs can
be biased at higher voltages than Ge PINs and have compression currents
about 3x larger.
44
PIN
500
1 dB compression
current (mA)
1 dB compression
current (mA)
500
400
300
200
100 m
50 m
100
0
10 m
UTC
100 m
400
300
50 m
200
100
00
0
0.5
1
1.5
2
Intrinsic region thickness (m)
10 m
0.5
1
1.5
2
Collector thickness (m)
Figure 2.18: Simulated 1 dB compression currents for (a) Ge PIN and (b)
Si/Ge UTC photodiodes biased at half the breakdown voltage. The compression currents were calculated using Equations 2.46 and 2.47 with k=0.4
and the material parameters in Table 2.2.
2.3.4
Non-uniform illumination
Up until now, we have assumed that all photodiodes were uniformly illuminated (I = AJ). For high-power surface-normal detectors, this is often an
accurate approximation. Even though the incident beam is usually Gaussian, the best performance is obtained when the ber is pulled back so that
the illumination is nearly-uniform over the active area. This cannot be done
when testing waveguide photodiodes. The relationship between (local) optical power and photogeneration rate is not always immediately obvious. In
general,
Gopt (z) =
d
dz
(2.48)
where is the photon ux (the optical power normalized to the photon

energy) and the derivative only includes the change in photon ux due to
absorption. If the incident photon ux is only partially concentrated in the
45
absorbing region,
(z + z) = (z)(z)ez
(2.49)
where is the connement factor and is the material absorption coecient.

If z is small enough so that both can be assumed constant,
Gopt (z) = (z)(z)
1 ez
z
(2.50)
= (z)(z).
This equation also applies to photodetectors with excess loss occurring outside the absorption region (e.g. scattering loss and metal absorption loss).
For single-mode behavior, neglecting the carrier concentration and temperature dependencies of the optical indices, the connement factor will not
be a function of z, will decay exponentially and
Gopt (z) = (0)ez .
(2.51)
The current density (in the x-direction) at z is directly proportional to the

optical generation rate (see Equation 2.9), and the total photocurrent from
the device is obtained by integrating the density in the y (width) and z
(propagation) directions. For multimode waveguides, Equation 2.50 should
be used.
The photodetectors considered in this work were all multi-mode,
but the simulated absorption proles were typically well-approximated by an

exponentially decaying function with a single characteristic length.
If we assume that under compression and at the peak of the cycle the
current density is equal to the maximum current density from z = 0 to
1
The analysis here is based on optical power, but it is really the electric eld that is
absorbed the material. When multiple modes are present in the waveguide, the relative
phases of their electric elds must be considered.
46
z = zsat , for a single-mode device, the total photocurrent is

(
Itot,max = WP D
)
Jmax zsat ( zsat
e
e
eLP D
Jmax zsat +
)
(2.52)
where WP D is the detector width and LP D is the length. The rst term is
the contribution of the compressed part of the detector, and the second term
is the contribution of the uncompressed part. The prefactor in the second
term comes from requiring the current density to be continuous in z. At the
1 dB compression point, the ratio of the total to available photocurrent at
the maximum point in the cycle is
Jmax zsat +
Itot,max
=
2I0
Jmax zsat
e
1
Jmax zsat
e
eLP D
)
(2.53)
= zsat ezsat + ezsat eLP D

This can be solved for zsat as a function of modulation depth. From Equation 2.42, at 100% modulation depth and at 1 dB compression point, Imax =
1.5I0 . For a long photodiode (such that eLP D 0), zsat = 0.75. Then
Imax = Jmax WP D
1.75
.
(2.54)
And the relationship between Imax and the DC and RF parts of the 1 dB
compression current are the same as before.
Non-uniform absorption creates a concentration gradient in the z-direction
that will lead to a diusion current that redistributes the carriers more evenly
over the photodiode. The ratio of the z-component of the current to the xcomponent is approximately
D
Jz
Jx
vsat
47
(2.55)
where D is the relevant diusion coecient. For a Si/Ge photodiode at

1550 nm, the maximum possible value of is 4400 cm1 and the maximum value of D is 100 cm2 s1 , the product of which is only 7% of the
saturated electron velocity. As a result, the diusion current in the longitudinal direction can usually be neglected. The most important consequence
of non-uniform illumination is that the current density varies in the direction
of propagation.
2.3.5
Model verication and accuracy
Analytical models are always useful for comparing the expected performances
of two dierent proposed designs. Though they introduce some systematic
error, only rarely will that systematic error produce a design curve that is
qualitatively dierent from the experimentally determined trend. For highpower photodiodes, absolute accuracy is also valuable. Many high-power
photodiodes are limited in some way by thermal eects [1719] some fail
thermally before the saturation point is ever reached. In order to take thermal eects into account, the DC power dissipated in the detector must be
known. Table 2.3 shows measured and predicted 1 dB compression currents for published surface-normal detectors along with the predicted values
from Equations 2.25 and 2.40. It is dicult to compare to waveguide photodiode results because relatively few high-power waveguide detector papers
have been published and connement factors are not often included. For the
III/V detectors in the table, we used s = 12.5 and vn = 1.2 107 cm/s for
InP and s = 13.9 and vn vp /(vn + vp ) = 3.75 106 cm/s for InGaAs.
The model is reasonably accurate and has about 10% error for a typical
detector; it does not consistently over- or under-estimate the 1 dB compres48
Table 2.3: Measured and expected values for compression current

ture.
Meas.
Wi /Wc Bias
A
Device
Ref.
m
I1dB
(nm)
(V)
(m2 )
(mA)
InP MUTC
InP PIN
InP UTC
InP UTC
Si/Ge UTC
[20]
[21]
[22]
[23]
Ch. 5
250
2200
500
230
250
4
10
4
3
2
1
1
0.7
1
0.8
314
2552
491
26
154
90
65
99
26
15
in literaCalc.
I1dB
(mA)
104
70
85
23
16
Center of possible range quoted.
sion current. This is partially due to the strong impact experimental uncertainty has on the simulated result: the model predicts a 16 mA increase in
1 dB compression current for the photodetector in [22] due to the use of a
70% modulation depth signal rather than a 100% one, for example. Some of
the error is also due to factors the model does not consider. Velocity overshoot, for example, will enhance the high-power performance, while a barrier
at a heterojunction will hurt it. Thermal eects are not included either, and
carrier transport tends to be degraded at the high operating temperatures
typical of high-power photodiodes. In order to include any of these eects, a
numerical model is necessary.
2.4
Numerical model for power handling
In order to incorporate more physical eects into nonlinear simulations, we

implemented and equivalent circuit model in Agilent ADS. The model consists of two parts: a 1-dimensional cross-section model that handles electric
eld collapse and a second 1-dimensional model that handles waveguide propagation and localized heating.
49
2.4.1
Cross-section model
Figure 2.19 shows a lumped-element model of a photodetector cross-section.

This circuit is very similar to the one proposed in [24] and can be made
nonlinear by making any of the elements functions of current or voltage. The
optical input is expressed as a voltage at the left and the output comes from
the right. The center section deals with transit-time eects. The calculated
transit-time limited frequency response is not quite shaped like a single-pole
low-pass lter. It is similar in amplitude between DC and the -3 dB cuto,
but not phase. This means that the absolute phase response of the simulated
photodiode will be incorrect, but this is rarely of interest (the relative phase
response of dierent sections, on the other hand, matters in traveling-wave
photodiodes). The far right section is the diode impedance and represents
the RC limit, where the capacitance is calculated using Equation 2.24 and
the series and parallel resistances are estimated based on process parameters.
The transconductances gm1 and gm2 provide coupling between sections.
Nonlinear quantities are usually referred to output values: the 1 dB compression point relates the output RF power to the output DC photocurrent
and the third-order output intercept point (OIP3) is usually given as a function of bias voltage and output DC photocurrent. As a result, the linear
values of the input power, gm1 , and gm2 can be chosen arbitrarily.
For output saturation, the nonlinear gm1 is given by
(
gm2
Jmax
= gm2,linear tanh k
Jlinear
)
(2.56)
where k is a tting parameter, and Jlinear is what the current would be if

the photodiode were operating in the linear regime. Jmax can come from
an analytical expression (Equation 2.25 or 2.40), experimental results from
50
gm1Vopt
Rin
Rs
Vopt
C
gm2V
Cpd
Rp
output
Optical/electrical
conversion
Diode admittance
Transit time
Figure 2.19: Nonlinear photodiode cross-section equivalent circuit.
a uniformly illuminated photodiode, or a more complex TCAD model. For

the purpose of model verication, we used a Si/Ge PIN photodiode whose
behavior was well-described by Equation 2.40. The value of k determines
the model range of accuracy. For values of k less than or equal to 1, the
output current can never be equal to the maximum current (unless Jmax = 0)
because tanh(1) < 1. In this work, k was chosen so that the output current
would be equal to its maximum value when Jlinear = 0.99 Jmax , i.e when
k = atanh(0.99)/0.99. This improves accuracy near the onset of compression,
but reduces it for heavily compressed photodiodes, as it allows the output
current to exceed its maximum value when Jlinear > Jmax . Equation 2.56 is
meant to model signal clipping, and is unlikely to accurately describe device
behavior in the linear regime. Thus for OIP3 simulations, a polynomial t
will usually provide a better t to the data.
2.4.2
Traveling-wave model
Figure 2.20 shows several cross-sections connected in parallel to form a single

circuit model for a waveguide device. Each unit cell consists of the circuit
shown in Figure 2.19 (represented as YP D ) and traveling-wave impedance
ZP D . The traveling-wave impedance can be found from analytical [25] or
51
nite-element solvers. For many devices, including the ones considered here,
traveling wave eects are not very important, but replacing the travelingwave impedance with a short can result in numerical instability. The electrical input port indicates that a resistive termination can be placed at the front
of the device to minimize microwave reection (even though no terminated
traveling-wave photodiodes were simulated).
Unit cell
Electrical input
Optical input
ZPD
ZPD
YPD
YPD
O/E
S
O/E
S
Electrical output
Rterm
Figure 2.20: Cascaded photodiode unit cells.
The optical propagation portion of the circuit (S in Figure 2.20) can be

represented by equivalent scattering parameters. It can be considered a direct
representation of the photocurrent available in the optical signal. As such,
it can be represented as a series of equivalent S-matrices with zero reection
(S11 = S22 = 0) and transmission with both loss and phase shift. The odiagonal elements of the S-matrix are then exp((j/vg )z) where is
the microwave frequency and vg is the group velocity of the mode. Resistors
to ground placed at the intersections between adjacent optical blocks can be
used to represent excess modal loss. Any current that ows from one optical
block but not into the next optical block reduces the eciency, and is thus
equivalent to excess loss. Lowering the value of Rin has the same eect.
Multiple optical paths operating in parallel can be used to model multimode
52
eects. For short detectors, where there is still a signicant amount of power
in the optical signal at the end of the device, a terminating resistor (Rterm ) is
necessary to avoid (non-physical) microwave reections from impacting the
model.
2.4.3
Thermal model
Thermal eects play an important role in limiting high-power photodiode

performance. At very high levels of dissipated electrical power, detectors
can fail [20]. Even at lower power levels, heating decreases the saturated
electron and hole velocities, which decreases the compression current. It can
also modify the refractive indices and absorption coecients of the materials
in the waveguide, which most often serves to steepen the absorption prole
in waveguide devices (though in III-V a detector with the opposite behavior
could probably be designed). The thermal model consists of two parts: a
nite element model for determining the thermal impedance, and a physicsbased model for relating the temperature to electrical device performance.
To calculate the thermal impedance, we used a nite-element model in
Comsol. For high-power photodiodes, the series resistance is usually small
enough to allow most of the voltage to drop across the intrinsic region (rather
than the resistive parts of the diode), so the heat source was assumed to be
uniformly distributed (vertically) in the intrinsic region. In general, heat
transfer can occur by convection, black-body radiation, and by conduction.
Convection and black body radiation were included in early models, but
found to aect the thermal impedance by less than 1%. Convective heat ow
would have to pass through a thermally resistive passivation layer, and the
convective heat transfer coecient of still air is very small (about 10 W/m2 K;
it would have to be several orders of magnitude larger to contribute signi53
cantly to cooling). Semiconductors and metals tend to have very low emissivities and thus heat transfer by radiation is usually minimal. Thus only
conduction was included in nal thermal models. The only heat sink for a
typical test set-up is the bottom of the chip, which is assumed to be held at
a constant temperature by the measurement setup.
The simulated temperature of a typical photodiode cross-section is shown
in Figure 2.21. This photodiode was fabricated by Intel and designed for
high-speed communications [26], but showed good power-handling capabilities [27] and was used to validate the numerical model developed here [28].
Dimensions are also given in the gure. The hottest part is the intrinsic
region, because that is where the heat is generated. The silicon and n-metal
closest to the intrinsic region are at similar temperatures because the thermal
conductivities of germanium, silicon, and metal are relatively high (At room
temperature, the thermal conductivity of germanium is 0.58 W/cmK, the
thermal conductivity of silicon is 1.5 W/cmK and the thermal conductivity
of the n-metal (aluminum) is 2.37 W/cmK). The largest temperature drop
is across the buried oxide layer, as the thermal conductivity of this layer
is approximately 500x smaller than the thermal conductivity of any other
material on the chip (0.0014 W/cmK).
The power dissipation is not constant in the direction of optical propagation, but rather decays exponentially from the input. The results of a
three-dimensional simulation of the same device are shown in Figure 2.22 (c)
for a power dissipation of 340 mW. The simulation was done in three dimensions assuming that the heat source decayed exponentially in the direction of
propagation in the same way as the optical power. For the detector shown,
the characteristic absorption length was about 38 m. The thermal conductivities of the materials in the detector are not constant over the range
54
p-metal
p+ Si
n-Ge
n-metal
100 nm
i-Ge
700 nm
Waveguide layer (i-Si)

Buried oxide (BOX)
1500 nm
n-metal
Ge mesa
p-metal
p+ Si
Si WG
BOX
675 m
Substrate
1000 nm
Heat sink
Substrate (Si)
Figure 2.21: Cross-section (a) schematic and (b) temperature distribution

of an n-i-p photodiode. The power dissipation for this gure was chosen
arbitrarily, so the temperature is essentially in arbitrary units. The mesa
width was 7.4 m.
of simulated values, but rather decrease at high temperatures. For these

simulations, the temperature-dependent values of thermal conductivities for
silicon and germanium were taken from [29].
Figure 2.22: (a) Grayscale and (b) thermal image of a high-power photodetector dissipating 340 mW of electrical power. (c) Simulation result.
Figure 2.22 also shows a micrograph and a thermal image of the device
while dissipating 340 mW of electrical power. The strong agreement between
the measured and simulated values conrm the models accuracy [30]. The
55
thermal image was generated using a thermoreectance imaging technique

[31], which measures the surface reectivity of the device when it is on and
o and uses the dierence to determine the surface temperature. The change
in reectivity is nearly linear with temperature, so that
R
= Cth T
R
(2.57)
where R is the change in reectivity (image intensity), R is the reectivity

when the device is o, Cth is the thermoreectance coecient, and T is the
change in temperature. The thermoreectance coecient is usually small (on
the order of 1 104 /degree), and a function of the illuminating wavelength
and surface conditions. For this measurement, the illumination wavelength
was 627 nm (red) and coecients of 7.6 105 for Si without SiN passivation and 1.1 105 for Al with passivation (on top of the detector mesa)
were obtained. The thermoreectance coecient of unpassivated Al (the side
contacts of the device) is very small and the change in reectance was below
the noise oor of the measurement.
Figure 2.23 (a) shows the simulated and measured temperatures of the
surface along the waveguide, and the two agree quantitatively within the
margin of error of the measurement. The data near the front input of the
detector is not expected to be very accurate because of a rounded corner
there, which appears as a thick black line in Figure 2.22. The gure indicates that the temperature distribution in the device is non-uniform and that
this should be taken into account when incorporating thermal eects into a
waveguide device model. Figure 2.23 (b) shows the simulated maximum temperature as a function of dissipated power. The plot curves upward because
the thermal conductivities of the materials decrease at high temperatures.
56
Figure 2.23: (a) Measured and simulated surface temperature as a function

of distance from the waveguide input. Two plausible values for germanium
absorption coecient at 1550 nm were used to simulate the two curves. (b)
Simulated peak junction temperature as a function of dissipated power, assuming an absorption coecient of 4000 cm1 .
A number of important material parameters are functions of temperature.

For germanium detectors, the most notable among these are the bandgap
energy and the saturated carrier velocity. As the temperature increases, the
bandgap narrows, which makes the absorption prole more steep. The carrier
velocities also decrease, which decreases the maximum current density in the
device cross-section. In order to incorporate thermal eects into the niteelement model discussed above, the thermal impedance (Zt ) of each detector
unit cell was calculated using the same nite-element model discussed above
and material parameters near the center of the temperature range of interest
(200 C, in this case). The thermal impedance was assumed to be linear over
the range of relevant values, so that the change in temperature T = Pd Zt .
The power dissipation (Pd ) was assumed to be uniform within each unit cell,
though the power dissipation (and thus the temperature) varied between
cells.
Increases in temperature were assumed to aect the absorption prole
57
only by increasing the absorption coecient . Though the refractive indices

of both silicon and germanium are functions of temperature, the connement
factor is not expected to vary greatly over the relevant temperature range.
Since the direct band edge of Ge is close to 1550 nm, the absorption coecient increases with temperature as the bandgap narrows. Taking values for
temperature dependent bandgap narrowing from [32],
dEg
0.58 meV /K
dT
(2.58)
at 1550 nm. The absorption coecient is proportional to the square root

of the dierence between the photon energy (Eph ) and the bandgap energy,
so that
d
0
dT
T
dEg
.
dT Eph Eg (T0 )
(2.59)
where Eg (T0 ) is the bandgap energy at the same temperature as 0 . To

incorporate this into the nite-element model, the initial transconductance
gm,1 is scaled and the new value of is written via a Taylor expansion:
gm1 (T ) = gm1 (T0 )
gm1 (T0 )
1 exp ((T )l)

1 exp (0 l)
(
1 exp 0 l 1
dEg
Zt Pd
dT Eph Eg (T0 )
1 exp (0 l)
(2.60)
.
In order to account for the additional loss from the increased absorption, the
input resistance Rin is also scaled:
(
(
))
Zt Pd
g
exp 2 0 l 1 dE
dT Eph Eg (T0 )
(
)) .
(
Rin (T ) = Z0
Zt Pd
g
1 exp 2 0 l 1 dE
dT Eph Eg (T0 )
(2.61)
The eect of the decrease in saturated carrier velocities can also be in-
58
cluded in the nite-element model. Taking values from [32], the decrease in
vef f (vef f = vn vp /(vn + vp )) is approximately linear from 300 to 600 K and
is 29 m/s/K (i.e. dvef f /dT = -29). This eect can be added to the model
via a simple Taylor expansion in gm2 :
gm2 (T ) = gm2,linear tanh k
2.4.4
(
Jmax 1 +
dvef f
T
dT
Jlinear
)
.
(2.62)
Numerical model results
To verify the numerical models ability to deal with non-uniform illumination

and thermal eects, we simulated the large-signal compression current of the
PIN photodiode studied in [27]. It is a 7.4 m x 500 m waveguide detector
with a 700 nm thick germanium intrinsic region and a 4.4 GHz bandwidth
limited by the RC time constant. A full set of simulation parameters can be
found in Table 2.4 [28]. The absorption prole is polarization dependent, and
the two orthogonal polarization states have characteristic lengths of 38 m
(260 cm1 ) and 57 m (175 cm1 ), respectively. According to optical simulation results, a TM input will have a more abrupt absorption prole and a
TE input will be more dilute.
Figure 2.24 shows the measured and simulated RF output power at 1 GHz
as a function of photocurrent for the TE polarization. The model included
localized self-heating eects. The absorption prole became sharper and the
carrier velocities decreased as the temperature increased. At 6 V bias, this
decreased the output power by 0.5 dB and 1 dB compression current by 4 mA
relative to a model that neglected self-heating. As can be seen by comparing
Figure 2.24 (a) to Figure 2.24 (b), the value of k in Equation 2.56 was chosen
to maximize accuracy near the onset of compression.
59
Table 2.4: Simulation parameters for numerical nonlinear model verication.

Parameter
Value
Rin
gm1
R
C
gm2,linear
C
Rp
Rs
Zt
Zm
L
G
2 k
41 mS
50
90 fF
20 mS
753 fF
100 k
0.2
3000 K/W
3.3+0.4j k /m
100 nH/m
nSm
25
20
15
10
5
0
-5
Compression (dB)
RF power (dBm)
Parameters are given for a

5 m long cross-section, except
for transmission line parameters,
which are given per unit length.
The metal impedance Zm was
calculated at 1 GHz.
7V
5V
3V
Measurement
Simulation
10-2
-1
-2
-3
0
10-1
Current (A)
Measurement
Simulation
3V
20
5V
7V
40 60 80
Current (mA)
100
Figure 2.24: Measured and simulated (a) RF output power and (b) compression for the waveguide Si/Ge PIN photodiode described in [27].
Figure 2.25 shows the 1 dB compression currents and output powers for
both polarization states, again including thermal eects. Good agreement
(within 3 mA and 1.5 dBm for both polarizations) is achieved for the full
range of operating voltages. In contrast, Equation 2.54 correctly predicts
60
that the TE polarization will have a 1 dB compression current that is about

75% as large as the TM polarization, but over-estimates the current by up to
50%. This is primarily due to ignoring the parasitic series resistance, which
causes the voltage at the front input of the device to be lower than the voltage
at the back, and thermal eects.
60
40
20
Output power (dBm)
I1dB (mA)
80
TE
TM
Simulation
Measurement
2
4
6
Bias Voltage (V)
20
15
10
5
0
-5
-10
0
TE
TM
Simulation
Measurement
2
4
6
Bias Voltage (V)
Figure 2.25: Measured and simulated 1 dB compression (a) current and (b)
power for the waveguide Si/Ge PIN photodiode described in [27].
The model can be used to identify the most important design variables
in determining the output power. To do this, we varied a single design variable (length, width, thermal impedance, absorption prole, intrinsic region
thickness) while keeping all others the same as in the previous simulations.
The eect of scaling on linear and nonlinear circuit elements was taken into
account, but the thermal impedance was assumed to be independent of device dimensions. This was done because thermal eects can be mitigated
substantially by better heat-sinking without signicant eect on other device parameters. The maximum output current and capacitance of a given
section were scaled linearly with area according to Equation 2.40 and the
expression for a parallel-plate capacitor. The contributions of the n-Ge contact, the p- region under the diode, and the p-Si contact to the device series
61
resistance were not known, and these scale dierently, so values were chosen such that the n-contact and p-spreading regions both made signicant
contributions and the total resistance added up to the values given in [26].
Figure 2.26 shows the eect of device width and length on output power.
At the maximum output power, the front part of the diode will be compressed
and a signicant amount of useful photocurrent will be generated in the back
part. Thus very short diodes have much lower maximum output power than
longer ones. Increasing the length beyond 200 m has minimal impact on
the output power because most of the light is absorbed in the rst 100 m.
For very long devices, the maximum output power decreases because the RC
limit approaches the operating frequency. The width has a similar eect on
output power. Very narrow devices are much worse than wider ones, but the
width cannot be increased too much before the increasing capacitance begins
to have an impact on performance. The data points shown in Figure 2.26
are meant to provide qualitative conrmation of the simulation result; the
experimental conditions diered slightly from the simulation.
Figure 2.27 (a) shows the simulated maximum output power of the device as the thermal impedance is decreased to 0 and increased to 10x its
original value, for a xed bias voltage of 6 V. Only the value of the thermal
impedance, and not any device dimensions, is changed. Though a tenfold
increase in thermal impedance would clearly be bad, decreasing the thermal
impedance is not expected to greatly improve output power. This is further
shown in Figure 2.27 (b). This gure shows maximum output power as a
function of bias voltage for two nominally identical detectors under the same
measurement conditions: 1 GHz large-signal modulation at 1550 nm and
with the polarization adjusted to maximize the output power. The packaged
device was ip-chip bonded to an AlN carrier via the side (p) contacts of the
62
Output power (dBm)
Output power (dBm)
25
TE
20
15
TM
10
Simulation
5
0
Measurement
10 15 20
Width (mm)
25
25
20
15
10
TM
Simulation
5
0
TE
Measurement
200 400 600

Length (mm)
800
Figure 2.26: Maximum output power at 1 GHz and 7 V bias as a function

of photodetector (a) width and (b) length. Polarization was not controlled
during these experiments. The simulation frequency is 1 GHz for all cases,
but the test frequency was 13 GHz for the 50 and 100 m long devices and
3 GHz for the 250 m long device. The length of all three devices in (a) is
100 m, and the test frequency was 13 GHz.
device. This is expected to decrease the thermal impedance because the heat
does not have to pass through the buried oxide layer, which has a relatively
low thermal conductivity. The carrier was attached to a heat sink via a copper block. The copper block also had an Anritsu K-type connector that was
soldered to the AlN carrier for RF signal output. The thermal impedance of
the packaged device was simulated to be 78% of the thermal impedance the
un-packaged device. This could be improved by bonding the top of the mesa
(rather than the side contacts) to the carrier, but this was not technically
feasible for these particular devices.
The output power of the packaged device is slightly (0.3 dB) higher at
7 V bias, though this is within the margin of error of the measurement.
The 1 dB compression current of the packaged device was lower than for the
unpackaged one. The near-negligible improvement from packaging indicates
that the thermal impedance is not the limiting factor in device performance
for these devices.
63
Maximum output power (dBm)
Output power (dBm)
25
20
15
10
5
0
0
2
4
6
8
10
Thermal impedance (x original)
20
15
Packaged
10
Unpackaged
5
0
-5
-10
4
6
Bias Voltage (V)
Figure 2.27: (a) Simulated output power as a function of thermal impedance.

(b) Measured output power for photodiodes with good heat sinking (packaged) and standard heat sinking (unpackaged). The simulation and measurement were both at 1 GHz for 7.4 m x 500m waveguide devices. The
absorption prole was assumed to be more dilute for the simulation and
adjusted in the experiment to maximize output power.
2.5
Summary
In this chapter, we developed simple models for Si/Ge UTC collection efciency, bandwidth, and saturated output power. The lack of an eective
diusion-blocking layer in the Si/Ge material system was shown to decrease
the collection eciency but increase the transit-time limited bandwidth.
Si/Ge UTCs were compared to similar germanium PIN detectors, and offer higher bandwidths for thin germanium layers where the PIN detector is
RC limited. Si/Ge UTCs also can be expected to provide greater output
power than comparable PIN photodiodes because they can safely be biased
at higher voltages. We also developed a slightly more complex model to
deal with non-uniform illumination in waveguide devices. The model agreed
qualitatively with the closed-form expression, but was closer to measured
results.
64
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68
Chapter 3
Design and measurement of
Si/Ge UTC photodiodes
In Chapter 2, design constraints due to required photodiode eciency, parasitic circuit components, and heterojunction transport were ignored. This
yielded fundamental limits on UTC and PIN performance. In practice, these
are never achievable: this chapter covers the constraints on performance imposed by the electrical and optical properties of germanium grown on silicon.
3.1
Optical design
Optical material properties impose a number of design constraints on photodiodes. For surface-normal photodiodes, the material absorption coecient
at the wavelength of interest denes the minimum thickness of the absorber.
For waveguide photodiodes, both the absorption coecient and the index of
refraction play an important role. For both kinds of photodiodes, there are
sources of excess optical loss that should be minimized.
69
3.1.1
Infrared absorption in germanium
Figure 3.1 shows the index of refraction and absorption coecient of unstrained germanium. Photon energies in the 1310 nm telecommunications
window lie well above the direct bandgap at 0.8 eV, and the absorption coecient is about 7060 cm1 in the O-band. The direct bandgap lies almost
exactly in the center of the C-band (1535-1565 nm), and the absorption coecient at 1550 nm is somewhere between 200 cm1 [1] and 2000 cm1 [2].
When grown on silicon, the germanium lm is tensile-strained and the direct bandgap energy decreases by an amount that is related to the growth
conditions [3]. This increases the absorption at 1550 nm and can extend the
spectral response into the L-band.
105
4.5
Ge
(cm-1)
Real index n
4
3.5
3
Si
1.2
1.4
1.6
Wavelength (m)
104
strained
103
unstrained
102
1.8
101
1.2
1.4
1.6
Wavelength (m)
1.8
Figure 3.1: (a) Refractive indices of silicon and germanium and (b) absorption coecient of germanium from 1 m to 1.7 m. Refractive indices and
the absorption coecient for unstrained germanium are from [4] while the
curve for absorption in strained germanium is estimated from [3].
Process-related variation in absorption coecient is evident in Figure 3.2,

which shows measured responsivities for a wide range of devices at 1310 nm
and 1550 nm as a function of material thickness. The data tend to be close to
the theoretical curve at 1310 nm, but are spread between absorption coe70
cients of 2000 cm1 and 5000 cm1 at 1550 nm. This implies that collection
eciencies of reported devices are generally high, but that the absorption
coecient in the C-band is not very consistent across dierent thicknesses
1.5
Responsivity (A/W)
Responsivity (A/W)
and kinds of growth.
=7060cm-1
(h)
(h)
(e)
(b)
0.5
0
0
(a)
(d)
(j)
(h)
(f)
(i)
(c)
(g)
1
2
3
4
Ge layer thickness (m)
1.5
1
(e)
0.5
0
=5000cm-1
(h)
(d)
(g)
(j)
(h)
(f)
(h)
=2000cm-1
(b) (c)
(a)
(i)
1
2
3
4
5
Ge layer thickness (m)
Figure 3.2: Measured responsivities of germanium photodiodes at (a) 1310

and (b) 1550 nm. Circles: as reported. Crosses: adjusted to account for lack
of anti-reection coating. a: [5], b: [6], c: [7], d: [8], e: [3], f: [9], g: [10], h: [11],
i: [12], j: [13].
3.1.2
Surface-normal photodiodes
For surface-normal photodiode design, the absorption coecient is an important material parameter. The quantum eciency of a surface-normal
photodetector e is
e = T (1 eW )
(3.1)
where W is the absorbing region thickness. If no anti-reective coating is

used, there will be a reection at the air-absorber interface, which is described by the term T , the fraction of power that is transmitted through
that interface. A dielectric coating is usually applied to decrease reection,
71
and it is not dicult to deposit a coating with better than 95% transmission.
The relatively low absorption coecient of germanium at 1550 nm limits
the usefulness of the uni-traveling carrier cross-section design. If we require
50% quantum eciency, the germanium part of a surface-normal photodiode
would need to be 1.4 m thick assuming the larger absorption coecient
of 5000 cm1 . At this thickness, a PIN photodiode will nearly always have
a larger bandwidth than a UTC. For a relatively large device diameter of
50 m (the minimum core diameter of multimode ber), an ideal PIN would
have a bandwidth around 11 GHz while an ideal UTCs bandwidth would be
2.5 GHz (from Figure 2.13). For high-power and low-frequency applications,
the UTC might oer better performance, but would most likely be limited
by the available input power rather than saturation. Figure 3.3 shows the
maximum current available from PIN and UTC surface-normal photodiodes
as a function of bandwidth at relatively low frequencies. The areas of the
devices are chosen such that the absorber transit time and RC limits are
equal. For such thick germanium layers, technological limitations prevent a
signicant built-in eld in the UTC absorber, and the 3 dB bandwidth is
about 2Dn /Wa2 . This is signicantly slower than the transit-time limit for a
PIN with the same absorber thickness.
There are three limits to photocurrent shown. The blue curves represent
the responsivity limit assuming an absorption coecient of 2000 cm1 and
a maximum input power of 1 W and the green curves are the same except
the absorption coecient is 5000 cm1 . One watt is a somewhat arbitrary
number: it is based on what can practically be achieved in the lab. Fiber
ampliers and lasers with larger output powers are commercially available,
but the nonlinear limit of standard single-mode ber is lower. The yellow
curve represents the 1 dB compression current. Although the UTC has a
72
PIN
UTC
4
Current (A)
Current (A)
4
1 dB compression
2
= 5000 cm-1
1
0
0
= 2000 cm-1
3
2
1 = 5000 cm-1 = 2000 cm-1

0
0
2
4
6
3 dB frequency (GHz)
1 dB compression
2
4
6
Figure 3.3: Limits to photocurrent from surface-normal (a) PIN and (b)
UTC photodiodes. The green and blue curves are calculated assuming lowend and high-end values for the absorption coecient of germanium and
a maximum available input power of 1 W. The yellow curve is the 1 dB
compression current for 100% modulation depth and a 50 load calculated
using Equations 2.46 and 2.47 and the material parameters in Table 2.2.
The areas of the devices are chosen so that the transit-time and RC limits
are balanced, and the bandwidths were calculated neglecting parasitic eects
using appropriate equations from Chapter 2.
higher saturation current than the PIN at the frequencies shown, more power
is available from the PIN. This is because the UTC is limited by the quantum
eciency and power budget rather than the compression current. The UTC
becomes preferable at very high frequencies, where the quantum eciencies
are low and some of the assumptions here are no longer valid.
3.1.3
Waveguide photodiodes
In order to achieve bandwidths in excess of 20 GHz with good eciency from

a germanium photodiode, waveguide designs are necessary. Waveguide photodiodes break the trade-o between absorption region thickness and transit
time [14]. For a single-mode waveguide photodiode, the quantum eciency
73
is
(
)
e = couple 1 eL
(3.2)
where couple is the coupling eciency from the ber to the waveguide (unlike
T , it is not usually close to 1), is the connement factor (fraction of the
mode that overlaps with the absorber), and L is the photodiode length.
The two commonly used schemes for coupling to a waveguide photodiode,
butt-coupling and evanescent coupling, are illustrated in Figure 1.1 (b). Buttcoupled photodiodes typically have the best quantum eciencies for short
(length on the order of (1/)) devices because the connement factor is 1,
but this comes at the cost of a small active area, which is bad for high-power
performance. Si/Ge photodiodes with the cross-section shown in Figure 3.4
(a) are often referred to as evanescently coupled. Evanescent is something
of a misnomer, as the implication is that the relevant optical mode(s) in the
photodiode have a large intensity in the silicon and decay evanescently in
the germanium. Since the index of germanium is larger than the index of
silicon, the waveguide shown does not support modes of this type. Rather, it
supports modes strongly conned in the germanium that evanescently decay
into the silicon and buried oxide (depicted in Figure 3.4 (b)) and modes
strongly conned in both the silicon and germanium that decay evanescently
into the buried oxide (depicted in Figure 3.4 (c)).
The input to a Si/Ge waveguide photodetector is usually the fundamental
TE or TM mode of the silicon rib waveguide underneath. The Si/Ge core
modes are the most important for photodetector design, since they have a
much larger overlap with the input. Figure 3.5 (a) shows the connement
factor in the germanium for the TE00 and TE01 modes. The gure also shows
the overlap integral [15] between the mode and the fundamental TE mode of
74
Conductor
Ge: n=4.17
Si: n=3.47
Buried oxide: n=1.47
Cross-section
Ge-core
Si/Ge-core
Figure 3.4: Evanescently coupled waveguide cross-section (a) and mode

types: (b) germanium-core and (c) silicon/germanium-core. The eld distributions drawn in the gure are characteristic of modes of each type (not
simulated for a specic waveguide geometry or absorber composition).
the input waveguide. The modes were calculated using a Matlab-based nite
dierence solver provided by the Fallahkhair et al. [16]. For both modes,
as the connement in the germanium increases, the overlap with the input
mode decreases. The product of the connement factor and overlap integral
is shown in Figure 3.5 (b). At the peaks, absorption occurs quickly and short
photodiodes are very ecient.
The Si/Ge-core TE00 and TE01 modes are considered by most mode
solvers to be very high-order. As a result, mode matching methods are
not computationally ecient for generating design curves for Si/Ge photodiodes. Modal analysis is useful for estimating eciency in the presence of
excess waveguide loss as well as reections at the passive/active interface,
but for most design we used the beam propagation method. The reectivity
of the passive/active interface probably best calculated with a nite dierence time-domain simulation. A worst-case approximation to the reectivity
is given by the Fresnel equation assuming normal incidence of a plane wave
propagating from silicon to germanium. These assumptions yield a power reectivity of 0.8%, or an optical return loss of 21 dB. Assuming an input facet
with moderately eective (10 dB optical return loss) anti-reective coating,
75
0.4
0.2
0
0
200
400
600
800
Ge thickness (nm)
TE00
Ge absorber
Si rib
TE01
TE00
overlap (a.u.)
TE01
0.6 TE00
overlap (a.u.)
0.8
200
400
600
800
Ge thickness (nm)
TE01
Figure 3.5: (a) Connement factor in germanium and overlap with input
mode as a function of germanium thickness. (b) Product of connement
factor and overlap. (c) Mode proles for a 400 nm thick Ge layer. The
silicon waveguide was 500 nm thick and etched 250 nm.
the active/passive transition is not expected to aect photodetector performance, and so it was not considered in detail in this work. Figure 3.6 shows
the simulated quantum eciency of a 20 m long device at 1550 nm for the
TE and TM polarizations. The parameter is the silicon thickness, and the
rib etch depth was assumed to be half the silicon thickness. The rib etch
depth does not have a large eect on simulated quantum eciency. The
mesa width was 4 m, but this does not impact the simulation output for
practically achievable (> 2 m) mesa widths. The absorption coecient was
3300 cm1 , which is a mid-range value for germanium on silicon [3].
For both polarizations, there are optimum-eciency germanium thicknesses that are nearly independent of silicon dimensions and polarization.
These roughly correspond to the peaks in Figure 3.5. Thinner silicon layers
typically correspond to higher eciency simply because the germanium occupies a larger portion of the waveguide. Changing the silicon thickness also
76
TE
0.8
Efficiency
Efficiency
0.8
0.6
0.4
0.2
0
0
TM
0.4 0.6 0.8

Ge height (m)
0.4
1.3:0.5 m
0.2
1.3:0.5 m
0.2
0.6
0.2
0.4 0.6 0.8

Ge height (m)
Figure 3.6: Absorption eciency as a function of germanium thickness for

evanescently coupled Si/Ge photodiodes for (a) TE-polarized and (b) TMpolarized inputs. The silicon thickness is the parameter that is varied in each
plot.
shifts the peaks slightly as mode shapes change. In addition to local maximum/minimum behavior, there is a general trend toward higher eciency
for thicker germanium layers. This is because more modes with signicant
overlap with both the input and the germanium are supported by waveguides
with thicker germanium layers. At the third peak (800 nm germanium thickness), the input mode can couple into the TE00 , TE01 , or TE02 mode, but at
the rst peak (200 nm germanium thickness), the TE01 and TE02 modes are
cut o.
The position of the optimum germanium thickness is a function of wavelength. Figure 3.7 shows the quantum eciency as a function of wavelength
for a silicon height of 900 nm and germanium thicknesses of 375 nm and
500 nm for the TE polarization. The 375 nm thick absorber performs poorly
in the C-band but is very ecient in the O-band, while the 500 nm absorber displays the opposite trend. An interesting feature of the curve for
the 500 nm thick absorber is that the eciency of the short device increases
77
as the absorption coecient decreases due to the stronger coupling. This

has been observed once [17], but usually the measured eciency decreases
with the absorption coecient [1821]. This is probably because in order
to observe higher eciency at longer wavelengths, the germanium thickness
would have to be optimized at a wavelength on the long side of the measured
spectrum, and this is not usually done. The simulation result is sensitive to
the value of the absorption coecient. The optimum point does not move
very much (10s of nanometers) over the full range of reasonable values for
absorption coecient, but the predicted eciency at any one wavelength can
vary substantially depending on the value used. For Figure 3.7, the values in
Figure 3.1 were used, but in the C-band, the exact value of the absorption
coecient is rarely known until after the devices are fabricated.
1
Efficiency
0.8
375 nm Ge
500 nm Ge
0.6
0.4
0.2
0
1.3
1.4
1.5
Wavelength (m)
1.6
Figure 3.7: Simulated quantum eciency as a function of wavelength. The

silicon waveguide was 900 nm tall and etched 300 nm down. The hypothetical
device was 20 m long.
78
3.1.4
Excess optical loss
Up until now, we have not considered the impact of excess optical loss on
quantum eciency. In general, for a photodetector with excess loss, the
maximum eciency is
e =
opt
opt + i
(3.3)
where i is the excess modal loss, dened as any loss not due to valance-toconduction band absorption in the semiconductor. Modal losses for passive
waveguides on silicon are usually dominated by scattering from rough surfaces
and are at worst 1 cm1 , so scattering loss unlikely to aect the quantum
eciency. There are two potential sources of loss high enough to aect
eciency: free-carrier absorption and metal losses. Both the p-type and the
n-type semiconductor will contribute to free-carrier absorption loss. Freecarrier absorption loss in the germanium is unavoidable in a UTC, since the
germanium must be doped, and sets an upper limit on how highly doped
the germanium can be. Figure 3.8 shows approximate values for free-carrier
absorption in germanium as a function of doping density. The experimental
values are from [22] and the theoretical line is the Drude model prediction.
As in silicon, the Drude model under-estimates the free carrier absorption
loss [23]. Free carrier absorption in n-type germanium is less than 20 cm1
for doping concentrations less than 4 1019 cm3 [24]. Quantum eciencies
around 99% are possible for doping densities of 1 1018 cm3 or less, but the
eciency drops to 90% by 1 1019 cm3 .
Free-carrier absorption in the n-side of the diode is easier to avoid, as
a large overlap with the mode is not inherent in the structure. However,
as will be shown in Section 3.2, if the doping is so low as to have no eect
79
104
Reported
values
103
(cm-1)
102
Drude model
101
100
10-1
10-2 16
10
10
17
10
18
19
10
NA
10
20
10
21
10
22
Figure 3.8: Absorption due to free-carrier absorption in p-type germanium.

The experimental values are from [22].
on quantum eciency, the n-side series resistance will dominate the diode
series resistance (and the diode series resistance will, in turn, determine the
bandwidth). Figure 3.9 shows the free-carrier absorption in n-type silicon
as a function of conductivity (not doping). The silicon mobility model is
from [25] and the free-carrier absorption is from [23]. The same curve for ntype InP is also shown, with the mobility model from [26] and the free-carrier
absorption model from [27]. Very high conductivity can be obtained from
n-type indium phosphide before the quantum eciency is aected, but this
is not the case for n-type silicon. Because the n-well is located approximately
in the center of the waveguide, the modal loss due to free-carrier absorption
there tends to be
i,F CA F CA
tnwell
hP D
(3.4)
where tnwell is the n-well thickness and hP D is the total photodiode height.
Metal absorption losses are dicult to estimate, but potentially impor80
104
n-Si
(cm-1)
102
p-Si
100
10-2
101
n-InP
102
Conductivity (S/cm)
103
Figure 3.9: Absorption due to free-carrier absorption in p- and n-type silicon

and n-type indium phosphide. The silicon mobility model is from [25] and the
free-carrier absorption is from [23]. For InP, the mobility model is from [26]
and the free-carrier absorption is from [27].
tant. Metal is highly absorptive, but the light does not penetrate very far into
the contacts, so the loss could either be large or small. It is important to note
that many ecient (e > 0.5) waveguide photodiodes with top metal contacts
have been demonstrated in germanium [17,18,28,29] and III/V [30]. To estimate the metal loss, we simulated the losses of the Si/Ge-core TE00 and TE01
modes with perfectly conducting contacts and thick nickel (n=3.4+6.8j) contacts. Many metals make ohmic contact to p-type germanium [31,32]; nickel
was used because it also makes ohmic contact to n-type silicon without hightemperature annealing, and this allowed the contacts to be deposited in a
single step. Figure 3.10 shows the simulated eective index and modal loss
for the two modes as a function of germanium thickness.
Including the correct value for metal optical properties shifts the dispersion curves to the left (toward thinner layers of germanium) because the
81
mode is allowed to occupy more space vertically. This increases the calculated modal loss both because of an increased overlap with the germanium
and because of the actual metal loss. For the 100 nm layer of germanium, for
example, the germanium connement factor doubles when the nite conductivity of the metal is included in the simulation. If we only consider points
on the curve where the index of the metal has a small impact on the mode
shape, the predicted quantum eciency from an otherwise-perfect detector
operating with the TE00 mode is about 90%. The more important conclusion
of including the metal loss in the calculation is that for a real detector, the
4.2
TE00
neff
4
Nickel
3.8
3.6
TE01
3.4
3.2
100
200 300 400 500

Ge thickness (nm)
modal loss (cm-1)
peaks in Figure 3.6 will be shifted a little to the left.
600
5000 Nickel
4000
3000
TE00
=
2000
1000
TE01
0
100 200 300 400 500 600
Ge thickness (nm)
Figure 3.10: (a) Eective index and (b) modal loss as a function of germanium thickness for real and ideal top contacts.
3.2
3.2.1
Diode impedance
Physical origins
Figure 3.11 shows a photodiode cross-section and has labeled contributions

to the diode impedance. The capacitance CP D comes from the depleted region and can be calculated using Equation 2.24. There are three primary
82
contributors to the series resistance: (1) the p-contact resistance Rc,p , (2)
the n-spreading resistance Zwell , and (3) the n-contact resistance Rc,n . There
is also a resistance from the p-type absorber, but the hole mobility of germanium is so high that this is negligible (< 2 for all diodes fabricated).
p-metal
Rc,p
p-Ge
n-metal
Waveguide
layer (i Si) n+ Si
CPD
i-Si
n-well (n-)
Zwell
n-metal
Rc,n
Buried oxide (BOX)

Substrate (Si)
Figure 3.11: Waveguide photodiode cross-section schematic and impedance.
The series resistance contribution of the p-side contact is
Rc,p =
c,p
A
(3.5)
where c,p is the specic contact resistivity and A is the area of the contact.
When contacts were deposited directly on the germanium outside of a full
process run, contact resistivities in the low 107 cm2 were obtained for
both nickel and titanium contacts. Within a process run, the contact resistivity tended to be higher (up to 105 cm2 ), presumably due to damage
to the semiconductor. The series resistance contribution of the n-side contact
is
Rc,n
1
=
2
c,n Rsh
L
(3.6)
where Rsh is the sheet resistance of the silicon under the contact and L
is the length of the photodiode. The factor of 1/2 indicates that the two
side contact resistances add in parallel. There is an additional spreading
83
resistance due to the spacing between the mesa and the n-contact of
Rspread =
1 Rsh Wgap
2
L
(3.7)
where Wgap is the distance between the mesa and the contact. Both the
specic contact resistivity and the sheet resistance are related to the doping
level and decrease with increasing doping. Figure 3.12 shows TLM measurements for n- and n+ implanted silicon with nickel contacts. Titanium and
nickel are the most commonly used contact metals in silicon-CMOS1 [33].
Both alloy with silicon to form an ohmic contact; here nickel was used because the germanium contact cannot be annealed [32] at the high formation
temperatures of titanium silicide [34].
10
Resistance ()
Resistance ()
3500
R = 42x + 2.4k
3000
2500
2000
5
10
15
20
Contact spacing (m)
25
R = 0.32x + 1.2
6
4
2
0
0
10
15
20
25
Contact spacing (m)
Figure 3.12: Rectangular TLM measurement results for n- and n+ silicon

with nickel contacts. The pad width was 120 m, and mesas were etched to
avoid fringing eects.
The n- silicon is intended to be a shallow layer (100-200 nm) with negligible free-carrier absorption (conductivity around 10-20 S/cm). The n+
silicon is slightly thicker (300 nm) and has a higher conductivity (around
1
Cobalt is also used, but not for reasons relevant to photonic devices, and it is not
available in the UCSB nanofab.
84
1000 S/cm). The n- silicon has a contact resistivity of 4 102 cm2 while
the n+ silicon has a contact resistivity of 1 106 cm2 . Interpolating using
the formula log(c ) 1/ ND , if we require that the free-carrier absorption

due to the n-type silicon under the photodiode is less than 100 cm1 , the
best-case n-side contact resistance would be 2 105 cm2 for a 200 nm
thick layer with a conductivity of 120 S/cm . This would contribute a series
resistance of 45 to a 20 m long device. For this reason, we used dierent
doping levels under the photodiode and under the n-contacts.
The impedance of the n-well can be predominately resistive or capacitive depending on the doping level and operating frequency. The complex
impedance of a doped semiconductor is
Zsemi =
.
1 + j
(3.8)
For large resistivities, this reduces to a purely imaginary (capacitive) value,

while for low resistivities it is mostly real (resistive). If the n-well is left
undoped, the capacitance will be lower, but the electric eld will not be
uniform across the device mesa. This will reduce the transit-time limited
bandwidth and output saturation current of the device. Figure 3.13 shows
a Silvaco simulation of the electric eld magnitude for an undoped and a
highly doped n-well at -2 V bias. The undoped device has a low eld in the
center, while the device with the doped n-well has a nearly uniform eld.
This makes the doped, or primarily resistive, n-well preferable.
Assuming the current density in the collector is uniform and there are
contacts on both sides of the mesa, the series resistance of the n-well is
about
Rwell
WP D Rsh,nwell
6
L
85
(3.9)
Undoped n-well
(kV/cm)
120
p-contact
Si collector
p-contact
60
Ge absorber
n-contact
n+ n-well
E-field
n-contact
Ge absorber
n-contact
Si collector
n-contact
Figure 3.13: Electric eld distributions for a waveguide photodiode with (a)
an undoped n-well and (b) a highly doped n-well.
where WP D is the n-well width. If there is some asymmetry in the contact

placement relative to the center of the mesa, it will decrease the series resistance because the mesa-left contact and mesa-right contact resistances add
in parallel. If the sheet resistance of the n-well is high, then the current will
not be distributed evenly in the collector but rather tend towards the sides.
This will also decrease the series resistance.
An interesting consequence of the dependence of the series resistance on
device area is that the RC-limited bandwidth does not increase monotonically with decreasing device dimensions, even though the capacitance does.
Figure 3.14 shows the RC-limited bandwidth as a function of device length
for a 4 m wide mesa. For simplicity, the p- and n-contact resistances are
assumed to be equal. The n-well sheet resistance is 2.5 k/. For device
lengths greater 20 m, the bandwidth decreases monotonically as expected.
For very small devices, the bandwidth essentially becomes resistance-limited,
and quickly falls to zero despite decreasing capacitance. The curve assumes
a 15 fF parasitic pad capacitance, which is consistent with measured values.
Smaller parasitic capacitances will push the optimum point toward smaller
devices.
86
40
3dB frequency (GHz)
c=10-6 cm2
c=10-5 cm2
30
20
c=10-4 cm2
10
0
20
40
60
PD length (m)
80
100
Figure 3.14: RC-limited bandwidth as a function of photodetector length

assuming realistic parasitics. The contact resistances for the p- and n-sides
are assumed equal to each other and this value is used as the curve parameter.
The n-well sheet resistance was 2.5 k/, and a 15 fF parasitic capacitance
has been added to all intrinsic diode capacitances.
3.2.2
Measurement
The photodiode impedance discussed in Section 3.2.1 cannot be measured

directly, but rather must be derived from the complex microwave reection
coecient in a 50 system, or S11 .2 S11 is measured as a function of frequency
with a network analyzer, which is calibrated to remove the eects of the RF
probe and cables. In the parasitic-free case, S11 will be
S11 =
ZP D Z0
ZP D + Z0
(3.10)
In the nomenclature of the lightwave component analyzer, the microwave reection

coecient of the photodiode is S22 and not S11 .
87
where for the small-circuit equivalent model shown in Figure 3.15 (a),
ZP D = R s +
Rp
1 + jRp Cp
(3.11)
and Z0 is the system impedance of 50 . When the microwave reection is

dominated by the diode impedance, the pad capacitance usually adds to the
diode capacitance.
Rs
Iph
CPD
Rp
Output
Capacitance (pF)
2.5
2
1.5
1
Measured
From A/d
0.5
0
2000
4000
PD area (m2)
6000
Figure 3.15: Small-circuit equivalent of a photodiode
Rs
Iph
CPD
Lpad
Rp
Cpad
PD
Output
Pad
Figure 3.16: Photodiode equivalent circuit with pad parasitics
Figure 3.16 shows a small-circuit equivalent model for a photodiode with

probe pad parasitics. If the parasitic pad impedance is taken into account
88
and the parallel resistance is very large, the measured reection will be
S11 =
1
jCpad
1
jCpad
(
jLpad + Rs +
(
jLpad + Rs +
1
jCP D
1
jCP D
)
)
Z0
(3.12)
+ Z0
It follows immediately that if the pad impedance is on the same order of

magnitude as the photodiode impedance, it will be dicult to extract the
photodiode impedance from S11 . In particular, if the pad capacitance is
similar to the diode capacitance and Equation 3.10 is used to extract the
diode impedance, then the tted diode series resistance will be substantially
smaller than the actual diode series resistance.
Figure 3.17 (a) shows the series resistance estimated using Equation 3.10
as a function of correct diode series resistance for a pad capacitance of 20 fF
and inductance of 60 pH (typical measured values for the detectors in this
work). For a 2 pF diode capacitance (or larger), the extracted series resistance is correct. Even for a 200 fF capacitance, the error may be acceptable.
For a photodiode capacitance equal to the pad capacitance, Equation 3.10
will not provide accurate values for the series resistance. This poses a problem for the smaller waveguide photodiodes, as the diode capacitance tended
to be similar to the pad capacitance.
Figure 3.17 (b) shows the signed error in extracted capacitance as a function of series resistance. The error is dened as Cerror = Cmeas CP D Cpar
(i.e. measured-actual). The error is less than 5% of the total for the full
range of series resistances considered. For a xed series resistance, the error
in extracted capacitance approaches a constant value at large capacitance,
and the percentage error becomes vanishingly small. As long as data near
the L-C pole is not used, the parasitic inductance has very little eect on the
extracted values of the diode capacitance and resistance. The error intro89
CPD=100Cpad
150
100
CPD=10Cpad
CPD=Cpad
50
0
Capacitance error (fF)
Series resistance ()
200
10
5
CPD=Cpad
-10
0
50
100
150
200
CPD=10Cpad
-5
50
100
150
200
Figure 3.17: Systematic errors in diode impedance extracted from S11 data.
(a) Extracted series resistance neglecting parasitic eects as a function of
diode series resistance. (b) Error in extracted capacitance as a function of
diode series resistance. The pad capacitance was 20 fF and the inductance
was 60 pH.
duced by ignoring the pad parasitics is dicult to detect. It mostly appears

in the series resistance, which is harder to predict than the photodiode capacitance. Furthermore, it is systematic, which means that incorrectly t S11
data will display seemingly rational trends. As a direct consequence of this,
it is important to include the parasitic pad capacitance in the tting model
used for small photodiodes. Once the pad capacitance is known, corrected
reection coecient values can be generated using [35]
S11,corr = (
2
2+jCpad Z0
)2
S11
+
jCpad Z0
2+jCpad Z0
jCpad Z0
2+jCpad Z0
[
S11
jCpad Z0
2+jCpad Z0
(3.13)
and the diode impedance parameters can be t to the corrected data.

It is sometimes convenient to plot the RC limit from the S11 data correctly
rather than relying on the accuracy of tted parameters. In general, the
power delivered from a voltage source with a complex impedance to a complex
90
load is
PL =
1 |Vs |2
Re(ZL )
2 |Zs + ZL |2
(3.14)
where Vs is the signal generator voltage, Zs is its impedance, and ZL is the

load impedance. If the complex impedance of the photodiode is similar to the
equivalent circuit shown in Figure 3.16 (i.e. consists of a complex impedance
and a series resistance), then Vs is the Thevenin equivalent voltage and Zs
the resistance:
Vs = Iph (CP D Rp )
(3.15)
= Iph (ZP D Rs )
and
Zs = Z P D
(3.16)
where ZP D is the diode impedance from the S11 data and Equations 3.10 and
3.13. Then the normalized RC-limited frequency response of the photodiode
is
S21 =
|ZP D Rs |
|ZL + ZP D |
(3.17)
in linear units. Equation 3.17 indicates that some tting of S11 data is
necessary in order to predict the RC-limited bandwidth. As a result, it is
best to use photodiodes with large intrinsic capacitances (relative to the pad
capacitance) to draw conclusions regarding the transit-time limit, because
tting error is lower for this class of device.
3.3
Practical limitations to transit time
As shown in Section 2.1, the absorber doping prole is critical to obtaining good bandwidth and eciency in a Si/Ge UTC. For an exponentially
91
decaying prole, the electric eld in the absorber will be constant and
1
E=
kB T ln
Wa
NA,max
NA,min
)
(3.18)
where NA,max and NA,min are the doping at the p-contact and p-i junction,
respectively. The maximum practical value for NA,max is about 1 1019 cm3 ,
as anything higher will limit the quantum eciency of the device. This is also
the solubility limit of boron in germanium at typical growth temperatures, so
higher doping would require an implant step. Ideally, then, NA,min should be
as low as possible. In fact, from the analysis in Chapter 2 it would seem that
an optimum waveguide Si/Ge photodiode design, in terms of bandwidth,
would have a partially depleted absorber [36]. That way, the germanium
thickness could be chosen based on optical constraints and the silicon thickness could be chosen at the optimum point in the RC/transit-time trade-o
design curve. Unfortunately, the properties of real germanium-on-silicon heterojunctions threading defects prohibit this.
Due to the lattice mismatch between germanium and silicon, threading
defects extend from the heterointerface into the germanium layer. After
propagating some distance, pairs of threading defects tend to meet and annihilate, so the threading defect density is lowest furthest from the heterointerface [37, 38]. These defects are acceptor-like with energy levels spread
throughout the forbidden gap [3942], and are negatively charged. Figure 3.18 shows conceptual band diagrams for a thin layer of highly dislocated
germanium surrounded by dislocation-free germanium with various dopant
species and densities. If the threading defect density is suciently high, the
Fermi level in the dislocated layer is eectively pinned at the trap energy
level (0.06 eV above the valance band [41]). This can form a barrier when
92
the surrounding semiconductor has a dierent Fermi level. In a Si/Ge UTC

structure, the barrier appears at the absorber-collector junction and can decrease bandwidth and eciency, as shown in Figure 3.19.
p+
p-
n-
n+
Figure 3.18: Band diagrams of a single grain boundary in doped germanium.
Ge
Ge
absorber
absorber
Si
Si
collector
collector
Real
Ideal
Figure 3.19: Band diagrams of a Si/Ge UTC (a) with and (b) without threading defects at the heterojunction.
The size of the barrier due to the threading defects depends on the threading defect density (TDD), the number of traps associated with each threading defect, the doping of the surrounding semiconductor, and the applied
voltage. The relationship between TDD and trap density Nt is not wellquantied, but C-V proling indicates that threading defects extend a few
10s of nanometers into the germanium and have an areal density of approximately 1 1012 cm2 . Figure 3.20 shows barrier height at equilibrium as a
93
function of interface trap density and p-type doping in the vicinity of the
trap. As the doping increases, the fermi level of the surrounding semiconductor moves towards the energy level of the trap and the barrier lowers.
The barrier disappears for doping densities greater than 5 1017 cm3 , which
is the doping density at which Ef Ev = 0.06 eV (the lowest energy level
of the trap state) in germanium. Since the lowest energy level of the trap
state is unknown, the exact cut-o is also unknown. As the doping drops
below the cut-o, the occupancy of the trap increases. The charge density
increases proportionally to the trap density and occupancy, and thus the
barrier is largest for low acceptor concentrations and high trap densities.
Barrier height (kBT)
5
4
Nt=11013
3
2
Nt=11012
1
N =11011
t
0
16
10
10
17
10
18
10
19
Ge p-doping (cm-3)
Figure 3.20: Threading-defect-induced barrier height as a function of pdoping and interface trap density (cm2 ), assuming a trap level 0.06 eV
above the valance band.
The barrier height is obtained by solving for the trap occupancy while
requiring the semiconductor maintain charge neutrality. If the coulombic
interaction between trap states is negligible (which is the case at room temperature), the trap occupancy is given approximately by Fermi statistics [43]:
94
Nte =
Nt
1 + 2 exp(
Ef,bulk b
)
kB T
(3.19)
where Nte is the density of empty (negatively charged) traps, Nt is the trap
density, the factor 2 refers to the spin degeneracy of trap states, Ef,bulk is the
Fermi energy in the bulk, and b is the barrier height. Here, the thermal
voltage kB T is given in eV. The free holes near the charged trap state will
redistribute to screen the charge. The characteristic length associated with
charge screening is the Debye length (D ):
D =
s kB T
qNA
(3.20)
where s is the dielectric permittivity of the semiconductor, q is the electron

charge, NA is the acceptor concentration, and kB T is again in electron-volts.
The excess hole concentration (p(x)) is then (if the trap is at x=0 and the
x-axis is going into the germanium):
x
p(x) = N0 e D .
(3.21)
The constant N0 is comes from charge neutrality:
N0 D = Nte .
(3.22)
Finally, the barrier height is found by solving Poissons equation:
b =
qNte D
.
s
(3.23)
Solving Equations 3.19 and 3.23 simultaneously yields the barrier height b
shown in Figure 3.20. From the gure, it is clear that very large barriers can
95
result if NA,min is below 5 1017 cm3 and the trap is located at the assumed
location in the forbidden gap.
Since both the maximum and the minimum doping level of the germanium
are xed by material system constraints, the maximum magnitude of the
electric eld can be plotted as a function of absorber thickness. This is
done in Figure 3.21. The electron velocity saturates around 2 kV/cm, which
implies that the UTC topology is best for absorbers 400 nm and thinner.
It is worth noting that threading defects at the heterointerface also impose
constraints on PIN photodiodes. Most vertical Si/Ge PINs are grown p-side
down so that the Si/Ge heterojunction is on the p-side of the diode. This
mitigates the impact of the charged threading defects [44] on transit time,
but has a negative eect on series resistance because holes have higher free
carrier absorption for a given conductivity than electrons and because it is
very dicult to make good ohmic contact to n-type germanium.
Electric Field (V/cm)
x 10
1.5
E
1
0.5
Esat
200
400
600
800
1000
Absorber thickness (nm)

Figure 3.21: Absorber electric eld as a function of thickness. The minimum
and maximum doping are 5 1017 cm3 and 1 1019 cm3 , respectively, and
all other simulation parameters can be found in Table 2.1.
96
In theory, the analysis presented here can be extended to non-equilibrium

operation and then to terminal quantities of interest via the exit velocity ve .
However, it is not clear what that would accomplish. Understanding that
there may be a barrier at the heterojunction which is not due to the band
oset is vital to the design process and useful in interpreting experimental
results, but there does not exist a formula derived from rst principles that
accurately predicts the transit-time limited bandwidth in the presence of
threading defects. It is better to characterize real devices and work backwards
with a TCAD model until the dataset is self-consistent.
3.4
Experimental characterization of threading defects
Since threading defects can potentially determine the heterojunction behavior, it is worthwhile to characterize them in greater detail. In addition to
controlling the size of the barrier at the Si/Ge interface, threading defects can
also increase the leakage current and decrease the minority carrier lifetime
such that the eciency is aected.
3.4.1
Electrostatic analysis
To determine the eect of threading defects on the the band diagram of the
photodiodes, we measured charge densities using capacitance-voltage (C-V)
and spreading resistance proling. In general, the diode capacitance is a
function of depletion region thickness. The depletion region thickness is in
turn a function of the doping density and applied voltage. For diodes with
heavily doped n-sides, like the surface-normal photodiodes used in this work,
97
the p-side dominates the C-V behavior. Assuming the n-side is heavily doped,
the capacitance per unit area of a Si/Ge UTC is
CP D
Ge
=
,
A
xp + Ge
Wc
Si
(3.24)
where xp is the depletion region thickness on the p-side of the diode. Again
assuming that NA << ND ,
Ge
xp =
Wc +
2Si
Ge
Wc
2Si
)2
+
Ge (Vbi VA )
qNA
(3.25)
where Vbi is the built-in voltage of the diode and VA is the applied voltage.
The inverse square of the diode capacitance is then
1
1
1
= 2
2
CP D
A
2
Wc
Si
)2
Wc
Si
Wc
2Si
)2
+
Vbi VA Vbi VA
+
(3.26)
qNA Ge
qNA Ge
and its derivative with respect to voltage is

(
d
1
2
CP
D
dV
1
1
Si qNA Ge
= 2
+ ( )
2
A
qNA Ge
Vbi VA
Wc
+
Si
qNA Ge
(
)
1
2
2
.
A
qNA Ge
(3.27)
Here, it has been assumed that Si /Wc qNA Ge / (Vbi VA ) (this is equivalent to saying that the capacitance of the collector is much smaller than the
capacitance of the p-side depletion region). Equation 3.27 can be used, along
with
xp =
A
Ge
Ge
Wc
CP D
Si
98
(3.28)
to estimate the acceptor concentration as a function of junction depth from

a C-V curve. This last equation is not very accurate, as it requires that the
measured capacitance be the capacitance of the photodiode itself and not
a parasitic capacitance. For the photodiodes fabricated in this work, the
parasitic capacitance could vary based on probe placement by about 10 fF.
To mitigate the eect of this, we measured only large diameter photodiodes
and drew conclusions about areal charge densities only.
Figure 3.22 shows raw 1/C 2 data and extracted doping density as a function of junction depth for a 30 m diameter photodiode made with surfacenormal epi material. The donor concentration ND was 5 1019 cm3 and the
nominal acceptor concentration at the p-i interface was 5 1017 cm3 , so the
p-side doping should dominate the C-V behavior. In forward bias (until the
turn-on voltage) and at low levels of reverse bias, the collector is not fully
depleted. The slope of the 1/C 2 is large in this area because the collector
is very lightly doped, and xp is negative. At around -0.6 V, there is a kink
in the 1/C 2 curve as the collector depletes fully and the doping at the p-i
junction can be extracted. As Figure 3.22 shows, there is good agreement
between the C-V data and the designed doping prole. While there were
threading defects in this epi, they are not visible in the C-V data. This
indicates that few of the defect states are occupied relative to the acceptor
states intentionally introduced by the boron doping.
The presence of threading defects was more prominent in the C-V proles of epi material with low doping near the Si/Ge interface. Figure 3.23
shows raw 1/C 2 data and extracted doping density as a function of junction
depth for a 30 m diameter photodiode. This material was meant to be
used as a waveguide photodiode, but the same structure was grown on n+
(5 1019 cm3 ) wafers so that surface-normal structures could be fabricated
99
x 1024
1019
NA (cm-3)
1/C2 (F-2)
4
3
2
-6
-4
-2
Voltage
1018
design
1017
1016
-50
data
0
xp (nm)
50
Figure 3.22: (b) Doping prole extracted from (a) C-V curves for surfacenormal photodetector epi material.
and analyzed. Whereas there are two distinct slopes in Figure 3.22(a) corresponding to before and after the collector was fully depleted, there are three
slopes visible in Figure 3.23(a). This is evident in Figure 3.23(b), as the
acceptor concentration appears to be large at the p-i junction, then decrease,
and then increase again. This behavior is partially conrmed by secondary
ion mass spectroscopy (SIMS) data, which is also shown in Figure 3.23 (b).
For depletion region depths beyond 20 nm, the SIMS and C-V curves agree
qualitatively. The large quantitative discrepancy is most likely due to a systematic error in the SIMS data (e.g. incorrect calibration factor since the
exact composition of the absorber is unknown). Hall measurements indicate
that the SIMS data under-estimates the boron concentration by about a factor of 6. At the Si/Ge interface, there is a spike in the measured charge
density from the C-V data that is not present in equal magnitude in the
SIMS data. The spike in the SIMS data consists of 5-6 data points and
occurs exactly at the interface; it is most likely a measurement artifact.
The spike in measured charge density at the interface is also visible in
a spreading resistance prole (SRP) of the same epi material. Figure 3.24
100
x 1024
1019
1018
NA (cm-3)
1/C2 (F-2)
4
3
2
C-V data
SIMS
1017
1
0
-10
-5
Voltage
1016
50
100
xp (nm)
Figure 3.23: (b) Doping prole extracted from (a) C-V curves for waveguide
photodetector epi material.
compares the boron concentration from SIMS to the mobile carrier concentration from SRP. To translate the boron concentration into a conductivity,
the structure was simulated at equilibrium in Silvaco using the SIMS data
as the absorber doping prole. The hole mobility model as adjusted so that
the SIMS and SRP measurements agreed near the surface. Comparing all
three data sets indicates that there are acceptors at the Si/Ge interface that
contribute mobile carriers at equilibrium. These carriers have an areal charge
density on the order of 1 1012 cm2 and extend a few tens of nanometers
into the germanium.
101
Conductivity (S/cm)
200
SIMS
150
100
SRP
50
n-Si
p-Ge
0
200
400
600
Distance from surface (nm)
800
Figure 3.24: Absorber conductivity predicted by SIMS and measured by

SRP. The SRP shows a spike at the Si/Ge interface that is most likely due
to threading defects.
3.4.2
Dark current
The diode dark current is also aected by the presence of threading defects.
Capacitance-voltage proling can give the concentration of (occupied) traps,
but accurate dark current measurements can provide the trap energy level
and minority lifetime. In order to ensure that the measured dark current
corresponded to the junction leakage current and not sidewall leakage current,
we measured several diodes of dierent diameters and t a curve,
Id,tot = Jarea r2 + Jperimeter r
(3.29)
where r is the diode radius. For these measurements, good results were
obtained only when the room (and microscope) lights were o. The results
are shown in Figure 3.25. The gure shows the measured dark current at
102
-1 V as a function of device diameter. The dark current is dominated by the

areal component, which is about 65 mA/cm2 at -1 V. This is about average
for a Si/Ge device [45]. Since the dark current is dominated by the area
component, these diodes can be used to draw conclusions about the Si/Ge
heterojunction.
Dark current (A)
0
-1
-2
Data
Perimeter contribution
Area contribution
Perimeter + area
-3
-4
20
40
60
Device diameter (m)
80
Figure 3.25: Dark current at -1 V bias as a function of diode diameter.
There are two sources of reverse current in a photodiode when no optical

generation is present: diusion of minority carriers across the junction and
generation and collection of carriers through trap-assisted processes. The
diusion currents from the p- and n-sides of the diode are
(
Jp,dif f =
qn2iGe
103
Dn
NA Ln
)
(3.30)
and
(
Jn,dif f =
qn2iSi
Dp
ND Lp
)
(3.31)
where ni is the intrinsic carrier concentration and Ln,p is the minority carrier
diusion length. If the diusion length is longer than the region thickness, as
is most often the case for the p-side of a Si/Ge uni-traveling carrier photodiode, the region thickness should be used instead. Using niGe = 2 1013 cm3 ,
niSi = 1 1010 cm3 , NA = ND = 1 1018 cm3 , Dn = 100 cm2 /s, Dp =
12 cm2 /s, and Ln = Lp = 1 m (since the expected diusion lengths are
much larger than a realistic photodiode contact thickness), we have
Jp,dif f = 64 A/cm2
(3.32)
Jn,dif f = 2 pA/cm2 .
(3.33)
and
The expected diusion current from the p-side is several orders of magnitude
larger than the expected current from the n-side because the intrinsic carrier
concentration of germanium is higher than that of silicon. Both values are
lower than measured values for dark current density in the photodiodes in
this work, so it is likely that trap-assisted processes are dominant.
The recombination rate from a trap state with energy Et is [46]
(
Utrap =
n
v (pn n2i ) Nt
( n p th
))
(
(
))
Ei Et
i
n + ni exp EktBE
+
p
+
n
exp
p
i
T
kB T
(3.34)
where n and p are the capture cross sections for electrons and holes, n
and p are the hole and electron concentrations, Nt is the trap concentration,
ni is the intrinsic carrier concentration and Ei is the intrinsic Fermi level of
104
the semiconductor. For a reverse-biased diode, pn n2i , and there is net

generation. If n = p = , and if we assume that the all the traps are in the
part of the depletion region that extends into the germanium, Equation 3.34
vth Nt
becomes
Utrap =
0,
n2i
(
),
E E
2ni cosh ki T t
0 < x < xp
(3.35)
elsewhere
where x = 0 at the edge of the p-side of the depletion region and the Si/Ge
interface is at x = xp . The hole and electron concentrations are very small
in the depletion region and can be neglected. The dark current is obtained
by integrating over the depletion region
n2i
Jtrap = qvth Nt xp
p + 2ni cosh
Ei Et
kB T
).
(3.36)
The depletion region width xp and acceptor concentration can be estimated from the C-V data. The slope of the current as a function of temperature is approximately
dJtrap
Eg
+ |Ei Et | .
1
2
d kB T
(3.37)
Here, the approximation cosh(x) exp(|x|) has been used. This allows us
to determine the approximate trap energy by measuring the dark current as
a function of temperature. As with other dark current measurements, good
results were obtained only when the room was dark. Figure 3.26(a) shows
an Arrhennius plot of the dark current of an 80 m detector at -0.6 V and
-1 V as a function of temperature. Figure 3.26(b) shows the extracted trap
energy, which could be measured from the conduction band energy to the
trap or from the trap energy to the valance band energy. The ambiguity is
105
introduced by the approximation cosh(x) exp(|x|). The trap energy level

that dominates the generation current lies around midgap and changes as a
function of voltage. This is consistent with other studies of trap levels from
germanium defects [39,40,42,47,48], which have found trap levels throughout
the forbidden band gap. At voltages between 0 and -0.6 V, the measured
energy level cannot be easily related to the trap state in the germanium
because the silicon is not fully depleted.
0.25
9.9
0.2
-10-5
Et (eV)
Dark current (A)
-10-6
Temperature (C)
58.4
40.5
24.4
0.15
-0.6V
-1V
0.1
0.05
-10-4
34 35 36 37 38 39 40 41
1/kT (eV-1)
0
-1
-0.8 -0.6 -0.4 -0.2

Voltage (V)
Figure 3.26: (a) Dark current as a function of temperature at -1 and -0.6 V.

(b) Trap state energy as a function of voltage.
Equation 3.36 together with the temperature-dependent dark current can

be used to determine the recombination time = 1/(vth Nt ) associated with
the trap. This is shown in Figure 3.27. The measured recombination time
of 1-2 ps corresponds to a capture cross-section of 1 1014 cm2 assuming a
trap density of 2 1017 cm3 (from C-V results), which is not unreasonable.
The upward trend in the data is due to the changing value of Et . Around
half the calculated breakdown voltage, most Si/Ge photodiodes show soft
breakdown behavior. The dark current density continues to display a temperature dependence like the one shown in Figure 3.26, but the magnitude
increases quickly from the predictions of the Shockley-Read-Hall model. This
106
is most likely due to trap-assisted tunneling.
10-11
10-12
10-13
-1
-0.9
-0.8
-0.7
Voltage (V)
-0.6
Figure 3.27: Recombination lifetime of threading defect trap state.
3.4.3
Minority carrier lifetime
The low minority lifetime obtained from dark current measurements would
be problematic for the photodiode quantum eciency if the threading defects extended all the way through the absorber. An average lifetime of 1 ps
would lead to a maximum collection eciency of 0.18, as seen in Figure 2.6.
Indeed, Si/Ge photodiodes based on polycrystalline germanium have been
demonstrated and had poor quantum eciency due to recombination at defect centers [49]. For Si/Ge photodiodes grown by CVD or MBE, the threading defects do not extend all the way into the germanium but rather meet
and annihilate. This enables Si/Ge photodiodes with near-unity quantum
eciency.
In order to measure the minority lifetime in the bulk of the germanium,
an optical measurement is necessary, as electrical measurements only probe
107
the semiconductor in the vicinity of the depletion region. To estimate the minority lifetime, we measured the open-circuit voltage decay and short-circuit
current decay of the photodiode [50, 51]. Equations 2.7-2.14 indicate that
the transit-time limited step response of the photodiode will have multiple
poles. The contribution of the bulk recombination time is a classic singlepole response with a decay constant equal to the bulk minority lifetime. The
contribution of the back surface recombination velocity is more dicult to
determine. In principle, both the back surface recombination velocity and
the minority lifetime can be resolved independently with these two measurements.
Figure 3.28 shows the measurement setup used to characterize the minority lifetime of a surface-normal photodiode. Optical pulses are generated
with a 20 GHz mach-zehnder modulator and 10 Gb/s pulse-pattern generator. The photodiode output is measured in the time domain by a high-speed
oscilloscope. The total system fall time (90-10) was 450 ps (decay constant
200 ps). To measure the open-circuit voltage decay, we used a buer amplier with unity gain and a 2.2 M input impedance. The decay constant
of the amplier was 4.3 ns and the small-signal 3 dB bandwidth was about
900 MHz, which is consistent with the measured fall time.
Figure 3.29 (a) shows the measured open circuit voltage decay of an 80 m
diameter surface-normal device. A single decay constant V of 15.2 ns provides a good t to the data. To ensure that the measured decay constant
was limited by the minority lifetime in the photodiode and not the RC time
constant of the circuit, we measured the impedance under identical illumination and forward voltage conditions. The capacitance was 4 pF, the parallel
resistance was 700 , and the series resistance 1 . Since the measured time
constant is much longer than any of the other time constants in the system,
108
Laser
= 1310 nm
DUT
Modulator
Short circuit
High-speed
scope
pol. control
50
Open circuit
Av=1
Rin=2.2M
Optical
Electrical
Pulse generator
Figure 3.28: Setup for open circuit voltage decay and short circuit current decay measurements. For open circuit voltage decay, the photodetector output
was attached to a unity-gain op-amp circuit with a 2.2 M input resistance
via an RF probe (no cables were used). For short circuit current decay, it
was attached to the high-speed scope with 50 cables.
it is presumably due to the recombination time. Figure 3.29 (b) shows the
short circuit current decay. The signal was too small to measure for load
resistances smaller than 50 , so this was the load condition used. The decay time J was 543 ps, which is slightly larger than the estimated R-C time
constant of 250 ps. Given that the system time constant was 200 ps, this
data most likely does not represent the intrinsic response of the device.
15
data
0.3
fit
Current (mA)
Voltage (mV)
20
10
5
0
-5
0
data
fit
0.2
0.1
0
200
400 600 800

Time (ns)
4
6
8
Time (ns)
10
Figure 3.29: (a) Open circuit voltage decay and (b) short circuit current
decay of an 80 m diameter surface-normal device.
109
Equations 2.7-2.14 can be adapted to describe the open circuit voltage

decay by substituting 1/V for j and setting the exit velocity to zero. The
result is that for long (>1 ns) minority lifetimes, the open circuit voltage decay is dominated by back surface recombination. The data is consistent with
a back surface recombination velocity around 1106 cm/s and any bulk minority lifetime greater than 10 ns. From the analysis in Chapter 2, photodiodes
with bulk minority lifetimes greater than 1 ns behave indistinguishably from
each other, so it is safe to assume that the minority lifetime will not have
a measurable impact on device performance under normal operating conditions. The device measured had a ring p-contact that only partially covered
the top surface. It is possible that the back surface recombination velocity
for waveguide devices, or any device with a p-contact that completely covers
the top surface, will be larger than the value measured from this device, since
an ohmic contact should serve as a more ecient recombination center than
the surface states at the germanium-air interface.
3.5
Conclusions
In this chapter, several practical limits in Si/Ge UTC design were discussed.
It was shown that the minimum and maximum levels of doping in the absorber are limited by heterojunction properties and optical concerns, respectively. A consequence of this is that in the surface-normal conguration, a
uni-traveling carrier design will probably not provide superior performance
to a PIN (unless there is a large amount of available optical power). For a
waveguide photodiode, the optimum absorption prole depends on the application, and the dependence of the absorption prole on germanium thickness
was explored. The peaks and valleys seen in Figure 3.6 may or may not cor-
110
respond to PIN photodiodes with optimized bandwidth and output power; a

benet of the UTC cross-section is that the capacitance and power handling
are controlled by the silicon thickness, which has less impact on the absorption prole. The electrical properties of the threading defects at the Si/Ge
junction were characterized, and it was shown that they play an important
role in the band structure and dark current of the device, but do not aect
the collection eciency.
111
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117
Chapter 4
Si/Ge processing
The devices presented in this thesis are the rst germanium-based photonic
devices to be fabricated at UCSB. Because of this, both a process ow and a
large number of individual process steps had to be developed or adapted from
other platforms. This chapter presents general principles of Si/Ge device
process ow design and provides an introduction to the recipes that were developed. Detailed discussion of new (rather than adapted) process steps can
be found in the appendices. Section 4.1 provides an overview of the desired
cross-section and process steps necessary to achieve it. Sections 4.2-4.4 discuss specic process ow design considerations. The nal section overviews
the process ows used to fabricate the devices covered in later chapters.
4.1
Process overview
Figures 4.1 (a) and (b) show the desired cross-sections of completed Si/Ge
surface-normal and waveguide photodiodes, respectively. In both cases, there
is a single mesa consisting of the p-contact, the p-germanium, and the intrinsic silicon layers. The n-silicon is below the mesa, and n-contacts are
118
formed to the sides. The mesa is encapsulated in a dielectric for both sidewall passivation and electrical isolation between the p- and n-sides of the
diode. Figure 4.2 shows one process ow that could be used to obtain the
waveguide photodiode cross-section shown in Fig. 4.1(b). The process generally starts with n-side patterning. In the process shown, both the lightly
n-doped ( 1 1018 cm3 ) n-well under the photodiode mesa and the heavily
doped n+ contact areas to the sides are patterned prior to growth. Alternatively, the n+ contact could be patterned after growth and mesa etching. The
trade-os involved will be discussed in Section 4.2. After n-layer patterning,
the i-silicon and p-germanium layers are grown either through non-selective
epitaxy, as shown in Fig. 4.2 (2), or selective epitaxy. This will be discussed
in Section 4.3. Contact metal can be patterned either before or after the
dielectric is deposited, as will be discussed in Section 4.4.
p-metal
n-metal
p-metal
ARC
p-metal
p-Ge
p-Ge
i-Si
n-metal
n-metal
n+ Si
i-Si
n-Si
n-metal
n+ Si
Waveguide layer (i Si)

Buried oxide (BOX)
n+ Silicon substrate
Silicon handle wafer
(a) Surface-normal photodiode
(b) Waveguide photodiode
Figure 4.1: Cross-sections of completed surface-normal and waveguide Si/Ge

photodiodes.
119
waveguide
photodetector
p-germanium
intrinsic silicon
n+
n-well
n+
buried oxide
substrate
(1) complete n-side patterning
waveguide
photodetector
(2) Si/Ge growth
(3) Waveguide and PD mesa

etch
top p contact
sidewall
passivation
n contact
(4) Selective Ge removal
(5) p-metal deposition
(6) Passivation deposition, via

etch, n- and probe metal
deposition
Figure 4.2: One possible process ow for a waveguide Si/Ge photodetector.
4.2
N-layer patterning
As shown in Section 3.2, it is preferable to have at least two n-type doping

concentrations for Si/Ge photodiodes: one where overlap with the optical
mode is signicant, and one where the overlap is small and free carrier absorption can eectively be ignored. This rst n-type doping concentration,
the n-well, must be introduced prior to germanium growth, because it is located under the mesa. The second (contact) doping can be introduced either
before or after growth.
Patterning the n-contact before growth decreases the tolerance of the
waveguide/mesa etch. If the waveguide etch does not quite reach the ncontact layer, the photodetectors will have high n-side contact resistance.
If the waveguide etch goes past the n-contact layer, the n-side spreading
120
resistance will be high. Patterning the n-contact after growth is relatively

tolerant. Because the waveguide etch hardmask is a suitable ion implantation mask, the n+ layer can be self-aligned to the photodiode mesa. This
decreases the n-side spreading resistance by making the sheet resistance in
Equation 3.7 the lower sheet resistance of the contact. It also decreases the nside spreading resistance by increasing the tolerance of the etch: over-etching
up to the n-well thickness will have very little impact on resistance. Underetching within a few tens of nm will also not create problems because the
implant will still reach the n-well. Figure 4.3 illustrates the relative tolerances
of doping the n+ contact layer before and after growth.
n contact
n contact
N+ implant before growth

Under-etch
N+ implant before growth

Over-etch
n contact
n contact
N+ implant after growth

Under-etch
N+ implant after growth

Over-etch
Figure 4.3: Cross-sections of over- and under-etched photodiodes using preand post-growth n+ contact implant.
Neither process comes without drawbacks. Patterning the contacts before

growth adds risk of contamination to the most important step of the process,
but delaying the n+ contact patterning until after growth is likely to increase
121
the p-contact resistance. The silicon must be clean and have good crystalline
quality prior to growth. Some damage to the silicon lattice from the implant
process is inevitable, and this will reduce the quality of the germanium grown
over the n+ contacts. The implant process also carries an additional risk of
wafer contamination. Every lithography introduces the possibility that some
photoresist is polymerized and stuck on the wafer. There is no in-house ion
implantation system at UCSB, and shipping does not occur in a cleanroom
environment.
On the other hand, if the n+ contacts are not formed until after the
growth, implant must be further delayed until after the waveguide etch for
geometric reasons. Since the implant activation occurs at a high temperature
(600 C), this delays the p-contact deposition until approximately halfway
through the process. Even though every precaution is taken to protect
the germanium during the rst half of the process, typical p-contact resistances from completed chips were higher than p-contact resistances from
TLM-only processing. However, the p-contact resistance typically achieved
( 1 106 cm2 ) was low enough to yield devices with low series resistance.
4.3
Germanium growth
Most germanium-on-silicon epitaxy is done in a chemical vapor deposition

(CVD) reactor. A low-temperature (350 450 C) relaxed germanium layer
is grown rst, followed by a high-temperature (600 850 C) layer for faster
growth rates and reduced defect density [1]. This technique was rst reported
by Colace et al. in 1998 [2], and has since been commercialized by IQE Silicon
and Lawrence Semiconductor Research Laboratories. The primary challenge
122
in growing a uni-traveling carrier structure on the silicon-germanium platform is achieving the graded absorber doping prole necessary to achieve
good eciency and bandwidth without introducing large waveguide losses.
This requires a well-controlled germanium doping process capable of achieving an abrupt junction and a germanium patterning process that leaves the
silicon undamaged in the passive waveguide regions.
4.3.1
Absorber doping
As shown in Section 2.1, the doping prole in the absorber is crucial to obtaining good eciency and bandwidth. The optimal doping prole changes
continuously (rather than abruptly) in the absorber, as a doping gradient only
induces an electric eld in the immediate vicinity of the change. In III/V
UTCs, a continuous grade can be obtained even from a nominally abrupt
doping prole [3] because zinc (the most commonly used p-type dopant for
MOCVD-grown photodiodes) diuses very quickly in InGaAs at growth temperatures. This simplies in situ doping, as the doping concentration can be
calibrated for relatively few doping levels. This approach does not work for
boron doping of germanium, however, because boron diusion in germanium
is negligible at growth temperatures [46]. Subsequent high-temperature annealing is similarly unlikely to smooth the doping prole, as the diusion
coecient of boron in germanium remains small up to 900 C (the diusion
length for a 1 hour anneal at 900 C is 3.5 nm) [6] and the melting point of
germanium is 940 C. Thus if the doping prole in the absorber is introduced
by in-situ doping, the growth calibration is extremely important. It is also
presumably very dicult; of the four growths received over the course of this
work, only two had absorber doping proles that were within an order of
magnitude of the designed proles everywhere in the absorber.
123
It would then seem that ion implantation and subsequent activation anneal would be a preferable way to achieve the desired doping prole. It is
very dicult to obtain a doping prole that is not smooth using ion implantation. Unfortunately, this would create diculties near the heterojunction.
As shown in Section 3.3, the p-type doping in the absorber must extend all
the way to the heterointerface, and a high doping level (> 5 1017 cm3 ) is
necessary at the heterointerface. If the p-doping extends past the interface
into the silicon and the silicon becomes p-type, the dierence in bandgaps
between germanium and silicon (0.46 eV) will appear in the conduction band
and present a barrier to electron ow. This is shown in Figure 4.4(a) for a
UTC biased at -2 V. The silicon can be counter-doped with phosphorus or arsenic to prevent it from becoming p-type, but the tolerance of this approach
is low. If the n-doping is too low, it will not accomplish anything, but if it is
too high, the diode will be a p-n diode rather than a p-i-n diode as desired.
The band diagram for a net n-doping (ND NA ) of 1 1018 cm3 is shown in
Figure 4.4(b). There is no barrier to electron ow at the heterojunction, but
the depletion region stops in the counter-doping layer. Increasing the bias
voltage increases the depletion region width, but avalanche multiplication
begins before the collector is fully depleted.
The counter-doping fabrication tolerance can be quantied by examining
the safe operating voltage range of Si/Ge UTC with an n-type region in the
collector abutting the p-type absorber. The thickness of the n-type region
should be approximately equal to the distance the p-type implant dopes the
collector above 1 1017 cm3 . Lower p-type doping concentrations do not
help performance, but they do not induce large barriers into the conduction
band either. The minimum operating voltage is given by the voltage necessary to deplete the n-type silicon. The n-side depletion region width Wn is
124
Ge absorber
Ge absorber
Si collector
Si collector
Si n-contact
Si n-contact
(a) No counter-doping
(b) Too much counter-doping
Figure 4.4: Band diagrams for UTCs with graded absorbers formed by ion
implantation (a) without silicon counter-doping (b) with excessive silicon
counter-doping.
at most
Wn
2Si (Vbi + Vbias )

q(ND NA )
(4.1)
where Si is the dielectric constant of silicon, Vbi is the built-in voltage (0.4 V),
and Vbias is the bias voltage. The maximum allowable bias voltage is determined by the breakdown voltage of the diode. The maximum value of the
electric eld Emax in the silicon is
Emax =
2q(ND NA )(Vbi + Vbias )

.
Si
(4.2)
To avoid avalanche multiplication, Emax must be less than the breakdown

voltage of silicon. Assuming that the counter-doping error (ND NA ) is a
constant value for some thickness t and drops to zero after that, the operating
voltage range of a counter-doped UTC can be obtained. This is plotted for
various values of t in Fig. 4.5
Figure 4.6 shows simulated implant proles for a thick germanium layer.
125
Safe operating voltage range (V)
10
5
0
Possible
Impossible
t = 50 nm
-5
t = 100 nm
-10
t = 200 nm
10
17
10
18
ND-NA (cm-3)
Figure 4.5: Counter-doping tolerance for varying thicknesses of counterdoping. Negative values for safe operating voltage range correspond to photodiodes where avalanche multiplication occurs at a lower voltage than full
collector depletion.
The dopant distribution decreases roughly exponentially (i.e. it is linear on

a logarithmic scale) from its peak value toward the substrate. The prole
is not as abrupt as the Gaussian distribution expected [7] because of ion
channeling. Due to the crystalline structure of germanium (and silicon), ions
traveling in certain directions will not collide with the lattice and thus will
travel further than they would in an amorphous material of the same density.
The sample is typically mounted at a 7 angle from the ion source in order
to suppress channeling (this is the implant angle specied in the simulation),
but this does not suppress it fully since the direction of travel changes after
the rst collision. For absorber thicknesses of 400 nm or larger, an implant
energy of at least 70 keV would be necessary in order to have a p-doping
at the interface greater than 1 1018 cm3 . However, this would require a
counter-doping at levels around 1 1018 cm3 over at least 200 nm of sili126
con. The allowable counter-doping error for this thickness is 1.5 1017 cm3 ,
which would be dicult to achieve. Counter-doping has greater potential
to succeed for thinner absorbers because lower implant energies with faster
roll-os could be used. For a 175 nm absorber, boron implant around 20 keV
would be sucient to reach the Si/Ge interface, so the counter-doping around
1 1018 cm3 would only need to cover 50 nm of the silicon. This is more
tolerant, but a p-i-n diode is still not guaranteed. As a result, in-situ doping
was used to achieve the graded doping prole in the absorber for all Si/Ge
UTCs fabricated.
Concentration (cm-3)
10
10
10
10
10
21
10 kV
30 kV
20
50 kV
70 kV
19
18
17
0.1
0.2
0.3
0.4
Distance from surface (m)
0.5
Figure 4.6: Simulated implant prole for boron in germanium. The dose was
1 1015 cm2 for all energy levels. The simulation assumes the samples are
mounted at a 7 angle during implant, but this is not sucient to completely
prevent channeling.
4.3.2
Selective-area vs. non-selective epitaxy
Custom germanium-on-silicon growth is commercially available as either nonselective epitaxy, where the germanium is grown everywhere on a wafer, and
127
selective area epitaxy, where most of the wafer is masked by silicon dioxide
and the the germanium grows only in windows where the underlying silicon
is exposed. It is possible to obtain a waveguide device structure using either
kind of growth, using the process ow in either Fig. 4.7 (a) or (b). For
non-selective growth, the n-layer is patterned, intrinsic silicon and p-type
germanium are grown everywhere on the wafer, waveguides are etched, and
then the germanium is removed over the passive waveguide sections using
a selective wet etch. For selective growth, the n-layer is patterned, SiO2
windows are formed and the intrinsic silicon and p-germanium grown in them,
and the waveguides are fabricated separately. If they are fabricated prior to
the growth, the nal cross-section is the same as in Fig. 4.7 (a). If they are
fabricated after growth, the nal cross-section is the same as in Fig. 4.7 (b).
Waveguide fabrication is more dicult using non-selective growth, but it is
easier to achieve the required p-doping prole.
(a)
waveguide
photodetector
waveguide
photodetector
waveguide
photodetector
p-germanium
waveguide
photodetector
intrinsic silicon
n-well
buried oxide
substrate
(b)
waveguide
waveguide
photodetector
photodetector
p-germanium
intrinsic silicon
oxide growth mask

n-well
buried oxide
substrate
Figure 4.7: Process ows for (a) non-selective and (b) selective germanium
growth for a waveguide Si/Ge photodiode.
128
Waveguide fabrication for non-selective growth requires a silicon etch that

is close to vertical in germanium, since otherwise the waveguide width will
dier substantially from what is on the mask. Figure 4.8 shows an SEM of a
waveguide formed using an SF6 /O2 -based inductively coupled plasma (ICP)
etch with the germanium and hardmask left in place. Details regarding
process development for etch are given in Appendix C. Though the etch
prole is not quite vertical in the germanium, the nal silicon waveguide
width is the same as the hardmask width. Process ows using non-selective
growth also require an etch that is selective to germanium over silicon. There
are a number of selective wet etches available; most solutions containing H2 O2
will etch germanium but not silicon [8]. Unfortunately, the remaining silicon
will not necessarily be suitable for a low-loss waveguide after the germanium
is removed. Although before growth the silicon surface typically has very low
(<1 nm RMS) roughness, this is not the case after growth. Figures 4.9 (a)
and (b) show the silicon surface after the germanium has been removed for
two dierent growths. The silicon surface is rough regardless of wet etchant
used to remove the germanium; the roughness is caused by the growth, not
the germanium removal. Waveguides were only fabricated on the material
shown in Fig. 4.9 (b), and had acceptable losses (<3 dB/cm), but this result
is probably not repeatable.
Selective area growth will not induce roughness on the top silicon surface of the waveguides, but obtaining the graded dopant prole necessary
to achieve good eciency and bandwidth in a uni-traveling carrier photodiode is dicult. Selective area growth is fastest in the (111) direction under
many growth conditions, and thus selectively grown mesas do not have vertical sidewalls or planar top surfaces. Figure 4.10 shows a schematic crosssection of a mesa grown selectively. Planes of uniform doping are shown as
129
hardmask
germanium
silicon
2 m
Figure 4.8: Ridge prole after simultaneous vertical silicon and germanium
etching.
(a)
(b)
Figure 4.9: Silicon surface after selective germanium wet etching. (a) Surfacenormal epi material. (b) Waveguide epi material.
black lines. As the gure indicates, the doping prole will deviate from the
desired doping prole substantially around the edges of the SiO2 window.
Furthermore, appropriate gas ows and associated growth rates are dierent
for selective area and non-selective growth, and vary according to window
size. This introduces a level of uncertainty in the nal doping prole of the
completed device. Dopant proles are usually veried with secondary ion
mass spectroscopy (SIMS) or spreading resistance proling (SRP), both of
which require a window size (usually around 1 mm x 1 mm) much larger
than a high-speed photodiode. Thus doping prole of a photodiode grown
using selective-area growth cannot be measured directly and is expected to
130
p-Ge
growth
mask
i-Si
n-well
buried oxide
substrate
Figure 4.10: Photodiode cross-section after selective area growth. Black lines
represent planes of equal doping.
be dierent from structures whose doping proles can be measured.

The waveguides can be patterned before or after germanium growth. Patterning them before growth requires careful alignment of the growth mask
to the waveguide layer, and that the growth windows be the same size as
the nal germanium mesa. The top of the mesa will not be planar due to
the (111) faceting during growth, so the mesas must either be planarized
with chemical mechanical polishing (CMP) after growth or the p-metal and
via must be made small enough to guarantee a landing on the desired face.
Patterning the waveguides after growth comes at the cost of lithographic
resolution in the immediate vicinity of the photodiode mesa, as the resist
tends to be very thick around tall features. However, a planar surface can
be achieved without CMP, and large growth windows can be used, both of
which will tend to make the nal germanium doping prole look more like the
designed and calibrated doping prole. This was the approach used. Figure
4.11 shows a waveguide formed near 575 nm tall mesas using SPR955-0.9,
an approximately 900 nm-thick i-line photoresist. The waveguides are out
by a few nanometers, but this is not expected to aect performance.
131
growth window
n-contacts
PD mesa
flare-out
waveguide
PD mesa
waveguide
Figure 4.11: SEM image of waveguides patterned near mesas.
4.4
Metallization and vias
Metallization and via process design required balancing a process ow with

fewer steps against a more robust one. Many processes call for etching a
dielectric passivation/isolation layer down to bare semiconductor, and then
depositing contact and probe metal. This is convenient because the contact
dimensions and alignment are dened in a relatively high-resolution process
(dry etching as opposed to metal lifto). It can also involve fewer steps if
the contact and probe metals are deposited in the same step. This process
requires a dielectric etch that is at least moderately selective to the underlying
semiconductor: under-etching will lead to an open circuited device. However,
there is no dry etch that etches SiO2 or Si3 N4 faster than germanium. All
uorine-containing dry etches etch germanium at an appreciable rate, and
for most the selectivity of silicon dioxide to germanium is about 1:1 and the
selectivity of nitride etches is usually worse. The only SiO2 etchant that
is selective to germanium is hydrouoric acid (HF), but using a wet etch
to form vias would mean using a low-resolution, poorly controlled, step to
dene the contact placement and dimensions.
132
For this work, we developed a process that combined the resolution of dry
etching with the selectivity of wet etching. The passivation layer was etched
down to the last 50 nm using a dry etch, and then the etch was completed
in dilute HF (50:1 DI:HF). This process required re-calibration of both the
dry and wet etches for every via etch, but yielded vertical sidewalls with
good alignment and resolution. Figure 4.12 shows an SEM of a photodiode
after the via etch has been completed. The SiO2 sidewalls that extend in
the vertical direction are aligned correctly to the mesa laterally and appear
vertical. The sidewalls in the horizontal direction have poorer resolution
because the photoresist was intentionally under-exposed at these edges in
order to compensate for issues that arose earlier in the process. We also
tried depositing the p-metal before the via etch. This made the via etch
process substantially less complicated, and was generally preferable to the
via-last approach.
Ge mesa
and via
via (n)
via (n)
Figure 4.12: Via etched using the developed vertical, low-damage SiO2 via
process.
133
4.5
Processing summary
Photodiodes fabricated using three dierent process ows are discussed in

this thesis: surface-normal photodiodes, waveguide generation one, and waveguide generation two. Figure 4.13 (a) shows the process ow used for the
surface-normal photodiodes. First, the silicon collector and germanium absorber were grown on an n+ substrate. Then, a mesa was formed in a single
dry etch step. Originally, the same BCl2 /Cl2 inductively coupled plasma etch
used for the standard hybrid silicon process [9] was used with a silicon dioxide
hardmask. This process was not ideal. First, the hardmask etch attacked the
germanium, which about half the time led to over-heating during the etch,
visible damage to the underlying semiconductor, and ultimately high dark
current. Second, the etch tended to undercut the germanium, which led to
a mesa diameter that was smaller than intended by about 2 m. This was
not a problem for surface-normal devices, but was clearly unacceptable for
waveguide photodiodes.
The second step was the passivation deposition and via etch. A number
of sidewall cleaning and silicon dioxide deposition methods were explored,
and will be discussed in Appendix C. Then vias were etched using the mixed
dry/wet technique discussed in Section 4.4 and Ni/Ti/Au contacts were deposited on both the silicon and germanium. The polymer SU-8 was patterned
lithographically under the probe pads in order to decrease the parasitic capacitance between the signal pad and the n-type substrate. Metals and SiO2
have poor adhesion to SU-8, so a silicon nitride sticking layer must be deposited after the SU-8. The easiest way to do this is to deposit it everywhere
and remove it over the device with a dry etch. This will not work well for
surface-normal detectors because Si3 N4 dry etches will also etch the germa134
nium. At that point, since there is metal and desirable SiO2 on the chip,
wet etching will also be dangerous. Instead, the Si3 N4 was deposited in a
room-temperature sputter process and patterned by lifto. Finally, probe
metal was deposited.
(a)
p-germanium
intrinsic silicon
n+ substrate
(1) Si and Ge growth
(2) Si/Ge mesa etch
SU-8
(4) Contact metal deposition
(3) Passivation deposition and

via etch
SU-8
(5) SU-8 patterning and

sticking layer deposition
(6) Probe metal deposition
Figure 4.13: (a) Process ow used for rst generation of waveguide UTC
photodiodes.
A number of changes to the surface-normal process had to be made to
make it appropriate for waveguide devices. Figure 4.13 (b) shows the full
process ow used for the rst waveguide photodiode generation. The full nside was patterned prior to growth, which occurred over the entire substrate.
At this point, we did not know that heavy n-doping would degrade growth
quality or that the top silicon surface roughness would increase during germanium growth. After growth, photodetector mesas and waveguides were
formed in a single etch step using the vertical SF6 /O2 ICP etch discussed in
135
Appendix C. The mask used for this step was a 60 nm layer of Cr on top of a
200 nm layer of SiO2 . The chrome provided excellent etch selectivity (better
than 1:100) while the silicon dioxide prevented the chrome from diusing into
the germanium. Due to its high density, the chrome could also be used as
a hard-mask for a self-aligned n+ implant step, which occurred prior to the
mesa etch. The same process as is illustrated in Figure 4.13 (c) step 5 was
used. This was done to decrease the n-side spreading resistance (the n-well
sheet resistance was 4900 /).
waveguide
(b)
photodetector
p-germanium
intrinsic silicon
n+
n-well
n+
buried oxide
substrate
(1) Complete n-side patterning
waveguide
photodetector
(2) Si/Ge growth
(3) Waveguide and PD mesa

etch
top p contact
sidewall
passivation
(4) Selective Ge removal
(5) P-metal deposition
(6) Passivation deposition and

via etch
(8) BCB spin, cure, and

ash-back
(9) Probe metal deposition
n contact
(7) N-metal deposition. Also,

capacitors and thermal phase
tuner deposition.
Figure 4.13: (b) Process ow used for rst generation of waveguide UTC
photodiodes
136
After the n+ implant activation, the p-metal was deposited. Then a

500 nm SiO2 passivation and electrical isolation layer was deposited, followed by the n-metal. The rst run of waveguide devices included microwave
transmission lines, on-chip capacitors, and thermal phase tuners for coherent
receivers; the n-metal formed the ground plane for microstrip-type transmission lines. The capacitors and phase tuners were deposited immediately after
the n-metal. The capacitors were metal-insulator-semiconductor capacitors,
where the semiconductor was the p-type germanium, the insulator was 20 nm
of atomic layer deposition SiO2 , and the metal was Ti/Au. The thermal phase
tuners were a Ni/Cr superlattice consisting of four 12.5 nm/6 nm periods.
After these steps, (non-photosensitive) BCB was spun over the whole chip
an cured, again to reduce parasitic capacitance from the probe pads. It was
patterned in a CF4 /O2 remote plasma etch, which left slanting sidewalls. Finally, probe metal was deposited. The probe metal also served as the signal
trace for the transmission lines.
The second generation of waveguide detectors used a simplied version
of the prior waveguide detector process. Only the n-well was patterned prior
to growth. The photodiode epitaxial layers were grown using selective area
growth in wells much larger than the nal photodiode dimensions. This was
done in order to ensure that the nal doping prole and germanium layer
thickness would be close to the calibration sample. The growth mask was a
1 m thick layer of PECVD SiO2 , which was annealed at 950 C for 3 hours
to drive out impurities. The waveguides and photodiode mesas were again
etched using the same Cr/SiO2 hardmask. Because the photodiodes are taller
than the silicon waveguides, this required two steps. For the second step, the
passive waveguides were protected with photoresist while only the photodiode areas were etched. The n+ contacts were implanted using the same
137
self-aligned process as in the rst generation of waveguide detectors. BCB

was again used to reduce parasitic capacitance from the probe pads. For the
second generation, photo-BCB was used and only patterned under the probe
pads. This was done because BCB cannot form small enough features to be
used around the photodiode mesa: in order to decrease the series resistance,
the gap between the p-mesa and the n-contact is only 1 m. A SiO2 sticking
layer was deposited after the BCB patterning. Vias in the passivating and
sticking SiO2 layers were etched after the BCB patterning and cure, partially
to keep the germanium protected during the BCB lithography and potential
rework, and partially so that this dicult step would only need to be undertaken once. Probe/contact metal was deposited immediately after the via
etch, and the thermal phase tuners were deposited after that. There were
no capacitors or transmission lines integrated with the second generation of
waveguide detectors.
138
(c)
p-germanium
intrinsic silicon
photodetector
SiO2 + Cr
hardmask
waveguide
n-well
buried oxide
substrate
(1) N-well patterning
photoresist
(4) Completed PD mesa etch
(2) Si/Ge selective area growth
photoresist
(5) Self-aligned n+ implant
BCB
BCB
(7) photo-BCB pattern and

cure
(3) Waveguide etch and PD

mesa partial etch
(6) Passivation deposition
BCB
(8) Sticking layer deposition

and via etch
(9) Probe and contact metal

deposition
Figure 4.13: (c) Process ow used for second run of waveguide UTC photodiodes
4.6
Summary
This chapter discussed the major processing concerns related to fabricating germanium-based devices in the UCSB cleanroom. For surface-normal
photodiodes, there are relatively few trade-os. The primary diculty is in
protecting the germanium both before and after the contact metal deposition. For waveguide-based photodiodes, the best approach is to deposit the
139
p-contact metal as early as possible in the process and use it to protect the
germanium for the remainder. We described the self-aligned two-step n-layer
doping developed for this work, and showed that it had a greater tolerance to
etch rate calibration than alternative processes. It was shown that selective
area germanium growth with in situ boron doping is preferable in terms of
both nal fabricated waveguide loss and tolerance in doping-related fabrication steps. Finally, we summarized the process ows used to fabricate the
devices in Chapters 57.
140
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141
[7] S. A. Campbell, The Science and Engineering of Microelectronic Fabrication. Oxford University Press, 2001.
[8] D. P. Brunco, B. De Jaeger, G. Eneman, J. Mitard, G. Hellings,
A. Satta, V. Terzieva, L. Souriau, F. E. Leys, G. Pourtois,
M. Houssa, G. Winderickx, E. Vrancken, S. Sioncke, K. Opsomer,
G. Nicholas, M. Caymax, A. Stesmans, J. Van Steenbergen,
P. W. Mertens, M. Meuris, and M. M. Heyns, Germanium
MOSFET devices: Advances in materials understanding, process
development, and electrical performance, Journal of The Electrochemical
Society, vol. 155, no. 7, p. H552, 2008. [Online]. Available:
http://link.aip.org/link/JESOAN/v155/i7/pH552/s1&Agg=doi
[9] G. Kurczveil, Hybrid silicon AWG lasers and buers, Ph.D. dissertation, University of California, Santa Barbara, Jun. 2012.
142
Chapter 5
Surface-normal detectors
Analog ber-optic links require high-power and high-speed photodetectors
to achieve good signal-to-noise ratios over wide bandwidths. For relatively
low frequency analog applications, surface-normal photodiodes are typically
preferred over waveguide-based ones because the quantum eciency tends to
be higher. Surface normal photodiodes tend to have better power-handling
capabilities than waveguide photodiodes. This is primarily because it is easier
to achieve uniform illumination for a surface-normal photodetector than for
a waveguide photodetector and because the thermal impedance tends to be
lower. All that is required for nearly uniform illumination for a surfacenormal device is a cleaved ber and micropositioner, whereas a waveguide
device must be designed with an exponentially increasing connement factor
to achieve the same eect [1]. Furthermore, waveguide photodiodes usually
require a material with a high thermal impedance (a quaternary in III-V
systems and SiO2 for waveguiding, which can limit performance at extremely
high levels of power [2].
As shown in Chapter 2, the uni-traveling carrier structure is preferable to
a PIN structure for high output power in the Si/Ge platform. This chapter
143
covers the design and characterization of the rst ever demonstrated Si/Ge
UTCs.
5.1
Device design and fabrication
A cross-section schematic and micrograph of a completed surface-normal photodiode are shown in Figure 5.1 (a) and (b), respectively. As indicated in
Chapter 2, it is dicult for a surface-normal Si/Ge UTC to be competitive
with a Si/Ge PIN in terms of bandwidth-eciency product. This is because
at the germanium thicknesses necessary to achieve high eciency, the maximum possible electric eld in the absorber is substantially lower than the
eld necessary to saturate the electron velocity, which increases the transittime limited bandwidth relative to a PIN with the same absorber thickness.
The absorber thickness used here was 800 nm and was chosen so that the
responsivity would be high enough to enable high-power test, but the built-in
eld would be large enough for high-speed performance.
Si3N4 AR coating
p-Ge absorber: 800nm,

doping graded 2e19 to 5e17 /cm3
i-Si collector: 250nm

n-type Si substrate
Figure 5.1: (a) Cross-section schematic and (b) micrograph of a surfacenormal Si/Ge UTC.
The doping was graded from 2 3 1019 cm3 on the contact side to
144
5 1017 cm3 at the heterojunction. For such a thick absorber, it was necessary to use the full range of expected allowable doping levels in order to
achieve a good transit-time limited bandwidth. This came with some risk
at the heterojunction side, since the exact energy level of the acceptor-like
trap state there is unknown. However, since the n-side of the diode is highly
doped, increasing bias should increase the electric eld at the heterojunction
only, which mitigated the risk. The collector thickness was 250 nm, and was
chosen to balance the RC and transit-time limited bandwidths. A thicker
collector most likely would have provided more output power and higher
bandwidth.
The detectors were grown on n+ (5 1019 cm3 ) arsenic-doped silicon
substrates. The completed diodes were single mesa structures with top ring
contacts to allow for illumination from the top side. The probe pads were
located about 60 m away from the edge of the mesa in order to allow
space for the input ber. To avoid a large parasitic capacitance between this
large metal trace and the heavily n-doped substrate, a 1 m thick layer of
silicon dioxide was used for sidewall passivation and isolation. The polymer
SU-8 was patterned underneath the even larger probe pads. The design
was compatible with but not optimal for backside illumination. Since the
substrate was heavily doped, there was about 7 dB optical loss through the
substrate even after it was thinned down to 50 m. Also, a ring contact is not
necessary for backside illumination, and only serves to decrease the p-contact
area, which increases the series resistance due to the p-contact resistivity.
The series resistance of these devices was limited by the p-contact resistance,
but it was also very low.
145
5.2
DC characteristics
Figure 5.2 shows a typical I-V curve of a completed device with a diameter
of 14 m. The dark current of these devices was discussed in Chapter 3;
it is dominated by a trap state associated with threading defects at the
Si/Ge interface. The turn-on voltage is around 0.5 V. Since the conduction
band oset is very low (or possibly negative) in the Si/Ge material system,
the barrier to electrons at equilibrium is about 0.5 V, but the barrier to
holes is closer to 1 V. Partially because of this, the forward series resistance
was typically dominated by the properties of the diode rather than parasitic
components.
100
40
Current (A)
Current (mA)
50
30
20
10
10-5
0
-10
-5
-4
-3 -2 -1
Voltage (V)
10-10
-5
-4
-3 -2 -1
Voltage (V)
Figure 5.2: Diode I-V characteristic for a 14 m diameter device on (a) a

linear and (b) logarithmic scale.
Figure 5.3 (a) shows the responsivity as a function of wavelength for a

top-illuminated and anti-reection coated large-area device at -1 V bias and
low photocurrent. The wavelength dependence is very strong due to the
proximity of the bandgap energy to the photon energy. A theoretical curve
assuming Eg,hh = 0.79 eV and Eg,lh = 0.77 eV [3] is also shown. These
band gaps correspond to the expected growth temperature of 800 C, though
146
from the gure it appears that the direct band gaps are wider. The responsivity at 1310 nm (not shown) was 0.29 A/W and the responsivity at 1550 nm
was 0.12 A/W. Assuming an absorption coecient of 7060 cm1 at 1310 nm
and perfect antireective coating at this wavelength, the collection eciency
is 75%. The analytical model developed in Chapter 2 predicts a collection
eciency of 82% for this absorber design, using a back surface recombination
velocity of 1 106 cm/s (from the open circuit voltage decay measurement in
0.25
Responsivity (A/W)
Responsivity (A/W)
Chapter 3).
0.2
0.15
0.1
0.05
0
1480
1520
1560
1600
Wavelength (nm)
0.2
0.15
-2V
-1V
0.1
0.05
0
0V
100 200 300 400 500

Optical Power (mW)
Figure 5.3: Responsivity of surface-normal photodiode as a function of (a)

wavelength and (b) input power at 1550 nm.
Figure 5.3 (b) shows the responsivity at 1550 nm as a function of input power for dierent bias voltages. At 0 V bias, the photodetector is in
compression regardless of the input power, and the responsivity decreases
monotonically. At -1 V and -2 V, the responsivity increases up until a point,
and then the detector enters compression and the responsivity starts to decrease. There are a few potential causes of the increase in responsivity with
increasing photocurrent. If recombination at trap centers had a large impact on responsivity, trap saturation would be the most likely explanation.
However, the measured recombination lifetime is too long to aect the col147
lection eciency under any level of illumination, so this is probably not the
case. A similar eect has been observed in Si/Ge PIN photodiodes with
very high eciency [4], so the apparent increase in responsivity is most likely
due to increased generation of electron-hole pairs by non-optical means. As
the photocurrent increases, the electric eld in the depletion region becomes
less uniform, which may lead to impact ionization or increase band-to-band
tunneling in in some parts of the diode.
5.3
Bandwidth
For the surface-normal photodiodes fabricated, both the RC-limited bandwidth and transit-time limit aected the total frequency response. The
transit-time limit cannot be measured directly, but rather must be inferred
from the RC limit and the total measured frequency response. This requires
an accurate determination of the diode impedance.
5.3.1
Diode impedance
The photodiode impedance discussed in Section 3.2 cannot be measured directly, but rather must be derived from the complex microwave reection
coecient in a 50 system, or S11 .1 S11 is measured as a function of frequency with a network analyzer, which is calibrated to remove the eects
of the RF probe and cables. It is dicult to calibrate out the eect of the
probe pad so as to only measure the intrinsic diode response, but for the
surface-normal photodiodes, the diode impedance dominated the microwave
1
In the nomenclature of the lightwave component analyzer, the microwave reection

coecient of the photodiode is S22 and not S11 .
148
reection. In the parasitic-free case, S11 will be
S11 =
ZP D Z0
ZP D + Z0
(5.1)
where for the small-circuit equivalent model shown in Figure 5.4 (a),
ZP D = R s +
Rp
1 + jRp Cp
(5.2)
and Z0 is the system impedance of 50 . When the microwave reection is

dominated by the diode impedance, the pad capacitance usually adds to the
diode capacitance. Figure 5.4 (b) shows the diode capacitance as a function of
area. The capacitance was well-described by the simple parallel-plate model
from Equation 2.24 plus a 43 fF pad capacitance.
Rs
Iph
CPD
Rp
Output
Capacitance (pF)
2.5
2
1.5
1
Measured
0.5
0
From A/d
2000
4000
PD area (m2)
6000
Figure 5.4: (a) Small-circuit equivalent of a photodiode. (b) Measured capacitance of surface-normal photodiodes as a function of device area.
The series resistance was not very uniform over the chip. The series resistances of nominally identical devices fabricated on dierent parts of the chip
varied over a full order of magnitude from 2 to 20 for some of the smallest
devices. Since the n-side of the diode was very thick and very highly doped,
the p-contact resistance dominated the series resistance. TLM structures in149
dicated that the contact resistance was on the order of 1 105 cm2 , but
this was not consistent with the measured diode series resistance (even taking
values from the forward I-V curve). This is most likely due to damage to the
top germanium layer during processing. The germanium sheet resistance,
measured with a four-point probe before processing began and with TLM
structures on the completed chip, increased by an order of magnitude over
the course of the device run. There was no one step in the process that was
more likely than others to cause this damage: no dry etches terminated on
the germanium, and all wet etches had well-characterized and low germanium
etch rates. Subsequent fabrication runs avoided this issue by depositing the
contact metal as early as possible in the process. Cross-bridge Kelvin (CBK)
structures for measuring p-contact resistance were also added to subsequent
mask sets. The CBK method determines the contact resistance independently from the semiconductor sheet resistance, so damage that occurs after
contact deposition does not aect the measurement results. The primary
drawbacks of the CBK method are that the structures have large footprints
(accuracy is proportional to size) and at best provide an upper bound on the
contact resistance [5].2
The small-signal bandwidth of a backside-illuminated 14 m diameter
device is shown in Figure 5.5. The bandwidth does not change noticeably
whether the detector is illuminated from the top or bottom. The 3 dB bandwidth at -2 V and larger biases is 20 GHz below 5 mA of photocurrent. The
2
An additional benet of the CBK structure is that rectifying behavior is more clear
from CBK than from TLM measurements. In a CBK measurement, the I-V curve of a
single contact is measured, so if the contact is rectifying, both the forward and reverse
diode currents are visible in the I-V data. In a TLM measurement, there are two diodes
in series, so only the reverse diode current can be measured. For the diodes studied in
this thesis, the p-contact was never rectifying, but the structure proved convenient for
debugging some of the p-contact-related issues that arose during our hybrid III-V/silicon
on silicon nitride waveguide work [6].
150
capacitance is around 90 fF, which includes a parasitic capacitance around

40 fF, and the series resistance is about 1 . Figure 5.5 (b) shows the RC and
transit-time components of the bandwidth at -3 V bias and 8 mA photocurrent. To separate the RC-limited bandwidth from the transit-time limited
bandwidth, we assumed the total frequency response was equal to the product of the RC response and transit time response, so we divided the total
response by the RC response to get the transit-time response. The RC limit
shown in the gure is taken from the S11 data using
S21 =
|ZP D Rs |
|ZL + ZP D |
(5.3)
instead of from the tted small-circuit equivalent values. The RC limit is

about 40 GHz while the transit-time limit is 30 GHz and is well-t by a singlepole frequency response with a pole at 5.5 ps. The dominant contribution to
the transit time is the response of the absorber, which implies that making
the silicon collector thicker will increase the overall bandwidth of the device
by decreasing the capacitance.
151
0
-2
Response (dB)
Response (dB)
3V
-4
1V
-6
-8
10 15 20 25
Frequency (GHz)
30
0
-5
-10
0
RC
Total
Transit time
10
20
30
Frequency (GHz)
40
Figure 5.5: Bandwidth of a 14 m diameter surface normal photodiode (a)

at 1 mA photocurrent as a function of bias voltage (b) at -3 V bias and
8 mA photocurrent with RC and transit-time contributions shown. The RC
contribution was extracted from S11 data and the transit-time contribution
was estimated by dividing the total response by the RC response.
5.3.2
Transit time
The model developed in Chapter 2 does not agree very well with the measured
result when literature values for material parameters (mobility, absorption
coecient, etc.) are used. The model predicts a transit-time limited bandwidth of 9.7 GHz for this device design, using the material parameters given
in Table 2.1 and a back surface recombination velocity s of 1 106 cm/s. Even
with a back surface recombination velocity equal to the thermal velocity, the
predicted bandwidth is 13 GHz. Varying other parameters absorber thickness, absorption coecient, high and low end doping, recombination lifetime
within reasonable bounds (i.e. a range that would not be detected by other
measurements performed on the same device) does not explain the discrepancy. The most likely problem with the model is the assumed value of the
electron mobility.
The mobility value in Table 2.1 is based on conductivity measurements of
152
n-doped germanium. In these devices, the electron mobility may be dierent.

First, charged impurity scattering may not reduce the mobility of electrons
as minority carriers to the same extent predicted by the model. Second,
strain (both tensile and compressive) is known to enhance electron mobility
in germanium, which the value in the table neglects. Third, the electrons
are not at the conduction band minimum in E-k space for the entirety of the
transit time. Photogenerated electrons initially reside in the valley, and are
scattered to the L valley in about 100 fs [7], but cooling occurs on the order
of 1 ps [8], so it is not unreasonable to think that the mobility might dier
from the expected value in these devices. Increasing the minority mobility to
6000 cm2 /V s and diusion coecient to 155 cm2 /s provides good agreement
with the measured response.
5.4
Power handling
Increasing photocurrent aects both the large-signal and small-signal characteristics of the photodiode by redistributing the current and electric eld
in the device. The small-signal bandwidth of the same 14 m diameter
backside-illuminated device at -3 V is shown as a function of photocurrent in
Figure 5.6. It decreases steadily from 22 GHz at 200 A to 18 GHz at 15 mA.
The decrease is primarily due to the changing impedance with increasing photocurrent; the extracted transit time response at 200 A is nearly identical
to the one at 15 mA. The line in the curve is a t the diode impedance from
S11 data and using a constant transit time of 5.5 ps. Often, UTC PDs exhibit
an increase in bandwidth at moderate photocurrents that is not evident in
Figure 5.6. This is generally attributed to a decrease in transit time due to
electron velocity overshoot in the collector [9] and the space-charge induced
153
eld in the absorber [10]. Since there is no velocity overshoot in silicon and
the absorber transit time is much longer than the collector transit time, it is
not expected that the rst eect would occur in these detectors. The second
eect, where a favorable potential drop is created by the photocurrent and
the resistivity of the absorber, on the other hand, could occur. It most likely
does, but is not noticeable because the resistivity of p-type Ge is very low
(compared to most semiconductors), which results in a low induced potential:
approximately 2 mV at 15 mA, which is much smaller than the 80 mV potential induced by the doping grade. Instead, the decrease in bandwidth is due
to increasing series resistance and capacitance caused by the space-charge
eect in the collector. Both the resistance and the capacitance increase by
about 10% as the current is increased from 200 A to 15 mA.
3dB bandwidth (GHz)
25
20
15
0
5
10
Photocurrent (mA)
15
Figure 5.6: 3 dB bandwidth in a 50 system as a function of photocurrent

for a backside-illuminated 14 m diameter surface-normal photodiode. The
bias voltage was -3 V, the measurement wavelength was 1550 nm, and the
device has the same cross-section as shown in Figure 5.1.
The large-signal compression characteristics of the backside-illuminated

154
device are shown in Figure 5.7 (a) along with theoretical curves in (b). An
80% modulation depth tone xed at 20 GHz was generated using the standard heterodyne technique with two free-running lasers at 1537 nm. The
maximum current calculated from Equation 2.46 is used to calculate the
1 dB compression current, which is shown as the upper theoretical line in
Figure 5.7 (b). For the purpose of comparison, Equation 2.47 can be used
to estimate the 1 dB compression current of a PIN detector with the same
germanium thickness and total device area. The calculated compression current for such a device at -3 V is 8 mA, which is smaller than the compression
current of the Ge/Si UTC at the same voltage, 20 mA.
At high levels of photocurrent, the measured 1 dB compression current
drops below the value predicted by the model. This is due to heating in the
device, which decreases the saturated electron velocity and thus decreases the
maximum current. The lower theoretical line in Figure 5.7 (b) includes this
eect, using the empirical t from [11] for the electron saturation velocity in
Si, measured thermal impedance of 520 C/W for electrical power dissipation,
and an estimated thermal impedance of 550 C/W for incident optical power.
As will be discussed below, most of the heating in the backside-illuminated
device is due to free-carrier absorption in the doped substrate, which implies
that better output RF power could be obtained by using a semi-insulating
substrate.
155
3V
2V
-10
1V
-20
-30
-40 -4
10
10-3
10-2
Current (A)
Compression
current (mA)
RF power (dBm)
10
10-1
30
25
20
15
10
5
0
Data
Theory
2
3
Bias voltage (V)
Figure 5.7: (a) Output RF power at 20 GHz as a function of photocurrent.

(b) 1 dB compression current as a function of bias voltage. Circles: Measured
data; Upper line: 1 dB compression current predicted by model without
thermal eects; Lower line: model with thermal eects.
5.5
Linearity
The OIP3 of a top-illuminated 80 m diameter Si/Ge UTC was measured

using the two-tone setup shown in Figure 5.8 [12]. Two lasers near 1550 nm
were modulated with Mach-zehnder intensity modulators at 995 MHz and
1 GHz with a modulation depth below 50%. The lasers were combined in
a 3 dB splitter and amplied together in an erbium-doped ber amplier
(EDFA). The photocurrent was adjusted by changing the attenuation after
the EDFA, while the RF power was adjusted by changing the modulation
depth. In principle, only one data point is necessary to obtain the OIP3,
but several were taken to ensure that the mixing products had the correct
slope (they should increase 3 dB for every 1 dB increase in fundamental
power). The illumination source was a lensed ber with a 2 m spot size.
The beam leaving the lensed ber diverges with a large angle, so that the
spot size can be adjusted by moving the ber towards and away from the
device. For the measurement, the ber position was chosen to maximize OIP3
156
without measurably aecting responsivity, so the input beam was most likely
Gaussian with a full-width half maximum around 40 m. The RF output
power at the fundamental frequencies and third-order mixing frequencies
(990 MHz and 1.005 GHz) was measured with an electrical spectrum analyzer
(and subtracting the RF cable loss). All the RF equipment used the same
10 MHz reference oscillator.
f1
I1
DC Bias
LASER 1
Coupler
MZM
T1
pol. ctrl
EDFA
VOA
DUT
Bias T
2X2
MZM
I2
LASER 2
f2
RF Output
T2
ESA
OSA
Optical
Electrical
Figure 5.8: Schematic of OIP3 measurement (courtesy Anand Ramaswamy).

Laser 1 and laser 2 were both near 1550 nm, but the beat frequency, measured
on the optical spectrum analyzer (OSA), was well outside the frequency range
of the measurement. The two RF frequencies f1 and f2 were both near 1 GHz
and 5 MHz apart. The RF signal was amplied and low-pass ltered before
being applied to the Mach-zehnder modulators in order to remove unwanted
harmonics. The RF power from the device under test was measured with an
electrical spectrum analyzer (ESA).
Figure 5.9 shows the OIP3 as a function of photocurrent at -1 V, -2 V,

and -3 V bias. The minimum photocurrent shown is 1 mA; at lower values,
the power at the intermodulation frequencies dropped below the noise oor
of the spectrum analyzer. The maximum photocurrent is dierent for each
voltage, and roughly corresponds to the onset of compression. As expected,
increasing the bias voltage increases the OIP3. The OIP3 does not have a
strong dependence on photocurrent for the range of current levels studied.
157
The maximum OIP3 at -3 V was 25 dBm.
30
3V
OIP3 (dBm)
25
2V
20
1V
15
10
5
0
4
6
Photocurrent (mA)
10
Figure 5.9: Measured OIP3 at 1 GHz of a top-side illuminated surface-normal

Si/Ge UTC with an 80 m diameter. Measurement by Haoran Li.
5.6
Thermal impedance
The thermal impedance of the Ge/Si UTC is low due to the high thermal
conductivities of Ge and Si relative to InGaAs and InP, respectively. Figure 5.10 (a) shows the simulated peak junction temperature as a function of
dissipated power for the Ge/Si UTC and a comparable InGaAs/InP device.
The simulation is performed using Comsol software. It is a 2D nite-element
model with radial symmetry. The heat source is assumed to be uniformly
distributed in the collector, and the bottom of the chip is assumed to be
held at a constant temperature by the heat sink. The thermal conductivity of silicon (at room temperature) is 1.5 W/cmK, 2.2 times higher than
the thermal conductivity of InP, 0.68 W/cmK. The thermal conductivity of
158
Ge, 0.56 W/cmK is similarly 11 times higher than the thermal conductivity of InGaAs (0.05 W/cmK), and the net eect is that the device thermal
impedance is 1.7 times lower than the thermal impedance of the comparable
III-V based device. Thermal conductivities tend to decrease with temperature, and this is taken into account in the model using the data from [13] for
Change in temperature (K)
Si and Ge, [14] for InGaAs, and [15] for InP.
40
30
T (K)
30
Si/Ge theory
InP theory
Si/Ge measurement
25
20
20
15
10
0
10
5
10
20
30
40
Dissipated power (mW)
Figure 5.10: (a) Temperature increase as a function of dissipated electrical

power for a surface-normal Si/Ge UTC and comparable III-V based device.
(b) Thermal image of a Si/Ge UTC when it is dissipating 40 mW of power.
To verify the simulation result, thermoreectance imaging [16] was used

to measure the temperature of the device under operation. A thermal image
of the device when it is dissipating 40 mW of electrical power is shown in
Figure 5.10 (b). This technique measures surface temperature by comparing
images of the device when it is dissipating a large amount of power to images
taken when it is dissipating a very small (typically 10 W) amount of power.
The change in temperature, T , is linearly proportional to the change in
surface reectivity, R:
T =
R
Cth R
(5.4)
where R is the reectivity when the device is o and Cth is the thermore159
ectance coecient. At 530 nm, the wavelength of the illumination source

used in this experiment, the thermoreectance coecient is -2.5e-4 for gold
and -1.6e-4 for germanium. These values were measured by changing the
entire die temperature by a known amount using a Peltier cooler and a microthermocouple and comparing the hot and cold images. To change the
amount of power dissipated by the device during the thermal impedance
measurement, the optical input was held constant while the bias voltage was
pulsed. The measured detector surface temperature is shown along with the
theoretical line in Figure 5.10 (a). Though the simulation result shown is for
maximum temperature rather than surface temperature, these were always
within 0.2 K in the simulation. The temperatures predicted by the model
are well within the margin of error of the experiment.
Because the laser was on for both the high-power and low-power images,
heating due to optical absorption in the substrate does not appear in the
images. This heating was measured by moving the ber far from the device
and pulsing the optical input rather than the voltage, and is typically larger
than the heating due to normal device operation. For example, when the
device is dissipating 5 mW of power (1.5 mA photocurrent and 3.3 V bias),
the total temperature rise is 16 K, but 13.5K can be attributed to heat
generation in the substrate. The eect of substrate heating is also evident
in Figure 5.7 (b), as the 1 dB compression current falls below the predicted
value at higher powers.
5.7
Conclusions
This chapter presented a Si/Ge uni-traveling carrier photodetector designed

for high-power operation. The models developed in previous chapters were
160
shown to mostly be accurate. Notably, the bandwidth model under-estimated

the transit-time limited bandwidth to a large extent; this could be accounted
for by an increase in electron mobility relative to literature values. The responsivity at 1550 nm was 0.12 A/W and the absorber transit time played
an important role in determining the overall bandwidth of 20 GHz, implying
that a waveguide design would be preferable for operation at higher frequencies. The UTC design increased the saturation current at a given voltage
by allowing for a thin intrinsic region without compromising on responsivity
(germanium thickness). The thermal impedance of the device was low relative to comparable InP-based designs, and overall it showed promise for use
in high-power applications.
161
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T. Ishibashi, High-speed and high-output InP-InGaAs unitravelingcarrier photodiodes, IEEE Journal of Selected Topics in Quantum Electronics, vol. 10, no. 4, pp. 709 727, Aug. 2004.
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?JEP/130/041101/1
164
http://link.aip.org/link/
Chapter 6
Waveguide UTCs
For use in a coherent receiver, a photodiode needs a bandwidth in excess of
20 GHz and linear operation up to about 2 mA. The surface-normal devices
discussed in the previous chapter had better power handling capabilities than
necessary for this application, but increasing the bandwidth would require
a further reduction in responsivity. This chapter describes the design and
performance of two generations of waveguide-integrated Si/Ge UTC.
The general trend in Si/Ge photodiodes in literature has also moved away
from surface-normal designs and toward waveguide ones, and for similar reasons. Figure 6.1 shows demonstrated bandwidth as a function of eciency
for several published devices. The lower-eciency surface-normal photodiodes tended to lie on a curve of constant bandwidth-eciency product around
1 GHz [14]. Relatively high-eciency surface-normal photodetectors showed
better performance, achieving the theoretical maximum bandwidth-eciency
product of 10 GHz, but this required very thick absorbing regions and such
designs were transit-time limited to about a 15 GHz bandwidth [57]. It
soon became clear that the bandwidth-eciency product limit for surfacenormal germanium photodiodes is not very large, which ignited interest in
165
waveguide-coupled designs.
80
Bandwidth (GHz)
(u)
60
(a)
40
(n)
(b)
Gen. 2
(c)
(d)
(l)
(t)
(o)
(s)
(j)
20
0
0
(k)
(i)
(f)
(e)
0.25
0.5
Efficiency
(r)
(q) (m)
(f)
(p) (h) (g)
0.75
Gen 1
(1310)
Butt-coupled
MSM
Evanescent
Surface-normal
This work
Figure 6.1: Bandwidth-eciency trade-os for germanium-based photodiodes in literature. Eciency is measured at 1550 nm unless otherwise indicated. The bandwidth plotted is the electrical bandwidth, which in some
cases needed to be modied from the value quoted in the reference. a: [4] b: [1]
c: [8] d: [2] e: [3] f: [7] g: [5] (from pulsed measurement
- f3dB = 0.312F W HM
[9]) h: [6]
(divided optical bandwidth by 3) i: [10] (divided optical bandwidth by 3) j: [11] k: [12] l: [13, 14] m: [15] n: [16] o: [17] (from pulsed
measurement - f3dB = 0.312F W HM ) p: [18] (1520 nm) q: [19] r: [20] s: [21]
t: [22] u: [23]
For evanescently coupled germanium photodetectors designed for fast

coupling from the input waveguide to the detector, there are certain optimum germanium thicknesses. In practice, it may be dicult to achieve a
nal germanium thickness that is near the optimum value because the thickness is most often determined by a chemical mechanical polishing (CMP) step
rather than the epitaxial growth. Nonetheless, several notable evanescently
coupled photodiodes have been reported. Two Intel NIP photodiodes [11] had
responsivities of 0.89 A/W and 1.16 A/W at 1550 nm and electrical bandwidths of 26 GHz and 24.1 GHz. A Luxtera device performed similarly, with
166
a responsivity of 0.85 A/W and bandwidth of 26 GHz [10]. Finally, the IME
foundry oers photodetectors with a 20 GHz bandwidth and 0.54 A/W responsivity through OpSIS [13, 14], and recently demonstrated detectors with
improved responsivity and the same bandwidth using (low-eld) avalanche
multiplication [15]. It has proven dicult to increase the bandwidth of an
evanescently coupled germanium PIN beyond 30 GHz in a 50 environment
while maintaining good eciency. This is because the germanium thicknesses
optimized for rapid absorption do not necessarily correspond to thicknesses
where the RC and transit-time constants have been carefully balanced. For
a design at the 800 nm absorption peak, the transit-time limit is 33 GHz.
The 500 nm peak is somewhat more promising, as the transit-time limit is
53 GHz, but nearly parasitic-free fabrication would be necessary to achieve
this. At the thinnest peak, in principle transit-time limited operation up
to 132 GHz is possible, but the RC time constant is likely to dominate. A
detector at this thicknesses must be 30-50 m long in order to achieve high
eciency, and maintaining low capacitance at this size is challenging.
MSM detectors have been used to overcome this problem. IBM successfully integrated a germanium-based photodiode with a 38 GHz bandwidth
into a CMOS process ow, though the responsivity at 1550 nm was poor
(0.07 A/W) [24]. Chen et al. demonstrated a device with similar bandwidth
and higher (0.35 A/W) responsivity fabricated using wafer-bonding [17]. In
general, MSM devices can have lower capacitance per unit area than PIN or
UTC detectors because the depletion region only occupies a fraction of the
device area. One consequence of this is that the saturation current density
is also decreased.
Another approach to increasing the bandwidth beyond 30 GHz is to use
a butt-coupled or nearly butt-coupled approach [1923, 25]. Typically, ger167
manium growth windows at the ends of silicon waveguides are etched into
the silicon, so that only a layer of silicon much thinner than the waveguide
remains. Then germanium is grown in these windows, contacts, passivation/isolation, and probe metal are deposited. The connement factor in
the germanium for these photodiodes is nearly 100% regardless of the total
germanium thickness used. As a result, most of the light can be absorbed
by very short (less than 10 m long) devices. The disadvantage of such
ultra-compact designs comes in power handling. The mesa widths of the two
highest-speed devices reported to date were 1.3 m [22] and 350 nm [23].1
Assuming an absorption coecient of 3300 cm1 , a bias level of half the
breakdown voltage (3 and 1.5 V), and using the reported intrinsic region
thicknesses of 600 nm and 300 nm [26] in Equation 2.54, the 1 dB compression currents of these two detectors are 1 mA and 640 A, respectively. Since
this calculation assumes that the parasitic series resistance is negligible, the
compression currents of real devices are likely to be lower. Thus despite impressive performance, these detectors most likely cannot be used in coherent
systems operating at 1-2 mA of time-average photocurrent.
The uni-traveling cross-section is an alternative way to push the bandwidth of a waveguide-integrated Si/Ge photodiode beyond 30 GHz. The
germanium thickness can be chosen for optimal coupling from the silicon
waveguide without aecting the capacitance. Thus evanescently coupled devices with relatively large footprints and fast transit times can be fabricated
without sacricing RC performance. This chapter deals with two such devices. The rst generation waveguide detector had a bandwidth of 16 GHz
with 1 A/W responsivity, and the improved second generation had a bandwidth of 40 GHz with 0.5 A/W responsivity.
1
This was a lateral PIN diode, so here width means germanium thickness.
168
6.1
6.1.1
First generation
Design and fabrication
Figure 6.2 (a) shows a cross-section schematic of the rst generation of waveguide photodiode. The germanium thickness was chosen to be 400 nm for fast
coupling in the O-band and slow coupling in the C-band, where more input
optical power is available. The simulated absorption proles are shown in
Figure 6.2 (b) for the TE polarization at 1310 nm and 1550 nm. The absorber doping was nominally graded from 2 3 1019 cm3 at the p-contact
to 1 1018 cm3 at the heterojunction. This provided a large enough eld to
nearly saturate the electron velocity, and provided some leeway in case the
heterojunction trap energy was closer to the conduction band than assumed
in Chapter 3. There were two major dierences between the designed epi
and the epi as grown. First, the 100 nm of germanium closest to the heterojunction was doped closer to 1 1016 cm3 1 1017 cm3 than the design
target of 1 1018 cm3 . This is expected to induce a large barrier at the
heterointerface. Second, the absorber was not pure germanium but rather a
SiGe alloy of unknown composition. This increased the energy of the direct
bandgap and most likely decreased electron mobility.
The n-well doping was designed to minimize excess optical loss. The
simulated doping prole (shown in Figure 6.11) had a peak concentration
of 1 1018 cm3 and was greater than 1 1017 cm3 over a 200 nm thickness.
The implant was phosphorus and the dose was 5 1012 cm2 at 30 and 80 keV.
The measured sheet resistance was 4.9 k/, and the doping contributed an
estimated excess optical loss of 8 cm1 (for a total silicon waveguide thickness
of 1200 nm).
169
n+ Si
p-Ge
400 nm
i-Si
300 nm
n-well (n-)
n-metal
n+ Si
600 nm
Waveguide layer (i Si)

Buried oxide (BOX)
Substrate (Si)
mesa
optical
input
Waveguide power (a.u.)
p-metal
a)
1
0.8
0.6
1550 nm
0.4
1310 nm
0.2
c)
b)
10
Probe pads
20
30
40
Position (m)
50
Figure 6.2: (a) Cross-section schematic of the rst generation waveguide

device. The absorber doping was graded from 2 3 1019 cm3 at the pcontact to 1 1018 cm3 at the heterojunction. (b) Simulated absorption
proles at 1310 nm and 1550 nm for the TE polarization. c) Microscope
image of a 4 m x 10 m photodiode.
The collector for the rst generation was designed to have minimal capacitance while being fully depleted at 2 V (reverse) bias. The detectors were
meant to be used in coherent receivers along with a custom electronic circuit
that provided that level of bias. On-chip capacitors can be used to bias the
detectors at a dierent level from the electronics, and were included in the
nal coherent receiver layout. However, we did not have robust process for
fabricating capacitors at the time of the design of the rst generation, so the
collector was designed under the assumption that they were not available.
Figure 6.3 (a) shows the simulated minimum bias voltage necessary to saturate the electron velocity in the collector as a function of collector thickness
for dierent levels of uniform background doping ND . For a UTC with an
n-type collector under low injection,
(
Vbi + Vbias Wc
qND Wc
Emin +
2
170
)
.
(6.1)
where Emin is the minimum value of the electric eld in the collector and must
be at least 10 kV/cm for electrons in silicon to reach their saturated velocity.
The built-in voltage is about 0.4 V. The primary source of background doping
is diusion from the n-well, but since the growth temperature and time were
unknown, it was dicult to predict how much diusion would occur during
growth. The surface-normal detectors had an arsenic-doped n-side, so those
5
4
3dB frequency (GHz)
Minimum bias voltage (V)
results were not directly applicable to waveguide detector design.
ND=51016 cm-3
3
2
1
0
-1
100
ND=11016 cm-3
-3
ND=0 cm
200
300
400
500
Collector thickness (nm)
50
40
30
20
0
1018
1020
Delta doping conc. (cm-3)
Figure 6.3: (a) Minimum bias voltage necessary to deplete the collector as
a function of collector thickness for dierent levels of n-type background
doping. Positive voltages on the graph correspond to a reverse-biased diode.
(b) Simulated transit-time limited bandwidth as a function of delta doping
level. The doping layer was 10 nm thick and spaced 10 nm from the Si/Ge
interface. The collector was 300 nm total, and the absorber was 400 nm thick
total with a doping grade.
The collector for the rst generation included a delta-doping (cli) layer:
a 10 nm thick 5 1017 cm3 n-doped layer spaced 10 nm from the absorber.
The purpose of this was to facilitate transport over the heterojunction [27].
Even though the conduction band oset in the Si/Ge system is small compared to InP/InGaAs (0.05 eV), Silvaco simulations showed that including a
delta doping layer could increase the transit-time limited bandwidth without
otherwise aecting the RC characteristics. The simulated bandwidth as a
171
function of delta doping concentration is shown in Figure 6.3 (b). The simulated layer thicknesses and doping levels are the same as discussed above,
except a slightly larger (4 1018 cm3 ) n-well doping was used. Threading defects were not included in the simulation. The bandwidth was simulated for
a 4 m wide mesa biased at -2 V for low photocurrent density (2 mA/cm2 ).
The simulation program does not distinguish the transit-time limit from the
RC limit, but since the device is assumed to be 1 m long [28] and most
parasitic eects are not included, the RC pole is around 4.6 THz and should
not aect the simulation result. As the doping level increases from zero to
3.6 1018 cm3 , the transit-time limited bandwidth increases from 38 GHz
to 46 GHz. For larger levels of doping, the bandwidth collapses because the
electric eld is not large enough in the collector to saturate the electron velocity (i.e. n-side depletion region is smaller than the delta doping layer at -2 V
bias). For the simulation, the assumed background doping in the collector
was 1 1012 cm3 ; for larger background doping the maximum delta doping
will be lower. The designed delta-doping concentration of 5 1017 cm3 was
large enough to increase the transit-time limited bandwidth to 42 GHz while
still providing some tolerance for growth error and phosphorus diusion.
6.1.2
Dark current
The dark current of waveguide photodiodes is more susceptible to sidewall

recombination than that of surface-normal photodiodes because the ratio of
the perimeter to the area is larger. Because the rst generation of waveguide
photodiodes was not grown using selective epitaxy, surface-normal diodes
with the same structure could be fabricated and characterized. The area
component of the leakage current was 25 mA/cm2 at -1 V and the sidewall
component was 1 A/cm. The nal fabricated photodetector dark current
172
was dependent on device dimensions, and larger than what was predicted by
the surface-normal diode results. This indicates that it was dominated by the
sidewall leakage component, which is expected to be less consistent between
device runs than the area component. Figure 6.4 shows the measured dark
current of a 4 m x 10 m device along with the dark current predicted by
the surface-normal diodes. Although the measured dark current is higher
than the predicted dark current, at less than 1 A, it is suciently low to
not limit the signal to noise ratio in most real systems. The soft breakdown
seen in Figure 6.4 occurs slightly before half the predicted breakdown voltage
of 9 V.
Dark current (A)
0.2
0
-0.2
Area component
Measured
-0.4
-0.6
-0.8
-3
-2
-1
Voltage (V)
Figure 6.4: Measured dark current of a a 4 m x 10 m rst generation

waveguide photodiode. The area component shown was extracted from the
dark currents of many surface-normal detectors fabricated using the same
epitaxial material.
173
6.1.3
Responsivity
Figure 6.5 (a) shows the measured responsivity as a function of photodetector

length for the rst generation devices around 1310 nm. The responsivity was
measured with amplied spontaneous emission (ASE) from a semiconductor
optical amplier to avoid fabry-perot eects. The light reected from the
chip was monitored using a circulator and an optical spectrum analyzer. No
ripples were visible in the reection spectra, though the resolution of the
optical spectrum analyzer used was close to the free spectral range of the
500 m cavity formed by the input facet and the photodiode. The facet
coupling loss of 6.5 dB to a lensed ber with a 2 m spot size has been taken
into account in the data. The coupling and waveguide propagation loss at
1550 nm were measured by tting s-matrices to the transmission spectrum
of a 3 mm long fabry-perot cavity with polished facets. The coupling loss
at 1550 nm was 6 dB and the propagation loss varied from 1-3 dB/cm. The
coupling loss at 1310 nm was determined by measuring the transmission of
the same cavity with the ASE source and assuming that the magnitude of
the fabry-perot ripple was identical at both wavelengths. This convoluted
technique was necessary because a suitable tunable laser for O-band fabryperot measurements was not available and because the free spectral range
of the cavity was smaller than the resolution of a typical optical spectrum
analyzer. Polarization was controlled during both measurements, but the
responsivity and coupling loss did not appear to be polarization-dependent.
A t to the responsivity data is also shown, along with the simulated
result. The measured responsivity for short devices was lower than expected,
implying that the simulation over-estimated the coupling strength. This
could be because of the broad optical spectrum (90 nm) of the input source
174
x 109
2
Simulation
2 (cm-2)
Responsivity (A/W)
1.5
Data/fit
0.5
0
20
40
60
80
Detector length (m)
Data
1.5
1
Fit
0.5
0
0.7
0.8
0.9 1
1.1
Energy (eV)
1.2
Figure 6.5: (a) Measured and simulated responsivity of rst generation

waveguide photodiodes at 1310 nm as a function of device length. (b) Material absorption coecient as a function of photon energy.
or error in the material constants used in the simulation. Material constants

for pure germanium were used, but the absorber was most likely a SiGe
alloy. The responsivity of the same devices in the C-band was very poor.
To determine the cause, we measured the transmission of the material from
1090 nm to 1610 nm. A blank SOI wafer was used to t s-matrices to the SOI
layer stack, and the germanium absorption coecient was then calculated by
comparing the results from the blank wafer to a wafer with germanium grown
on it. The absorption coecient is shown in shown in Figure 6.5 (b) as a
function of photon energy. The large ripples in the data are due to fabryperot eects (the thin buried oxide, silicon device, and germanium layers act
as cavities). The direct band edge, extrapolated from short-wavelength data,
appears to lie at 0.91 eV rather than 0.8 eV, as it should for pure germanium.
This indicates that the absorber is not composed of germanium but rather a
Si/Ge alloy (Si0.05 Ge0.95 , based on the direct band edge [29]).
175
6.1.4
Bandwidth
Both the RC-limited bandwidth and transit-time limit aected the total frequency response of the rst generation waveguide photodiodes. The small
device areas made accurate determination of the diode impedance more challenging, which in turn made characterizing the transit time limit dicult
relative to the surface-normal detectors.
6.1.4.1
Diode impedance
Figure 6.6 shows the diode capacitance and series resistance for the rstgeneration waveguide devices at -3 V bias. Compared to the surface-normal
photodiodes, these devices were generally smaller, which led to a higher series
resistance and lower capacitance. This made an accurate determination of
the pad capacitance important. To estimate the pad capacitance, the smallcircuit equivalents of many photodiodes with dierent dimensions were found,
neglecting the eect of the pad capacitance. Then the pad capacitance was
extracted by tting a straight line to the capacitance vs. area data. Since
neglecting the pad capacitance has a small impact on capacitance error, this
is expected to be accurate. Corrected reection coecient values were generated using Equation 3.13. The process was repeated until a self-consistent
value (within 250 aF) for the pad capacitance was found. The pad capacitance estimated using this technique was 24.9 fF.
The parallel plate model for capacitance accurately describes the measured diode capacitance when the nominal collector thickness of 300 nm is
used; the slope of the line is 345 aF/m2 . This is somewhat surprising, as
the rst 100 nm of the germanium absorber were doped at a very low level
( 1 1016 cm3 ). In the absence of threading defects, this would cause the
176
parallel plate model to over-estimate the capacitance substantially. However,

since the threading defects act as acceptors, only the collector is depleted at
this bias voltage. Because the n-well is lightly doped, further increasing
the bias voltage up to the soft breakdown of around 5 V did not result in
1000
300
800
250
Capacitance (fF)
punch-through like behavior (a sudden drop in capacitance).
600
400
200
0
0
100
200
PD length (m)
200
150
100
50
0
0
300
4 m mesa
6 m mesa
8 m mesa
100
200
PD length (m)
300
Figure 6.6: Extracted (a) capacitance and (b) series resistance of rstgeneration waveguide photodiodes. Markers: individual data points; Lines:
ts. The eect of the 25 fF parasitic pad capacitance was removed from the
data.
The series resistance was larger for wider devices, indicating that it was
dominated by the n-well resistance. The p-contact and n-contact resistances
were both about 1 106 cm2 . The expected contribution of the p-contact
resistance to the smallest photodiode (4 m x 10 m) was 2.5 , the expected
contribution of the n-contact resistance to that device was 0.02 , and the
expected contribution of the n-side spreading resistance was 2 , which further supports the conclusion that the series resistance was dominated by the
n-well. Neglecting all other contributions to the series resistance, the resistance is 333 WPD /LPD . This is substantially smaller than the value of
817 WPD /LPD predicted by Equation 3.9 and using the measured n-well
sheet resistance of 4.9 k/, which indicates that the model is not very
177
accurate.
The RC-limited bandwidth can be determined from the diode impedance.
This is shown in Figure 6.7 assuming a 50 load and including the eect
of the pad capacitance. For the rst-generation devices, the smallest photodiodes were expected to have the best bandwidth performance, with 3 dB
bandwidths in the 30-40 GHz range.
50
RC limit (GHz)
40
30
20
10
0
500
1000
1500
2
PD area (m )
2000
Figure 6.7: RC-limited bandwidth as a function of area for rst-generation

waveguide photodiodes at -3 V bias. The data points represent real photodiodes, while the solid line is generated from ts to measured capacitance and
series resistance as a function of area. For the series resistance, the average
mesa width of 6 m is used.
6.1.4.2
Transit time
Figure 6.8 (a) shows the frequency response of a 4 m x 20 m device at 0,

1, and 2 V bias for 1310 nm input light. For higher levels of bias voltage,
the frequency response was the same as for 2 V bias. Figure 6.8 (b) shows
the contributions of the RC time constant and transit time to the total
178
bandwidth for the same device at 2 V bias. The device appears to be transittime limited with a bandwidth around 16 GHz. To separate the RC-limited
bandwidth from the transit-time limited bandwidth, we assumed the total
frequency response was equal to the product of the RC response and transit
time response. To get the RC response, we used the extracted photodiode
impedance to predict the bandwidth directly using Equation 3.17. The eect
of the pad capacitance had to be removed from the S11 data in order to
accurately determine the series resistance. The value used for the gure was
24.9 fF. Using any value of pad capacitance up to 40 fF also implied that
the device was primarily transit-time limited. For assumed pad capacitances
of 40 fF and larger, the S11 data implied that the device was RC-limited,
but the expected response was not reasonable: it had 1-2 dB gain at low
frequencies. Thus the transit-time limit may not be exactly as shown in the
gure, but the bandwidth is most likely transit-time limited.
It is not surprising that the transit time limit was lower than the simulated
value of 42 GHz. First, the alloyed composition of the absorber is expected
to decrease the electron mobility by about a factor of two [30]. Second, the
low doping of the 100 nm of the absorber closest to the heterojunction is
expected to result in a barrier height between 2 kB T and 3 kB T. This should
result in a lower transit-time limited bandwidth.
179
Response (dB)
RC limit
Transit time
-2
-4
Total
-6
-8
10
20
Frequency (GHz)
30
40
Figure 6.8: Bandwidth contributions of a 4 m x 20 m rst generation

waveguide Si/Ge uni-traveling carrier photodiode. The spike at 30 GHz is a
measurement artifact.
6.2
6.2.1
Second generation
Design and fabrication
A number of improvements were made to the second generation design based

on the rst generation results. The primary dierence is that the second
generation was grown via selective area epitaxy while the rst generation
was not. This was because we discovered that the top surface of the silicon is
attacked during germanium growth, and so the use of non-selective epitaxy
is likely to lead to large waveguide loss. Since the silicon collector was grown
180
at the same time as the germanium absorber, this aected the transition between the input waveguide and photodiode area, as illustrated in Figure 6.9.
Whereas for non-selective area growth, the absorber sits immediately on top
of the input waveguide, for selective-area growth, it is separated from the
input waveguide by the collector thickness. The eect of this is to dilute
the absorption prole. Designing at a peak in Figure 3.6 resulted in a suciently dilute absorption prole for high-power performance, so the absorber
thickness was 175 nm.
photodetector
photodetector
waveguide
optical input
optical input
First generation waveguide

photodetectors
waveguide
Second generation waveguide

photodetectors
Figure 6.9: Dierence between optical coupling schemes for waveguide UTCs
grown by selective-area and non-selective-area epitaxy.
The absorber doping was nominally graded from 2 3 1019 cm3 at the
p-contact to 1 1018 cm3 . This again provided a large enough eld to nearly
saturate the electron velocity, and provided some leeway in case the heterojunction trap energy was closer to the conduction band than assumed in
Chapter 3 or in case of an inaccurate growth calibration. Figure 6.10 (a)
shows a cross-section schematic, and Figure 6.10 (b) shows the simulated
absorption prole at 1550 nm for the TE and TM polarizations.
The n-well doping was increased from the rst to the second generation.
The n-well doping design for the rst generation was conservative from the
point of view of excess optical loss and high-risk from the point of view
181
i-Si
n+ Si
400 nm
n-well (n-)
Waveguide layer (i-Si)

Buried oxide (BOX)
Substrate (Si)
400 nm
n-metal
n+ Si
Waveguide power (a.u.)
p-Ge
p-metal
175 nm
1
Probe pads
0.8
Mesa
0.6
0.4
0.2
00
TM
optical input
TE
20
40
60
80
Position (m)
100
Figure 6.10: (a) Cross-section schematic of the second generation waveguide device. The absorber doping was graded from 2 3 1019 cm3 at
the p-contact to 1 1018 cm3 at the heterojunction. (b) Simulated absorption proles 1550 nm for both polarizations. Inset: microscope image of a
4 m x 40 m photodiode.
of series resistance. Since these photodiodes had high quantum eciency

and high series resistance, the n-well doping was doubled in both level and
thickness for the second generation. The implant doses were 2 1013 cm2
and 7 1013 cm2 at 70 and 130 keV. Figure 6.11 shows the simulated n-well
doping proles for both generations after the activation anneal. The second
generation prole appears more uniform than the rst generation because
it was annealed at 1050 C instead of 900 C. This was not for any reason
related to the n-well, since to rst order both the excess optical loss and the
series resistance do not have a large dependence on the dopant distribution.
Rather, the second generation underwent a three-hour 1050 C anneal before
germanium growth in order to remove impurities from the silicon dioxide
used as a growth mask. The increased n-well doping relative to the rst
generation resulted in a 4x reduction in sheet resistance to 1.2 k/ and a
corresponding estimated 4x increase in optical loss to 33 cm1 (for a total
silicon waveguide thickness of 800 nm).
The collector thickness was increased from 300 nm to 400 nm for the sec182
Active Phosphorus (cm-3)
1019
Gen 2
1018
Gen 1
1017
1016
1015
100
200
300
Distance from surface (nm)
400
Figure 6.11: Simulated n-well doping levels for rst and second generation
waveguide devices.
ond generation waveguide device. This was done to increase the RC-limited
bandwidth. As with the rst generation of device, the second generation was
designed to provide 1-2 mA to an electronic circuit that could provide 2 V
of bias. However, at the time the second generation was designed, we had a
robust process for integrating bias capacitors on-chip, so we could aord to
build a device that required higher bias voltage for good performance. The
delta-doping layer was not included in the second generation of waveguide
devices because there is a moderate risk associated with it and because good
agreement between the designed doping proles and received doping proles
had up until that point been elusive.
6.2.2
Dark current
Determining the source of the leakage current was more dicult for the
second generation of waveguide photodetectors than for the rst generation.
183
A number of devices were shunted by a large resistance (> 5 k) in the probe

metal layer. Since only a single metal layer was used, and since the series
resistance is inversely proportional to the spacing between the mesa and the
n-contact, the probe metal layout was intentionally high-risk and therefore
prone to such issues. A number of devices had low dark current despite
this. The dark current of one representative 3 m x 50 m device is shown
in Figure 6.12. To determine the source of the dark current, we measured
the leakage current as a function of temperature. For devices with low dark
current, we obtained curves similar to those shown in Figure 3.26, with trap
energies between 0.2 and 0.4 eV from -1 to -5 V. For devices with large dark
current, the dark current displayed no clear temperature dependence, which
conrms that it is most likely due to the mask layout (i.e. not related to a
generation/recombination center). As with the surface-normal detectors and
rst generation of waveguide devices, the soft breakdown seen in Figure 6.12
occurs slightly before half the predicted breakdown voltage of 12 V.
184
Current (A)
0.5
-0.5
-1
-5
-4
-3
-2
Voltage (V)
-1
Figure 6.12: Measured dark current of a representative 3m x 50m second

generation waveguide photodiode.
6.2.3
Responsivity
Figure 6.13 (a) shows the responsivity as a function of photodiode length at

1550 nm for the second generation of devices at 1 V bias. The gure also
shows a t to the data. Since the input waveguide was 400 nm tall, rather
than 900 nm, the coupling loss was substantially higher, 11 dB. For very
long devices, neglecting free-carrier absorption and metal loss, the simulated
quantum eciency for very long devices was 93%, which is about twice the
measured quantum eciency. This is partially due to the limited collection eciency of the detector. Figure 6.13 (b) shows the responsivity of a
3 m x 90 m detector at 1550 nm as a function of voltage. The responsivity increases from 0.55 A/W at 1 V bias to 0.7 A/W at 5 V. This is most
likely because the absorber exit velocity is a function of the bias voltage.
The remaining 2 dB dierence between simulation and experiment is most
likely due to excess modal loss (e.g. metal loss) or an under-estimate of the
185
0.8
Responsivity (A/W)
Responsivity (A/W)
coupling loss.
0.6
0.4
0.2
0
0
20
40 60 80
Length (m)
100
1.2
1
0.8
0.6
0.4
0.2
0
-5
-4
-3
-2
-1
Voltage (V)
Figure 6.13: (a) Responsivity at 1550 nm as a function of photodiode length

for second generation devices at 1 V bias. (b) Responsivity of a 3 m x 90 m
device as a function of bias voltage.
Figure 6.14 shows the responsivity of a typical 30 m long device at 1 V

bias as a function of wavelength along with simulated values for the TE
and TM polarizations. The trends in wavelength and polarization roughly
agree, though the responsivity at long wavelengths rolls o more quickly than
expected. This is most likely due to inaccuracy in the material model. There
was about 1 dB of polarization dependence in the photodetector responsivity.
Since the simulation will over-estimate the quantum eciency, it has been
scaled by 0.6 to match the data.
186
0.6
Simulation - TE
Quantum efficiency
0.5
0.4
Simulation - TM
0.3
0.2
Data
0.1
0
1300
1400
1500
Wavelength (nm)
1600
Figure 6.14: Responsivity as a function of wavelength for a typical 30 m long

photodiode at 1 V bias. Simulated values assuming a collection eciency of
60% are also shown.
6.2.4
Bandwidth
6.2.4.1
Diode impedance
Figures 6.15 (a) and (b) show the extracted capacitance and series resistance
for second-generation devices at -2-5 V bias. The pad capacitance was extracted from the dataset in the same way as for the rst generation of devices
and was 16.0 fF. The parallel resistance was on average 15 k, and did not
have a strong dependence on device dimensions. The measured diode capacitance is linearly proportional to area, and the slope of the line is as expected
for photodiodes with areas larger than 200 m2 : Equation 2.24 predicts
259 aF/m2 , while the measured slope was 231 aF/m2 . This corresponds
to an additional thickness of depleted silicon of 50 nm, which is reasonable
given the n-well doping. This straight line t is shown in Figure 6.15 (a).
The extracted capacitances of small photodiodes are typically larger than
187
the straight-line t. This is most likely due to the fringe capacitance, which
is expected to be 1-2 fF for these devices [31, 32].
Capacitance (fF)
150
100
50
00
20 40 60 80
PD length (m)
100
200
3 m mesa
4 m mesa
6 m mesa
150
100
50
0
20 40 60 80
PD length (m)
100
Figure 6.15: Extracted (a) capacitance and (b) series resistance of secondgeneration waveguide photodiodes. Markers: individual data points; Lines:
ts. The eect of the 16 fF parasitic pad capacitance was removed from the
data.
The series resistance appears to be dominated by the p-contact resistance,

as narrower photodiodes have higher series resistances. In order to separate
the eect of the p-contact, n-well, and n-contact resistances, curves of the
form
(
)
1
c,p
1
1
WP D Rsh,nwell
Rs =
+
c,n Rsh,ncont + Rsh,ncont Wgap +
LP D WP D LP D 2
2
LP D
6
k1
k2
WP D
=
+
+ k3
LP D WP D LP D
LP D
(6.2)
were t to the data. Diodes with capacitances less than or equal to the pad
capacitance were neglected for the t, as the extracted series resistance of
these diodes is expected to be substantially less accurate than the extracted
series resistance of larger diodes. These curves are shown in Figure 6.15(b)
and agree well with the data for the larger diodes. The ts are the best ts
188
in the least-squares sense, which is to say they are projections onto the basis
{
1
1
WP D
,
,
LP D WP D LP D LP D
}
(6.3)
using the L2 inner product. Unfortunately, although the basis used here
has physical meaning, it is not orthogonal, which means that the contact
and sheet resistances cannot be inferred from the values of k1 , k2 , and k3 .
Figure 6.16 shows the contributions to the series resistance for the 3 m
and 6 m wide mesa devices. These values were calculated using Equations 3.53.9 and parameter values c,p = 4 105 cm2 , c,n = 1106 cm2 ,
Rsh,nwell = 1.2 k/, and Rsh,ncont = 40 /. The p-contact resistance was
higher than in previous process runs. This may have been due to damage to
the semiconductor prior to the contact metal deposition, as the sheet resistance of the germanium layer was also larger than expected. The p-contact
resistance lies nearly on top of the measured resistance for both mesa widths.
The n-well resistance is the next largest contribution, but when it is added
to the total resistance, the model no longer agrees well with the data. This is
103
102
101
100
10-1
0
most likely because the model for the n-well resistance is not very accurate.
Measured
Total
p-contact
n-well
n-contact+spreading
20 40 60 80
PD length (m)
100
103
102
101
Total
Measured
p-contact
n-well
100
10-1
0
n-contact+spreading
20 40 60 80
PD length (m)
100
Figure 6.16: Series resistance contributions for second-generation waveguide

photodiodes for (a) 3 m and (b) 6 m wide mesas.
189
The RC-limited bandwidth can be determined from the diode impedance.

This is shown in Figure 6.17 for assuming a 50 load and including the eect
of the pad capacitance. Since the p-contact resistance was dominant, there
was an optimum area of 80 m2 , corresponding to an RC-limited bandwidth
of 57 GHz. Figure 6.18 shows the measured bandwidth as a function RClimited bandwidth for the second generation of waveguide photodetector. A
straight line with a slope of 1 is also shown to guide the eye. The second
generation of waveguide photodiodes did not include large and clearly RClimited detectors, so the plot does not appear very organized. The few data
points in the 20-30 GHz range of RC-limited 3 dB frequency appear to follow
a straight line. From 40-60 GHz in RC-limited bandwidth, there are a wide
variety of measured bandwidths. The bandwidth in this region is presumably
transit-time limited, but the data imply that the growth was non-uniform.
70
RC limit (GHz)
60
50
40
30
20
0
200
400
2
PD area (m )
600
Figure 6.17: RC-limited bandwidth as a function of area for second generation photodiodes at -2, -4 and -5 V bias. The data points represent real
photodiodes, while the solid line is generated from ts to measured capacitance and series resistance as a function of area. For the series resistance,
the average mesa width of 4.3 m is used.
190
Measured 3dB frequency (GHz)
50
40
30
20
10
0
20
40
RC limit (GHz)
60
Figure 6.18: Measured 3 dB frequency as a function of RC-limited frequency

for second-generation waveguide photodiodes.
6.2.4.2
Transit time
To separate the RC-limited bandwidth from the transit-time limited bandwidth, we assumed the total frequency response was equal to the product
of the RC response and transit time response. To get the RC response,
we used the extracted photodiode impedance to predict the bandwidth directly using Equation 3.17. Figure 6.19 shows the total frequency response
of a 3 m x 50 m second generation device, along with the RC limit and
transit-time component. The RC limited 3 dB frequency is 67 GHz, but the
measured 3 dB frequency is 32 GHz. The RC limited frequency quoted here is
slightly higher than what is shown in Figure 6.17 because the raw impedance
data was used rather than f3dB = 1/2RC. The measured transit-time limited response has its 3 dB point around 40 GHz, which is substantially lower
than the 60 GHz predicted by the drift-diusion model developed in Chap-
191
ter 2 (using a conservative value of the back surface recombination velocity

s=0). The 16 fF pad capacitance was taken into account in this calculation; it is worth noting that assuming any pad capacitance between 0 fF and
25 fF will yield the conclusion that the photodetector is transit-time limited and that the transit time limit is between 40 and 50 GHz. For larger
assumed values of pad capacitance, the extracted diode capacitance drops
below 10 fF, which is 1/3 of the value predicted by the simple parallel plate
model. Therefore, despite the inherent drawbacks of the curve tting process, it is safe to conclude that the bandwidth is transit-time limited and the
transit time limit is between 40 GHz and 50 GHz. The discrepancy between
the model and the measurement result is most likely due to a reduction in
either exit velocity or electron mobility, relative to literature values and the
results from surface-normal detectors.
Response (dB)
0
-2
RC
Transit-time
Total response
-4
-6
-8
0
10
20
30
Frequency (GHz)
40
50
Figure 6.19: Bandwidth of a 3 m x 50 m second generation waveguide

photodiode at -5 V bias. The transit-time and RC components are also
shown. The slight bump around 15 GHz is a measurement artifact.
192
6.2.4.3
Voltage dependence
The measured 3 dB bandwidth of the second generation of photodiodes displayed a large voltage dependence, but the impedance did not. Figure 6.20
(a) and (b) show the frequency responses of the two best measured detectors
at -2, -4, and -5 V bias. For the device in Figure 6.20 (a), the mesa was
4 m x 13 m, and the overall layout was slightly dierent from the standard design on the mask, so it is omitted from Figures 6.15 and 6.18. At
-5 V bias, the -3 dB frequency is 40 GHz. The frequency response decreases
almost linearly from DC to 40 GHz, at which point the slope increases. The
RC limit of this device is dicult to determine due to the non-standard
pad layout (it has a dierent parasitic capacitance), but it should be around
40 GHz, which may explain the relatively rapid roll-o beyond this frequency.
For the device in Figure 6.20 (b), the mesa was 3 m x 90 m and the -3 dB
frequency at -5 V bias was 36 GHz. The RC limit at -2 V was approximately
50 GHz. As with the 4 m x 13 m device, the 3 dB frequency increases with
increasing applied bias voltage. The electron velocity in the collector should
saturate at a eld of 10 kV/cm, which corresponds to a bias level around
0.5 V, so collector transport most likely does not dominate the transit-time
limited bandwidth. The voltage dependence instead indicates that the heterojunction is dominant. Carrier mobility in the absorber may be poor, but
the electric eld, and hence the electron velocity, in the absorber should not
change as a function of bias voltage.
Figure 6.21 (a) shows the simulated (in Silvaco) transit-time limited frequency response of the photodiode at -2 V bias for several dierent heterojunction barrier heights. In the simulation, the barrier height is implemented
as a conduction band oset, though in a real device it would be a combina-
193
-2
Response (dB)
Response (dB)
2
5V
2V
-4
-6
-8
0
2V
-4
-6
-8
20
40
60
Frequency (GHz)
5V
-2
20
40
60
Frequency (GHz)
Figure 6.20: Bandwidths of (a) a 4 m x 13 m and (b) a 3 m x 90 m

second generation device at -2, -4, and -5 V bias. The responsivity of of the
shorter device at 1550 nm was about 0.25 A/W and the responsivity of the
longer device was about 0.5 A/W.
tion of the band oset, local doping, and threading defect density. As expected, increasing the heterojunction barrier height decreases the frequency
response. The simulated bandwidth for a given barrier height is about the
same regardless of the origin of the barrier. Figure 6.21 (b) shows the simulated 3 dB frequency as a function of bias voltage for the same heterojunction
barrier heights. For zero barrier, there is very little voltage dependence of the
transit-time limited bandwidth, but even for small barriers there is a strong
dependence. The simulation shows the bandwidth does not have a strong
voltage dependence if the barrier is from occupied threading defect states
rather than the conduction band oset. This implies that transport over the
conduction band oset is the primary limitation to frequency response in
these devices.
194
-2
0 eV
-4
0.05 eV
-6
0.1 eV
-8
-10
0.15 eV
20 40 60 80
Frequency (GHz)
100
Response (dB)
80
0 eV
0.05 eV
60
0.1 eV
40
0.15 eV
20
0
2
3
4
Bias voltage (V)
Figure 6.21: (a) Simulated transit-time limited frequency response for different heterojunction barrier heights. (b) Voltage dependence of the transittime limited frequency for dierent heterojunction barrier heights.
6.2.5
Power Handling
The large-signal compression characteristics of the 40 GHz 4 m x 13 m

and the 36 GHz 3 m x 90 m devices discussed above are shown in Figure 6.22 (a) and (b), respectively. An 80% modulation depth tone xed at
30 GHz was generated using the standard heterodyne technique with two
free-running lasers at 1537 nm. The RF power was measured on an electrical spectrum analyzer. The loss of the cables was measured with a network
analyzer and subtracted from the data. In both cases, the -1 dB compression current is around 2 mA, which corresponds to an output power around
-20 dBm. However, the larger device has larger maximum output power since
the output power continues to increase after the 1 dB compression current
is reached. This is because the back of the device continues to operate in
the linear regime even when the front of the device is compressed, whereas
for the shorter device, the current is more uniformly distributed. This leads
to a sharp decrease in output power beyond the 1 dB compression current
for the shorter device, in contrast to a slow increase in output power for the
195
longer one. The maximum output power of the 4 m x 13 m detector is
-10
5V
-20
3V
-30
-40
-50 -5
10
Output power (dBm)
Output power (dBm)
-21.4 dBm, while it is -11.7 dBm for the longer one.
1V
10-4
10-3
Photocurrent (A)
10-2
-10
-20
-30
5V
3V
1V
-40
-50
10-5
10-4
10-3
Photocurrent (A)
10-2
Figure 6.22: Output power at 30 GHz as a function of photocurrent for (a)

a 4 m x 13 m and (b) a 3 m x 90 m detector.
The analysis presented in Chapter 2 assumed that a photodiode will enter

compression when the electric eld in the intrinsic region reaches a minimum
critical value, Ec , that is the same regardless of bias voltage. This assumption
is valid if the bandwidth has a weak dependence on bias voltage, because
then electric eld collapse in the intrinsic region will limit the maximum
current density. However, if the bandwidth is a function of bias voltage, the
1 dB compression current may be the current where the voltage drop across
the device is large enough to increase the RF attenuation at the operating
frequency by 1 dB rather than a point near total collapse of the eld in the
intrinsic region. Figure 6.23 shows the RF attenuation of the 4 m x 13 m
photodetector at 20 GHz, 30 GHz, and 40 GHz taken from small-signal
bandwidth measurements at low photocurrent. The attenuation decreases
almost linearly with applied voltage at all frequencies. This, rather than
eld collapse, limits the voltage swing the device can sustain. At 40 GHz
and -4 V bias, for example, the RF attenuation will increase by 1 dB for an
196
0.4 V drop across the device, so that the expected minimum voltage is -3.6 V
rather than the 0.3 V predicted by Equation 2.54. Since the attenuation is
roughly a linear function of bias voltage, the dierence between the minimum
voltage and the bias voltage is expected to be constant. The voltage swing
the device can sustain without a compressed output is also expected to be
independent of bias voltage, in contrast to the behavior expected of eld
collapse limited devices.
RF attenuation (dB)
5
4
40 GHz
30 GHz
20 GHz
2
1
0
2
4
Bias Voltage (V)
Figure 6.23: Small-signal and low-photocurrent RF attenuation as a function

of bias voltage for the 4 m x 13 m second generation waveguide UTC at
20 GHz, 30 GHz, and 40 GHz. The lines are ts to guide the eye.
Figure 6.24 shows the 1 dB compression current as a function of bias

voltage for both devices at dierent operating frequencies. The 1 dB compression current is nearly independent of applied voltage. This is because
as the bias voltage is increased, the minimum voltage necessary for the RF
attenuation to be within 1 dB of its low-current value also increases. There
is also very little dependence on frequency, most likely because the slopes
of the lines shown in Figure 6.23 also have very little frequency dependence.
197
These results indicate that the most eective way to improve the compression characteristics of the devices will be to decrease the voltage dependence
of the bandwidth. This can most likely be achieved through more careful
4x13
3
2.5
2
1 dB compresion current (mA)
1 dB compresion current (mA)
band-engineering of the heterojunction.
40 GHz
30 GHz
20 GHz
1.5
1
0.5
0
0
4
Voltage (V)
3x90
3
2.5
2
1.5
1
30 GHz
25 GHz
20 GHz
0.5
0
0
4
Voltage (V)
Figure 6.24: 1 dB compression currents as a function of voltage and frequency

for (a) a 4 m x 13 m and (b) a 3 m x 90 m detector.
6.3
Conclusions
This chapter described the two generations of waveguide photodiode fabricated. The rst generation of device had near unity quantum eciency at
1310 nm and bandwidths up to 16 GHz. Second generation devices suered
from a high p-contact resistance, but were nevertheless able to achieve bandwidths in excess of 30 GHz with moderate quantum eciency. They are
strong candidates for use in digital coherent systems.
198
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203
Chapter 7
Coherent Receivers
To demonstrate the suitability of Si/Ge UTC photodiodes for use in coherent communications, we fabricated and tested coherent receiver photonic
integrated circuits (PICs). The coherent receivers consisted of a 90 optical
hybrid and four single-ended photodiodes. Micrographs of the completed
receivers are shown in Figure 7.1.
Figure 7.1: Fabricated (a) rst generation and (b) second generation coherent
receivers. In both cases, the optical input is on the left and the signal output
is on the right. The extra pads at left control the thermal phase tuners.
The rst generation PIC contains extra pads for bias circuitry in the lower
right-hand corner.
204
7.1
Receiver design and fabrication
The 90 optical hybrids in this work consisted of two pairs of 2x2 multimode
interferometers (MMIs), thermal phase tuning sections, and a waveguide
crossing. A schematic is shown in Figure 7.2. Alternatively, a single 2x4
MMI could be used (in conjunction with a single waveguide crossing). This
less-compact and tunable approach was chosen because it was more tolerant
to fabrication and design errors. For operation as a receiver, only one phase
tuner is necessary and it can be placed on any arm of the hybrid. Four were
included to improve yield.
I+
Es
2x2
L cros
2x2
Q+
ELO
2x2
I-
2x2
Q-
Lthrough
Figure 7.2: Diagram of fabricated coherent receivers.
7.1.1
Waveguide routing
The silicon layer thicknesses for the rst and second generation were 900 nm
and 400 nm, respectively. It is virtually guaranteed that any waveguide used
with these silicon layer thicknesses will support multiple modes. For the
thicker silicon, a very shallow etch depth of 200 nm would allow for singlemode operation for waveguides 1.5 and narrower. For the thinner silicon,
single-mode operation would require an 80 nm etch depth and a waveguide
700 nm or narrower [1], which is near the resolution limit of the i-line stepper
used. Even if the waveguides did not support higher-order lateral modes, they
205
would still support the fundamental modes of both polarizations. Obviously,

at the photodetector, the polarizations of the local oscillator and input signal
must be aligned to each other in order for the detectors to detect any coherent
signal. It is less obvious whether or not it is important for the polarization
to be aligned to the waveguide (i.e. pure TE or TM).
For an ideal hybrid biased at quadrature with a single mode only, at the
outputs of the in-phase channel, the electric elds can be written as
1
(Es + jELO )
2
1
= (jEs + ELO ) .
2
Eout+ =
Eout
(7.1)
If there is a second mode present in the hybrid with a dierent propagation

constant, then the output elds will be
1
Eout+,1 = c1 (Es + jELO )
2
)
1 ( jLthrough
Eout+,2 = c2 Es e
+ jELO ejLcross
2
1
Eout,1 = c1 (jEs + ELO )
2
)
1(
Eout,2 = c2 jEs ejLthrough + ELO ejLcross
2
(7.2)
where E1,2 refer to the electric elds in modes 1 and 2, is the dierence
in propagation constants between modes 1 and 2, c1 and c2 are the fractions
of the total electric elds in modes 1 and 2, and the lengths are as labeled in
Figure 7.2. Assuming that the fraction of the signal eld in mode 1 is equal
to the fraction of the local oscillator eld in the same mode is akin to saying
the polarizations are aligned. If the two modes are orthogonal, the output
206
photocurrents will be
Iout+ =Re (Eout+,1 )2 + Re (Eout+,2 )2
(
c2 (
))2
= 1 cos(s t + s ) + cos LO t +
4
2
(
))2
2 (
c2
cos(s t + s + Lthrough ) + cos LO t + + Lcross

+
4
2
c21
c22
= sin (s ) + sin (s + (Lthrough Lcross ))
4
4
c21
c2
Iout = sin (s ) 2 sin (s + (Lthrough Lcross ))
4
4
(7.3)
where s is the signal phase, it has been assumed that the optical frequencies
s and LO are equal, and non-interfering and 2 terms have been ignored.
If the hybrid is path-length matched, Lcross = Lthrough , and multi-mode behavior will not have an impact on hybrid performance. Since in practice
the /2 phase shift between the I and Q channels is eected with a thermal
phase tuner, the optimum bias points for TE and TM inputs are likely to be
slightly dierent, so a small phase error is unavoidable if the input is neither
pure TE nor TM.
This analysis is equally valid for waveguides supporting multiple spatial
modes as well as the two fundamental polarization modes. If higher-order
spatial modes are excited in a systematic and symmetric way, e.g. by the
MMIs, and the hybrid is path-length matched, then performance will not
be aected by multimode behavior to rst order. There will be some phase
error due to the eciency of the phase tuner being dierent for the dierent
modes, but it is not expected to be dramatic. If the higher-order modes are
excited in a non-symmetric way, e.g. at the input, then the assumption that
equal fractions of the LO and signal eld are in each mode will no longer
be valid. In that case, multimode behavior will result in signal loss beyond
207
what is expected given the propagation loss of the hybrid.

The waveguides for both hybrids were 2 m wide. As noted above, these
waveguides supported higher-order spatial modes, which can result in excess
signal loss. Narrower waveguides fabricated by others using a similar process
typically had larger propagation losses than these wider waveguides, most
likely due to increased modal overlap with the rough sidewall. Narrower
waveguides also usually require a long lateral taper to a wider waveguide
at the input facet for acceptable coupling loss. These tapers are dicult to
design and can excite higher-order modes if not long enough [2]. In essence,
the design trade-o involved in choosing a waveguide width was between
two kinds of poorly-quantied loss. The 2 m waveguides were a convenient
choice because they were compatible with suciently compact MMIs and
bends and did not require long lateral tapers between the hybrid and input
facet.
2 m
2 m
900 nm
800 nm
400 nm
200 nm
Figure 7.3: Cross-sections of the routing waveguides used for (a) rst generation and (b) second generation coherent receivers.
Figure 7.3 shows cross-sections of the two dierent routing waveguides

used. For the rst generation, the etch depth in the vicinity of the photodetectors had to be equal to the collector thickness of 300 nm due to the use
of non-selective area growth. However, this would have resulted in a large
minimum bend radius. To decrease the bend radius in the hybrid area, a
second etch depth of 800 nm was used. This depth was chosen for reasons of
fabrication tolerance. More deeply etched MMIs tended to have larger sim208
ulated tolerance to variations in width and etch depth. Etching all the way
through the silicon layer would leave the buried oxide exposed for most of
the process, so a 100 nm layer of silicon was left at the bottoms of the waveguide trenches. For the second generation, the rib was etched halfway into
the silicon. A crossing angle of 70 was used for both generations of optical
hybrid. This angle had previously been used to demonstrate low crosstalk
and low-loss crossings [3] in silicon waveguides, relative to 90 crossings. The
minimum bend radius used was x for the rst generation and y for the second.
These are conservative values they were chosen to minimize the excitation
of higher-order modes at straight-bend transitions while maintaining an acceptably low footprint.
7.1.2
MMI design
In the rst generation of receiver, generalized interference MMI couplers

were used. For the second generation, we switched to paired interference
MMIs for better fabrication tolerance [4]. Figure 7.4 shows the simulated
fabrication tolerances for nal designs for both generations of receiver. The
rst generation were designed at 1310 nm because the photodetectors had
poor eciency in the C-band, and were 6 m wide and 191.3 m long. The
second generation were designed to operate at 1550 nm. They were 9 m
wide and 117.5 m long. For both sets of MMIs, the inputs were 2 m wide
waveguides with 3 m spacing between the inputs (center-to-center). The
waveguide lithography and etch process was carefully calibrated so that the
nal MMI width was within 20 nm of the width on the mask. The etch depth
was more dicult to control, but was within 50 nm of the target for both
generations.
The excess loss for nal devices was not characterized. The measured
209
Excess loss (dB)
Excess loss (dB)
-0.5
-1
-1.5
-2
-2.5
-400
-200
0
200 400
MMI width error (nm)
0
-0.5
-1
-1.5
-2
-2.5
-400
-200
0
200 400
MMI width error (nm)
Figure 7.4: MMI fabrication tolerance (in width) for (a) rst and (b) second
generation coherent receivers.
splitting ratios of nal devices were near 50% for both generations of device,
but splitting ratio is generally more robust to fabrication error than excess
loss.
7.1.3
Thermal phase tuners
The same thermal phase tuner design was used for both generations of QPSK
receiver. A waveguide cross-section is shown in Figure 7.5. The heaters were
5 m wide NiCr stripes that ran directly above the waveguides. They were
made wider than the waveguides to facilitate lifto. They were between 270
and 400 m long, and the measured resistivity of the NiCr thin lm was
close to the literature value of 1 106 m, so the nal resistances were
in the 100s of . The heater was separated vertically from the waveguide
by a 500 nm SiO2 spacer layer that covered the entire chip. The minimum
simulated spacing was 400 nm.
210
5 m
75 nm NiCr
500 nm
SiO2
Rib WG
2 m
Figure 7.5: Thermal phase tuner cross-section schematic. The heaters were
5 m wide and 75 nm thick NiCr strips. The vertical spacing between the
heater and the waveguide was 500 nm.
7.1.4
Capacitors
Figure 7.6 shows the bias circuit used to interface the rst generation of PIC
with an electronic circuit. The purpose of the integrated bias circuit was
to allow for tuning of the photodiode bias without aecting the electronics.
The p-sides of the diodes were connected with short (25 m) lines to pads
suitable for wirebonding to the electronics. The n-sides were connected to
the same set of pads via a bias capacitor. Between the n-sides of the diodes
and the bias capacitors, 50 transmission lines to an additional set of pads
where bias could be applied were connected. The bias was supplied with an
RF probe and an o-chip bias tee.
Bias
50
PD
Cbias
Signal
Figure 7.6: On-chip bias circuit used for rst generation of coherent receiver.
Figure 7.7 shows the simulated photodetector bandwidth as a function of

bias capacitor value. The diode impedance for the simulation was optimistic:
211
15 fF diode capacitance and 50 series resistance. The capacitor must be

larger than 1 pF to not aect the bandwidth. The low-frequency response is
surprisingly insensitive to capacitance values, with low-frequency cut-os in
the kHz range for all capacitances simulated. To get a high enough capacitance, the capacitor area can be made large or the insulator can be made
thin. PECVD Si3 N4 lms had been used for this purpose in the past [5],
but thin lms (100-200 nm) were known to suer from high leakage current
due to pinholes. Instead, we took advantage of the newly installed atomic
layer deposition system, which is capable of depositing pinhole-free SiO2 lms
down to a few nm in thickness. The breakdown eld of SiO2 ranges from 1
to 10 MV/cm, so we chose a silicon dioxide thickness of 20 nm to be able to
apply up to 2 V bias without breaking down the oxide (for the worst-case
lm quality). Since the electronics already provided 2 V bias, this would
have allowed up to 4 V bias to be applied to the photodiode. For ease of
integration with the rest of the process, the capacitors were metal-insulatorsemiconductor, with the p-germanium forming the bottom contact.
Figure 7.8 shows the C-V and I-V characteristics of the nished MIS
capacitors. The negative terminal is the metal side of the capacitor, which
was attached to the n-side of the diode. To increase the bias beyond the
2 V provided by the electronics, the applied voltage would be negative. The
C-V curves were measured at 1 MHz, and have a typical high-frequency MIS
shape with threshold voltage between 0.3 and 0.4 V, which is expected for a
titanium contact on germanium. The area of the capacitor was 23840 m2 ,
which implies the capacitance should be about 2x larger than the measured
value (in accumulation). Nevertheless, the capacitance is high enough to not
aect photodetector performance. The I-V curve was measured at 10 Hz.
Although the leakage current is large, the capacitor is not ohmic, implying
212
Response (dB)
-1
-2
-3
C: 100fF, 1pF, 10 pF, 1F
-4
-5
-6
0
10
20
30
40 50 60 70
Frequency (GHz)
80
90
100
Figure 7.7: Simulated detector bandwidth for dierent values of bias capacitance.
that the cause is not leakage through pinholes.
Leakage current (A)
Capacitance (pF)
20
15
10
5
0
-2
-1
0
1
Voltage (V)
600
400
200
0
-200
-2
-1
0
1
Voltage (V)
Figure 7.8: (a) C-V and (b) I-V characteristics of integrated bias capacitors.
7.2
Hybrid characterization
The hybrids were characterized using the setup shown in Figure 7.9. The
output of a single laser was split by a 2x2 coupler and the optical frequency
213
was shifted by an acousto-optic modulator or phase modulator. The signal

was re-combined in the optical hybrid, while the phase of one of the phase
tuning sections was adjusted. The self-heterodyne signal from each photodiode then had a frequency determined by the AOM or phase modulator and
a phase determined by the thermal phase tuner and path-length uctuations
between the two arms. The path-length uctuations from the ber arms were
large enough so that the beat tone from the photodiodes had a rapidly uctuating phase relative to the signal source. Relative to each other, the phase
dierence between the RF outputs of dierent photodiodes was xed and determined by the hybrid bias condition. The RF output of the I- channel was
delayed by a quarter wavelength in RF frequency; this usually corresponded
to about 8 inches of SMA cable at the 100 MHz test frequency. The output
of the I- channel was then added to the output of the Q+ channel in the RF
domain by a phase-preserving power combiner. When the hybrid is biased
at quadrature, the RF tones in the I- and Q+ photodiodes should be 90 out
of phase. At the RF power combiner, they will either be in-phase or 180
out of phase, so the optimum bias point of the hybrid corresponds to either a
maximum or a minimum in the nal spectrum. The phase tuning eciency
P of the hybrid is half the distance between two adjacent nulls or maxima.
Figure 7.10 (a) shows the measured output power of the rst generation
hybrid as a function of thermal phase tuner power around 1310 nm for two
polarization states. In both cases, the polarizations of the two inputs were
aligned to each other. One response looks much worse than the other because it is neither pure TE nor pure TM and the rst generation hybrid was
not path-length matched. The polarization-dependent loss of the hybrid was
very small, so it was dicult to get a single-polarization input. The phase
tuning eciency was 38 mW/. Figure 7.10 (b) shows the measured output
214
cos(t)
Laser
cos(t)
2x2
DUT
2x2
2x2
2x2
IQ+
2x2
ESA
cos((+)t)
AOM
Figure 7.9: Measurement setup used to characterize 90 optical hybrids. If

a phase modulator is used instead of the AOM, the bottom input to the
chip will consist of several tones spaced by . For this measurement, was
usually around 100 MHz. A xed delay between the I- and Q+ channels is
not shown.
power of the second generation hybrid as a function of phase tuner power at

1550 nm. There was polarization-dependent loss, so it was relatively easy
to align both inputs to each other and to the hybrid. The second generation hybrid was path-length matched, and showed similar characteristics
for other wavelengths, while the rst generation hybrid had optimum bias
levels at seemingly random places for dierent wavelengths. The measurement was generally noisier for the second generation, most likely because
a phase modulator was used instead of an acousto-optic frequency shifter.
Light at the original lasing wavelength beats with frequency-shifted noise at
the detectors, and this RF tone has a random phase relative to the desired
heterodyne tone. Phase modulators do not fully suppress light at the original
lasing wavelength, so this interferes with the desired signal and causes noise
in the data. It also imposes a oor on the minimum measurable extinction
ratio. The phase tuning eciency was slightly worse for the second generation, 45 mW//pi, presumably due to the lower thermo-optic coecient of
silicon at 1550 nm relative to 1310 nm. Both sets of thermal phase tuners
215
compare favorably to previous work at UCSB [6] because the heater was
place directly on top of the waveguide rather than to the side.
0
Extinction (dB)
Extinction (dB)
0
-10
-20
-30
-40
20 40 60 80 100
Heater power (mW)
-5
-10
-15
-20
50
100
150
Heater power (mW)
Figure 7.10: Hybrid phase tuning for (a) rst generation and (b) second generation coherent receivers. The two curves shown (a) correspond to dierent
input polarizations. The poor performance in the green curve is due to path
length imbalance.
7.3
Operation as a coherent receiver
To test receiver functionality, we measured eye diagrams for binary phase

shift keyed data. This test was done on the rst generation of coherent receiver at 1310 nm. Due to limitations in available lasers at this wavelength,
we used the same laser for both the local oscillator and transmitter. The
transmitter modulator was a 10 GHz LiNbO3 mach-zehnder modulator biased at a null and driven with a 5 Gb/s 231 1 pseudo-random bit sequence.
The total photocurrent was 500 A per detector. The signals from the I- and
Q+ detectors were amplied and recorded by a 40 Gs/s real-time sampling
scope. Figure 7.11 shows the resulting eye diagram. The carrier-LO phase
was recovered from a subset of the data (one sample per bit) by squaring
the complex eld. Linear interpolation was used between phase samples to
216
re-construct the eye. The eye quality factor is 4.7, which corresponds to a
bit error ratio of 1.3106 . For 5 Gb/s on-o keyed data at the same level of
photocurrent, the BER was 31011 . The degradation in performance is most
likely due to large phase error in the hybrid due to the diculty of aligning
the input signal polarization to the waveguides.
Amplitude (AU)
-1
0
10
15 20 25
Time (ns)
30
35
40
Figure 7.11: Eye diagram of rst generation coherent receiver with 5 Gb/s
BPSK data.
7.4
Conclusions
This chapter described the design and characterization of coherent receivers

based on Si/Ge UTCs. Fabrication-tolerant MMIs and ecient thermal
phase tuners were demonstrated for both generations of device, which indicates that the Si/Ge UTC fabrication process is not incompatible with
larger scale photonic integrated circuits. It was also shown that polarization
diversity, or polarization-sensitive elements, are required in practice (though
not in theory) to achieve good coherent receiver performance.
217
References
[1] J. Lousteau, D. Furniss, A. Seddon, T. Benson, A. Vukovic, and P. Sewell,
The single-mode condition for silicon-on-insulator optical rib waveguides
with large cross section, Journal of Lightwave Technology, vol. 22, no. 8,
pp. 19231929, 2004.
[2] D. Dai, Y. Tang, and J. E. Bowers, Mode conversion in
tapered submicron silicon ridge optical waveguides, Optics Express,
vol. 20, no. 12, pp. 13 42513 439, Jun. 2012. [Online]. Available:
[3] P. Sanchis, J. Galan, A. Brimont, A. Griol, J. Marti, M. A. Piqueras, and
J. Perdigues, Low-crosstalk in silicon-on-insulator waveguide crossings
with optimized-angle, in 2007 4th IEEE International Conference on
Group IV Photonics, 2007, pp. 13.
[4] L. Soldano and E. C. M. Pennings, Optical multi-mode interference
devices based on self-imaging: principles and applications, Journal of
Lightwave Technology, vol. 13, no. 4, pp. 615627, 1995.
[5] M. M. Dummer, Monolithically integrated optical transceivers for
high-speed wavelength conversion, Ph.D. dissertation, 2008. [Online].
Available: http://search.proquest.com/docview/250786470?accountid=
14522
[6] J. Doylend, M. J. R. Heck, J. Bovington, J. Peters, and J. Bowers, Freespace beam steering using silicon waveguide surface gratings, in 2011
IEEE Photonics Conference (PHO), 2011, pp. 547548.
218
Chapter 8
Summary and Future Work
8.1
8.1.1
Summary of thesis
Modeling and material characterization
Several new compact models were developed for predicting Si/Ge UTC performance. Expressions for collection eciency and transit-time limited bandwidth in the absence of a diusion blocking layer were derived in Chapter 2.
The same chapter also contained analytical expressions for the 1 dB compression current of PIN and UTC photodetectors, and it was shown that the
same model can easily be expanded numerically to accurately describe devices where non-uniform illumination and self-heating are important. Some
of the material properties required by these models were measured on alreadyfabricated photodiodes in Chapter 3. Especially for material properties that
may be a function of device geometry and growth conditions, like minority
lifetime, post-fabrication characterization techniques can be very valuable.
The models developed in early chapters were shown to be largely accurate in describing surface-normal and waveguide photodiode performance.
219
The collection eciency was close to the predicted value for the surfacenormal and rst generation waveguide devices, and dicult to separate from
the data for second generation waveguide detectors. The large-signal saturation performance of all three generations of device was also similar to
the models predictions. The transit-time limited bandwidth was generally
not well described by the model developed in Chapter 2, which is related
to minority carrier transport both in the bulk germanium and through the
absorber-collector interface. Both of these warrant further investigation.
8.1.2
Device fabrication and results
The Si/Ge photodiodes fabricated for this thesis were the rst to be fabricated in germanium at UCSB. Chapter 4 presented general principles of
process ow design for Si/Ge photodiodes that can be integrated with other
silicon photonic devices such as MMIs and thermal phase tuners. Chapters 5
and 6 described the performance of fabricated detectors. The surface-normal
detectors achieved a small-signal bandwidth of 20 GHz and large-signal compression current of 20 mA with a responsivity of 0.12 A/W at 1550 nm.
The waveguide photodiodes achieved bandwidths in excess of 30 GHz with
a responsivity of 0.5 A/W at 1550 nm. Chapter 7 described the design and
measurement of passive photonic components fabricated alongside the waveguide photodetectors. MMIs with splitting ratios near 50% and low insertion
loss were shown, as well as thermal phase tuners with 40 mW/ phase tuning
eciency. Although the presented process ow and associated recipes are capable of producing functional photonic integrated circuits, there is room for
improvement. The p-contact resistance limited the performance of the best
waveguide photodetectors, and was higher than is expected for this material
system.
220
8.2
Future work
The results of this thesis suggest several avenues of further investigation.

There are undoubtedly many minor improvements that could be made to
the fabrication process and mask layout that would yield greatly improved
performance. There are also larger questions raised by some of the results.
8.2.1
Improved germanium models
The UTC structure is convenient for studying minority carrier transport in

tensile-strained germanium. The results from the surface-normal detectors
were not consistent with published mobility models. Other published results
have implied transit times lower than expected: DeRose et al. [1] reported
a total 3 dB bandwidth exactly equal to the theoretical transit-time limit,
while Vivien et al. [2] reported a 3 dB bandwidth in excess of that limit.
In PIN photodetectors, the electron-hole pairs generated in the contacts still
contribute to the overall frequency response and therefore minority carrier
transport in doped germanium is relevant to all germanium-based photodetectors with germanium contacts, not just UTCs. The most likely explanation for the apparently anomalous results is that strain slightly enhances
carrier velocities. Minority carrier transport has been studied for high silicon
fraction SiGe alloys in the past using magneto transport measurements [3]
on heterojunction bipolar transistors [4]. The same measurements could be
performed on a Si/Ge UTC. For a device where the minority lifetime is
longer than the transit time and the back surface recombination velocity is
less than the exit velocity, the collection eciency will have a dependence on
the minority carrier mobility. If a magnetic eld is applied perpendicular to
the direction of transport, excess holes and electrons will separate spatially,
221
increasing the eective mobility and collection eciency.
8.2.2
Improved Si/Ge UTCs
There are a number of growth technologies that would benet Si/Ge UTC
performance. Reducing threading defect density would increase the soft
breakdown voltage and improve the absorber transit time by allowing for
lower doping at the Si/Ge heterointerface. High-temperature annealing, either after the initial low-temperature germanium layer growth or after the
full layer is grown, has been shown to reduce threading defect density [5].
However, if the anneal temperature is too high, the silicon will diuse into
the germanium layer [6]. This will decrease the absorption coecient and
hence the responsivity; it will also induce a quasi-electric eld that pushes
electrons toward the p-contact, as the absorber bandgap will be widest at the
absorber-collector junction. An optimized anneal recipe that reduces threading defect density without signicant interdiusion, may exist, and is worth
further study.
The largest impediment to higher bandwidth is minority electron transport through the heterojunction. A number of solutions to this issue have
been demonstrated in III-V HBTs and UTCs. The delta-doping used in
the rst generation of waveguide devices is the most immediately promising
solution for use in Si/Ge UTCs, as it requires no advances in growth technology. However, as the results indicate, delta doping alone cannot solve
all heterojunction-related problems. If the heterojunction barrier is primarily due to threading defects, delta-doping does not lower the barrier but
rather decreases the bias level necessary to achieve a particular eld in the
area. Even if the barrier is due to the conduction band oset, delta-doping
does not lower the heterojunction barrier, it only makes it narrower. A
222
Si/Ge superlattice or compositional grade at the heterojunction would not

be mutually exclusive with delta-doping and may have additional benets.
A superlattice design may be easier to formulate than a grade-based design because the location of the charged threading defects would be easier
to predict. Si/Ge superlattice growth by chemical vapor deposition (rather
than molecular beam epitaxy) has been demonstrated for non-selective area
growth [7], though it is not widely available.
Diusion-blocking layers at the top of the germanium are also worth
investigating. For the very thin absorbers used in the best devices, the collection eciency was most likely not 100%, and this could be improved by
preventing back-diusion into the p-contact. At 1550 nm, almost any SiGe
alloy would be transparent and would serve this purpose, probably without greatly increasing the p-contact resistance. A predominately germanium
layer would probably be preferable, as it would be easier to grow. The responsivity of short devices grown through selective area epitaxy could further
be improved by incorporating a vertical taper, as suggested in [8] and shown
in Figure 8.1. This would require only one additional process step, and could
be used to dilute the absorption prole as easily as it could be used to make
it more abrupt, so that high-power and compact high-speed devices could be
fabricated from the same layer stack.
photodetector
taper
optical input
waveguide
Figure 8.1: Vertical taper for selectively grown Si/Ge UTCs.
223
8.2.3
Next-generation receivers
There are a number of improvements that could be made to the coherent receivers demonstrated in Chapter 7. First, the facet coupling loss, though not
intentionally addressed, was too high for the receivers to be useful in a real
system. For the rst generation waveguide devices, with a thicker silicon device layer, this can mostly be improved by using a spot-size converter on the
input ber. For the second generation waveguide devices, a PIC-based spot
sized converter would most likely have to be designed. Polarization diversity
is another passive waveguide issue that was not intentionally addressed by
either generation of receiver, even though future coherent networks will almost certainly require dual-polarization operation. Finally, though the 90
optical hybrid design used was robust to fabrication and design error, it was
not compact. Replacing it with a 2x4 MMI would result in a more compact
design and lower energy consumption (since no thermal phase tuners would
be required). This would decrease the fabrication tolerance, but since 2x4
MMIs have been demonstrated in silicon [9] and since the Si/Ge photodiode
fabrication process is compatible with the use of the deep UV lithography
tool in the UCSB cleanroom, this should be possible.
224
References
[1] C. T. DeRose, D. C. Trotter, W. A. Zortman, A. L. Starbuck, M. Fisher,
M. R. Watts, and P. S. Davids, Ultra compact 45 GHz CMOS compatible
germanium waveguide photodiode with low dark current, Optics
Express, vol. 19, no. 25, pp. 24 89724 904, Dec. 2011. [Online]. Available:
P. Crozat, E. Cassan, C. Kopp, H. Zimmermann, and J. M. Fedeli, Zerobias 40Gbit/s germanium waveguide photodetector on silicon, Optics
Express, vol. 20, no. 2, pp. 10961101, Jan. 2012. [Online]. Available:
[3] Y. Betser, D. Ritter, G. Bahir, S. Cohen, and J. Sperling, Measurement
of the minority carrier mobility in the base of heterojunction bipolar
transistors using a magnetotransport method, Applied Physics Letters,
vol. 67, no. 13, pp. 18831884, Sep. 1995. [Online]. Available:
http://apl.aip.org/resource/1/applab/v67/i13/p1883 s1
[4] C. Jungemann, B. Heinemann, K. Tittelbach-Helmrich, and B. Meinerzhagen, An accurate, experimentally veried electron minority carrier mobility model for si and SiGe, in Electron Devices Meeting, 2000.
IEDM 00. Technical Digest. International, 2000, pp. 101104.
[5] H.-C. Luan, D. R. Lim, K. K. Lee, K. M. Chen, J. G.
Sandland, K. Wada, and L. C. Kimerling, High-quality Ge
epilayers on Si with low threading-dislocation densities, Applied
Physics Letters, vol. 75, p. 2909, 1999. [Online]. Available: http:
//link.aip.org/link/APPLAB/v75/i19/p2909/s1&Agg=doi
[6] M. Morse, O. Dosunmu, G. Sarid, and Y. Chetrit, Performance of Ge-onSi p-i-n photodetectors for standard receiver modules, IEEE Photonics
Technology Letters, vol. 18, no. 23, pp. 2442 2444, Dec. 2006.
[7] J. Bharathan and G. Bulman, Improvement in leakage characteristics
of Ge-on-Si photodetectors, in 2012 IEEE 9th International Conference
on Group IV Photonics (GFP), 2012, pp. 8486.
225
[8] X. Wang and J. Liu, Step-coupler for ecient waveguide coupling to

Ge/Si avalanche photodetectors, Photonics Technology Letters, IEEE,
vol. 23, no. 3, pp. 146148, 2011.
[9] Y. Painchaud, M. Pelletier, M. Poulin, F. Pelletier, C. Latrasse,
G. Robidoux, S. Savard, J.-F. Gagne, V. Trudel, M.-J. Picard, P. Poulin,
P. Sirois, F. DAmours, D. Asselin, S. Paquet, C. Paquet, M. Cyr,
M. Guy, M. Morsy-Osman, Q. Zhuge, X. Xu, M. Chagnon, and
D. Plant, Ultra-compact coherent receiver based on hybrid integration
on silicon, in Optical Fiber Communication Conference/National Fiber
Optic Engineers Conference 2013. Optical Society of America, 2013,
p. OM2J.2. [Online]. Available: http://www.opticsinfobase.org/abstract.
cfm?URI=OFC-2013-OM2J.2
226
Appendix A
List of symbols
Symbol
Denition
Material absorption coecient (cm1 )
modal loss (cm1 )
Optical propagation constant (cm1 )
Modal connement factor
Material dielectric constant (V cm1 )
Quantum eciency
Collection eciency
couple
Coupling eciency
Debye length (cm)
Electron mobility (cm2 V1 s1 )
Hole mobility (cm2 V1 s1 )
Contact resistivity ( cm2 )
Absorber transit time (s)
Collector transit time (s)
Electron recombination time (s)
Open circuit voltage decay constant (s)

227
Symbol
Denition
Phase (rad)
Photon ux (cm2 s1 )
Frequency (Hz)
Diode area (cm2 )
Dn
Electron diusion coecient (cm2 s1 )
Dp
Hole diusion coecient (cm2 s1 )
electric eld (V/cm)
Ec
Conduction band energy (eV)
Ef
Fermi energy (eV)
Ev
Valance band energy (eV)
Go pt
Optical generation rate (cm3 s1 )
Current density (A cm2 )
kB
Boltzmann constant (eV K1 )
Excess electron concentration cm3
NA
Acceptor concentration (cm3 )
ND
Donor concentration (cm3 )
Nt
Interface trap density (cm2 )
Excess hole concentration cm3
Electron charge (C)
Responsivity (A/W)
Recombination rate (cm3 s1 )
Rc,p
p-side contact resistance ()
Rc,n
n-side contact resistance ()
Absorber back diusion velocity (cm/s)
ve
Absorber exit velocity (cm/s)
Temperature (K)
228
Symbol
Denition
Wa
Absorber thickness of a UTC diode (cm)
Wc
Collector thickness of a UTC diode (cm)
Wi
Intrinsic region thickness of a PIN diode (cm)
229
Appendix B
Silicon doping
Silicon doping by ion implantation and activation anneal is a well-understood
process. The abundance of literature on the topic actually creates some
diculty in developing a working recipe, as many experiments have been
done using many dierent fabrication tools. Thus the set of processes and
relevant experiments done for this thesis may be of use to future researchers
who want to dope silicon using equipment in the UCSB nanofab.
B.1
Implant
The implant process consists of a mask patterning step, the implant itself,
and mask removal. Generally, implant proles were simulated in Silvaco
(Athena), because the software includes the eect of ion channeling whereas
SRIM does not, but no implant prole simulated this way was never veried
experimentally.
A thick oxide layer was used as the pre-growth implant mask. The silicon
on insulator (SOI) wafer initially had a 1.5 m top silicon layer, which was
thinned in several steps using wet thermal oxidation down to 600 nm for the
230
rst generation of waveguide detector and 400 nm for the second generation,
leaving a 1 m SiO2 layer. Since the density of silicon dioxide is about equal
to the density of silicon, and since the desired implant proles extended at
most 200 nm into the silcon, this was sucient to protect the areas where no
doping was desired. This layer was patterned with photoresist and implant
windows were dry etched in it using the SiOxVert recipe (40 sccm CHF3 ,
900 W ICP/200 W RF, 0.5 Pa, 250 nm/min) in either of the Panasonic
inductively coupled plasma (ICP) etch tools. No over-etch was used in order
to avoid damage to the semiconductor. The etch was nished in BHF. This
widened the n-well windows, but their dimensions were not critical. The
photoresist was stripped in 1165 for about 30 minutes, rinsed, and then the
wafers were soaked in piranha (H2 SO4 : H2 O2 3:1) and rinsed again prior to
implant. The implant process can cross-link the polymers used in photoresist,
resulting in a crust that is dicult to remove after implant. Using a silicon
dioxide mask had the advantage of ensuring that no polymer could be left on
the wafer prior to growth, and only required one additional process step, for
the dry etch. An additional advantage was that the same lithography recipe
(photoresist, spin speed, bake time, etc.) could be used for all pre-growth
steps. This prevented the need to develop a thick photoresist spin/bake
recipe for the 100 mm wafers used before growth.
For the self-aligned n+ contact implant, a photoresist mask was used.
This step occurred after growth, and photoresist was simpler to use than
silicon dioxide. Figures B.1 (a) and (b) show the cross-section and a typical
mask layout used for this step. The Cr/SiO2 hard mask that dened the
waveguides was used to protect the photodetector mesa, while the photoresist
protected the waveguide trenches. Passive waveguides and the bulk of the
chip were protected by both the Cr/SiO2 hard mask and the photoresist.
231
The photoresist layer stack consisted of three layers of SF-11 (PMGI) spun
at 4 krpm and one layer of SPR 220-3 spun at 2.5 krpm. The pattern was
dry etched in O2 in the PEII (at 300 mT and 100 W) for 1 minute before it
was sent out for implant to remove photoresist residue from the open areas in
the pattern. The total pre-implant photoresist thickness was around 5 m.
In principle, a single layer of SPR 220-7 could be used instead of this fourlayer stack, but it tended to crack during development, even without a postexposure bake. This layer stack also cracked (again, without a post-exposure
bake), but only around the edges of the chip.
WG
Photoresist
PD
Cr
SiO2
n+
p-Ge
i-Si
n-well
buried oxide
substrate
WG
PD
PD
n+
WG
photoresist
hardmask
Figure B.1: (a) Cross-section and (b) mask layout for n+ contact implant.
(c) SEM of photodetector after hard mask removal. The white scum is a
consequence of incomplete photoresist stripping after implant.
The maximum implant energy used for the n+ contacts was 130 keV, and
the densities of both resists are about 1 g/cm3 in liquid form [1, 2], so the
projected range of the ions was only 406 nm and the resist was thicker than
absolutely necessary. However, using such a thick layer made removing the
resist after implant easier. The resist was removed in a one hour soak in 1165
and subsequent 30 second PEII descum. Prior to the activation anneal, the
chrome hard mask was removed in the same Cl2 /O2 dry etch used to pattern
it, and the silicon dioxide hard mask was removed in buered hydrouoric
acid (BHF). Figure B.1 (c) shows an SEM of a detector after the activation
anneal when a shorter (10 minute) 1165 soak was used to strip the resist.
232
There is a thin lm of white scum only in areas where photoresist covered

the Cr/SiO2 hard mask.
B.2
Activation anneal
All activation anneal steps were done in the rapid thermal annealer (RTA). To
avoid contamination, since it is a multi-purpose tool, a susceptor was used. A
susceptor is a case for the wafer/piece during the anneal. For the pre-growth
anneal, this was a two-piece graphite case with room for a 100 mm wafer. For
the n+ contact activation anneal, the susceptor was made from three 100 mm
diameter silicon wafers: the top and bottom wafers were thermally oxidized
while the center wafer was thick (2 mm)and had a rectangular hole etched
in the middle. In both cases, the thermocouple that controls the chamber
temperature was placed on top of the susceptor. This results in a temperature
dierence between the set temperature and the actual anneal temperature,
since the thermocouple is exposed to the gas ow (1 slm N2 ), which cools it,
and the piece is not. The cooling eect of the gas ow has been measured
to be up to 100 C for some low-temperature anneals, and is sometimes used
by people who work on gallium nitride to anneal several dierent samples
at dierent temperatures simultaneously. For the pre-growth implant, the
anneals were at such high temperatures (950 C or 1050 C) there was very
little question that the dopant would fully activate, and so this temperature
dierence was not important. For the post-growth n+ contact activation,
the anneal was done at the lowest temperature possible to avoid degradation
of the germanium.
Phosphorus activates in silicon around 600 C, which is well below the
melting point of germanium (940 C). However, we observed decomposition
233
of the germanium layer as low as 600 C. Figure B.2 shows an SEM of the
germanium surface after a 5 minute 600 C anneal. The anneal left the germanium so rough as to essentially be un-useable. It also left a brown residue
on the suceptor. The degradation of the material is fundamentally a surface
reaction; germanium loss may be mediated by water vapor in the chamber or
the formation and desorption of germanium monoxide [3]. Depositing a thin
(50 nm) layer of SiO2 on the sample prior to the anneal prevented damage to
the germanium, but the temperature was still kept as low as possible in case
of poor sidewall coverage or pinholes, as annealing at higher temperatures
resulted in greater damage.
Figure B.2: Germanium annealed at 600 C without a dielectric encapsulation layer.
To determine the minimum allowable temperature for dopant activation,

we implanted and then annealed the same piece of SOI, increasing the temperature by 50 C with each sequential anneal, until the measured sheet
resistance was equal to the sheet resistance of a piece annealed at 950 C.
234
The implants were at 30, 80, 110, and 150 keV with a dose of 5 1014 cm2 .
All anneals took place in a susceptor with the thermocouple on top and the
piece inside. The piece was annealed for 5 minutes with a 2 minute ramp up
and 1 slm N2 ow. After implant, and for anneals below 550 C, the sheet
resistance was greater than 1 M/. For both the 600 C and the 950 C
sample, the sheet resistance dropped to about 40 /.
To determine the temperature inside the susceptor during the anneal,
we designed an experiment using heavily boron-implanted silicon. The conductivity of boron-implanted silicon increases roughly linearly with anneal
temperature for temperatures greater than about 600 C (unlike phosphorusimplanted silicon), so the sheet resistance can be used to determine the anneal temperature. One sample was annealed inside the susceptor with the
thermocouple on top. The other three samples were annealed outside of a
susceptor, next to the thermocouple, so that the nominal and actual anneal
temperatures were equal. The results are shown in Figure B.3. Though the
temperature inside the susceptor is larger than the temperature at the thermocouple, for this gas ow rate, temperature, and anneal time, they are very
close to each other. This may be due to the high thermal conductivity of the
susceptor, or because even when the thermocouple is inside the susceptor, it
is still located on the same edge of the RTA chamber.
235
Sheet Resistance (/)
300
250
TC in susceptor,
600 C anneal
200
TC near piece
150
100
550
600
650
700
Temperature (C)
750
Figure B.3: Sheet resistance of heavily boron-implanted silicon as a function

of anneal temperature for dierent thermocouple positions during anneal.
The blue points correspond to pieces left next to the thermocouple on a
standard silicon wafer. The line is a t to guide the eye. The green line
corresponds to a piece inside a susceptor, which is annealed at a nominal
temperature of 600 C with the thermocouple on top of the susceptor. All
anneals were 5 minutes long with a 2 minute ramp up and 1 slm N2 ow.
236
References
[1] Material safety data sheet, MEGAPOSIT(tm) SPR(tm) 220-3.0 positive
photoresist, Rohm and Haas Electronic Materials LLC, Material Safety
Data Sheet, Aug. 2004.
[2] LOR and PMGI resists, MicroChem, Data Sheet.
[3] K. Prabhakaran, F. Maeda, Y. Watanabe, and T. Ogino, Thermal
decomposition pathway of Ge and Si oxides: observation of a distinct
dierence, Thin Solid Films, vol. 369, no. 12, pp. 289 292, 2000.
[Online]. Available: http://www.sciencedirect.com/science/article/pii/
S0040609000008816
237
Appendix C
Si/Ge vertical etching and
sidewall passivation
The surface chemistry of germanium is very dierent from the surface chemistry of silicon. As a result, wet etches that work well for silicon (e.g. NH4 OH)
often do not etch germanium at appreciable rates and vice-versa (e.g. piranha does not etch silicon but will rapidly dissolve germanium). This has
consequences for both etching and passivating the sidewall of a Si/Ge photodiode. Even though the surface chemistries are dierent, the treatment must
be the same. This appendix covers all attempted germanium/silicon etches
and sidewall treatments. The most eective etch was an inductively coupled
plasma (ICP) SF6 /O2 etch that worked by dierent mechanisms for silicon
and germanium, while the most eective sidewall treatment was native oxide
removal followed by atomic layer deposition (ALD) of silicon dioxide.
238
C.1
Si/Ge vertical etching
The primary goal of the etch used for this project was to achieve vertical silicon sidewalls and nearly-vertical germanium ones. Well-controlled waveguide
dimensions were necessary to achieve good MMI performance, which meant
it was important to develop a vertical silicon etch. For the rst generation of
waveguide detector, this also meant that the germanium sidewalls needed to
be nearly straight, because the waveguides were dened by etching through
the germanium layer. Dry etching was the only way to achieve vertical sidewalls on both materials. There are many dierent kinds of reactions that
occur in a plasma etch chamber. For the etches considered in this thesis,
these fell into one of the following categories:
1. Chemical etching (adsorption/desorption): Material is removed in a primarily chemical process illustrated in Figure C.1. A reactive species (e.g. a
uorine ion) arrives at the surface to be etched and is adsorbed. It forms
a volatile compound with the material to be etched (e.g. SiF4 ) that leaves
the surface and eventually the etch chamber through the gas exhaust. These
etches tend to be isotropic and leave an undercut prole, as illustrated in the
gure.
reactive
particle
volatile product
Figure C.1: Chemical etch mechanism.
239
2. Physical etching (sputtering): Material is removed by bombarding the

surface with energetic particles, as illustrated in Figure C.2. These etches
tend to be slow and poorly selective. They are also usually anisotropic and
leave a trapezoidal or vertical sidewall prole. Sputtering can be enhanced
by other reactions that occur in the etch chamber, such as adsorption.
energetic
particle
energetic and
removed particles
Figure C.2: Physical etch mechanism.

3. Inhibited etching (sidewall passivation): During the etch, an etch-resistant
layer forms on the exposed surfaces as illustrated in Figure C.3. This layer
can either be a polymer, as in the case of the Bosch etch, or another insulator
(e.g. SiOx Fy ). Inhibited etches tend to form vertical proles because the
passivating layer protects the sidewalls from lateral etching. They are also
more prone to grassing because the etch-resistant material can form at the
bottom of the etched area.
reactive
particles
volatile product
passivating film
Figure C.3: Sidewall passivation during dry etching. One or more particles
in the etch react with the surface to form an etch-resistant layer, while other
species of particle chemically etch the exposed area.
240
Any combination of these three processes can occur in an etch chamber.

A vertical etch can either be designed by carefully balancing chemical and
physical processes, or by introducing an inhibitor to a primarily chemical
etch. Since germanium and silicon have very dierent surface chemistries, it
is dicult to nd an etch that is vertical on both materials.
C.1.1
Cl-based etches
The rst etch considered was at the time the standard Bowers group silicon
waveguide etch. It is a BCl3 /Cl2 ICP etch, and a full set of parameters are
given in Table C.1. On undoped silicon, this etch leaves a nearly vertical prole, indicating that both sputtering and chemical etching occur. These two
mechanisms most likely enhance each other: either chlorine ions are adsorbed
to the silicon surface, then sputtered away by incident neutrals, or neutrals
damage the silicon surface, which increases the material removal eciency
of incident chlorine ions [1]. An etch prole is shown in Figure C.4 (a). For
germanium, the same etch is primarily chemical. When chlorine ions are
adsorbed into the germanium surface, the GeCl by-products quickly sublime, leaving a severely undercut etch prole. An etch prole is shown in
Figure C.4 (b).
Attempts to modify this etch so as to make it more vertical for the germanium were unsuccessful. First, the pressure was lowered from 2.5 Pa to
2.0 Pa. The germanium sidewall was still undercut, though slightly less so,
and the bottom silicon surface was left rough (pitted). The plasma could not
be sustained at lower pressures. Second, argon was substituted for chlorine
in an attempt to reduce the chlorine ion density. This resulted in a substantially less vertical silicon sidewall and a severe loss of selectivity to the SiO2
241
hard mask
Ge
Si
Si
Buried oxide
Figure C.4: Bowers Si etch prole on (a) silicon (SEM and etch courtesy Jon
Peters) and (b) germanium. The etch is nearly vertical on silicon but the
sidewall is undercut for germanium. The hard mask was stripped before the
SEM was taken for (a) but not (b).
mask. Adding oxygen to the etch is not expected to result in the formation
of a stable by-product capable of protecting the germanium sidewall, so that
was not attempted. It was concluded that though making the etch less chemical (reducing the chlorine density) might result in a straighter germanium
sidewall, it would also result in a less vertical silicon etch prole, so chlorine
is not a strong candidate for simultaneously vertical etching of silicon and
germanium.
C.1.2
Fluorine/oxygen-based etches
Fluorine/oxygen based etches are more promising for the Si/Ge system. In
silicon, uorine etches are primarily chemical, and adding oxygen to the
chamber serves to inhibit the etch on the sidewall by forming SiOx Fy on the
exposed surfaces [2]. In germanium, uorine also acts as a chemical etchant.
Unlike the silicon etch, the primary role of oxygen in the germanium etch
is to block uorine ions from potential etch sites; GeOx Fy does not form to
inhibit etching [3].
242
C.1.2.1
Etch chemistry
There are two easily accessible sources of uorine ions in the two Panasonic
ICP tools in the UCSB nanofab: CF4 and SF6 (CHF3 is also available, but
CHF3 mostly contributes CF+
x ions to the plasma, which inhibits silicon
etching [4]). As a primary etch gas, SF6 proved preferable to CF4 . In the
absence of any inhibitor, SF6 -based ICP etches had an isotropic prole for
both silicon and germanium, whereas a CF4 -only etch had a trapezoidal
prole for both materials. This is shown in Figure C.5. As the O2 content
in the etch is increased, we would expect the sidewall to straighten in both
materials; in silicon due to the formation of SiOx Fy , and in germanium due
to the blocking of uorine ions from adsorption sites.
CF4
SF6
Hardmask
Hardmask
Ge
Ge
Si
Si
Figure C.5: Sidewall proles for (a) CF4 and (b) SF6 -based etches. The CF4
etch has CF4 as the only feed gas, while the SF6 etch includes argon. Full
etch parameters for both are given in Table C.1 (labeled CF4 only and SF6
only).
For germanium, the sidewall undercut decreases with increasing O2 content. For low O2 content, the sidewall prole was consistent with a primarily
chemical mechanism. As the oxygen content was increased to 50%, the sidewall straightened and the etch rate slowed. The evolution of the sidewall pro243
le with increasing O2 content for SF6 -based etches is shown in Figure C.6.
The etch is nearly vertical for 25% O2 . All etches shown were done in ICP 1.
The chamber pressure was 1.0 Pa, the total gas ow rate was 40 sccm, the
ICP power was 400 W, and the RF power was 50 W.
Ge
Si
50% O2
25% O2
12.5% O2
Hardmask
Hardmask
Hardmask
Ge
Ge
Si
Si
Decreasing O2
Figure C.6: Eect of O2 content on Ge sidewall prole for SF6 /O2 etches.
Increasing O2 content results in a less isotropic etch. Full etch parameters
can be found in Table C.1.
For silicon, increasing O2 content is expected to have less impact on the

sidewall prole. The etch rate should increase with percentage O2 in the
etch gas up until a point around 15%, then saturate, then suddenly decrease
to zero as SiOx Fy forms and inhibits downward etching [2, 3]. From the
saturation point until etching stops, the sidewall angle is near 90 . In this
regime, the formation of SiOx Fy is balanced with the chemical etching of the
bottom of the trenches, so that most uorine ions are used to etch downward.
The approximate silicon etch rate is shown as a function of O2 content in
the etch gas in Figure C.7 (a). All etches shown were done in ICP 1. The
chamber pressure was 1.0 Pa, the total gas ow rate was 40 sccm, the ICP
power was 400 W, and the RF power was 50 W. A typical sidewall prole
is shown in Figure C.7 (b). From 37.5% O2 to 50% O2 , the etch resulted
in grassing and black silicon (this is expected [2]), as the bottoms of the
244
trenches are partially protected with SiOx Fy . An SEM of black silicon is
Si etch rate (nm/min)
shown in Figure C.7 (c).

400
Ge
200
0
Hardmask
Black Si
Si
Ge
Si
0 20 40 60 80 100
% O2
Figure C.7: (a) Etch rate of silicon in ICP SF6 /O2 etch as a function of
O2 content in the gas feed. (b) Silicon etch prole in ICP SF6 /O2 etch for
25% O2 content. (c) Black silicon from the ICP SF6 /O2 etch with 50% O2
content. Full etch parameters can be found in Table C.1.
Because the 25% O2 content ICP SF6 /O2 etch yielded straight sidewalls
and a smooth bottom silicon surface, it was the primary etch used in this
work. Etches that use O2 to inhibit sidewall etching are known to be sensitive
to chamber conditions. In etch chambers such as ICP 1 and ICP 2, where
carbon-containing etch gasses are also used, the chamber walls can be covered
with a uorocarbon residue that aects the O2 content of the plasma [2]. The
eect of this was to de-stabilize the etch over long time scales, so that some
parameters had to be changed every few months in order to obtain a sidewall
as clean as what is shown in Figure C.7 (b). The optimum percentage O2
did not seem to vary much over long time scales, but the optimum process
pressure and RF power did.
The chamber pressure does not have a strong impact on sidewall angle
for silicon, but it can aect the sidewall texture. If the pressure is too high
or too low, the sidewall can become pitted as shown in Figure C.8. This is
either due to non-uniformity in the passivation layer or in the concentration
of uorine ions. For all three etches, the SF6 ow was 30 sccm, the O2 ow
245
was 10 sccm, the ICP power was 400 W, and the RF power was 50 W. The
0.5 Pa etch has clean sidewalls, while both the 0.3 Pa and 1.0 Pa etches
appear very rough.
0.3 Pa
Hardmask
Ge
Si
1.0 Pa
0.5 Pa
Hardmask
Ge
Hardmask
Si
Si
Figure C.8: Eect of chamber pressure on sidewall texture for SF6 /O2 ICP
etch. Other than the pressure, the etch parameters are the same for each
etch and given in Table C.1 for 25% O2 ow.
C.1.2.2
Power
Figue C.9 shows the eect of changing the RF power for the ICP SF6 /O2 etch
discussed above from 50 W to 100 W. The chamber pressure was 0.5 Pa, but
the process parameters are otherwise identical to those given in Table C.1
for the 25% O2 content etch. Increasing the RF power results in more micropillars, but also a smoother silicon sidewall. It also increases the etch rate
and decreases the selectivity to the mask. Increasing the RF power too much
can cause the mask to be come rougher at the edges, ultimately resulting in
a less smooth silicon sidewall.
Figure C.10 shows the eect of changing the RF power for the ICP SF6 /O2
etch discussed above from 400 W to 900 W. The only dierence in etch
parameter between Figure C.7 (b) and Figure C.10 is that the ICP power
has been increased. The sidewall angle remains vertical, but the bottom
silicon is left rough.
246
Etch name
Table C.1: Dry etch summary

ICP/RF
Gasses,
Press.
power
Tool
Notes
ow rate
(Pa)
(W)
(sccm)
Bowers Si
BCl3 /Cl2
40/20
2.5
500/120
ICP 2
CF4 only
CF4 20
1.0
500/100
ICP 1
1.0
600/50
ICP 2
1.0
400/50
ICP 1
Does not etch Si
1.0
400/50
ICP 1
Does not etch Si
1.0
400/50
ICP 1
1.0
400/50
ICP 1
1.0
400/50
ICP 1
1.0
400/50
ICP 1
SF6 only
75%O2
62.5%O2
50%O2
37.5%O2
25%O2
12.5%O2
SF6 /Ar
50/10
SF6 /O2
10/30
SF6 /O2
15/25
SF6 /O2
20/20
SF6 /O2
25/15
SF6 /O2
30/10
SF6 /O2
35/5
Not good for Ge

Trapezoidal prole
for Si and Ge
Undercut prole for
Si and Ge
Black Si; Figure

C.6 (a) and Figure
C.7 (a) and (c)
Silicon grass; Figure C.7 (a)
Vertical for Si and
Ge
Figure C.6 (c)
Prior to each etch, the ICP chamber was cleaned with a 5 minute CF4 /O2 etch for
Cl-containing etches and 5 minute O2 etch for uorine-containing etches. It was
also conditioned with the etch given in the table for 3 minutes.
247
50W RF
100W RF
Hardmask
Hardmask
Ge
Ge
Si
Si
Figure C.9: Eect of RF power on sidewall texture for the SF6 /O2 ICP etch.
Other than the RF power, the etch parameters are the same for each etch
and are as given in Table C.1 for 25% O2 ow, except the chamber pressure
was 0.5 Pa.
Hardmask
Ge
Si
Figure C.10: Eect of increasing the ICP power for the SF6 /O2 ICP etch.
C.2
Sidewall passivation
We tried three dierent surface treatments: PECVD SiO2 deposition, a 40

minute UV/ozone native oxide growth at room temperature, and ALD SiO2
248
deposition. These treatments were evaluated in two separate experiments.

First, PECVD SiO2 deposition was compared to UV/ozone treatment, and
showed superior performance. Then, it was compared to ALD SiO2 deposition, and the detectors with ALD passivation had lower sidewall leakage
current. The results of all experiments are summarized in Table C.2.
PECVD and UV/ozone oxides were compared directly as two splits in
a process run. PECVD deposition of silicon dioxide is relatively simple,
but the chamber is not very clean. UV/ozone treatment has been shown to
grow a clean native oxide on both silicon [5] and germanium [6], and has
the additional advantage of removing organic contaminants. The mesa was
formed in the BCl3 /Cl2 ICP etch discussed above. Immediately prior to
either the PECVD oxide deposition or the UV/ozone treatment, the samples
were cleaned using the process used by MIT [7]: a 5 minute organic removal
in 1:4 NH4 OH : H2 O followed by two cycles of 30-second H2 O2 dips (to form a
native oxide) and 30-second buered HF dips (to remove it). This process had
some issues: NH4 OH etches silicon at an appreciable rate and H2 O2 etches
germanium even faster. Thus it was not used in subsequent device runs. The
PECVD lm was 1 m thick. An additional 1 m of PECVD silicon dioxide
was deposited on the UV/ozone treated sample immediately afterward so
that the total thicknesses of the two passivation layers were equal. The epi
material used for this experiment is not discussed elsewhere in this thesis,
but was similar to the surface-normal detector epi. It diered from the
surface-normal detector epi in that there was a large boron spike at the Si/Ge
interface. The boron spike prevented minority electron transport through the
diode, which decreased both the responsivity and areal component of the dark
current by about a factor of 10. Nevertheless, this epi was useful for process
development.
249
The contributions to the dark current were measured using the same
technique discussed in Section 3.4.2: the dark currents of many dierent
diodes with dierent diameters were compared and a curve of the form
Id,tot = Jarea r2 + Jperimeter r
(C.1)
where r is the diode radius was t to the data. For this epi material, the areal
component of the dark current was 2 mA/cm2 at -1 V. For the PECVD SiO2
passivated sidewall, the leakage current was dominated by the area component, but the edge component was 139 nA/cm at -1 V. For the UV/ozone
passivated sidewall, the leakage current was dominated by the edge component, which was 3.7 A/cm at -1 V.
PECVD and ALD SiO2 passivation layers were compared using two different process runs and two dierent epis. In both cases, the pre-treatment
was a solvent clean (3 minutes in acetone, then isopropanol, in the ultrasonic
bath, then a rinse) followed by native oxide removal in dilute hydrouoric
acid (50:1 DI:HF) and another DI rinse. This was probably not as eective as
the other cleaning procedure, as it did not involve the removal of hundreds
of nm of material, but it was sucient to achieve area-component limited
leakage currents for both process runs. The sidewall component of the leakage current for the PECVD SiO2 -passivated devices was 8 A/cm at -1 V.
This is larger than the
250
Table C.2: Sidewall passivation summary

Passivation layer Pre-treatment Sidewall leakage
current
(A/cm)
at -1 V
UV/ozone
MIT clean
3.7
PECVD SiO2
MIT clean
0.139
PECVD SiO2
Solvent+HF
8
ALD SiO2
Solvent+HF
1
Upper bound: too small to measure
251
References
[1] D. L. Flamm, Mechanisms of silicon etching in uorine- and chlorinecontaining plasmas, Pure & Applied Chemistry, vol. 62, no. 9, pp. 1709
1720, 1990.
[2] H. V. Jansen, M. J. de Boer, S. Unnikrishnan, M. C. Louwerse, and
M. C. Elwenspoek, Black silicon method X: a review on high speed
and selective plasma etching of silicon with prole control, Journal of
Micromechanics and Microengineering, vol. 19, p. 033001, 2009.
[3] A. Campo, C. Cardinaud, and G. Turban, Comparison of etching processes of silicon and germanium in SF6 O2 radio-frequency plasma,
Journal of Vacuum Science and Technology B, vol. 13, no. 2, pp. 235
241, Mar. 1995.
[4] W. Wang, P.-R. Cha, S. ho Lee, G. Kim, M. J. Kim, and K. Cho, First
principles study of Si etching by CHF3 plasma source, Applied Surface
Science, vol. 257, no. 21, pp. 8767 8771, 2011. [Online]. Available:
http://www.sciencedirect.com/science/article/pii/S0169433211005113
[5] C. K. Fink, K. Nakamura, S. Ichimura, and S. J. Jenkins,
Silicon oxidation by ozone, Journal of Physics:
Condensed
Matter, vol. 21, no. 18, p. 183001, 2009. [Online]. Available:
http://stacks.iop.org/0953-8984/21/i=18/a=183001
[6] X. J. Zhang, G. Xue, A. Agarwal, R. Tsu, M. A. Hasan, J. Greene, and
A. Rockett, Thermal desorption of ultraviolet-ozone oxidized Ge(001) for
substrate cleaning, Journal of Vacuum Science Technology A: Vacuum,
Surfaces, and Films, vol. 11, no. 5, pp. 25532561, 1993.
[7] D. D. Cannon, Strain-engineered CMOS-compatible Ge photodetectors, Ph.D. dissertation, Massachusetts Institute of Technology, 2004.
252
Appendix D
RF probe pad design and
measurement
The probe pads used to connect a photodiode (or modulator, laser, transistor, etc.) can have a strong impact on high-frequency performance. Thus an
accurate model for probe-pad S-parameters can be useful. The impedance
of ground-signal-ground (GSG) probe pads can be roughly approximated by
a short coplanar transmission line with the same length. Figure D.1 shows
a schematic of such a pad. As it is a short transmission line, it can be approximated by a T or section - a capacitance and an inductance. For
a xed pitch (center-to-center spacing) and symmetric center-to-edge distances, increasing the gap between the ground and signal lines decreases the
capacitance and increases the inductance. This is shown in Figure D.1 (c).
The calculation was done using a simple transmission line model [1] assuming
a high-resistivity (zero imaginary dielectric constant) silicon substrate of innite thickness. The capacitance decrease is due to the shrinking dimensions
of the signal trace.
For real probe pads, there are typically several layers of other dielectrics
253
Substrate
G
S
Pad length
600
1500
400
1000
200
500
00
20
40
60
80
Gap width (m)
Inductance (nH/m)
Capacitance (pF/m)
pitch
gap
0
100
Figure D.1: (a) Cross-section and (b) top-down schematic of RF probe pads.
The distance from the center of the pad to the edge is assumed to be the
same for both signal and ground lines. (c) Approximate capacitance and
inductance per unit length as a function of gap width
between the metal and the substrate, and the substrate has a nite thickness.
For silicon-on-insulator based devices, the silicon substrate (the handle wafer)
is often conductive. To generate estimates for RF probe pad S-parameters on
a realistic SOI surface, we fabricated transmission lines and probe pads on
two dierent SOI wafers. Both wafers had a top layer of 500 nm of PECVD
SiO2 , thick (1.5 m and 2 m) and nominally undoped silicon device layers,
1 m buried oxide, and 675 m thick handle wafers. The low-resistivity wafer
had a handle wafer resistivity between 0.3 and 1.2 cm. This is slightly
lower than typical for an SOI wafer, but not extreme. The high-resistivity
wafer was oat-zone silicon, and the resistivity was too high to be measured.
Coplanar transmission lines with a 20 m signal trace and 16 m gap were
fabricated on both substrates, and their properties were measured using the
through-reect-line method [2] with traces 600 m, 1.3 mm, and 3.7 mm
long. The data is only expected to be accurate above 5 GHz due to the
limited length of the longest line.
254
The characteristic impedance and loss of both sets of transmission lines

are shown in Figure D.2 (a) and (b). The characteristic impedance of the
high-resistivity substrate transmission lines is much higher than the characteristic impedance of the lines on the low-resistivity substrate. The inductances per unit length are about the same in both cases, 375 nH/m. The
dierence in characteristic impedance is instead due to dierent capacitances:
the high-resistivity substrate lines have a capacitance of 165 pF/m while the
low-resistivity substrate lines have a capacitance of 400 pF/m. The loss of
the high-resistivity substrate lines is much lower than the loss of the lowresistivity substrate lines. It scales as f 1/2 , which is indicative of metal (skin
eect) loss. The loss of the low-resistivity substrate lines is super-linear with
frequency, which implies that it is due to substrate radiation. The losses of
both lines are higher than would be desirable for most applications, most
likely due to the thin metal layer (about 500 nm) used.
80
100
Loss (dB/cm)
70
Z0 ()
60
50
High-
40
Low-
0
10
20
30
40
Frequency (GHz)
60
40
High-
20
30
20
Low-
80
50
0
0
10
20
30
40
Frequency (GHz)
50
Figure D.2: (a) Characteristic impedance and (b) loss of nominally identical coplanar transmission lines fabricated on high and low resistivity silicon
substrates.
From the transmission line data, it seems likely that probe pads on lowresistivity substrates will have capacitances about three times higher than
probe pads with the same layout on high-resistivity substrates, and slightly
255
higher loss. S-parameters of identical probe pads on both substrates were

measured in two ways with Cascade Microtech ACP40 GSG 100 probes.
The probe pads were all 100 m pitch and had varying center conductor
diameters, in the layout shown in Figure D.3. The results are shown in Table D.1. First, the network analyzer was calibrated to the probe tips using
an impedance standard substrate (101-190) and the short-open-load-through
method. Then, the microwave reection of open-terminated probe pads were
measured to obtain the capacitance, and short-terminated pads were measured for the inductance. This is referred to as the direct measurement
technique. For the second measurement method, the network analyzer was
calibrated to the probe tips with the impedance substrate. Then the network
analyzer was calibrated again using the TRL structures. The two calibrations
were compared, and the dierence between the two was the S-parameters of
the probe pads. This is called the TRL technique in the table.
100 m
50, 60, 70 m
Figure D.3: Layout of the probe pads measured.
A few trends are evident from the table. First, the capacitance of the
pads on the low-resistivity substrate is 2-3 times higher than the capacitance of the pads on the high-resistivity substrate. Since the capacitances
measured are all on the same order of magnitude as the diode capacitance
of a typical waveguide photodiode, the pad capacitance needs to be taken
256
Table D.1: Extracted RF probe pad capacitance and inductance.

Signal pad Substrate Capacitance (fF) Inductance (pH) Loss at 40
diameter
Direct
TRL
Direct
TRL
GHz (dB)
50
60
70
High-
Low-
High-
Low-
High-
Low-
13
42
15
48
17
59
5
26
15
28
18
55
69
51
72
50
73
33
67
61
71
63
0.7
1.5
0.7
1.5
0.7
1.5
into account when the detector is being designed and its impedance is being
measured. Second, the RF loss is higher for the pads on the low-resistivity
substrate. Third, the direct and TRL measurement techniques sometimes
agree, but sometimes dier substantially. This is most likely due to the difculty of accurately measuring capacitances and inductances as low as the
ones considered here.
For most applications, the pad impedances of any of the designs on the
high-resistivity substrates would be acceptable. However, SOI with appropriate device layer and buried oxide thicknesses and is often not available with a
high-resistivity handle wafer. The only SOI available for this work had a low
resistivity handle wafer, but the devices fabricated required pad capacitances
as low as possible. This can in principle be achieved by making the signal
trace even smaller than the widths considered above, but this would make
the devices more dicult to probe and impossible to wire-bond. Instead,
thick polymer layers (BCB or SU-8) were used under the probe pads. The
increased distance between the probe pad and the substrate decreases the
parasitic capacitance. In order to improve pad adhesion during wire-bonding
(metal-BCB adhesion is poor), we formed metal anchors through the BCB
for the rst generation of waveguide photodiode. Top and side views are
shown in Figure D.4. The bottom metal was deposited before the BCB.
257
Probe metal
BCB
Anchor metal
Substrate
Anchors
Figure D.4: Top view and cross-section of probe pads with anchors.
Its presence increases the pad capacitance, but the area covered by bottom
metal is still much smaller than the total pad area. Holes were etched in the
BCB prior to probe metal deposition so that the probe metal could touch the
bottom anchor metal. These pads survived wire-bonding, while pads without
anchors did not.
258
References
[1] C. Wen, Coplanar waveguide: A surface strip transmission line suitable
for nonreciprocal gyromagnetic device applications, Microwave Theory
and Techniques, IEEE Transactions on, vol. 17, no. 12, pp. 10871090,
1969.
[2] R. B. Marks, A multiline method of network analyzer calibration, Microwave Theory and Techniques, IEEE Transactions on, vol. 39, no. 7,
pp. 12051215, 1991.
259
Appendix E
Process follower
This is an annotated version of the process follower used for Si/Ge photodiodes grown by selective area epitaxy.
1. Wafer thinning (if necessary)

1.1 Clean wafers (Wet bench)
A. 10 min. piranha (H2 SO4 : H2 O2 3:1) soak.
Avoid public nanostrip bath. Even with new nanostrip, it is
not clean enough for good growth. Do not put large beakers of
piranha on hotplate.
B. 1 min. DI rinse
C. 1 min. BHF dip
D. 1 min. DI rinse
E. N2 blow dry
This cannot be skipped
1.2 Wet oxidation (Tystar tube 2)
Run wet recipe at 1050 C
Final oxide thickness = (amount of Si to remove)/0.42
I used BYUs oxidation time calculator assuming 111 oriented
silicon to gure out the oxidation time. This may no longer
be accurate.
Book 2-3 hours extra to load/unload
260
1.3 Measure nal Si/SiO2 thickness

2. Alignment mark patterning
2.1 Alignment mark lithography (Autostep200)
A. Clean wafer
A.1 Solvent spin at 500 RPM, ACE, ISO, DI, N2 blow dry
A.2 PEII O2 descum: 100 W, 300 mT, 30 sec.
A.3 Dehydration bake 5 min. at 150 C, let wafer cool at least
1 min.
B. Spin HMDS
B.1 N2 blow dry
B.2 Dispense HMDS, let sit 30 sec.
B.3 Spin at 3 kRPM for 30 sec. (R5)
Replace wipe in bowl before spinning resist
Otherwise photoresist will be streaky
C. Spin SPR955-CM-0.9
C.1 N2 blow dry
C.2 100 RPM/s ramp to 100 RPM, hold 15 sec., 200 RPM/s
ramp to 3 kRPM, hold 30 sec.
D. Pre-exposure bake 90 sec. at 95 C
E. Expose in stepper: 0.56 sec., focus oset 5
F. Post-exposure bake 90 sec. at 125 C
F.1 let cool 1 min
G. Develop
G.1 2 min. in AZ 726 MIF agitating slightly
G.2 DI rinse 1 min. (with spray gun)
G.3 N2 blow dry
2.2 Alignment mark etch (ICP 2)
A. Hardmask etch (ICP 2)
A.1 Check gasses (want CHF3 ), change if necessary
A.2 Run O2 clean 5 min. (recipe 103)
A.3 Run SiO2 etch 3 min. on carrier only
Recipe 101 (SiOxVert): 40 sccm CHF3 , 900 W ICP,
200 W RF, 0.5 Pa
A.4 Load wafer and etch SiO2 . The rate is 250 nm/min, overetch 1 min. to compensate for loading eects.
A.5 Unload wafer
261
A.6 Run O2 clean 5 min. (recipe 103)

B. Strip resist
B.1 Solvent spin at 500 RPM, ACE, ISO, DI, N2 blow dry
B.2 Clean backside with swab or rinse
B.3 PEII O2 descum (100 W, 300 mT, 30 sec.) or Gasonics
recipe 4
C. Silicon etch (ICP 2)
C.1 Run CF4 /O2 clean 5 min. (recipe 106)
C.2 Run Si etch 3 min. without wafer
Recipe 127 (Bowers Si): 40/20 sccm BCl3 /Cl2 , 500 W
ICP, 120 W RF, 2.5 Pa
C.3 load wafer, etch 2 min. The rate is about 4 nm/s, but the
depth is not critical.
C.4 Unload wafer
C.5 Run CF4 /O2 clean 5 min. (recipe 106)
3. N-well formation
3.1 Growth window lithography (Autostep200)
A. Spin HMDS
A.1 N2 blow dry
A.2 Dispense HMDS, let sit 30 sec.
A.3 Spin at 3 kRPM for 30 sec. (R5)
Replace wipe in bowl before spinning resist
B. Spin SPR955-CM-0.9
B.1 N2 blow dry
B.2 100 RPM/s ramp to 100 RPM, hold 15 sec., 200 RPM/s
C. Pre-exposure bake 90 sec. at 95 C
D. Expose in stepper: 0.56 sec., focus oset 5
E. Post-exposure bake 90 sec. at 125 C
E.1 Let cool 1 min
F. Develop
F.1 2 min. in AZ 726 MIF agitating slightly
F.2 DI rinse 1 min. (with spray gun)
F.3 N2 blow dry
3.2 Hardmask dry etch (ICP 2)
262
A. Check gasses (want CHF3 ), change if necessary

B. Run O2 clean 5 min. (recipe 103)
C. Run SiO2 etch 3 min. with carrier only
Recipe 101 (SiOxVert): 40 sccm CHF3 , 900 W ICP, 200 W RF,
0.5 Pa
D. Load wafer and etch SiO2 . The rate is 250 nm/min, do not
over-etch.
E. Unload wafer
F. Run O2 clean 5 min. (recipe 103)
3.3 BHF wet etch until SiO2 is gone, DI rinse, N2 blow dry
Etch can take several minutes: keep removing and inspecting
until openings clear
3.4 Strip resist
A. ACE/ISO/DI on solvent spinner
B. PEII O2 descum (100 W, 300 mT, 30 sec.)
recipe 4
C. 10 min. piranha (H2 SO4 : H2 O2 3:1) soak.
D. 3 min. DI rinse, N2 blow dry
or Gasonics
3.5 Ship wafers to Kroko for implant - 1 week.

A. Before shipping, use Dektak to ensure SiO2 is thick enough
for max implant energy
B. Send undoped or lightly doped witness sample with wafers
C. Strip SiO2 in BHF when they come back (can take several
minutes)
4. Growth window patterning
4.1 Clean wafers:
A. 10 min. piranha (H2 SO4 : H2 O2 3:1) soak. Continue until
bubbling slows. Add more peroxide every 15 min. Do not put
large beaker on hotplate.
B. 1 min. DI rinse
C. 1 min. BHF dip
D. 1 min. DI rinse
E. N2 blow dry
4.2 Deposit 1 m SiO2 (Unaxis PECVD)
The deposition recipe and densication process came from Renan
Moreira
263
A. Preclean/coat
B. Recipe: 200 C, no Ar
C. Clean after every 2 wafers
4.3 Densify oxide (Tystar tube 3)
This drives out hydrogen and should result in stoichiometric silicon dioxide. Otherwise there is a risk of oxygen/silicon migration
during germanium growth.
Dry 1050 3 hours - immediately after deposition
4.4 Growth window lithography (Autostep200)
A. Spin HMDS
A.1 N2 blow dry
A.2 Dispense HMDS, let sit 30 sec.
A.3 Spin at 3 kRPM for 30 sec. (R5)
A.4 Replace wipe in bowl before spinning resist
B. Spin SPR955-CM-0.9
B.1 N2 blow dry
B.2 100 RPM/s ramp to 100 RPM, hold 15 sec., 200 RPM/s
C. Pre-exposure bake 90 sec. at 95 C
D. Expose in stepper: 0.56 sec., focus oset 5
E. Post-exposure bake 90 sec. at 125 C, let cool 1 min.
F. Develop
F.1 2 min. in AZ 726 MIF agitating slightly
F.2 DI rinse 1 min (with spray gun)
F.3 N2 blow dry
G. PEII O2 descum: 100 W, 300 mT, 30 sec.
4.5 Growth window etch (ICP 2)
C. Run SiO2 etch 3 min. with carrier only
recipe 126 (Ben SiO2 ): 30/10 sccm CF4 /CHF3 , 900 W ICP,
50 W RF, 0.5 Pa
This recipe was developed by Ben Curtin. It seems to result in less damage than SiOxVert.
D. Load wafer and etch SiO2 about 7 min. The rate is about
150 nm/min., calibrate on a full-size wafer with the correct
pattern beforehand. Over-etch 10-30 sec.
264
E. Unload wafer
F. Run O2 clean as necessary (recipe 103)
4.6 Strip resist in 1165 at 80 C (heat 1165 rst), rinse in ISO then
DI, N2 blow dry
to avoid explosions in piranha
4.7 Clean
A. 10 min. piranha (H2 SO4 : H2 O2 3:1) soak. Continue until
bubbling slows. Add more peroxide every 15 min. Do not put
large beaker on hotplate.
B. 1 min. DI rinse
C. 1 min. BHF dip
D. 1 min. DI rinse
E. N2 blow dry
4.8 Vacuum seal immediately after cleaning.
5. Ship to growers
6. Dice wafers (ADT dicing saw)
6.1 Protect with SPR220-3.0
6.2 Cut entry speed 0.5 mm/s, cut at 1 mm/s
6.3 Clean in ACE/ISO/DI, gasonics, until all PR residue is gone
6.4 Soak in 1165 at 80 C 30 min., rinse in ISO then DI, N2 blow dry
6.5 Inspect in microscope. PEII O2 descum and 1165 soak until clean.
7. Waveguide etch
Do not ultrasonicate samples until waveguide hardmask is removed
7.1 Deposit hardmask on real sample + Si dummy (PlasmaTherm
PECVD and Ebeam 1)
A. Remove SiO2 growth mask in BHF (10 min.)
B. 50:1 DI:HF dip until hydrophobic (15 sec), DI rinse 1 min.,
N2 blow dry
BHF does not remove the oxide nearest the silicon
C. Wet clean PlasmaTherm chamber and run 30 min. clean
( 30 CLNSO)
D. Deposit 200 nm SiO2 on sample + dummy (standard recipe:
SIO2000)
265
E. Measure thickness on ellipsometer

F. Anneal in RTA at 400 C 10 min. (AET RTA)
For better adhesion - there were some incidents of peeling
hardmasks before this step was added
G. Chrome deposition (Ebeam 1)
G.1 Pump to 1.5e-6, heat up Cr for 5 min. before deposition
G.2 Deposit 600
A at 1-1.5
A/s (do not exceed 2
A/s)
7.2 Waveguide lithography (Autostep200)
The chrome deposition recipe and lithography conditions came from
the Coldren group
A. Dehydration bake at 110 C 1 min.
B. Spin HMDS: dispense, let sit 30 sec. spin o at 3 kRPM for
30 sec. (R5)
C. Spin SPR955-CM-0.9 at 3 kRPM for 30 sec. (R5)
E. Spin CEM-365iS at 5 kRPM for 30 sec. (R8)
Dispense through syringe with lter
F. Expose in stepper: 0.5 sec., focus oset 5
G. DI rinse 1 min to remove CEM, N2 blow dry
H. Post-exposure bake 60 sec. at 110 C, let cool 1 min.
I. Develop in AZ 300 MIF for 30 sec. agitating slightly, DI rinse
1 min., N2 blow dry
J. Inspect in microscope
Make sure small features are clear
Check resolution with nonius markers - rst touching pair
should imply feature size too small by 100 nm200 nm
Check alignment as well
K. Do not descum
7.3 Cr etch (ICP 1 or 2)
A. Run CF4 /O2 clean 5 min. (recipe 106 in ICP 2)
B. Run Cr etch 2 min. without sample
ICP 1: recipe 150: 23.3/6.8 sccm Cl2 /O2 , 500 W ICP,
15 W RF, 1.0 Pa
15 W RF, 1.37 Pa
both etch rates are around 0.6 nm/s
C. Load sample and etch 2 min.
D. Unload sample
266
E. Run CF4 /O2 clean 5 min.

7.4 Strip photoresist
A. ACE/ISO/DI rinse, no ultrasonic
B. PEII O2 descum: 100 W, 300 mT, 30 sec.
C. 1165 soak 30 min. at 80 C (heat 1165 rst), rinse in ISO
then DI, N2 blow dry
D. PEII O2 descum: 100 W, 300 mT, 30 sec.
E. Inspect in microscope to see photoresist is gone. If not, repeat.
7.5 SiO2 etch (ICP 2)
C. Run SiO2 etch 3 min. without sample
Recipe 126 (Ben SiO2 ): 30/10 sccm CF4 /CHF3 , 900 W ICP,
50 W RF, 0.5 Pa
D. Load sample and dummy and etch SiO2 . The rate is about
150 nm/min, do not over-etch.
E. Unload sample, check SiO2 thickness on dummy. Re-calculate
rate and complete etch.
7.6 Dektak step height
7.7 Si/Ge etch (ICP 1)
Run a test piece of silicon through and SEM it within a few
days of doing this on a real sample. Check for sidewall roughness and grassing.
Also prepare a silicon dummy for etch rate calibration
This etch recipe is not stable for silicon
A. Change gas to SF6
C. Run Si/Ge etch 3 min. without sample
SF6 /O2 30/10 sccm, 400 W ICP, 100 W RF, 0.5 Pa,
recipe 157 (SiC)
D. Pre-WG etch oxide removal: to be followed immediately by
etch
1:50 HF:DI 10 sec., DI rinse 15 sec., N2 blow dry
E. Load silicon calibration test piece and calculate etch rate for
silicon
F. Load sample and etch 2/3 of the desired total waveguide etch
depth. The rate is about 400 nm/min for Si
The rate is about 170 nm/min for Ge, but Ge-covered areas
will not be etched to their nal depth until the next step.
267
G. Unload sample, check etch depth. Re-calculate rate and complete etch.
H. Change gas back to CF4
I. Run required O2 clean (recipe 121)
7.8 SEM to check sidewall prole and mask adhesion
8. Deep etch
8.1 Deep etch lithography (Autostep200)
A. Dehydration bake 110 C 1 min.
30 sec. (R5)
C. Spin SPR220-3.0 at 2.5 kRPM for 30 sec. (R4)
E. Expose in stepper: 0.72 sec.
G. Develop in AZ 726 MIF for 1 min. agitating slightly, DI rinse
1 min., N2 blow dry
H. Inspect in microscope
I. PEII O2 descum: 100 W, 300 mT, 30 sec.
8.2 Si deep etch (ICP 1)
A. Change gas to SF6
C. Run Si/Ge etch 3 min. without sample
SF6 /O2 30/10 sccm, 400 W ICP, 100 W RF, 0.5 Pa,
recipe 157 (SiC)
D. Pre-WG etch oxide removal: to be followed immediately by
etch
1:50 HF:DI 10 sec., DI rinse 15 sec., N2 blow dry
E. load silicon calibration test piece and calculate etch rate for
silicon
F. load sample and etch 2/3 of the desired total waveguide etch
depth. The rate is about 400 nm/min for Si
G. Unload sample, check etch depth. Re-calculate rate and complete etch.
H. Change gas back to CF4
I. Run required O2 clean (recipe 121)
8.3 Clean sample
268
A. Remove Santovac 5 and photoresist on spinners with ACE/ISO/DI

Acetone seems to be more eective than 1165 at removing photoresist after this etch
Repeat as necessary until all PR is gone
C. Soak in 1165 at 80 C (heat 1165 rst) for 30 min., rinse in
ISO then DI, N2 blow dry
It is very important that the sample be clean before the next
step: n+ contact implant
9. N+ contact implant
9.1 Deposit SiO2 protection layer (IBD)
This prevents photoresist left over from the lithography from getting permanently attached to the semiconductor
A. Solvent clean if necessary
B. IBD deposit 20 nm SiO2 (200 sec. standard recipe) on sample
and dummy
IBD deposition is at room temperature - room temperature
sputter would probably also work
9.2 Implant lithography (Autostep200)
A. Spin and pre-bake photoresist
A.1 Dehydration bake 200 C 5 min.
A.2 Let cool 1 min.
A.3 Spin PMGI SF-11 at 4 kRPM for 30 sec. (R7)
A.4 Bake at 170 C 1 min., let cool
A.9 Spin SPR220-3.0 at 2.5 kRPM for 30 sec. (R4)
A.10 Bake at 110 C 1 min.
N2 blow dry before dispensing resist
use blue tape on backside of chip
B. Expose in stepper: 0.72 sec.
C. NO post-exposure bake
Post-exposure baking causes the PMGI to crack
D. Develop SPR220-3.0 in AZ 300 MIF for 1 min. agitating
slightly, DI rinse 1 min., N2 blow dry
269
E. Inspect in microscope
F. Deep UV ood expose 1000 W 10 min. with rotation
G. Develop SF-11 in 101 for 70 sec. agitating slightly, DI rinse
1 min., N2 blow dry
Repeat DUV expose/develop cycles until openings are
clear (usually 3x)
9.3 PEII O2 descum: 100 W, 300 mT, 30 sec.
9.4 Dektak step height: should be 4x implant depth
9.5 Send to Kroko for implant
9.6 When samples come back, strip photoresist in 1165 at 80 C (heat
1165 rst) for at least 30 min., rinse in ISO then DI, N2 blow dry
9.7 PEII O2 descum: 100 W, 300 mT, 30 sec.
9.8 Strip SiO2 protection layer in 10:1 DI:HF
IBD lms do not strip well in BHF
Use deposition dummy for time
10. Implant activation
10.1 Strip chrome (ICP 1 or 2):
A. Run CF4 /O2 clean 5 min. (recipe 106 in ICP 2)
B. Run Cr etch 2 min. without sample
15 W RF, 1.0 Pa
15 W RF, 1.37 Pa
both etch rates are around 0.6 nm/s
C. Load sample and etch 2 min. (until chrome is gone)
D. Unload sample
E. Run CF4 /O2 clean 5 min.
10.2 Remove SiO2
A. Remove SiO2 and native oxide in 10:1 DI:HF
B. DI rinse 1 min., N2 blow dry
10.3 Deposit SiO2 cap (immediately after SiO2 strip) (PlasmaTherm
PECVD)
Uncapped germanium decomposes upon anneal
A. Wet clean PlasmaTherm chamber and run 30 minute clean
( 30 CLNSO)
B. Load sample, deposit 50 nm SiO2 (standard recipe: SIO500)
270
10.4 Photograph in microscope

To compare before/after anneal color of implanted area
10.5 RTA 5 min. at 600 C in susceptor (AET RTA)
Thermocouple on top
2 min. ramp, 1 slm N2 ow
approx. 13 min. cool-down
10.6 Inspect in microscope for color change in implanted areas, anneal
again if necessary
10.7 Strip SiO2 cap in HF (not BHF), until hydrophobic (15 sec.),
DI rinse 1 min., N2 blow dry
11. Passivation and isolation
11.1 Ensure that photodetector mesa widths have been measured in
SEM prior to starting this step. SEM if necessary.
11.2 Clean sample
A. ACE/ISO/DI
Do the above two only if the sample has been in the SEM
after the preceding step
C. 50:1 DI:HF dip 1 min.
D. 15 sec. DI rinse, N2 blow dry
Do the HF dip immediately before using the ALD
11.3 Deposit SiO2 passivation layer on sample + dummy (Oxford ALD)
ALD silicon dioxide passivates the sidewalls better than PECVD
silicon dioxide
A. 50 cycles 300C SiO2 in plasma ( 5nm)
B. Measure dummy SiO2 thickness
11.4 Deposit SiO2 isolation layer (sample + dummy) (PlasmaTherm
PECVD)
A. Wet clean PlasmaTherm chamber, then run a ten minute
clean ( 10 CLNSO)
B. Load sample and dummy, deposit 250 nm SiO2 (standard
recipe: SIO2500)
11.5 Set dummy aside (do not discard/reuse/lose track of): this will
be used to calibrate the via etch.
12. BCB (Autostep200)
271
12.1 Take BCB 4024-40 out of freezer, let sit for 7 hours
One bottle per large (3x3) chip, half bottle for smaller pieces
12.2 Bake sample at 150 C 2 min., let cool
12.3 Spin AP-3000 at 3 kRPM for 30 sec. on solvent spinner
12.4 Bake at 115 C 1 min.
12.5 Spin BCB at 5000 RPM with a 300 RPM/s ramp for 1 min. (resist
spinner)
Use blue tape to prevent BCB from sticking to backside
12.6 Bake at 70 C 90 sec.
12.7 Expose 2.1 sec.
12.8 Post exposure bake 60 C 30 sec.
12.9 Develop (solvent spinner)
A.
B.
C.
D.
E.
Puddle DS2100 1:40 (keep applying as DS2100 evaporates)

Rinse with DS2100 while spinning at 500 RPM for 10 sec.
Ramp to 2500 RPM, spin dry for 30 sec. (No DI rinse)
Post develop bake 70 C 30 sec.
Inspect, repeat until pattern is clear
12.10 Dektak (expect 4-5 m BCB)

12.11 Inspect backside for errant BCB. Deform aluminum weighting dish
so that sample can be loaded into blue oven without backside BCB
touching anything.
12.12 Cure BCB (blue oven)
A. Turn on N2 at 100%
B. After 5 min. purge, load and run recipe 2
15 min. ramp to 90 C, soak 15 min.; 15 min. ramp
to 150 C, soak 2 hours; 90 min. ramp to 250 C, soak
2 hours; 30 min. ramp to 40 C, soak 15 min.; let cool to
room temperature.
C. Load sample. Make sure it sits at.
D. After the rst 5 min., turn N2 down to 60%
E. When recipe nishes, turn o N2 , take out sample
F. Inspect and Dektak (expect 3-4 m BCB)
13. Additional isolation and vias
13.1 Deposit second SiO2 isolation layer (sample + same dummy as in
previous steps) (PlasmaTherm PECVD)
272
A. Wet clean PlamsaTherm chamber and run 10 CLNSO

B. load sample, deposit 250 nm SiO2 (standard recipe: SIO2500)
13.2 Via lithography (Autostep200)
A. Dehydration bake
4 min. at 180 C if vias need to be smaller than on mask
1 min. at 110 C otherwise
30 sec. (R5)
C. Spin SPR955-CM-1.8 at 4 kRPM 30 sec.
E. Expose in Autostep200: focus oset -6 (-80 mV for manual
focus)
0.3 sec. to shrink vias
0.4 sec. otherwise
G. Develop in AZ 300 MIF for 1 min. agitating slightly, DI rinse
1 min., N2 blow dry
H. Flood expose in contact aligner 2 min.
This makes the photoresist slightly easier to remove after the
via etch
13.3 Via SiO2 dry etch (ICP 2)
C. Run SiO2 etch 3 min. without sample
Recipe 101 (SiOxVert): 40 sccm CHF3 , 900 W ICP, 200 W RF,
0.5 Pa
D. Load sample and dummy from previous steps and etch SiO2 .
The rate is 250 nm/min, under-etch 50 nm.
E. Unload sample
F. Run O2 clean 5 min. (recipe 103)
13.4 Via SiO2 wet etch (Wet bench)
A. 50:1 DI:HF etch remaining 50 nm SiO2 (5 min., calibrate
on dummy rst)
B. DI rinse 1 min., N2 blow dry
13.5 Strip photoresist
A. Strip resist in 1165 at 80 C (heat 1165 rst), rinse in ISO
then DI, N2 blow dry
273

14. Probe/contact metal deposition
14.1 Pre-metal clean/protect (PlasmaTherm PECVD)
These steps ensure that the photoresist adheres to the germanium
and keep the surface clean during the lithography
A. Gasonics recipe 7
This is necessary for ohmic silicon contacts, but may damage
the germanium
B. Clean PECVD chamber ( 10 CLNSO)
C. Load sample, deposit 10 nm SiO2 (standard recipe: SIO100)
14.2 Metal lithography (Autostep200)
A.
B.
C.
D.
E.
F.
G.
H.
I.
J.
K.
L.
M.
N.
Dehydration bake 200 C 5 min., let cool

Spin PMGI SF-11 at 4 kRPM for 30 sec. (R7)
Bake 180 C 1 min., let cool
Spin PMGI SF-11 at 4 kRPM for 30 sec. (R7)
Bake 180 C 2 min., let cool
Spin SPR220-3.0 at 2.5 kRPM for 30 sec. (R4)
Bake 115 C 90 sec.
Expose in Autostep200 0.72 sec.
NO post-exposure bake
Develop SPR220-3.0 in AZ 726 MIF for 60 sec. agitating
Inspect in microscope
Deep UV ood expose 1000 W 10 min. with rotation
Develop in 101 for 70 sec. agitating slightly, DI rinse 1 min.,
N2 blow dry
clear or until thin features begin to delaminate (usually
2x)
PEII O2 descum: 100 W, 300 mT, 30 sec.
Repeat as necessary until openings are completely clear
14.3 Metal deposition (Ebeam 1 or 3)

A. 50:1 DI:HF dip 1 min.
B. DI rinse 15 sec., N2 blow dry
C. Deposit 30/100/1000 nm Ni/Ti/Au
Pump to 1.5e-6
274
/s in
Keep Ni and Ti rate to 1
A/s, Au can go to 5 A
Ebeam 3 and 10 A/s in Ebeam 1

D. Lifto in 1165 at 80 C (heat 1165 rst), rinse in ISO then
DI, N2 blow dry
E. Inspect in microscope - look for metal strings
15. Heater deposition
15.1 Heater lithography (Autostep200)
A. Dehydration bake 200 C 5 min., let cool
B. Spin PMGI SF-11 at 4 kRPM for 30 sec. (R7)
C. Bake 180 C 2 min., let cool
PMGI is not absolutely necessary for the metal thickness deposited, but it makes the lifto cleaner. Without it, the NiCr
forms small balls that re-deposit on the sample during lifto.
D. Spin SPR955-1.8 at 4 kRPM for 30 sec. (R7)
E. Bake 90 C 90 sec.
F. Expose in Autostep200 0.4 sec.
G. NO post-exposure bake
H. Develop SPR955-1.8 in AZ 300 MIF for 60 sec. agitating
I. Inspect in microscope
J. Deep UV ood expose 1000 W 10 min. with rotation
K. Develop SF-11 in 101 for 70 sec. agitating slightly, DI rinse
1 min., N2 blow dry
clear (usually 1x)
L. PEII O2 descum: 100 W, 300 mT, 60 sec.
15.2 Dehydration bake 110 C, 1 min.
15.3 Heater deposition (Ebeam 1)
A. Deposit 6 nm Cr/12.5 nm Ni 4x (74 nm total)
B. Deposit 6 nm Cr (for 80 nm total)
Cr rate: 0.5
A/s
Ni rate: 1.0 A/s (lower if it spits)

15.4 Lift o
A. Lift o in ACE, rinse in ISO then DI, N2 blow dry
This will remove the NiCr and SPR955-1.8 but leave the SF11
B. Remove PMGI in 1165 at 80 C (heat 1165 rst) about 10
min., rinse in ISO then DI, N2 blow dry
275
C. PEII O2 descum: 100 W, 300 mT, 30 sec.

16. Contact anneal, if necessary (strip annealer or AET RTA)
This never decreased the contact resistance (for either silicon or
germanium contacts).
276

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Si Ge Photodiodes

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UNIVERSITY OF CALIFORNIA

Si/Ge photodiodes for coherent and analog

A Dissertation submitted in partial satisfaction of

UMI Number: 3612014

All rights reserved

The dissertation of Molly Piels is approved.

Professor Mark J. Rodwell

Professor Nadir Dagli

Professor Larry A. Coldren

Professor John E. Bowers, Chair

Si/Ge photodiodes for coherent and analog

Vita of Molly Piels

[6] M. Sysak, D. Liang, R. Jones, G. Kurczveil, M. Piels, M. Fiorentino,

[5] A. Beling, A. S. Cross, M. Piels, J. Peters, Y. Fu, Q. Zhou, J. E. Bowers,

Nanophotonics and Photonics in Switching, ser. OSA Technical

High-speed photodiodes have diverse applications in wireless and ber

Vita of Molly Piels . . . . . . . . . . . . . . . . . . . . . . . . . . . vii

Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . xii

Photodiode design trade-os . . . . . . . . . . . . . . . . . . .

Uni-traveling carrier absorber transport . . . . . . . . . . . . . 17

Bandwidth of UTC and PIN photodiodes . . . . . . . . . . . . 30

Transit time limit . . . . . . . . . . . . . . . . . . . . . 31

RC and transit-time limits . . . . . . . . . . . . . . . . 32

Analytical model for power handling . . . . . . . . . . . . . . 35

Saturation in PIN photodetectors . . . . . . . . . . . . 36

Relationship between Imax and I1dB . . . . . . . . . . . 39

Load voltage swing . . . . . . . . . . . . . . . . . . . . 42

Model verication and accuracy . . . . . . . . . . . . . 48

Numerical model for power handling . . . . . . . . . . . . . . 49

Numerical model results . . . . . . . . . . . . . . . . . 59

Infrared absorption in germanium . . . . . . . . . . . . 70

Excess optical loss . . . . . . . . . . . . . . . . . . . . 79

Practical limitations to transit time . . . . . . . . . . . . . . . 91

Experimental characterization of threading defects . . . . . . . 97

Dark current . . . . . . . . . . . . . . . . . . . . . . . 102

Minority carrier lifetime . . . . . . . . . . . . . . . . . 107

Process overview . . . . . . . . . . . . . . . . . . . . . . . . . 118

N-layer patterning . . . . . . . . . . . . . . . . . . . . . . . . 120

Germanium growth . . . . . . . . . . . . . . . . . . . . . . . . 122

Absorber doping . . . . . . . . . . . . . . . . . . . . . 123

Selective-area vs. non-selective epitaxy . . . . . . . . . 127

Metallization and vias . . . . . . . . . . . . . . . . . . . . . . 132

Processing summary . . . . . . . . . . . . . . . . . . . . . . . 134

Device design and fabrication . . . . . . . . . . . . . . . . . . 144

Diode impedance . . . . . . . . . . . . . . . . . . . . . 148

Transit time . . . . . . . . . . . . . . . . . . . . . . . . 152

Power handling . . . . . . . . . . . . . . . . . . . . . . . . . . 153

Thermal impedance . . . . . . . . . . . . . . . . . . . . . . . . 158

First generation . . . . . . . . . . . . . . . . . . . . . . . . . . 169

Design and fabrication . . . . . . . . . . . . . . . . . . 169

Dark current . . . . . . . . . . . . . . . . . . . . . . . 172

Diode impedance . . . . . . . . . . . . . . . . 176

Transit time . . . . . . . . . . . . . . . . . . . 178

Second generation . . . . . . . . . . . . . . . . . . . . . . . . . 180

Design and fabrication . . . . . . . . . . . . . . . . . . 180

Dark current . . . . . . . . . . . . . . . . . . . . . . . 183

Diode impedance . . . . . . . . . . . . . . . . 187

Transit time . . . . . . . . . . . . . . . . . . . 191

Voltage dependence . . . . . . . . . . . . . . 193

Power Handling . . . . . . . . . . . . . . . . . . . . . . 195

Receiver design and fabrication . . . . . . . . . . . . . . . . . 205

Waveguide routing . . . . . . . . . . . . . . . . . . . . 205

MMI design . . . . . . . . . . . . . . . . . . . . . . . . 209

Thermal phase tuners