STD17NF03L

N-CHANNEL 30V - 0.038 - 17A - DPAK/IPAK

STripFET POWER MOSFET
TYPE
STD17NF03L

VDSS

RDS(on)

ID

30V

<0.05

17A

TYPICAL RDS(on) = 0.038

EXCEPTIONAL dv/dt CAPABILITY
APPLICATION ORIENTED CHARACTERIZATION
ADD SUFFIX T4 FOR ORDERING IN TAPE &
REEL
ADD SUFFIX -1 FOR ORDERING IN IPAK
VERSION

DESCRIPTION
This Power Mosfet is the latest development of STMicroelectronics unique Single Feature Size stripbased process. The resulting transistor shows extremely high packing density for low on-resistance,
rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.

3
3
2

DPAK

IPAK

INTERNAL SCHEMATIC DIAGRAM

APPLICATIONS
DC-DC & DC-AC CONVERTERS
MOTOR CONTROL, AUDIO AMPLIFIERS
SOLENOID AND RELAY DRIVERS
AUTOMOTIVE ENVIRONMENT

ABSOLUTE MAXIMUM RATINGS

Symbol

Value

Unit

Drain-source Voltage (VGS = 0)

30

Drain-gate Voltage (RGS = 20 k)

30

Gate- source Voltage

20

ID

Drain Current (continuos) at TC = 25C

17

ID

Drain Current (continuos) at TC = 100C

12

Drain Current (pulsed)

68

Total Dissipation at TC = 25C

20

0.13

W/C

V/ns

200

mJ

VDS
VDGR
VGS

IDM ()
PTOT

Parameter

Derating Factor
dv/dt (1)

Peak Diode Recovery voltage slope

EAS (2)

Single Pulse Avalanche Energy

Tstg
Tj

Storage Temperature
Max. Operating Junction Temperature

() Pulse width limited by safe operating area

Aug 2000

65 to 175

175

(1) I SD 17A, di/dt 300A/s, VDD V (BR)DSS, Tj T JMAX.

(2) Starting T j=25C, ID=11A, V DD=15V

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STD17NF03L
THERMAL DATA
Rthj-case

Thermal Resistance Junction-case Max

7.5

C/W

Rthj-amb

Thermal Resistance Junction-ambient Max

62.5

C/W

Maximum Lead Temperature For Soldering Purpose

275

Tl

ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED)

OFF
Symbol
V(BR)DSS

Parameter
Drain-source
Breakdown Voltage

IDSS

Zero Gate Voltage

Drain Current (VGS = 0)

IGSS

Gate-body Leakage
Current (VDS = 0)

Test Conditions
ID = 250 A, VGS = 0

Min.

Typ.

Max.

30

Unit
V

VDS = Max Rating

VDS = Max Rating, TC = 125 C

10

100

nA

Max.

Unit

VGS = 20V

ON (1)
Symbol

Parameter

Test Conditions

Min.

Typ.

VGS(th)

Gate Threshold Voltage

VDS = VGS, ID = 250A

RDS(on)

Static Drain-source On
Resistance

VGS = 10V, ID = 8.5 A

0.038

0.05

VGS = 5 V, ID = 8.5 A

0.045

0.06

ID(on)

On State Drain Current

VDS > ID(on) x RDS(on)max,

VGS = 10V

17

DYNAMIC
Symbol
gfs (1)

2/9

Parameter
Forward Transconductance

Ciss

Input Capacitance

Coss

Output Capacitance

Crss

Reverse Transfer
Capacitance

Test Conditions
VDS > ID(on) x RDS(on)max,
ID =11A

VDS = 25V, f = 1 MHz, VGS = 0

Min.

Typ.

Max.

Unit

330

pF

90

pF

40

pF

STD17NF03L
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
td(on)
tr

Parameter
Turn-on Delay Time
Rise Time

Qg

Total Gate Charge

Qgs

Gate-Source Charge

Qgd

Gate-Drain Charge

Test Conditions

Min.

VDD = 15V, ID = 8.5A

RG = 4.7 VGS = 4.5V
(see test circuit, Figure 3)
VDD = 24V, ID = 17A,
VGS = 10V

Typ.

Max.

Unit

11

ns

100

ns

6.5

nC

3.6

nC

nC

SWITCHING OFF
Symbol
td(off)
tf

Parameter
Turn-off-Delay Time

Test Conditions

Min.

VDD = 15V, ID = 8.5A,

RG = 4.7, VGS = 4.5V
(see test circuit, Figure 3)

Fall Time

Typ.

Max.

Unit

25

ns

22

ns

Off-voltage Rise Time

Vclamp =24V, ID =17A

RG = 4.7, VGS = 4.5V

22

ns

tf

Fall Time

(see test circuit, Figure 5)

55

ns

tc

Cross-over Time

75

ns

tr(off)

SOURCE DRAIN DIODE

Symbol
ISD

Parameter

Test Conditions

Min.

Typ.

Source-drain Current

ISDM (1)

Source-drain Current (pulsed)

VSD (2)

Forward On Voltage

ISD = 17A, VGS = 0

trr

Reverse Recovery Time

ISD = 17A, di/dt = 100A/s,

VDD = 15V, Tj = 150C
(see test circuit, Figure 5)

Qrr
IRRM

Max.

Unit

17

68

1.5

30

ns

Reverse Recovery Charge

18

nC

Reverse Recovery Current

1.2

Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.

2. Pulse width limited by safe operating area.

Safe Operating Area

Thermal Impedence

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STD17NF03L
Output Characteristics

Transfer Characteristics

Transconductance

Static Drain-source On Resistance

Gate Charge vs Gate-source Voltage

Capacitance Variations

4/9

STD17NF03L
Normalized Gate Thereshold Voltage vs Temp.

Normalized On Resistance vs Temperature

Source-drain Diode Forward Characteristics

5/9

STD17NF03L
Fig. 1: Unclamped Inductive Load Test Circuit

Fig. 2: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuit For

Resistive Load

Fig. 4: Gate Charge test Circuit

Fig. 5: Test Circuit For Inductive Load Switching

And Diode Recovery Times

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STD17NF03L

TO-252 (DPAK) MECHANICAL DATA

mm

DIM.
MIN.

TYP.

inch
MAX.

MIN.

TYP.

MAX.

2.20

2.40

0.087

0.094

A1

0.90

1.10

0.035

0.043

A2

0.03

0.23

0.001

0.009

0.64

0.90

0.025

0.035

B2

5.20

5.40

0.204

0.213

0.45

0.60

0.018

0.024

C2

0.48

0.60

0.019

0.024

6.00

6.20

0.236

0.244

6.40

6.60

0.252

0.260

4.40

4.60

0.173

0.181

9.35

10.10

0.368

0.398

L2

0.8

0.031

L4

0.60

1.00

0.024

0.039

V2

0o

8o

0o

0o

P032P_B

7/9

STD17NF03L

TO-251 (IPAK) MECHANICAL DATA

mm

DIM.
MIN.

inch

TYP.

MAX.

MIN.

TYP.

2.4

0.086

MAX.
0.094
0.043

2.2

A1

0.9

1.1

0.035

A3

0.7

1.3

0.027

0.051

0.64

0.9

0.025

0.031

B2

5.2

5.4

0.204

0.212

B3

0.85

B5

0.033

0.3

0.012

B6

0.95

0.037

0.45

0.6

0.017

0.023

C2

0.48

0.6

0.019

0.023

6.2

0.236

0.244

6.4

6.6

0.252

0.260

4.4

4.6

0.173

0.181

15.9

16.3

0.626

0.641

9.4

0.354

0.370

L1

0.8

1.2

0.031

L2

0.8

0.047

0.031

0.039

A1

C2

A3

B3

=
=

B2

B5

B6

L2

L1

0068771-E

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STD17NF03L

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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