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Li Ni u
Ngy nay,khoa hc cng ngh ngy cng pht trin.
Cng vi s pht trin cng ngh t ng ho ngy cng
c u tin u t nghin cu pht trin.i a s cc lnh vc
sn xut, iu khin ,gim st, do lng,..du c trang b
h thng iu khin h thng t ng ho. Mt trong s vi
mch c s dng d l K thut Vi iu khin. Nh tnh
nng u vit ca b vi iu khin nh : kh nng lp trnh ph
hp vi thiwts k nh v ln cng nh giao tip vi cc thit b
ngoi vi v my tnh s em li s hon ho, chnh xc v
tnh mn do cao.
Vi iu khin qun l v iu khin hot ng ca h
thng thng qua phn mn, nh vy ta c th thay i v
m rng hot ng mt cch d dng. Vi iu khin hot
ng theo chng trnh np sn, c cc tn hiu t bn
ngoi a vo sau lu tr v x l, trn c s a ra cc
thng bo, tn hiu iu khin cc thit b bn ngoi hot
ng theo ng thng s v yu cu ca h thng. Ngoi ra
vi iu khin cng c mt nhiu trong cc sn phm cong
nghip v tiu dung.
hiu c phn no v chc nng v ng dng ca vi
diu khin nhm em chon thc hin ti Thit k m
hnh Voltmet in t hin th bng mn hnh tinh
th lng (LCD).
c s hng dn tn tnh ca thy Nguyn Anh
Dng trong thi gian hc tp chng em bit c rt nhiu
kin thc v lp trnh vi iu khin.Chng em tin rng
nhng kin thc ny s gip ch rt nhiu cho cng vic sau
ny.
Nhng do lng kin thc c hn, nn trong qu trnh tm
hiu v tI chng em cn c rt nhiu thiu st v hn
ch nn rt mong nhn c s ch bo v ng gp ca
thy chng em hon thnh tt hn.
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Chng em xin chn thnh cm n!

Sinh vin thc hin: Bi Duy
Tun
Nguyn Th
Lan

Mc Lc
Chng

I:

Gii

thiu

chung

vi

iu

khin3... 4
I.Gii

thiu

chung

vi

iu

iu

khin

khin.4
II.Gii

thiu

chung

vi

80514
1. Kin

trc

phn

cng5
2. Chc

nng

cc

chn.6
3. Cc

thanh

ghi.....................................................................................
......9

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4. Hot

ng

ca

nh

thi...10
5. Hot

ng

ca

port

ni

tip...11
Chng

II:

Voltmet

hin

th

LCD12
I.

thuyt.13
1. Giao

tip

vi

ADC

0804...13
2. Giao

tip

vi

LCD15
II.

Nguyn

hot

ng-

mch...20
1. Nguyn

hot

ng.20
2. S

mch

nguyn

..21
3. S

phng

...22
III.

Chng

trnh

iu

khin...22
Chng

III:

kt

lun 30

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Nhn Xt Ca Gio Vin

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................................................................................................

Chng I
Gii thiu chung v b vi iu khin

I.Gii thiu chung v b vi iu khin:

B vi iu khin vit tt l Micro-contronller, l mch
tch hp trn mt chp c th lp trnh c, dng iu
khin hot ng ca h thng. Theo cc tp lnh ca ngi
lp trnh, b vi iu khin tin hnh c, lu tr thng tin,
x l thng tin, o lng thi gian v tin hnh c m mt
c cu no .
Trong cc thit b in v in t dn dng, thit b t
ng ho cc b vi iu khin, iu khin hot ng ca
cc thit b ny...Trong h thng sn xut t ng, b vi
iu khin c s dng trong iu khin robot, dy
chuyn t ng Cc h thng cng thng minh th vai tr
ca vi iu khin cng quan trng
II. Gii thiu cung v b vi iu khin 8051(89S52)

H vi iu khin 8051 (cn gi l h C51) l mt trong

nhng h vi iu khin thng dng nht. y l cc b vi
iu khin 8bits, c kin trc theo kiusn xut theo cng
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ngh CMOS, Mt s loi vi iu khin thuc h 8051 thng

dng c th k ra : AT89C2051(20 chn), AT89C4051(20
chn), AT89C51(40 chn), AT89C52(40 chn), AT89S51(40
chn), AT89S52(40 chn), AT89S53(40 chn)...
Trong chng trnh mn hc ny chng ta tp trung
nghin cu v b vi iu khin 89S52. y l mt b vi
iu khin thng dng, gi r c kh nhiu chc nng hay
c bit l c tch hp sn b np trn chip gip sinh vin c
th d dng t thc hin cc bi th nghim vi chi ph rt
thp.
C th h vi iu khin 8051 c cc c im sau :
-8 kbyte ROM (c lp trnh bi nh sn xut ch c
8051 )
-256 byte RAM
-4 port I/0 8 bit
-3 b nh thi 16 bit
-Giao tip ni tip
-64 KB khnh gian b nh d liu m rng
-mt b vi x l(thao tc trn cc bit n)
-210 bit c a ch ho b nhn/chia 4us
a).Kin trc phn cng ca 8051
Phn chnh ca vi iu khin 8051 l b vi x l trung
tm(CPU: central processing unit) bao gm:
- Thanh ghi tch lu A
-Thanh ghi tch lu ph B, dng cho php nhn v php
chia
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- n v logic hc (ALU: arithmetic logical unit)

- T trng thi chng trnh (PSW: program status word
- Bn bng thanh ghi
- con tr ngn xp

Hnh 1.1 : S khi 89s52

n v x l trung tm nhn trc tip xung t b dao
ng, ngoi ra cn c kh nng a mt tn hiu gi nhp t
bn ngoi.Chng trnh ang chy c th cho dng li nh
mt khi iu khin ngt bn trong. Cc ngun ngt c
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th l: cc bin c bn ngoi, s trn ca b m nh

thi hoc cng c th l giao din ni tip.ba b nh thi
16 Bit hot ng nh mt b m.
Cc cng(Port 0, Port 1 Port 2 Port 3). S dng vo mc
ch iu khin.
cng 3 c thm cc ng dn iu khin dng trao
i vi b nh bn ngoi, hoc u ni giao din ni
tip, cng nh cc ng ngt dn bn ngoi.
Trong vi iu khin 8051 c hai thnh phn quan trng
khc l b nh v cc thanh ghi:
B nh gm c b nh RAM v b nh ROM dng lu tr
d liu v m lnh. Cc thanh ghi s dng lu tr thng
tin trong qu trnh x l. Khi CPU lm vic n thay i ni
dung cc thanh ghi.
b). Chc nng cc chn ca vi iu khin 8051

1. Port 0.
Port 0 gm 8 chn, ngoi chc nng xut nhp ra, Port 0
cn l Bus a hp d liu v a ch (AD0-AD7), chc nng
ny s c s dng khi 89S52 giao tip vi cc thit b ngoi
c kin trc Bus.
Hnh 2.4. Cu trc ca cc chn trn
port 0

2. Port 1.
i vi 8051, chc nng duy nht ca Port 1 l chc nng
xut nhp, cng nh cc Port khc, Port 1 c th xut nhp
theo bit v theo byte.
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Hnh 2.2. Cu trc ca cc chn trn port 1 v port 3.

Ring dng 89Sxx, 4 chn P1.4, P1.5, P1.6, P1.7 c dng
np ROM theo chun ISP, 2 chn P1.0 v P1.1 c dng
cho b Timer 2. Trn hnh 2.3 l mt s kt ni 89S52 vi
cng song song np chng trnh (file m - *.hex) t my
tnh.
Trn s ny cc ng dn DO, DI, SCK, RTS ln lt l
cc ng dn d liu ln my tnh, xung ni tip t my
tnh, ng dn xung Clock v ng dn xung Reset t my
tnh xung sau khi np xong chng trnh.

3. Port 2.
Port 2 c hai tc dng, hoc lm nhim v l cng xut
nhp, hoc l phn byte cao ca bus a ch 16-bit cho cc
thit k h thng cn nhiu hn 256 byte b nh ngoi.

Hnh 2.7. Cu trc ca cc chn trn port

2

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4. Port 3
Mi chn trn Port 3 ngoi chc nng xut nhp cn c mt
chc nng ring, c th nh sau:
Bit
Chn
chc nng
P3.0
RXD
D liu nhn cho port ni tip
P3.1
TXD
D liu pht cho port ni tip
P3.2
INTO
Ngt bn ngoi 0
P3.3
INT1
Ngt bn ngoi 1
P3.4
TO
Ng vo timer/counter 0
P3.5
T1
Ng vo ca timer/counter 1
P3.6
WR
Xung ghi b nh d liu ngoi
P3.7
RD
Xung c b nh d liu
ngoi.

5. PSEN (Program Store Enable ).

Chn ny thng c ni vi chn cho php xut /OE
(Output Entable) ca EPRROM (hoc ca ROM) cho php
c cc byte lnh. Tn hiu /PSEN lgic 0 trong sut thi
gian tm np lnh. Cc m nh phn ca chng trnh
(opcode) c c t EPROM, qua bus d liu v c cht vo
thanh ghi lnh IR ca 8051 c gii m!. Khi thc thi mt
chng trnh trong ROM ni, /PSEN c duy tr lgic
6. ALE (Address Latch Enable ).
L tn hiu xut ra gii a hp bus a ch v bus
d liu. Trong 1/2 chu k u b nh, chn ALE xut tn
hiu cht a ch (byte thp ca bus a ch 16 bit)
vo thanh ghi ngoi khi ta s dng port 0 lm byte thp a ch.
Trong 1/2 chu k b nh cn li port 0 s xut/nhp d liu.
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Tn hiu ALE c tn s bng 1/6 tn s ca mch dao ng

bn trong chip vi iu khin v c th lm xung clock cho cc
phn cn li ca h thng (trng hp ngoi l khi thc hin
lnh MOVX, mt xung ALE (vs c /PSEN) s b b qua). Chn
ALE cn c dng nhp xung ng vo lp trnh cho
EPROM hoc Flash ROM trn chip i vi chip c loi ROM
ny.
7. EA (External Access) .
Chn ny c ni ln 5V khi thc thi chng trnh trong ROM
ni v c ni t khi thc thi chng trnh b nh ngoi. Ch
i vi cc chip khng c ROM ni /EA phi c ni t. Cc
chip h 8051 c EPROM cn nhn chn /ALE lm chn
nhn in p cp in 12V cho vic lp trnh (np) cho
EPROM ni.
8. RST (Reset).
Dng thit lp li trng thi ban u ca h thng hay gi
tt l reset h thng
khi c treo mc logic l t nht 2 chu k my. Cc thanh
ghi bn trong ca 8051
c np cc gi tr thch hp cho vic khi ng li h thng.

c). Cc thanh ghi:

1. Cc thanh ghi Port xut nhp:
Cc Port cua 8051 bao gm port 0 a ch 80H.port1
da ch 90H,port2 a ch A0H v port 3 a ch
B0H.Tt c cc port du c a ch ho tng bit .iu
cung cp mt kh nng giao tip thun li.
2.Cc thanh ghi TIMER:
8051 cha 2 b nh thi m 16bit c dng trong
vic nh thi hoc m s kin.Timer0 a ch
8AH(TLO:byte thp) v 8CH (THO:byte cao)Timer1 a ch
8BH (TL1 byte thp)v 8DH(TH1:byte cao).Vic vn hnh ca
Timer c set bi thanh ghi Timer MODE(TMOD) a ch
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89H c thanh ghi iu khin timer(TCON) a ch

88H.Ch c TCON c a ch ho tng bit.
3.Cc thanh ghi Port ni tip:
8051 cha mt port ni tip trn chip dnh cho vic trao
i thng tin vi cc thit b ni tip nh my tnh, Modern
hoc cho vic giao tip vi cc IC khc c giao tip ni tip
(c b chuyn i A/D,cc thanh ghi dch...). Mt thanh ghi
gi la b m d liu ni tip (SBUF) a ch 99H s d
c hai vai tr truyn v nhn d liu.Khi truyn d liu th
ghi ln SBUF, khi nhn d liu th c SBUF. Cc MODE vn
hnh khc nhau c lp trnh qua thanh ghi diu khin Port
ni tip (SCON) c da ch ho tng bit a ch 98H.
4.Cc thanh ghi ngt :
8051 c cu trc 5 ngun ngt , 2 mc u tin.Cc ngt b
cm sau khi reset h thng v s c cho php bng vic
thanh ghi cho php ngt (IE) a ch 8AH. C hai thanh
ghi c a ch ho tng bit.

5.Hot ng ca b nh thi(timer)
8051 c 3 timer 16 bit, mi timer c 4 cch lm vic. Ngi
ta s dng cc timer :
.nh khong thi gian
.m s kin
.To tc BAUD cho Port ni tip trong 8051
+:Thanh ghi ch timer(TMOD)
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Thanh ghi TMOD cha 2 nhm 4bit dng t ch d lm

vic cho timer0 v timer1.

+Thanh ghi iu khin timer(TCON)

Thanh ghi TCON cha cc bit trng thi v cc bit iu
khin cho timer 0 v timer 1.
C. Cc ch timer.
- .Ch 0,ch timer 13bit
tng thch vi 8048(c trc 8051), ba bit cao ca
TLX(TL0 /hoc TL1) khng dng
- ch 1-ch timer 16bit.
Hot ng nh timer 16 bit y .C bo trn la bit TFx
trong TCON c th c hoc ghi bng phn mm .
MSB ca gi tr trong cc thanh ghi timer l bit7 ca THx v
LBS l bit 0 ca TLx .Cc thanh ghi timer (TLx/THx)c th c
hoc ghi bt c lc no bng phn mm.

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bo trn
- Ch 2 ch 8 bit t np li
TLx hot ng nh mt

timer 8 bit,trong khi THx vn

gi nguyn gi tr c np .Khi s m trn t ffH n

00H,khng nhng c timer c set m gi tr trong THx
ng thi c np vo TLx .Vic m tip tc t gi tr na
n ffH xung 00Hv np li...CH ny rt thng dng v
s trn timer sy a trong khong thi gian nht nh v tun
hon khi khi ng TMOD v THx.
- Ch 3 ch tch timer
Timer 0 tch lm 2 titmer 8 bit (TL0&TH0) ,TL0 c c bo
trn l TF0 v TH0 c c bo trn l TF1 .
Timer 1 ngng ch 3 , nhng c th c khi ng bng
cch chuyn sang ch khc Gii hn duy nht l c bo
trn TF1 khng cn b tc ng khi timer 1 b trn v n
c ni ti TH0.
Khi timer 0 ch 3 c th cho timer 1 chy v ngng
bng cch chuyn n ra ngoi v vo ch 3 . N vn c
th c s dng bng port ni tip nh b to tc baund
hoc n c th c s dng bng bt c cch no khng cn
ngt (v n khng cn c ni vi TF1).
6. Hot ng port ni tip.
Cc ch hot ng ca PORT ni tip
Port ni tip c 4 ch hot ng :
1) Ch 0 :
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2) Ch 1 :
3) Ch 2 :
4) Ch 3 :
7. Cc ngt ca 8051:
Cc ngt Timer.
Cc ngt cng ni tip.
Cc ngt ngoi.

Chng II:
Voltmet hin th LCD
I. Giao tip vi ADC 0804:
Chp ADC (b chuyn vi ADC bin i tng t s) vi
8051.
1. Cc thit b ADC:
Cc b chuyn i ADC thuc trong nhng thit b c s
dng rng ri nht thu d liu. Cc my tnh s s dng
cc gi tr nh phn, nhng trong th gii vt l th mi i lng dng tng t (lin tc). Nhit , p sut (kh hoc
cht lng), m v vn tc v mt s t trng nhng i lng vt l ca th gii thc m ta gp hng ngy. Mt i lng
vt l c chuyn v dng in hoc in p qua mt
thit b c gi l cc b bin i. Cc b bin i cng
c th c coi nh cc b cm bin. Mc d ch c cc b
cm bin nhit, tc , p sut, nh sng v nhiu i lng
t nhin khc nhng chng u cho ra cc tn hiu dng dng
in hoc in p dng lin tc. Do vy, ta cn mt b
chuyn i tng t s sao cho b vi iu khin c th c
c chng. Mt chp ADC c s dng rng ri l ADC 804.
2. Chp ADC 804:

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Chp ADC 804 l b chuyn i tng t s trong h

cc lot ADC 800 t hng National Semiconductor. N cng c
nhiu hng khc sn xut, n lm vic vi +5v v c
phn gii l 8 bt. Ngoi phn gii th thi gian chuyn
i cng l mt yu t quan trng khc khi nh gi mt b
ADC. Thi gian chuyn i c nh ngha nh l thi gian
m b ADC cn chuyn mt u vo tng t thnh mt
s nh phn. Trong ADC 804 thi gian chuyn i thay i
ph thuc vo tn s ng h c cp ti chn CLK v CLK
IN nhng khng th nhanh hn 110s. Cc chn ca ADC 804
c m t nh sau:
1. Chn CS - chn chp: L mt u vo tch cc mc
thp c s dng
kch hot chp ADC 804. truy cp ADC 804 th chn
ny phi mc thp.
2. Chn RD (c): y l mt tn hiu u vo c tch
cc mc thp.
Cc b ADC chuyn i u vo tng t thnh s nh
phn tng ng vi n v gi n trong mt thanh ghi trong.
RD c s dng nhn d liu c chuyn i u ra
ca ADC 804. Khi CS = 0 nu mt xung cao - xung - thp c p n chn RD th u ra s 8 bt c hin din cc
chn d liu D0 - D7. Chn RD cng c coi nh cho php
u ra.
3. Chn ghi WR (thc ra tn chnh xc l Bt u
chuyn i). y l
chn u vo tch cc mc thp c dng bo cho ADC
804 bt u qu trnh chuyn i. Nu CS = 0 khi WR to
ra xung cao - xung - thp th b ADC 804 bt u chuyn
i gi tr u vo tng t Vin v s nh phn 8 bt. Lng
thi gian cn thit chuyn i thay i ph thuc vo
tn s a n chn CLK IN v CLK R. Khi vic chuyn i
d liu c hon tt th chn INTR c p xung thp bi
ADC 804.
4. Chn CLK IN v CLK R.
Chn CLK IN l mt chn u vo c ni ti mt
ngun ng h ngoi khi ng h ngoi c s dng to
ra thi gian. Tuy nhin 804 cng c mt my to xung ng
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h. s dng my to xung ng h trong (cng cn c gi

l my to ng h ring) ca 804 th cc chn CLK IN v
CLK R c ni ti mt t in v mt in tr nh ch ra trn
hnh 12.5. Trong trng hp ny tn s ng h c xc nh
bng biu thc:
f

1
1,1RC

gi tr tiu biu ca cc i lng trn l R = 10k v C=

150pF v tn s nhn c l f = 606kHz v thi gian chuyn
i s mt l 110s.

Hnh 12.5: Kim tra ADC 804 ch chy t do.

5. Chn ngt INTR (ngt hay gi chnh xc hn l kt
thc chuyn i).
y l chn u ra tch cc mc thp. Bnh thng n
trng thi cao v khi vic chuyn i hon tt th n
xung thp bo cho CPU bit l d liu c chuyn i
sn sng ly i. Sau khi INTR xung thp, ta t CS =
0 v gi mt xung cao 0 xung - thp ti chn RD ly d liu
ra ca 804.
6. Chn Vin (+) v Vin (-).
y l cc u vo tng t vi sai m Vin = Vin (+) - Vin
(-). Thng thng Vin (-) c ni xung t v Vin (+) c dng
nh u vo tng t c chuyn i v dng s.
7. Chn VCC.
y l chn ngun nui +5v, n cng c dng nh in
p tham chiu khi u vo Vref/2 (chn 9) h.
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8. Chn Vref/2.
Chn 9 l mt in p u vo c dng cho in p
tham chiu. Nu chn ny h (khng c ni) th in p
u vo tng t cho ADC 804 nm trong di 0 n +5v
(ging nh chn VCC). Tuy nhin, c nhiu ng dng m u
vo tng t p n Vin cn phi khc ngoi di 0 n 5v.
Chn Vref/2 cdng thc thi cc in p u vo khc
ngoi di 0 - 5v. V d, nu di u vo tng t cn phi l
0 n 4v th Vref/2 c ni vi +2v.
9. Cc chn d liu D0 D7.
Cc chn d liu D0 D7 (D7 l bt cao nht MSB v
D0 l bt thp nht LSB) l cc chn u ra d liu s. y
l nhng chn c m ba trng thi v d liu c chuyn
i ch c truy cp khi chn CS = 0 v chn RD b a
xung thp. tnh in p u 18auk c th s dng
cng thc sau:
D out

V in
kich thuoc buoc

Vi Dout l u ra d liu s (dng thp phn). Vin l

in p u vo tng t v phn di l s thay i
nh nht c tnh nh l (2 Vref/2) chia cho 256 i vi ADC
8 bt.
10.
Chn t tng t v chn t s.
y l nhng chn u vo cp t chung cho c tn
hiu s v tng t. t tng t c ni ti t ca chn Vin
tng t, cn t s c ni ti t ca chn Vcc. L do m
ta phi c hai t l cch ly tn hiu tng t Vin t cc
in p k sinh to ra vic chuyn mch s c chnh xc.
Trong phn trnh by ca chng ta th cc chn ny c ni
chung vi mt t. Tuy nhin, trong thc t thu o d liu
cc chn t ny c ni tch bit.
T nhng iu trn ta kt lun rng cc bc cn phi
thc hin khi chuyn i d liu bi ADC 804 l:
a) Bt CS = 0 v gi mt xung thp ln cao ti chn WR
bt u chuyn i.
b) Duy tr hin th chn INTR . Nu INTR xung thp th
vic chuyn i c hon tt v ta c th sang bc k

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tip. Nu
thp.

INTR cao

n mn

tip tc thm d cho n khi n xung

3. Kim tra ADC 804.

Chng ta c th kim tra ADC 804 bng cch s dng
s mch trn. thit lp ny c gi l ch kim tra
chy t do v c nh sn xut khuyn cao nn s dng.
Hnh 12.5 trnh by mt bin tr c dng cp mt
in p tng t t 0 n 5V ti chn u vo.
Vin(+) ca ADC 804 cc u ra nh phn c hin th
trn cc n LED ca bng hun luyn s. Cn phi lu rng
trong ch kim tra chy t do th u vo CS c ni ti
t v u vo WR c ni ti u ra INTR . Tuy nhin, theo
ti liu ca hng National Semiconductor nt WR v INTR
phi c tm thi a xung thp k sau chu trnh cp ngun
bo m hot ng.
Cc bc lp trnh cho ADC
Cc bc chuyn d liu t u vo ca ADC vo b vi
iu khin nh sau:
1. Chn mt knh tng t bng cch to a ch A, B v C
2. Kch hot chn ALE (cho php cht a ch Address
Latch Enable). N cn xung thp ln cao cht a ch.
3. Kch hot chn SCbng xung cao xung thp bt u
chuyn i.
4. Hin th OEC bo kt thc chuyn i. u ra cao xung - thp bo rng d liu c chuyn i v cn
phi c ly i.
5. Kch hot OE cho php c d liu ra ca ADC. Mt xung
cao xung thp ti chn OE s em d liu s ra khi chp
ADC.
Lu rng trong ADC khng c ng h ring v do vy
phi cp xung ng b ngoi n chn CLK. Mc d tc
chuyn i ph thuc vo tn s ng h c ni n CLK
nhng n khng nhanh hn 100ms.

II. Giao tip LCD:

M t cc ch hot ng ca cc LCD v sau m

t cch lp trnh v phi ghp mt LCD ti 8051.
1. Hot ng ca LCD.
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Trong nhng nm gn y LCD ang ngy cng c s

dng rng ri thay th dn cho cc n LED (cc n LED 7
on hay nhiu on). l v cc nguyn nhn sau:
- Cc LCD c gi thnh h.
- Kh nng hin th cc s, cc k t v ho tt hn
nhiu so vi cc n LED (v cc n LED ch hin th c
cc s v mt s k t).
- Nh kt hp mt b iu khin lm ti vo LCD lm gii
phng cho CPU cng vic lm ti LCD. Trong khi n LED
phi c lm ti bng CPU (hoc bng cch no ) duy
tr vic hin th d liu.
- D dng lp trnh cho cc k t v ho.
2. M t cc chn ca LCD.
LCD c ni trong mc ny c 14 chn, chc nng ca
cc chn c cho trong bng 12.1. V tr ca cc chn c
m t trn hnh 12.1 cho nhiu LCD khc nhau.
1. Chn VCC, VSS v VEE: Cc chn VCC, VSS v VEE: Cp dng ngun - 5v v t tng ng th VEE c dng
iu khin tng phn ca LCD.
2. Chn chn thanh ghi RS (Register Select):
C hai thanh ghi rt quan trng bn trong LCD, chn RS
c dng chn cc thanh ghi ny nh sau: Nu RS = 0 th
thanh ghi m lnh c chn cho php ngi dng gi mt
lnh chng hn nh xo mn hnh, a con tr v u dng
v.v Nu RS = 1 th thanh ghi d liu c chn cho php
ngi dng gi d liu cn hin th trn LCD.
3. Chn c/ ghi (R/W):
u vo c/ ghi cho php ngi dng ghi thng tin ln
LCD khi R/W = 0 hoc c thng tin t n khi R/W = 1.
4. Chn cho php E (Enable):
Chn cho php E c s dng bi LCD cht thng
tin hin hu trn chn d liu ca n. Khi d liu c cp
n chn d liu th mt xung mc cao xung thp phi
c p n chn ny LCD cht d liu trn cc chn
d liu. Xung ny phi rng ti thiu l 450ns.
5. Chn D0 - D7:
y l 8 chn d liu 8 bt, c dng gi thng tin
ln LCD hoc c ni dung ca cc thanh ghi trong LCD.
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hin th cc ch ci v cc con s, chng ta gi cc

m ASCII ca cc ch ci t A n Z, a n f v cc con s t
0 - 9 n cc chn ny khi bt RS = 1.
Cng c cc m lnh m c th c gi n LCD
xo mn hnh hoc a con tr v u dng hoc nhp
nhy con tr. Bng 12.2 lit k cc m lnh.
Chng ta cng s dng RS = 0 kim tra bt c bn
xem LCD c sn sng nhn thng tin. C bn l D7 v
c th cc khi R/W = 1 v RS = 0 nh sau:
Nu R/W = 1, RS = 0 khi D7 = 1 (c bn 1) th LCD bn
bi cc cng vic bn trong v s khng nhn bt k thng tin
mi no. Khi D7 = 0 th LCD sn sng nhn thng tin mi. Lu
chng ta nn kim tra c bn trc khi ghi bt k d liu no
ln LCD.
M t cc chn ca LCD.
Chn
1
2
3
4

K hiu
VSS
VCC
VEE
RS

I/O
I

R/W

6
7
8
9
10
11
12
13
14

E
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7

I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O

M t
t
Dng ngun 5v
Cp ngun iu khin phn
RS = 0 chn thanh ghi lnh. RS
= 1 chn thanh d liu
R/W = 1 c d liu. R/W = 0
ghi
Cho php
Cc bt d liu
Cc bt d liu
Cc bt d liu
Cc bt d liu
Cc bt d liu
Cc bt d liu
Cc bt d liu
Cc bt d liu

Bng Cc m lnh LCD.

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Hnh : Cc v tr chn ca cc LCD khc nhau ca

Optrex.
3. Gi cc lnh v d liu n LCD vi mt tr.
gi mt lnh bt k t bng 12.2 n LCD ta phi
a chn RS v 0. i vi d liu th bt RS = 1 sau gi
mt sn xung cao xung thp n chn E cho php
cht d liu trong LCD. iu ny c ch ra trong on m
chng trnh di y (xem hnh 12.2).
gi thi gian tr trc khi gi d liu/ lnh k tip.
Chn P1.0 n P1.7 c ni ti chn d d liu D0 - D7 ca
LCD.
Chn P2.0 c ni ti chn RS ca LCD.
Chn P2.1 c ni ti chn R/W ca LCD.
Chn P2.2 c ni n chn E ca LCD.

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LCD

8051

D0

VCC

D7
RS

P1.0

+5v
10K
POT

VEE
R/W

VSS

P1.0
P2.1
P2.2

Hnh : Ni ghp LCD.

4. Gi m lnh hoc d liu n LCD c kim tra c
bn.
on chng trnh trn y ch ra cch gi cc lnh
n LCD m khng c kim tra c bn (Busy Flag). Lu rng
chng ta phi t mt tr ln trong qu tnh xut d
liu hoc lnh ra LCD. Tuy nhin, mt cch tt hn nhiu l
hin th c bn trc khi xut mt lnh hoc d liu ti LCD.
Lu rng trong chng trnh c bn D7 ca thanh ghi
lnh. c thanh ghi lnh ta phi t RS = 0, R/W = 1 v
xung cao - xung - thp cho bt E cp thanh ghi lnh cho
chng ta. Sau khi c thanh ghi lnh, nu bt D7 (c bn)
mc cao th LCD bn v khng c thng tin (lnh) no c
xut n n ch khi no D7 = 0 mi c th gi d liu
hoc lnh n LCD. Lu trong phng pht ny khng s
dng tr thi gian no v ta ang kim tra c bn trc
khi xut lnh hoc d liu ln LCD.
Bng d liu ca LCD.
Trong LCD ta c th t d liu vo bt c ch no. di
y l cc v tr a ch v cch chng c truy cp.
RS
0

E/W
0

DB7
1

DB6
A

DB5
A

DB4
A

DB3
A

DB2
A

DB1
A

DB0
A

Khi AAAAAAA = 0000000 n 0100111 cho dng lnh

1 v AAAAAAA = 1100111 cho dng lnh2. Xem bng 12.3.
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Bng : nh a
DB7
Dng 1 (min)
1
Dng 1 (max) 1
Dng 2 (min)
1
Dng 2 (max) 1

n mn

ch cho LCD.
DB6 DB5 DB4
0
0
0
0
1
0
1
0
0
1
1
0

DB3
0
0
0
0

DB2
0
1
0
1

DB1
0
1
0
1

DB0
0
1
0
1

Di a ch cao c th l 0100111 cho LCD. 40 k t

trong khi i vi CLD 20 k t ch n 010011 (19 thp
phn = 10011 nh phn). rng di trn 0100111 (nh
phn) = 39 thp phn ng vi v tr 0 n 39 cho LCD
kch thc 40 2.
T nhng iu ni trn y ta c th nhn c cc
a ch ca v tr con tr c cc kch thc LCD khc nhau.
Xem hnh 12.3 ch rng tt c mi a ch u dng
s Hex. Hnh 12.4 cho mt biu ca vic phn thi gian
ca LCD. Bng 12.4 l danh sch lit k chi tit cc lnh v
ch lnh ca LCD.
80 81 82 83 84 85 86 Throu 8F
16 2 LCD
C0 C0 C2 C3 C4 C5 C6 gh
CF
Throu
gh
80 81 82 83 Through 93
20 1 LCD
80 81 82 83 Through 93
20 2 LCD
C0 C0 C2 C3 Through D3
80 81 82 83 Through 93
20 4 LCD
C0 C0 C2 C3 Through D3
94 95 96 97 Through A7
D4 D5 D6 D7 Through E7
80 81 82 83 Through A7
20 2 LCD
C0 C0 C2 C3 Through E7
Note: All
data is in
hex.
Hnh: Cc a ch con tr i vi mt s LCD.

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Hnh : Phn khe thi gian ca LCD.

II. Nguyn l hot ng s mch :

1.Nguyn l hot ng:
Mch Voltmet hin th LCD c tc dng xc nh gi tr
ca in p hin th trn LCD. Mch gm 3 khi c bn l
khi ngun, khi vi iu khin , v khi hin th. Khi ngun
dng mt b chnh lu cu v IC 7805, khi ngun c tc dng
n nh ngun in p cp cho mch. Khi Vi iu khin
dng ADC 0804 l IC bin i tn hiu tng t ( y l gi
tr in p hai u ca in ti R10W) sang tn hiu
dng s 8 bit v a vo port 0 ca IC 89S52. IC89S52 s c
gi tr ca ADC0804 a vo v kt hp vi c cc chn
thang o chn P0.1 , chn P0.2 v chn P0.3 tnh ra gi
tr c 2 u tr ti.Qua tnh c gi tr dng in qua
ti v hin th bng LCD.
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2.s mch nguyn l

Linh kin cn dng bao gm:
1 IC AT89S52
1 ADC 0804
1 Switch chuyn mch kp
1
1

Thch anh 11,0592 MHz

Nt nhn Reset

in tr , t v cc linh kin khc km theo.

S mch nguyn l :

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n mn

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S m phng mch:

IV.

Chng trnh iu khin:

S dng trnh dch C Kiel v3 lp trnh cho IC

AT89S52:
#include<stdio.h>
#include<reg52.h>
int t;
unsigned long x;
sbit WR_ADC = P3^4;
sbit RD_ADC = P3^5;
sbit INTR_ADC = P3^3;
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sbit RS = P1^0;
sbit RW = P1^1;
sbit EN = P1^2;
unsigned long volt;
sbit t1 = P3^0;
sbit t2 = P3^1;
sbit t3 = P3^2;
void tre_ms(unsigned char t)
{
unsigned char i;
TMOD=0x01;
for(i=1;i<=t;i++)
{
TH0=-1000/256;
TL0=-1000%256;
TR0=1;
while(!TF0);
TF0=TR0=0;
}
}
void tre(unsigned char t)
{
unsigned char i;
for(i=0;i<t;i++);
}
void kt_coban(void)
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{
unsigned char y;
P2=0xFF;
RS=0;
RW=1;
do
{
EN=1;
tre(10);
EN=0;
y=P2;
y=y&0x80;
}
while(y!=0x80);
}
void ghilenh(unsigned char lenh)
{
kt_coban();
tre_ms(100);
P2=lenh;
RS=0;
RW=0;
EN=1;
tre(10);
EN=0;
tre(10);
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}
void ghikitu(unsigned char kitu)
{
kt_coban();
tre_ms(100);
P2=kitu;
RS=1;
RW=0;
EN=1;
tre(10);
EN=0;
}
void ghichuoi(char *s)
{
while(*s)
{
ghikitu(*s);
s++;
}
}
void ghi_so_thuc2(unsigned long number)
{
int j,m;
unsigned char M[10];
j=0;
while(number!=0)
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{
M[j] = number%10;
number /= 10;
j++;
}
m=j-1;
if(m <= 2 )
{
while(m++<4)
M[m] = 0;
}
for(j=m; j>=0; j--)
{
if(j == 2)
ghikitu(',');
ghikitu(M[j]+0x30);
}
}
void khoitao(void)
{
ghilenh(0x01);
ghilenh(0x0f);
ghilenh(0x38);
void main()
{
khoitao();
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tre_ms(100);
ghilenh(0x01);
ghichuoi("DO AN MON VDK");
tre_ms(100);
ghilenh(0xc0);
ghichuoi("VOLMET LCD");
for(t=0;t<=6;t++)
{tre_ms(100);}
ghilenh(0x01);
ghichuoi("LOP DT2-K9");
for(t=0;t<=6;t++)
{tre_ms(100);}
ghilenh(0xc0);
ghichuoi("NHOM SVTH:");
for(t=0;t<=6;t++)
{tre_ms(100);}
ghilenh(0x01);
ghichuoi("BUI DUY TUAN");
for(t=0;t<=6;t++)
{tre_ms(100);}
ghilenh(0xc0);
ghichuoi("NGUYEN THI LAN");
for(t=0;t<=6;t++)
{tre_ms(100);}
ghilenh(0x01);
ghichuoi("THANG DO: ");
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RD_ADC = 0;
WR_ADC = 0;
INTR_ADC = 1;
tre_ms(15);
P0 = 0xff;
while(1){
ghilenh(0x80+9);
WR_ADC = 0;
tre(3);
WR_ADC = 1;
while (!INTR_ADC);
x=P0;
if(t1 == 0){
ghichuoi("5V");
volt = x*5000/255;
}
if(t2 == 0){
ghichuoi("25 V");
volt = x*5*5000/255;
}
if(t3 == 0){
ghichuoi("250V");
volt = x*50*5000/255;
}
ghilenh(0xc0);
ghilenh(0x0c); //Bat hien thi ,tat con tro
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ghi_so_thuc2(volt);
ghilenh(0xc0+7);
ghikitu('V');
}
}

Chng III
Kt lun
nh gi cc u, nhc im, tnh thc t ca sn phm
thit k v hng ci tin, pht trin.
1.u im,nhc im:
Voltmet hin th LCD c th o c nhiu thang o khc
nhau v gi tr o c c hin th trn LCD ln r rng
kim tra v iu chnh.
Mch do s dng IC ring l nn sai s ln,gi thnh cao,cha
kinh t.
Voltmet hin th LCD ch to v s dng kh n gin ln c s dng rng di trong thc t.

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