Licf

Linear Integrated Circuits
and Filters
Dr. Abdul Latif
Department of Telecommunication
https://sites.google.com/a/faculty.muet.edu.pk/abdullatif
Linear Integrated Circuits & Filters
Dr. Abdul Latif
Syllabus
Operational Amplifiers:
Basics, Mathematical Operations, Practical Considerations, Differentiators &
Integrators, Single Supply Biasing & Norton Amplifiers, Analysis of OPAMP Action, OP-AMP Specifications: Interpreting OP-AMP Data Sheet,
Offset Voltage and Current, Temperature Rating, Output Swing, CMRR,
Slew Rate.
Integrated Circuits:
Precision Rectifiers, Peak Detectors, Comparators, Clampers, Sample &
Hold Circuit, Digital to Analog to Digital Converters, Oscillators and
Integrated Timers.
Department of Telecommunication, MUET UET Jamshoro
Dr. Abdul Latif
Syllabus
Filter Design:
Filter Response Terminology; Second Order Filter Functions; Low Pass;
High Pass; Band Pass; Notch; and All Pass. Examples of passive Filter
Circuits: Low Pass; High Pass; Band Pass Notch, and All-pass Examples for
a Band Pass Filter. Circuit for Single Amplifier Biquad Filters. Circuit
Sensitivity. Generalized Impedance Converter Based Biquads and Integrator
Based Biquads. Comparison of Biquad realizations. Butterworth
Approximation, Chebychev Approximation.
1.
2.
3.
Clayton G.B, Operational Amplifiers, 3rd Ed., Newnes-Butterworth,

London, 2004.
Thomas Floyd, Electronic Devices 6th ED., Maxwell MacMillan
International, 2004.
Burr Brown, Product Data Book, 2004.
Teaching Plan
S. No.
Dr. Abdul Latif

Topic
No. of Lectures
required
1
2
3
4
5
6
Introduction to Integrated Circuit and Filters

Basics of Operational Amplifiers
Interpreting Op-amp Data sheet
Specification of Op-amp
Common Mode Rejection Ratio , Slew Rate
Op-amp Frequency response , Gain Bandwidth product
1
2
1
3
2
1
Inverting, Non Inverting & voltage follower Circuit With Design problems
Summer, Differential Op-Amp & Its Design Problems+ Class Test# 01
Differentiators, Integrators & Its Design Problems
10
11
12
13
14
15
16
17
18
19
2
2
1
2
1
1
2
2
2
3
21
Logarithmic, Anti Logarithmic Amplifier & Its Design Problems

Precision Rectifiers
Peak Detectors
Comparators, Schmitt trigger and voltage limiter using op-amp
Clampers
Sample & Hold circuit
D/A Converters+ Class Test # 02
A/D Converters
Oscillators
Integrated Timer
Introduction to Filters (Filters Basic Terminology + Filter Response
Terminology)
Butterworth, Chebyshav, Elliptic, and Bessel Approximation
22
First & Second Order Lowpass and Highpass Filters
23
First & Second Order Bandpass and Bandstop Filters + Class Test # 03
Total Lectures
2
42
20
2
2
Dr. Abdul Latif
Aims & Objectives

Aims: This course aims to provide the basic knowledge of
Integrated Circuits and the designing of various Filters.
Introduced the students with operational amplifiers and their
function and uses. To provide the knowledge about various
filter designs, terminology and types of filters.
Objectives
After the completion of this course the students should be able
to:
Understand the basic operation of (OP-AMP) and its
applications.
Read the specification of OP-AMP & Filters.
Know the basics of analog filters and its design &
operation.
Dr. Abdul Latif
Marking Methodology
Marks Distribution
Final Exam
10
10
Mid Term Exam
60
20
Test
Attendance
Dr. Abdul Latif
Introduction to Linear Integrated Circuits

What is a circuit?
An integrated circuit
Linear Integrated Circuit

Discrete Circuits
Dr. Abdul Latif

Initially there were discrete circuits.
Discrete Circuits consisted of separately manufactured
components (e.g. resistors, capacitors, diodes, transistors etc.)
joined by wires or plated conductors on printed boards.
Disadvantages
Large circuits leading to Large space requirements
Reliability, due to number of soldered points
Dr. Abdul Latif

Microelectronics
Advent of Micro-Electronics in 1950s
Microelectronics is the branch of electronics engineering
which deals with micro-circuits.
A micro-circuit is simply a miniature assembly of electronic
components.
For example: Integrated circuit, generally abbreviated as IC.
An integrated circuit has various components such as
resistors, capacitors, diodes, transistors etc. fabricated on a
small semiconductor chip
Dr. Abdul Latif

Advantages
Ever increasing demand of industries for electronic
equipment,
smaller size,
lighter weight and low power requirements,
Also a high degree of reliability.
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Dr. Abdul Latif

Integrated circuit
A circuit in which circuit components such as transistors,
diodes, resistors, capacitors etc. are automatically part of a
small semiconductor chip.
The size of an IC is extremely small (0.2 mm X 0.2 mm).
In fact, ICs are so small that you normally need a microscope
to see the connections between the components.
No components of an IC are seen to project above the surface
of the chip.
All the components are formed within the chip.
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Dr. Abdul Latif

The individual components fabricated in an IC cannot be
removed or replaced.
It is possible to produce circuits containing many transistors,
diodes, resistors etc. on the surface of this small chip.
Integrated circuits free the equipment designer from the need
to construct circuits with individual discrete components such
as transistors, diodes and resistors.
Integrated Circuits have outclassed discrete circuits in a
number of ways.
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Dr. Abdul Latif

Integrated Circuit advantages
Increased reliability due to lesser number of connections.
Extremely small size due to the fabrication of various circuit
elements in a single chip of semi-conductor material.
Lesser weight & Space requirement due to miniaturized circuit
Low power requirements.
Greater ability to operate at extreme values of temperature.
Low cost because of simultaneous production of hundreds of alike
circuits on a small semiconductor wafer.
The circuit lay out is greatly simplified because integrated circuits
are constrained to use minimum number of external connections
Typically, this is about 10% of the space required by comparable
discrete assembly).
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Dr. Abdul Latif

Integrated Circuit disadvantages
If any component in an IC goes out of order, the whole IC has to be
replaced by the new one.
In an IC, it is neither convenient nor economical to fabricate
capacitances exceeding 30 pF.
Therefore, for high values of capacitance, discrete components
exterior to IC chip are connected.
It is not possible to fabricate inductors and transformers on the
surface of semi-conductor chip. Therefore, these components are
connected exterior to the semi-conductor chip.
It is not possible to produce high power ICs (greater than 10 W).
There is a lack of flexibility in an IC i.e., it is generally not possible
to modify the parameters within which an integrated circuit will
operate.
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and Filters
Dr. Abdul Latif
Dr. Abdul Latif
Difference between amplifier and operational amplifier (OP-
AMP)
Standard schematic diagram of OP-AMP is given below:
It has two input terminals, the inverting (-) input and the
noninverting (+) input, and one output terminal.
Dr. Abdul Latif

Most op-amps operate with two dc supply voltages, one
positive and the other negative, as shown in Figure (on
previous slide).
Ideal Op-Amp
It is much easier to understand and analyze the device from
an ideal point of view.
An ideal Op-Amp has:
infinite voltage gain
infinite bandwidth
infinite input impedance
zero output impedance
Dr. Abdul Latif

Op-amp characteristics are illustrated in figure below:
The input voltage, Vin, appears between the two input

terminals, and the output voltage is Av Vin.
Dr. Abdul Latif

Practical Op-Amp
Ideal IC Op-Amps can never be made.
Every device has limitations. So has IC Op-Amp regarding
voltage and current.
Characteristics of a practical op-amp:
very high voltage gain,
very high input impedance,
very low output impedance
Another practical consideration is that there is always noise
generated within the op-amp. Noise is an undesired signal that
affects the quality of a desired signal.
Dr. Abdul Latif

Internal Block Diagram of an Op-Amp
A typical op-amp is made up of three types of amplifier
circuits: a differential amplifier, a voltage amplifier, and a
push-pull amplifier, as shown in figure below:
At the input stage, differential amplifier provides amplification

of the difference voltage between the two inputs.
Dr. Abdul Latif

The second stage is usually a class A amplifier that provides
additional gain.
Some Op-Amps may have more than one voltage amplifier
stage.
A push-pull class B amplifier is typically used for the output
stage.
Dr. Abdul Latif

741 OP-AMP
In 1965 Fairchild Semiconductor introduced the A709 the
first widely used monolithic op amp.
An improved op amp known as the A741 appeared later.
It is inexpensive and easy to use.
It has become an industry standard.
Simplified schematic diagram of 741
is given on the next slide.
Dr. Abdul Latif
Dr. Abdul Latif

Input Signal Modes
Differential Mode
In the differential mode, either one signal is applied to an input
with the other input grounded or two opposite-polarity signals
are applied to the inputs.
When an op-amp is operated in the single-ended differential
mode, one input is grounded and a signal voltage is applied to
the other input, as shown in figure below:
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Dr. Abdul Latif

In the double-ended differential mode, two opposite-polarity
(out-of-phase) signals are applied to the inputs, as shown in
figure below:
Equivalently, the double-ended differential mode can be

represented by a single source connected between the two
inputs.
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Dr. Abdul Latif

Common Mode
In the common mode, two signal voltages of the same phase,
frequency, and amplitude are applied to the two inputs.
When equal input signals are applied to both inputs, they tend
to cancel, resulting in a zero output voltage.
This action is called common-mode rejection.
Its importance lies in the situation where an unwanted signal
appears commonly on both op-amp inputs.
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Dr. Abdul Latif

Common-mode rejection means that this unwanted signal will
not appear on the output and distort the desired signal.
Common-mode signals (noise) generally are the result of the
pick-up of radiated energy on the input lines, from adjacent
lines, the 50 Hz power line, or other sources.
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Dr. Abdul Latif

Op-Amp parameters
Common-Mode Rejection Ratio
Desired signals can appear on only one input or with opposite
polarities on both input lines. These desired signals are
amplified and appear on the output as previously discussed.
Unwanted signals (noise) appearing with the same polarity on
both input lines are essentially cancelled by the op-amp and do
not appear on the output.
The measure of an amplifiers ability to reject common-mode
signals is a parameter called the CMRR (common-mode
rejection ratio).
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Dr. Abdul Latif

Ideally, an op-amp provides a very high gain for differentialmode signals and zero gain for common-mode signals.
Practical op-amps, however, do exhibit a very small commonmode gain (usually much less than 1), while providing a high
open-loop differential voltage gain (usually several thousand).
The higher the open-loop gain with respect to the commonmode gain, the better the performance of the op-amp in terms
of rejection of common-mode signals.
The rejection of common-mode signals is the ratio of the openloop differential voltage gain, Aol, to the common-mode gain,
Acm. This ratio is the common-mode rejection ratio, CMRR.
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Dr. Abdul Latif
The CMRR is often expressed in decibels (dB) as
= 20
The open-loop voltage gain, Aol, of an op-amp is the internal

voltage gain of the device and represents the ratio of output
voltage to input voltage when there are no external
components.
Open-loop voltage gain can range up to 200,000 (106 dB).
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Dr. Abdul Latif
Example # 1
A certain op-amp has an open-loop differential voltage gain of
100,000 and a common-mode gain of 0.2. Determine the
CMRR and express it in decibels.
Solution: =100,000 and =0.2 therefore,
100000
=
=
= 500,000
0.2
Expressed in decibels (dB) as

=20 log(500,000)=114
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Dr. Abdul Latif

Slew Rate
The maximum rate of change of the output voltage in response
to a step input voltage is the slew rate of an op-amp.
The slew rate is dependent upon the high-frequency response
of the amplifier stages within the op-amp.
Slew rate is measured by op-amp circuit shown in fig:
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Dr. Abdul Latif

For a step input, the slope on the output is inversely
proportional to the upper critical frequency. Slope increases as
upper critical frequency decreases.
A pulse is applied to the input and the resulting ideal output
voltage is indicated in figure.
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Dr. Abdul Latif

The slew rate is expressed as
Where = + ( )
The unit of slew rate is volts per microsecond (V/s).
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Dr. Abdul Latif
EXAMPLE #02
The output voltage of a certain op-amp appears as shown in
Figure in response to a step input. Determine the slew rate.
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Dr. Abdul Latif
EXAMPLE #02
Solution:
The output goes from the lower to the upper limit in 1sec.
Since this response is not ideal, the limits are taken at the 90%
points, as indicated. So, the upper limit is +9V and the lower
limit is -9V.
The slew rate is
+9 9
=
=
= 18 /
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Dr. Abdul Latif

Maximum Output Voltage Swing (VO(p-p))
With no input signal, the output of an op-amp is ideally 0 V.

This is called the quiescent output voltage.
When an input signal is applied, the ideal limits of the peakto-peak output signal are Vcc.
In practice, however, this ideal can be approached but never
reached. VO(p-p) varies with the load connected to the opamp and increases directly with load resistance.
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Dr. Abdul Latif
Maximum
Output
Voltage Swing (VO(p-p))
It is the maximum positive or
negative peak output voltage that

can be obtained without wave
from clipping when quiescent
DC output voltage is zero.
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Dr. Abdul Latif
The maximum value that VBQ6

can be is +VCC, therefore:
VO <= +VCC VR1 VBEQ6

VSATQ6.
The minimum value that VO can

be is VEE, therefore:
VO >= VEE + VR2 + VBEQ7 +

VSATQ7.
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Dr. Abdul Latif

Input Offset voltage (VOS)
The ideal op-amp produces zero volts out for zero volts in.
In a practical op-amp, however, a small dc voltage, VOUT(error),
appears at the output when no differential input voltage is
applied.
Its primary cause is a slight mismatch of the base emitter
voltages of the differential amplifier input stage of an opamp.
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Dr. Abdul Latif

Input offset voltage drift
The input offset voltage drift is a parameter related to VOS that
specifies how much change occurs in the input offset voltage
for each degree change in temperature.
Typical values range anywhere from about 5 V per degree
Celsius to about 50 V per degree Celsius.
Usually, an op-amp with a higher nominal value of input offset
voltage exhibits a higher drift.
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Dr. Abdul Latif

Input Bias Current
The input bias current is the dc current required by the inputs
of the amplifier to properly operate the first stage.
By definition, the input bias current is the average of both
input currents and is calculated as follows:
1 + 2
=
2
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Dr. Abdul Latif

Input Impedance
Two basic ways of specifying the input impedance of an opamp are the differential and the common mode.
The differential input impedance is the total resistance between
the inverting and the noninverting inputs.
Differential impedance is measured by determining the change
in bias current for a given change in differential input voltage.
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Dr. Abdul Latif

The common-mode input impedance is the resistance between
each input and ground and is measured by determining the
change in bias current for a given change in common-mode
input voltage.
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Dr. Abdul Latif

Input bias Current
When no signal is applied to a DA, d.c. or quiescent conditions
prevail in the circuit.
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Dr. Abdul Latif

Input Offset Current
Ideally, the two input bias currents are equal, and thus their
difference is zero. In a practical op-amp, however, the bias
currents are not exactly equal.
The input offset current, IOS, is the difference of the input bias
currents, expressed as an absolute value.
= 1 2
Actual magnitudes of offset current are usually at least an
order of magnitude (ten times) less than the bias current.
In many applications, the offset current can be neglected.
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Dr. Abdul Latif

However, high-gain, high-input impedance amplifiers should
have as little IOS as possible because the difference in currents
through large input resistances develops a substantial offset
voltage.
The offset voltage developed by the input offset current is:
= 1 2 = 1 2
=
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Dr. Abdul Latif

The error created by IOS is amplified by the gain Av of the opamp and appears in the output as:
A change in offset current with temperature affects the error

voltage.
Values of temperature coefficient for the offset current in the
range of 0.5 nA per degree Celsius are common.
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Dr. Abdul Latif

Output Impedance
The output impedance is the resistance viewed from the output
terminal of the op-amp.
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Dr. Abdul Latif

Op-Amp Closed Loop and Closed Loop Gain
Consider the inverting amplifier a feedback amplifier
constructed with an op-amp
The open-circuit voltage gain (also called closed loop gain) of
this amplifier:
2
=
1
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Dr. Abdul Latif

Op-Amp Open Loop and Open Loop Gain
If the loop is broken, then we say the loop is open.
The gain (Aopen) for the open loop case is referred to as the
open-loop gain.
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Dr. Abdul Latif

Op-Amp Gain Bandwidth Product
Bandwidth-All electronic devices work only over a limited
range of frequencies. This range of frequencies is called
bandwidth.
GainBandwidth Product
The bandwidth of an OP-amp depends upon the closed-loop
gain of the OP-amp circuit.
One important parameter of Op-amp is gain-bandwidth
product (GBW).
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Dr. Abdul Latif

GainBandwidth:- Because of the internal compensation
circuitry included in an op-amp, the voltage gain drops off as
frequency increases.
The point at which the gain reduces to 1 as the unity-gain
frequency (f1) or unity-gain bandwidth (B1).
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Dr. Abdul Latif

Gain-bandwidth product (GBW) is defined as:
2 = =
where CL = closed-loop gain at frequency f2
= frequency at which the closed-loop gain is unity
The gain-bandwidth product of an OP-amp is an important
parameter because it can be used to find:
The maximum value of ACL at a given value of f2.
The value of f2 for a given value of ACL.
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Dr. Abdul Latif
Example # 01
An OP-amp has a gain-bandwidth product of 15 MHz.
Determine the bandwidth of OP-amp when ACL = 500. Also
find the maximum value of ACL when f2 = 200 KHz
15
2 =
=
= 30
500
Since the OP-amp is capable of operating as a d.c. amplifier,
bandwidth BW = 30 kHz.
15
=
=
= 75 37.5
2
200
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Dr. Abdul Latif
Example # 02
An OP-amp has a gain-bandwidth product of 1.5 MHz. Find
the operating bandwidth for the following closed-loop gains (i)
ACL = 1 (ii) ACL = 10 (iii) ACL = 100.
Bandwidth, BW=
For
For
For
1.5
=1, BW =
= 1.5
1
1.5
=10, BW =
= 150
10
1.5
=100, BW =
= 15
100
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Dr. Abdul Latif

Frequency Response of an OP-Amp
The operating frequency has a significant effect on the operation of
an OP-amp.
The following are the important points regarding the frequency
response of an OP-amp:
The maximum operating frequency of an OP-amp is given by:

=
2
Here Vpk is the peak output voltage.
Thus, the peak output voltage limits the maximum operating
frequency.
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Dr. Abdul Latif

When the maximum operating frequency of an OP-amp is
exceeded, the result is a distorted output waveform.
Increasing the operating frequency of an OP-amp beyond a
certain point will:
Decrease the maximum output voltage swing.
Decrease the open-loop voltage gain.
Decrease the input impedance.
Increase the output impedance.
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Dr. Abdul Latif
Example # 03
Determine the maximum operating frequency for the circuit
shown in Fig. The slew rate is 0.5 V/s.
Solution. The maximum peak output voltage (Vpk) is
approximately 8V. Therefore, maximum operating frequency
(fmax) is given by:

2
500
28
0.5 /
28
= 9.95 kHz
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Dr. Abdul Latif
Example # 04
The amplifier in above fig. is being used to amplify an input
signal to a peak output voltage of 100 mV. What is the
maximum operating frequency of the amplifier?
Solution.
The maximum operating frequency (fmax) of the amplifier is
given by:
=
0.5 /
20.1
= 500
= 796 kHz
20.1
The above examples show that an OP-amp can be operated at a
much higher frequency when being used as a small-signal
amplifier than when being used as a large-signal amplifier.
46

and Filters
Dr. Abdul Latif
Dr. Abdul Latif
Operational Amplifiers
Negative Feedback
Noninverting Amplifier and its Design
Voltage-Follower
Voltage-Follower Properties
Inverting Amplifier and its Design
Summing Amplifier, its design and its applications
Dr. Abdul Latif
Negative Feedback
Negative feedback is the process whereby a portion of the
output voltage of an amplifier is returned to the input with a
phase angle that opposes to the input signal.
Dr. Abdul Latif
Why Use Negative Feedback?
The inherent open-loop voltage gain of a typical op-amp is very high
(usually greater than 100,000).
Therefore, an extremely small input voltage drives the op-amp into its
saturated output states.
This state is non-linear so we have to make op-amp linear by limiting its
output.
For Example : Vin=1mV, Aol=100,000
Vout=Vin * Aol=1mV * 100,000=100 V
So output is limited to its maximum level.
Since the output level of an OP-amp can never reach 100 V, it is driven
deep into saturation and the device becomes non-linear.
With negative feedback, the closed loop voltage gain (Acl) can be reduced
and controlled so that the op-amp can function as a linear amplifier.
Dr. Abdul Latif
Noninverting Amplifier
The configuration of non-inverting Amplifier is closed-loop
configuration with a controlled amount of voltage gain.
Dr. Abdul Latif
The input signal is applied to the noninverting (+) input.
The output is applied back to the inverting input through the
feedback circuit (closed loop) formed by the input resistor Ri
and the feedback resistor Rf.
Resistors Ri and Rf form a voltage-divider circuit, which
reduces Vout and connects the reduced voltage Vf to the
inverting input.
Dr. Abdul Latif
The feedback voltage is expressed as
= (
)
+
The difference of the input voltage, Vin and the feedback
voltage Vf is the differential input to the op-amp.
This differential voltage is amplified by the open-loop Voltage
gain of the op-amp (Aol) and produces an output voltage
expressed as:
=
Dr. Abdul Latif
The attenuation, B, of the feedback circuit is
=
+
Substituting Vf = BVout, in the Vout equation,
So,
=
Then applying basic algebra,
=
Dr. Abdul Latif
=
+ =
(1 + ) =
Since the overall voltage gain of the amplifier is /, it
can be expressed as:
(1+ )
is much greater than 1 so we neglect 1, and eq: is,
=1/B

Dr. Abdul Latif
The closed-loop gain of the noninverting (NI) amplifier is the
reciprocal of the attenuation (B) of the feedback circuit
(voltage-divider).
() =
Therefore,
()
+
=
()
=1+
Or
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Dr. Abdul Latif
Example # 01
Determine the closed-loop voltage gain of the amplifier in
Figure
11
Dr. Abdul Latif
Solution:
This is a noninverting op-amp configuration. Therefore, the
closed-loop voltage gain is
() = 1 +
() = 1 +
100
=22.3
4.7
HW Problem: If Rf in Figure is increased to 150 k determine

the closed-loop gain.
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Dr. Abdul Latif
Input Impedance of Noninverting Amplifier
Assume a small differential voltage, Vd, exists between the two
inputs, as indicated.
This means that you cannot assume the op-amps input
impedance to be infinite or the input current to be zero.
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Dr. Abdul Latif
Express the input voltage as
= +
Substituting B Vout for the feedback voltage Vf, yields
= +
Remember, B is the attenuation of the negative feedback circuit and
is equal to B=Ri/(Ri + Rf).
Since
= + = 1 +
Now substituting Iin Zin for Vd,
= 1 +
Where Zin the open-loop input impedance of the op-amp (without
feedback connections).
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Dr. Abdul Latif
= 1 +
Vin/Iin is the overall input impedance of a closed-loop

noninverting amplifier configuration.
= 1 +
Output Impedance of Noninverting Amplifier
An expression for output
impedance of a noninverting
amplifier can be developed
with the aid of figure.
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Dr. Abdul Latif
Output Impedance of Noninverting Amplifier
An expression for output impedance of a noninverting
amplifier can be developed with the aid of figure.
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Dr. Abdul Latif
By applying Kirchhoffs voltage law to the output circuit,
=
The differential input voltage is Vd=Vin-Vf
Therefore, by assuming that

You can express the output voltage as

Substituting BVout for Vf,

Expanding and factoring yields

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Dr. Abdul Latif
+ 1 +
Since the output impedance of the noninverting amplifier
configuration is Zout(NI)=Vout/Iout, you can substitute IoutZout(NI)
for Vout; therefore,
= 1 + ()
Dividing both sides of the previous expression by Iout,

= 1 + ()
The term on the left is the internal output impedance of the opamp (Zout) because, without feedback, AolVin = Vout.
Therefore,
= 1 + ()
Thus
() =
1+
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Dr. Abdul Latif
Example 12.5
(a) Determine the input and output impedances of the amplifier
in Figure 1225. The op-amp datasheet gives:
=2 M, =75 , =200,000.
(b) Find the closed-loop voltage gain.
Solution (a) The attenuation, B, of the feedback circuit is
10
=
=
= 0.0435
+ 230
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Dr. Abdul Latif
= 1 + = 1 + 200,000 0.0435
=(1+8700)(2 M)=17.4 G
This is such a large number that, for all practical purposes, it
can be assumed to be infinite as in the ideal case.
75
=
=
= 8.6
1 +
1 + 8700
This is such a small number that, for all practical purposes, it
can be assumed to be zero as in the ideal case.
(b)
=1+
=1
220
+
10
= 23.0
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Dr. Abdul Latif
Voltage Follower
The voltage-follower configuration is a special case of the
noninverting amplifier where all of the output voltage is fed

back to the inverting input by a straight connection.
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Dr. Abdul Latif
Voltage Follower
The most important features of the voltage-follower
configuration are its very high input impedance and its very
low output impedance.
Input resistance Ri = Infinity
Output resistance Rf =zero
0
() = 1 +
=1+ =1
() = 1
A voltage follower is a op-amp circuit which has a voltage
gain of 1 (unity).
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Dr. Abdul Latif
Voltage Follower
It provides no amplification or attenuation to the signal.
A voltage follower acts as a isolating buffer for interfacing
high-impedance sources and low-impedance loads.
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Dr. Abdul Latif
Inverting Amplifier
The configuration of inverting Amplifier is closed-loop
configuration with a controlled amount of voltage gain.
An OP-amp has an infinite input impedance. This means that
there is zero current at the inverting input.
If there is zero current through the input impedance, then
there must be no voltage drop between the inverting and
noninverting inputs.
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Dr. Abdul Latif
Inverting Amplifier
This means that voltage at the inverting input () is zero
(point A) because the other input (+) is grounded.
The 0V at the inverting input terminal (point A) is referred to
as virtual ground.
The current I1 to the inverting input is zero. Therefore,
current Iin flowing through Ri entirely flows through
feedback resistor Rf.
In other words, If = Iin.
Now,
0
=
=
=
=
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Dr. Abdul Latif
Inverting Amplifier
and =
since If=Iin
Therefore voltage gain, =
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Dr. Abdul Latif
Example # 01
Given the op-amp configuration in Figure, determine the value
of Rf required to produce a closed-loop voltage gain of -100.
Solution
() =
=
= 100*2.2 k
= 220 k
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Dr. Abdul Latif
Inverting Amplifier
Input impedance
The input impedance for an
inverting amplifier is:

Output Impedance
As with a noninverting amplifier,
the output impedance of an
inverting amplifier is decreased
by the negative feedback. In fact,
the expression is the same as for
the noninverting case.
() =
1 +
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Dr. Abdul Latif
Summing Amplifier
Summing Amplifier: designs
A summing amplifier is an inverted OP-amp that can accept
two or more inputs.
The output voltage of a summing amplifier is proportional to
the negative of the algebraic sum of its input voltages.
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Dr. Abdul Latif
Summing Amplifier
When all the three inputs are applied, the output voltage is
Output voltage, = = 1 + 2 + 3
1 2 3
=
+
+
1 2 3
If R1 = R2 = R3 = R, then, we have,
=
1 + 2 + 3
Thus the output voltage is proportional to the algebraic sum of

the input voltages (of course neglecting negative sign).
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Dr. Abdul Latif
Summing Amplifier
A general expression for a unity-gain summing amplifier with
n inputs, where all resistors are equal in value is
= (1 + 2 + 3 + )
Summing amplifier with n inputs
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Dr. Abdul Latif
Summing Amplifier
Example 25.44. Determine the output voltage for the
summing amplifier in Fig. 25.72.
Solution:
All three input resistors are equal and each is equal to the
value of feedback resistor.
Therefore gain of the summing amplifier is 1.
= 1 + 2 + 3 = 3 + 1 + 8 = 12
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Dr. Abdul Latif
Summing Amplifier
Example 25.45. Determine the output voltage for the
summing amplifier shown in Fig. 25.73.
Solution. Rf = 10 k and R1 = R2 = R = 1 k. Therefore, gain
of the amplifier = Rf /R = 10 k/1k = 10.
Now =
1 + 2 =
10
0.2 + 0.5 = 7
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Dr. Abdul Latif
Summing Amplifier
Application of Summing Amplifiers
By proper modifications, a summing amplifier can be made to
perform many useful functions.
There are a number of applications of summing amplifiers.
However, we shall discuss the following two applications by
way of illustration:
1. As averaging amplifier
2. As subtractor
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Dr. Abdul Latif
Summing Amplifier as averaging amplifier

A summing amplifier can be made to produce the
mathematical average of the input voltages.
This is done by setting the ratio Rf /R equal to the reciprocal of
the number of inputs (n).
1
=

35
Dr. Abdul Latif

Example # 03
Show that the amplifier in Figure, produces an output whose
magnitude is the mathematical average of the input voltages.
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Dr. Abdul Latif

Solution
Since the input resistors are equal, The output voltage is
= Rf/R(1 + 2 + 3 + )
=-25k/100k (1+2+3+4)=1/4(10)=-2.5v
A simple calculation shows that the average of the input values

is the same magnitude as but of opposite sign.
10
() = 1+2+3+4
=
4
4 =2.5
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Dr. Abdul Latif
Summing Amplifier as Subtractor

A summing amplifier can be used to provide an output voltage
that is equal to the difference of two voltages. Such a circuit is
called a subtractor and is shown in Fig.
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Dr. Abdul Latif
Summing Amplifier as Subtractor

The voltage V1 is applied to a standard inverting amplifier that
has unity gain.
Because of this, the output from the inverting amplifier will be
equal to V1.
This output is then applied to the summing amplifier (also
having unity gain) along with V2.
Thus output from second OP-amp is given by:
= + = 1 + 2 = 1 2
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Dr. Abdul Latif
Differential Amplifier
Then differential amplifiers amplify the difference between two
voltages.
Differential amplifier is same as Subtractor Amplifier.
Consider the figure of differential amplifier.
To find the Vo (output voltage), superposition can be used.
According to figure,
1
1 =
1
2
2 =
2
1
=
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Dr. Abdul Latif
Then Summing point Va=Vb
And
4 )
= 2 ( +
2
If 2=0,
() = 1 (3 )
1
If 1=0,
() =
1 + 3
4
() = 2 ( + )(
)
2
4
1
= () + ()
1 + 3
3
4
= 1 + 2 ( + )(
)
1
2
4
1
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Dr. Abdul Latif
Case:1
If Resistors, R1 = R2 and R3 = R4 the transfer function for the
differential amplifier can be simplified to the following
expression:
3
=
(2 1 )
1
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Dr. Abdul Latif
Case:2
If all the resistors are all of the same ohmic value, that is: R1 =
R2 = R3 = R4 then the circuit will become a Unity Gain
Differential Amplifier and the voltage gain of the amplifier
will be exactly one or unity.
Then the output expression would simply be:
= (2 1 )
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Dr. Abdul Latif
The Op-Amp Integrator
Its Design + Examples
Practical integrator
The Op-Amp Differentiator
Its Design + Examples
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Dr. Abdul Latif
Op-Amp Integrators
An op-amp integrator simulates mathematical integration,
which is basically a summing process that determines the total
area under the curve of a function.
The feedback element is a capacitor that forms an RC circuit
with the input resistor.
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Dr. Abdul Latif
Op-Amp Integrators
Basics of Capacitor
The charge Q on a capacitor is proportional to the charging
current (IC) and the time (t).
=
Also, in terms of the voltage, the charge on a capacitor is:
=
From these two relationships, the capacitor voltage can be
expressed as:
=
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Dr. Abdul Latif
Op-Amp Integrators
Charging and discharging across capacitor
R=1 M for solid line and R=2 M for dashed line
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Dr. Abdul Latif
Op-Amp Integrators
The capacitor voltage in a simple RC circuit is not linear but is
exponential this is because the charging current continuously
decreases as the capacitor charges and causes the rate of
change of the voltage to continuously decrease.
The key thing about using an op-amp with an RC circuit to
form an integrator is that the capacitors charging current is
made constant, thus producing a straight-line (linear) voltage
rather than an exponential voltage.
The input current is:
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Dr. Abdul Latif
Op-Amp Integrators
The inverting input always remains at 0 V (Virtual ground),
therefore all of the input current go through the capacitor.
=
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Dr. Abdul Latif
Op-Amp Integrators
Since is constant, so is also constant.
The constant charges the capacitor linearly and produces a
linear voltage across C.
The positive side of the capacitor is held at 0 V by the virtual
ground of the op-amp.
The voltage on the negative side of the capacitor, which is the
op-amp output voltage, decreases linearly from zero as the
capacitor charges.
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Dr. Abdul Latif
Op-Amp Integrators
This voltage, VC, is called a negative ramp and is the
consequence of a constant positive input.
Vout is the same as the voltage on the negative side of the

capacitor.
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Dr. Abdul Latif
Op-Amp Integrators
Circuit analysis:
Since point A in Fig. 25.80 is at virtual ground, the virtualground equivalent circuit of operational integrator will be as
shown in Fig. 25.81.
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Dr. Abdul Latif
Op-Amp Integrators
Because of virtual ground and infinite impedance of the OPamp, all of the input current i flows through the capacitor i.e.
i = ic.
Now
(i)
Also voltage across capacitor is Vc=0-Vo=-Vo

Therefore,
(ii)
So from above two equations:
1
=
(iii)
(iv)
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Dr. Abdul Latif
Op-Amp Integrators
To find the output voltage, we integrate both sides of eq. (iv) to
get,
=
1

0
(v)
Eq. (v) shows that the output is the integral of the input with
an inversion and scale multiplier of 1/RC.
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Dr. Abdul Latif
Op-Amp Integrators
Output Voltage
If a fixed voltage is applied to the input of an integrator, eq. (v)
shows that the output voltage grows over a period of time, providing
a ramp voltage.
Eq. (v) also shows that the output voltage ramp (for a fixed input
voltage) is opposite in polarity to the input voltage and is multiplied
by the factor 1/RC.
As an example, consider an input voltage V1 = 1V to the integrator
circuit of Fig. 25.82 (i). The scale factor of 1/RC is
1
1
=
= 1
1 1
so that the output is a negative ramp voltage as shown in Fig. 25.82
(ii).
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Dr. Abdul Latif
Op-Amp Integrators
If the scale factor is changed by making R = 100 k, then,
1
1
=
= 10
100 1
and output is then a steeper ramp voltage as shown in Fig.
25.82 (iii).
Fig. 25.82
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Dr. Abdul Latif
Op-Amp Integrators
The integrator shown earlier has no feedback at 0 Hz.
This is a serious disadvantage in low-frequency applications.
By connecting a feedback resistor Rf in parallel with the
capacitor, precise closed-loop voltage gain is possible.
The circuit shown in Fig. 25.83 is an integrator with a
feedback resistor Rf to provide increased stability.
All integrators have a critical frequency fc below which they
do not perform proper integration.
If the input frequency is less than fc, the circuit behaves like a
simple inverting amplifier and no integration occurs.
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Dr. Abdul Latif
Op-Amp Integrators
The following equation is used to calculate the critical
frequency of an integrator:
=
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Dr. Abdul Latif
Op-Amp Integrators
Example 25.50. Fig. 25.84 (i) shows the OP-amp integrator
and the square wave input. Find the output voltage.
Solution. The output voltage of this circuit is given by:
1
=

0
Now RC=(100 k) (10 F)= 1 s

Therefore,
= 0
(i)
(ii)
Fig. 25.84
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Dr. Abdul Latif
Op-Amp Integrators
When we integrate a constant, we get a straight line.
In other words, when input voltage to an integrator is constant,
the output is a linear ramp.
Therefore, the integration of the square wave results in the
triangular wave as shown in Fig. 25.84 (ii).
Since the input to the integrator is applied to the inverting
input, the output of the circuit will be 180 out of phase with
the input.
Thus, when the input goes positive, the output will be a
negative ramp. When the input is negative, the output will be a
positive ramp. Fig. 25.84 (ii) shows this relationship.
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Dr. Abdul Latif
Op-Amp Integrators
Example # 02
Determine the rate of change of the output voltage in response
to the input square wave, as shown in Figure, The output
voltage is initially zero. The pulse width is 100 sec.
Describe the output and draw the waveform
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Dr. Abdul Latif
Op-Amp Integrators
Solution
The rate of change of the output voltage during the time that
the input is at +2.5 V (capacitor charging) is:
2.5
25
=
=
=

10 0.01
= 25 /
The rate of change of the output during the time that the input
is negative (capacitor discharging) is the same as during
charging except it is positive.
= 25 / sec
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Dr. Abdul Latif
Op-Amp Integrators
(b) When the input is at +2.5 V, the output is a negative-going
ramp. When the input is at -2.5V the output is a positive-going
ramp.
25
=
200 = 5
During the time the input is at +2.5 V, the output will go from
0 to -5.
During the time the input is at -2.5 the output will go from -5
to 0.
Therefore, the output is a triangular wave with peaks at 0V and
-5 as shown in figure.
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Dr. Abdul Latif
Op-Amp Integrators
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Dr. Abdul Latif
Practical Integrators
In a practical integrator, any dc error voltage due to offset error
will cause the output to produce a ramp that moves toward
either positive or negative saturation, even when no signal is
present.
the simplest solution is to use a resistor in parallel with the
capacitor in the feedback path.
In addition, a compensating
resistor, Rc, may be added to
the noninverting input to
balance the effects of
bias current.
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Dr. Abdul Latif

A differentiator is a circuit that performs differentiation of the
input signal.
In other words, a differentiator produces an output voltage that
is proportional to the rate of change of the input voltage.
Fig. 25.88
Fig. 25.89
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Dr. Abdul Latif

Its important application is to produce a rectangular output
from a ramp input.
Fig. 25.88 shows the circuit of OP-amp differentiator.
It consists of an OP-amp, an input capacitor C and feedback
resistor R.
Note how the placement of the capacitor and resistor differs
from the integrator. The capacitor is now the input element.
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Dr. Abdul Latif

Circuit analysis:
Since point A in Fig. 25.88 is at virtual ground, the virtualground equivalent circuit of the operational differentiator will
be as shown in Fig. 25.89.
Because of virtual ground and infinite impedance of OP-amp,
all the input current ic flows through the feedback resistor R
i.e. ic = iR.
=
Also
and = 0 =
=
=
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Dr. Abdul Latif

Circuit analysis:
Therefore
Or
Above eq. shows that output is the differentiation of the input with
an inversion and scale multiplier of RC.
If we examine above eq., we see that if the input voltage is constant,
dvi/dt is zero and the output voltage is zero. The faster the input
voltage changes, the larger the magnitude of the output voltage.
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Dr. Abdul Latif

Example 25.54. Fig. 25.90 (i) shows the square wave input to
a differentiator circuit. Find the output voltage if input goes
from 0V to 5V in 0.1 ms.
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Dr. Abdul Latif

Solution. Output voltage,
Now RC=(1 k)(0.1 F)=0.1103 s

Also,
5
0.1
= 5104 V/s
Therefore , vo=-(0.1103)(5104)=-5V
The signal quickly returns to zero as the input signal becomes
constant. The output will be as shown in Fig. 25.90 (ii).
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Dr. Abdul Latif

Example # 2 Determine the output voltage of the ideal op-amp
differentiator in figure.
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Dr. Abdul Latif

Solution
Starting at t=0, the input voltage is a positive-going ramp
ranging from -5 V to +5 V (a +10 V change) in 5 sec. Then it
changes to a negative-going ramp ranging from +5 V to -5 V
(a -10 V change) in 5 sec.
The time constant is
= 2.2 0.001 = 2.2 sec
Determining the slope or rate of change (VC/t) of the positivegoing ramp and calculating the output voltage as follows:
10
= 5 = 2 V/
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Dr. Abdul Latif
2V
=
2.2 = 4.4
= 4.4
Figure shows a graph of the

output voltage waveform
relative to the input.
74

and Filters
Dr. Abdul Latif
Dr. Abdul Latif
Logarithmic Amplifier
Its Design+Examples
Anti-Logarithmic Amplifier
Its Design+Examples
Comparator and Schmitt Trigger
Dr. Abdul Latif
The configuration of Logarithmic Amplifier is closed-loop
configuration in which we place a diode in the feedback loop
of an op-amp circuit.
A logarithmic (log) amplifier produces an output that is
proportional to the logarithm of the input.
Dr. Abdul Latif
The Diode in the feedback loop of an op-amp, produces a
logarithmic response.
The output voltage is a function of the logarithm of the input
voltage, as expressed by the following general equation:
=
where K is a constant and ln is the natural logarithm to the
base e.
Natural logarithm can be converted to a logarithm to the base
10, (Log10) using the relationship:
= 2.3 10
Dr. Abdul Latif
The semiconductor pn junction in the form of either a diode or
the base-emitter junction of a BJT provides a logarithmic
characteristic.
A diode has a nonlinear characteristic up to a forward voltage
of approximately 0.7 V.
Figure 1429 shows the characteristic curve, where VF is the
forward diode voltage and IF is the forward diode current.
Dr. Abdul Latif
FIGURE 1429
A portion of a diode (pn junction) characteristic curve (VF versus IF).
Dr. Abdul Latif
As it can be seen in the graph, the diode curve is nonlinear.
Not only is the characteristic curve nonlinear, it is logarithmic
and is specifically defined by the following formula:
=
Where is the reverse leakage current, q is the charge on an

electron, k is Boltzmanns constant, and T is the absolute
temperature in Kelvin.
Dr. Abdul Latif
From the previous equation, the diode forward voltage, VF can
be determined as follows. Take the natural logarithm (ln is the
logarithm to the base e) of both sides.
=
The of a product of two terms equals the sum of the of
each term.
=
= +
Dr. Abdul Latif
The difference of two terms equals the of the quotient of

the terms.
( ) =
Solving for VF :
= (
)(
)
Dr. Abdul Latif
Analysis of the feedback loop of the circuit, shown in figure
below.
Since the inverting input is at virtual ground (0 V), the output
is at -VF when the input is positive.
Since VF is logarithmic, so is Vout.
FIGURE 1430
A basic log amplifier using a diode as

the feedback element.
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Dr. Abdul Latif
An analysis of the figure is as follows, beginning with the fact
that = VF, = = 1
Substituting into the formula for VF ,
= (
)(
= (
)(
)
1
The term kT/q is a constant equal to approximately 25 mV at

25C. Therefore, the output voltage can be expressed as:
(0.025)( )
1
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Dr. Abdul Latif
Example # 148: Determine the output voltage for the log
amplifier in Figure 14-31, =50 .
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Dr. Abdul Latif
The input voltage and the resistor value are given in Figure
= (0.025)( )
1
= 0.025
2
10050
= 0.025
400
= 0.025 5.99
= 0.150
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Dr. Abdul Latif
Log Amplifier with a BJT
The base-emitter junction of a bipolar junction transistor
exhibits the same type of logarithmic characteristic as a diode
because it is also a pn junction.
A log amplifier with a BJT connected in a common-base form
in the feedback loop is shown in Figure 1432.
Notice that Vout with respect to ground is equal to -VBE.
The analysis for this circuit is the same as for the diode log
amplifier except that VBE replaces VF, IC replaces IF, and IEBO
replaces IR.
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Dr. Abdul Latif
The expression for the VBE versus IC characteristic curve is:
=
where IEBO is the emitter-to-base leakage current.
The expression for the output voltage is:
= (0.025)( )
1
FIGURE 1432
A basic log amplifier using a transistor

as the feedback element.
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Dr. Abdul Latif
Example # 149: What is Vout for a transistor log amplifier
with Vin=3 V and R1=68 k? Assume IEBO=40 nA.
Solution:
= 0.025
= 0.025
3
40 68
= 0.025 1103
=-175.1 mV
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Dr. Abdul Latif
The configuration of AntiLog Amplifier is closed-loop
configuration in which we place a diode in the input of an opamp circuit.
An Antilog amplifier produces an output that is proportional to
the Antilog of the input.
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Dr. Abdul Latif
The antilogarithm of a number is the result obtained when the
base is raised to a power equal to the logarithm of that number.
To get the antilogarithm, you must take the exponential of the
logarithm (antilogarithm of =) .
According to figure:
=
The previous eq: of forward current is:
=
Since = VF and due to virtual ground =
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Dr. Abdul Latif
The exponential term can be expressed as an antilogarithm as

follows:
)
= (
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Dr. Abdul Latif
Anti-Log Amplifier with a BJT
An antilog amplifier shown in Figure 1433. The exponential
formula still applies to the base-emitter pn junction.
The output voltage is determined by the current (equal to the
collector current) through the feedback resistor.
FIGURE 1433
A basic antilog amplifier
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Dr. Abdul Latif
=
The characteristic equation of the pn junction is:
=
Substituting into the equation for Vout,
=
As in Figure 1433, Vin=VBE,
=
The exponential term can be expressed as an antilogarithm as
follows:
21
Dr. Abdul Latif
)
= (
Since kT/q is approximately 25 mV,

= (25
)
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Dr. Abdul Latif
Example # 1410: For the antilog amplifier in Figure 1434,
find the output voltage. Assume IEBO = 40 nA.
Solution:
using the relation:
= (25
)
= 68 40 (175.1
25 )
= 68 40 (1101)=-3 V
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Dr. Abdul Latif
Application of Logarithmic Amplifier

In certain applications, a signal may be too large in magnitude
for a particular system to handle.
The term dynamic range is often used to describe the range of
voltages contained in a signal.
In these cases, the signal voltage must be scaled down by a
process called signal compression so that it can be properly
handled by the system.
If a linear circuit is used to scale a signal down in amplitude,
the lower voltages are reduced by the same percentage as the
higher voltages.
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Dr. Abdul Latif

Linear signal compression often results in the lower voltages
becoming obscured by noise and difficult to accurately
distinguish, as illustrated in Figure 1435(a).
In logarithmic signal compression, the higher voltages are
reduced by a greater percentage than the lower voltages, thus
keeping the lower voltage signals from being lost in noise.
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Dr. Abdul Latif
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Dr. Abdul Latif
Comparator
A comparator is a specialized nonlinear op-amp circuit that
compares two input voltages and produces an output state that
indicates which one (input) is greater.
Comparators are designed to be fast and frequently have other
capabilities to optimize the comparison function.
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Dr. Abdul Latif
Comparator
A comparator is an OP-amp circuit without negative feedback
and takes advantage of very high open-loop voltage gain of
OP-amp.
A comparator has two input voltages (noninverting and
inverting) and one output voltage.
Because of the high open-loop voltage gain of an OP-amp, a
very small difference voltage between the two inputs drives
the amplifier to saturation.
Consider an OP-amp having AOL = 100,000.
A voltage difference of only 0.25 mV between the inputs will
produce an output voltage of (0.25 mV) (100,000) = 25V.
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Dr. Abdul Latif
Comparator
However, most of OP-amps have output voltages of less than
15V because of their d.c. supply voltages.
Therefore, a very small differential input voltage will drive the
OP-amp to saturation. This is the key point in the working of
comparator.
Fig. 25.93 illustrates the action of a comparator.
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Dr. Abdul Latif
Comparator
The input voltages are v1 (signal) and v2 (reference voltage).
If the differential input is positive, the circuit is driven to saturation
and output goes to maximum positive value (+13V).
Reverse happens when the differential input goes negative i.e. now
output is maximum negative (-13V).
+Vsat = + Vsupply 2 = 15 2 = + 13V
Vsat = Vsupply + 2 = 15 + 2 = 13V
This circuit is called comparator because it compares v1 to v2 to
produce a saturated positive or negative output voltage.
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Dr. Abdul Latif
Comparator
A comparator circuit has the following two characteristics :
i. It uses no feedback so that the voltage gain is equal to the
open-loop voltage gain (AOL) of OP-amp.
ii. It is operated in a non-linear mode.
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Dr. Abdul Latif
Comparator
Applications of an op-amp used as a comparator:
As a square wave generator
As a zero-crossing detector
As a nonzero-level detector
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Dr. Abdul Latif
Comparator as square wave generator

A comparator can be used to produce a square wave output
from a sine wave input, as shown in figure on previous slide.
Note that inverting terminal () is grounded and signal (vin) is
applied to the noninverting terminal (+).
Since the gain of a comparator is equal to AOL, virtually any
difference voltage at the inputs will cause the output to go to
one of the voltage extremes (+Vsat or Vsat) and stay there until
the voltage difference is removed.
The polarity of the input difference voltage will determine to
which extreme (+Vsat or Vsat) the output of the comparator
goes.
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Dr. Abdul Latif
Comparator as zero-crossing detector

When one input of a comparator is connected to ground, it is
known as zero-crossing detector because the output changes
when the input crosses 0 V.
When the input signal is positive-going, the output is driven to
positive maximum value (i.e. +Vsat = +13 V).
When the input crosses the zero axis and begins to go
negative, the output is driven to negative maximum value (i.e.
Vsat = 13 V).
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Dr. Abdul Latif
Comparator as zero-crossing detector

From the input/output waveforms, you can see that every time
the input crosses 0V going positive, the output jumps to +13 V.
Similarly, every time the input crosses 0 V going negative, the
output jumps to 13 V.
Since the change (+13 V or 13 V) occurs every time the input
crosses 0 V, we can tell when the input signal has crossed 0 V.
Hence the name zero-crossing detector.
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Dr. Abdul Latif
Comparator as Nonzero-level detector

When a comparator is used to compare a signal amplitude to a
fixed d.c. level (reference voltage), the circuit is referred to as
a nonzero-level detector.
The zero-level detector can be modified to detect positive and
negative voltages by connecting a fixed reference voltage
source to the inverting input, as shown in Figure 132(a).
A more practical arrangement is shown in Figure 132(b)
using a voltage divider to set the reference voltage, VREF, as
follows:
2
=
+
1 + 2
where + V is the positive OP-amp d.c. supply voltage.
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Dr. Abdul Latif
37
Dr. Abdul Latif
FIGURE 132
Nonzero-level detectors.
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Dr. Abdul Latif

The circuit in Figure 13-2 (c) uses a zener diode to set the
reference voltage (VREF=VZ).
As long as Vin is less than VREF, the output remains at the
maximum negative level.
When the input voltage exceeds the reference voltage, the
output goes to its maximum positive voltage, as shown in
Figure 132(d) with a sinusoidal input voltage.
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Dr. Abdul Latif

Example 13-1: The input signal in Figure 133(a) is applied to
the comparator in Figure 133(b). Draw the output showing its
proper relationship to the input signal. Assume the maximum
output levels of the comparator are 14 V.
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Dr. Abdul Latif

The reference voltage is set by R1
and R2 as follows:
2
=
+
1 + 2
1.0
=
+15
8.2 + 1.0
= 1.63
As shown in Figure 134, each
time the input exceeds +1.63 V,
the output voltage switches to its
+14 V level, and each time the
input goes below +1.63 V, the
output switches back to its -14 V
level.
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Dr. Abdul Latif
Effect of Noise on Comparator

In many practical situations, noise (unwanted voltage
fluctuations) appears on the input line.
This noise voltage becomes superimposed on the input
voltage, as shown in Figure 135 for the case of a sine wave,
and can cause a comparator to erratically switch output states.
FIGURE 135
Sine wave with superimposed

noise.
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Dr. Abdul Latif

Consider a low-frequency sinusoidal voltage applied to the
noninverting (+) input of an op-amp comparator used as a
zero-level detector, as shown in Figure 136(a).
Part (b) of the figure shows the input sine wave plus noise and
the resulting output.
When the sine wave approaches 0, the fluctuations due to
noise may cause the total input to vary above and below 0
several times, thus producing an erratic output voltage.
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Dr. Abdul Latif
FIGURE 136
Effects of noise on comparator

circuit.
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Dr. Abdul Latif
Reducing the Effect of Noise by Hysteresis

An erratic output voltage caused by noise on the input occurs
because the op-amp comparator switches from its negative
output state to its positive output state at the same input
voltage level that causes it to switch in the opposite direction,
from positive to negative.
This unstable condition occurs when the input voltage hovers
around the reference voltage.
In order to make the comparator less sensitive to noise, a
technique incorporating positive feedback, called hysteresis,
can be used.
45
Dr. Abdul Latif

Hysteresis means that there is a higher reference level when
the input voltage goes from a lower to higher value than when
it goes from a higher to a lower value.
A good example of hysteresis is a common household
thermostat that turns the furnace on at one temperature and off
at another.
The two reference levels are referred to as the upper trigger
point (UTP) and the lower trigger point (LTP).
This two-level hysteresis is established with a positive
feedback arrangement, as shown in Figure 137.
46
Dr. Abdul Latif

Notice that the noninverting (+) input is connected to a
resistive voltage divider such that a portion of the output
voltage is fed back to the input.
The input signal is applied to the inverting (-) input in this
case.
FIGURE 137
Comparator with positive feedback

for hysteresis.
47
Dr. Abdul Latif

The basic operation of the comparator with hysteresis is
illustrated in Figure 138.
48
Dr. Abdul Latif

Assume that the output voltage is at its positive maximum, Vout
(max). The voltage fed back to the noninverting input is VUTP
and is expressed as:
2
=
+
1 + 2
FIGURE 138
Operation of a comparator with

hysteresis.
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Dr. Abdul Latif

When Vin exceeds VUTP, the output voltage drops to its
negative maximum, as shown in part (a).
Now the voltage fed back to the noninverting input is VLTP and
is expressed as:
2
=

1 + 2
The input voltage must now fall below VLTP , as shown in part
(b), before the device will switch from the maximum negative
voltage back to the maximum positive voltage.
This means that a small amount of noise voltage has no effect
on the output, as illustrated by Figure 138(c).
50
Dr. Abdul Latif
Schmitt Trigger
A comparator with built-in hysteresis is sometimes known as a
Schmitt trigger.
The amount of hysteresis is defined by the difference of the
two trigger levels.
=
51
Dr. Abdul Latif
Schmitt Trigger
Example 13-2: Determine the upper and lower trigger points
for the comparator circuit in Figure 139. Assume that
+Vout(max) = +5 V and - Vout(max) = -5V.
Solution:
2
=
+ = 0.5 5 = +2.5
1 + 2
2
=
= 0.5 5 = 2.5
1 + 2
52
Linear Integrat ed Circuits

and Filters
Dr. Abdul Latif
Dr. Abdul Latif
Peak Detector and its circuit Design
Clamper
Voltage limiter by using Op-Amp
Dr. Abdul Latif
Limitation of Conventional Rectifier
Diode is a nonlinear element used for rectifying the alternate
signal.
As long as input voltage reaches 0.7 V, the diode does not
conduct.
Input voltage must be greater than 0.7 V.
For the input between 0.7 V, the output remains zero which
is main limitation of conventional rectifier
Due to this, output is distorted and produces distortion during
this interval.
Dr. Abdul Latif
Therefore instead of diode, an op-amp is used in precision
rectifiers.
The open loop gain of Op-amp is high , for very small amount
of input, produces large output which can easily make the
diode conduct
Diode can conduct order of millivolts.
In many applications we want to operate at low voltages so we
use precision Rectifier.
Dr. Abdul Latif
Figure 17.33(a) shows a precision half-wave-rectifier circuit
consisting of a diode placed in the negative-feedback path of
an op amp, with R being the rectifier load resistance.
Figure 17.33 (a) The superdiode precision half-wave rectifier; (b) its
almost ideal transfer characteristic.
Dr. Abdul Latif
The circuit works as follows:
If 1 goes positive, the output voltage of an op-amp will go
positive and the diode will conduct, thus establishing a closed
feedback path between the op amps output terminal and the
negative input terminal.
This negative-feedback path will cause a virtual short circuit to
appear between the two input terminals of the op amp.
Thus the voltage at the negative input terminal, which is also
the output voltage 0, will equal to that at the positive input
terminal, which is input voltage I,
0 =
0
Dr. Abdul Latif
If I goes negative, the output voltage of an op-amp will go
negative, this will reverse bias the diode and no current will
flow through the resistance R, causing 0 to remain equal to 0
V.
Thus for I < 0, =0. since in this case the diode is off the opamp will be operating in an open loop and its output will be at
the negative saturation level.
Dr. Abdul Latif
Example 17.24: Consider the operational rectifier or
superdiode circuit of Fig. 17.33(a), with R = 1 k. For vI = 10
mV, 1 V, and 1 V, what are the voltages that result at the
rectifier output and at the output of the op amp? Assume that
the op amp is ideal and that its output saturates at 12 V. The
diode has a 0.7-V drop at 1-mA current, and the voltage drop
changes by 0.1 V per decade of current change.
Solution:
Dr. Abdul Latif
(a) For I =10 mV
I = 0 =10 mV
=
10
1
= 10
VA=0.51 V
(b) For I =1 V
=
1
1
= 1
I = 0 =1 V
VA=1.7 V
(c) For I =-1 V
The negative feedback loop
is not operative.
0 =0 V
VA=-12 V
VD=0.7 V
If =0.1 mA, VD=0.6 V
If =10 A, VD=0.5 V
Dr. Abdul Latif
Precision Rectifiers-Some Issues

When I goes negative and the output voltage 0 =0, the entire
magnitude of I appears between two input terminal.
If this magnitude is greater than few volts the op-amp may be
damaged.
Another disadvantage is when I is negative the op-amp will
be saturated.
It takes time to get op-amp into linear region from saturation
region.
This time delay will slow down the circuit operation and limit
the frequency of operation of super diode circuit.
10
Dr. Abdul Latif
Precision Rectifiers-Alternate Circuit

An alternative precision rectifier circuit that resolves the
disadvantages.
Figure 17.34 (a) An improved version of the precision half-wave

rectifier (b) The transfer characteristic for R2 = R1
11
Dr. Abdul Latif

For positive I, diode 2 conducts and closes the negative
feedback loop around the op amp.
The negative voltage will keep Diode 1 off and no current
will flow in feedback resistor 2.
It follows that the rectifier output voltage will be zero.
As I goes negative, it will keep diode 2 reverse biased.
Diode 1 however will conduct through 2 thus establishing a
negative feedback path around the op amp.
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Dr. Abdul Latif

The current through the feedback resistance 2 will be equal to
the current through the input resistance 1.
Thus for 1 = 2 the output voltage o will be:
0 =
The major advantage of this circuit is that the feedback path

around the op amp remains closed at all time.
Hence op amp remains in its linear region, avoiding the
possibility of saturation and the associated time delay required
to get out of saturation.
13
Dr. Abdul Latif
Precision Rectifiers-An Application

Measuring AC Voltage
Figure 17.35 A simple ac voltmeter consisting of a precision half-wave

rectifier followed by a first-order low-pass filter.
14
Dr. Abdul Latif
Precision Rectifiers-An Application

Measuring AC Voltage
The circuit consists of:
a half-wave rectifierformed by op amp A1, diodes 1 and 2, and
resistors 1 and 2
And a first-order low-pass filterformed by op amp A2, resistors 3
and 4, and capacitor C.
For an input sinusoid having a peak amplitude Vp the output I of
the rectifier will consist of a half sine wave having a peak amplitude
of Vp 2 / 1.
Average value of voltage will be (Vp/ )(2/ 1)
Then the output voltage 2 will be mostly dc, with a value:
2 4
2 =
1 3
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Dr. Abdul Latif
Precision Rectifiers-Full Wave

Full-wave rectification is achieved by inverting the negative
halves of the input-signal waveform and applying the resulting
signal to another diode rectifier.
The outputs of the two rectifiers are then joined to a common
load.
Figure 17.36 Principle of full-wave rectification
16
Dr. Abdul Latif
Figure 17.37 (a) Precision full-wave rectifier based on the conceptual

circuit of Fig. 17.36. (b) Transfer characteristic of the circuit in (a).
17
Dr. Abdul Latif

Now replacing diode DA with a super-diode, and replacing diode DB
and the inverting amplifier with the inverting precision half-wave
rectifier of Fig. 17.34, we obtain the precision full-wave-rectifier
circuit of Fig. 17.37(a).
Consider first the case of positive input at A.
The output of A2 will go positive, turning D2 on, which will conduct
through L and thus close the feedback loop around A2.
The voltage at the negative-input terminal, which is the output
voltage of the circuit, will become equal to the input.
Thus no current will flow through 1 and 2, and the voltage at the
inverting input of A1 will be equal to the input and hence positive.
Therefore the output terminal (F) of A1 will go negative until A1
saturates.
This causes D1 to be turned off.
18
Dr. Abdul Latif

Next consider what happens when A goes negative.
The tendency for a negative voltage at the negative input of A1
causes F to rise, making D1 conduct to supply L and allowing
the feedback loop around A1 to be closed.
The two equal resistances 1 and 2 force the voltage at C,
which is the output voltage, to be equal to the negative of the
input voltage at A and thus positive.
The combination of positive voltage at C and negative voltage
at A causes the output of A2 to saturate in the negative
direction, thus keeping D2 off.
19
Dr. Abdul Latif

In practice number of non-sinusoidal input voltages may exist
as the input to the various applications.
Such non-sinusoidal waveforms are square, triangular, sawtooth or any other random waveform.
A conventional ac voltmeter cannot be used to measure the
peak of such waveforms as it measures rms value of purely
sinusoidal waveforms.
Hence to measure the peak of the non-sinusoidal waveforms a
peak detector circuit is used.
A peak detector is a circuit which notes and remembers the
peak positive or negative value of an input signal for an
infinite period of time until it is reset.
20
Dr. Abdul Latif

An interesting application of the op-amp is in a peak detector
circuit such as the one shown in Figure 1439.
In this case the op-amp is used as a comparator.
This circuit is used to detect the peak of the input voltage and
store that peak voltage on a capacitor.
FIGURE 1439
A basic peak detector.
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Dr. Abdul Latif

This circuit can be used to detect and store the maximum value
of a voltage surge; this value can then be measured at the
output with a voltmeter or recording device.
The basic operation is as follows.
When a positive voltage is applied to the noninverting input of
the op-amp, the high-level output voltage of the op-amp
forward-biases the diode and charges the capacitor.
The capacitor continues to charge until its voltage reaches a
value equal to the input voltage and thus both op-amp inputs
are at the same voltage.
At this point, the op-amp comparator switches, and its output
goes to the low level.
22
Dr. Abdul Latif

The diode is now reverse biased, and the capacitor stops
charging.
It has reached a voltage equal to the peak of Vin and will hold
this voltage until the charge eventually leaks off or until it is
reset with a switch as indicated.
Fig on the next slide shows a peak detector that measures the
positive peak values of the input.
23
Dr. Abdul Latif
24
Dr. Abdul Latif
Clampers
What is the difference between clipper and clamper?
A clipper (or limiter) is used to clip off or remove a portion of
an a.c. signal. The half-wave rectifier is basically a clipper that
eliminates one of the alternations of an a.c. signal.
A clamper (or dc restorer) is used to restore or change the dc
reference of an ac signal.
25
Dr. Abdul Latif
Clampers
In clamper circuits, a predetermined dc level is added to the
input voltage.
A clamp circuit adds the positive or negative dc component to
the input signal so as to push it either on the positive side, or
on the negative side.
The circuit will be called a positive clamper , when the signal
is pushed upward by the circuit, the negative peak of the signal
coincides with the zero level.
The circuit will be called a negative clamper, when the signal
is pushed downward by the circuit. When the signal is pushed
on the negative side, the positive peak of the input signal
coincides with the zero level.
26
Dr. Abdul Latif
Clampers
27
Dr. Abdul Latif
Clampers
Positive clamper circuits
The Fig. 3.101 shows a positive clamper circuit using op-amp.
28
Dr. Abdul Latif
Clampers
Positive clamper circuits
The Fig. 3.101 shows a positive clamper circuit using op-amp.
When the input voltage is first time negative, due to inverting mode
of op-amp, the op-amp output is positive.
This turns on the diode making it forward biased.
Thus the capacitor charges to the peak value of the negative cycle of
input with the polarities as shown in the fig. 3.101.
Just beyond the negative input peak, the diode becomes reverse
biased and stops conducting. It becomes open.
Hence the output voltage is sum of the input voltage and the
capacitor voltage:
= +
29
Dr. Abdul Latif
Clampers
Thus the d.c. level equal to Vp gets added in the a.c. output
signal.
The first output waveform is sinusoidal but shifted positively
through Vp. Hence the circuit is called positive clamper and
the waveform is called positively clamped waveform.
30
Dr. Abdul Latif
Clampers
It can be observed that output waveform swings from 0 to
+2Vp i.e. peak to peak voltage of the output waveform is 2Vp
which remains same as the input voltage.
Thus the circuit shows that the total swing of the output
voltage remains same as the total swing of the input voltage in
clamper circuit.
As during the positive half cycle of the input, diode does not
conduct, capacitor retains its voltage as Vp all the time after the
first negative peak of the input.
31
Dr. Abdul Latif
Clampers
Alternate positive clamper circuit
Another circuit in which, variable positive d.c. level can be
added is shown in the fig. 3.103.
32
Dr. Abdul Latif
Clampers
The input voltage is applied to the inverting terminal of the opamp A1 while variable positive d.c. voltage is applied to the
noninverting input terminal of the op-amp A1.
The circuit can be analyzed using the superposition theorem
considering only one input active at a time.
Let Vref is acting alone and input Vin is zero.
For positive Vref, the output voltage V is also positive.
Due to this the diode D becomes forward biased.
Hence the circuit acts as a voltage follower and the net output
voltage Vo is same as positive Vref.
33
Dr. Abdul Latif
Clampers
Now consider input at inverting terminal only.
Let it be purely sinusoidal i.e. Vin=Vm Sin t.
For negative half cycle of input, the Vo will be positive and
diode D will conduct.
The capacitor C charges through diode D to the negative peak
voltage Vm.
However, during the positive half cycle of the input, diode D
does not conduct and capacitor C retains its previous voltage
of Vm.
This voltage Vm is in series with the a.c. input voltage, the
output voltage (Vo) becomes Vin+ Vm.
34
Dr. Abdul Latif
Clampers
Hence the net output voltage due to the effect of both the input
becomes Vin+Vm+Vref.
The resistor R is used to protect the op-amp against excessive
discharge currents from the capacitor C, especially when the
d.c. supply voltages are switched off.
35
Dr. Abdul Latif
Clampers
Negative clamper circuits
The Fig. 3.105 shows the negative clamper circuit obtained by
reversing the diode connections in positive clamper circuit.
36
Dr. Abdul Latif
Clampers
When Vin is first positive going, due to inverting mode of opamp, the voltage VOA goes negative.
Thus diode D becomes forward biased and capacitor charges
to peak value with polarities as shown.
Just beyond the positive peak, the diode becomes reverse
biased and becomes open.
Hence the output voltage Vo is the sum of the sum of the input
and capacitor voltages.
=
Hence a negative d.c. level of Vp gets added to the output
hence circuit is called negative clamper circuit.
37
Dr. Abdul Latif
Clampers
The waveforms are shown in the fig. 3.106.
38
Dr. Abdul Latif
Clampers
Alternate negative clamper circuit
Another circuit in which variable negative d.c. level can be
added is shown in the fig. 3.107.
In such a circuit Vref is generated using the negative supply
VEE of the op-amp and the diode connections are reversed.
39
Dr. Abdul Latif
Clampers
Due to opposite connection of diode D, the capacitor charges
in reverse direction and hence negative clamper is obtained.
The waveforms are shown in the fig. 3.108.
40
Dr. Abdul Latif
VOLTAGE LIMITER BY USING OP-AMP

Op-amp is originally designed to act as an amplifier, its output
will not act linearly with logic families like TTL.
TTL requires input voltages which range between (0-5) volts.
To keep the op-amps output voltage swing between these
ranges, other components like zener diodes are added onto the
circuit.
Such circuits with specified output swing are called voltage
limiters.
Some of the most commonly used voltage limiter circuits are
shown on the next slides.
41
Dr. Abdul Latif
VOLTAGE LIMITER CIRCUIT-I

When the output voltage reaches a positive value equal to the
zener voltage, it limits at that value.
When the output switches negative, the zener acts as a regular
diode and becomes forward biased at 0.7 limiting the output
voltage to this value.
42
Dr. Abdul Latif
VOLTAGE LIMITER CIRCUIT-II

In this circuit, zener diode connections are reversed.
For the positive half cycle input, at inverting port, voltage
across zener diode appears as Vz.
43
Dr. Abdul Latif
VOLTAGE LIMITER CIRCUIT-III
44
Dr. Abdul Latif

In the figure shown on previous slide, there are two zener
diodes that are connected in the feedback path of the op-amp
circuit.
This design helps in keeping the voltage limit between the
positive and negative values of the output voltage, V0.
As shown in the waveform, as the voltage Vin increases from 0
to positive voltage, the value of V0 increases in the opposite
direction (negative).
This goes on until the diode D1 becomes forward biased and
D2 goes into avalanche breakdown.
45
Dr. Abdul Latif
At this condition, V0 = VZ + VD2

VZ Zener Voltage
VD2 Voltage drop across D2 = 0.7V
Thus the limit of output voltage swing is between +(VZ + 0.7)
and (VZ + 0.7).
46
Dr. Abdul Latif
VOLTAGE LIMITER CIRCUIT-IV
47
Dr. Abdul Latif
VOLTAGE LIMITER CIRCUIT-IV

The figure below shows a combination of zener diode and
rectifier diodes.
This circuit is used to bring the level of swing of V0 to a
positive direction.
When Vin ranges from 0 to positive voltage, D2 is reverse
biased and thus V0 = -Vsat.
When Vin ranges from 0 to negative voltage, D2 is forward
biased and D1 goes into avalanche condition. Thus V0 = VZ +
VD2.
48

and Filters
Dr. Abdul Latif
Dr. Abdul Latif
Sample & Hold Circuit

Sample and hold circuits is used to sample an analog signal and to
store its value for some length of time (for digital code conversion).
Mainly used in Analog-to-Digital Converters (ADC).
Samples analog input signal and holds value between clock cycles
Sometimes referred to as Track and Hold (T/H).
Important parameters for S/Hs
Hold step: Voltage error during S/H-transition

Signal isolation in hold mode
Input signal tracking speed in sample mode
Droop rate in hold mode: Small change in output voltage
Aperture jitter: Sampling time uncertainty
Dr. Abdul Latif

The simplest implementation of a S&H circuit is shown below:
The voltage V would ideally stay constant in the hold mode
by having a value equal to Vin at the instance of clock going
low.
Dr. Abdul Latif
Switch (Q1) will be used for each T seconds to get sample.

An op amp is used as a buffer.
The signal will then be sampled and placed on capacitor.
The original continuous signal will be sampled and converted
into a step format.
The number of levels that can be used will be decided by the
number of bits used in the system.
The number of bits used to represent the signal could vary
between 8 bits, 10 bits and 12 bits.
8 bits gives up 256 levels.
Dr. Abdul Latif
Dr. Abdul Latif
DATA CONVERTERS
Analog
input
Encoder
A/D
Converter
Converts from analog input

to digital output
Digital
Processing
Unit
Decoder
D/A
Converter
Analog
output
Converts from digital input

to analog output
Dr. Abdul Latif
DATA CONVERTERS
Analog
input
Encoder
A/D
Converter
Digital
Processing
Unit
INPUT
A/D
D/A
Converter
Analog
output
Digital-to-analog converter
Analog-to-digital converter
0110
Decoder
0110
Resistor
Network
Summing
Amplifier
Analog
Voltage
Dr. Abdul Latif
DATA CONVERTERS
Many sensors and actuators are analog!
Strain Gauge
Solenoid Valve
Thermistors
Thermocouple
In order to use these with digital devices, we need a way to make digital
data in to analog and the other way round
Dr. Abdul Latif
DATA CONVERTERS
Most physical signals, such as those obtained at transducer
outputs, exist in analog form.
Some of the processing required on these signals is most
conveniently performed in an analog fashion.
For instance, in instrumentation systems it is quite common to
use a high input-impedance, high-gain, high-CMRR
differential amplifier right at the output of the transducer.
This is usually followed by a filter whose purpose is to
eliminate interference.
However, further signal processing is usually required.
Many such forms of signal processing can be performed by
analog means.
Dr. Abdul Latif
DATA CONVERTERS
However, an attractive alternative exists: It is to convert,
following some initial analog processing, the signal from
analog to digital form and then use economical, accurate, and
convenient digital ICs to perform digital signal processing.
Once digital signal processing has been performed, the result
in digital form can be displayed.
Alternatively, an analog output might be required.
Such is the case in a telecommunications system, where the
usual output may be audible speech.
If such an analog output is desired, then obviously there is
need to convert the digital signal back to an analog form.
10
Dr. Abdul Latif
DATA CONVERTERS
Sampling of Analog Signals
The principle underlying digital signal processing is that of
sampling the analog signal.
Figure 9.36 illustrates in a conceptual form the process of
obtaining samples of an analog signal.
The switch shown closes periodically under the control of a
periodic pulse signal (clock).
The closure time of the switch, , is relatively short, and the
samples obtained are stored (held) on the capacitor.
11
Dr. Abdul Latif
DATA CONVERTERS
FIGURE 9.36 The process of

periodically sampling an analog signal.
(a) Sample-and-hold (S/H) circuit.
The switch closes for a small part (
seconds) of every clock period (T). (b)
Input signal waveform. (c) Sampling
signal (control signal for the switch). (d)
Output signal (to be fed to A/D
converter).
12
Dr. Abdul Latif
DATA CONVERTERS
Each of these voltage levels is then fed to the input of an A/D
converter, which provides an N-bit binary number proportional
to the value of signal sample.
Signal Quantization
Consider an analog signal whose values range from 0 to +10
V.
Let us assume that we wish to convert this signal to digital
form and that the required output is a 4-bit digital signal.
We know that a 4-bit binary number can represent 16 different
values, 0 to 15; it follows that the resolution of our conversion
will be 10 V /15=2/3 V.
13
Dr. Abdul Latif
DATA CONVERTERS
Thus an analog signal of 0 V will be represented by 0000, 2/3
V will be represented by 0001, 6 V will be represented by
1001, and 10 V will be represented by 1111.
All these sample numbers are multiples of the basic increment
( 2/3 V).
Now consider the case of a 6.2-V analog level.
This falls between 18/ 3 and 20/ 3. However, since it is closer
to 18/ 3 we treat it as if it were 6 V and code it as 1001.
This process is called quantization.
Obviously errors are inherent in this process; such errors are
called quantization errors.
14
Dr. Abdul Latif
DATA CONVERTERS
Figure 9.37 depicts the functional block representations of A/D
and D/A converters.
A/D converter (ADC) accepts an analog sample vA and
produces an N-bit digital word.
Conversely, the D/A converter (DAC) accepts an N-bit digital
word and produces an analog sample.
15
Dr. Abdul Latif
DATA CONVERTERS
The output samples of the D/A converter are often fed to a
sample-and-hold circuit.
At the output of the S/H circuit a staircase waveform, such as
that in Fig. 9.38, is obtained.
The staircase waveform can then be smoothed by a low-pass
filter, giving rise to the smooth curve shown in color in Fig.
9.38.
In this way an analog output signal is reconstructed.
16
Dr. Abdul Latif
DATA CONVERTERS
FIGURE 9.38 The analog samples at the output of a D/A converter are
usually fed to a sample-and-hold circuit to obtain the staircase waveform
shown.
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Dr. Abdul Latif
D/A CONVERTER CIRCUITS

Figure 9.39 shows a simple circuit for an N-bit D/A converter.
FIGURE 9.39 An N-bit D/A converter using a binary-weighted resistive ladder

network.
18
Dr. Abdul Latif

The circuit consists of a reference voltage VREF, N binaryweighted resistors R, 2 R, 4 R, 8 R, . . . , 2N1 R, N single-pole
double-throw switches S1, S2, . . . , SN, and an op amp together
with its feedback resistance Rf = R/ 2.
The switches are controlled by an N-bit digital input word D,
1 2
= 1 + 2 + +
2
2
2
where b1, b2, and so on are bit coefficients that are either 1 or
0.
Note that the bit bN is the least significant bit (LSB) and b1 is
the most significant bit (MSB).
19
Dr. Abdul Latif

In the circuit in Fig. 9.39, b1 controls switch S1, b2 controls S2,
and so on.
When bi is 0, switch Si is in position 1, and when bi is 1 switch
Si is in position 2.
Since position 1 of all switches is ground and position 2 is
virtual ground, the current through each resistor remains
constant.
Each switch simply controls where its corresponding current
goes: to ground (when the corresponding bit is 0) or to virtual
ground (when the corresponding bit is 1).
20
Dr. Abdul Latif

The currents flowing into the virtual ground add up, and the sum
flows through the feedback resistance Rf.
The total current iO is therefore given by:
=
+
+ 1
1
2 2
2
2 1 2
=
+ ++
21 22
2
Thus,
2
=
and the output voltage vO is given by

= =
21
Dr. Abdul Latif

It should be noted that the accuracy of the DAC depends
critically on:
1. the accuracy of VREF,
2. the precision of the binary-weighted resistors, and
3. the perfection of the switches.
A disadvantage of the binary-weighted resistor network is that
for a large number of bits (N > 4) the spread between the
smallest and largest resistances becomes quite large.
This implies difficulties in maintaining accuracy in resistor
values.
A more convenient scheme exists utilizing a resistive network
called the R-2R ladder.
22
Dr. Abdul Latif

R-2R Ladders
Figure 9.40 shows the basic arrangement of a DAC using an
R-2R ladder.
FIGURE 9.40 The basic circuit configuration of a DAC utilizing an R-2R ladder
network.
23
Dr. Abdul Latif

Because of the small spread in resistance values, this network
is usually preferred to the binary-weighted scheme discussed
earlier, especially for N > 4.
Operation of the R-2R ladder is straightforward.
First, it can be shown, by starting from the right and working
toward the left, that the resistance to the right of each ladder
node, such as that labeled X, is equal to 2R.
Thus the current flowing to the right, away from each node, is
equal to the current flowing downward to ground, and twice
that current flows into the node from the left side.
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Dr. Abdul Latif

It follows that
1 = 22 = 43 = = 21
Thus, as in the binary-weighted resistive network, the currents
controlled by the switches are binary weighted.
The output current iO will therefore be given by:
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Dr. Abdul Latif

Practical DAC
26
Dr. Abdul Latif

Practical DAC
The circuit utilizes BJTs to generate binary-weighted constant
currents I1, I2, . . . , IN, with I1 corresponding to the MSB and
IN corresponding to the LSB of the DAC.
The voltage between the base line of the BJTs and node N will
be:
= +
2
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Dr. Abdul Latif
A/D CONVERTER CIRCUITS

There exist a number of A/D conversion techniques varying in
complexity and speed.
The Feedback-Type Converter
The Dual-Slope A/D Converter
The Parallel or Flash Converter
The Charge-Redistribution Converter
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Dr. Abdul Latif

Problem-I
Determine output voltage of the DAC from the following
figure. The sequences of four digit binary code represented by
the waveform are applied to the inputs. A high level is a binary
1, and low level is binary 0. The least significant binary digit is
Do.
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Dr. Abdul Latif

First, determine the current for each of the weighted inputs. Since
the inverting input of the op-amp is at 0 V (virtual ground) and a
binary 1 corresponds to a high level (+5 V), the current through any
of the input resistors equals 5 V divided by the resistance value.
5
0 =
= 0.025
200
5
1 =
= 0.05
100
5
2 =
= 0.1
50
5
3 =
= 0.2
25
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Dr. Abdul Latif

There is almost no current at the inverting op-amp input
because of its extremely high impedance. Therefore, assume
that all of the input current is through Rf. Since one end of Rf is
at 0 V (virtual ground), the drop across Rf equals the output
voltage, which is negative with respect to virtual ground.
(0) = 0 = 10 0.025 = 0.25
(1) = 1 = 10 0.05 = 0.5
(2) = 2 = 10 0.1 = 1
(3) = 3 = 10 0.2 = 2
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Dr. Abdul Latif

The first binary input code is 0000, which produces an output
voltage of 0 V. The next input code is 0001 (it stands for
decimal 1). For this, the output voltage is -0.25 V. The next
code is 0010, which produces an output voltage of -0.5 V
so on.
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Dr. Abdul Latif

Problem-II
Determine how many bits a D/A converter must have to provide
output increments of 0.04V or less. The reference is 10V.
= 10 2
l 0.04 = 10 2
10 0.04
=
2
N=7.966 8
33

and Filters
Dr. Abdul Latif
Dr. Abdul Latif
Oscillators
Many electronic devices require a source of energy at a
specific frequency which may range from a few Hertz to
several MHz.
This is achieved by an electronic device called an
oscillator.
The frequency of oscillations depends upon the constants
of the device.
Oscillators are extensively used; for example in radio and
television receivers to generate carrier wave.
Oscillators are used to produce clock signals (timing
information).
Dr. Abdul Latif
Oscillators
Two major classifications for oscillators:
feedback oscillators and
relaxation oscillators.
Dr. Abdul Latif
Oscillators
Types of oscillation
Damped oscillations
The electrical oscillations whose amplitude goes on
decreasing with time are called damped oscillations.
Undamped oscillations
The electrical oscillations whose amplitude remains
constant with time are called undamped oscillations.
Dr. Abdul Latif
Oscillators
Fig. 14.1
Dr. Abdul Latif
Oscillators
An oscillator is a circuit that produces a periodic waveform on
its output with only the dc supply voltage as an input.
The output voltage can be either sinusoidal or non-sinusoidal,
depending on the type of oscillator.
An oscillator converts electrical energy from the dc power
supply to periodic waveforms.
FIGURE 161
The basic oscillator concept showing three common types of output waveforms: sine wave,
square wave, and sawtooth.
Dr. Abdul Latif
Feedback Oscillators
One type of oscillator is the feedback oscillator, which returns
a fraction of the output signal to the input with no net phase
shift, resulting in a reinforcement of the output signal.
After oscillations are started, the loop gain is maintained at 1.0
to maintain oscillations.
A feedback oscillator consists of an amplifier for gain (either a
discrete transistor or an op-amp) and a positive feedback
circuit that produces phase shift and provides attenuation, as
shown in Figure 162.
Dr. Abdul Latif
FIGURE 162
Basic elements of a feedback oscillator.
Dr. Abdul Latif
Positive Feedback
Positive feedback is characterized by the condition wherein a
portion of the output voltage of an amplifier is fed back to the
input with no net phase shift, resulting in a reinforcement of
the output signal.
This basic idea is illustrated in Figure 163(a).
The in-phase feedback voltage, Vf, is amplified to produce the
output voltage, which in turn produces the feedback voltage.
That is, a loop is created in which the signal sustains itself and
a continuous sinusoidal output is produced.
This phenomenon is called oscillation.
Dr. Abdul Latif
FIGURE 163
Positive feedback produces oscillation.
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Dr. Abdul Latif
Positive Feedback
In some types of amplifiers, the feedback circuit shifts the
phase 1800 and an inverting amplifier is required to provide
another 1800 phase shift so that there is no net phase shift. This
is illustrated in Figure 163(b).
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Dr. Abdul Latif
Barkhausen Criterion
It is in order to produce continuous undamped oscillations at the
output of an amplifier, two conditions, as illustrated in Figure 164,
are required:
1. The phase shift around the feedback loop must be effectively 00.
2. The voltage gain, Acl, around the closed feedback loop (loop
gain) must equal to 1 (unity). This is called Barkhausen
criterion.
The voltage gain around the closed feedback loop, Acl, is the product
of the amplifier gain Av, and the attenuation, B, of the feedback
circuit.
=
The amplitude of the oscillations should be constant.
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Dr. Abdul Latif
FIGURE 164
General conditions to sustain oscillation.
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Dr. Abdul Latif
If a sinusoidal wave is the desired output, a loop gain greater
than 1 will rapidly cause the output to saturate at both peaks of
the waveform, producing unacceptable distortion.
To avoid this, some form of gain control must be used to keep
the loop gain at exactly 1 once oscillations have started.
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Dr. Abdul Latif
Basic Linear Oscillator

= = + and =
=
1
If Vs = 0, the only way that Vo can be nonzero is that loop gain
A=1 which implies that (Barkhausen Criterion):
= 1
= 00
Vs
A(f)
Vo
Vf
SelectiveNetwork
(f)
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Dr. Abdul Latif
Start-Up Conditions
The unity-gain condition must be met for oscillation to be
sustained.
For oscillation to begin, the voltage gain around the positive
feedback loop must be greater than 1 so that the amplitude of
the output can build up to a desired level.
The gain must then decrease to 1 so that the output stays at the
desired level and oscillation is sustained.
The voltage gain conditions for both starting and sustaining
oscillation are illustrated in Figure 165.
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Dr. Abdul Latif
FIGURE 165
When oscillation starts at t0, the condition Acl >1 causes the sinusoidal output
voltage amplitude to build up to a desired level. Then Acl decreases to 1 and
maintains the desired amplitude.
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Dr. Abdul Latif
Oscillators with RC Feedback Circuits

Three types of feedback oscillators that use RC circuits to
produce sinusoidal outputs are:
the Wien-bridge oscillator,
the phase-shift oscillator, and
the twin-T oscillator.
Generally, RC feedback oscillators are used for frequencies up
to about 1 MHz.
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Dr. Abdul Latif
Wien-bridge oscillator
A fundamental part of the Wien-bridge oscillator is a lead-lag
circuit like that shown in Figure 166(a).
R1 and C1 together form the lag portion of the circuit: R2 and
C2 form the lead portion.
FIGURE 166
A lead-lag circuit and its response curve.
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Dr. Abdul Latif
The operation of this lead-lag circuit is as follows:
At lower frequencies, the lead circuit dominates due to the
high reactance of C2.
As the frequency increases, XC2 decreases, thus allowing the
output voltage to increase.
At some specified frequency, the response of the lag circuit
takes over, and the decreasing value of XC1 causes the output
voltage to decrease.
The response curve for the lead-lag circuit shown in Figure
166(b) indicates that the output voltage peaks at a frequency
called the resonant frequency, fr.
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Dr. Abdul Latif
At this point, the attenuation (Vout/Vin) of the circuit is 1/3 if R1 = R2
and XC1= XC2 as stated by the following equation:
1
=
3
The formula for the resonant frequency
1
=
2
To summarize, the lead-lag circuit in the Wien-bridge oscillator has
a resonant frequency, fr at which the phase shift through the circuit is
00 and the attenuation is 1/3.
Below fr, the lead circuit dominates and the output leads the input.
Above fr, the lag circuit dominates and the output lags the input.
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Dr. Abdul Latif
1
1
Let X C1
and X C 2
C1
C 2
Frequency Selection Network

Z1
Z1 R1 jX C1
R1
Z2
C1
1
jR2 X C 2
1
Z2

R2 jX C 2
R2 jX C 2
Vi
C2
R2
Vo
Therefore, the feedback factor,
Vo
( jR2 X C 2 / R2 jX C 2 )
Z2
Vi Z1 Z 2 ( R1 jX C1 ) ( jR2 X C 2 / R2 jX C 2 )
jR2 X C 2
( R1 jX C1 )( R2 jX C 2 ) jR2 X C 2
22
Dr. Abdul Latif
can be rewritten as:
R2 X C 2
R1 X C 2 R2 X C1 R2 X C 2 j ( R1 R2 X C1 X C 2 )
R1 R2 X C1 X C 2 0
1 1
or R1 R2
C1 C2
1 / R1 R2C1C2
Supposing,
R1=R2=R and XC1= XC2=XC,
RX C
3RX C j ( R 2 X C2 )
0.32
0.3
0.28
=1/3
0.26
0.24
0.22
0.2
f(R=Xc)
1
0.5
Phase
For Barkhausen Criterion,

imaginary part = 0, i.e.,
Feedback factor
0.34
Phase=0
-0.5
-1
Frequency
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Dr. Abdul Latif
The lead-lag circuit is used in the positive feedback loop of an
op amp, as shown in Figure 167(a).
A voltage divider is used in the negative feedback loop.
FIGURE 167
The Wien-bridge oscillator schematic drawn in two different but equivalent ways.
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Dr. Abdul Latif
The Wien-bridge oscillator circuit can be viewed as a
noninverting amplifier configuration with the input signal fed
back from the output through the lead-lag circuit.
Recall that the voltage divider determines the closed-loop gain
of the amplifier.
1
1
1 + 2
= =
=
2 / 1 + 2
2
The circuit is redrawn in Figure 167(b) to show that the opamp is connected across the bridge circuit.
One leg of the bridge is the lead-lag circuit, and the other is the
voltage divider.
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Dr. Abdul Latif
For the circuit to produce a sustained sinusoidal output (oscillate),
the phase shift around the positive feedback loop must be 0 and the
gain around the loop must be equal to unity (1).
The 0 phase-shift condition is met when the frequency is fr because
the phase shift through the lead-lag circuit is 0 and there is no
inversion from the noninverting (+) input of the op-amp to the
output.
This is shown in Figure 168(a).
The unity-gain condition in the feedback loop is met when
= 3
This offsets the 1/3 attenuation of the lead-lag circuit, thus making
the total gain around the positive feedback loop equal to 1.
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Dr. Abdul Latif
FIGURE 168
Conditions for sustained oscillation

27
Dr. Abdul Latif
To achieve a closed-loop gain of 3,
R1 = 2R2
Then
1 + 2 22 + 2 32
=
=
=
=3
2
2
2
Initially, the closed-loop gain of the amplifier itself must be
more than 3 (Acl > 3) until the output signal builds up to a
desired level.
Ideally, the gain of the amplifier must then decrease to 3 so
that the total gain around the loop is 1 and the output signal
stays at the desired level, thus sustaining oscillation.
This is illustrated in Figure 169.
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Dr. Abdul Latif
FIGURE 169
Conditions for start-up and sustained oscillations.
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Dr. Abdul Latif
All practical methods to achieve stability for feedback
oscillators require the gain to be self-adjusting.
This requirement is a form of automatic gain control (AGC).
A better method to control the gain uses a JFET as a voltagecontrolled resistor in a negative feedback path.
This method can produce an excellent sinusoidal waveform
that is stable.
A JFET stabilized Wien bridge is shown in Figure 1611.
The gain of the op-amp is controlled by the components shown
in the green box, which includes the JFET.
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Dr. Abdul Latif
FIGURE 1611
Self-starting Wien-bridge oscillator using a JFET in the negative feedback loop

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Dr. Abdul Latif
The JFETs drain-source resistance depends on the gate voltage.
With no output signal, the gate is at zero volts, causing the drainsource resistance to be at the minimum.
With this condition, the loop gain is greater than 1.
Oscillations begin and rapidly build to a large output signal.
Negative excursions of the output signal forward-bias D1 causing
capacitor to charge C3 to a negative voltage.
This voltage increases the drain-source resistance of the JFET and
reduces the gain (and hence the output).
This is classic negative feedback at work.
With the proper selection of components, the gain can be stabilized
at the required level.
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Dr. Abdul Latif
Example 16-1: Determine the resonant frequency for the
Wien-bridge oscillator in Figure 1612. Also, calculate the
setting for Rf assuming the internal drain-source resistance rds,
of the JFET is 500 when oscillations are stable.
Solution:
For the lead-lag circuit, and R1 = R2 = R = 10 k and C1 = C2
= C = 0.01 mF. The frequency is
1
1
=
=
= 1.59
2 2 10 0.01
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Dr. Abdul Latif
The closed-loop gain must be 3.0 for oscillations to be
sustained.
For an inverting amplifier, the gain expression is the same as
for a noninverting amplifier.
=
+1
Ri is composed of R3 and rds. Substituting
=
+1
3 +
Rearranging for Rf
= 1 3 +
= 3 1 1.0 + 500 = 3.0
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Dr. Abdul Latif
FIGURE 1612
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Dr. Abdul Latif
The Phase-Shift Oscillator

Figure 1613 shows a sinusoidal feedback oscillator called the
phase-shift oscillator, using an inverting amplifier.
The additional 180 phase shift is provided by an RC phaseshift network.
FIGURE 1613: Phase-shift oscillator
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Dr. Abdul Latif

Applying KVL to the phase-shift
Network, we have:
I 2 (2 R jX C ) I 3 R
I2R
V1
V1 I1 ( R jX C ) I 2 R
0 I1 R
Vo
I1
I 3 (2 R jX C )
I2
I3
Solve for I3, we get
I3
Or
R jX C
V1
2 R jX C
R jX C
2 R jX C
2 R jX C
V1 R 2
I3
( R jX C )[(2 R jX C ) 2 R 2 ] R 2 (2 R jX C )
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Dr. Abdul Latif

The output voltage,
V1 R 3
Vo I 3 R
( R jX C )[(2 R jX C ) 2 R 2 ] R 2 (2 R jX C )
Hence the transfer function of the phase-shift network is given by,

Vo
R3
3
V1 ( R 5RX C2 ) j ( X C3 6 R 2 X C )
For 180o phase shift, the imaginary part = 0, i.e.,

X C3 6 R 2 X C 0 or X C 0 (Rejected)
X C2 6 R 2
and,
6 RC
1
29
Note: The ve sign mean the

phase inversion from the
voltage
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Dr. Abdul Latif

Oscillation occurs at the frequency where the total phase shift
through the three RC circuits is 180.
The inversion of the op-amp itself provides the additional 180
to meet the requirement for oscillation of a 360 (or 0) phase
shift around the feedback loop.
The attenuation, B, of the three-section RC feedback circuit is
1
=
29
where B=R3/Rf.
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Dr. Abdul Latif

To meet the greater-than-unity loop gain requirement, the
closed-loop voltage gain of the op-amp must be greater than
29 (set by Rf and R3).
The frequency of oscillation (fr) is stated in the following
equation, where R1 = R2 = R3 = R and C1 = C2 = C3 = C:
=
1
2 6
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Dr. Abdul Latif

EXAMPLE 162: (a) Determine the value of Rf necessary for
the circuit in Figure 1614 to operate as an oscillator.
(b) Determine the frequency of oscillation.
FIGURE 1614
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Dr. Abdul Latif

Solution:
(a) Acl=29, and B=1/29= R3 / Rf. Therefore,
= 29
3
= 293 = 29 10 = 290
(b) R1 = R2 = R3 = R and C1 = C2 = C3 = C. Therefore,
1
1
=
=
6.5
2 6 2 6 10 0.001
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Dr. Abdul Latif
OSCILLATORS WITH LC FEEDBACK CIRCUITS

Although the RC feedback oscillators, particularly the Wien
bridge, are generally suitable for frequencies up to about 1
MHz, LC feedback elements are normally used in oscillators
that require higher frequencies of oscillation.
With an LC circuits, oscillations of frequencies between 1 and
500 MHz can be produced.
Also, because of the frequency limitation (lower unity-gain
frequency) of most op-amps, discrete transistors (BJT or FET)
are often used as the gain element in LC oscillators.
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Dr. Abdul Latif
The Colpitts Oscillator

The oscillator is shown in Figure 1616.
It uses an LC circuit in the feedback loop to provide the necessary
phase shift and to act as a resonant filter that passes only the desired
frequency of oscillation.
The approximate frequency of oscillation is the resonant frequency
of the LC circuit and is established by the values of C1, C2, and L
according to this familiar formula:
1

2
where CT is the total capacitance. Because the capacitors effectively

appear in series around the tank circuit, the total capacitance CT is:
1 2
=
1 + 2
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Dr. Abdul Latif
FIGURE 1616 A basic Colpitts oscillator with a BJT as the gain element.
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Dr. Abdul Latif

EXAMPLE
163
(a)
Determine the frequency for
the oscillator in Figure 16
21. Assume there is
negligible loading on the
feedback circuit and that its
Q is greater than 10.
(b) Find the frequency if the
oscillator is loaded to a
point where the Q drops to
8.
FIGURE 1621
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Dr. Abdul Latif

Solution: (a)
1 2
0.1 0.01
=
=
= 0.0091
1 + 2
0.11
1
1

=
= 7.46
2 2 50 0.0091
(b)
=
2
= 7.46 0.9923 = 7.40
2
+1
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Dr. Abdul Latif
Relaxation Oscillators
A second type of oscillator is the relaxation oscillator.
Instead of feedback, a relaxation oscillator uses an RC timing
circuit to generate a waveform that is generally a square wave
or other non-sinusoidal waveform.
Typically, a relaxation oscillator uses a Schmitt trigger or other
device that changes states to alternately charge and discharge a
capacitor through a resistor.
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Dr. Abdul Latif
A Triangular-Wave Oscillator
The op-amp integrator can be used as the basis for a triangularwave oscillator.
The basic idea is illustrated in Figure 1627(a) where a dualpolarity, switched input is used.
When the switch is in position 1, the negative voltage is
applied, and the output is a positive-going ramp.
When the switch is thrown into position 2, a negative-going
ramp is produced.
If the switch is thrown back and forth at fixed intervals, the
output is a triangular wave consisting of alternating positivegoing and negative-going ramps, as shown in Figure 1627(b).
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Dr. Abdul Latif
FIGURE 1627: Basic triangular-wave oscillator
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Dr. Abdul Latif
A practical triangular wave oscillator utilizes an op-amp
comparator with hysteresis is shown in Figure 1628.
FIGURE 1628 A triangular-wave oscillator using two op-amps.
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Dr. Abdul Latif
The operation is as follows:
To begin, assume that the output voltage of the comparator is
at its maximum negative level.
This output is connected to the inverting input of the integrator
through R1, producing a positive-going ramp on the output of
the integrator.
When the ramp voltage reaches the upper trigger point (UTP),
the comparator switches to its maximum positive level.
This positive level causes the integrator ramp to change to a
negative-going direction.
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Dr. Abdul Latif
The ramp continues in this direction until the lower trigger
point (LTP) of the comparator is reached.
At this point, the comparator output switches back to the
maximum negative level and the cycle repeats.
This action is illustrated in Figure 1629.
FIGURE 1629: Waveforms for the circuit in Figure 1628.
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Dr. Abdul Latif
Since the comparator produces a square-wave output, the
circuit in Figure 1628 can be used as both a triangular-wave
oscillator and a square-wave oscillator.
The output amplitude of the square wave is set by the output
swing of the comparator, and the resistors R2 and R3 set the
amplitude of the triangular output by establishing the UTP and
LTP voltages according to the following formulas:
3
= +
2
3
=
2
where the comparator output levels, +Vmax and - Vmax are equal.
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Dr. Abdul Latif
The frequency of both waveforms depends on the R1C time
constant as well as the amplitude-setting resistors, R2 and R3.
By varying the frequency of oscillation can be adjusted
without changing the output amplitude.
1
2
=
41 3
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Dr. Abdul Latif
Example 16-4: Determine the frequency of oscillation of the
circuit in Figure 1630. To what value must R1 be changed to
make the frequency 20 kHz?
FIGURE 1630
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Dr. Abdul Latif
Solution:
=
1
2
1
=
41 3
4 10 0.01
33
= 8.25
10
To make f=20 kHz,

1 2
1
1 =
=
4 3
4 20 Hz 0.01
33
= 4.13
10
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Dr. Abdul Latif
A Square-Wave Oscillator
The basic square-wave oscillator shown in Figure 1634 is a
type of relaxation oscillator because its operation is based on
the charging and discharging of a capacitor.
FIGURE 1634: A square-wave relaxation oscillator.
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Dr. Abdul Latif
Notice that the op-amps inverting input is the capacitor
voltage and the noninverting input is a portion of the output
fed back through resistors R2 and R3 and to provide hysteresis.
When the circuit is first turned on, the capacitor is uncharged,
and thus the inverting input is at 0 V.
This makes the output a positive maximum, and the capacitor
begins to charge toward Vout through R1.
When the capacitor voltage (VC) reaches a value equal to the
feedback voltage (Vf) on the noninverting input, the op-amp
switches to the maximum negative state.
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Dr. Abdul Latif
At this point, the capacitor begins to discharge from +Vf
toward -Vf.
When the capacitor voltage reaches -Vf, the op-amp switches
back to the maximum positive state.
This action continues to repeat, as shown in Figure 1635, and
a square-wave output voltage is obtained.
FIGURE 1635
Waveforms for the squarewave relaxation oscillator.
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Dr. Abdul Latif
The Integrated Timer

It was introduced by Signetics in 1972.
Most popular among timer ICs is NE555 by STM electronics
and Fairchild electronics.
The 555 timer IC is used in a variety of timer, pulse
generation, and oscillator applications.
555 can be configured as an astable or free-running
multivibrator, which is essentially a square-wave oscillator.
The use of the 555 timer as a voltage controlled oscillator
(VCO) is another application.
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Dr. Abdul Latif

The 555 timer consists basically of two comparators, a flipflop, a discharge transistor, and a resistive voltage divider, as
shown in Figure 1636.
Briefly, it is a two-state device whose output can be at either a
high voltage level (set, S) or a low voltage level (reset, R). The
state of the output can be changed with proper input signals.
The resistive voltage divider is used to set the voltage
comparator levels.
All three resistors are of equal value; therefore, the upper
comparator has a reference of 23VCC, and the lower
comparator has a reference of 1/3 VCC.
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Dr. Abdul Latif
FIGURE 1636
Internal diagram of a 555 integrated circuit timer. (IC pin numbers are in parentheses.)
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Dr. Abdul Latif

The comparators outputs control the state of the flip-flop.
When the trigger voltage goes below 13 VCC, the flip-flop sets and
the output jumps to its high level.
The threshold input is normally connected to an external RC timing
circuit.
When the external capacitor voltage exceeds 23 VCC, the upper
comparator resets the flip-flop, which in turn switches the output
back to its low level.
When the device output is low, the discharge transistor (Qd) is
turned on and provides a path for rapid discharge of the external
timing capacitor.
This basic operation allows the timer to be configured with external
components as an oscillator, a one-shot (Monostable Multivibrator),
or a time delay element.
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Dr. Abdul Latif
Astable Operation of 555 Timer

A 555 timer connected to
operate in the astable mode as
a
free-running
relaxation
oscillator
(astable
multivibrator) is shown in
Figure 1637.
Notice that the threshold input
(THRESH) is now connected
to the trigger input (TRIG).
The external components R1,
R2 and Cext and form the timing
circuit that sets the frequency
of oscillation.
FIGURE 1637 : The 555 timer connected
as an astable multivibrator.
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Dr. Abdul Latif

Pin 1. Ground, The ground pin connects the 555 timer to the negative
(0v) supply rail.
Pin 2. Trigger, The negative input to comparator No 1. A negative pulse
on this pin sets the internal Flip-flop when the voltage drops below
1/3Vcc causing the output to switch from a LOW to a HIGH state.
Pin 3. Output, The output pin can drive any TTL circuit and is capable of
sourcing or sinking up to 200 mA of current at an output voltage equal to
approximately Vcc 1.5V so small speakers, LEDs or motors can be
connected directly to the output.
Pin 4. Reset, This pin is used to reset the internal Flip-flop controlling
the state of the output, pin 3. This is an active-low input and is generally
connected to a logic 1 level when not used to prevent any unwanted
resetting of the output.
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Dr. Abdul Latif
Pin 5. Control Voltage, This pin controls the timing of the 555 by overriding
the 2/3Vcc level of the voltage divider network. By applying a voltage to this
pin the width of the output signal can be varied independently of the RC timing
network. When not used it is connected to ground via a 10 nF capacitor to
eliminate any noise.
Pin 6. Threshold, The positive input to comparator No 2. This pin is used to

reset the Flip-flop when the voltage applied to it exceeds 2/3Vcc causing the
output to switch from HIGH to LOW state. This pin connects directly to
the RC timing circuit.
Pin 7. Discharge, The discharge pin is connected directly to the Collector of

an internal NPN transistor which is used to discharge the timing capacitor to
ground when the output at pin 3 switches LOW.
Pin 8. Supply +Vcc, This is the power supply pin and for general purpose
TTL 555 timers is between 4.5V and 15V.
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Dr. Abdul Latif

The capacitor connected to the control (CONT) input is strictly for
decoupling and has no effect on the operation.
Initially, when the power is turned on, the capacitor Cext is
uncharged and thus the trigger voltage (pin 2) is at 0 V.
This causes the output of the lower comparator to be high and the
output of the upper comparator to be low, forcing the output of the
flip-flop, and thus the base of Qd, low and keeping the transistor off.
Now, Cext begins charging through R1 and R2 as indicated in Figure
1638.
When the capacitor voltage reaches 1/3 VCC, the lower comparator
switches to its low output state, and when the capacitor voltage
reaches 2/3 VCC, the upper comparator switches to its high output
state.
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Dr. Abdul Latif

This resets the flip-flop, causes the base of Qd to go high, and
turns on the transistor.
This sequence creates a discharge path for the capacitor
through R2 and the transistor, as indicated.
The capacitor now begins to discharge, causing the upper
comparator to go low.
At the point where the capacitor discharges down to 1/3 VCC,
the lower comparator switches high, setting the flip-flop,
which makes the base of Qd low and turns off the transistor.
Another charging cycle begins, and the entire process repeats.
The result is a rectangular wave output whose duty cycle
depends on the values of R1 and R2.
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Dr. Abdul Latif
FIGURE 1638
Operation of the 555 timer in the astable mode

70
Dr. Abdul Latif

The frequency of oscillation is given by following equation, or it can
be found using the graph in Figure 1639.
1.44
=
1 + 2
By selecting R1 and R2, the duty cycle of the output can be adjusted.
Since Cext charges through R1 + R2 and discharges only through R2,
duty cycles approaching a minimum of 50 percent can be achieved
if R2 >> R1 so that the charging and discharging times are
approximately equal.
A formula to calculate the duty cycle is developed as follows:
The time that the output is high (tH) is how long it takes Cext to
charge from 1/3 VCC to 2/3 VCC. It is expressed as:
tH =0.694(R1 + R2) Cext
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Dr. Abdul Latif
FIGURE 1639: Frequency of oscillation (free-running frequency) of a 555 timer in the

astable mode as a function of Cext and R1 +2R2. The sloped lines are values of R1 + 2R2.
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Dr. Abdul Latif

The time that the output is low (tL) is how long it takes Cext to
discharge from 2/3 VCC to 1/3 VCC. It is expressed as:
tL = 0.694R2Cext
The period, T, of the output waveform is the sum of tH and tL. The
following formula for T is the reciprocal of f in Equation 1612.
T = tH + tL = 0.694(R1 + 2 R2) Cext
Finally, the percent duty cycle is
=
100% =
100%
1 + 2
=
100%
1 + 22
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Dr. Abdul Latif

EXAMPLE 166: A 555 timer configured to run in the astable
mode (oscillator) is shown in Figure 1641. Determine the
frequency of the output and the duty cycle.
Solution:
1.44
1.44
=
=
= 5.64
1 + 22
2.2 + 9.4 0.022
1 + 2
2.2 + 4.7
100% =
100% = 59.5%
1 + 22
2.2 + 9.4
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Dr. Abdul Latif
FIGURE 1641
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Dr. Abdul Latif
555 Timer as a Voltage-Controlled Oscillator (VCO)

A 555 timer can be set up to operate as a VCO by using the
same external connections as for astable operation, with the
exception that a variable control voltage is applied to the
CONT input (pin 5), as indicated in Figure 1642.
As shown in Figure 1643, the control voltage (VCONT)
changes the threshold values of 1/3 VCC and 2/3 VCC for the
internal comparators.
With the control voltage, the upper value is VCONT and the
lower value is 1/2 VCONT, as you can see by examining the
internal diagram of the 555 timer.
When the control voltage is varied, the output frequency also
varies.
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Dr. Abdul Latif
FIGURE 1642
The 555 timer connected as a voltage-controlled oscillator (VCO). Note the

variable control voltage input on pin 5.
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Dr. Abdul Latif
FIGURE 1643
The VCO output frequency varies inversely with VCONT because the charging and
discharging time of Cext is directly dependent on the control voltage.
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Dr. Abdul Latif

An increase in VCONT increases the charging and discharging
time of the external capacitor and causes the frequency to
decrease.
A decrease in VCONT decreases the charging and discharging
time of the capacitor and causes the frequency to increase.
An interesting application of the VCO is in phase-locked
loops, which are used in various types of communication
receivers to track variations in the frequency of incoming
signals.
79

and Filters
Dr. Abdul Latif
Dr. Abdul Latif
Filters
Filters are electrical networks that have been designed to pass
alternating currents generated at only certain frequencies and
to block or attenuate all others.
Filters have a wide use in electrical and electronic engineering
and are vital elements in many telecommunications and
instrumentation systems where the separation of wanted from
unwanted signals including noise is essential to their
success.
Dr. Abdul Latif
Filters-Applications
Filter circuits are used in a wide variety of applications.
In the field of telecommunication, band-pass filters are used in
the audio frequency range (0 kHz to 20 kHz) for modems and
speech processing.
High-frequency band-pass filters (several hundred MHz) are
used for channel selection in telephone central offices.
Data acquisition systems usually require anti-aliasing low-pass
filters as well as low-pass noise filters in their preceding signal
conditioning stages.
System power supplies often use band-rejection filters to
suppress the 60-Hz line frequency and high frequency
transients.
Dr. Abdul Latif
Types of Filters
Passive Filters
Incorporates only passive components like; capacitors,
resistors, inductors.
Passive filters are difficult to design.
Further, inductors are difficult to handle. Not only are they
expensive, bulky and heavy; they are prone to magnetic field
radiation unless expensive shielding is used to prevent
unwanted coupling
Used for high frequencies (>MHz)
Dr. Abdul Latif
Types of Filters
Active Filters
Along with passive components capacitors and resistors,
Additionally it incorporates active components particularly
like; op-amp.
Due to inductor property at low frequencies, active filters are
used at low frequencies.
It overcomes the inductor problems in passive filter.
Dr. Abdul Latif
Important terminologies in Filters

Frequency Response of Filter is the graph of its voltage gain versus
frequency.
Passband: Those frequencies that are passed by a filter without
attenuation.
Stopband: Those frequencies that are rejected by filter after cutoff.
Roll-off: the rate at which attenuation increases beyond the cut-off
frequency.
Transition: The roll-off region between passband and the stopband.
Attenuation: Attenuation refers to the loss of signal.
Ripple: the variation of the filter's insertion loss in the passband.
Dr. Abdul Latif
Basic Low-Pass Filter

The circuit of a simple CR low-pass filter is shown in Figure
9.1.
This is essentially potential divider consisting of a resistance in
series with a capacitor.
The output voltage, eo, is taken from across the capacitor and
is related to the input voltage, ei, by the equation:
Dr. Abdul Latif

= /
Algebraic manipulation of this complex number equation
shows that the amplitude eo is given by the expression:
= /
2 + 2
Even though ei may be held constant over a range of input

frequencies, the amplitude of eo decreases as the frequency is
increased.
This is because the capacitive reactance varies inversely with
frequency.
Fig. 9.2 shows the response curve for this circuit of low-pass
filter.
Dr. Abdul Latif
Dr. Abdul Latif

At low frequencies the output volts/input volts ratio remains level up
to a frequency, fc (cut-off frequency), at which a marked fall starts.
fc (cut-off frequency) is the frequency at which the reactance of
capacitor is equal to the resistance.
At about 2 fc the fall off (also called roll-off) becomes linear at 20
dB per decade.
Cut-off frequency is given by: fc =1/2RC (Hz)
For frequencies below fc the circuit gain is nearly constant while for
frequencies higher than fc the gain is so low that the passage of these
signals is blocked.
The circuit is known as low-pass filter having a bandwidth
extended from d.c. to fc.
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Dr. Abdul Latif

Because the response of the circuit depends upon frequency to
the mathematical first order, the filter is known as a first order
filter.
The ideal low-pass passive filter frequency response curve or
transfer function would show no loss of gain for frequencies
below fc and zero output above fc.
Clearly the first order low-pass filter achieves neither of these
ideals.
If two CR sections are cascaded, (Fig. 9.3) to form a second
order filter having two frequency dependent capacitors, a
steeper roll-off can be obtained.
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Dr. Abdul Latif
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Dr. Abdul Latif

The basic RC filter is shown in Fig. 15-1 (b) on next slide.
This has a single pole, and it rolls off at -20 dB/decade beyond
the critical frequency.
The actual response is indicated by the blue line in Figure 15
1(a).
The response is plotted on a standard log plot that is used for
filters to show details of the curve as the gain drops.
Notice that the gain drops off slowly until the frequency is at
the critical frequency; after this, the gain drops rapidly.
The -20 dB/decade roll-off rate for the gain of a basic RC filter
means that at a frequency of 10fc, the output will be -20 dB
(10%) of the input.
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Dr. Abdul Latif
(a) Comparison of an ideal low-pass filter response (blue area)

with actual response. Although not shown on log scale,
response extends down to fc = 0.
(b) Basic low-pass circuit
(c) Idealized low-pass filter responses
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Dr. Abdul Latif

This roll-off rate is not a particularly good filter characteristic
because too much of the unwanted frequencies (beyond the
passband) are allowed through the filter.
Figure 151(c) illustrates three idealized low-pass response curves
including the basic one-pole response (-20 dB/decade).
The approximations show a flat response to the cutoff frequency
and a roll-off at a constant rate after the cutoff frequency.
Responses that are steeper than -20 dB/decade in the transition
region cannot be obtained by simply cascading identical RC stages.
By combining an op-amp with frequency-selective feedback
circuits, filters can be designed with roll-off rates of -40, -60 or
more dB/decade.
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Dr. Abdul Latif
High-Pass Filter
A high-pass filter is one that significantly attenuates or rejects all
frequencies below fc and passes all frequencies above fc.
The ideal response, indicated by the blue-shaded area, has an
instantaneous drop at fc.
As in the case of the low-pass filter, the basic RC circuit has a rolloff rate of -20 dB/decade, as indicated by the blue line in Figure 15
2(a).
Also, the critical frequency for the basic highpass filter occurs when
Xc=R, where fc =1/2RC.
Figure 152(c) illustrates three idealized high-pass response curves
including the basic one-pole response (-20 dB/decade) for high-pass
RC circuit.
Responses that are steeper than -20 dB/decade in the transition
region are also possible with active high-pass filters.
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Dr. Abdul Latif
High-Pass Filter
(a) Comparison of an ideal high-pass filter response

(blue area) with actual response
(b) Basic high-pass circuit
(c) Idealized high-pass filter responses
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Dr. Abdul Latif
Band-Pass Filter
A band-pass filter passes all signals lying within a band
between a lower-frequency limit and an upper-frequency limit
and essentially rejects all other frequencies that are outside this
specified band.
A generalized band-pass response curve is shown in Figure
153.
The bandwidth (BW) is defined as the difference between the
upper critical frequency (fc2) and the lower critical frequency
(fc1).
= 2 1
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Dr. Abdul Latif
Band-Pass Filter
The critical frequencies are, of course, the points at which the
response curve is 70.7% of its maximum.
FIGURE 153
General band-pass response curve.

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Dr. Abdul Latif
Band-Pass Filter
The frequency about which the passband is centered is called
the center frequency, f0, defined as the geometric mean of the
critical frequencies.
0 = 1 2
Quality Factor
The quality factor (Q) of a band-pass filter is the ratio of the
center frequency to the bandwidth.
0
=
The value of Q is an indication of the selectivity of a bandpass filter.

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Dr. Abdul Latif
Band-Pass Filter
The higher the value of Q, the narrower the bandwidth and the
better the selectivity for a given value of f0.
Band-pass filters are sometimes classified as narrow-band (Q
> 10) or wide-band (Q < 10).
The quality factor (Q) can also be expressed in terms of the
damping factor (DF) of the filter as:
1
=
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Dr. Abdul Latif
Band-Stop Filter
It is also known as notch, band-reject, or band-elimination
filter.
It is opposite to that of the bandpass filter because frequencies
within a certain bandwidth are rejected, and frequencies
outside the bandwidth are passed.
A general response curve for a band-stop filter is shown in
Figure 154.
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Dr. Abdul Latif
Band-Stop Filter
FIGURE 154
General band-stop filter response.
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Dr. Abdul Latif
Filter Approximations
Each type of filter response (low-pass, high-pass, band-pass,
or band-stop) can be tailored by circuit component values to
have either a Butterworth, Chebyshev, or Bessel characteristic.
Each of these characteristics is identified by the shape of the
response curve, and each has an advantage in certain
applications.
Butterworth, Chebyshev, or Bessel response characteristics can
be realized with most active filter circuit configurations by
proper selection of certain component values.
A general comparison of the three response characteristics for
a low-pass filter response curve is shown in Figure 155.
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Dr. Abdul Latif
FIGURE 155
Comparative plots of three types of filter response characteristics.
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Dr. Abdul Latif
The Butterworth Characteristic
The butterworth approximation is sometimes called the
maximum flat approximation.
Roll off =20n dB/decade
The phase response is not linear, however, and the phase shift
(thus, time delay) of signals passing through the filter varies
nonlinearly with frequency.
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Dr. Abdul Latif
Chebyshev Approximation
In Chebyshav approximation ripples are present in passband,
but its roll off rate is greater than 20 dB/decade for a single
pole.
The number of ripples in the passband of a Chebyshav filter
are equal to the half of the filter order:
#Ripples = n/2
Due to greater roll-off, filters can be implemented with the
Chebyshev response with fewer poles and less complex
circuitry for a given roll-off rate.
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Dr. Abdul Latif
Bessel Approximation
Bessel approximation has a flat passband and a monotonic
stopband similar to those of the Butterworth approximation.
For the same filter order, however, the roll-off in the transition
region is much less with a Bessel filter than with a Butterworth
filter.
The major advantage of the Bessel Filter is that it produces the
least distortion of non-sinusoidal signals.
No phase change.
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Dr. Abdul Latif
Damping Factor
The damping factor (DF ) of an active filter circuit determines
which response characteristic (Butterworth, Chebyshev, or
Bessel response) the filter exhibits.
A generalized active filter is shown in Figure 156.
FIGURE 156
General diagram of an active filter.
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Dr. Abdul Latif
It includes an amplifier, a negative feedback circuit, and a
filter section.
The amplifier and feedback are connected in a noninverting
configuration.
The damping factor is determined by the negative feedback
circuit and is defined by the following equation:
1
= 2
2
The damping factor affects the filter response by negative
feedback action.
Any attempted increase or decrease in the output voltage is
offset by the opposing effect of the negative feedback.
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Dr. Abdul Latif
This tends to make the response curve flat in the passband of the
filter if the value for the damping factor is precisely set.
The value of the damping factor required to produce a desired
response characteristic depends on the order (number of poles) of
the filter.
A pole, is simply a circuit with one resistor and one capacitor.
The number of poles determines the roll-off rate of the filter.
The more poles a filter has, the faster its roll-off rate is.
A Butterworth response produces -20 dB/decade/pole.
So, a first-order (one-pole) filter has a roll-off of -20 dB/decade; a
second-order (two-pole) filter has a roll-off rate of -40 dB/decade; a
third-order (three-pole) filter has a roll-off rate of -60 dB/decade and
so on.
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Dr. Abdul Latif
To obtain a filter with three poles or more, one-pole or twopole filters are cascaded, as shown in Figure 158.
To obtain a third-order filter, for example, cascade a secondorder and a first-order filter; to obtain a fourth-order filter,
cascade two second-order filters; and so on.
Each filter in a cascaded arrangement is called a stage or
section.
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Dr. Abdul Latif
FIGURE 158
The number of filter poles can be increased by cascading.
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Dr. Abdul Latif
Because of its maximally flat response, the Butterworth
characteristic is the most widely used.
TABLE 151
Values for the Butterworth response.

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Dr. Abdul Latif
Active low pass filter

Filters that use op-amps as the active element provide several
advantages over passive filters (R, L, and C elements only).
The op-amp provides gain, so the signal is not attenuated as it
passes through the filter.
The high input impedance of the op-amp prevents excessive
loading of the driving source, and the low output impedance of
the op-amp prevents the filter from being affected by the load
that it is driving.
Active filters are also easy to adjust over a wide frequency
range without altering the desired response.
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Dr. Abdul Latif
A Single-Pole Low-Pass Filter

Figure 159(a) shows an active filter with a single low-pass
RC frequency-selective circuit that provides a roll-off of -20
dB/decade above the critical frequency, as indicated by the
response curve in Figure 159(b).
FIGURE 159: Single-pole active low-pass filter and response curve.
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Dr. Abdul Latif
A Single-Pole Low-Pass Filter

The critical frequency of the single-pole filter is fc=1/(2RC).
The op-amp in this filter is connected as a noninverting
amplifier with the closed-loop voltage gain in the passband set
by the values of R1 and R2.
1
(NI) =
+1
2
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Dr. Abdul Latif
The Sallen-Key Low-Pass Filter

The Sallen-Key is one of the most common configurations for
a second-order (two-pole) filter.
It is also known as a VCVS (voltage-controlled voltage
source) filter.
A low-pass version of the Sallen-Key filter is shown in Figure
1510.
FIGURE 1510
Basic Sallen-Key low-pass filter.
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Dr. Abdul Latif

There are two lowpass RC circuits that provide a roll-off of
-40 dB/decade above the critical frequency.
A unique feature of the Sallen-Key low-pass filter is the
capacitor CA that provides feedback for shaping the response
near the edge of the passband.
The critical frequency for the Sallen-Key filter is:
1
=
2
The component values can be made equal so that RA=RB=R
and CA=CB=C.
In this case, the expression for the critical frequency simplifies
to fc=1/(2RC).
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Dr. Abdul Latif

EXAMPLE 153: Determine the critical frequency of the
Sallen-Key low-pass filter in Figure 1511, and set the value
of R1 for an approximate Butterworth response.
FIGURE 1511
40
Dr. Abdul Latif

Solution:
Since RA=RB=R=1.0 k and CA=CB=C=0.022 F,
=
1
2
1
2 1.0 0.022
= 7.23
For a Butterworth response, R1/R2=0.586.

R1=0.586R2=0.586(1.0 k)=586
Select a standard value as near as possible to this
calculated value.
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Dr. Abdul Latif
Cascaded Low-Pass Filters

A three-pole filter is required to get a third-order low-pass
response (-60 dB/decade).
This is done by cascading a two-pole Sallen-Key low-pass
filter and a single-pole low-pass filter, as shown in Figure 15
12(a).
Figure 1512(b) shows a four-pole configuration obtained by
cascading two Sallen-Key (2-pole) low-pass filters.
In general, a four-pole filter is preferred because it uses the
same number of op-amps to achieve a faster roll-off.
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Dr. Abdul Latif

FIGURE 1512
Cascaded low-pass filters.
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Dr. Abdul Latif

EXAMPLE 154: For the four-pole filter in Figure 1512(b),
determine the capacitance values required to produce a critical
frequency of 2680 Hz if all the resistors in the RC low-pass
circuits are 1.8 k. Also select values for the feedback
resistors to get a Butterworth response.
Solution: Both stages must have the same fc. Assuming equalvalue capacitors, fc=1/(2RC).
1
1
=
=
= 0.033
2 2 1.8 2680
CA1=CB1=CA2=CB2=0.033 F
Also select R2=R4=1.8 k for simplicity.
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Dr. Abdul Latif

Refer to Table 151.
For a Butterworth response in the first stage, DF = 1.848
and Therefore, R1/R2=0.152.
R1 = 0.152R2 = 0.152(1800 ) = 274 .
Choose R1 = 270 .
In the second stage, DF = 0.765 and R3/R4=1.235.
Therefore,
R3 = 1.235R4 = 1.235(1800 ) = 2.22 k.
Choose R1 = 2.2 k.
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Dr. Abdul Latif
Active High-Pass Filters

A high-pass active filter with a -20 dB/decade roll-off is shown in Figure
1513(a).
The negative feedback circuit is the same as for the low-pass filters
previously discussed.
The high-pass response curve is shown in Figure 1513(b).
FIGURE 1513
Single-pole active high-pass filter and response curve.
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Dr. Abdul Latif

The Sallen-Key High-Pass Filter
A high-pass Sallen-Key configuration is shown in Figure 15
15.
FIGURE 1515
Basic Sallen-Key high-pass filter.
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Dr. Abdul Latif

The components RA, CA, RB and CB form the two-pole
frequency-selective circuit.
Notice that the positions of the resistors and capacitors in the
frequency-selective circuit are opposite to those in the lowpass configuration.
As with the other filters, the response characteristic can be
optimized by proper selection of the feedback resistors, R1 and
R2.
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Dr. Abdul Latif

Cascading High-Pass Filters
As with the low-pass configuration, first- and second-order
high-pass filters can be cascaded to provide three or more
poles and thereby create faster roll-off rates.
Figure 1516 shows a six-pole high-pass filter consisting of
three Sallen-Key two-pole stages.
With this configuration optimized for a Butterworth response,
a roll-off of -120 dB/decade is achieved.
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Dr. Abdul Latif
FIGURE 1516: Sixth-order high-pass filter.
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Dr. Abdul Latif
Active Band-Pass Filters

Cascaded Low-Pass and High-Pass Filters
One way to implement a band-pass filter is a cascaded
arrangement of a high-pass filter and a low-pass filter, as
shown in Figure 1517(a), as long as the critical frequencies
are sufficiently separated.
The critical frequency of each filter is chosen so that the
response curves overlap sufficiently, as indicated.
This filter is generally limited to wide bandwidth applications.
The lower frequency fc1 of the passband is the critical
frequency of the high-pass filter.
The upper frequency fc2 is the critical frequency of the lowpass filter.
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Dr. Abdul Latif
FIGURE 1517: Band-pass

filter formed by cascading a
two-pole high-pass and a twopole low-pass filter
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Dr. Abdul Latif

The center frequency f0 of the passband is the geometric mean
of fc1 and fc2.
1
1 =
2 1 1 1 1
1
2 =
2 2 2 2 2
0 = 1 2
If equal-value components are used in implementing each
filter, the critical frequency equations simplify to the form fc =
1/(2RC).
53
Dr. Abdul Latif

Multiple-Feedback Band-Pass Filter
Another type of filter configuration, shown in Figure 1518, is
a multiple-feedback bandpass filter.
FIGURE 1518
Multiple-feedback band-pass filter.
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Dr. Abdul Latif

An expression for the center frequency is developed as follows,
recognizing that R1 and R3 appear in parallel as viewed from the C1
feedback path (with the Vin source replaced by a short).
1
0 =
2 1 3 2 1 2
Making C1 = C2 = C yields
1
1
0 =
=
2 1 3 2 2 2 1 3 2
=
1
1
1
=
2 2 1 3
2
1
2
1
1 3 1 + 3
1
1 + 3
0 =
2 1 2 3
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Dr. Abdul Latif

Maximum gain can be found by this formula:
2
0 =
21
Quality factor is given by the relation:
Q = f0CR2
and BW can be calculated as:
BW = f0/Q
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Dr. Abdul Latif

EXAMPLE 156: Determine the center frequency, maximum
gain, and bandwidth for the filter in Figure 1519.
FIGURE 1519
57
Dr. Abdul Latif

Solution:
1
1 + 3
1
0 =
=
2 1 2 3 2 0.01
68 + 2.7
= 736
68 180 2.7
2
180
0 =
=
= 1.32
21 2 68
Q = f0CR2= (736 Hz)(0.01 F)(180 k)=4.16
0 736
= =
= 177
4.16
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Dr. Abdul Latif

State-Variable Filter
The state-variable or universal active filter is widely used for bandpass applications.
As shown in Figure 1520, it consists of a summing amplifier and
two op-amp integrators (which act as single-pole low-pass filters)
that are combined in a cascaded arrangement to form a second-order
filter.
Although used primarily as a band-pass (BP) filter, the state variable
configuration also provides low-pass (LP) and high-pass (HP)
outputs.
The center frequency is set by the RC circuits in both integrators.
When used as a band-pass filter, the critical frequencies of the
integrators are usually made equal, thus setting the center frequency
of the passband.
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Dr. Abdul Latif
FIGURE 1520
State-variable filter.
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Dr. Abdul Latif

Basic Operation:
At input frequencies below fc, the input signal passes through the
summing amplifier and integrators and is fed back 1800 out of
phase.
Thus, the feedback signal and input signal cancel for all frequencies
below approximately fc.
As the low-pass response of the integrators rolls off, the feedback
signal diminishes, thus allowing the input to pass through to the
band-pass output.
Above fc, the low-pass response disappears, thus preventing the
input signal from passing through the integrators.
As a result, the band-pass filter output peaks sharply at fc, as
indicated in Figure 1521.
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Dr. Abdul Latif

The Q is set by the feedback resistors R5 and R6 according to
the following equation:
1 5
=
+1
3 6
FIGURE 1521 : General state-variable response curves.
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Dr. Abdul Latif

EXAMPLE 157: Determine the center frequency, Q, and
BW for the passband of the state-variable filter in Figure 15
22.
FIGURE 1522
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Dr. Abdul Latif

Solution: For each integrator,
0 =
1
24 1
1
27 2
1
2 1.0 0.022
= 7.23
The center frequency is approximately equal to the critical

frequencies of the integrators.
f0 = fc = 7.23 kHz
1 5
1 100
=
+1 =
+ 1 = 33.7
3 6
3 1.0
0 7.23
= =
= 215
33.7
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Dr. Abdul Latif
Active Band-Stop Filters

Multiple-Feedback Band-Stop Filter
Figure 1524 shows a multiple-feedback band-stop filter.
This configuration is similar to the band-pass version in Figure
1518 except that R3 has been moved and R4 has been added.
FIGURE 1524
Multiple-feedback band-stop filter.
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Dr. Abdul Latif

State-Variable Band-Stop Filter
Summing the low-pass and the high-pass responses of the
state-variable filter with a summing amplifier creates a bandstop filter, as shown in Figure 1525.
One important application of this filter is minimizing the 60
Hz hum in audio systems by setting the center frequency to
60 Hz.
FIGURE 1525
State-variable band-stop filter.
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Dr. Abdul Latif

EXAMPLE 158: Verify that the band-stop filter in Figure
1526 has a center frequency of 60 Hz, and optimize the filter
for a Q of 10.
FIGURE 1526
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Dr. Abdul Latif

Solution:
f0 equals the fc of the integrator stages.
1
1
1
0 =
=
=
= 60
24 1 27 2 2 12 0.22
You can obtain a Q=10 by choosing R6 and then calculating R5.
1 5
=
+1
3 6
5 = 3 1 6
Choose R6=3.3 k. Then
5 = 3 10 1 3.3 k = 95.7
Use the nearest standard value of 100 k .
68

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Linear Integrated Circuits

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Clayton G.B, Operational Amplifiers, 3rd Ed., Newnes-Butterworth,

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Integrated Circuit and Filters

Summer, Differential Op-Amp & Its Design Problems+ Class Test# 01

Differentiators, Integrators & Its Design Problems

Logarithmic, Anti Logarithmic Amplifier & Its Design Problems

First & Second Order Lowpass and Highpass Filters

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Aims & Objectives

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Mid Term Exam

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Linear Integrated Circuit

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Introduction to Linear Integrated Circuits

Linear Integrated Circuits

Linear Integrated Circuits & Filters

Dr. Abdul Latif

Basics of Operational Amplifiers

Difference between amplifier and operational amplifier (OP-

Standard schematic diagram of OP-AMP is given below:

Department of Telecommunication, MUET UET Jamshoro

Linear Integrated Circuits & Filters