Operational Amplifier Parameters

Operational Amplifier Parameters
This training module discusses the basics of an Operational Amplifier. It also includes an in depth look at the parameters for operational amplifiers.
The tutorial begins with a review of operational amplifier theory and basic fundamentals. Ideal amplifiers and the op amp's three stages are included. There is also a discusssion of
input modes and feedback.
The course then moves on to list and describe many op amp parameters. The table of parameters included in this section is offered as a document that can easily be downloaded to
be used as a future reference.
Appproximately twenty of the listed specifications are described in more detail. The explanations include helpful equations and graphs. This has been done for parameters such as the
input offset voltage, the input bias current, common mode rejection ratio and power supply rejection ratio.
Course Map/Table of Contents

1. Course Navigation
1. 1.1 Course Navigation
2. 1.2 Course Objectives
3. 1.3 Acknowledgements
2. The Basics of an Operational Amplifier (Op Amp)
1.
2.
3.
4.
5.
6.
7.
8.
9.
2.1 What is an Op Amp?

2.2 Ideal vs. Real Op Amps
2.3 The Op Amp's Three Stages
2.4 Inputs of the Op Amp
2.5 Closed Loop
2.6 Why Negative Feedback?
2.7 Inverting Closed Loop
2.8 Non-inverting Closed Loop
2.9 Types of Op Amps
3. Operational Amplifier Parameters

1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
3.1 Op Amps Variations

3.2 Parametric Definitions
3.3 Parametric Definitions Continued
3.4 Input Offset Voltage
3.5 How VOS Is Measured
3.6 TCVOS and Long Term Drift
3.7 Input Common Mode Voltage Range
3.8 Common Mode Rejection Ratio
3.9 Power Supply Rejection Ratio
3.10 Open Loop Voltage Gain
3.11 Input Capacitance and Resistance
3.12 Input Bias Current
3.13 More about Input Current
3.14 Output Voltage Swing
3.15 Phase Margin and Gain Margin
3.16 Bandwidth and Gain Bandwidth Product
3.17 Slew Rate
3.18 Settling Time
3.19 Total Harmonic Distortion + Noise
3.20 Supply Voltage
3.21 Supply Current
3.22 Input Referred Voltage and Current Noise
1. Course Navigation
1.1 Course Navigation
1.2 Course Objectives
1.3 Acknowledgements
1.1 Course Navigation

This course is organized like a book with multiple chapters. Each chapter may have one or more pages.
The previous and next arrows move you forward and back through the course page by page.
The left navigation bar takes you to any chapter. It also contains the bookmarking buttons, 'save' and 'go to.' To save your place in a course, press the 'save' button.
The next time you open the course, clicking on 'go to' will take you to the page you saved or bookmarked.
The 'Go to Final Test' button on the left navigation bar takes you back to the Analog University course listing, where you started. Take the course final test by clicking
on 'Test Yourself.'
The top services bar contains additional information such as glossary of terms, who to go to for help with this subject and an FAQ. Clicking home on this bar will take
you back to the course beginning.
Don't miss the hints, references, exercises and quizzes which appear at the bottom of some pages.
Don't miss the hints, references, exercises and quizzes which appear at the bottom of some pages.
1.2 Course Objectives

Upon successful completion of this course, the user will be able to:
Explain the basic function of an op amp.
Explain the three basic configurations of an op amp.
Explain the test circuit used to measure some of an op amps parameters, such as V
, CMRR, and PSRR.
OS
List at least five basic op amp parameters and explain their importance.
1.3 Acknowledgements
Muna Acosta and National Semiconductor would like to acknowledge the following sources of information and to thank those who contributed to the creation of this tutorial.
Clayton, George. and Steve Winder. Operational Amplifiers 5th Ed. Amsterdam * Boston * Heidelberg * London * New York * Oxford * Paris * San Diego * San Francisco *
Singapore * Sydney * Tokyo: Newnes. 2003.
Gayakwad, Ramakant A. Op-Amps and Linear Integrated Circuits 3rd Ed. New Jersey: Regents/Prentice Hall. 1993.
Mancini, Ron. Op Amps for Everyone. 2nd Ed. Amsterdam * Boston * Heidelberg * London * New York * Oxford * Paris * San Diego * San Francisco * Singapore * Sydney *
Tokyo: Newnes. 2003.
Op Amp Applications Handbook. Ed. Walt Jung. Amsterdam * Boston * Heidelberg * London * New York * Oxford * Paris * San Diego * San Francisco * Singapore * Sydney
* Tokyo: Newnes. 2005.
The members of the Amplifier Group Applications Engineering Staff, especially Khy Vijeh, Peggy Alavi, and Catherine Long.
2. The Basics of an Operational Amplifier (Op Amp)

Let's begin by reviewing some of the basics of an operational amplifier.
2.5 Closed Loop

So what is an op amp? Op amps are inexpensive, efficient, versatile, and readily available building blocks for many applications. They have the following characteristics:
They have very large open loop gain.
They have a differential input stage.
They use feedback to establish and control the relationship between the output and input signals.
Op amps can perform many different operations. These include addition, subtraction, multiplication, integration, and many more. They are also "amplifiers," and as such can
perform buffering or they can amplify AC and DC signals.
Op amps are used in many different applications. These applications include filters, sensors, sample and hold circuits, instrumentation amplifiers, and many others.
Op amps are used in many different applications. These applications include filters, sensors, sample and hold circuits, instrumentation amplifiers, and many others.

Of course there is no such thing as an ideal op amp, but the op amps available today come so close to ideal that Ideal Op Amp Analysis approaches actual analysis. Actual op amps
differ from ideal op amps in two specific ways. The first is that DC parameters, such as input offset voltage, are large enough to cause departure from the ideal. The ideal assumes
that input offset voltage is zero. The second difference is that AC parameters, such as gain, are a function of frequency.
There are several assumptions which must be discussed before ideal op amp analysis can be implemented.
The first is that we must assume that the current flow into the input leads of the op amp is zero. This is usually almost true, especially in FET op amps.
The second assumption is that the op amp gain is infinite, therefore it drives the output voltage to any value to satisfy the input conditions. In reality, saturation occurs when
the output voltage comes close to a power supply rail, but reality does not negate the assumption, it only bounds it.
Implicit in the infinite gain assumption is the need for zero input signal. The gain drives the output voltage until the voltage between the input leads is zero.
The third assumption is that the voltage between the input leads is zero. This means that if one input is tied to a hard voltage source such as ground, then the other input is
at the same potential. Since the current flow into the input leads is zero, then the input impedance is infinite.
The fourth assumption is that the output impedance of the ideal op amp is zero. The ideal op amp can drive any load without an output impedance dropping voltage across
it.
Fifth, the frequency response of the ideal op amp is flat. This means that the gain does not vary as frequency increases.
The following table sums up the concepts of an ideal op amp.

Op amps must have very high input impedance, very high open loop gain, and very low output impedance. Since it is next to impossible to achieve all three of these in one
component, the op amp has three different stages.
The first stage is the differential input stage. It must have very high input impedance. This causes the op amp to draw very negligible amounts of input current. The very
small input current enables the user to utilize the ideal op amp equations for circuit analysis purposes. In some designs this stage also provides the DC gain of the amplifier.
The next stage is the voltage gain stage. This stage is mainly responsible for gaining up the input signal and sending it to the output stage.
The output stage of the op amp delivers current to the op amp's load. It must have very low output impedance so that the loading of the output is minimized. This final stage
may or may not have short circuit protection.

Op Amps have two input pins. One is the inverting pin and the other is the non-inverting pin. In general, op amps can be setup in three different input modes. These three are
differential input mode, inverting input mode, and non-inverting input mode.
In the differential input mode, signals are applied to both of the input terminals. When these
signals are out of phase, the output is going to be completely in phase with the non-inverting
signal.
When the signals that are applied to both of the inputs are in phase with each other and have the same amplitude, then there will be no output. In this case, the signals
applied to the inputs is the same signal and it is referred to as the common mode signal.
When in the inverting mode, the non-inverting input of the op amp is grounded or connected
to mid-supply (this is the same thing). The input signal is applied to the inverting input and the
output signal is completely out of phase with the input signal.
For the non-inverting input mode, the signal is applied to the non-inverting input of the op
amp while the inverting input is grounded. The output signal under these conditions is going
to be completely in phase with the input signal.
2.5 Closed Loop

Although a closed loop configuration reduces the gain of the amplifier, it adds stability. In closed loop configuration, part of the output signal is applied back into the inverting input of
the amplifier. This creates negative feedback, which is generally the type of feedback used with op amps. Positive feedback is mainly used in oscillators.
Op amps use negative feedback.

The "fed back" signal always opposes the effects of the input signal.
Op amps use negative feedback.

The "fed back" signal always opposes the effects of the input signal.
Both inputs are kept at the same voltage.
Feedback is used in both inverting and non-inverting configurations.

Negative feedback is used in both inverting and non-inverting op amp configurations. It is always opposing the effects of the input signal. Negative feedback does the following:
It helps to overcome distortion and non-linearity.
It allows the user to "tailor" frequency response to the desired values.
It makes circuit properties predictable and less dependent on elements such as temperature or the internal properties of the device.
Circuit properties are dependent upon the external feedback network and are thus easily controlled by external circuit elements.
The System designer can concentrate on function and not the details of operating point selection, biasing, and the internal characteristics of discrete transistor amplifier
design.

In an inverting closed loop configuration, a resistor is used to feedback part of the output signal back into the inverting input of the amplifier.
Virtually no current flows into the amplifier's input. The positive input is grounded and the two currents, I and I
in
The circuit characteristics are determined by the values of the feedback resistor and the gain resistor.
We know that the following equation is true:
We also know that:
By setting these two currents equal, we find that the gain relationship of the op amp is
feedback
must be equal since the input bias current is zero.
By setting these two currents equal, we find that the gain relationship of the op amp is
This is referred to as the op amp's closed loop gain. The negative sign indicates that the output signal is completely out of phase with the input signal.
2.7.1 Example: Inverting Amplifier
The amplitude of the output is going to be nine times higher than that of the input signal, and therefore, the output signal is 900 mV
PP
2.7.2 Input and Output

Does this make sense?
For the op amp example used in the "Try This" exercise, is Is the output in phase or out of phase with the input?
1. It is completely out of phase with the input.
2. It is completely in phase with the input.
1 Answer: It is completely out of phase with the input.

In the non-inverting closed loop configuration, again a resistor is used to feedback part of the output signal back into the inverting input.
The input signal is applied to the non-inverting input of the amplifier. Once again the feedback current is equal to the input current. So, we can write the equation for the input
current and feedback current.
The input current is equal to the input voltage divided by the gain resistor.
The input current is equal to the input voltage divided by the gain resistor.
The output current (referred to above as I
) equals the output voltage minus the input voltage divided by the feedback resitor resistor. Setting these two previous equations
feedback
equal gives:
Performing simple mathematical operations gives the following equation:
This is the non-inverting op amp's closed loop gain.

R and R form a voltage divider.
F
2.8.1 Example: Non-inverting Amplifier
Here the ratio of the two resistors is still nine, but there is a factor of 1 added. The output voltage amplitude is going to be ten times larger than the input voltage amplitude, which
is 1V .
PP
2.8.2 Input and Output

Does this make sense?
For the op amp example used in the "Try This" exercise, is Is the output in phase or out of phase with the input?
1. It is completely in phase with the input.
2. It is completely out of phase with the
1 Answer: It is completely in phase with the input.

There are many op amps and numerous ways to divide them. Generally speaking, there are four basic categories.
High Speed - These operate at 1MHz or higher and are found in wireless and broadband access equipment, video, and
industrial data acquisition systems. There is an increase in speed requirements for communications and consumer applications
(e.g. set top box and broadband modems). The parts from National's Amplifier Group that fall under this category begin with the
LMH part number.
Precision - These have a maximum offset voltage of less than 1 mV. A low offset voltage with low drift is important when trying to
recreate the signal with a high level of accuracy. Portability and low power consumption produce an inverse relationship between
lower voltages and accuracy. National's amplifiers of this type begin with LMP and LMC part numbers.
Precision - These have a maximum offset voltage of less than 1 mV. A low offset voltage with low drift is important when trying to
recreate the signal with a high level of accuracy. Portability and low power consumption produce an inverse relationship between
lower voltages and accuracy. National's amplifiers of this type begin with LMP and LMC part numbers.
Low Power and Low Voltage - These are found in the communications and computing industries and other segments where
portability is important. Low power products draw less than 500 A. Low voltage products operate at or under 2.5V. Singlesupply products proliferate the market. The amplifiers with part numbers beginning with LMV and LPV are this category parts.
General Purpose - These are the basic op amps. They provide needed amplification without extreme accuracy, speed, or output drive.
They are simple, low cost, and are available in multiples (2, 3, or 4 amps per package). This will save package count, cost, and board
space. Nationals general purpose op amps have part numbers that begin with LM and LMC.
3. Operational Amplifier Parameters

Now for the important specifications or parameters. Let's look at some op amp characteristics that mean the most to circuit designers.
3.17 Slew Rate
3.18 Settling Time
3.20 Supply Voltage
3.21 Supply Current

The following table shows how varied operational amplifiers can be.
Although these parts are all operational amplifiers the numbers for certain parameters can differ greatly. All amplifiers are not created equal. The input bias current (I
bias
(max))
changes greatly depending on the input stage of the amplifier. The parts with lower numbers have a CMOS input stage. The great variation in parametric numbers will be clarified
as some of the important parameters are discussed in detail.

The following table lists the parameters for operational amplifiers. It gives the abbreviations and the units most often used. There is a definition for each specification, as well as,
sample values from three of National's op amp datasheets.

Here is the rest of the table.

Here is the rest of the table.
If you would like to download a jpg version of this table, right click on the following Net Link and select "Save Target As."
Parametric Table
The Input Offset Voltage is the differential voltage which must be applied to the input of an op amp to produce an output of zero.
Even though all of the components involved in an op amp are integrated onto the same chip, it is not possible to have two transistors in the input stage with exactly the same
characteristics. This means that the collector currents in these two transistors are not equal, which causes a differential output voltage from the first stage.
The output of the first stage is amplified by the following stages and possibly altered by more mismatching in each of these consecutive stages. This will affect the output voltage
and so must be nullified by an input offset voltage.
The input offset voltage can range from V to mV and can be either polarity.
The input offset voltage is a concern for designers anytime that DC accuracy is required of the circuit.
V
will significantly reduce the dynamic range of a high gain circuit's ability to process very small signals.
limits the practical gain range of the op amp.
OS
OS
One design solution to cancel the offset voltage is to include another voltage of the same magnitude but with opposite polarity. This would be a calibration voltage and can be
implemented by adding a microprocessor that will set the V . The following schematic shows an example of this design solution. The output due to this voltage would be as
cal
follows:
V
OUT
=V
(-R / R )
CAL
Generally, bipolar op amps have lower offset voltages than JFET or CMOS
types.

This is the schematic for a circuit used to measure V
For this example since we know
V
OUT
= (1+R /R ) V
2
OS
which gives
V
OUT
= 1001 * V
OS
now we can find V
OS
OS
=V
OUT
/ 1001
with the following
OS
now we can find V
OS
OS
=V
OUT
with the following
/ 1001
This is a simple circuit that will work to measure V
, but it does not completely achieve a zero output. The following circuit is utilized for most of the offset derived tests, such as
OS
, CMRR, PSRR, and gain. It is a more accurate way to measure the V
OS
OS
than the previous simple circuit.
A voltage applied to the Servo Input terminal causes the DUT (Device Under Test) output voltage to move in accordance with the applied Servo Input voltage. If +1V is applied to
the Servo Input terminal, then the DUT output will be set to +1V. The V terminal will show the error between the DUT's input pins multiplied by the loop gain (1001). This error
OS
voltage includes both offset voltage and gain errors.

For example, say the DUT has an offset voltage of +500 V and NO gain errors and the Servo Input is set to +2.5V. The DUT's output will now be set to 2.5V and V
OS
will be at
+500 mV regardless of the Servo Input setting. Any gain error would be summed in along with the offset voltage, and the result is multiplied by the loop gain (1000). With the Servo
Input grounded the circuit basically functions as a "gain of 1000" test circuit. The Servo amp contributes very little in the way of offset errors (the servo amp's offset is divided
'down' by the loop gain).
The optional V
OS
buck input can be used as follows. Once the V
OS
voltage is measured, a voltage that is equal, but opposite in sign, to the V
OS
voltage can be applied to the V
OS
buck input. This will cancel out the original DUT offset voltage. What is left is just the gain error and whatever the difference between the offset and the applied buck voltage is. So,
if the DUT's offset is 2 mV, then you can apply a voltage of -2V to the V buck input to cancel out the large offset voltage.
OS
The following net link offers a downloadable version of the schematic of the preceding test circuit for your reference. This circuit is used several times in this tutorial. It is a very
important configuration for measuring parameters. To download this file right click on the link and select "Save Target As".
Standard Test Loop Circuit
The Average Temperature Coefficient of the input offset voltage is the average rate of change in input offset voltage per unit
change in temperature.
The following graphic is from the datasheet for the LMV531. It shows the V
that the measured value can differ for each device.
OS
of two devices each measured at three different temperatures. It is obvious from this graphic
The Input Offset Voltage Long-Term Drift is the average rate of change in the input offset voltage per unit of time.
This parameter is generally expressed as V/week, but can be given in any unit of time, usually longer than one week. It is also referred to as the input offset voltage drift
with time.
The Input Common Mode Voltage is defined as the average voltage at the inverting and non-inverting input pins.
If the common mode voltage gets too high or too low, the inputs will shut down and proper operation ceases. The common mode input voltage range, CMVR, specifies the
range over which normal operation is guaranteed.
This graph shows Input Offset Voltage vs. Common Mode Voltage. The blue line is the actual measured value
of the input common mode voltage. The red line is the calculated value.
The upper limit is determined by the saturation point of one of the two input transistors.
The lower limit is determined by the transistor which supplies the bias current.
The trend toward lower and single supply voltages make CMVR of increasing
concern.
The Common Mode Rejection Ratio, CMRR, is the ability of an op amp to reject the common mode signal while amplifying the
differential signal.
CMRR is usually expressed in dB. The following two equations are two different ways of calculating the common mode rejection ratio.
The Common Mode Rejection Ratio, CMRR, is the ability of an op amp to reject the common mode signal while amplifying the
differential signal.
CMRR is usually expressed in dB. The following two equations are two different ways of calculating the common mode rejection ratio.
Ideally this ratio would be infinite with common mode voltages being totally rejected.
A typical source of common mode interference voltage is 50 or 60 Hz. AC noise. Circuit designers must use caution to ensure that the CMRR of the op amp is not degraded by
other circuit components. High values of resistance make the circuit vulnerable to common mode and other noise pick up. It is important to scale resistors down and capacitors up
to preserve circuit response.
The following graph was taken from the LMV651/652/654 datasheet. It shows CMRR vs. Frequency. This is a figure that can be found on the datasheet for most parts available
from National Semiconductor.
CMRR is usually found to decrease at the higher

frequencies.
Power Supply Rejection Ratio, PSRR, is the ratio of output voltage change to power supply voltage change.
PSRR is usually expressed in dB. The following equation is a simple way of calculating the power supply rejection ratio.
PSRR is an indicator of the device's ability to maintain performance accuracy when operating from a non-regulated power supply.
PSRR is also an indication of the device's ability to reject low frequency noise on power supply lines.
Poor power supply rejection can cause spurs and harmonic distortion in AC applications. This is due to external frequency components leaking into the output and modulating with
it. A circuit designer must buffer an op amp with low PSRR carefully to combat the problems that can arise.
The following graph was taken from the LMV651/652/654 datasheet. It shows PSRR vs. Frequency. There are values measured for different voltages. This is typical for PSRR and
can be found on the datasheet for most parts available from National Semiconductor.
The following graph was taken from the LMV651/652/654 datasheet. It shows PSRR vs. Frequency. There are values measured for different voltages. This is typical for PSRR and
can be found on the datasheet for most parts available from National Semiconductor.
PSRR can be given in V/V. This value will be small and the lower the value here, the better the op amp will perform. In dB the
values will be large and the larger the better.
3.9.1
It may help to remember the following:
log 10 = 1
log 100 = 2
log 1000 = 3
log 10000 = 4
With this in mind, you can quickly estimate the PSRR value in dB if you have the value in V/V.
The Open Loop Voltage Gain, A
, of an op amp may be defined as the ratio of the change of the output voltage to the change
VOL
of the input voltage.

The input voltage is the voltage measured directly between the inverting and non-inverting inputs.
A
VOL
is normally specified for very slowly varying signals and can in principle be determined from the slope of the non-saturated portion of the input/output transfer curve
like the one shown below.
The magnitude of A
VOL
for a particular op amp depends on the load and the value of the power supplies. As the title of the figure above shows, the values for A
VOL
are
normally given for specified supply voltages and loads.

Op amps are seldom used in an open loop arrangement. They are occasionally used in positive feedback circuits, but much more often they are used in negative feedback circuits
that define precise operation. The significance of open loop gain is that it determines the accuracy limits in such applications.
The larger open loop gain, the smaller is the signal voltage applied between the op amp inputs to achieve the same output. If the open loop gain of the op amp is infinite (as
assumed for an ideal op amp), then the negative feedback forces the op amp's differential input signal to zero. However, with a large but finite open loop gain, a small input signal
must exist between the op amp's inputs. It is convenient to think of this as an input error voltage which arises because the real op amp has a finite open loop gain.
The larger open loop gain, the smaller is the signal voltage applied between the op amp inputs to achieve the same output. If the open loop gain of the op amp is infinite (as
assumed for an ideal op amp), then the negative feedback forces the op amp's differential input signal to zero. However, with a large but finite open loop gain, a small input signal
must exist between the op amp's inputs. It is convenient to think of this as an input error voltage which arises because the real op amp has a finite open loop gain.
The Input Capacitance, C , is measured between the input terminals with either input grounded. It is usually only a few pF.
IN
Input Resistance, R , is the resistance between the input terminals with either input grounded. R
IN
IN
In this figure, if V is grounded, then C

P
IN
In the figure if V is grounded, then R

p
IN
is usually measured in M.
is equal to C in parallel with C .

d
is equal to R in parallel with R .

d
Input Bias Current, I , is the average of the currents that flow into the inverting and non-inverting input terminals of the op amp.
B
Ideally, the input bias current is 0. But for a real op amp it is found by taking the average of the current from both inputs. I = (I
B
INV
+I
)/2
NON-INV
Input bias current is of concern when the source impedance is high. If the op amp has a high input bias current, it will load the source and will result in a lower than
expected voltage.
The best solution is to use an op amp with either CMOS or JFET input. The source impedance can also be lowered by using a buffer stage to drive an op amp that has high
input bias current.
The input impedance is directly related to the input bias current and the following graph compares the typical bias currents for various technologies. While bipolar inputs have the
highest input bias levels this need not always be true, some bipolar devices have input bias currents lower than CMOS op amps at elevated ambient temperatures. While CMOS
devices have the lowest input bias current, essentially a diode leakage current of the order of fA, this current doubles for every 10C temperature rise.
This is why the maximum limit (over temperature) always looks so large compared to the typical value. This is not an example of poor manufacturing control, simply an intrinsic
characteristic of the transistors.
This is why the maximum limit (over temperature) always looks so large compared to the typical value. This is not an example of poor manufacturing control, simply an intrinsic
characteristic of the transistors.

Since the input bias current is part of the op amp, the only way to compensate for it is through design. One good method for doing this is to design in a compensation resistor. This
additional resistance added to the circuit will decrease the offset voltage.
For both inverting and non-inverting amplifier circuits, the bias current compensation resistor, R
, is placed in series with the non-inverting input in order to compensate for the bias
comp
current voltage drops in the divider network.

The following are schematics for inverting and non-inverting circuits with R
comp
The difference between the bias currents at the inverting and non-inverting inputs is called the Input Offset Current, I
OS
OS
=I
-I
Offset current is typically an order of magnitude less than bias current.

In the case of bipolar inputs, offset current can be nullified by matching the impedance seen at the inputs. In the case of CMOS or JFET inputs, the offset current is usually
not an issue and matching the impedance is not necessary.
Precision photodiode amplifier applications require very low input bias
current.
Often referred to as the Maximum Output Voltage, V
, is defined as the maximum positive or negative peak output voltage that
OM
can be obtained without wave form clipping, when quiescent DC output voltage is zero.
V
OM
is limited by the output impedance of the amplifier, the saturation voltage of the output transistors, and the power supply voltages. This is depicted in the figure below.
This emitter follower structure cannot drive the output voltage to either rail. Rail-to-rail output op amps use a common emitter (bipolar) or common source (CMOS) output stage.
With these structures, the output voltage swing is only limited by the saturation voltage (bipolar) or the on resistance (CMOS) of the output transistors, and the load being driven.
Maximum and minimum output voltage is usually a design issue when dynamic range is lost if the op amp cannot drive to the rails. This is the case in single supply systems where
the op amp is used to drive the input of an ADC, which is configured for full scale input voltage between ground and the positive rail.
This emitter follower structure cannot drive the output voltage to either rail. Rail-to-rail output op amps use a common emitter (bipolar) or common source (CMOS) output stage.
With these structures, the output voltage swing is only limited by the saturation voltage (bipolar) or the on resistance (CMOS) of the output transistors, and the load being driven.
Maximum and minimum output voltage is usually a design issue when dynamic range is lost if the op amp cannot drive to the rails. This is the case in single supply systems where
the op amp is used to drive the input of an ADC, which is configured for full scale input voltage between ground and the positive rail.
Because newer products are focused on single supply operation, datasheets use the terminology V
OH
and V
OL
to specify the
maximum and minimum output voltage.

Phase margin and gain margin are different ways of specifying the stability of the circuit.
Gain margin of an amplifier is the gain at the point where there has already been a phase shift of 180. If the gain at this point is more
than unity, then the amplifier is going to be unstable.
This is because once there has been a 180 phase shift, the feedback is actually going to be positive. In terms of dB that means negative gain is going to be stable at a 180 phase
shift.
Phase margin is the difference between the phase when gain is unity ( 0 dB) and 180. If at 0 dB the phase lag is greater then 180, then the
amplifier is unstable. This is due to the reason explained previously. It would imply that the gain margin is positive.
This graphic shows the phase margin and gain margin of an amplifier. The amplifier is clearly stable. The gain margin has a negative value and it is measured after a 180
phase shift in the amplifier. The phase margin happens at 0 dB and the phase lag is less than 180. A commonly accepted design goal is a 45 phase margin.

Bandwidth is a very important parameter. The frequency bandwidth is measured at the point where the op amp's gain falls to 0.707 or 1/(2) of its low frequency value. This point is
usally referred to as the -3 dB point of the amplifier and it indicates that the gain at that point has dropped by 3 dB from its maximum value.
The following graphic shows the -3 dB points for some different gains.
The open loop configuration has the highest DC gain. However, as the graph shows, this configuration is extremely bandwidth limited. This means that the gain starts to roll
off at only a few Hz, or that the -3 dB frequency is only a few Hz.
The open loop configuration has the highest DC gain. However, as the graph shows, this configuration is extremely bandwidth limited. This means that the gain starts to roll
off at only a few Hz, or that the -3 dB frequency is only a few Hz.
In closed loop configuration, the DC gain of the amplifier or the gain of the amplifier at zero frequency is reduced. However, the op amp's bandwidth is much wider, meaning
that the frequency at which the op amp starts to roll off has increased (-3dB point).
The frequency at which the op amp gain is only 1 or is at 0 dB is called the unity gain frequency.
The closed loop gain of a unity gain stable op amp at any given point multiplied by its -3 dB bandwidth gives the unity gain
frequency and is known as the Gain Bandwidth Product.
Gain bandwidth is specified on the datasheet and the circuit designer sets the gain, with this information the user can find the bandwidth of the circuit.
3.17 Slew Rate
Slew Rate, SR, refers to the maximum rate of change of the amplifier's output per unit of time.
The following is the formula used to obtain the slew rate.
The following figure shows a graphical representation of this formula.
Slew rate is expressed in
Slew rate expresses how fast the op amp's output can follow the input. In the graph below, the output signal is "slewing." The blue signal is applied to the input of the amplifier and
the red signal or the output is trying to follow the input as fast as it can but it slews on the rising and falling edges.
Slew rate can limit a circuit's usable bandwidth to much lower than the - 3 dB
bandwidth.
3.18 Settling Time
3.18 Settling Time
Settling Time, T , is the time required for the output voltage to settle to within a specified percentage of the final value given a
S
step input.
It takes a finite time for a signal to propagate through the internal circuitry of an op amp; therefore, it takes a period of time for the output to react to a step change in the input. In
addition, the output normally overshoots the target value, experiences damped oscillation, and then settles to a final value.
Settling time is a design issue in data acquisition circuits when signals are changing rapidly. An example is when an op amp is designed to follow a multiplexor to buffer the input to
an ADC. Step changes can occur at the input to the op amp when the multiplexor changes channels. The output of the op amp must settle to within a certain tolerance before the
ADC samples the signal.
The combined settling time for an op amp and an ADC for a full-scale step input to within 1 LSB must be less than the ADC's specified sampling rate. The following chart lists the
required weight of 1 LSB against full-scale for many different bit systems.
Example:
For a 10 bit system and t = 100ns
s
10
1 LSB = 1/(2 - 1) * 100% = 0.0978%

Op amp settling time << 100ns to 0.0978%
High speed op amp datasheets usually specify settling time to 0.1% or 0.01% of full
scale.

Total harmonic distortion plus noise compares the frequency content of the output signal to the frequency content of the input. Ideally, if the input signal is a pure sine wave, the output
signal is a pure sine wave. Due to nonlinearity and noise sources within the op amp, the output is never pure.
Total Harmonic Distortion plus Noise, THD + N, is the ratio of all other frequency components to the fundamental. It is usually
specified as a percentage and is found with the following formula.
The figure below shows a hypothetical graph where THD + N = 1%. The fundamental is the same frequency as the input signal. Nonlinear behavior of the op amp results in
harmonics of the fundamental being produced in the output. The noise in the output is mainly due to the input noise of the op amp. All the harmonics and noise added together
make up 1% of the fundamental.
make up 1% of the fundamental.
Two major reasons for distortion in an op amp are the limit on output voltage swing and slew rate. Typically an op amp must be operated at or below its recommended operating
conditions to realize low THD.
The following is a typical figure found on the datasheet for a National Semiconductor part. It shows THD+N vs. Frequency.
3.20 Supply Voltage
Supply Voltage, V
CC
or V , is the source for the op amp which supplies the power needed for the op amp to function.
S
The supply voltage is listed on the datasheet and is always restricted by the Absolute Maximum Ratings. As the term implies, the maximum here refers to the maximum limits at
which an op amp will actually be able to operate safely. If the op amp is forced to operate under conditions that exceed the maximum ratings, there will be permanent damage to
the internal circuitry of the op amp. The part simply will not function if the operating conditions are below the conditions specified.
The following graphic shows the Absolute Maximum Rating section from a National Semiconductor op amp datasheet.
Other limitations on the values for operating the op amp are the Operating Ratings. These are conditions under which the amplifier is functional; however, specific performance
Other limitations on the values for operating the op amp are the Operating Ratings. These are conditions under which the amplifier is functional; however, specific performance
guarantees do not apply to these conditions. An example could be an op amp for which the guaranteed table specifications are for when there is 5 volts supply, but the operating
rating of the amplifier will either match these values, but most often, will exceed the given ranges.
The following graphic shows the Operating Ratings section from a National Semiconductor op amp datasheet. It is followed by the note that accompanies both the Absolute
Maximum and Operating Ratings sections.
3.21 Supply Current
Supply Current, I , is the quiescent current draw of the op amp or op amps, if there are multiple units, with no load.
S
The supply current is listed on National Semiconductor datasheets usually per amplifier, but it can be found as a total value when there are more amplifiers per package. This
should be specified and therefore obvious for the given values.
The graph above was taken from the datasheet for the LMV654. This is a typical graph found on most datasheets. In this example the title contains the information that the supply
current values are per amp. This is necessary here, since the LMV654 contains four amplifiers in one package.
Shutdown Operation
Op amps may be offered with shutdown or disable modes. They can be active high or active low depending on the design. In these modes all internal device biasing is turned off in
order to minimize supply current flow and often the output goes into high impedance mode.
There will be a threshold voltage associated with the shutdown. Whether the voltage is above or below the value of the threshold voltage will determine if the device is in shutdown
or active mode, depending on its design. The following is an example with typical values which comes from the LMH6639 datasheet. Common voltages for logic gates are +5V or
+ 3V. To ensure proper power on/off with these supplies, the logic should be able to swing to 3.4V and 1.4V minimum, respectively.
The datasheet will provide the threshold voltage. The following are two graphics taken from the LMH6647 datasheet.
The following net links will direct you to the datasheets for two recent parts from National which offer shutdown.
The LMH6639 Datasheet
The LMH6647 Datasheet

Since op amps are primarily used to amplify small precision signals, it is important to understand the effects of all the associated noise sources. An op amp noise model is shown
below.
There are two sources of input voltage noise. The first is represented as a noise source, V , in series with the input, as in a conventional op amp circuit. This noise is reflected to
NI
the output by the op amp gain, G. The second noise source is the output noise, V
here referred to V
, represented as a noise voltage in series with the op amp output. The output noise, shown
NO
, can be referred to the input by dividing by the gain, G.
OUT
There are also two noise sources associated with the input noise currents I
N+
and I . Even though I

N-
therefore, the noise they each create must be summed in a root-sum-squares (RSS) fashion. I
N+
N+
and I
N-
are usually equal (I
N+
flows through one-half of R , and I

S
voltages, each having an amplitude, I R /2. Each of these two noise sources is reflected to the output by the op amp gain, G.
N S
The total output noise is calculated by combining all four noise sources in an RSS manner:
The total noise, referred to the input (RTI) is simply the above expression divided by the in amp gain, G:
Contact/Help Information
N-
N-
= I ), they are uncorrelated, and

N
the other half. This generates two noise
Contact/Help Information
For additional information on getting started go to http://www.national.com/analog/training/getting_started
To contact us, and send feedback go to
http://wwwd.national.com/feedback/newfeed.nsf/newfeedback?openform&category=pwdesignuniv
For Frequently Asked Questions go to
http://www.national.com/analog/training/faqs
Thank you,
PowerWise Design University Team
Operational Amplifier Parameters Copyright 2010 by National Semiconductor All rights reserved

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Course Map/Table of Contents

2.1 What is an Op Amp?

3. Operational Amplifier Parameters

3.1 Op Amps Variations

1.1 Course Navigation

1.2 Course Objectives

, CMRR, and PSRR.

2. The Basics of an Operational Amplifier (Op Amp)

2.1 What is an Op Amp?

2.2 Ideal vs. Real Op Amps

2.3 The Op Amp's Three Stages

2.4 Inputs of the Op Amp

2.5 Closed Loop

Op amps use negative feedback.

Op amps use negative feedback.

2.6 Why Negative Feedback?

2.7 Inverting Closed Loop

We also know that:

must be equal since the input bias current is zero.

2.7.1 Example: Inverting Amplifier

2.7.2 Input and Output

2.8 Non-inverting Closed Loop

The output current (referred to above as I

Performing simple mathematical operations gives the following equation:

This is the non-inverting op amp's closed loop gain.

2.8.1 Example: Non-inverting Amplifier

2.8.2 Input and Output

2.9 Types of Op Amps

3. Operational Amplifier Parameters

3.1 Op Amps Variations

3.2 Parametric Definitions

3.3 Parametric Definitions Continued

3.3 Parametric Definitions Continued

3.4 Input Offset Voltage

limits the practical gain range of the op amp.

3.5 How VOS Is Measured

now we can find V

with the following

now we can find V

with the following

This is a simple circuit that will work to measure V

, CMRR, PSRR, and gain. It is a more accurate way to measure the V

than the previous simple circuit.

voltage includes both offset voltage and gain errors.

buck input can be used as follows. Once the V

voltage is measured, a voltage that is equal, but opposite in sign, to the V

voltage can be applied to the V

3.6 TCVOS and Long Term Drift

3.7 Input Common Mode Voltage Range

3.8 Common Mode Rejection Ratio

3.8 Common Mode Rejection Ratio

CMRR is usually found to decrease at the higher

3.9 Power Supply Rejection Ratio

3.10 Open Loop Voltage Gain

The Open Loop Voltage Gain, A

of the input voltage.

like the one shown below.

normally given for specified supply voltages and loads.

3.11 Input Capacitance and Resistance

In this figure, if V is grounded, then C

In the figure if V is grounded, then R

is equal to C in parallel with C .

is equal to R in parallel with R .