SDH Basics PDF

INTERNAL INFORMATION
SDH - Basics (Introduction)
a
Erstellt - Prepared
Verantwortlich - Subject Responsible
Datum - Date
Rev
Dokumentnr - Document no.
NEOR3 Fritz Schmocker
NEOR3 Fritz Schmocker
1998-06-01
NUHN:95-045 Uen
Freigabe - Doc Respons/Approved
NEOS (Ernst Rohrbach)
Kontr - Checked
File
sdh_f.fm5
Introduction to the
Synchronous Digital Hierarchy
and related Subjects
1 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
2 (195)
TABLE OF CONTENTS
1
GENERAL ...........................................................................................
1.1
Introduction ............................................................................
1.2
Prerequisites ...........................................................................
1.3
Terminology ............................................................................
1.4
Revision History .......................................................................
1.5
References ..............................................................................
PDH / SDH - Multiplexing / Mapping Structure .............................
12
2.1
General ...................................................................................
12
2.2
PDH Signals ............................................................................
12
2.3
SDH Signals ............................................................................
12
Short Introduction To PDH ...............................................................
14
3.1
General ...................................................................................
14
3.2
PDH Multiplexing Structure .....................................................
14
3.2.1
3.2.2
3.3
Primary Multiplexing (Overview) ...................................................

Higher Order Multiplexing (Overview) ..........................................
14
14
Primary Multiplexing / Pulse Code Modulation (PCM) ..............
16
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.4
The Human Voice ........................................................................

Low-Pass Filtering ........................................................................
Sampling .....................................................................................
Quantizing / Coding ....................................................................
2 MBit/s Basic Frame ....................................................................
3.3.5.1
Frame Structure .................................................................
3.3.5.2
Line Coding .......................................................................
16
16
16
16
18
18
18
Higher Order Multiplexing .......................................................
20
3.4.1
3.4.2
Principle .......................................................................................
8 MBit/s Frame ............................................................................
3.4.2.1
Frame Structure .................................................................
3.4.2.2
Line Coding .......................................................................
3.4.3
34 MBit/s Frame ..........................................................................
3.4.3.1
Frame Structure .................................................................
3.4.3.2
Line Coding .......................................................................
3.4.4
140 MBit/s Frame ........................................................................
3.4.4.1
Frame Structure .................................................................
3.4.4.2
Line Coding .......................................................................
20
20
20
20
20
20
20
20
20
20
SDH Functional Blocks ......................................................................
26
4.1
26
Functional Block Diagram ........................................................

4.1.1
Transport Terminal Function (TTF) ................................................

4.1.1.1
SDH Physical Interface (SPI) ................................................
4.1.1.2
Regenerator Section Termination (RST) ..............................
4.1.1.3
Multiplex Section Termination (MST) ..................................
26
26
26
26
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4.1.1.4
Multiplex Section Protection (MSP) ....................................
4.1.1.5
Multiplex Section Adaptation (MSA) ..................................
4.1.2
Higher Order Connection Supervision (HCS) ................................
4.1.3
Higher Order Path Connection (HPC) ...........................................
4.1.4
Higher Order Interface (HOI) ........................................................
4.1.4.1
Higher Order Path Termination (HPT) in HOI ......................
4.1.4.2
Lower Order Path Adaptation (LPA) in HOI ........................
4.1.4.3
PDH Physical Interface (PPI) in HOI .....................................
4.1.5
Higher Order Assembler (HOA) ....................................................
4.1.5.1
Higher Order Path Termination (HPT) in HOA ....................
4.1.5.2
Higher Order Path Adaptation (HPA) .................................
4.1.6
Lower Order Connection Supervision (LCS) ..................................
4.1.7
Lower Order Path Connection (LPC) ............................................
4.1.8
Lower Order Interface (LOI) .........................................................
4.1.8.1
Lower Order Path Termination (LPT) ..................................
4.1.8.2
Lower Order Path Adaptation (LPA) in LOI .........................
4.1.8.3
PDH Physical Interface (PPI) in LOI ......................................
4.1.9
Overhead Access (OHA) ...............................................................
4.1.10
Synchronous Equipment Management Function (SEMF) ...............
4.1.11
Message Communication Function (MCF) ....................................
4.1.12
Synchronous Equipment Timing Source (SETS) .............................
4.1.13
Synchronous Equipment Timing Physical Interface (SETPI) ............
26
26
27
27
27
27
27
27
27
27
28
28
28
28
28
29
29
29
29
29
29
29
4.2
SDH Functional Blocks Applied on Multiplexing Structure ........
29
4.3
SDH Logical Functions Applied on Multiplexing Structure .........
32
SDH Multiplexing / Mapping for 2 MBit/s .......................................
34
5.1
General ...................................................................................
34
5.2
Overview .................................................................................
34
Container C-12 .......................................................................
36
5.3
5.3.1
5.3.2
5.4
Structure of C-12 ........................................................................

Asynchronous Mapping of 2 MBit/s into C-12 .............................
36
36
Virtual Container VC-12 ..........................................................
38
5.4.1
5.4.2
5.5
Structure of VC-12 ......................................................................

Mapping of C-12 into VC-12 .......................................................
38
38
Tributary Unit TU-12 ................................................................
40
5.5.1
5.5.2
5.5.3
5.6
Structure of TU-12 ......................................................................

Mapping of VC-12 into TU-12 .....................................................
Pointer Justification on TU-12 Level .............................................
40
40
40
Tributary Unit Group TUG-2 ....................................................
44
5.6.1
5.6.2
5.7
Structure of TUG-2 ......................................................................

Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe .....................
44
44
Tributary Unit Group TUG-3 (TUG-2 Structure) .......................
46
5.7.1
5.7.2
5.7.3
5.8
Structure of TUG-3 (TUG-2 Structure) .........................................

Multiplexing of 7 x TUG-2 Into TUG-3 .........................................
Multiplexing of 7 x TUG-2 (containing TU-12s) into TUG-3 ..........
46
46
46
Virtual Container VC-4 (TUG Structure) ..................................
50
5.8.1
Structure of VC-4 (TUG Structure) ..............................................
50
a
5.8.2
5.8.3
5.8.4
5.8.5
5.9
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Administrative Unit AU-4 ........................................................
58
Structure of AU-4 ........................................................................

Mapping of VC-4 into AU-4 .........................................................
Pointer Justification on AU-4 Level ...............................................
5.9.3.1
Justification Opportunities and Indications .........................
5.9.3.2
Example for Positive Pointer Justification ............................
5.9.3.3
Example for Negative Pointer Justification ..........................
58
58
58
58
58
58
Administrative Unit Group AUG ..............................................
64
Structure of AUG .........................................................................

Multiplexing of 1 x AU-4 into AUG ..............................................
64
64
SDH Multiplexing / Mapping for 34 MBit/s ....................................
66
6.1
General ...................................................................................
66
6.2
Overview ................................................................................
66
Container C-3 .........................................................................
68
6.3
6.3.1
6.3.2
6.4
Structure of C-3 ...........................................................................

Asynchronous Mapping of 34 MBit/s into C-3 ..............................
68
70
Virtual Container VC-3 ............................................................
72
6.4.1
6.4.2
6.4.3
6.5
Structure of VC-3 ........................................................................

Mapping of C-3 into VC-3 ...........................................................
VC-3 Path Overhead (Lower Order POH) .....................................
72
72
74
Tributary Unit TU-3 .................................................................
76
6.5.1
6.5.2
6.5.3
6.6
Structure of TU-3 .........................................................................

Mapping of VC-3 into TU-3 .........................................................
Pointer Justification on TU-3 Level ................................................
76
76
76
Tributary Unit Group TUG-3 (TU-3 Structure) .........................
80
6.6.1
6.6.2
6.7
Structure of TUG-3 (TU-3 Structure) ............................................

Multiplexing of 1 x TU-3 into TUG-3 ............................................
80
80
Virtual Container VC-4 ............................................................
82
6.7.1
6.7.2
6.7.3
Rev
52
54
54
54
5.10.1
5.10.2
Datum - Date
VC-4 Path Overhead (Higher Order POH) ....................................

Multiplexing of 3 x TUG-3 (containing TUG-2s) into VC-4 ............
VC-4 with TU-12 Multiplexing .....................................................
Multiplexing Mechanism for 63 x TU-12 into VC-4 .......................
5.9.1
5.9.2
5.9.3
5.10
Structure of VC-4 ........................................................................

Multiplexing of 3 x TUG-3 (containing TU-3s) into VC-4 ...............
82
82
82
6.8
Administrative Unit AU-4 ........................................................
82
6.9
Administrative Unit Group AUG ..............................................
82
SDH Multiplexing / Mapping for 140 MBit/s ..................................
84
7.1
Overview ................................................................................
84
Container C-4 .........................................................................
86
7.2
7.2.1
7.2.2
7.3
Structure of C-4 ...........................................................................

Asynchronous Mapping of 140 MBit/s into C-4 ............................
86
88
Virtual Container VC-4 (C-4 Structure) ...................................
90
7.3.1
Structure of VC-4 (C-4 Structure) ................................................
90
a
7.3.2
7.3.3
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90
90
7.4
Administrative Unit AU-4 .........................................................
90
7.5
Administrative Unit Group AUG ...............................................
90
STM-N Frame .....................................................................................
92
8.1
92
8.2
STM-1 Frame ...........................................................................

Frame Structure ...........................................................................
Multiplexing of 1 x AUG into STM-1 Payload ...............................
STM-1 Multiplex Section Overhead (MSOH) .................................
STM-1 Regenerator Section Overhead (RSOH) .............................
92
92
92
92
STM-4 Frame ...........................................................................
96
8.2.1
8.2.2
8.2.3
8.2.4
8.3
Frame Structure ...........................................................................

Multiplexing of 4 x AUG into STM-4 Payload ...............................
STM-4 Multiplex Section Overhead (MSOH) .................................
STM-4 Regenerator Section Overhead (RSOH) .............................
96
96
96
96
STM-16 Frame ......................................................................... 100

8.3.1
8.3.2
8.3.3
8.3.4
Frame Structure ...........................................................................

Multiplexing of 16 x AUG into STM-16 Payload ...........................
STM-16 Multiplex Section Overhead (MSOH) ...............................
STM-16 Regenerator Section Overhead (RSOH) ...........................
100
100
100
100
SDH Maintenance Signals ................................................................. 104

9.1
9.2
General ................................................................................... 104

Maintenance Signals and Consequent Actions ......................... 104
9.2.1
9.2.2
9.3
Connection Level / Termination Level ...........................................

Indications and Consequent Actions ............................................
104
106
SDH Maintenance Signal Interaction ........................................ 112

9.3.1
9.3.2
9.3.3
10
Datum - Date
Mapping of C-4 into VC-4 ...........................................................

8.1.1
8.1.2
8.1.3
8.1.4
Indication / Action Flow ...............................................................

Examples .....................................................................................
Alarm Reporting / Alarm Suppression ..........................................
112
112
112
Protection ........................................................................................... 116

10.1
Multiplex Section Protection (MSP) ......................................... 116

10.1.1
10.1.2
MSP Architecture / Functional Blocks ...........................................

MSP Operation Modes ................................................................
10.1.2.1
Bi-Directional Operation ....................................................
10.1.2.2
Uni-Directional Operation ..................................................
10.1.3
MSP Switching Modes .................................................................
10.1.3.1
Revertive Switching ...........................................................
10.1.3.2
Non-Revertive Switching ...................................................
10.1.4
Basic MSP Switch Model ..............................................................
10.1.5
Application Examples of the MSP Switch Model ..........................
10.1.5.1
1:2 Architecture (one for two) ...........................................
10.1.5.2
1:1 Architecture (one for one) ...........................................
10.1.5.3
1+1 Architecture (one plus one) ........................................
10.1.6
MSP Signalling ............................................................................
10.1.7
Examples of Automatic Protection Switching (APS) in MSP ..........
116
116
116
116
116
116
116
118
120
120
120
120
124
126
a
10.1.7.1
10.1.7.2
10.1.7.3
10.2
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APS Protocol for 1:2 Architecture ......................................

APS Protocol for 1+1 Architecture .....................................
Principle of 1:1 MSP in USHR .............................................
126
126
126
Sub-Network Connection Protection (SNCP) [*** Part of next Rev. of

Document ***] ....................................................................... 144
Synchronous Equipment Timing .............................................. 146

11.1.1
11.1.2
11.1.3
11.2
Timing Functional Blocks (Overview) ............................................

Synchronous Equipment Timing Physical Interface (SETPI) .............
Synchronous Equipment Timing Source (SETS) .............................
11.1.3.1
General .............................................................................
11.1.3.2
Selector A ..........................................................................
11.1.3.3
Synchronous Equipment Timing Generator (SETG) .............
11.1.3.4
Selector B , Selector C and Squelching ...............................
146
146
146
146
146
146
147
Jitter [*** Part of next Rev. of Document ***] ....................... 149
Transmission Aspects ....................................................................... 150

12.1
Line Codes .............................................................................. 150

12.1.1
General .......................................................................................
12.1.1.1
About Line Codes for Electrical Signals ..............................
12.1.1.2
About Line Codes for Optical Signals .................................
12.1.1.3
HDB3 Code .......................................................................
12.1.1.4
CMI Code ..........................................................................
12.1.2
PDH Line Coding .........................................................................
12.1.2.1
Electrical PDH Signals .........................................................
12.1.2.2
Optical PDH Signals ...........................................................
12.1.3
STM-N Line Coding ......................................................................
12.1.3.1
Electrical SDH Signals .........................................................
12.1.3.2
Optical SDH Signals ...........................................................
12.2
A
6 (195)
Timing (Synchronisation) ................................................................. 146

11.1
12
Datum - Date
150
150
150
152
152
154
154
154
154
154
154
Optical Transmission with Fibres [*** Part of next Rev. of Document

***] ....................................................................................... 156
Appendix A ....................................................................................... 156

A.1
SDH - Sizes and Nominal Speeds ............................................. 156
A.2
Principle of SDH Bit Interleaved Parity (BIP) .............................. 158
A.3
Principle of Time Division Multiplex (TDM) ............................... 160
A.4
Principle of SDH Pointer Processing ......................................... 162

A.4.1
A.4.2
A.5
Principle of SDH Pointer Alignment ..............................................

Principle of SDH Pointer Justifications ...........................................
162
164
TU-12 Numbering in a VC-4 .................................................... 168

A.5.1
A.5.2
A.5.3
A.5.4
General .......................................................................................
Systematic TU-12 Numbering (ETSI) .............................................
Systematic VC-4 Numbering ........................................................
Structured Numbering .................................................................
168
168
168
169
a
B
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Appendix B ........................................................................................ 172

B.1
Abbreviations .......................................................................... 172
a
1
GENERAL
1.1
Introduction
Datum - Date
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This document is an introduction to the Synchronous Digital Hierarchy

(SDH). It contains many figures (that can be used as overhead slides), along
with explanational text.
It includes also an overview over the Plesionous Digital Hierarchy (PDH),
since this knowledge is required to get a complete picture of SDH.
The main goal of this introduction is to convey the basic SDH knowledge
that is required for commissioning staff and testers. The document shall also
be useful as a reference book.
Note :
Where applicable, the explanational text is on left pages
and the figures belonging to it on right pages. Therefore
the document should be copied double-sided
1.2
Prerequisites
The reader should have a basic understanding of telecommunication and
transmission.
It is assumed that the readers are aware why a migration from PDH to SDH
takes place, i.e. why a traditional PDH transmission network wont be able
to fulfil the requirements of the future.
1.3
Terminology
See Appendix B.1 Abbreviationson page 173
The list contains not only pure SDH abbreviations, also a lot of related terms
can be found.
a
1.4
1.5
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Revision History
Revision
Date
95-09-13
Fritz
- First Revision
95-10-12
Fritz
- Mapping/Multiplexing for 34 and 140 MBit/s

included
- STM-4 and STM-16 included
- Improvements throughout the document
95-11-17
Fritz
96-01-31
Fritz
- SDH Maintenance Signals included

- Explanation for Principle of SDH Bit Interleaved
Parity included
- Explanation for Principle of SDH Pointer
Processing improved
- Terms and Abbreviations extended
- Minor corrections and improvements throughout the document
97-11-26
Fritz
98.02-12
Fritz
- Abbreviations list updated

- Minor Updates
References
[1]
[2]
[3]
[4]
|5]
|6]
ITU-T G.703
ITU-T G.704
ITU-T G.707
ETSI 300 147
ITU-T G.782
ITU-T G.783
Prepared Description
Asynchronous Mapping of 140 MBit/s corr.

SDH Functional Blocks included
Multiplex Section Protection (MSP) included
Document partly re-arranged
Document ascomised (Logo, Frutiger font)

Converted to FrameMaker 5
Timing (Synchronisation) included
TU-12 numbering in a VC-4 added
Abbreviations list updated
Document partly re-arranged
Datum - Date
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-- Intentionally left blank --
10 (195)
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PDH / SDH - Multiplexing / Mapping Structure
2.1
General
12 (195)
The figure on the next page shows the structure how the various existing
SDH and PDH signals are (de)multiplexed / (de)mapped into each other.
Source :
ITU-T G.707 (former CCITT G.707, G.708, G.709)
ETSI 300 147
It is very important to understand this structure, i.e. to understand all the required steps to get form one block to the next one.
2.2
PDH Signals
PDH signals have been defined and introduced in the 1960s and up to now
there is a lot of existing PDH equipment installed all over the world, which
will be in use also in the future. Therefore an SDH network has to be able
to interface and to transport the most important PDH signals.
These are :
- 1.5 MBit/s
(USA)
[1544 kBit/s]
- 2
MBit/s
(Europe)
[2048 kBit/s]
- 6
MBit/s
(USA)
[6312 kBit/s]
- 34 MBit/s
(Europe)
[34368 kBit/s]
- 45 MBit/s
(USA)
[44736 kBit/s]
- 140 MBit/s
(Europe)
[139264 kBit/s]
This selection is a compromise between the american and the european
PDH standards. For example, it was not possible to provide a container to
carry the european 8 MBit/s signal. without losing any other signal or reducing the efficiency of the multiplexing / mapping structure. It was considered
as the lesser evil to skip the 8 MBit/s signal in the SDH standard.
2.3
SDH Signals
SDH signals are generally named as STM-N, where N could be any number
greater or equal to 1. Todays standards define 1, 4, 16 and 64.
This leads to the following signal types :
- STM-1
155 MBit/s
(optical and electrical)
- STM-4
620 MBit/s
(only optical)
- STM-16 2.5 GBit/s
(only optical)
- STM-64 10 GBit/s
(only optical)
Higher transmission rates than 10 GBit/s) are under study. The main problem is to manufacture the required components (such as optical transmitters
and receivers) for such high rates.
PDH
SDH
xN
STM-N
PDH / SDH - Multiplexing / Mapping Structure

x1
AUG
AU-4
VC-4
C-4
D4
140Mb/s
x3
x1
TUG-3
x3
TU-3
VC-3
x1
TU-2
VC-2
C-2
D2
6Mb/s
x3
TU-12
VC-12
C-12
D12
2Mb/s
x4
TU-11
VC-11
C-11
D11
13 (195)
1.5Mb/s
TUG-2
Synchronous Transport Module N
Administrative Unit Group
Administrative Unit x
Virtual Container x
Tributary Unit Group x
Tributary Unit x
Container x
PDH Signal Level x
NUHN:95-045 Uen
34Mb/s
45Mb/s
x7
STM-N
AUG
AU-x
VC-x
TUG-x
TU-x
C-x
Dx
D3
Rev
C-3
VC-3
Datum - Date
AU-3
1998-06-01
x7
Datum - Date
Rev
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Short Introduction To PDH
3.1
General
14 (195)
In this chapter only the european standard is covered.
3.2
PDH Multiplexing Structure
3.2.1
Primary Multiplexing (Overview)

The basic function of a Primary Multiplexer is to multiplex several telephony
channels (voice and signalling) into a digital line signal.
The analogue voice signals are sampled and converted into a digital code
(Pulse Code Modulation) that can be easily processed further by using Time
Division Multiplex.
Of course, also data channels (e.g. computer links) can be multiplexed instead of voice channels. The principle of multiplexing is very similar.
The line signal has a bit rate of 2048 kBit/s (european standard) and is suitable for transmission and to be multiplexed to higher order bit rates.
Source :
ITU-T G.703
(Electrical characteristics)
ITU-T G.704
(Multiplexing structure)
3.2.2
Higher Order Multiplexing (Overview)

Higher Order Multiplexing is done on different levels.
- 4 x 2048 kBit/s
to
1 x 8448 kBit/s
- 4 x 8448 kBit/s
to
1 x 34368 kBit/s
- 4 x 34368 kBit/s
to
1 x 139264 kBit/s
- 4 x 139264 kBit/s
to
1 x 565 MBit/s
(Not standardised)
The multiplexing is done by bit-interleaved Time Division Multiplex.
Source :
ITU-T G.703
(Electrical characteristics)
ITU-T G.704
(Multiplexing structure)
Primary Multiplexing
PDH - Multiplexing Structure

Higher Order Multiplexing
Level 4
4x140
Level 3
4x34
Level 2
Rev
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4x2
Subscribers
140
34
2048 kBit/s
15 (195)
8448 kBit/s
34368 kBit/s
139264 kBit/s
Datum - Date
565
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4x8
Level 1
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3.3
Primary Multiplexing / Pulse Code Modulation (PCM)
3.3.1
The Human Voice

The human voice contains frequencies up to 20 kHz.
The major part of the information is contained in the bandwidth between
300 Hz and 3700 Hz. Reducing the frequency range to this bandwidth causes only little decrease in intelligibility of a voice, but it saves a lot of equipment, i.e. allows to use it more efficient.
3.3.2
Low-Pass Filtering
A Low Pass filter cuts the frequencies above 3.7 kHz. The frequencies below
300 Hz are mainly cut by coupling components in the system like transformers or capacitors.
3.3.3
Sampling
According to the Sampling Theorem it is a requirement to sample a signal
at least with the double of the highest frequency contained in that signal,
in order to be able to re-convert it back to analog. The highest frequency is
3.7 kHz, therefore a sampling rate of at least 7.4 kHz is required.
The standardized sampling rate is 8 kHz, i.e. 1 sample every 125 s
3.3.4
Quantizing / Coding
For each sample the appropriate digital code is assigned, depending on the
quantization interval the sample falls in. (Note: In real PCM systems the
quantization is not linear, in order to increase the efficiency for voice transmission.)
Each code consists of 8 bits, the codes are generated with the sampling rate
of 8 kHz, this results in a bit rate of 64 kBit/s.
Conclusion :
- One Voice Channel occupies a bandwidth of 64 kBit/s.
- One Voice Channel requires a transmission capacity of
1 Byte every 125 s.
17 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Basic Steps of PCM

G(t)
Voice
Contains frequencies up to
20 kHz
H(f)
Low Pass Filtering
3.7 kHz
Cutting the frequencies

above 3.7 kHz
f
G(t)
Analog Signal
Sample
Sampling
Sampling rate = 8 kHz
(Sampling interval = 125 s)
t
125 s
G(t)
3
2
1
0
-1
-2
-3
Quantizing / Coding
Assignment of appropriate
digital code for each sample
Quantization Thresholds
Associated Codes
Each sample is converted into an 8 bit binary code
One 8 Bit Code every 125 s
= 64 kBit/s
= 1 Voice Channel
X X X X X X X X
8 Bit / 125 s
a
3.3.5
2 MBit/s Basic Frame
3.3.5.1
Frame Structure
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
18 (195)
A 2 MBit/s Basic Frame consists of 32 Time Slots (TS) with 8 Bits each.
The frame rate has to be the same as the sampling rate for the voice channels, i.e. 8 kHz or 125 s respectively. This results in the following bit rate
for 2 MBit/s signals :
32 TS per 125 s x 8 bit = 256 Bit/125s = 2048000 Bit/s
The Time Slots are numbered from 0 to 31.
TS0 contains the Frameword (also called Frame Alignment Signal FAS) or the
Non-FAS word. The actual Frameword is contained in all even frames and is
actually used for frame alignment (Sequence 0011011). The Non-FAS
word is transmitted in all odd frames and is used for error checking (i.e. Cyclic Redundancy Check CRC-4) , maintenance signals like Remote Alarm Indication (RAI) and contains bits for national use.
TS1 to TS 15 are used to carry the first 15 voice channels.
TS16 is used to carry the signalling information (CAS or CCS) for the voice
channels. )
TS17 to TS31 are used to carry the second 15 voice channels.
(Note: In systems without signalling, TS16 can be used to carry data as well.
Note: Time Slots TS1 to TS31 can also be used to carry other 64 kBit/s data
than coded voice channels, e.g. computer data links.
Conclusion :
- A 2 MBit/s signal has a transport capacity of 30 voice channels with
associated signalling or 31 data channels without signalling.
3.3.5.2
Line Coding
To get the data stream ready to be transmitted, the binary signal has to be
converted into a line code that is suitable for transmission.
The Line Code used for 2 MBit/s signals is HDB3
For more information refer to section 12.1
Line Codeson page 150
2 MBit/s Basic Frame
Primary Multiplexing
Contains 32 Timeslots [TS] with 8 Bits each = 256 Bits
Frameword [TS0] with CRC-4 (optional)
30 voice channels [TS1 - 15 , 17 - 31]
Signalling information (CAS - Multiframe) [TS16]
FAS or Non-FAS
Channel 1
Channel 15
Signalling (CAS/CCS)
Channel 16
Channel 30
X X X X X X X X
X X X X X X X X
X X X X X X X X
X X X X X X X X
X X X X X X X X
X X X X X X X X
TS29
TS30
TS31
32 x 8 Bit = 256 Bit / 125 s
Frame Alignment in TS0
CRC
TS31
1
1
FAS
TS0
CRC : Bits used for Cyclic Redundancy Check (optional)

RAI : Remote Alarm Indication Bit
Sn : Bits for National Use
1
TS1
CRC
RAI Sn Sn Sn Sn Sn
Non-FAS
TS31
TS1
1
1
FAS
TS31
Odd Frame
TS0
TS1
Even Frame
19 (195)
Even Frame
TS0
CRC
TS17
TS16
NUHN:95-045 Uen
TS15
Rev
TS3
TS2
Datum - Date
TS1
1998-06-01
TS0
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
3.4
Higher Order Multiplexing
3.4.1
Principle
20 (195)
Four independent tributary data streams of one multiplex hierarchy level are
multiplexed to the next higher level into the respective frame structure.
Since the speed of those four tributaries can be slightly different they have
to be adjusted by means of a justification mechanism (bit-stuffing). Each
Higher Order Frame has a Justification Bit for each of the four tributaries
(JB1 ... JB4) ,that can be used either as data bit or as stuff bit. Whether the
bit is data or stuff bit is indicated by 3 or 5 sets of Justification Control Bits
(JC1 ... JC4). Several sets of control bits are used to allow a majority voting
to reduce the probability of justification errors. In case a tributary has its
nominal speed, the justification rate is about half-half.
The adjusted data streams (together with the Justification Control information) are then joined together by using Bit Interleaving Time Division Multiplex. (See Principle of Time Division Multiplex (TDM) on page 160)
Finally, the Frame Alignment Signal (FAS), the Remote Alarm Indication (RAI)
and the spare bits for national use are added.
3.4.2
8 MBit/s Frame
3.4.2.1
Frame Structure
See 8 MBit/s Frame Structureon page 22
3.4.2.2
Line Coding
3.4.3
34 MBit/s Frame
3.4.3.1
Frame Structure
3.4.3.2
Line Coding
3.4.4
140 MBit/s Frame
3.4.4.1
Frame Structure
3.4.4.2
Line Coding
The Line Code used for 140 MBit/s signals is CMI
Speed
Adjust
Tributary #2
Data Stream
Speed
Adjust
21 (195)
= Frame Alignment Signal

= Remote Alarm Indication
FAS
RAI
NUHN:95-045 Uen
Control & Synchronisation
Rev
Speed
Adjust
Tributary #4
Data Stream
Datum - Date
Speed
Adjust
Higher Order Frame
1998-06-01
Tributary #3
Data Stream
Bit Interleaving
Multiplexer
FAS , RAI and Spare Bit Insertion
Tributary #1
Data Stream
Principle of PDH Higher Order Multiplexing
8 MBit/s Frame Structure
Bit
10 11 12 13 14 15 16 17 18 19
211 212
Set 1
0 RAI Bit
12 T1 T2 T3 T4 T1 T2 T3 T2 T3 T4
Frame Rate :
848 Bit
8448000 Bit/s
= 100.38 s -> 9962 Frames/s
Explanations :
:
:
:
:
:
:
Frame Alignment Signal (1111010000)

Remote Alarm Indication
Spare bit for national use
Actual data bits from tributary 1, 2, 3, 4 respectively
Justification Control bits for tributary 1, 2, 3, 4 respectively
Actual Justification Bits for tributary 1, 2, 3, 4 respectively
22 (195)
Set 1, Bit 1 ...10

RAI
BIT 12
T1, T2, T3, T4
JC1, JC2, JC3, JC4
JB1, JB2, JB3, JB4
Frame Size : 4 x 212 Bits = 848 Bits
JC1 JC2 JC3 JC4 JB1 JB2 JB3 JB4 T1 T2 T3 T4 T1 T2 T3 T4 T1 T2 T3 T4 T3 T4
NUHN:95-045 Uen
Set 4
Rev
JC1 JC2 JC3 JC4 T1 T2 T3 T4 T1 T2 T3 T4 T1 T2 T3 T4 T1 T2 T3 T4 T3 T4
Set 3
Datum - Date
1998-06-01
Set 2
Bit
10 11 12 13 14 15 16 17 18 19
383 384
Set 1
0 RAI Bit
12 T1 T2 T3 T4 T1 T2 T3 T2 T3 T4
Frame Rate :
1536 Bit
34368000 Bit/s
= 44.693 s -> 22375 Frames/s
Explanations :
:
:
:
:
:
:

Spare bit for national use
23 (195)
Set 1, Bit 1 ...10

RAI
BIT 12
T1, T2, T3, T4
JC1, JC2, JC3, JC4
JB1, JB2, JB3, JB4
Frame Size : 4 x 384 Bits = 1536 Bits
NUHN:95-045 Uen
Set 4
Rev
Set 3
Datum - Date
1998-06-01
Set 2
Bit
10 11 12 13 14 15 16 17 18 19
Set 1
487 488
Bit Bit
0 RAI Bit
14 15 16 T1 T2 T3 T2 T3 T4
Set 6

Frame Rate :
2928 Bit
= 21.025 s -> 47563 Frames/s
139264000 Bit/s
Explanations :
:
:
:
:
:
:

Spare bits for national use
24 (195)
Set 1, Bit 1 ... 12

RAI
BIT 14, 15, 16
T1, T2, T3, T4
JC1, JC2, JC3, JC4
JB1, JB2, JB3, JB4
Set 5
NUHN:95-045 Uen
Set 4
Rev
Set 3
Datum - Date
1998-06-01
Set 2
Frame Size 6 x 488 Bits = 2928 Bits
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
25 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
SDH Functional Blocks
4.1
Functional Block Diagram
26 (195)
See SDH Functional Block Diagramon page 30.

The various blocks of the diagram are briefly described below, along with
cross-references to other sections of the document, where applicable.
4.1.1
Transport Terminal Function (TTF)
4.1.1.1
SDH Physical Interface (SPI)

The SPI function provides the interface between the physical transmission
medium (optical or electrical) and the RST function.
- Optical to electrical conversion (If applicable)
- Clock recovery from incoming signal for synchronisation purposes
- Coding / Decoding
4.1.1.2
Regenerator Section Termination (RST)

The RST function acts as a source and sink for the Regenerator Section Overhead (RSOH). A Regenerator Section is a maintenance entity between and
including two RST functions.
For further details see sections :
- 8.1.4 STM-1 Regenerator Section Overhead (RSOH)on page 92
- 8.2.4 STM-4 Regenerator Section Overhead (RSOH)on page 96
- 8.3.4 STM-16 Regenerator Section Overhead (RSOH)on page 100.
4.1.1.3
Multiplex Section Termination (MST)

The MST function acts as a source and sink for the Multiplex Section Overhead (MSOH). A Multiplex Section is a maintenance entity between and including two MST functions.
- 8.1.3 STM-1 Multiplex Section Overhead (MSOH)on page 92
- 8.2.3 STM-4 Multiplex Section Overhead (MSOH)on page 96
- 8.3.3 STM-16 Multiplex Section Overhead (MSOH)on page 100.
4.1.1.4
Multiplex Section Protection (MSP)

The MSP function provides protection for the STM-N signal against channelassociated failures within a Multiplex Section. The two MSP functions at
both ends of the protected MS have to operate the same way. They communicate via a specified protocol running in K1,K2 bytes in the MSOH. This
Functional Block is optional.
For further details see section :
- 10.1 Multiplex Section Protection (MSP)on page 116.
4.1.1.5
Multiplex Section Adaptation (MSA)

The MSA function provides adaptation of Higher order Paths into Administrative Units (AUs), assembly and disassembly of Administrative Unit Groups
(AUGs), AU-Pointer generation, interpretation and processing.
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
27 (195)

- 5.9 Administrative Unit AU-4on page 58
- 5.10 Administrative Unit Group AUGon page 64.
4.1.2
Higher Order Connection Supervision (HCS)

The HCS function consists of the two basic functions Higher order Path
Overhead Monitor (HPOM) and Higher order Unequipped Generator (HUG).
The HPOM has access to the Higher order POH for monitoring of paths that
are not connected to HPT. The HUG generates unequipped higher order
VCs for cases when no connection is made in HPC.
4.1.3
Higher Order Path Connection (HPC)

The HPC function is the Higher order Path Cross-Connection matrix. This
matrix can be very small, e.g. in an SMUX or it can be quite large, e.g. in a
huge DXC. The HPC function may also provide a protection switch facility
on Higher order Path level.
4.1.4
Higher Order Interface (HOI)
4.1.4.1
Higher Order Path Termination (HPT) in HOI

The HPT function in HOI acts as a source and sink for the Higher order Path
Overhead, i.e. it creates a Higher order VC by generating and adding the
POH to a Higher order Container in upstream direction and it terminates and
processes the POH to determine the Path Attributes in downstream direction. A Higher order Path is a maintenance entity defined between two
Higher order Path Terminations.
- 7.3.2 Mapping of C-4 into VC-4on page 90
- 7.3.3 VC-4 Path Overhead (Higher Order POH)on page 90.
4.1.4.2
Lower Order Path Adaptation (LPA) in HOI

The LPA function in HOI operates at the access port of a synchronous network and adapts the PDH data for transport in the synchronous domain.
For further details see section :
- 7.2.2 Asynchronous Mapping of 140 MBit/s into C-4on page 88.
4.1.4.3
PDH Physical Interface (PPI) in HOI

The PPI function in HOI provides the interface between the LPA and the
physical medium (usually electrical) carrying a PDH-Tributary signal.
- Coding / Decoding
4.1.5
Higher Order Assembler (HOA)
4.1.5.1
Higher Order Path Termination (HPT) in HOA

The HPT function in HOA acts as a source and sink for the Higher order Path
Overhead, i.e. it creates a Higher order VC by generating and adding the
POH to multiplexed Tributary Unit Groups (TUGs) in upstream direction and
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
28 (195)
it terminates and processes the POH to determine the Path Attributes in

downstream direction. A Higher order Path is a maintenance entity defined
between two Higher order Path Terminations.
- 5.8.2 VC-4 Path Overhead (Higher Order POH)on page 52
- 5.8.3 Multiplexing of 3 x TUG-3 (containing TUG-2s) into VC-4on page
54
- 6.7.2 VC-4 Path Overhead (Higher Order POH)on page 82
- 6.7.3 Multiplexing of 3 x TUG-3 (containing TU-3s) into VC-4on page
82.
4.1.5.2
Higher Order Path Adaptation (HPA)

The HPA function provides adaptation of Lower order Paths into Tributary
Units (TUs), assembly and disassembly of Tributary Unit Groups (TUGs), TUPointer generation, interpretation and processing.
- 5.5.2 Mapping of VC-12 into TU-12on page 40
- 5.5.3 Pointer Justification on TU-12 Levelon page 40
- 5.6.2 Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframeon page 44
- 5.7.2 Multiplexing of 7 x TUG-2 Into TUG-3on page 46
- 6.5.2 Mapping of VC-3 into TU-3on page 76
- 6.5.3 Pointer Justification on TU-3 Levelon page 76
- 6.6.2 Multiplexing of 1 x TU-3 into TUG-3on page 80.
4.1.6
Lower Order Connection Supervision (LCS)

The LCS function consists of the two basic functions Lower order Path Overhead Monitor (LPOM) and Lower order Unequipped Generator (LUG). The
LPOM has access to the Lower order POH for monitoring of paths that are
not connected to LPT. The LUG generates unequipped lower order VCs for
cases when no connection is made in LPC.
4.1.7
Lower Order Path Connection (LPC)

The LPC function is the Lower order Path Cross-Connection matrix. This matrix can be very small, e.g. in an SMUX or it can be quite large, e.g. in a huge
DXC. The LPC function may also provide a protection switch facility on Lower order Path level.
4.1.8
Lower Order Interface (LOI)
4.1.8.1
Lower Order Path Termination (LPT)

The LPT function acts as a source and sink for the Lower order Path Overhead, i.e. it creates a Lower order VC by generating and adding the POH to
Lower order Containers in upstream direction and it terminates and processes the POH to determine the Path Attributes in downstream direction. A
Lower order Path is a maintenance entity defined between two Lower order
Path Terminations.
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
29 (195)

- 6.4.3 VC-3 Path Overhead (Lower Order POH)on page 74.
4.1.8.2
Lower Order Path Adaptation (LPA) in LOI

The LPA function in LOI operates at the access port of a synchronous network and adapts the PDH data for transport in the synchronous domain.
- 5.3.2 Asynchronous Mapping of 2 MBit/s into C-12on page 36
- 6.3.2 Asynchronous Mapping of 34 MBit/s into C-3on page 70.
4.1.8.3
PDH Physical Interface (PPI) in LOI

The PPI function in LOI provides the interface between the synchronous multiplexer and the physical medium (usually electrical) carrying a PDH-Tributary
signal.
- Clock recovery from incoming signal for synchronisation purposes
(2 MBit/s only)
- Coding / Decoding
4.1.9
Overhead Access (OHA)

The OHA function provides access to certain bytes in the RSOH , MSOH and
POH. The main intention is to provide service channels for maintenance purposes (e.g. Engineering Orderwire or User Channel).
4.1.10
Synchronous Equipment Management Function (SEMF)

The SEMF function provides the means by which the Network Element Function (NEF) is managed. It interacts with all the other functional blocks by exchanging information and it contains a number of filters to provide a data
reduction on the data received from the other blocks.
4.1.11
Message Communication Function (MCF)

The MCF function provides the interface between the management agent
and the SEMF. It takes care of the DCN aspects of a network element.
4.1.12
Synchronous Equipment Timing Source (SETS)

The SETS function represents the SDH network element clock and it provides
the timing reference for all blocks that deal with the synchronous traffic.
See 11.1 Synchronous Equipment Timingon page 146.
4.1.13
Synchronous Equipment Timing Physical Interface (SETPI)

The SETPI function performs the encoding and adaptation of the physical
synchronisation medium towards the SETS.
See 11.1 Synchronous Equipment Timingon page 146.
4.2
SDH Functional Blocks Applied on Multiplexing Structure

See SDH Functional Blocks Applied on Multiplexing Structureon page 31.
OverHead Access
Synchronous Equipment Management Function
Message Communication Function
Synchronous Equipment Timing Source
Synchronous Equipment Timing Physical Interface
TTF
SPI
RST
MST
MSP
MSA
SDH Physical Interface

Regenerator Section Termination
Multiplex Section Termination
Multiplex Section Protection (Optional)
Multiplex Section Adaptation
Higher order Connection Supervision
HPC
HOI
Higher order Path Connection

Higher Order Interface
HPT
LPA
PPI
Higher order Path Overhead Monitor

Higher order Unequipped Generator
Higher order Path Termination

Lower order Path Adaptation
PDH Physical Interface
Higher Order Assembler
LCS
Lower order Connection Supervision
LPC
Lower order Path Connection
LOI
HPT
HPA
LPOM
LUG

Higher order Path Adaptation
Lower order Path Overhead Monitor
Lower order Unequipped Generator
Lower Order Interface

LPT
LPA
PPI
PDH
Port
PPI
LPA
LPT
HOA
Lower order Path Termination

PDH Physical Interface
30 (195)
HCS
HPOM
HUG
LPC
LPOM
LUG
HPA
Transport Terminal Function
PPI
LPA
HPT
HPT
Sync.
Port
F-I/F
Q-I/F
NUHN:95-045 Uen
SETPI
Rev
OHA
SEMF
MCF
SETS
SETPI
MCF
OHA
Port
SETS
LOI
Datum - Date
OHA
SEMF
LCS
1998-06-01
HOA
PDH
Port
HOI
HPC
HPOM
HUG
MSA
HCS
MSP
MST
RST
SPI
STM-N
Port
TTF
SDH Functional Block Diagram
PDH
SDH
STM-N
AUG
xN
AU-4
SDH Functional Blocks Applied on Multiplexing Structure

VC-4
D4
C-4
140Mb/s
x1
x3
x1
TUG-3
TUG-2
TU-2
VC-2
D2
C-2
6Mb/s
x3
TU-12
VC-12
D12
C-12
2Mb/s
x4
TU-11
VC-11
D11
C-11
x1
34Mb/s
45Mb/s
x7
NUHN:95-045 Uen
1.5Mb/s
HPA
LCS
LPC LPT
LPA
PPI
31 (195)
Synchronous Physical Interface

Multiplex Section Protection
Higher Order Connection Supervision
Higher Order Path Connection
Higher Order Path Termination
Higher Order Path Adaption
Lower Order Connection Supervision
Lower Order Path Connection
Lower Order Path Termination
Lower Order Path Adaption
Plesiochronous Physical Interface
D3
Rev
SPI
RST
MST
MSP
MSA
HCS
HPC
HPT
HPA
LCS
LPC
LPT
LPA
PPI
MSA
HCS
HPC HPT
C-3
SPI
VC-3
Datum - Date
x7
AU-3
RST
MST
MSP
VC-3
1998-06-01
x3
TU-3
a
4.3
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
32 (195)
SDH Logical Functions Applied on Multiplexing Structure

The logical functions used in the SDH Multiplexing Structure are :
- Mapping
- Aligning
- Pointer Processing
- Byte Interleaved Multiplexing
See SDH Logical Functions Applied on Multiplexing Structureon page 33.
PDH
SDH
x1
xN
STM-N
SDH Logical Functions Applied on Multiplexing Structure

AUG
AU-4
VC-4
C-4
D4
140Mb/s
x3
x1
TUG-3
TU-3
VC-3
x3
x1
TUG-2
Pointer Processing
TU-2
VC-2
C-2
6Mb/s
x3
TU-12
Multiplexing
VC-12
C-12
Mapping
D12
2Mb/s
x4
Aligning
D2
TU-11
VC-11
C-11
D11
34Mb/s
45Mb/s
x7
NUHN:95-045 Uen
D3
Rev
C-3
VC-3
Datum - Date
AU-3
1998-06-01
x7
1.5Mb/s
33 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
SDH Multiplexing / Mapping for 2 MBit/s
5.1
General
34 (195)
5.2
Overview
This chapter explains the required steps to put a 2 MBit/s tributary signal into
an SDH structure.
This is one of the most complex multiplexing / mapping paths. If this path is
understood by the reader, all other possible paths are rather easy to follow.
Refer also to section 4 SDH Functional Blockson page 26
Some additional information can be found in A.1 SDH - Sizes and Nominal
Speedson page 156.
PDH
SDH
x1
xN
STM-N
SDH - Multiplexing / Mapping for 2 MBit/s
AUG
AU-4
VC-4
C-4
D4
140Mb/s
x3
x1
TUG-3
x3
TU-3
VC-3
x1
TU-2
VC-2
C-2
D2
6Mb/s
x3
TU-12
VC-12
C-12
D12
2Mb/s
x4
TU-11
VC-11
C-11
D11
35 (195)
1.5Mb/s
TUG-2
Virtual Container x
Tributary Unit x
Container x
PDH Signal Level x
NUHN:95-045 Uen
34Mb/s
45Mb/s
x7
STM-N
AUG
AU-x
VC-x
TUG-x
TU-x
C-x
Dx
D3
Rev
C-3
VC-3
Datum - Date
AU-3
1998-06-01
x7
a
5.3
Container C-12
5.3.1
Structure of C-12
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
36 (195)
See Container C-12 (Asynchronous Mapping for 2 MBit/s)on page 37

The Container C-12 has a size of 1 by 136 bytes. It consists of 4 blocks with
34 bytes each, based on a rate of 125 s per block, thus a C-12 has a rate
of 500 s.
5.3.2
Asynchronous Mapping of 2 MBit/s into C-12

See Container C-12 (Asynchronous Mapping for 2 MBit/s)on page 37
For Asynchronous Mapping, the 4 blocks of the C-12 look similar :
Block 1 :
Byte 1 :
Bit 1 ... 8 -> Fixed Stuff
Byte 2 ... 33 : 256 data bits (per 125 s)
Byte 34 :
Block 2 :
Byte 1 :
Bit 1 ... 2 -> Set 1 of Justification Indic.
Bit 3 ... 6 -> Overhead bits (future use)
Byte 34 :
Block 3 :
Byte 1 :
Byte 34 :
Block 4 :
Byte 1 :
Bit 8 -> First Justification Bit
Byte 2 :
Bit 1 -> Second Justification Bit
Bit 2 ... 8 -> 7 data bits (per 125 s)
Byte 3 ... 33 : 248 data bits per 125 s
Byte 34 :
Since the speed of the 2 MBit/s tributary can vary related to the speed of the
C-12, it has to be adjusted by means of a justification mechanism (stuffing).
The justification is explained by three typical examples below :
a)
If the incoming 2 MBit/s speed is too slow, related to the speed of
the C-12, S1 and S2 are used as stuff bits.
b)
If the incoming 2 MBit/s speed is exactly synchronous to the speed
of the C-12, either one of S1 or S2 is used as stuff bit, the other one
as data bit.
c)
If the incoming 2 MBit/s speed is too fast, related to the speed of
the C-12, S1 and S2 are used as data bits.
Whether S1 / S2 carry data or not is indicated three times by C1 / C2. The
receiver makes a majority vote out of the three indication sets in order to
avoid wrong S1 / S2 interpretation in case one of the indication bits is erroneous.
(Asynchronous Mapping for 2 MBit/s)
Container C-12
Data-Bits (of 2Mb/s Tributary-Signal)
O:
Overhead-Bits (For future use)
Block 2
C1, C2 :
Justification Indication-Bits
- C1 = 0 -> S1 = Data-Bit
- C1 = 1 -> S1 = Stuff-Bit
- C2 = 0 -> S2 = Data-Bit
- C2 = 1 -> S2 = Stuff-Bit
Block 3
Block 1
D:
S1, S2 :
Actual Justification-Bits
- Justification is indicated by C1, C2
(Majority-Vote out of 3)
Block 4
Fixed Stuff-Bits
Justification-Capacity
+/- 1 Bit every 500 s -> +/- 2000 Bit/s (~ +/- 1000 ppm)
Speed of C-12
136 Byte x 8 Bit / 500 s = 2.176 MBit/s
R:
R
.
.
D
R
R
.
.
D
R
R
.
.
D
R
S1
.
.
D
R
NUHN:95-045 Uen
R
.
.
D
R
R
.
.
D
R
R
.
.
D
R
R
.
.
D
R
Rev
R R R R
D D . .
256 x D
. . D D
R R R R
O O O O
D D . .
256 x D
. . D D
R R R R
O O O O
D D . .
256 x D
. . D D
R R R R
R R R R
D D D .
255 x D
. . D D
R R R R
R
D
.
.
R
C2
D
.
.
R
C2
D
.
.
R
C2
D
.
.
R
Datum - Date
R
D
.
.
R
C1
D
.
.
R
C1
D
.
.
R
C1
S2
.
.
R
1998-06-01
136 Bytes (500 s)
1 Byte
37 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
5.4
Virtual Container VC-12
5.4.1
Structure of VC-12
38 (195)
See Virtual Container VC-12 / Mapping of C-12 into VC-12on page 39

The Virtual Container VC-12 has a size of 1 by 140 bytes, based on a rate
of 500 s. It consists of four overhead bytes (V5, J2, N2, K4) and four blocks
of 34 bytes each for carrying blocks of a C-12.
Byte 1 :
Overhead Byte V5
BIP-2 :
Bit Interleaved Parity with 2 bits
- Used for error monitoring of
previous VC. See Note below
REI :
Remote Error Indication
- Used to notify the Near End about bit
errors detected by BIP-2 at the Far End.
RFI :
Remote Failure Indication
- Used to notify the Near End about a
failure condition at the Far End.
Signal Label :
- Used to specify the content of the VC-12
000= Unequipped
001= Equipped - Non Specific
010= Asynchronous Mapped
100= Byte Synchronous Mapped
RDI :
Remote Defect Indication
- Used to notify the Near End about a
defect condition at the Far End.
Byte 2 ... 35 :
Space to carry Block 1 of a C-12.
Byte 36 :
Overhead Byte J2 (Path Trace)
- Used for Lower Order Path Trace
(15 byte identifier + 1 byte for CRC-7)
Byte 37 ... 70 :
Space to carry Block 2 of a C-12.
Byte 71 :
Overhead Byte N2 (Network Operator Byte)
- Used for Tandem Conn. Monitoring.
Byte 72 ... 105 : Space to carry Block 3 of a C-12.
Byte 106 :
Overhead Byte K4
APS-Channel :
- Used for Lower Order APS SIgnalling
Spare :
- For future use
Byte 107 ... 140 : Space to carry Block 4 of a C-12.
Note :
For more information on BIP see A.2 Principle of SDH Bit
Interleaved Parity (BIP)on page 158.
5.4.2
Mapping of C-12 into VC-12

See Virtual Container VC-12 / Mapping of C-12 into VC-12on page 39
The four blocks of a C-12 are just mapped into the respective spaces of the
VC-12.
Virtual Container VC-12 / Mapping of C-12 into VC-12

1 Byte
BIP-2
#1
#2
V5
Used for Tandem Connection Monitoring
APS - Channel
Spare
APS - Channel : Automatic Protection Switching Signalling

Spare :
For future use
39 (195)
Speed of VC-12
140 Byte x 8 Bit / 500 s = 2.240 MBit/s
N2 :
NUHN:95-045 Uen
Network Operator Byte N2
Rev
K4
Repetitively transmitted 16-Byte Frame

containing a Path Access Point Identifier
J2 :
N2
2
C-1 k 4
c
Blo
#140
Bit Interleaved Parity 2

Remote Error Indication (Old name FEBE)
Specifies the content of the VC
Remote Defect Indication (Old name = FERF)
Path Trace J2
2
C-1 k 3
c
Blo
#105
#106
#107
RDI
J2
2
C-1 k 2
c
Blo
#70
#71
#72
Signal Label
Datum - Date
#35
#36
#37
BIP-2 :
REI :
RFI :
Signal Label :
RDI :
RFI
1998-06-01
140 Bytes (500 s)
2
C-1 k 1
c
Blo
REI
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
5.5
Tributary Unit TU-12
5.5.1
Structure of TU-12
See Tributary Unit TU-12on page 41
5.5.2
Mapping of VC-12 into TU-12

See Mapping of VC-12 into TU-12on page 42
5.5.3
Pointer Justification on TU-12 Level

See Pointer Justification on TU-12 Levelon page 43
For more information on SDH pointer justification principles
see A.4 Principle of SDH Pointer Processingon page 162.
40 (195)
V1 (TU-Pointer #1)
N N N N S S P P
Tributary Unit TU-12

P P P P P P P P
Cell #105
Cells #106 ... #138
Cell #139
V1 + V2
144 Bytes (500 s)
V3 (TU-Pointer #3)
Cell #35
Cells #36 ... #68
V3
Used for Justification

- In case of Negative Pointer Justification, this Byte
is used as Auxiliary-Cell
V4
Reserved (For future use)
Cell #69
V4 (TU-Pointer #4)
Cell #70
Cells #71 ... #103
Cell #104
Speed of TU-12
144 Byte x 8 Bit / 500 s = 2.304 MBit/s
10-Bit Pointer Value

- Range for TU-12 is 0 .... 139
- Points to that Cell, where the VC-12 starts
(Location of V5)
Cell #34
NUHN:95-045 Uen
P:
Cells #1 ... #33
Rev
Size Indication
- For TU-12 SS = 10
Cell #0
S:
V2 (TU-Pointer #2)
Datum - Date
New Data Flag (NDF)

- Flag NOT active -> NNNN = 0110
- Flag active
-> NNNN = 1001 (Inverted)
1998-06-01
N:
41 (195)
V1
Important Facts :
- The TU-12 must be locked to the Higher-Order VC
(VC-3 or VC-4)
35 Byte
V2
- The 10-Bit TU-Pointer points to that Cell, where the V5-Byte

of the VC-12 is located (Start of VC-12)
NUHN:95-045 Uen
V4
Rev
35 Byte
- If the Incoming VC-12 is too slow, the Byte immediately

after V3 (Cell #35) is used as Stuff-Byte to stuff the excess
transport capacity of the TU-12. The V5-Byte moves 1 Cell
down in the TU-12 and the Pointer Value increments by 1.
-> Positive Pointer Justification
V3
35 Byte
- If the incoming VC-12 is too fast, the excess data is carried

by V3. The V5-Byte moves 1 Cell up in the TU-12 and the
Pointer Value decrements by 1.
-> Negative Pointer Justification
Datum - Date
- The VC-12 can float within the TU-12 since both may have
different Clock Rates
35 Byte
1998-06-01
VC-12
42 (195)
V1
Cell #105
V1
0 1 1 0 1 0
New Data Flag
V2
D I

D
Size
Cell #139
Inverted value of all D-Bits (Decrease)

indicates Negative Justification
V2
Cell #0
43 (195)
Cell #104
Cell #70
Under normal conditions the Pointer is justified by 1 (Increase or Decrease)

as soon as the phase difference between the VC-12 and the TU-12 exceeds
8 Bits (1 Byte). This is indicated by inverting either the I- or the D-Bits of the
10-Bit Pointer (Majority vote out of 5).
If a random change of the Pointer Value becomes necessary, this is indicated
by activating (inverting) the New Data Flag.
V4
NUHN:95-045 Uen
Cell #69
Rev
Positive Justification Opportunity

(Used as Stuff-Byte)
V3
Cell #35
Negative Justification Opportunity

(Used to carry Data)
Datum - Date
Cell #34
1998-06-01
Inverted value of all I-Bits (Increase)

indicates Positive Justification
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
5.6
Tributary Unit Group TUG-2
5.6.1
Structure of TUG-2
44 (195)
The Tributary Unit Group TUG-2 has a size of 9 by 12 bytes, based on a rate
of 125 s.
In case structures with a rate of n x 125 s (e.g. TU-12 with 500 s) have to
be multiplexed / mapped into TUG-2s, a TUG-2 multiframe consisting of n
TUG-2s will result.
See Byte Interleaved Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe
on page 45
5.6.2
Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe

3 x TU-12 are multiplexed into a TUG-2 multiframe, using Byte Interleaved
Time Division Multiplex (TDM).
See Byte Interleaved Multiplexing of 3 x TU-12 into 1 TUG-2 Multiframe
on page 45
For more information on the principle of TDM see Principle of Time Division
Multiplex (TDM)on page 160
45 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Byte Interleaved Multiplexing of 3 x

TU-12 into 1 TUG-2 Multiframe
V1,2
#105,2
V1,3
#105,3
#139,1
V2,1
#0,1
#139,2
V2,2
#0,2
#139,3
V2,3
#0,3
#34,1
V3,1
#35,1
#34,2
V3,2
#35,2
#34,3
V3,3
#35,3
#69,1
V4,1
#70,1
#69,2
V4,2
#70,2
#69,3
V4,3
#70,3
#104,1
#104,2
#104,3
TU-12 #1
TU-12 #2
TU-12 #3
10
11
12
TUG-2 #m
Row 9
Row 1
#139,1 #139,2 #139,3

V2,1 V2,2 V2,3
#0,1
#0,2
#0,3
TUG-2 #m+1
Row 9
Row 1
#34,1 #34,2 #34,3

V3,1 V3,2 V3,3 #35,1 #35,2 #35,3
TUG-2 #m+2
Row 9
Row 1
#69,1 #69,2 #69,3

V4,1 V4,2 V4,3 #70,1 #70,2 #70,3
TUG-2 #m+3
#104,1 #104,2 #104,3
Row 9
TUG-2 Multiframe
125 s
125 s
125 s
125 s
Column 1
2
3
4
5
6
V1,1 V1,2 V1,3 #105,1 #105,2 #105,3
Row 1
144 Byte / 500 s
V1,1
#105,1
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
5.7
Tributary Unit Group TUG-3 (TUG-2 Structure)
5.7.1
Structure of TUG-3 (TUG-2 Structure)
46 (195)
The Tributary Unit Group TUG-3 has a size of 9 by 86 bytes, based on a rate
of 125 s.
The first Column is allocated for the TU-Pointer. If the TUG-3 is composed
with multiplexed TUG-2s, there is no TU-Pointer. Therefore a Null Pointer Indicator (NPI) is introduced.
See Byte Interleaved Multiplexing of 7 x TUG-2 into 1 TUG-3on page 47
5.7.2
Multiplexing of 7 x TUG-2 Into TUG-3

7 x TUG-2 are multiplexed into a TUG-3, using Byte Interleaved Time Division
Multiplex (TDM). Also some Fixed Stuff and the Null Pointer Indicator (NPI)
are added.
See Byte Interleaved Multiplexing of 7 x TUG-2 into 1 TUG-3on page 47
For more information on the principle of TDM see Principle of Time Division
Multiplex (TDM)on page 160
5.7.3
Multiplexing of 7 x TUG-2 (containing TU-12s) into TUG-3

See Multiplexing of 7 x TUG-2 (containing TU-12s) into 1 TUG-3on page
48
This is an example how a TUG-3 containing TU-12 looks like.
TUG-2 #1
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
TUG-2 #2
5
10 11 12
Column 1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
TUG-2 #3
12
Column 1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
TUG-2 #7
12
Column 1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
10 11 12
13 14 15 16 17 18 19 20 21 22 23 24
76 77 78 79 80 81 82 83 84 85 86
TUG-3 STUFF
TUG-3 STUFF
NPI
TUG-3
NPI (Null Pointer Indication)
47 (195)
The NPI is contained in the first three bytes of the first column
and is used to distinguish between TUG-3s containing TU-3s
and TUG-3s containing TUG-2s.
NUHN:95-045 Uen
Rev
Column 1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
1 0 0 1 X X 1 1
1 1 1 0 0 0 0 0
X X X X X X X X
Datum - Date
12
1998-06-01
NPI
Bit
Row 1
Row 2
Row 3
Byte Interleaved Multiplexing of 7 x TUG-2 into 1 TUG-3
Column 1 2 3 4
Row 1 Vx,11 Vx,12 Vx,13
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
10 11 12
10 11 12
10 11 12
Multiplexing of 7 x TUG-2 (containing TU-12s) into 1 TUG-3
TUG-2 #1
Column 1 2 3 4
Row 1 Vx,21 Vx,22 Vx,23
Row 2
Row 9
TUG-2 #2
Vx = TU-12 Pointer V1 , V2 , V3 or V4
NPI
10 11 12
10 11 12
10 11 12
TUG-2 #4
TUG-3
Row 9
TUG-2 #5
Column 1 2 3 4
Row 1 Vx,61 Vx,62 Vx,63
Row 2
Row 9
TUG-2 #6
Column 1 2 3 4
Row 1 Vx,71 Vx,72 Vx,73
Row 2
TUG-2 #7
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
86
48 (195)
Row 9
TUG-3 STUFF
10 11 12
TUG-3 STUFF
NUHN:95-045 Uen
Vx,11 Vx,21 Vx,31 Vx,41 Vx,51 Vx,61 Vx,71 Vx,12 Vx,22 Vx32 Vx,42 Vx,52 Vx,62 Vx,72 Vx,13 Vx,23 Vx,33 Vx,43 Vx,53 Vx,63 Vx,73
Rev
Row 9
Column 1 2 3 4
Row 1 Vx,51 Vx,52 Vx,53
Row 2
TUG-2 #3
Column 1 2 3 4
Row 1 Vx,41 Vx,42 Vx,43
Row 2
Column 1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Datum - Date
Row 9
1998-06-01
Column 1 2 3 4
Row 1 Vx,31 Vx,32 Vx,33
Row 2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
49 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
5.8
Virtual Container VC-4 (TUG Structure)
5.8.1
Structure of VC-4 (TUG Structure)
50 (195)
The Virtual Container VC-4 has a size of 9 by 261 bytes, based on a rate of
125 s.
See Virtual Container VC-4 (TUG Structure)on page 51
(TUG Structure)
259
260
261
VC-4 Path Overhead (Higher Order POH)
Speed of VC-4
261 x 9 Byte x 8 Bit / 125 s = 150.336 MBit/s
NUHN:95-045 Uen
VC-4
Payload
Rev
J1
B3
C2
G1
F2
H4
F3
K3
N1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Datum - Date
1 2 3 4 5 6 7 8
1998-06-01
Column
51 (195)
a
5.8.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
52 (195)

The VC-4 POH is part of the VC-4 and has a size of 9 bytes.
The following functions are assigned to the various bytes :
J1 :
Path Trace
Used to repetitively transmit a Higher Order Path Access Point Identifier. The message is transmitted in the J1 Byte of a multiframe of
16 consecutive VC-4s. The start of the message is indicated by the
byte carrying the CRC-7. (Old standard: Multiframe of 64 consecutive VC-4s, start of message is CR/LF)
B3 :
BIP-8 Bit Interleaved Parity
Used for Higher Order Path Error Monitoring.
For more information on BIP see A.2 Principle of SDH Bit Interleaved Parity (BIP)on page 158.
C2 :
Signal Label
Indicates the composition of the VC.
G1 :
Path Status
Used to convey a path terminating status and performance back to
the path originator.
F2 :
Path User Channel
Used for user communication purposes between path elements.
H4 :
Position Indicator
Used as payload specific position indicator
F3 :
Path User Channel
K3 :
Automatic Protection Switching Channel
Used for Higher Order APS signalling.
N1 :
Network Operator Byte
Used for Higher Order Tandem Connection Monitoring.
See VC-4 Path Overhead (Higher Order POH)on page 53
J1 :
Path Trace
- Used to repetitively transmit a Higher Order Path Access Point Identifier
16 Byte Frame, 15 Byte Identifier + 1 Byte CRC-7 (Old = 64 Byte Frame)
B3 :
BIP-8 (HO Path-BIP)

- Bit Interleaved Parity, used for path error monitoring
C2 :
Signal Label
- Indicates the composition of the VC
Examples :
00hex
01hex
02hex
12hex
= Unequipped
= Equipped Non-Specific
= TUG Structure
= Async Mapping of 140MBit/s (C-4)
Path Status Byte

- Used to convey path terminating status and performance back to path originator
REI :
Remote Error Indication (Old = FEBE)
REI
Spare
RDI
RDI :
Remote Defect Indication ( Old = FERF)
Spare : For future use
Datum - Date
F2 :
Path User Channel

- Used for user communication purposes between path elements
Rev
H4 :
Position Indicator
- Used as a payload specific position indicator
(e.g. Indication which TUG-2 of TUG-2 Multiframe is mapped in next VC-4)
F3 :
Path User Channel

K3 :
NUHN:95-045 Uen
APS
APS :
Used for Higher Order APS Signalling

- Used for Higher Order Tandem Connection Monitoring
53 (195)
N1 :
Spare
G1 :
1998-06-01
J1
B3
C2
G1
F2
H4
F3
K3
N1
(Higher Order POH)
VC-4 Path Overhead
a
5.8.3
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
54 (195)
Multiplexing of 3 x TUG-3 (containing TUG-2s) into VC-4

See Byte Interleaved Multiplexing of 3 x TUG-3 (containing TUG-2s) into
VC-4on page 55
5.8.4
VC-4 with TU-12 Multiplexing

See VC-4 with TU-12 Multiplexingon page 56
See also A.5 TU-12 Numbering in a VC-4on page 168.
5.8.5
Multiplexing Mechanism for 63 x TU-12 into VC-4

See Multiplexing Mechanism for 63 x TU-12 into VC-4on page 57
See also A.5 TU-12 Numbering in a VC-4on page 168.
VC-4 Stuff
VC-4 Stuff
TUG-3 #1 Stuff NPI #1
TUG-3 #1 Stuff
TUG-3 #2 Stuff
TUG-3 #3 Stuff
TUG-3 STUFF
10 11 12
84 85 86
13 14 15 16 17 18 19 20 21 22 23 24
Column 1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
84 85 86
251 252 253 254 255 256 257 258 259 260 261
TUG-3 #3
5
NUHN:95-045 Uen
Rev
Datum - Date
VC-4
Column 1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
TUG-3 STUFF
84 85 86
NPI
TUG-3 STUFF
NPI
TUG-3 STUFF
NPI
TUG-3 #2
VC-4 Path OH
TUG-3 STUFF
1998-06-01
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
TUG-3 STUFF
TUG-3 #1
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Byte Interleaved Multiplexing of 3 x TUG-3

(containing TUG-2s) into VC-4
55 (195)
Row 1
Row 2
VC-4
Column
Row 9
Row 1
Row 2
Row 9
VC-4
Column
Row 1
Row 2
Row 9
010
011
012
013
014
015
016
017
018
019
020
021
022
023
024
025
026
027
028
029
030
031
032
033
034
035
036
037
038
039
040
041
042
043
044
045
046
047
048
049
050
051
052
053
054
055
056
057
058
059
060
061
062
063
064
065
066
067
068
069
070
071
072
TUG-3 #3 STUFF
TUG-3 #2 STUFF
TUG-3 #1 STUFF
TUG-3 #3 STUFF NPI #3
VC-4 STUFF
VC-4 STUFF
J1
B3
C2
G1
F2
H4
F3
K3
N1
J1 :
B3 :
C2 :
G1 :
F2 :
H4 :
F3 :
K3 :
N1 :
001
002
003
004
005
006
007
008
009
Higher Order Path Overhead (HO POH)

Path Trace (Used to repetitively transmit a Higher Order Path Access Point Identifier)
Path BIP-8 (Bit Interleaved Parity, used for path error monitoring)
Signal Label (Indicates the composition of the VC)
Path Status (Used to convey path terminating status and performance back to path originator)
Path User Channel (Used for user communication purposes between path elements)
Position Indicator (Used as a payload specific position indicator, e.g. TUG-2 Multiframe)
Path User Channel (Used for user communication purposes between path elements)
APS - Channel (Used for Higher Order Path APS Signalling)
Network Operator Byte (Used for Tandem Connection Monitoring)
V4
Mapped into
VC-4 #n+3
(H4 = 00 (hex))
56 (195)
Mapped into
VC-4 #n+2
(H4 = 03 (hex))
Row 9
NUHN:95-045 Uen
VC-4
Column
073
074
075
076
077
078
079
080
081
082
083
084
085
086
087
088
089
090
091
092
093
094
095
096
097
098
099
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
V1
VC-4
Column
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
63 x TU-12
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
9 Bytes
Higher Order Path Overhead
Rev
V3
2MB #01
2MB #02
2MB #03
2MB #04
2MB #05
2MB #06
2MB #07
2MB #08
2MB #09
2MB #10
2MB #11
2MB #12
2MB #13
2MB #14
2MB #15
2MB #16
2MB #17
2MB #18
2MB #19
2MB #20
2MB #21
2MB #22
2MB #23
2MB #24
2MB #25
2MB #26
2MB #27
2MB #28
2MB #29
2MB #30
2MB #31
2MB #32
2MB #33
2MB #34
2MB #35
2MB #36
2MB #37
2MB #38
2MB #39
2MB #40
2MB #41
2MB #42
2MB #43
2MB #44
2MB #45
2MB #46
2MB #47
2MB #48
2MB #49
2MB #50
2MB #51
2MB #52
2MB #53
2MB #54
2MB #55
2MB #56
2MB #57
2MB #58
2MB #59
2MB #60
2MB #61
2MB #62
2MB #63
9 Bytes
36 Bytes (125 s)
9 Bytes
TU-12 Multiframe Position

Indicator H4 = 01 (hex)
indicates that VC-4 #n+1
will contain V2s
1
2
3
4
5
6
7
8
9
Mapped into
VC-4 #n+1
(H4 = 02 (hex))
TU-12 #1/1/1
TU-12 #2/1/1
TU-12 #3/1/1
TU-12 #1/2/1
TU-12 #2/2/1
TU-12 #3/2/1
TU-12 #1/3/1
TU-12 #2/3/1
TU-12 #3/3/1
TU-12 #1/4/1
TU-12 #2/4/1
TU-12 #3/4/1
TU-12 #1/5/1
TU-12 #2/5/1
TU-12 #3/5/1
TU-12 #1/6/1
TU-12 #2/6/1
TU-12 #3/6/1
TU-12 #1/7/1
TU-12 #2/7/1
TU-12 #3/7/1
TU-12 #1/1/2
TU-12 #2/1/2
TU-12 #3/1/2
TU-12 #1/2/2
TU-12 #2/2/2
TU-12 #3/2/2
TU-12 #1/3/2
TU-12 #2/3/2
TU-12 #3/3/2
TU-12 #1/4/2
TU-12 #2/4/2
TU-12 #3/4/2
TU-12 #1/5/2
TU-12 #2/5/2
TU-12 #3/5/2
TU-12 #1/6/2
TU-12 #2/6/2
TU-12 #3/6/2
TU-12 #1/7/2
TU-12 #2/7/2
TU-12 #3/7/2
TU-12 #1/1/3
TU-12 #2/1/3
TU-12 #3/1/3
TU-12 #1/2/3
TU-12 #2/2/3
TU-12 #3/2/3
TU-12 #1/3/3
TU-12 #2/3/3
TU-12 #3/3/3
TU-12 #1/4/3
TU-12 #2/4/3
TU-12 #3/4/3
TU-12 #1/5/3
TU-12 #2/5/3
TU-12 #3/5/3
TU-12 #1/6/3
TU-12 #2/6/3
TU-12 #3/6/3
TU-12 #1/7/3
TU-12 #2/7/3
TU-12 #3/7/3
9 Bytes
144 Bytes (500 s)
Containing V1s
Row
Row
Row
Row
Row
Row
Row
Row
Row
Datum - Date
36 Bytes 36 Bytes
VC-4 #n
1998-06-01
V2
36 Bytes
VC-4
Column
VC-4 with TU-12 Multiplexing
VC-4/TUG-3 Stuff , TUG-3 NPIs
Row 1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1 V1
Row 2
57 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Multiplexing Mechanism for

63 x TU-12 into VC-4
TUG-2 #1
TUG-2 #2
TUG-2 #3
TUG-3 #1
TUG-2 #4
TUG-2 #5
TUG-2 #6
TUG-2 #7
TUG-2 #1
TUG-2 #2
TUG-2 #3
VC-4
TUG-3 #2
TUG-2 #4
TUG-2 #5
TUG-2 #6
TUG-2 #7
TUG-2 #1
TUG-2 #2
TUG-2 #3
TUG-3 #3
TUG-2 #4
TUG-2 #5
TUG-2 #6
TUG-2 #7
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
TU-12 #1
TU-12 #2
TU-12 #3
2MB #01
2MB #22
2MB #43
2MB #04
2MB #25
2MB #46
2MB #07
2MB #28
2MB #49
2MB #10
2MB #31
2MB #52
2MB #13
2MB #34
2MB #55
2MB #16
2MB #37
2MB #58
2MB #19
2MB #40
2MB #61
2MB #02
2MB #23
2MB #44
2MB #05
2MB #26
2MB #47
2MB #08
2MB #29
2MB #50
2MB #11
2MB #32
2MB #53
2MB #14
2MB #35
2MB #56
2MB #17
2MB #38
2MB #59
2MB #20
2MB #41
2MB #62
2MB #03
2MB #24
2MB #45
2MB #06
2MB #27
2MB #48
2MB #09
2MB #30
2MB #51
2MB #12
2MB #33
2MB #54
2MB #15
2MB #36
2MB #57
2MB #18
2MB #39
2MB #60
2MB #21
2MB #42
2MB #63
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
5.9
Administrative Unit AU-4
5.9.1
Structure of AU-4
58 (195)
The Administrative Unit AU-4 has a size of 9 by 261 bytes plus 9 bytes used
for the AU-Pointer, based on a rate of 125s.
See Administrative Unit AU-4on page 59
5.9.2
Mapping of VC-4 into AU-4

See Mapping of VC-4 into AU-4on page 60
5.9.3
Pointer Justification on AU-4 Level
5.9.3.1
Justification Opportunities and Indications

See Pointer Justification on AU-4 Levelon page 61
see A.4 Principle of SDH Pointer Processingon page 162
5.9.3.2
Example for Positive Pointer Justification

See Positive Pointer Justification on AU-4 Level (Example)on page 62
5.9.3.3
Example for Negative Pointer Justification

See Negative Pointer Justification on AU-4 Level (Example)on page 63
264
265
266
267
268
269
270
#85
#86
#172
#173
#259
#260
#346
#347
#433
#434
#520
#521
P P P P P P P P
Y-Bytes:
Stuff Byte (Value = 93 hex)

- Used as H1 in AU-3 Pointer
S:
Size Indication
- Not specified on AU-4 Level (Dont Care Bits)
1*-Bytes:
Stuff Byte (Value = FF hex)

- Used as H2 in AU-3 Pointer
P:

- Range for AU-4 is 0 .... 782
(Location of J1)
H3-Bytes: Used for Justification

- In case of Negative Pointer
Justification, these Bytes
are used as Auxiliary-Cells
59 (195)
N : New Data Flag (NDF)

- Flag active
#782
#781
NUHN:95-045 Uen
#695
Rev
#694
H1 + H2:
#608
Datum - Date
N N N N S S P P
AU-4
Payload
#607
1998-06-01
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
Row 1
#522
#523
#524
Row 2
#609
#610
#611
AU-4
Pointer
Row 3
#696
#697
#698
Row 4 H1 Y Y H2 1* 1* H3 H3 H3 #0
#1
#2
Row 5
#87
#88
#89
Row 6
#174
#175
#176
Row 7
#261
#262
#263
Row 8
#348
#349
#350
Row 9
#435
#436
#437
Mapping of VC-4 into AU-4

Important Facts :
AU-4
- The AU-4 must be locked to the STM-N Frame

- The 10-Bit AU-Pointer points to that Cell, where
the J1-Byte of the VC-4 is located (Start of VC-4)
Rev
NUHN:95-045 Uen
- If the Incoming VC-4 is too slow, the 3 Bytes

immediately after the H3-Bytes are used as
Stuff-Bytes to stuff the excess transport capacity
of the AU-4. The J1-Byte moves 3 Cells down in
the AU-4 and the Pointer Value increments by 1.
Datum - Date
VC-4
- If the incoming VC-4 is too fast, the excess data

is carried by the H3-Bytes. The J1-Byte moves
3 Cells up in the AU-4 and the Pointer Value
decrements by 1.
1998-06-01
- The VC-4 can float in 3-Byte steps within the AU-4

since both may have different Clock Rates
60 (195)
Size

Under normal conditions the Pointer is

justified by 1 (Increase or Decrease) as
soon as the phase difference between
the VC-4 and the AU-4 exceeds 3 Bytes.
This is indicated by inverting either the
I- or the D-Bits of the 10-Bit Pointer.
(Majority vote out of 5)
If a random change of the Pointer Value
becomes necessary, this is indicated by
activating (inverting) the New Data Flag.
NUHN:95-045 Uen
Rev
New Data Flag
H2
D I
Datum - Date
H1
0 1 1 0 S S
1998-06-01
Column 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
Row 1
Row 2
(Used to carry excess Data)
Row 3
Row 4 H1 Y Y H2 1* 1* H3 H3 H3
Row 5
Row 6
Row 7
(Used as Stuff-Bytes)
Row 8
Row 9
Pointer Justification on AU-4 Level
61 (195)
H1
H2
1*
1*
H3
H3
H3
10
11
12
13
Pointer value = 176
H1
H2
1*
1*
H3
H3
H3
Pointer value = 176
H2
1*
1*
H3
H3
H3
Pointer value = 176

All I-Bits inverted
H1
H2
1*
1*
H3
H3
H3
Pointer value = 177

(Incremented by 1)
H1
H2
1*
1*
H3
H3
18
19
J1
B3
C2
G1
F2
H4
Z3
Z4
Z5
J1
B3
C2
G1
F2
H4
Z3
20
21
22
23
24
25
270
VC-4 #n
VC-4 #n+1
Z4
Z5
J1
B3
C2
G1
F2
H4
Z3
Z4
Z5
J1
B3
C2
G1
F2
H4
Z3
Z4
Z5
VC-4 #n+2
VC-4 #n+3
62 (195)
Pointer value = 177
H3
17
16
H1
15
NUHN:95-045 Uen
3 Stuff Bytes inserted
14
Rev
AU-4 #m+2
AU-4 #m+3
Datum - Date
AU-4 #m+4
1998-06-01
AU-4 #m+1
AU-4 #m
Column
Positive Pointer Justification on AU-4 Level (Example)
H1
H2
1*
1*
H3
H3
H3
10
11
12
13
Pointer value = 176
H1
H2
1*
1*
H3
H3
H3
1*
1*
Pointer value = 176

All D-Bits inverted
H1
H2
1*
1*
H3
H3
H3
Pointer value = 175

(Decremented by 1)
H1
H2
1*
1*
H3
H3
19
20
21
22
23
24
25
270
VC-4 #n
VC-4 #n+1
VC-4 #n+2
VC-4 #n+3
63 (195)
Pointer value = 175
H3
Z4
Z5
J1
B3
C2
G1
F2
H4
Z3
Z4
Z5
J1
B3
C2
G1
F2
H4
Z3
Z4
Z5
18
H2
17
16
NUHN:95-045 Uen
H3 Bytes used for Data

Y
15
J1
B3
C2
G1
F2
H4
Z3
Z4
Z5
J1
B3
C2
G1
F2
H4
Z3
Pointer value = 176
H1
14
Rev
AU-4 #m+2
AU-4 #m+3
Datum - Date
AU-4 #m+4
1998-06-01
AU-4 #m+1
AU-4 #m
Column
Negative Pointer Justification on AU-4 Level (Example)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
5.10
Administrative Unit Group AUG
5.10.1
Structure of AUG
64 (195)
The Administrative Unit Group AUG has a size of 9 by 261 bytes plus 9 bytes
allocated for the AU-Pointer(s), based on a rate of 125s.
See Administrative Unit Group AUGon page 65
5.10.2
Multiplexing of 1 x AU-4 into AUG

One AUG is able to carry one AU-4. In the european standard an AUG
looks the same as an AU-4. The AUG is only important in the USA standard, where 3 x AU-3 are multiplexed into it.
267
268
269
270
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
AU - Pointer(s)
Payload
Rev
NUHN:95-045 Uen
1 x AU-4 (European standard)

or
3 x AU-3 (USA standard)
Datum - Date
Capacity of AUG :
1998-06-01
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
65 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
6.1
General
66 (195)
6.2
Overview
This chapter explains the required steps to put a 34 MBit/s tributary signal
into an SDH structure.
Speedson page 156.
PDH
SDH
x1
xN
STM-N
AUG
AU-4
VC-4
C-4
D4
140Mb/s
x3
x1
TUG-3
x3
TU-3
VC-3
x1
TU-2
VC-2
C-2
D2
6Mb/s
x3
TU-12
VC-12
C-12
D12
2Mb/s
x4
TU-11
VC-11
C-11
D11
67 (195)
1.5Mb/s
TUG-2
Virtual Container x
Tributary Unit x
Container x
PDH Signal Level x
NUHN:95-045 Uen
34Mb/s
45Mb/s
x7
STM-N
AUG
AU-x
VC-x
TUG-x
TU-x
C-x
Dx
D3
Rev
C-3
VC-3
Datum - Date
AU-3
1998-06-01
x7
a
6.3
Container C-3
6.3.1
Structure of C-3
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
68 (195)
The Container C-3 has a size of 9 rows by 84 columns based on a rate of

125 s.
(9 x 84 bytes = 756 bytes)
See Container C-3on page 69.
1 2 3 4 5 6 7
Rev
NUHN:95-045 Uen
Speed of C-3
Datum - Date
C-3
1998-06-01
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
82
83
84
Column
Container C-3
69 (195)
a
6.3.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
70 (195)

See Asynchronous Mapping for 34 MBit/s into C-3on page 71.
3 groups of 3 rows are structured the same way. They consist of 60 blocks
with 4 bytes each and some additional fixed stuff. One such structure is also
called subframe.
For Asynchronous Mapping, the 60 blocks of one subframe look similar :
Blocks 10, 20 : Byte 1 :
30, 40, 50
Bit 7 -> Justification Indication C1
Bit 8 -> Justification Indication C2
Byte 2 ... 4 :
24 data bits
Block 60 :
Byte 1 :
Fixed Stuff
Byte 2 :
Bit 8 -> Justification Bit S1
Byte 3 :
Bit 1 -> Justification Bit S2
Bit 2 ... 8 -> 7 data bits
Byte 4 :
8 data bits
Remaining, :
Byte 1 :
Fixed Stuff
Blocks
Byte 2 ... 4 :
24 data bits
Since the speed of the 34 MBit/s tributary can vary related to the speed of
the C-3, it has to be adjusted by means of a justification mechanism (stuffing). The justification is explained by three typical examples below :
a)
If the incoming 34 MBit/s speed is too slow, related to the speed of
the C-3, S1 and S2 are used as stuff bits.
b)
If the incoming 34 MBit/s speed is exactly synchronous to the speed
of the C-3, either one of S1 or S2 is used as stuff bit, the other one
as data bit.
c)
the C-3, S1 and S2 are used as data bits.
Whether S1 / S2 carry data or not is indicated five times by C1 / C2. The receiver makes a majority vote out of the five indication sets in order to avoid
wrong S1 / S2 interpretation in case one (or two) of the indication bits is
(are) erroneous.
Note :
Asynchronous Mapping for 34 MBit/s into C-3

Only 1 of 3 Subframes (3 Rows) are shown
Block
Blks 21 ... 40
Blks 41 ... 60
10
11
12
13
14
15
16
17
18
19
20
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
C
C
C
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
C
C
S
4 Bytes
1 Byte
C - Block R R R R R R C1C2 D D D . . .
24 x D
. . . DDD
S - Block
S - Block
R R R R R R R R R R R R R R R S1 S2 D D D D D D D D D D D D D D D
RRRRRRRR
Fixed Stuff Bits
C1 , C2 : Justification Indication-Bits
- Cx = 0 -> Sx = Data-Bit
- Cx = 1 -> Sx = Stuff-Bit
S1 , S2 : Actual Justification-Bits
- Justification is indicated
by the C1 , C2-Bits
71 (195)
3 x +/- 1 Bit every 125 s -> +/- 24000 Bit/s (~ +/- 700 ppm)
R:
. . . DDD
24 x D
Data Bits
(of the 34 MBit/s Tributary)
NUHN:95-045 Uen
RRRRRRRR DDD . . .
D:
Rev
Byte 4
Byte 3
R - Block
Byte 2
Datum - Date
Byte 1
1998-06-01
84 Bytes
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
6.4
6.4.1
Structure of VC-3
72 (195)
The Virtual Container VC-3 has a size of 9 rows by 85 columns based on a

rate of 125 s.
See Virtual Container VC-3on page 73
6.4.2

The Mapping of C-3 into VC-3 is very simple. Just the VC-3 Path Overhead
is added.
See Virtual Container VC-3on page 73
83
84
85
VC-3 Path Overhead (Lower Order POH)
Speed of VC-3
NUHN:95-045 Uen
C-3
Rev
J1
B3
C2
G1
F2
H4
F3
K3
N1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Datum - Date
1 2 3 4 5 6 7 8
1998-06-01
Column
73 (195)
a
6.4.3
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
74 (195)
VC-3 Path Overhead (Lower Order POH)

The VC-3 POH is part of the VC-3 and has a size of 9 bytes.
It is very similar to the VC-4 Path Overhead.
Note :
The VC-3 Path Overhead in the european standard is Lower
Order, in the USA standard it is Higher Order.
(Refer to PDH - SDH Multiplexing / Mapping Structure)
The following functions are assigned to the various bytes :
J1 :
Path Trace
Used to repetitively transmit a Lower Order Path Access Point Identifier. The message is transmitted in the J1 Byte of a multiframe of
16 consecutive VC-3s. The start of the message is indicated by the
byte carrying the CRC-7. (Old standard: Multiframe of 64 consecutive VC-3s, start of message is CR/LF)
B3 :
BIP-8 Bit Interleaved Parity
Used for Lower Order Path Error Monitoring.
For more information on BIP see A.2 Principle of SDH Bit Interleaved Parity (BIP)on page 158.
C2 :
Signal Label
Indicates the composition of the VC.
G1 :
Path Status
Used to convey a path terminating status and performance back to
the path originator.
F2 :
Path User Channel
H4 :
Position Indicator
Not relevant in Lower Order POH.
F3 :
Path User Channel
K3 :
Used for Higher Order APS signalling.
N1 :
Used for Higher Order Tandem Connection Monitoring.
See VC-3 Path Overhead (Lower Order POH)on page 75
J1 :
Path Trace
- Used to repetitively transmit a Lower Order Path Access Point Identifier
16 Byte Frame, 15 Byte Identifier + 1 Byte CRC-7 (Old = 64 Byte Frame)
B3 :
BIP-8 (LO Path-BIP)

- Bit Interleaved Parity, used for path error monitoring
C2 :
Signal Label
- Indicates the composition of the VC
Examples :
00hex
01hex
04hex
13hex
= Unequipped
= Equipped Non-Specific
= Async Mapping of 34Mb/s (VC-3)
= ATM Mapping
F3 :
Path User Channel

K3 :

APS
APS :
Used for Higher Order APS Signalling

- Used for Lower Order Tandem Connection Monitoring
75 (195)
N1 :
Spare
Position Indicator
- Used as a payload specific position indicator (Not relevant in Lower Order VC-3)
H4 :
NUHN:95-045 Uen
Path User Channel

Rev
F2 :
Path Status Byte

- Used to convey path terminating status and performance back to path originator
REI :
Remote Error Indication (Old = FEBE)
Spare
REI
RDI
RDI :
Remote Defect Indication ( Old = FERF)
Datum - Date
G1 :
1998-06-01
J1
B3
C2
G1
F2
H4
F3
K3
N1
(Lower Order POH)
VC-3 Path Overhead
a
6.5
Tributary Unit TU-3
6.5.1
Structure of TU-3
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
76 (195)
The Tributary Unit TU-3 has a size of 9 rows by 86 columns based on a rate
of 125 s.
See Tributary Unit TU-3on page 77
6.5.2

See Mapping of VC-3 into TU-3on page 78
6.5.3

See Pointer Justification on TU-3 Levelon page 79
see A.4 Principle of SDH Pointer Processingon page 162
Refer also to :
Positive Pointer Justification on AU-4 Level (Example)on page 62 and
Negative Pointer Justification on AU-4 Level (Example)on page 63.
1 2 3 4 5 6 7 8 9
H1 #595 #595 #597
H2 #680 #681 #682 #683
H3 #0 #1 #2 #3 #4 #5 #6
#170 #171 #172 #173
#255 #256 #257
#763 #764
#82 #83 #84
TU-3
Payload
#167 #168 #169

#253 #254
#338 #339
#593 #594
TU-3 Pointer
N N N N S S P P
H1 + H2:
P P P P P P P P
N : New Data Flag (NDF)

- Flag active
Size Indication
- Not specified on TU-3 Level (Dont Care Bits)
P:

- Range for TU-3 is 0 .... 764
(Location of J1)
Used for Justification

- In case of Negative Pointer
Justification, this Byte is
used as Auxiliary-Cell
77 (195)
S:
H3-Byte:
#510 #511 #512
#508 #509
NUHN:95-045 Uen
#425 #426 #427
Rev
#423 #424
#340 #341 #342
Datum - Date
Fixed Stuff
#85 #86 #87 #88 #89
#677 #678 #679
1998-06-01
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
82
83
84
85
86
Column
Tributary Unit TU-3

Important Facts :
TU-3
- The TU-3 must be locked to the Higher Order VC

(VC-4)
- The 10-Bit TU-Pointer points to that Cell, where
the J1-Byte of the VC-3 is located (Start of VC-3)
Rev
NUHN:95-045 Uen
- If the Incoming VC-3 is too slow, the Byte

immediately after the H3-Byte is used as
Stuff-Byte to stuff the excess transport capacity
of the TU-3. The J1-Byte moves 1 Cell down in
the TU-3 and the Pointer Value increments by 1.
Datum - Date
VC-3
- If the incoming VC-3 is too fast, the excess data

is carried by the H3-Byte. The J1-Byte moves
1 Cell up in the TU-3 and the Pointer Value
decrements by 1.
1998-06-01
- The VC-3 can float in 1-Byte steps within the TU-3

since both may have different Clock Rates
78 (195)
1 2 3 4 5 6
H1
H2
(Used to carry excess Data)
H3
Fixed Stuff
Size

79 (195)

Under normal conditions the Pointer is

justified by 1 (Increase or Decrease) as
soon as the phase difference between
the VC-3 and the TU-3 exceeds 1 Byte.
This is indicated by inverting either the
I- or the D-Bits of the 10-Bit Pointer.
(Majority vote out of 5)
If a random change of the Pointer Value
becomes necessary, this is indicated by
activating (inverting) the New Data Flag.
NUHN:95-045 Uen
Rev
H2
D I
New Data Flag

(Used as Stuff-Byte)
Datum - Date
H1
0 1 1 0 S S
85 86
1998-06-01
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
6.6
Tributary Unit Group TUG-3 (TU-3 Structure)
6.6.1
Structure of TUG-3 (TU-3 Structure)
80 (195)
The Tributary Unit Group TUG-3 has a size of 9 rows by 86 columns based
on a rate of 125 s.
See Tributary Unit Group TUG-3 (TU-3 Structure)on page 81
6.6.2
Multiplexing of 1 x TU-3 into TUG-3

One TUG-3 is able to carry one TU-3 and it looks the same as the TU-3.
84
85
86
TU - Pointer
NUHN:95-045 Uen
Speed of TUG-3
Rev
TUG-3
Payload
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Datum - Date
1 2 3 4 5 6 7 8
1998-06-01
Column
(TU-3 Structure)
Tributary Unit Group TUG-3
81 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
6.7
6.7.1
Structure of VC-4
82 (195)
The structure of the VC-4 is the same as described in the previous chapter.
See 5.8.1 Structure of VC-4 (TUG Structure)on page 50
6.7.2

The VC-4 POH is the same as described in the previous chapter.
See 5.8.2 VC-4 Path Overhead (Higher Order POH)on page 52
6.7.3
Multiplexing of 3 x TUG-3 (containing TU-3s) into VC-4

See Byte Interleaved Multiplexing of 3 x TUG-3 (containing TU-3s) into VC4on page 83
6.8

The AU-4 is the same as described in the previous chapter.
See 5.9 Administrative Unit AU-4on page 58
6.9

The AUG is the same as described in the previous chapter.
See 5.10 Administrative Unit Group AUGon page 64
TUG-3 #2
5
84 85 86
TUG-3 #3 Stuff
TUG-3 #2 Stuff
TUG-3 #1 Stuff
VC-4 Stuff
VC-4 Stuff
VC-4 Path OH
10 11 12
84 85 86
H1
H2
H3
13 14 15 16 17 18 19 20 21 22 23 24
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
84 85 86
H1
H2
H3
251 252 253 254 255 256 257 258 259 260 261
6
H1
H2
H3
TUG-3 #3
5
NUHN:95-045 Uen
H1 H1
H2 H2
H3 H3
Rev
VC-4
Datum - Date
1998-06-01
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Fixed Stuff
Fixed Stuff
Fixed Stuff
TUG-3 #1
Column 1
H1
Row 1
H2
Row 2
H3
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Byte Interleaved Multiplexing of 3 x TUG-3

(containing TU-3s) into VC-4
83 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
7.1
Overview
84 (195)
This chapter explains the required steps to put a 140 MBit/s tributary signal
into an SDH structure.
Speedson page 156.
PDH
SDH
x1
xN
STM-N
AUG
AU-4
VC-4
C-4
D4
140Mb/s
x3
x1
TUG-3
x3
TU-3
VC-3
x1
TU-2
VC-2
C-2
D2
6Mb/s
x3
TU-12
VC-12
C-12
D12
2Mb/s
x4
TU-11
VC-11
C-11
D11
85 (195)
1.5Mb/s
TUG-2
Virtual Container x
Tributary Unit x
Container x
PDH Signal Level x
NUHN:95-045 Uen
34Mb/s
45Mb/s
x7
STM-N
AUG
AU-x
VC-x
TUG-x
TU-x
C-x
Dx
D3
Rev
C-3
VC-3
Datum - Date
AU-3
1998-06-01
x7
a
7.2
Container C-4
7.2.1
Structure of C-4
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
86 (195)
The Container C-4 has a size of 9 rows by 260 columns based on a rate of
125 s.
(9 x 260 bytes = 2340 bytes)
See Container C-4on page 87.
1 2 3 4 5 6 7
Rev
NUHN:95-045 Uen
Speed of C-4
Datum - Date
C-4
1998-06-01
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
258
259
260
Column
Container C-4
87 (195)
a
7.2.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
88 (195)

See Asynchronous Mapping for 140 MBit/s into C-4on page 89.
All 9 rows are structured the same way. They consist of 20 blocks with 13
bytes each. One such structure is also called one subframe.
For Asynchronous Mapping, the 20 blocks of one subframe look similar
(only byte 1 differs) :
Block 1 :
Byte 1 :
8 data bits
Byte 2 ... 13 : 96 data bits
Blocks 2, 6, :
Byte 1 :
Bit 1 -> Justification Indication (C-Bit)
10, 14, 18
Block 20 :
Byte 1 :
Bit 1 ... 6 -> 6 data bits
Bit 7 -> Justification Bit (S-Bit)
Bit 8 -> Fixed Stuff
Remaining, :
Byte 1 :
Fixed Stuff
Blocks
Since the speed of the 140 MBit/s tributary can vary related to the speed of
the C-4, it has to be adjusted by means of a justification mechanism (stuffing). The justification is explained by three typical examples below :
a)
If the incoming 140 MBit/s speed is too slow, related to the speed
of the C-4, the S-Bit is used as stuff bit.
b)
the C-4, the S-Bit is used as data bit.
c)
If the incoming 140 MBit/s signal has the nominal speed relative to
the C-4, the justification rate is about half-half.
Whether the S-Bit carries data or not is indicated five times by the C-Bit. The
receiver makes a majority vote out of the five indications in order to avoid
wrong S-Bit interpretation in case one (or two) of the indication bits is (are)
erroneous.
Note :
Asynchronous Mapping for 140 MBit/s into C-4

Only 1 of 9 Subframes is shown (1 Subframe = 20 Blocks = 1 Row of a C-4)
Block
10
11
12
13
14
15
16
17
18
19
20
13 Bytes
260 Bytes
. . . DDD
C - Block
CRRR RROO DDD . . .
96 x D
. . . DDD
O:
Overhead Bits
(For future use)
R - Block
RRRRRRRR DDD . . .
96 x D
. . . DDD
C:
S - Block
DDDDDDSR DDD . . .
96 x D
. . . DDD
Justification Indication-Bits
- C = 0 -> S = Data-Bit
- C = 1 -> S = Stuff-Bit
S:
Actual Justification-Bit
- Justification is indicated
by the C-Bits
89 (195)
9 x 1 Bit every 125 s -> 72000 Bit/s (~ +/- 250 ppm)
96 x D
Fixed Stuff Bits
DDDDDDDD DDD . . .
NUHN:95-045 Uen
R:
D - Block
Rev
Data Bits
(of the 140 MBit/s Tributary)
D:
Datum - Date
Bytes 2 ... 13
1998-06-01
Byte 1
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
7.3
Virtual Container VC-4 (C-4 Structure)
7.3.1
Structure of VC-4 (C-4 Structure)
90 (195)
The Virtual Container VC-4 has a size of 9 rows by 261 columns based on a
rate of 125 s.
See Virtual Container VC-4 (C-4 Structure)on page 91
7.3.2

The Mapping of C-4 into VC-4 is very simple. Just the VC-4 Path Overhead
is added.
See Virtual Container VC-4 (C-4 Structure)on page 91
7.3.3

The VC-4 POH is the same as described in the previous chapter.
See 5.8.2 VC-4 Path Overhead (Higher Order POH)on page 52
7.4

The AU-4 is the same as described in the previous chapter.
See 5.9 Administrative Unit AU-4on page 58
7.5

The AUG is the same as described in the previous chapter.
See 5.10 Administrative Unit Group AUGon page 64
(C-4 Structure)
259
260
261
Speed of VC-4
NUHN:95-045 Uen
C-4
Rev
J1
B3
C2
G1
F2
H4
F3
K3
N1
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
Datum - Date
1 2 3 4 5 6 7 8
1998-06-01
Column
91 (195)
a
8
STM-N Frame
8.1
STM-1 Frame
8.1.1
Frame Structure
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
92 (195)
The STM-1 Frame has a size of 9 rows by 270 columns based on a rate of
125 s.
See STM-1 Frameon page 93
8.1.2
Multiplexing of 1 x AUG into STM-1 Payload

1 Administrative Unit Group (AUG) is just put into the STM-1 Payload. But
the procedure is called multiplexing anyway.
8.1.3
STM-1 Multiplex Section Overhead (MSOH)

The STM-1 MSOH has a size of 5 rows by 9 columns based on a rate of 125
s. It is located in row 5 to 9 / column 1 to 9 of the STM-1 Frame.
See STM-1 Multiplex Section Overhead (MSOH)on page 94
8.1.4
STM-1 Regenerator Section Overhead (RSOH)

The STM-1 RSOH has a size of 3 rows by 9 columns based on a rate of 125
See STM-1 Regenerator Section Overhead (RSOH)on page 95
268
269
270
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Regenerator Section
Overhead (RSOH)
NUHN:95-045 Uen
Speed of STM-1
Rev
Multiplex Section
Overhead (MSOH)
(Payload)
Datum - Date
AU Pointer(s)
1998-06-01
Column
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
STM-1 Frame
93 (195)
Column
Row 5
Row 6
Row 7
Row 8
Row 9
B2 B2 B2 K1
D4
D5
D7
D8
D10
D11
S1

9
K2
D6
D9
D12
M1 E2 NU NU
Data Communication Channel for Multiplex Section (DCCM )
S1 :
Bit 5 ... 8 -> Synchronisation Status Message Byte (SSMB) Used for signalling Quality Level of Sync.
M1 :
Multiplex Section Remote Error Indication (MS-REI)
E2 :
Multiplex Section Orderwire Used as Service Channel for Multiplex Sections
NU :
Reserved for National Use

94 (195)
Reserved for future international standardisation

(e.g. for media dependent, additional national use or other purposes)
D4 to
D12 :
Bit 1 ... 5 -> Automatic Protection Switch Channel (APS) Used for signalling of MSP (1:n or 1+1 Arch.)
Bit 6 ... 8 -> Multiplex Section Remote Defect Indication (MS-RDI) and Alarm Indication Signal (MS-AIS)
(Code 110= MS-RDI / Code 111= MS-AIS)
NUHN:95-045 Uen
K2 :
Rev
Automatic Protection Switch Channel (APS) Used for signalling of MSP (1:n or 1+1 Architecture)
K1 :
Datum - Date
Bit Interleaved Parity (BIP-24) Used for Multiplex Section Error Monitoring
(Computed over all Bits of the previous STM-1 Frame, without the RSOH)
1998-06-01
3 x B2 :
Column
Row 1
Row 2
Row 3
A1 A1 A1 A2 A2 A2 J0/C1 NU NU
B1
E1
F1 NU NU
D1
D2
D3

9
E1 :
Regenerator Section Orderwire Used as Service Channel for Regenerator Sections
F1 :
Regenerator Section User Channel Used for temporary data/voice channel, e.g. maintenance purposes
D1 to
D3 :
Data Communication Channel for Regenerator Section (DCCR)
NU :

95 (195)

Bit Interleaved Parity (BIP-8) Used for Regenerator Section Error Monitoring
(Computed over all Bits of the previous STM-1 Frame)
B1 :
NUHN:95-045 Uen
J0 / C1 : Regenerator Section Trace / STM Identifier Used as Section Access Point Identifier
(J0 = 15 Byte Trace with CRC, current standard / C1 = Single Byte Identifier, old standard)
Rev
Second Part of Frameword Used for Frame Alignment

(Value of A2 = 00101000= 28HEX)
3 x A2 :
Datum - Date
First Part of Frameword Used for Frame Alignment

(Value of A1 = 11110110= F6HEX)
1998-06-01
3 x A1 :
a
8.2
STM-4 Frame
8.2.1
Frame Structure
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
96 (195)
125 s.
8.2.2

4 Administrative Unit Groups (AUG) are multiplexed into the STM-4 Payload
by Byte Interleaving Time Division Multiplex.
See Principle of Time Division Multiplex (TDM) on page 160
8.2.3

The STM-4 MSOH has a size of 5 rows by 36 columns based on a rate of 125
8.2.4

The STM-4 RSOH has a size of 3 rows by 36 columns based on a rate of 125
Column 1
36 37
1080
Regenerator Section
Overhead (RSOH)
NUHN:95-045 Uen
Speed of STM-4
Rev
Multiplex Section
Overhead (MSOH)
(Payload)
Datum - Date
AU Pointers
1998-06-01
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
STM-4 Frame
97 (195)
Column
Row 5
Row 6
Row 7
Row 8
Row 9
13
17
21
25
B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 K1
K2
D4
D5
D6
D7
D8
D9
D10
D11
D12
S1
M1
29
33

36
E2 NU NU NU NU NU NU NU NU NU NU NU
S1 :
M1 :
E2 :
NU :

98 (195)

D4 to
D12 :
NUHN:95-045 Uen
Rev
K2 :
Datum - Date
K1 :
1998-06-01
12 x B2 : Bit Interleaved Parity (BIP-96) Used for Multiplex Section Error Monitoring

5
9
13
17
21
25
29
33
36
Column 1
J0
Row 1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A1 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 C1
Z0 Z0 Z0 NU NU NU NU NU NU NU NU
Row 2 B1
E1
F1 NU NU NU NU NU NU NU NU NU NU NU
Row 3 D1
D2
D3
12 x A1 : First Part of Frameword Used for Frame Alignment

(Value of A1 = 11110110= F6HEX)
F1 :
D1 to
D3 :
NU :

99 (195)

E1 :
NUHN:95-045 Uen
B1 :
Rev
Spare Bytes Reserved for future international standardisation
3 x Z0 :
Datum - Date
1998-06-01
12 x A2 : Second Part of Frameword Used for Frame Alignment

(Value of A2 = 00101000= 28HEX)
a
8.3
STM-16 Frame
8.3.1
Frame Structure
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
100 (195)
125 s.
8.3.2

16 Administrative Unit Groups (AUG) are multiplexed into the STM-16 Payload by Byte Interleaving Time Division Multiplex.
8.3.3

The STM-16 MSOH has a size of 5 rows by 144 columns based on a rate of
125 s. It is located in row 5 to 9 / column 1 to 144 of the STM-16 Frame.
8.3.4

The STM-16 RSOH has a size of 3 rows by 144 columns based on a rate of
125 s. It is located in row 1 to 3 / column 1 to 144 of the STM-16 Frame.
Column 1
144 145
4320
Regenerator Section
Overhead (RSOH)
NUHN:95-045 Uen
Speed of STM-16
4320 x 9 Byte x 8 Bit / 125 s = 2.488320 GBit/s
Rev
Multiplex Section
Overhead (MSOH)
(Payload)
Datum - Date
AU Pointers
1998-06-01
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 7
Row 8
Row 9
STM-16 Frame
101 (195)
Column
Row 5
Row 6
Row 7
Row 8
Row 9
17
33
49
65
81
97
B2 15 x B2 B2 15 x B2 B2 15 x B2 K1
K2
D4
D5
D6
D7
D8
D9
D10
D11
D12
113
129

144
E2 15 x NU NU 15 x NU NU 15 x NU
S1
M1
M1 :
E2 :
NU :

102 (195)
S1 :
D4 to
D12 :
NUHN:95-045 Uen
Rev
K2 :
Datum - Date
K1 :
1998-06-01
48 x B2 : Bit Interleaved Parity (BIP-384) Used for Multiplex Section Error Monitoring
17
33
Column 1
Row 1 A1 15 x A1 A1 15 x A1 A1 15 x A1
Row 2 B1
Row 3 D1
49
65
81
97
113
129

144
A2 15 x A2 A2 15 x A2 A2 15 x A2
J0
C1
E1
F1 15 x NU NU 15 x NU NU 15 x NU
D2
D3
15 x Z0 NU 15 x NU NU 15 x NU
48 x A1 : First Part of Frameword Used for Frame Alignment

(Value of A1 = 11110110= F6HEX)
F1 :
D1 to
D3 :
NU :

103 (195)

E1 :
NUHN:95-045 Uen
Rev
B1 :
15 x Z0 : Spare Bytes Reserved for future international standardisation
Datum - Date
1998-06-01
48 x A2 : Second Part of Frameword Used for Frame Alignment

(Value of A2 = 00101000= 28HEX)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
SDH Maintenance Signals
9.1
General
104 (195)
Severe transmission problems are indicated by Maintenance Signals (alarm

or status indications). These indications are detected by various Functional
Blocks, as described in section 4 SDH Functional Blockson page 26 and
are reported to the Synchronous Equipment Management Function (SEMF).
Most of the indications cause a mandatory or optional Consequent Action.
The Maintenance Signals play a very important role for fault location in a
network and for performance monitoring purposes.
9.2
Maintenance Signals and Consequent Actions

Most of the Maintenance Signals (Alarm Indications) cause certain Consequent Actions (CA). To be able to understand the philosophy behind the
Consequent Actions, it is essential to distinguish different Connection Levels
and Termination Levels.
9.2.1
Connection Level / Termination Level

Five different Connection / Termination Levels need to be distinguished to
understand the mystery behind the Consequent Actions :
Case 1 :
- Intermediate Regenerator (IR)
- Termination in RST
Case 2 :
- Connection on HPVC Level (HPC)
- HP Passed Through
Example:
VC-4 passed through in an ADM
-> Cross Connection SDH <-> SDH
Case 3 :
- Connection on HPVC and LPVC Level (HPC, LPC)
- HP Terminated , LP Passed Through
Example:
VC-12 passed through in an ADM
-> Cross Connection SDH <-> SDH
Case 4 :
- Connection on HPVC Level (HPC)
- HP Terminated
Example:
VC-4 with 140Mb Mapping dropped in ADM
-> Cross Connection SDH <-> PDH
Case 5 :
- Connection on HPVC and LPVC Level (HPC, LPC)
- HP Terminated , LP Terminated
Example:
VC-12 with 2Mb Mapping dropped in ADM
-> Cross Connection SDH <-> PDH
For these cases listed above, different SDH Functional Blocks are involved.
See Connection Level / Termination Levelon page 105.
Connection Level / Termination Level

1. Intermediate Regenerator
SPI
SPI
SPI
RST
Upstream Direction
RST
SPI
Downstream Direction
2. Connection on HPVC Level (HPC) / HP Passed Through

RST
MST
MSP
MSA
HPC
HPOM HUG
Upstream Direction
HUG HPOM
MSA
MSP
MST
RST
SPI
Reverse Direction
RST
MST
MSP
MSA
HPC
HPOM HUG
HPT
PPI
HPA
LPOM LUG
LPC
LUG LPOM
HPA
HPT
HPC
HUG HPOM
MSA
MSP
MST
RST
SPI
NUHN:95-045 Uen
Reverse Direction
4. Connection on HPVC Level (HPC) / HP Terminated

LPA
HPT
HPC
HUG HPOM
MSA
MSP
MST
RST
SPI
Reverse Direction
5. Connection on HPVC and LPVC Level (HPC, LPC) / HP Terminated, LP Terminated

PPI
LPA
LPT
LPC
LUG LPOM
HPA
HPT
HPC
HUG HPOM
MSA
MSP
MST
RST
Reverse Direction
The directions Downstream,

Upstreamand Reverseare
related to a Path that is received at Point A and passed on
to Point B.
105 (195)
SPI
Note :
Rev
Upstream Direction
Datum - Date
1998-06-01
3. Connection on HPVC and LPVC Level (HPC, LPC) / HP Terminated, LP Passed Through
a
9.2.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
106 (195)
Indications and Consequent Actions

The table Indications and Consequent Actionson page 107 and following
shows all Alarm or Status Indications that introduce visible Consequent Actions (CA)in the involved Functional Blocks of an SDH equipment. Visible
CAmeans that it can be detected on a related signal transmitted by the
SDH equipment. The CAs are shown for all five cases of Connection / Termination Level.
It is important to distinguish different directions in the Signal/Action Flow.
Downstream : Means the direction from an SDH port of an equipment
down to the lowest Connection or Termination Point of a
path within the equipment.
- Downstream towards the Path Receiver
Upstream :
Means the direction from the lowest Connection or Termination Point of a path within an SDH equipment up to the
SDH port.
- Upstream towards the Path Receiver
Reverse :
Is a special case of Upstream.
- Upstream towards the Path Originator
Alarm, Status
Indication
LOS
Detected in SPI
LOF
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
Optional
Interm. Regenerator
MS-EBER (B2)
HOVC (HPC)
(Excessive BER)
LOVC (LPC)
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Upstr. AU-AIS
Upstr. MS-AIS
Near End Error

Monitoring
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
LPT
LPA
----- Not Applicable --------- Not Applicable ----Rvrs. HP-RDI

----- Not Applicable ----- Downstr. AIS
Rvrs. HP-RDI Upstr. TU-AIS
----- Not Applicable ----Rvrs. HP-RDI
Rvrs. LP-RDI Downstr. AIS
----- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable -----
----- Not Applicable ----Upstr. AU-AIS

107 (195)
Detected in MST
Upstr. AU-AIS
HPA
Interm. Regenerator
HOVC (HPC)
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Rvrs. MS-RDI
Upstr. MS-AIS
HPT
LOVC (LPC)
MSA
NUHN:95-045 Uen
Detected in MST
LOVC (LPC)
MST
Rev
MS-AIS
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
Detected in RST
Interm. Regenerator
HOVC (HPC)
Functional Blocks introducing visibleConsequent Actions
Datum - Date
RS-BIP (B1)
Termination
Level
1998-06-01
Detected in RST
Connection
Level
Indications and Consequent Actions
MS-BIP (B2)
Detected in MST
MS-REI
Detected in MST
LOVC (LPC)
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
Far End
Defect
Monitoring
HPA
LPT
LPA
----- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable --------- Not Applicable ----Upstr. AU-AIS
Interm. Regenerator
HOVC (HPC)
Far End Error

Monitoring
HPT
Detected in MSA
Interm. Regenerator
HOVC (HPC)
Rvrs. MS-REI
Rvrs. MS-REI
Rvrs. MS-REI
Rvrs. MS-REI
MSA
NUHN:95-045 Uen
AU-LOP
LOVC (LPC)
MST
Rev
Detected in MSA
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
AU-AIS
(HO Path AIS)
Interm. Regenerator
HOVC (HPC)
Datum - Date
Detected in MST
Termination
Level
1998-06-01
MS-RDI
Connection
Level
Alarm, Status
Indication
108 (195)
HP-UNEQ
Detected in HPT
HP-TIM
Detected in HPT
LOVC (LPC)
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
HPA
LPT
LPA
----- Not Applicable --------- Not Applicable --------- Not Applicable ----- Downstr. AIS
Upstr. TU-AIS
----- Not Applicable ----Rvrs. LP-RDI Downstr. AIS
----- Not Applicable --------- Not Applicable ----Rvrs. HP-REI
----- Not Applicable ----Rvrs. HP-REI
----- Not Applicable ----Rvrs. HP-REI
----- Not Applicable --------- Not Applicable --------- Not Applicable ----Far End Error
----- Not Applicable ----Monitoring
Interm. Regenerator
HOVC (HPC)
HPT
Detected in HPT
Interm. Regenerator
HOVC (HPC)
MSA
NUHN:95-045 Uen
HP-REI
LOVC (LPC)
MST
Rev
Detected in HPT
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP-BIP (B3)
Interm. Regenerator
HOVC (HPC)
Datum - Date
Detected in HPT
Termination
Level
1998-06-01
HP-SLM
Connection
Level
Alarm, Status
Indication
109 (195)
HP-RDI
Detected in HPT
TU-AIS
(LO Path AIS)
Detected in HPA
LOVC (LPC)
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
HPA
LPT
LPA
----- Not Applicable --------- Not Applicable --------- Not Applicable ----Far End Defect
----- Not Applicable ----Monitoring
----- Not Applicable --------- Not Applicable --------- Not Applicable ----Upstr. TU-AIS
----- Not Applicable --------- Not Applicable --------- Not Applicable ----Upstr. TU-AIS
-----------------
Not Applicable
Not Applicable
Not Applicable
Not Applicable
-----------------
-----------------
Not Applicable
Not Applicable
Not Applicable
Not Applicable
-----------------
Downstr. AIS
Rvrs. LP-RDI
Downstr. AIS
Interm. Regenerator
HOVC (HPC)
HPT
Detected in LPT
Interm. Regenerator
HOVC (HPC)
MSA
NUHN:95-045 Uen
LP-TIM
LOVC (LPC)
MST
Rev
Detected in LPT
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
LP-UNEQ
Interm. Regenerator
HOVC (HPC)
Datum - Date
Detected in HPA
Termination
Level
1998-06-01
TU-LOP
HP-LOM (H4)
Connection
Level
Alarm, Status
Indication
110 (195)
LP-SLM
Detected in LPT
LP-BIP (V5)
Detected in LPT
LOVC (LPC)
Interm. Regenerator
HOVC (HPC)
LOVC (LPC)
LOVC (LPC)
Not Applicable
Not Applicable
Not Applicable
Not Applicable
HPA
LPT
LPA
----------------Rvrs. LP-RDI
-----------------
Not Applicable
Not Applicable
Not Applicable
Not Applicable
-----------------
-----------------
Not Applicable
Not Applicable
Not Applicable
Not Applicable
-----------------
Downstr. AIS
Rvrs. LP-REI
FE Error Mon.
-----------------
Not Applicable
Not Applicable
Not Applicable
Not Applicable
----------------FE Def. Mon.
Interm. Regenerator
HOVC (HPC)
-----------------
HPT
LOVC (LPC)
MSA
NUHN:95-045 Uen
Interm. Regenerator
HOVC (HPC)
MST
Rev
Detected in LPT
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
HP Passed Through
HP Terminated
LP Passed Through
LP Terminated
RST
LP-RDI
Interm. Regenerator
HOVC (HPC)
Datum - Date
Detected in LPT
Termination
Level
1998-06-01
LP-REI
Connection
Level
Alarm, Status
Indication
111 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
9.3
SDH Maintenance Signal Interaction
9.3.1
Indication / Action Flow
112 (195)
The subject discussed in section 9.2.2 Indications and Consequent Actions

on page 106 can also be shown as a kind of flow chart.
See SDH Maintenance Signal Interactionon page 113.
9.3.2
Examples
See Examples of SDH Maintenance Signal Interactionson page 114.
Example 1 :
Shows the maintenance signal interaction when MS-AIS is
received and HP and LP are terminated.
(e.g. a VC-12 with 2 MBit/s Mapping dropped in an ADM)
Example 2 :
Shows the maintenance signal interaction when TU-AIS is
received, HP is terminated and LP is passed through.
Note :
There is no reverse indication like LP-RDI,
since this will be generated in the NE where
the LP is actually terminated.
Example 3 :
Shows the maintenance signal interaction when TU-AIS is
received and HP and LP are terminated.
9.3.3
Alarm Reporting / Alarm Suppression

When a higher order alarm indication is received by a network element, only
this one shall be reported to the management System. All lower order
alarms, which are a consequence of the higher order alarm shall not be reported, i.e. be suppressed in the SEMF.
Upstream / Reverse
PI
RS
MS
SPI
RST
MST
Downstream
Lower Order Path
Higher Order Path

MSA
HPOM
HUG
HPC
HPT
HPA
LOS
LPC
LPT
LPA
Datum - Date
Rev
NUHN:95-045 Uen
1998-06-01
113 (195)
Tributary-AIS
LP Signal (Passed Through)

LOVC POH
LO Unequipped Signal
LP-UNEQ
LP-TIM
LP-SLM
LP-BIP (B3/V5)
LP-REI
LP-RDI
LP-REI
LP-RDI
LUG
TU-AIS
HP Signal (Passed Through)

HOVC POH
HO Unequipped Signal
HP-UNEQ
HP-TIM
HP-SLM
HP-BIP (B3)
HP-REI
HP-RDI
HP-REI
HP-RDI
TU-AIS
HP-LOM / TU-LOP
IR only
AU-AIS
MS-AIS
MS-EBER (B2)
MS-BIP (B2)
MS-REI
MS-RDI
MS-REI
MS-RDI
AU-AIS
AU-LOP
LPOM
Legend
Signal/Action Flow
Optional Signal/Action Flow
Detection
Generation
Generation of AIS (All Ones)
Generation of Unequipped VC
for unused HPC/LPC Outputs
AIS
LOF
RS-BIP (B1)
Regenerated Signal
SDH Maintenance Signal Interaction
Examples of SDH Maintenance Signal Interactions

1. MS-AIS when HP and LP Terminated
PPI
LPA
Trib. AIS
LPT
LPC
LUG LPOM
HPA
HPT
TU-AIS
HPC
MSA
MSP
MST
RST
SPI
HUG HPOM
AU-AIS
MS-AIS
MS-RDI
HP-RDI
LP-RDI
PPI
LPA
LPT
LPC
LUG LPOM
HPA
HPT
HPC
HUG HPOM
MSA
MSP
MST
RST
SPI
RST
MST
MSP
MSA
HPOM HUG
HPC
HPT
HPA
LPOM LUG
LPC
LUG LPOM
HPA
HPT
HPC
HUG HPOM
MSA
MSP
MST
RST
SPI
SPI
LP-RDI
Trib. AIS
NUHN:95-045 Uen
TU-AIS
TU-AIS
Rev
3. TU-AIS when HP and LP Terminated
TU-AIS
Datum - Date
TU-AIS
1998-06-01
2. TU-AIS when HP Terminated and LP Passed Through
114 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
115 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
10
Protection
10.1
Multiplex Section Protection (MSP)
10.1.1
MSP Architecture / Functional Blocks
116 (195)
MSP is based on a 1:n (1 for n) Architecture. 1:n means that there is 1 Protection Section available for n Working Sections.
See 1:n MSP Architecture / Functional Blockson page 117
The special case with n=1 is very important. Usually a 1:1 architecture is implemented as 1+1. The 1+1 architecture uses a slightly different MSP Switch
Model than 1:1.
See also section 10.1.5 Application Examples of the MSP Switch Modelon
page 120
10.1.2
MSP Operation Modes
10.1.2.1
Bi-Directional Operation
In bi-directional operation, the failed working channel is switched to the
protection section in both directions (i.e. in both ends), even in those cases
where only one transmission direction is affected by the failure. Switching
in only one direction is not allowed.
10.1.2.2
Uni-Directional Operation
In uni-directional operation, the switching is complete when the working
channel in the failed direction (i.e. only at the affected end) is switched to
the protection section.
10.1.3
MSP Switching Modes
10.1.3.1
Revertive Switching
In revertive mode, the working channel is switched back to the working section, i.e. restored, when the working section has recovered form failure.
Usually a wait-to-restore time is taken into consideration before the restoration is performed to make sure that the recovered section is in a stable
condition.
10.1.3.2
Non-Revertive Switching
In non-revertive mode, the switch is maintained even after recovery from
failure. Usually a do not revert request is sent out from the node that initiated the protection switch action.
For 1:n architectures, Non-Revertive Switching is not allowed.
Node A
Node B
Working
MSA
Channel #1
MST
RST
SPI
Working
MSA
Channel #2
MST
RST
SPI
Working
MSA
Channel #3
MST
RST
SPI
Working Section #1
Working Section #2
Working Section #3
SPI
RST
MST
MSA Working
Channel #1
SPI
RST
MST
MSA Working
Channel #2
SPI
RST
MST
MSA Working
Channel #3
MST
RST
SPI
Protection Section
MST
MSA Working
Channel #n
SPI
RST
MST
MSA Protection
Channel
Note :
1:1 and 1+1 Architectures are a special case

where only Working Channel #1 is used
117 (195)

RST
Note : MSA for Protection Channel only needed in case Extra Traffic is used
Note : MSA for Protection Channel only needed in case Extra Traffic is used
:
:
:
:
:
SPI
Protection MSA
Channel
Working Section #n
SPI
NUHN:95-045 Uen
RST
Rev
MST
Working
MSA
Channel #n
Datum - Date
MSP
1998-06-01
MSP
MSA
MSP
MST
RST
SPI
1:n MSP Architecture / Functional Blocks
a
10.1.4
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
118 (195)
Basic MSP Switch Model

The basic MSP switch model supports 1:n architectures up 1:14 (one for
fourteen) with an optional Extra Traffic Channel that can be used when the
Protection Section is not in use. The Null Channel can be seen as a deadend channel that is able to generate and terminate idle traffic on the protection section.
See Basic MSP Switch Modelon page 119.
In practice, only a subset of this model is used. A special case is the 1:1 (one
for one) architecture, that is usually implemented as 1+1 (one plus one) architecture.
See also section 10.1.5 Application Examples of the MSP Switch Modelon
page 120.
119 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Basic MSP Switch Model

0
Null
Channel
0
1
Channel #1
Working
Section #1
Working
Section #2
Working
Section #3
14
Working
Section #14
15
Protection
Section
2
Channel #2
3
Channel #3
14
Channel #14
15
Extra Traffic
Channel
(Optional)
Bridge
Note :
Selector
(Switch)
Model shown in released position
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
10.1.5
Application Examples of the MSP Switch Model
10.1.5.1
1:2 Architecture (one for two)

See 1:2 Architecture (one for two)on page 121
10.1.5.2
1:1 Architecture (one for one)

See 1:1 Architecture (one for one)on page 122
10.1.5.3
1+1 Architecture (one plus one)

See 1+1 Architecture (one plus one)on page 123
120 (195)
1:2 Architecture (one for two)

0
Null
Channel
0
1
Channel #1
121 (195)
Note :
Selector
(Switch)
Bridge
NUHN:95-045 Uen
Extra Traffic
Channel
(Optional)
Rev
15
Protection
Section
15
Channel #2
Datum - Date
Working
Section #2
1998-06-01
Working
Section #1
122 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
1:1 Architecture (one for one)

1:1 Architecture
(Without optional Extra Traffic Channel)
0
Null
Channel
0
1
Working
Channel
Working
Section
Protection
Section
Bridge
Note :
Selector
(Switch)
Simplified 1:1 Circuit
(Equivalent to Circuit above)
Null
Channel
0
1
Working
Channel
0
1
Working
Section
Protection
Section
Bridge
Note :
Selector
(Switch)
For MSP in USHR, the Null Channel must be looped
Working
Channel
1+1 Architecture (one plus one)
0
1
Working
Section
NUHN:95-045 Uen
Rev
The 1+1 Architecture is a 1:1 Circuit with a permanent Bridge
Note :
Datum - Date
Selector
(Switch)
1998-06-01
Protection
Section
Permanent
Bridge
123 (195)
a
10.1.6
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
124 (195)
MSP Signalling
For the MSP Signalling, the K1,K2 Bytes in the MSOH are used.
See MSP Signalling in K1,K2 Byteson page 125.
The MSP signalling information is transmitted over the Protection Section
and in certain applications also over the working section(s). The signalling is
based on a handshake-protocol with requests or commands and acknowledgements that is also called APS Protocol. (APS = Automatic Protection
Switching)
See also section 10.1.7 Examples of Automatic Protection Switching (APS)
in MSPon page 126.
K1 Byte
X
Bin
Hex Description
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Null Channel (Protection)

Working Channel #1
Working Channel #2
Working Channel #3
Working Channel #4
Working Channel #5
Working Channel #6
Working Channel #7
Working Channel #8
Working Channel #9
Working Channel #10
Working Channel #11
Working Channel #12
Working Channel #13
Working Channel #14
Extra Traffic Channel
1+1 Architecture
1:n Architecture
Note :
Bits 6 ... 8 in K2 are
under study.
However two values
are defined :
- 110 -> MS-RDI
- 111 -> MS-AIS
125 (195)
For 1+1 systems, only Working Channel #1 is applicable

Extra Traffic Channel (optional) only applicable for 1:n systems
0
1
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Bin Description
Null Channel (Protection)

Working Channel #1
Working Channel #2
Working Channel #3
Working Channel #4
Working Channel #5
Working Channel #6
Working Channel #7
Working Channel #8
Working Channel #9
Working Channel #10
Working Channel #11
Working Channel #12
Working Channel #13
Working Channel #14
Extra Traffic Channel
Hex Description
NUHN:95-045 Uen
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Bin
Rev
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Hex Description
Under Study
(See Note)
No Request
Do Not Revert
Reverse Request
Not Used
Exercise
Not Used
Wait-to-Restore
Not Used
Manual Switch
Not Used
Signal Degrade Low Prio.
Signal Degrade High Prio.
Signal Fail Low Priority
Signal Fail High Priority
Forced Switch
Lockout of Protection
Bridged Channel
(Status)
Channel Requesting
Switch Action
Bin
X X X X X X X
Datum - Date
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
1998-06-01
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
K2 Byte
X X X X X X X
Type of Request
(Reason)
MSP Signalling in K1,K2 Bytes
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
10.1.7
Examples of Automatic Protection Switching (APS) in MSP
10.1.7.1
APS Protocol for 1:2 Architecture
126 (195)
This example shows the most important phases of an APS protocol for 1:2
MSP in bi-directional revertive mode.
See APS-Protocol for 1:2 MSPon page 127
10.1.7.2
APS Protocol for 1+1 Architecture

There are two different approaches for the 1+1 APS Protocol :
a) The first one keeps to the generic rules of the MSP Switch Model and is
therefore compatible to systems with 1:n Architecture.
The example shows an APS protocol for bi-directional non-revertive
mode. See APS-Protocol for 1+1 MSP(Compatible to 1:n MSP)on page
136
b) The second one uses a modified protocol and is therefore not compatible
to 1:n systems. The modified protocol is some sort of non-revertive and
the example shows it for bi-directional switching mode.
See APS-Protocol for 1+1 MSP (For Networks using predominantly 1+1
MSP)on page 140.
10.1.7.3
Principle of 1:1 MSP in USHR

There is no APS Protocol defined in the ITU-T or ETSI Standards for Uni-directional Self-Healing Rings (USHR). Anyhow, the 1:1 MSP Switch Model is
also applicable for this kind of architecture.
See Principle of 1:1 MSP in USHRon page 143.
127 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
APS-Protocol for 1:2 MSP

Phase 0 :
(MSP in released state)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
K1 sent : 0000 0000
K2 sent : 0000 1000
Phase 1a :
Node B
K1 sent : 0000 0000
K2 sent : 0000 1000
- No Fault Condition
- No Request
- Protection Section not in use
- No Request
(Signal Degrade on Working Section #2 in Node A)
0
Null CH
0
0
1
CH #1
K1 sent : 1010 0010

K2 sent : 0000 1000
- Signal Degrade on Working Section #2
- Order Bridge for CH #2 in B
CH #1
1
2
Working Section #2
Node A
Null CH
0
Working Section #1
2
CH #2
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 0000 0000

K2 sent : 0000 1000
128 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

...... Continued (1)
Phase 1b :
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 0010 0010
K2 sent : 0010 1000
K1 sent : 1010 0010

K2 sent : 0000 1000
- Bridge of CH #2
- Reverse Request for Bridge of CH #2 in A
Phase 1c :
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 1010 0010

K2 sent : 0010 1000
- Switch CH #2 to protection
- Bridge of CH #2
CH #1
1
2
Working Section #2
Node A
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 0010 0010

K2 sent : 0010 1000
129 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 1d :
(Bi-directional Switch Action completed)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 0010 0010
K2 sent : 0010 1000
K1 sent : 1010 0010

K2 sent : 0010 1000
Phase 2a :
(Signal Fail pre-empts Signal Degrade)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 1010 0010

K2 sent : 0010 1000
CH #1
1
2
Working Section #2
Node A
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 1101 0001

K2 sent : 0010 1000
- Signal Fail on Working Section #1
- Order Bridge of CH #1 in A
- Release Switch CH #2
130 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 2b :
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 1101 0001
K2 sent : 0010 1000
K1 sent : 0010 0001

K2 sent : 0001 1000
- Bridge of CH #1
- Reverse Request for Bridge of CH #1 in B
Phase 2c :
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 0010 0001

K2 sent : 0001 1000
CH #1
1
2
Working Section #2
Node A
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 1101 0001

K2 sent : 0001 1000
- Bridge of CH #1
131 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 2d :
(Bi-directional Switch Action completed)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 1101 0001
K2 sent : 0001 1000
K1 sent : 0010 0001

K2 sent : 0001 1000
Phase 3 :
(Signal Fail on Working Section #1 repaired)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 0010 0001

K2 sent : 0001 1000
CH #1
1
2
Working Section #2
Node A
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 0110 0001

K2 sent : 0001 1000
- Start Wait-to-Restore time (WTR)
132 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 4a :
(Working Section #2 still degraded, interrupts WTR)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 0110 0001
K2 sent : 0001 1000
K1 sent : 1010 0010

K2 sent : 0001 1000
- Signal Degrade on Working Section #2
Phase 4b :
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 1010 0010

K2 sent : 0001 1000
CH #1
1
2
Working Section #2
Node A
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 0010 0010

K2 sent : 0010 1000
- Bridge of CH #2
133 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 4c :
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 0010 0010
K2 sent : 0010 1000
K1 sent : 1010 0010

K2 sent : 0010 1000
- Bridge of CH #2
Phase 4d :
(Bi-directional Switch Action complete)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 1010 0010

K2 sent : 0010 1000
CH #1
1
2
Working Section #2
Node A
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 0010 0010

K2 sent : 0010 1000
134 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 5a :
(Signal Degrade on Working Section #2 repaired)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 0010 0010
K2 sent : 0010 1000
K1 sent : 0110 0010

K2 sent : 0010 1000
Phase 5b :
(Wait-to-Restore time expires)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 0000 0000

K2 sent : 0010 1000
- Send No Request to B
CH #1
1
2
Working Section #2
Node A
Null CH
2
Protection Section
CH #2
Node B
K1 sent : 0010 0010

K2 sent : 0010 1000
135 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 5c :
0
Null CH
0
0
1
CH #1
Working Section #1
1
2
CH #2
Null CH
CH #1
1
2
Working Section #2
CH #2
2
Protection Section
Node A
Node B
K1 sent : 0000 0000
K2 sent : 0000 1000
K1 sent : 0000 0000

K2 sent : 0010 1000
- Send No Request to A
- Release Bridge of CH #2
Phase 5d :
(MSP in released state again)
0
Null CH
0
0
1
CH #1
CH #2
Working Section #1
1
2
2
K1 sent : 0000 0000

K2 sent : 0000 1000
- Release Bridge of CH #2
CH #1
1
2
Working Section #2
Node A
Null CH
CH #2
2
Protection Section
Node B
K1 sent : 0000 0000
K2 sent : 0000 1000
136 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
APS-Protocol for 1+1 MSP

(Compatible to 1:n MSP)
Phase 0 :

Working Section #1
0
1
0
1
Protection Section
Node A
Node B
K1 sent : 0000 0000
K2 sent : 0000 0000
K1 sent : 0000 0000

K2 sent : 0000 0000
- No Request
Phase 1a :
- No Request
(Signal Fail on Working Section #1 in Node A)

Working Section #1
0
1
0
1
Protection Section
Node A
Node B
K1 sent : 1101 0001

K2 sent : 0000 0000
K1 sent : 0000 0000

K2 sent : 0000 0000
- Signal Fail on Working Section #1

Phase 1b :
Working Section #1
0
1
Node A
K1 sent : 1101 0001
K2 sent : 0000 0000
0
1
Protection Section
Node B
K1 sent : 0010 0001
K2 sent : 0001 0000
- Indicates Bridge for CH #1
137 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 1c :
Working Section #1
0
1
0
1
Protection Section
Node A
Node B
K1 sent : 0010 0001
K2 sent : 0001 0000
K1 sent : 1101 0001

K2 sent : 0001 0000
- Indicates Bridge for CH #1
Phase 1d :

Working Section #1
0
1
0
1
Protection Section
Node A
Node B
K1 sent : 1101 0001

K2 sent : 0001 0000
K1 sent : 0010 0001

K2 sent : 0001 0000
Phase 2 :
(Signal Fail on Working Section #1 repaired)

Working Section #1
0
1
Node A
K1 sent : 0001 0001
K2 sent : 0001 0000
- Send Do Not Revert to B
(Maintain Switch)
0
1
Protection Section
Node B
K1 sent : 0010 0001
K2 sent : 0001 0000
138 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 3a :
(Signal Degrade on Protection Section in Node A)

Working Section #1
0
1
0
1
Protection Section
Node A
Node B
K1 sent : 0010 0001
K2 sent : 0001 0000
K1 sent : 1010 0000

K2 sent : 0001 0000
- Signal Degrade on Protection Section
- Order Null Bridge in B
- Release Switch of CH #1
Phase 3b :
Working Section #1
0
1
0
1
Protection Section
Node A
Node B
K1 sent : 1010 0000

K2 sent : 0001 0000
K1 sent : 0010 0000

K2 sent : 0000 0000
- Indicate Null Bridge
- Reverse Request for Null Bridge in A
- Release Switch of CH #1
Phase 3c :

Working Section #1
0
1
Node A
K1 sent : 1010 0000
K2 sent : 0000 0000
- Indicate Null Bridge
0
1
Protection Section
Node B
K1 sent : 0010 0000
K2 sent : 0000 0000
139 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 4a :
(Signal Degrade on Protection Section repaired)

Working Section #1
0
1
0
1
Protection Section
Node A
Node B
K1 sent : 0010 0000
K2 sent : 0000 0000
K1 sent : 0000 0000

K2 sent : 0000 0000
(Maintain Switch in released position)
Phase 4b :

Working Section #1
0
1
Node A
K1 sent : 0000 0000
K2 sent : 0000 0000
0
1
Protection Section
Node B
K1 sent : 0000 0000
K2 sent : 0000 0000
(Maintain Switch in released position)
140 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

(For Networks using predominantly 1+1 MSP)
Phase 0 :

Section #1
1
2
1
2
Section #2
Node A
Node B
K1 sent : 0000 0000
K2 sent : 0001 0000
K1 sent : 0000 0000

K2 sent : 0001 0000
- No Request
- Traffic on Section #1
Phase 1a :
- No Request
(Signal Fail on Section #1 in Node A)

Section #1
1
2
1
2
Section #2
Node A
Node B
K1 sent : 1101 0001

K2 sent : 0001 0000
K1 sent : 0000 0000

K2 sent : 0001 0000
- Signal Fail on Section #1
Phase 1b :
Section #1
1
2
Node A
K1 sent : 1101 0001
K2 sent : 0001 0000
1
2
Section #2
Node B
K1 sent : 0010 0001
K2 sent : 0001 0000
- Switch to Section #2
- Reverse Request to Switch
141 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 1c :

Section #1
1
2
1
2
Section #2
Node A
Node B
K1 sent : 0010 0001
K2 sent : 0001 0000
K1 sent : 1101 0001

K2 sent : 0001 0000
- Switch to Section #2
Phase 2a :
(Signal Fail on Section #1 repaired)

Section #1
1
2
1
2
Section #2
Node A
Node B
K1 sent : 0110 0001

K2 sent : 0001 0000
K1 sent : 0010 0001

K2 sent : 0001 0000
Phase 2b :
(Wait-to-Restore time expires)

Section #1
1
2
Node A
K1 sent : 0000 0000
K2 sent : 0010 0000
1
2
Section #2
Node B
K1 sent : 0010 0001
K2 sent : 0001 0000
142 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen

Phase 2c :

Section #1
1
2
Node A
K1 sent : 0000 0000
K2 sent : 0010 0000
1
2
Section #2
Node B
K1 sent : 0000 0000
K2 sent : 0010 0000
143 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Principle of 1:1 MSP in USHR

Phase 0 :
Null CH
looped

0
1
CH #1
Working Sections
0
1
Node D
0
1
Null CH
looped
0
1
0
1
Node A
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
Null CH
looped
Node B
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
Protection Sections
- No Request
- Protection Sections not in use
(Protection Switch Action complete)

0
1
CH #1
0
1
Working Sections
0
1
Node D
Node A
0
1
0
1
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
- Switch performed
Node C
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
0
1
CH #1
Null CH
looped
CH #1
0
1
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
Null CH
looped
Null CH
looped
CH #1
0
1
- No Request
- Protection Sections not in use
Phase 1 :
Node C
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
0
1
CH #1
CH #1
0
1
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
Null CH
looped
0
1
Protection Sections
Null CH
looped
CH #1
Node B
K1 sent : xxxx yyyy

K2 sent : xxxx yyyy
- Bridge performed
a
10.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
144 (195)
Sub-Network Connection Protection (SNCP) [*** Part of

next Rev. of Document ***]
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
145 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
11
Timing (Synchronisation)
11.1
Synchronous Equipment Timing
11.1.1
Timing Functional Blocks (Overview)
146 (195)
Each SDH equipment has a Synchronous Equipment Timing Source (SETS)

that provides the timing reference to the relevant functional blocks.
The SETS can be synchronised from a received STM-N signal, from a received
2 MBit/s signal (optional), from an external 2 MHz clock signal (optional) or
from the internal clock.The clock recovery of the received transmission signals is done in SPI and PPI respectively. The SETPI performs encoding and adaptation of the external 2 MHz clock signal.
See also section 4 SDH Functional Blockson page 26.
11.1.2
Synchronous Equipment Timing Physical Interface (SETPI)

The SETPI performs the encoding and adaptation of the physical synchronisation medium towards the SETS and monitors the availability of the incoming synchronisation signal. The SETPI can optionally accept binary or HDB3
coded clock signals.
11.1.3
Synchronous Equipment Timing Source (SETS)
11.1.3.1
General
The SETS Function represents the SDH Network Element clock.
It provides timing reference to all SDH Functional Blocks except the SPI, PPI,
SEMF, MCF and OHA.
The SETS consists of Selector A, B, C and the Synchronous Equipment Timing Generator (SETG).
See SDH Equipment Timing Block Diagramon page 148.
11.1.3.2
Selector A
Selector A selects the signal to be used as timing reference for the SETS.
The signal can be a member out of three groups :
a)
Clock recovered from an incoming STM-N signal (via SPI)
b)
Clock recovered from an incoming 2 MBit/s signal (via PPI)
c)
Clock from an external 2 MHz Synchronisation Port (via SETPI)
11.1.3.3
Synchronous Equipment Timing Generator (SETG)

The SETG consists of a clock, a controllable oscillator together with the associated control function.
The SETG can operate in three different modes :
a)
Free Run Mode
(Initial clock frequency before a valid reference source has been selected by selector A)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
147 (195)
b)
Locked Mode (normal operation)

(Phase-locked to input reference source selected by selector A)
c)
Holdover Mode
(Keep the last known good clock frequency during the time the reference sources selected by selector A are not available)
d)
Regulation Mode
(Regulation mode is active during the time the oscillator is adjusting
the frequency after the active reference has changed, until the oscillator is phase-locked to the new reference signal. Regulation
mode is in principal the same as the locked mode, but with different
filtering characteristics.)
The control function of the oscillator provides the SETG with the required
timing characteristics (filtering). The output signal of the SETG is used as
timing reference for the synchronous equipment.
11.1.3.4
Selector B , Selector C and Squelching

Selector B defines the mode of the output signals of the 2 MHz Synchronisation Ports :
a)
SETG-Locked Mode
(Output signal follows the timing characteristics of the SETG)
b)
Non-SETG-Locked Mode
(Output signal follows the timing characteristics of the STM-N reference signal selected by selector C.
Depending on the synchronisation design of a network, one or the other
mode can be advantageous.
Squelching (Inhibition) of the output signal of selector B is an optional function to suppress the transmission of invalid synchronisation signals to the external 2 MHz sync. ports.
Squelching criteria can be :
a)
SETG in free-running mode (SETG-locked mode)
b)
SETG in holdover mode (SETG-locked mode)
c)
Loss of selected STM-N signal (Non-SETG-locked mode)
d)
Manual command
SPI
SPI
SPI
STM-N
Ports
SDH Equipment Timing Block Diagram
Other SDH Functional Blocks

PPI
PPI
PPI
2 MBit/s
Ports
Datum - Date
Rev
NUHN:95-045 Uen
Selector A
Control
Clock
Oscill.
Selector C
Selector B
Squelch
148 (195)
2 MHz
Synchr.
Ports
SETPI
SETPI
SETPI
SETG
1998-06-01
SETS
a
11.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Jitter [*** Part of next Rev. of Document ***]
149 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
12
Transmission Aspects
12.1
Line Codes
12.1.1
General
12.1.1.1
About Line Codes for Electrical Signals
150 (195)
A Line Code has to fulfil the following requirements to be suitable for transmission over long electrical lines :
a)
The required bandwidth should be as narrow as possible, particularly no DC-component (f = 0 Hz) is allowed.
b)
The receiver must be able to recover the bit clock from the received
signal, independent from the transmitted pattern.
c) Immunity against reversed polarity.
Some auxiliary codes are the base for the real line codes :
NRZ Code :
The NRZ code (Non Return Zero) is a pure binary code and
is used only internally in the systems (e.g. TTL). It is not suitable for transmission because it contains a DC component,
the receiver would lose the synchronisation after long 1
or 0 sequences and it wont work with reversed polarity.
RZ Code :
The RZ code (Return Zero) solves the clock extraction problem for long 1 sequences, but thats it.
AMI Code :
The AMI code (Alternate Mark Inversion) turns every second 1 into a negative pulse. Therefore the AMI code actually has three states : +1, 0 and -1. The DC component disappears, long 1 sequences are no problem
any more and reversed polarity can be handled. But long
0 sequences will still screw up the clock extraction in the
receiver.
See Auxiliary Codeson page 151
12.1.1.2
About Line Codes for Optical Signals

The only thing Line Codes for optical signals have to take care of is to avoid
long 1 and 0 sequences to make sure that the receiver is able to recover the bit clock from the received signal, independent from the transmitted
pattern.
Usually a scrambling algorithm with a generating polynomial is introduced,
to make sure that 1 and 0 sequences of only a certain length are possible.
NRZ
NUHN:95-045 Uen
-1
Rev
AMI
RZ
Datum - Date
1998-06-01
1
0
1
1
1
1
0
0
0
0
0
1
0
1
1
1
0
Binary Signal
Auxiliary Codes
Clock Interval
151 (195)
a
12.1.1.3
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
152 (195)
HDB3 Code
See Line Codeson page 153.
HDB3 stands for High Density Bipolarity with maximum 3 consecutive zeros.
The HDB3 code is similar to the AMI code, but 2 additional rules are introduced to fix the problem with long 0 sequences.
Rule 1 :
If a sequence of 4 consecutive zeros is to be transmitted,
the 4th zero is replaced by a Mark Pulse, but with the
wrong polarity, i.e. a pulse that violates the AMI rule. This
makes it easy for the receiver to distinguish between real
marks and substitutes.
Rule 2 :
The Violation Marks have to have alternating polarity, in order to avoid DC. If a Violation Pulse, introduced according
to rule 1, would have the same polarity as the previous one,
an auxiliary Mark Pulse (that follows the AMI rule) is introduced at the position of the first zero in the group of 4.
Note :
Long 0 sequences are split up into such groups of 4.
12.1.1.4
CMI Code
See Line Codeson page 153.
The CMI code (Coded Mark Inversion) works a bit different.
Rule 1 :
A binary 0 is indicated by a positive transition in the middle of a unit interval.
Rule 2 :
A binary 1 is indicated by a pulse over the whole unit interval with alternate polarity compared to the last 1 that
has been transmitted before.
HDB3 Code
Binary Signal
1 0 1 0 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1
1
0
-1
All Ones Pattern, HDB3 Coded
1
0
-1
All Zeros Pattern, HDB3 Coded
1
0
-1
Auxiliary Pulse
CMI Code
Binary Signal
NRZ
1 0 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 1
1
0
1
CMI
-1
All Ones Pattern, CMI Coded
All Zeros Pattern, CMI Coded
-1
153 (195)
-1
HDB3
Violation Pulse
1
0
-1
NUHN:95-045 Uen
AMI
Rev
1
0
RZ
Datum - Date
1
0
1998-06-01
NRZ
Sequences with four (or more)

consecutive Zeros are modified with Violation Pulses and
Auxiliary Pulses
Line Codes
a
12.1.2
PDH Line Coding
12.1.2.1
Electrical PDH Signals
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
154 (195)
The european PDH signals use the following Line Codes :

- 2 MBit/s
HDB3
- 8 MBit/s
HDB3
- 34 MBit/s
HDB3
- 140 MBit/s CMI
12.1.2.2
Optical PDH Signals

Not standardised.
12.1.3
STM-N Line Coding
12.1.3.1
Electrical SDH Signals

In the european standard, electrical SDH signals are only applicable for STM1. The following Line Code is used :
- STM-1e
CMI
For compatibility reasons, the Frame Synchronous Scrambling is also used
on electrical signals. See below.
12.1.3.2
Optical SDH Signals

For STM-N Signals Frame Synchronous Scrambling is used
To avoid long 1 or 0 sequences on STM-N line signals, the binary code
is processed with a polynomial.
The generating polynomial is : 1 + x6 + x7
This can be achieved by a very simple circuit.
See Functional Diagram of Frame Synchronous Scrambleron page 155
Note :
This scrambling procedure is no security encoding, it is just
to avoid long 1 or 0 sequences.
Of course, the STM-N Frameword (FAS) must not be scrambled, otherwise
the receiver would have no chance to detect it. Therefore the scrambling is
frame synchronous.
This means :
For the first row of the RSOH (containing the FAS) the
scrambling is inhibited and re-started at the first byte of the
payload.
See Frame Synchronous Scramblingon page 155
Note :
For compatibility reasons, the Frame Synchronous Scrambling is also used on electrical SDH signals.
Functional Diagram of Frame Synchronous Scrambler

Data In
Q
Set
Q
Set
Q
Set
Q
Set
Q
Set
STM-N Clock
Frame Pulse
155 (195)
(MSOH)
Scrambled
Data out
NUHN:95-045 Uen
(Payload)
Set
Rev
(RSOH)
Scrambling Sequence
is re-started here
Set
Datum - Date
= Not Scrambled
= Scrambled
1998-06-01
Frame Synchronous Scrambling
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
156 (195)
12.2
Optical Transmission with Fibres [*** Part of next Rev. of

Document ***]
Appendix A
A.1
SDH - Sizes and Nominal Speeds

See SDH - Sizes and Nominal-Speedson page 157
PDH
SDH
xN
STM-N
SDH - Sizes and Nominal-Speeds

x1
AUG
N x 9x270 Bytes
9x261 Bytes
(N x 155.52 Mb/s) + 9 Bytes Pointer
AU-4
VC-4
C-4
D4
9x261 Bytes
+ 9 Bytes Pointer
9x261 Bytes
(150.336 Mb/s)
9x260 Bytes
(149.76 Mb/s)
139.264 Mb/s
x3
x1
TUG-3
x3
TU-3
VC-3
9x86 Bytes
(49.536 Mb/s)
9x85 Bytes
(48.96 Mb/s)
NUHN:95-045 Uen
D3
34.368 Mb/s
44.763 Mb/s
Rev
C-3
9x84 Bytes
(48.384 Mb/s)
VC-3
9x85 Bytes
(48.96 Mb/s)
Datum - Date
AU-3
9x87 Bytes
+ 3 Bytes Pointer
1998-06-01
x7
x7
TUG-2
Virtual Container x
Tributary Unit x
Container x
PDH Signal Level x
9x12 Bytes
(6.912 Mb/s)
x3
x4
TU-2
VC-2
C-2
D2
432 Bytes/500ms
(6.912 Mb/s)
428 Bytes/500ms
(6.848 Mb/s))
424 Bytes/500ms
(6.784 Mb/s)
6.312 Mb/s
TU-12
VC-12
C-12
D12
144 Bytes/500ms
(2.304 Mb/s)
140 Bytes/500ms
(2.240 Mb/s)
136 Bytes/500ms
(2.176 Mb/s)
2.048 Mb/s
TU-11
VC-11
C-11
D11
108 Bytes/500ms
(1.728 Mb/s)
104 Bytes/500ms
(1.664 Mb/s)
100 Bytes/500ms
(1.600 Mb/s)
1.544 Mb/s
157 (195)
STM-N
AUG
AU-x
VC-x
TUG-x
TU-x
C-x
Dx
x1
9x86 Bytes
(49.536 Mb/s)
a
A.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
158 (195)
Principle of SDH Bit Interleaved Parity (BIP)

SDH systems monitor the transmission quality using a method called Bit Interleaved Parity (BIP). A transmitter adds the parity information to the transmitted signal. A receiver does the same parity calculation and compares the
result with the parity calculated by the transmitter. A mismatch indicates
transmission error(s).
A number of BIP types are used in SDH : BIP-2, BIP-8, BIP-24, BIP-96 and
BIP-384. They are based on the same principle, but differ in length. The n
in BIP-n indicates the number of bits in the BIP.
The procedure for calculating the BIP-n is :
A relevant number of bits are considered as the calculation frame for the
Bit Interleaved Parity, e.g. a whole STM-Frame or a VC.
The BIP calculation frames must have an allocated space of n bits to carry
the BIP results.
This frame is grouped into n columns.
The parity is calculated for each group.
- The parity is even (or 0), if the number of 1s in the group is even
- the parity is odd (or 1), if the number of 1s in the group is odd.
The bits of the BIP-n are set to the parity of the related group.
The BIP-n result of a certain calculation frame is put into the allocated space
of the next frame.
See Example for a BIP-8 Calculationon page 159
Example for a BIP-8 Calculation

BIP Calculation Frame #n
BIP-8 Result
of Frame #n-1
1
0
1
0
0
1
0
1
0
0
0 1 1 0 0 1 0
0
1
0
1
0
1
1
1
1
1
1
0
0
1
0
1
1
1
0
1
0
0
1
1
1
0
0
1
0
1
0
0
0
0
0
0
1
0
0
1
0
1
0
1
1
0
0
0
1
1
1
0
1
0
1
1
1
1
1
1
1
0
0
1
1
1
1
0
1
1
0
1
0
1
1
1
1
1
0
1
0
1
1
0
1
0
1
0
1
1
0
0
1
0
1
1
0
1
0
1
0
0
1
1
0
0
0
0
1
0
1
1
0
0
1
0
0
0
1
1
1
0
0
1
1
0
1
1
1
0
1
0
0
1
1
0
1
1
1
0
1
0
1
1
1
0
1
1
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
0
1
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
0
1
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
1
1
0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
0
0
1
1
1
0
1
1
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
0
1
0
0
1
0
0
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
1
1
1
0
1
1
0
1
1
1
1
1
1
0
1
0
1
1
0
1
0
1
0
1
1
0
1
0
1
1
0
1
1
0
1
1
1
0
1
1
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
0
0
0
1
1
0
1
0
0
0
0
1
1
0
0
1
1
1
1
1
1
0
0
0
0
1
1
0
1
0
1
0
1
0
1
1
1
0
1
1
1
1
0
0
1
1
0
0
1
1
1
1
1
1
1
0
1
1
0
0
0
0
0
1
0
0
1
0
0
0
1
0
0
0
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
1
1
0
0
0
0
1
0
1
1
0
1
1
0
0
0
1
0
0
1
1
1
0
1
1
0
1
1
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
0
1
1
1
0
0
1
1
0
0
1
0
0
0
1
1
0
0
0
1
1
1
0
1
1
0
0
1
1
1
1
1
0
1
0
1
1
0
1
0
1
0
1
1
0
0
0
1
1
0
1
1
0
1
1
1
0
1
1
1
0
1
1
1
1
0
0
BIP-8 Result for Frame #n
BIP Calculation Frame #n+1

1
0
1
0
0
1
1
1
0
1
0
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
0
1
1
1
0
0
1
0
1
0
0
0
0
1
0
1
0
1
1
1
1
1
0
0
1
1
0
1
0
0
1
0
1
0
1
0
0
0
0
1
0
1
0
0
1
0
1
0
0
0
1
0
0
0
1
0
0
1
0
1
0
0
1
0
1
1
1
0
1
1
1
0
1
1
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
1
0
0
1
1
1
1
0
1
0
1
1
1
1
1
1
1
0
0
1
1
1
1
0
1
1
0
1
0
1
1
1
1
1
0
1
0
1
0
0
1
0
1
0
1
0
0
0
1
0
1
1
0
1
0
1
0
0
1
1
0
0
0
1
1
0
159 (195)
1
1
0
1
1
0
1
0
1
0
0
1
0
0
0
1
0
0
0
0
0
1
1
0
0
1
1
0
1
0
NUHN:95-045 Uen
0
0
0
1
1
0
1
0
1
1
Rev
1
1
0
1
1
0
1
1
0
0
1
1
0
0
0
1
0
0
1
0
Datum - Date
0
0
1
1
1
1
0
0
0
1
1998-06-01
1
0
1
0
0
1
1
0
0
1
a
A.3
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Principle of Time Division Multiplex (TDM)

160 (195)
Principle of Time Division Multiplex (TDM)

T
t
Example for TDM with 4 Tributaries

Mux
Unit
The same principle applies for TDM with

any number of tributaries
T
Tributary #1
t
Datum - Date
Rev
NUHN:95-045 Uen
Tributary #2
Tributary #3
Mux Unit
- If a Mux Unit represents 1 Bit :
-> Bit Interleaving TDM (Used in PDH)
- If a Mux Unit represents 1 Byte :
-> Byte Interleaving TDM (Used in SDH)
161 (195)
Tributary #4
1998-06-01
t/4
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
A.4
Principle of SDH Pointer Processing
A.4.1
Principle of SDH Pointer Alignment
162 (195)
When pointers are added to the VCs, they might not have the correct position in time to be placed into the HOVC or into the AUG. Therefore the
pointers need to be aligned.
A pointer is supposed to point always to the start of a VC, named Data#0
in the example below. The Payload Cells are numbered relative to the pointer position, therefore Data#0will be located in a different Payload Cell after the pointer has been moved to the aligned position. This means that the
pointer value needs to change.
See Principle of SDH-Pointer Alignmenton page 163.
Legend
Data#n
Data Block
Data#0
Begin of data structure (VC)
Data#m
End of data structure (VC)
Cell#n
Pointer
SDH - Payload Cell

Cell carrying the Pointer
Principle of SDH-Pointer Alignment

1. Before Alignment
Pointer value = 6
Data#m-7
Data#m-6
Cell#m-1
Cell#m
Pointer
Data#m-5
Data#m-4
Data#m-3
Data#m-2
Data#m-1
Data#m
Data#0
Cell#0
Cell#1
Cell#2
Cell#3
Cell#4
Cell#5
Cell#6
Data#1
Data#2
Data#3
Cell#7
Cell#8
Cell#9
Pointer value = m-2

Data#m-5
Data#m-4
Data#m-3
Data#m-2
Data#m-1
Data#m
Data#0
Data#1
Data#2
Cell#m-8
Cell#m-7
Cell#m-6
Cell#m-5
Cell#m-4
Cell#m3
Cell#m-2
Cell#m-1
Cell#m
Pointer
Data#3
Data#4
Data#5
Cell#0
Cell#1
Cell#2
Data#3
Data#4
Data#5
Data#6
Data#7
Data#8
Data#9
Cell#0
Cell#1
Cell#2
Cell#3
Cell#4
Cell#5
Cell#6
Cell#7
Cell#8
Cell#9
Cell#10
Cell#11
2. After Alignment
Pointer value = 4
Data#m-7
Data#m-6
Data#m-5
Data#m-4
Cell#m-3
Cell#m-2
Cell#m-1
Cell#m
Pointer
Data#m-3
Data#m-2
Data#m-1
Data#m
Data#0
Data#1
Data#2
Data#3
Cell#0
Cell#1
Cell#2
Cell#3
Cell#4
Cell#5
Cell#6
Cell#7
Data#m
Data#0
Data#1
Data#2
Data#3
Data#4
Data#5
Data#6
Cell#0
Cell#1
Cell#2
Cell#3
Cell#4
Cell#5
Cell#6
Cell#7
Pointer value = 1
Data#m-4
Data#m-3
Data#m-2
Data#m-1
Cell#m-3
Cell#m-2
Cell#m-1
Cell#m
Pointer
Data#2
Data#1
NUHN:95-045 Uen
Data#0
Rev
Data#m
Data#m-1
Datum - Date
Pointer
1998-06-01
Pointer value = 2
Pointer value = m
Data#m-1
Data#m
Data#0
Cell#m-3
Cell#m-2
Cell#m-1
Cell#m
Pointer
Data#1
Data#2
Data#3
Data#4
Data#5
Data#6
Data#7
Data#8
Cell#0
Cell#1
Cell#2
Cell#3
Cell#4
Cell#5
Cell#6
Cell#7
163 (195)
Data#m-2
a
A.4.2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
164 (195)
Principle of SDH Pointer Justifications

SDH Pointers always point to the begin of the respective Payload (VC).
If the speed of a VC is different from the speed of the HOVC or the AUG
into which it is multiplexed (i.e. bitrate offset), it must be able to float forward or backward within the HOVC or the AUG structure. This is handled
by Pointer Justifications.
There are three typical situations :
- Synchronous situation
A Payload Cell is ready to be transmitted for
each incoming Data Block and vice versa.
-> No Justifications needed (Ideal)
- Incoming VC too slow
Payload Cells would be ready to be transmitted before the corresponding Data Blocks
are received.
To prevent this, a specified Payload Cell (Positive Justification Opportunities filled with
dummy data (Stuff) in a controlled way as
soon as the VC is one Block behind.
-> Positive Justification
- Incoming VC too fast
Data Blocks would be received too early, i.e.
before the corresponding Payload Cells are
ready to be transmitted.
To prevent this, a specified OH Cell (Negative
Justification Opportunity) is used to carry the
extra data as soon as the VC is one Block
ahead.
-> Negative Justification
Conclusion :
SDH systems need a data buffer with a size of at least
+/- 1 Data Block to be able to handle pointer justifications
without data loss.
See Principle of SDH-Pointer Justificationson page 165 and following
Legend
Data#x
Incoming Data Block
Data#0
Begin of incoming data structure (VC)
Data#m
End of incoming data structure (VC)
Cell carrying the Pointer
Cell#1
Data#1
Cell#2
Pointer value = 2
A Payload Cell is ready for each incoming Data Block and vice versa
Data#2
Cell#3
Cell#4
Data#3
OH
Data#4
Cell#5
Data#5
Cell#6
Data#6
Cell#7
Data#7
Cell#8
Cell#9
Cell#0
Data#0
Data#m
NUHN:95-045 Uen
Speed of incoming data is accurate (synchronous)

-> No Justification needed
Rev
Pointer
Pointer
Cell#m
Data#m-1
Overhead Cell
OH
Datum - Date
Data#m-2
SDH - Payload Cell
Cell#n
1998-06-01
Example 1 :
Principle of SDH-Pointer Justifications
165 (195)

Speed of incoming data is too slow
-> Positive Justification needed
Example 2 :
a.) Problem if no Justification would take place

Data#m-2
Data#m-1
Cell#m
Data#m
Pointer
Cell#0
Data#0
Data#1
Cell#1
Cell#2
Cell#3
Data#3
OH
Cell#4
Cell#5
Data#5
Cell#6
Cell#7
Data#6
Data#7
Cell#9
Cell#8
Pointer
Cell#0
Data#0
Data#1
Cell#1
Cell#2
Cell#3
Data#2
Cell#4
Data#3
OH
Data#4
Cell#5
STUFF
Data#5
Cell#6
Cell#7
Data#6
Cell#8
Data#7
Cell#9
Pointer value = 2 (I-Bits inverted)

-> Cell#5 is stuffed to fill the gap caused by the slow data
-> Data#3 is placed into Cell#6 now instead of Cell#5
c.) After Justification

Data#m-3
Cell#m
Data#m-2
Pointer
Data#m-1
Cell#0
Data#m
Cell#1
Data#0
Cell#2
Cell#3
Cell#4
Data#2
OH
Data#3
Cell#5
Data#4
Cell#6
Data#5
Cell#7
Data#6
Cell#8
Cell#9
-> After the stuffing action all Data Blocks are placed one Cell more to the right (backward)
-> Data#0 is located in Cell#3 now instead of Cell #2, thus the pointer is increased by 1
166 (195)
New pointer value = 3
Data#1
Cell#m
Data#m
Data#m-1
NUHN:95-045 Uen
Data#m-2
Rev
b.) During Justification
Data#6 not ready for being placed into Cell#8. Data would be lost
due to Buffer Underflow.
-> A Payload Cell needs to be stuffed
Datum - Date
Problem :
Data#4
1998-06-01
Pointer value = 2
Data#2

Example 3 :
Speed of incoming data is too fast

-> Negative Justification needed
a.) Problem if no Justification would take place

Data#m-2
Cell#m
Data#m-1
Data#m
Pointer
Cell#0
Data#0
Cell#1
Data#1
Data#2
Cell#2
Cell#3
Data#3
Data#4
OH
Cell#4
Data#5
Cell#5
Data#6
Cell#6
Data#7
Cell#7
Data#8
Cell#8
Cell#9
Pointer
Cell#0
Data#0
Cell#1
Data#1
Data#2
Cell#2
Cell#3
Data#3
Cell#4
Data#4
OH
Data#5
Cell#5
Data#6
Cell#6
Data#7
Cell#7
Data#8
Cell#8
Cell#9
Pointer value = 2 (D-Bits inverted)

-> A specific OH Cell is used to carry the extra data
-> Data#4 is placed into Cell#5 now instead of Cell#6
c.) After Justification

Data#m-1
Cell#m
Data#m
Data#0
Pointer
Cell#0
Data#1
Cell#1
Cell#2
Data#3
Cell#3
Cell#4
Data#4
OH
Data#5
Cell#5
Data#6
Cell#6
Data#7
Cell#7
Data#8
Cell#8
Cell#9
-> After the justification action all Data Blocks are placed one Cell more to the left (forward)
-> Data#0 is located in Cell#1 now instead of Cell #2, thus the pointer is decreased by 1
167 (195)
New pointer value = 1
Data#2
Data#m
Cell#m
Data#m-1
NUHN:95-045 Uen
Data#m-2
Rev
b.) During Justification
Cell#5 not ready for Data#3. Data would be lost due to Buffer Overflow.
-> An auxiliary Payload Cell is needed
Datum - Date
Problem :
1998-06-01
Pointer value = 2
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
A.5
TU-12 Numbering in a VC-4
A.5.1
General
168 (195)
The numbering of the TU-12s within a VC-4 is a very important issue in order to be able to pick out the desired signals from the payload.
There are three different numbering schemes :
a) Systematic TU-12 numbering
b) Systematic VC-4 numbering
c) Structured numbering
All equipment in a network must follow the same numbering scheme or appropriate cross-reference tables have to be used.
A.5.2
Systematic TU-12 Numbering (ETSI)

In this numbering scheme the TU-12s are numbered in the logical order
how they are multiplexed into a VC-4.
i.e.
TU-12 #1
TUG-3 #1 - TUG-2 #1 - TU-12 #1
TU-12 #2
TUG-3 #1 - TUG-2 #1 - TU-12 #2
TU-12 #3
TUG-3 #1 - TUG-2 #1 - TU-12 #3
TU-12 #4
TUG-3 #1 - TUG-2 #2 - TU-12 #1
TU-12 #5
TUG-3 #1 - TUG-2 #2 - TU-12 #2
.... and so on ....
TU-12 #20
TUG-3 #1 - TUG-2 #7 - TU-12 #2
TU-12 #21
TUG-3 #1 - TUG-2 #7 - TU-12 #3
TU-12 #22
TUG-3 #2 - TUG-2 #1 - TU-12 #1
.... and so on ....
TU-12 #42
TUG-3 #2 - TUG-2 #7 - TU-12 #3
TU-12 #43
TUG-3 #3 - TUG-2 #1 - TU-12 #1
.... and so on ....
TU-12 #63
TUG-3 #3 - TUG-2 #7 - TU-12 #3
This is the numbering scheme recommended by ETSI.
See table Systematic TU-12 Numberingon page 170
A.5.3
Systematic VC-4 Numbering

In this numbering scheme the TU-12s are numbered in the physical order
how they are multiplexed into a VC-4.
i.e.
TU-12 #1
Columns #10, 73, 136, 199 of the VC-4
TU-12 #2
Columns #11, 74, 137, 200 of the VC-4
.... and so on ....
TU-12 #63
Columns #72, 135, 198, 261of the VC-4
See table Systematic VC-4 Numberingon page 171.
a
A.5.4
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
169 (195)
Structured Numbering
In this numbering scheme the TU-12s are numbered according to the multiplexing structure.
i.e.
TU-12 #1/1/1 TUG-3 #1 - TUG-2 #1 - TU-12 #1
TU-12 #1/1/2 TUG-3 #1 - TUG-2 #1 - TU-12 #2
.... and so on ....
TU-12 #3/7/3 TUG-3 #3 - TUG-2 #7 - TU-12 #3
This numbering scheme is unambiguous since it reflects the actual multiplexing of the TU-12s into the VC-4.
The structured numbering is included in the tables Systematic TU-12 Numberingon page 170 and Systematic VC-4 Numberingon page 171.
Those tables can be used as cross-references to convert between the different numbering schemes.
170 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Systematic TU-12 Numbering

TU-12 Numbering
Systematic
Structured
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
1/1/1
1/1/2
1/1/3
1/2/1
1/2/2
1/2/3
1/3/1
1/3/2
1/3/3
1/4/1
1/4/2
1/4/3
1/5/1
1/5/2
1/5/3
1/6/1
1/6/2
1/6/3
1/7/1
1/7/2
1/7/3
2/1/1
2/1/2
2/1/3
2/2/1
2/2/2
2/2/3
2/3/1
2/3/2
2/3/3
2/4/1
2/4/2
2/4/3
2/5/1
2/5/2
2/5/3
2/6/1
2/6/2
2/6/3
2/7/1
2/7/2
2/7/3
3/1/1
3/1/2
3/1/3
3/2/1
3/2/2
3/2/3
3/3/1
3/3/2
3/3/3
3/4/1
3/4/2
3/4/3
3/5/1
3/5/2
3/5/3
3/6/1
3/6/2
3/6/3
3/7/1
3/7/2
3/7/3
Mux Structure
TUG-3
TUG-2
1
TU-12
Multiplexed into
VC-4 Columns
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
10 , 73 , 136 , 199
31 , 94 , 157 , 220
52 , 115 , 178 , 241
13 , 76 , 139 , 202
34 , 97 , 160 , 223
55 , 118 , 181 , 244
16 , 79 , 142 , 205
37 , 100 , 163 , 226
58 , 121 , 184 , 247
19 , 82 , 145 , 208
40 , 103 , 166 , 229
61 , 124 , 187 , 250
22 , 85 , 148 , 211
43 , 106 , 169 , 232
64 , 127 , 190 , 253
25 , 88 , 151 , 214
46 , 109 , 172 , 235
67 , 130 , 193 , 256
28 , 91 , 154 , 217
49 , 112 , 175 , 238
70 , 133 , 196 , 259
11 , 74 , 137 , 200
32 , 95 , 158 , 221
53 , 116 , 179 , 242
14 , 77 , 140 , 203
35 , 98 , 161 , 224
56 , 119 , 182 , 245
17 , 80 , 143 , 206
38 , 101 , 164 , 227
59 , 122 , 185 , 248
20 , 83 , 146 , 209
41 , 104 , 167 , 230
62 , 125 , 188 , 251
23 , 86 , 149 , 212
44 , 107 , 170 , 233
65 , 128 , 191 , 254
26 , 89 , 152 , 215
47 , 110 , 173 , 236
68 , 131 , 194 , 257
29 , 92 , 155 , 218
50 , 113 , 176 , 239
71 , 134 , 197 , 260
12 , 75 , 138 , 201
33 , 96 , 159 , 222
54 , 117 , 180 , 243
15 , 78 , 141 , 204
36 , 99 , 162 , 225
57 , 120 , 183 , 246
18 , 81 , 144 , 207
39 , 102 , 165 , 228
60 , 123 , 186 , 249
21 , 84 , 147 , 210
42 , 105 , 168 , 231
63 , 126 , 189 , 252
24 , 87 , 150 , 213
45 , 108 , 171 , 234
66 , 129 , 192 , 255
27 , 90 , 153 , 216
48 , 111 , 174 , 237
69 , 132 , 195 , 258
30 , 93 , 156 , 219
51 , 114 , 177 , 240
72 , 135 , 198 , 261
171 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Systematic VC-4 Numbering

TU-12 Numbering
Mux Structure
Systematic
Structured
TUG-3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
1/1/1
2/1/1
3/1/1
1/2/1
2/2/1
3/2/1
1/3/1
2/3/1
3/3/1
1/4/1
2/4/1
3/4/1
1/5/1
2/5/1
3/5/1
1/6/1
2/6/1
3/6/1
1/7/1
2/7/1
3/7/1
1/1/2
2/1/2
3/1/2
1/2/2
2/2/2
3/2/2
1/3/2
2/3/2
3/3/2
1/4/2
2/4/2
3/4/2
1/5/2
2/5/2
3/5/2
1/6/2
2/6/2
3/6/2
1/7/2
2/7/2
3/7/2
1/1/3
2/1/3
3/1/3
1/2/3
2/2/3
3/2/3
1/3/3
2/3/3
3/3/3
1/4/3
2/4/3
3/4/3
1/5/3
2/5/3
3/5/3
1/6/3
2/6/3
3/6/3
1/7/3
2/7/3
3/7/3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
TUG-2
TU-12
Multiplexed into
VC-4 Columns
10 , 73 , 136 , 199
11 , 74 , 137 , 200
12 , 75 , 138 , 201
13 , 76 , 139 , 202
14 , 77 , 140 , 203
15 , 78 , 141 , 204
16 , 79 , 142 , 205
17 , 80 , 143 , 206
18 , 81 , 144 , 207
19 , 82 , 145 , 208
20 , 83 , 146 , 209
21 , 84 , 147 , 210
22 , 85 , 148 , 211
23 , 86 , 149 , 212
24 , 87 , 150 , 213
25 , 88 , 151 , 214
26 , 89 , 152 , 215
27 , 90 , 153 , 216
28 , 91 , 154 , 217
29 , 92 , 155 , 218
30 , 93 , 156 , 219
31 , 94 , 157 , 220
32 , 95 , 158 , 221
33 , 96 , 159 , 222
34 , 97 , 160 , 223
35 , 98 , 161 , 224
36 , 99 , 162 , 225
37 , 100 , 163 , 226
38 , 101 , 164 , 227
39 , 102 , 165 , 228
40 , 103 , 166 , 229
41 , 104 , 167 , 230
42 , 105 , 168 , 231
43 , 106 , 169 , 232
44 , 107 , 170 , 233
45 , 108 , 171 , 234
46 , 109 , 172 , 235
47 , 110 , 173 , 236
48 , 111 , 174 , 237
49 , 112 , 175 , 238
50 , 113 , 176 , 239
51 , 114 , 177 , 240
52 , 115 , 178 , 241
53 , 116 , 179 , 242
54 , 117 , 180 , 243
55 , 118 , 181 , 244
56 , 119 , 182 , 245
57 , 120 , 183 , 246
58 , 121 , 184 , 247
59 , 122 , 185 , 248
60 , 123 , 186 , 249
61 , 124 , 187 , 250
62 , 125 , 188 , 251
63 , 126 , 189 , 252
64 , 127 , 190 , 253
65 , 128 , 191 , 254
66 , 129 , 192 , 255
67 , 130 , 193 , 256
68 , 131 , 194 , 257
69 , 132 , 195 , 258
70 , 133 , 196 , 259
71 , 134 , 197 , 260
72 , 135 , 198 , 261
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
172 (195)
a
B
Appendix B
B.1
Abbreviations
173 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
APD
APDU
API
APId
APS
APT
Other
OSI
Other
ATM
PDH
SONET
Adaptation Function
Asynchronous Balanced Mode
Alternating Current
Access Control Field
Acknowledge
Alarm Cutoff
Association Control Service Element
Accepted Signal Label
Accepted Trace Identifier
Analogue-Digital Converter
Add Drop Multiplexer
Answer Detection Pattern
Application Entity
Alarm Event Criteria
Acceptable Emission Limits
Application Entity Title
Application Entity Qualifier
Authority and Format Identifier
Automatic Gain Control
Aggregate
Adapted Information
Alarm Interface Panel
Alarm Indication Signal
AIS Second
Acknowledged Information Transfer Service
Alarm
Automatic Laser Shutdown
American Advanced Mobile Phone System
Alternate Mark Inversion
American National Standards Institute
Access Point
Application Process
Aggregate Port
Avalanche Photodiode
Application Protocol Data Unit
Application Program Interface
Access Point Identifier
Automatic Protection Switching
Application Process Title
Transmission
SDH
A
A
ABM
AC
ACF
ACK
ACO
ACSE
AcSL
AcTI
ADC
ADM
ADP
AE
AEC
AEL
AET
AEQ
AFI
AGC
AGGR
AI
AIP
AIS
AISS
AITS
ALM
ALS
AMPS
AMI
ANSI
AP
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
174 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
BFW
Bi
BIB
BIF
BIP
BIP-X
BISYNC
Bit
Bit/s
BITS
BLER
BLIB
BLSR
Bipolar code with 3-Zero Substitution

Bipolar code with 8-Zero Substitution
Basic Activity Subset
Broadband Integrated Services Digital Network
Background Block Error
Background Block Error Ratio
Block Check Character
Basic Control Protocol
Backward Explicit Congestion Notification
Bit Error Rate
Basic Encoding Rules
Basic Frame Word
Biconic
Backward Indicator Bit
Backplane Interface
Bit-Interleaved Parity
Breaker Interface Panel
Bit-Interleaved Parity-X
Binary Synchronous Control
Binary Digit
Bits per Second
Building Integrated Timing Source
BLock Error Rate
Basic Infrastructure Library
Bidirectional Line-Switching Ring
Other
OSI
Other
ATM
SONET
Automatic Routing Component

Advanced Research Projects Agency
Automatic Repeat reQuest
Abstract Syntax
Automatic Switch Completed Count
Automatic Switch Completed Duration
American Standard Code for Information Interchange
Application Service Element
Application Specific Integrated Circuit
Abstract Syntax Notation One
Assignment Source Point
Automatic Switch request Count
Alarm Type
Asynchronous Transfer Mode
Administrative Unit-n
AU-n Connection Termination Point
Attachment Unit Interface
Attribute Value Change
SDH
ARC
ARPA
ARQ
AS
ASCC
ASCD
ASCII
ASE
ASIC
ASN.1
ASP
ASRC
AT
ATM
AU-n
AU-n CTP
AUG
AUI
AVC
B
B3ZS
B8ZS
BAS
B-ISDN
BBE
BBER
BCC
BCP
BECN
BER
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
175 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
BNF
BPV
BPVR
BRI
BSC
BSHR
BSN
BSU
BSS
BTL
C
C
C-n
CA
CAN
CAP
CAPI
CAS
CAT
CATV
CBDS
CBR
CBus
CCITT
CC
CCS
CCTPK
CCU
CD
CD-ROM
CDDI
CEM
CEPT
CFC
CFCAP
CI
CIR
Backus Naur Form

Bipolar Violation
Bipolar Violation Rate
Basic Rate Interface
Binary Synchronous Control
Bi-directional Self-Healing Ring
Backward Sequence Number
Bus Supply Unit
Base Station System
Bus Transceiver Logic
Connection Function
Container-n
Consequent Action
Controller Area Network
Customer Access Network
Change Application Procedure
Common Application Programmers Interface
Channel Associated Signalling
Craft Access Terminal
Corporate Antenna TeleVision
Connectionless Broadband Data Service
Constant Bit Rate
Control Bus
Consultative Committee International for Telegraphy
and Telephony (new : ITU-T)
Connect Confirm
Communication Controller
Common Channel Signalling
Circuit Pack
Central Clock Unit
Committee Draft
Compact Disk
Compact Disk Read Only Memory
Copper Distributed Data Interface
Common Equipment
Conference European de Poste et Telecommunications (or something like that)
Central Fault Collector
Central Fault Collector Application Process
Concatenation Indication
Characteristic Information
Communication Infrastructure
Command Interpreter
Committed Information Rate
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
176 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
CISC
CK
CLE
CLEI
CLFI
CLLI
CLK
CLLM
CLNP
CLNS
CM
CME
CMI
CMIP
CMNP
CMIS
CMISE
CMOS
CMT
CMU
CNet
CO
COM
COML
Comms
Config
CONP
CONS
COP
CP
CPC
CPG
CPK
CPU
CR
CRC(-x)
CS
CSA
CSES
Complex Instruction Set Computer

Clock
Customer-Located Equipment
Common Language Equipment Identifier
Common Language Facility Identifier
Common Language Location Identifier
Clock
Consolidated Link Layer Management Message
ConnectionLess Network layer Protocol
ConnectionLess Network layer Service
Configuration Management
Connection Matrix
Common Connection
Connection Management Entry
Coded Mark Inversion
Common Management Information Protocol
Connection-Mode Network Protocol
Common Management Information Service
Common Management Information Service Element
Complementary Metal-Oxide Semiconductor
Character Mode Terminal
Connection Matrix Unit
Communications Network
Convenience Object
Central Office
Common Connection
Communication Log
Communications
Configuration
Connection Oriented Network layer Protocol
Connection-Oriented Network Service
Card Out of Position
Connection Point
Conditional Package
Common Product Code
Circuit Pack Group
Circuit Pack
Central Processing Unit
Connection Request
Cyclic Redundancy Check (-x)
Connection Supervision
Circuit Switched
Compact Shelf
Carrier Serving Area
Consecutive Severely Errored Seconds
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
177 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
DCD
DCE
DCF
DCN
DCP
DCS
DCU
DDCMP
DDF
DDL
DDP
DDS
DEC
DECT
DEG
DEGTHR
DEMUX
DFB
D/I
DIN
DIP
DIS
DISC
DLC
DLCI
DLE
Data
Digital Audio Tape
Data Base
Decibel
dB relative to 1 Milliwatt
Data Block Handler
Direct Current
Data Communications Channel
Data Country Code
Data Carrier Detect
Data Communication Equipment
Data-Circuit terminating Equipment
Data Communication Function
Data Communications Network
Display and Control Panel
Defined Context Set
Display and Control Unit
Digital Data Common Message Protocol
Digital Distribution Frame
Data Definition Language
Datagram Delivery Protocol
Digital Distribution Panel
Digital Data Storage
Decrement
Digital European Cordless Telecommunications
Degraded
Degraded Threshold
Demultiplexer
Distributed Feedback
Drop/Insert
Deutsche Industrie Norm
Dual In-line Package
Draft International Standard
DISConnect
Data Link Control
Data Link Connection Identification
Data Link Escape
Other
OSI
Other
ATM
SONET
Critical Section Guard

Carrier Sense Multiple Access with Collision Detection
Client Server Relationship
Connection Termination
Connection Termination Point
Clear To Send
Code Violation
SDH
CSG
CSMA/CD
CSR
CT
CTP
CTS
CV
D
D
DAT
DB
dB
dBm
DBH
DC
DCC
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
178 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
DLPDU
DM
DMA
DME
DMS
DN
DOS
DPLL
DQDB
DRAM
DS
DS-n
DSAP
DSE
DSF
DSLCP
DSP
DSR
DTE
DTMF
DTR
DUART
DXC
DXI
E
E.164
EA
EB
EBC
EBER
EC
ECC
ECL
ECMD
ECN
ECP
ECSA
EDAC
EDC
EDCV
EDF
EEPROM
Data Link protocol Data Unit

Disconnect Mode
Dial Mode
Direct Memory Access
Distributed Management Environment
Digital Multiplex System
Distinguished Name
Disk Operating System
Digital Phase Locked Loop
Distributed Queue Dual Bus
Dynamic Random Access Memory
Defect Second
Digital Signal level n (USA Standard)
Destination Service Access Point
Data Switching Equipment (Router)
Dispersion Shifted Fibre
Dynamically Switched Link Control Protocol
Domain Specific Part
Data Set Ready
Data Terminal Equipment
Dual Tone Multiple Frequency
Data Terminal Ready
Dual Asynchronous Receiver/Transmitter
Digital Cross Connect
Data Exchange Interface
Standard Address Format for ISDN (ITU-T)
External Alarm
Errored Block
Errored Block Count
Excessive Bit Error Rate
Element Controller
Embedded Communications Channel
Embedded Control Channel
Emitter-Coupled Logic
European Computer Manufacturers Association
Embedded Control Network
Environmental Control Panel
Exchange Carrier Standards Association
Error Detection and Correlation
Error Detection Code
Error Detection Code Violation
Erbium Doped Fibre
Electrically Erasable and Programmable Read Only
Memory
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
179 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
EFD
EFS
EIA
EIU
ELM
EMC
EMF
EMI
EMS
ENet
EOC
EOM
EOW
EPLD
EPROM
EQ
EQF
EQP
ER
ERM
ES
ESA
ESD
ESI
ESP
ESQL
ESR
ESWD
ET
ETS
ETSI
ETX
EXC
EXCP
ExSL
EXT
ExTI
F
F_B
F_DS
F_EBC
Event Forwarding Discriminator

Error Free Second
End-of-Frame Sequence
Electronics Industries Association
Ethernet Interface Unit
Equipment Level Management
Electromagnetic Compatibility
Equipment Management Function
Electromagnetic Interference
Event Management System
Enhanced Network
Embedded Operations Channel
Electro-Optical Module
Engineering Order Wire
Electrical Programmable Logic Device
Erasable Programmable Read Only Memory
Equipment
Equipment Failure
Equipment
Entity Relationship
Entity Relationship Modelling
Electrical Section
End System
Errored Second
Event Sieve Agent
Electrostatic Discharge
External Synchronisation Interface
Electrostatic Protection
Enhanced Serial Port
Extended Standard Query Language
Errored Second Ratio
Electronic Software Delivery
Extra Traffic
Equipment Timing Source
European Telecommunications Standards Institute
End of TeXt
Excessive
Exception
Expected Signal Label
External
Expected Trace Identifier
Far-end Block
Far-end Defect Seconds
Far-end Errored Block Count
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
180 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
FAC
FAL
FAS
FC
FCC
FCS
FDDI
FE
FEBE
FEC
FECN
FEPROM
FERF
FEXT
FFOM
FIFO
FLB
FLS
FM
FNS
FOP
FOTS
FP
FPGA
FPPA
FR
FS
FTAM
FTP
FU
FW
FWDB
FWP
FWPUI
G
GDMO
GNE
GND
GPRS
GSM
GUI
Frame Alignment Control

FaCILITY
Frame Alignment Loss
Frame Alignment Signal
Ferrule Connector
Federal Communications Commission
Frame Check Sequence
Fibre Distributed Data Interface
Far End
Far End Block Error (Renamed as REI)
Forward Error Correction
Forward Explicit Congestion Notification
Flash Erasable Read Only memory
Far End Receive Failure (Renamed as RDI)
Far End Cross Talk
Fault Forwarding Object Manager
First In First Out
Fault Log Browser
Frame Loss Second
Fault Management
Frequency Modulation
Functional Model
Flexible Network Systems
Failure Of Protocol
Fibre-Optic Transmission System
Fabry-Perrot
Field Programmable Gate Array
Fibre Patch Panel Assembly
Frame Relay
Forced Switch
Frame Start
File Transfer, Access and Management
File Transfer Protocol
Functional Unit
Firmware
FibreWorld Database
FibreWorld Product
FibreWorld product User Interface
Guidelines for the Definition of Managed Objects
Gateway Network Element
Ground (electrical earth)
General Packet Radio Services
Global System for Mobile Communication
Graphical User Interface
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
x
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
181 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
HPTx
HRP
HS
HSCC
HSUT
HTCA
HTCT
HTCM
HU
HUG
HW
Hz
I
I
IC
ICD
ICN
ID
IDI
IDP
IEC
Intra-office
Integrated Circuit
International Code Designator
Internal Communication Network
IDentifier
Initial Domain Identifier
Initial Domain Part
Incoming Error Count
International Electrical Commission
Other
X
X
X
OSI
Other
SONET
PDH
ATM
HDLC
HDTV
HEC
HEX
Hi
HMI
HO
HOA
HOI
HOVC
HP
HPA
HPC
HPOM
HPP
HPT
Human Computer Interface

Higher order Connection Supervision
High Density Bipolar code with max. 3 consecutive
zeros
High level Data Link Control
High Definition TeleVision
Header Error Check
HEXadecimal
High
Human Machine Interface
Higher Order
Higher Order Assembler
Higher Order Interface
Higher Order Virtual Container
Higher order Path
Higher order Path Adaptation
Higher order Path Connection
Higher order Path Overhead Monitor
Higher order Path Protection
High Priority Traffic
High Performance Transmitter
Hypothetical Reference Path
High Speed
High-level Serial Communications Controller
Higher order path Supervisory Unequipped Termination
Higher order path Tandem Connection Adaptation
Higher order path Tandem Connection Termination
Higher order path Tandem Connection Monitor
Horizontal Unit
Higher order Unequipped Generator
HardWare
Hertz
Transmission
SDH
H
HCI
HCS
HDB3
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
182 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
IPC
IPCP
IPJC
IPL
IPX
IR
IS
ISDN
ISL
ISO
ISR
ISU
ITU-T
Other
OSI
Other
ATM
PDH
SONET
Institute of Electrical & Electronic Engineers

Interface
In Frame state
Interworking Functional Unit
Inter Integrated Circuit
Information Model
INCrement
Internal
Input/Output
Input
Internet Protocol
Interworking Protocol
Inter Process Communication
IP Control Protocol
Integrated Pointer Justification Count
Initial Program Loader
Internet Packet Exchange
Intermediate Regenerator
Intermediate System
International Standard
In Service
Integrated Services Digital Network
Initial System Loader
International Standardization Organization
Interrupt Service Routing
Incremental Software Update
International Telecommunication Union - Telecommunication Standardization Sector (old : CCITT)
Transmission
SDH
IEEE
I/F
IF
IFU
IIC
IM
INC
INT
I/O
I/P
IP
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
J
K
KAI
KAL
L
L
LAN
LAPB
LAPD
LAPM
LASER
LATA
LBC
LBO
LC
LCAP
Kernel Adaption Interface

Kernel Adaption Layer
Long-haul
Local Area Network
Link Access Procedure Balanced
Link Access Procedure on D-Channel
Link Access Procedure for Modems
Light Amplification by Stimulated Emission of RadiationX
Local Access and Transport Area
Laser Bias Current
X
Line Build Out
Link Connection
X
Local Craft Access Panel
X
X
X
X
X
X
X
X
X
X
X
183 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
LCD
LCN
LCP
LCS
LDF
LED
LI
LLC
LME
LO
LOA
LOC
LOF
LOI
LOM
LOP
LOS
LOT
LOVC
LOW
LP
LPA
LPC
LPOM
LPP
LPT
LPS
LR
LRF
LS
LSB
LSUT
LTCA
LTCT
LTCM
LTE
LTI
LUG
LX
LXC
Liquid Crystal Display

X
Loss of Cell Delineation
Local Communications Network
Link Control Protocol
Lower order Connection Supervision
Local Distinguished Form
Light-Emitting Diode
X
Length Indicator
Logical Link Control
Layer Management Entity
LockOut
X
Lower Order
Loss Of Alignment ; generic for LOF, LOM, LOP
Loss Of Communication
Loss Of Frame
Lower Order Interface
Loss Of Multiframe
Loss Of Pointer
Loss Of Signal
Local Operator Terminal
X
Lower Order Virtual Container
Local Orderwire
Lower order Path
Lower order Path Connection
Lower order Path Overhead Monitor
Lower order Path Protection
Lower order Path Termination
Low Priority Traffic
Line Protection Switching
Line Regenerator
Long Reach
Local Registration File
Low Speed
Least Significant Bit
X
Lower order path Supervisory Unequipped Termination
Lower order path Tandem Connection Adaptation
Lower order path Tandem Connection Termination
Lower order path Tandem Connection Monitor
Line Terminating Equipment
X
Loss of all incoming TIming references
Lower order Unequipped Generator
Local Exchange
Local Cross Connect
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
184 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
M
MAC
MAF
MAN
MARS
MAU
MBUS
MC
MCCC
MCCF
MCCO
MCEF
MCEQ
MCF
MCFA
MCFB
MCI
MCK
MCM
MCMC
MCNE
MCPO
MCPR
MCTG
MCTP
MCU
MD
MDU
MF
MFP
MFS
MH
MI
MIB
MIC
MIL
MIT
MMC
MMI
MMSB
MO
Medium Access Control

Management Application Function
Metropolitan Area Network
Message Access Routines
Medium Access Unit
Mediation Attachment Unit
Multistation Access Unit
Maintenance Bus
Matrix Connection
Main Controller
MCU Centralised Connection Task
MCU Configuration Database
MCU Connection Task
MCU Event Forwarding Discriminator Task
MCU Equipment Task
Message Communications Function
MCU Fault Task
MCU Fabric Task
MCU Connection Interface
Master Clock
Main Controller Module
MCU MCI Driver task
MCU Network Element Task
MCU Port task
MCU Protection task
MCU Timing Generator Task
MCU Termination Point Task
Management & Communication Unit
Mediation Device
Maintenance Display Unit
Mediation Function
Master Frame Pulse
Multi-Functional Peripheral
Multiframe Synchronisation
Map Handling
Management Information
Management Information Base
Maintenance Interface card
Management Interface Library
Management Information tree
MCU Memory card
Man Machine Interface
Multi-Master Serial Bus
Managed Object
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
185 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
MOC
MODEM
MOH
MOI
MON
MOS
MP
MPE
MPR
MRTIE
MS
MS-AIS
MS-RDI
MS-REI
MSA
MSB
MSOH
MSP
MST
MSTTP
MSVM
MTBF
MTIE
MTS
MTTR
MUX
mVOA
N
N_B
N_BBE
N_DS
N_EBC
NACK
NC
N.C.
NCK
NDF
NDF-C
NDSF
NE
Managed Object Class

Modulator/Demodulator
Maintenance Overhead Bus
Managed Object Instance
MONitored
Management Operating Software
Metal Oxide Semiconductor
Management Point
Maximum Permissible Exposure
Mapper
Maximum Relative Time Interval Error
Manual Switch
Multiplex Section
Multiplex Section Alarm Indication Signal
Multiplex Section Remote Defect Indication
Multiplex Section Remote Error Indication
Most Significant Bit
Multiplex Section Overhead
Multiplex Section Trail Termination Point
MCU Supervisory Module
Mean Time Between Failure
Maximum Time Interval Error
Master Timing Source
Mean Time To Repair
Multiplexer
Miniature Variable optical Attenuator
Near-end Block
Near-end Background Block Error
Near-end Defect Seconds
Near-end Errored Block Count
Non Acknowledge
Network Component
Network Connection
Normally Closed
Not Connected
Network Clock
New Data Flag
New Data Flag Count
Non Dispersion Shifted Fibre
Network Element
Near End
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
186 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
NEBS
NEF
NEXT
NFS
NLC
NLR
NMA
NMON
NMS
NNE
NNI
NO
NPDU
NPI
NRM
NRZ
NS
NSA
NSAP
NSC
NSDU
NSF
NSS
NTP
NU
NUM
NVL
NVS
O
OAM
OAM&P
OAU
OBA
OBIC
OC(-N)
OCN
ODP
OF
OFC
OFS
OH
OHA
OHB
Network Equipment Building System

Network Element Function
Near End Cross Talk
Network File System
Network Level Controller
Network Layer Relay
Network Monitoring and Analysis
Not MONitored
Network Management System
Non-SDH Network Element
Network Node Interface
Normally Open
Network Protocol Data Unit
Null Pointer Indication
Normal Response Mode
Non Return to Zero
Network Service
Non Service Affecting
Network Layer Service Access Point
Network Surveillance Centre
Network Service Data Unit
Non-Specific Form
Network Surveillance System
Northern Telecom Publication
National Use
Non-Urgent
Network Upgrade Manager
Non Valid Load
Non Volatile Storage
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Operation, Administration and Maintenance

X
Operation, Administration, Maintenance & Provisioning X
Overhead Access Unit
Optical Booster Amplifier
Overhead Bus Interface Controller
Optical Carrier (-N)
Object Creation Notification
Originator Detection Pattern
Optical Distribution Panel
Optical Fibre
X
Out-of-Frame Count
Out-of-Frame Second
OverHead
OverHead Access
OverHead Bus
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
187 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
OHDS
OHZB
OM
OMO
OOF
OOL
OOS
OP
OPA
OPC
O/P
OOS
ORM
ORS
OS
OSF
OSI
OSIE
OSS
OTM
OW
OWCM
OWD
OWI
OWU
P
PA
PABX
PAIS
PAD
PAI
PAPI
PBA
PC
PCB
PCM
PCS
PCV
PDH
PDR
Online Help and Documentation System

OverHead Z Bus
Object manager
Observed managed Object
Out Of Frame
Out Of Limits
Out Of Service
Optical Power
Optical Post Amplifier
Operations Controller
Output
Out Of Service
Optical Receive Module
Object Registration Service
Optical receive Signal
Operating System
Optical Section
Operations System Function
Open Software Foundation
Open Systems Interconnection
OSI Environment
Operations Support System
Optical transmit Module
Order Wire
OrderWire Control Module
OrderWire and Data
OrderWire Interface Unit
OrderWire Access Unit
Precision Architecture
Private Automatic Branch Exchange
Path Alarm Indication Signal
Packet Assembler / Disassembler
Protocol Address Information
Privileged Application Programmers Interface
Printed Board Assembly
Personal Computer
Private Circuit
Patch Cord
Printed Circuit Board
Pulse Code Modulation
Plesiochronous Connection Supervision
Parity Code Violation
Plesiochronous Digital Hierarchy
Performance data Reporting
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
188 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
PDU
PE
PEC
PES
PI
PID
PJC
PJE
PLL
PLM
P-Loop
PLS
PM
PMO
PMP
PO
POH
POM
POTS
PP
PPDU
PPC
PPI
PPITTP
PPL
PPP
PPU
PRBS
PRBSx
PRC
PRI
PROM
Protocol Data Unit

Parity Error
Product Engineering Code
Parity Errored Second
Physical Interface
Primary Input
Process Identification
Pointer Justification Count
Pointer Justification Event
Phase Locked Loop
PayLoad Mismatch
Path Label Mismatch
Protection Loop
Physical Layer Signalling
Performance Management
Performance Monitoring
Path Management
Payload manager
Post Master
Proxy managed Object
Performance Monitoring Point
Primary Output
Path OverHead
Passive Optical Module
Path Overhead Monitor
Proxy Object Manager
Plain Old Telephone Service
Physical Port
Pointer Processing
Path Protection
Presentation Protocol Data Unit
PDH Path Connection
Plesiochronous Physical Interface
Plesiochronous Physical Interface Trail Termination
Point
Point-to-Point Link
Point to Point Protocol
Pointer Processing Unit
Pseudo Random Binary Signal
PRBS with a repetition rate of 2x-1
Primary Reference Clock
Primary Rate Interface
Programmable Read Only Memory
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
189 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
PSAP
PSC
PSD
PSE
PSES
PSN
PSPDN
PSTN
PSU
PT
PTE
PTR
PU
PUPS
PVC
PWM
PWR
Q
Q3
QOS
QOSV
R
RA
RAI
RAM
RAU
RCU
Rcv
RDBMS
RDI
RDN
RDP
REGEN
REI
REJ
REL
RETA
RETB
Other
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
OSI Compliant Management Interface

Quality Of Service
Quality Of Service Violation
Receiving Attention
Remote Access
Random Access Memory
Rack Alarm Unit
Remote Concentrator Unit
Receive
Relational Database management System
Remote Defect Indication (Former FERF)
Relative Distinguished Name
Requirements Development Plan
Regenerator
Remote Error Indication (Former FEBE)
Reject
Release
Return Leads of Battery A
Return Leads of Battery B
OSI
Other
ATM
PDH
SONET
Packet Switched
Presentation Selector
Protection Switching
Power Supply
Presentation Service Access Point
Protection Switch Count
Protection Switch Duration
Protection Switch Event
Parity Severely Errored Second
Packet Switched Network
Public Switched Packet Data Network
Public Switched Telephone Network
Power Supply Unit
Protection Switch Unit
Path Termination
Path Trace
Path Terminating Equipment
PoinTeR
Peripheral Unit
Point-of-Use Power Supply
Permanent Virtual Circuit
Pulse Width Modulation
Power
Transmission
SDH
PS
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
190 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
RIB
RISC
RNR
RNT
ROM
ROSE
ROT
RP
RPC
RPS
RR
RS
RSOH
RST
RSTTP
RTC
RTM
RTS
RX
RxSL
RxTI
S
S
SA
SABM
SABME
SAP
SAPI
SAR
SARM
SASE
SAW
SC
SCC
SCI
SCSI
SCU
SD
SDH
Short-haul
Section Adaption
Service Affecting
Set Asynchronous Balanced Mode
Set Asynchronous Balanced Mode Extended
Service Access Point
Service Access Point Identifier
Segmentation and Reassembly
Set Asynchronous Response Mode
Stand Alone Synchronising Equipment
Surface Acoustic Wave
Subscriber Connector
Serial Communications Controller
Synchronous Connection Interface
Small Computer System Interface
Switch Controller Unit
Signal Degrade
Structured Design
Synchronous Digital Hierarchy
Other
Other
OSI
ATM
PDH
SONET

Rack Fuse Panel
Remote Information
Routing Information
Routing Information Base
Reduced Instruction Set Computer
Receive Not Ready
Remote Network Telemetry
Read Only Memory
Remote Operations Service Element
Remote Operator Terminal
Remote Point
Remote Procedure Call
Ring Protection Switching
Receive Ready
Regenerator Section
Regenerator Section Overhead
Regenerator Section Trail Termination Point
Real Time Clock
Ready To Manufacture
Request To Send
Receive (Direction)
Received Signal Label
Received Trace Identifier
Transmission
SDH
RFI
RFP
RI
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
191 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
SDLC
S/DMS
SDP
SDTH
SDU
SDXC
SEC
SEFS
SEL
SELV
SEMF
SES
SESR
SETG
SETPI
SETS
SF
Sk
SHR
SI
SIA
SIG bus
SIHW
SILA
SIM
SIRPIT
SIU-N
SL
SLAT
SLE
SLM
SLX
SM
SMA
SMDS
SMF
SMFA
SMN
SMO
SMS
SMUX
SMX
SNAP
Synchronous Data Link Control

SDH/Digital Multiplex System
Severely Disturbed Period
Signal Degrade Threshold
Service Data Unit
Synchronous Digital Cross Connect
SDH Equipment Clock
Severely Errored Frame Second
Select, Selector
Safety Extra Low Voltage
Synchronous Equipment Management Function
Severely Errored Second
Severely Errored Second Ratio
Synchronous Equipment Timing Generator
Synchronous Equipment Timing Physical Interface
Synchronous Equipment Timing Source
Signal Fail
Sink
Self Healing Ring
Secondary Input
Station Interface Area
Signalling Bus
SIU Hardware Driver
SIU Laser Driver
Service Interface Module
Serial In Transmit Parallel In Transmit
STM-N Optical Interface Unit
Signal Label
System Line-up and Test
Synchronous Line Equipment
Signal Label Mismatch
Synchronous Line Multiplexer
Security Management
Section Management
Single Mode
System management Application
Switched Multi-megabit Data Service
Sub-MultiFrame
Specific Management Functional Area
SDH Management Network
System Managed Object
SDH Management Sub-network
Synchronous Multiplexer
Synchronous Multiplexer
Sub-Network Access Protocol
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
192 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
SNC/S
SNPA
SNRM
SNRME
So
SO
SOH
SOM
SONET
SP
SPDU
SPE
SPI
SPRING
SQL
Src
SS
SS7
SSAP
SSD
SSF
SSM
SSMB
SSU
ST
STE
STM(-N)
STM-Nc
STP
STS(-N)
SU
SVC
SVID
S/W
SW
Other
OSI
X
X
Other
X
X
ATM
PDH
SONET
SNC/N
Sub-Network Connection
Sub-Network Connection Protection
Inherently monitored Sub-Network Connection Protection
Non-intrusively monitored Sub-Network Connection
protection
Sublayer (tandem connection) monitored Sub-Network
Connection protection
Sub Network Point of Attachment
Set Normal Response Mode
Set Normal Response Mode Extended
Source
Secondary Output
Section Overhead
System Object Manager
Synchronous Optical NETwork (USA Standard)
Shelf Processor
Session Protocol Data Unit
Synchronous Payload Envelope
Shared Protection Ring
Standard Query Language
Source
Session Selector
Signalling System #7
Source Service Access Point
Server Signal Degrade
Server Signal Fail
Synchronisation Status Messaging
Synchronisation Status Message Byte
Synchronisation Supply Unit
Straight Connector
Section Terminating Equipment
Synchronous Transport Module (-N)
Concatenated STM-N
Shielded Twisted Pair
Synchronous Transport Signal (-N)
Standard Unit
Support Unit
Switched Virtual Circuit
Switched Virtual Connection
System V Interface Definition
SoftWare
SoftWare
Switch
Transmission
SDH
SNC
SNCP
SNC/I
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
193 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
SWERR
SYNC
T
TAU
TAM
TBM
TCB
TCI
TCM
TCP
TD
TDM
TEI
Temp
TF
TFAS
TGIF
Thru
TI
TIM
TIU
TM
TMN
TNV
TOH
TOP
TP
TPI
TPmode
TPBA
TPDU
TRBL
Trib
TS
TSA
TSAP
Software Error
Synchronisation
X
X
Termination Access Unit

Traffic Access Module
Transport Bandwidth Manager
Transmission Circuit Board
Tributary Connection Interface
Tandem Connection Monitoring
Termination Connection Point
Transmission Control Protocol
Transmit Degrade
Time Division Multiplex
Terminal Endpoint Identifier
Temperature
Transmission Fail
Traffic Fail
(Trail) Trace identifier Frame Alignment Signal
Timing Generator Interface
Through
Timing Information
Trace Identifier Mismatch
Traffic Interface Module
Tributary Interface Unit
Terminal Multiplexer
Transmux
Telecommunications Management Network
Telecommunication Network Voltages
Transport OverHead
Transport Overhead Processor
Termination Point
Timing Point
Tributary Port
Transport Class
Tributary Protection Interface
Termination point mode
Transmission Printed Board Assembly
Transport Protocol Data Unit
Trouble
Tributary
Time Slot
Transport Selector
Tributary Synchronisation
Time Slot Assignment
Transport Service Access Point
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
194 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
UITS
UNEQ
Unexp
UNI
UPS
USCC
USCD
USHR
USR
USRC
UTC
UTP
V
VC
VC-n
VCnTTP
VCI
VCXO
Urgent
Urgent Alarm
Universal Asynchronous Receiver/Transmitter
UnAvailable Second
UnAvailable Time
Unit Interval
Unnumbered Information
User Interface
Unnumbered Information Transfer Service
UNEQuipped
Unexpected
User Network Interface
Uninterruptible Power Supply
User Switch Complete Count
User Switch Complete Duration
Uni-directional Self-Healing Ring
User channels
User Switch Request Count
Universal Time Coordinated
Unshielded Twisted Pair
Virtual Channel
Virtual Connection
Virtual Container
Virtual Container-n
VC-n Trail Termination Point
Virtual Channel Identifier
Voltage Controlled Crystal Oscillator
Other
OSI
X
X
Other
X
X
ATM
PDH
SONET
Trail Signal Degrade

Trail Signal Fail
Timeslot Interchange
Trail Signal Label
Transport Services Shelf
Trail Termination function
Trail Termination supervisory function
Transport Terminal Function
Trail Trace Identifier
Transistor-Transistor Logic
Trail Termination Point
Tributary Unit-n
Tributary Unit Group (-N)
Transmit (Direction)
Transmitted Signal Label
Transmitted Trace Identifier
Transmission
SDH
TSD
TSF
TSI
TSL
TSS
TT
TTs
TTF
TTI
TTL
TTP
TU-n
TUG(-n)
TX
TxSL
TxTI
U
U
UA
UART
UAS
UAT
UI
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
195 (195)
Datum - Date
Rev
1998-06-01
NUHN:95-045 Uen
Source
VDU
VF
VLSI
VO
VOA
VP
VPI
VRC
VT
VTG
VTx
VU
VUE
W
W
WAN
WLAN
WS
WTR
X
X.11
X.25
XH
XMP
XTI
XOS
Xmt
XOW
Y
Z
Video Display Unit

Voice Frequency
Very Large Scale Integration
Verification Office
Variable Optical Attenuator
Virtual Path
Virtual Path Identifier
Vertical Redundancy Check
Virtual Tributary
Virtual Terminal
Virtual Tributary Group
Virtual Tributary x
Vertical Unit
Visual User Environment
X
X
X
Working
Wide Area Network
Wireless Local Area Network
WorkStation
Wait-To-Restore
X
X
X
X
ISO data communication standard

ISO data communication standard
Exception Handler
X/Open Management Tool
X/Open Transport Interface
Extended Operating System
Transmit
Express Orderwire
Other
OSI
Other
ATM
SONET
SDH
Transmission
PDH
Description
General
Abbrev
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X

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INTERNAL INFORMATION

SDH - Basics (Introduction)

Verantwortlich - Subject Responsible

Dokumentnr - Document no.

NEOR3 Fritz Schmocker

NEOR3 Fritz Schmocker

Freigabe - Doc Respons/Approved

NEOS (Ernst Rohrbach)

Dokumentnr - Document no.

Revision History .......................................................................

PDH / SDH - Multiplexing / Mapping Structure .............................

PDH Signals ............................................................................

SDH Signals ............................................................................

Short Introduction To PDH ...............................................................

PDH Multiplexing Structure .....................................................

Primary Multiplexing (Overview) ...................................................

Primary Multiplexing / Pulse Code Modulation (PCM) ..............

The Human Voice ........................................................................

Higher Order Multiplexing .......................................................

SDH Functional Blocks ......................................................................

Functional Block Diagram ........................................................

Transport Terminal Function (TTF) ................................................

Dokumentnr - Document no.

SDH Functional Blocks Applied on Multiplexing Structure ........

SDH Logical Functions Applied on Multiplexing Structure .........

SDH Multiplexing / Mapping for 2 MBit/s .......................................

Container C-12 .......................................................................

Structure of C-12 ........................................................................

Virtual Container VC-12 ..........................................................

Structure of VC-12 ......................................................................

Tributary Unit TU-12 ................................................................

Structure of TU-12 ......................................................................

Tributary Unit Group TUG-2 ....................................................

Structure of TUG-2 ......................................................................

Tributary Unit Group TUG-3 (TUG-2 Structure) .......................

Structure of TUG-3 (TUG-2 Structure) .........................................

Virtual Container VC-4 (TUG Structure) ..................................

Structure of VC-4 (TUG Structure) ..............................................

Dokumentnr - Document no.

Administrative Unit AU-4 ........................................................

Structure of AU-4 ........................................................................

Administrative Unit Group AUG ..............................................

Structure of AUG .........................................................................

SDH Multiplexing / Mapping for 34 MBit/s ....................................

Container C-3 .........................................................................

Structure of C-3 ...........................................................................

Virtual Container VC-3 ............................................................

Structure of VC-3 ........................................................................

Tributary Unit TU-3 .................................................................

Structure of TU-3 .........................................................................

Tributary Unit Group TUG-3 (TU-3 Structure) .........................

Structure of TUG-3 (TU-3 Structure) ............................................

Virtual Container VC-4 ............................................................

VC-4 Path Overhead (Higher Order POH) ....................................

Structure of VC-4 ........................................................................

Administrative Unit AU-4 ........................................................

Administrative Unit Group AUG ..............................................

SDH Multiplexing / Mapping for 140 MBit/s ..................................

Container C-4 .........................................................................

Structure of C-4 ...........................................................................

Virtual Container VC-4 (C-4 Structure) ...................................

Structure of VC-4 (C-4 Structure) ................................................

Dokumentnr - Document no.

Jitter [* Part of next Rev. of Document *] ....................... 149