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Data Sheet
July 1999
60A, 60V
Related Literature
Symbol
rDS(ON) = 0.030
Temperature Compensating PSPICE Model
Ordering Information
RFG60P06E
PACKAGE
TO-247
3989.3
Features
PART NUMBER
File Number
BRAND
G
RFG60P06E
Packaging
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
DRAIN
(BOTTOM
SIDE METAL)
4-154
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999.
RFG60P06E
Absolute Maximum Ratings
TC = 25oC
RFG60P06E
-60
-60
20
60
Refer to Peak Current Curve
Refer to UIS Curve
2
UNITS
V
V
V
A
215
1.43
-55 to 175
W
W/oC
oC
300
260
oC
oC
KV
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
BVDSS
ID = 250A, VGS = 0V
-60
VGS(TH)
-2
-4
-1
-50
100
nA
IDSS
IGSS
rDS(ON)
Turn-On Time
tON
td(ON)
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
VDS = -60V,
VGS = 0V
TC = 25oC
TC = 150oC
VGS = 20V
ID = 60A, VGS = -10V
0.030
125
ns
20
ns
tr
60
ns
td(OFF)
65
ns
tf
20
ns
125
ns
450
nC
225
nC
tOFF
Qg(TOT)
VGS = 0 to -20V
Qg(-10)
VGS = 0 to -10V
Qg(TH)
VGS = 0 to -2V
15
nC
7200
pF
1700
pF
325
pF
Input Capacitance
CISS
Output Capacitance
COSS
CRSS
VDD = -48V,
ID = 60A,
RL = 0.8
RJC
0.70
oC/W
RJA
80
oC/W
MAX
UNITS
SYMBOL
VSD
trr
TEST CONDITIONS
MIN
TYP
ISD = 45A
1.5
125
ns
NOTES:
2. Pulse test: pulse width 300s maximum, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4-155
RFG60P06E
Unless Otherwise Specified
1.2
-70
1.0
-60
ID , DRAIN CURRENT (A)
0.8
0.6
0.4
0.2
-50
-40
-30
-20
-10
0
0
0
25
50
75
100
125
TC , CASE TEMPERATURE (oC)
150
25
175
50
75
100
125
150
175
ZJC, NORMALIZED
THERMAL IMPEDANCE
1
0.5
0.2
PDM
0.1
0.1
0.05
t1
t2
0.02
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC x RJC + TC
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
10-1
t , RECTANGULAR PULSE DURATION (s)
100
101
-103
-500
-100
100s
1ms
-10
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
TC = 25oC
-1
-1
10ms
100ms
DC
VDSS MAX = -60V
-10
4-156
-60
VGS = -10V
TC = 25oC
-100
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-50
10-5
10-4
10-3
10-2
10-1
100
101
RFG60P06E
Typical Performance Curves
(Continued)
-200
-120
-100
STARTING TJ = 150oC
If R = 0
tAV = (L) (IAS) / (1.3RATED BVDSS - VDD)
VGS = -8V
VGS = -7V
-90
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
TC = 25oC
VGS = -10V
-60
VGS = -6V
-30
VGS = -4.5V
VGS = -5V
If R 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
-10
0.01
0.1
1
tAV, TIME IN AVALANCHE (ms)
0
10
175oC
-90
25oC
-60
-30
-6
-8
1.0
0.5
-2
-4
-6
-8
-10
-80
-40
1.0
0.5
-40
40
80
120
160
200
4-157
80
120
160
200
2.0
1.5
0
-80
40
2.0
NORMALIZED GATE
THRESHOLD VOLTAGE
-4
2.0
-55oC
VDD = -15V
PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX
-2
NORMALIZED ON RESISTANCE
-120
VGS = -20V
STARTING TJ = 25oC
ID = -250A
1.5
1.0
0.5
0
-80
-40
40
80
120
160
200
RFG60P06E
Unless Otherwise Specified
(Continued)
8000
VDS , DRAIN TO SOURCE VOLTAGE (V)
-10
-60
CISS
6000
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGS
4000
COSS
2000
CRSS
0
0
-5
-10
-15
-20
-5.0
-30
-15
20
-7.5
RL = 1.0
IG(REF) = -4mA
VGS = -10V
-25
VDD = BVDSS
VDD = BVDSS
-45
0.75 BVDSS
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
0.50 BVDSS
0.25 BVDSS
IG(REF)
t, TIME (s)
IG(ACT)
80
-2.5
IG(REF)
IG(ACT)
VARY tP TO OBTAIN
REQUIRED PEAK IAS
RG
0V
VGS
VDD
DUT
tP
VDD
IAS
IAS
VDS
tP
0.01
BVDSS
tOFF
td(OFF)
td(ON)
VDS
tr
RL
tf
10%
10%
VGS
VDS
VDD
90%
90%
VGS
DUT
10%
RGS
50%
VGS
4-158
50%
PULSE WIDTH
90%
RFG60P06E
Test Circuits and Waveforms
(Continued)
VDS
RL
VDS
Qg(TH)
0
VGS = -2V
VGS
Qg(-10)
DUT
VGS = -10V
-VGS
VDD
VGS = -20V
VDD
Ig(REF)
Qg(TOT)
0
IG(REF)
4-159
RFG60P06E
PSPICE Electrical Model
RFG60P06E
2 1 3;
REV 9/20/94
CA 12 8 1.01e-8
CB 15 14 1.05e-8
CIN 6 8 6.9e-9
ESG
10
DBODY 5 7 DBDMOD
DBREAK 7 11 DBKMOD
DPLCAP 10 6 DPLCAPMOD
8
6
DRAIN
5
+
LDRAIN
RDRAIN
DPLCAP
EBREAK 5 11 17 18 -76.35
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 5 10 8 6 1
EVTO 20 6 8 18 1
VTO
LGATE
EVTO
RGATE
9
GATE
20
18
8
DBREAK
CIN
8
S1A
LSOURCE
RSOURCE
7
S2A
13
8
S1B
DBODY
11
MOS1
6
RIN
12
+
17
18
MOS2
21
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 7.9e-9
LSOURCE 3 7 4.18e-9
EBREAK
16
.SUBCKT
14
13
13
CA
15
17
S2B
SOURCE
18
RVTO
CB
+
6
EGS
8
RBREAK
+
EDS
IT
14
5
8
19
VBAT
+
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 -0.83
.MODEL DBDMOD D (IS=1.24e-12 RS=4.72e-3 TRS1=1.43e-3 TRS2=-4.91e-7 CJO=6.98e-9 TT=1.5e-7)
.MODEL DBKMOD D (RS=1.11e-1 TRS1=1.34e-3 TRS2=4.46e-12)
.MODEL DPLCAPMOD D (CJO=15e-10 IS=1e-30 N=10)
.MODEL MOSMOD PMOS (VTO=-3.71 KP=31.5 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=9.42e-4 TC2=0)
.MODEL RDSMOD RES (TC1=5.85e-3 TC2=7.69e-6)
.MODEL RVTOMOD RES (TC1=-3.39e-3 TC2=1.07e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=4.6 VOFF=2.6)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.6 VOFF=4.6)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=1.16 VOFF=-3.84)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.84 VOFF=1.16)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; written by William J. Hepp and C. Frank Wheatley.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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