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fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
I.
INTRODUCTION
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10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
isp (t )
i p (t ) ilm (t )
n
iLo (t ) icf (t )
(3)
(b)
(c)
Fig. 2. Equivalent circuit depicting the different intervals of operation of the
proposed microinverter.
I Lo (td 1 ) I Lo _ peak
I p _ peak I Lm (t td 1 )
n
(5)
( DTs )
I p _ peak
Lm
Lo
(7)
I s 2 (t d 1 )
n
n
The magnetizing inductance LM starts charging the flying
capacitor from initial value of Vcf_min. Switch current is2 and
output inductor current iLo are given as
I
v (t )
V
(8)
is 2 (t ) p _ peak o (t td 1 ) cf2 (t td 1 )
n
Lo
n Lm
1
(9)
vcf (t ) Vcf _ min
icf dt
Cf
iLo (t ) I Lo _ peak
V0
t td 1
L0
(a)
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(10)
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
Lo
d2
Lo
d2
(16)
I lm (Ts ) I lm (td 0 ) nI Lo (Ts )
The inverter operation is repeated at switching frequency with
a variable duty cycle D to generate a rectified sine output.
Once the reference load current is negative, switches S1 and S3
are tuned-off, and the switches S2, S4 are turned-on.
B.
V
V
0 2 o DTs
L
n
Lm
0
V0
V
2 o
L
n
Lm
0
(12)
Vo
td 2 DTs
Lo
(13)
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
I ds2 (t c1 ) I s 2 (t c1 )
I p _ peak
(23)
V
n 2Vin
( DTs )
I p (tc 0 ) in
I p _ peak
Lm
Lo
(24)
I s 2 (tc1 )
n
n
Output voltage of Vo is applied across the inductor Lo and the
inductor current decreases linearly given by
V
(25)
i Lo (t ) I Lo _ peak o t DTs
Lo
Flying capacitor voltage VCf appears across the magnetizing
inductance, but the average voltage across the output capacitor
and the flying capacitor is equal for given switching cycle
(<Vcf> = < Vo>). Thus, for higher values of flying capacitance,
vcf is approximately equal to the output voltage V0 thus the
current in flying capacitor Icf increases linearly with a slope
Vo/(n2Lm) thus expression for switch current can be given as
I p _ peak V0
V
(26)
i (t )
(t t ) 0 (t t )
s2
L0
c1
n 2 Lm
c1
(28)
I p _ peak
V
V
I p (t c 0 ) n
(1 DTs ) 0 2 0
L0 n Lm
n
(29)
B. Input capacitor
While the power output of the microinverter is time varying,
the input power from PV panel must be maintained constant at
average value to increase the energy harvest. Thus a large
capacitor needs to be connected across PV panel to balance
this difference. Voltage ripple due to insufficient capacitance
has a significant impact on the MPPT performance and to
maintain MPPT efficiency at 99% the maximum voltage
ripple allowed is limited to 5% [1].
Cin
Pin
2fVin Vin
(31)
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http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
Vo
Dn
Vin 1 D
(35)
LM
c1
LM
c1
Lm f s
Vcf f s
H. AC filter design
The output inductor Lo value can be determined based on
maximum allowable current ripple in the inverter using
nVin D
(41)
L
o
2 Lo C o
I. Active-clamp
When the main switch Sm is turned-off, a voltage spike
appears across it due to the energy stored in the leakage
inductance of transformer. This will necessitate use of
overrated switches and will reduce the inverter efficiency.
Instead, an active-clamp with a small auxiliary switch (Sac)
and a series capacitor as shown in Fig. 5 can be added. The
active-clamp eliminates turn-off spike and recycle the parasitic
energy back to the inverter. This improves the inverter
efficiency by limiting the device voltage.
IV.
EXPERIMENTAL RESULTS
Secondary Switches
S1,S2,S3 and S4
Flying Capacitor Cf
Parameters
4 Electrolytic capacitors of 4700 F,
50 V in parallel
IRF4115pbf,150 V; 104 A; Rdson = 9.3 m
2 coil craft transformers JA4635-AL in
parallel
Leakage inductance Llk = 0.138 H
Magnetising inductance Lm = 28 H
Turns ratio 1:6:6
IPP65R125C7; 700 V; 75 A; Rdson = 125
m
0.64 F, 400 V HF film capacitor
AC filter Inductor L0
5 mH, 5 A
AC Filter Capacitor C0
Transformer
If s
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
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(a)
(b)
quite low and no snubber is added across the switch. From Fig
8(a), THD in this operating condition is observed to be 3.58%.
Observations similar to Fig. 7 have been noticed in Fig. 8
confirming the inverter operation at different input voltage.
Fig. 9 shows the experimental results at 50% load (110 W)
for Vin = 30 V. It should be observed that the THD in the
current waveform for this case is higher than 5% limit
(5.52%). This is due to the open loop feed-forward control,
which is optimized for full load. Closed loop control may
reduce the THD to acceptable limits.
DCM mode of operation is obtained for the proposed
microinverter at 20 kHz [25]. Fig. 10 and 11 presents
theoretical loss distributions for zeta microinverter in CCM
and DCM modes, respectively, at different load conditions. It
should be observed from Fig. 10 and 11 that at any load
conditions the losses in CCM zeta microinverter are lower
than DCM counterpart for the given specifications (low
voltage high current input, high voltage boost ratio). This can
be explained by considering RMS to average current ratio. At
any value of given power transfer, RMS current through the
components under DCM mode is be higher than CCM mode.
Fig. 12 shows the theoretical efficiency curves for both
DCM and CCM modes along with experimental CCM
efficiency curve. It should be noted that the CCM efficiency is
higher than DCM under all load conditions. There is a
significant improvement in efficiency (nearly 8%) in CCM
mode compared to DCM mode. Experimental CCM efficiency
curve closely follows theoretical efficiency curve.
(c)
(d)
(e)
Fig. 7. Experimental results for Vin = 30 V at full load of 220 W (a) Output voltage Vac and current Iac (x axis: 5 ms/div). (b) Gate to source voltage Vgsm and drain
to source voltage Vdsm of Sm and current through switch Sm at line frequency (x axis: 2 ms/div). (c) Voltage Vp across transformer primary and current Ip at line
frequency (x axis: 2 ms/div) (d) Gate to source voltage Vgsm and drain to source voltage Vdsm of Sm and current through switch Sm at switching frequency (x axis: 2
s/div). (e) Voltage Vp across transformer primary and current Ip at switching frequency (x axis: 2 s/div).
2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
(a)
(b)
(c)
(d)
(e)
Fig. 8. Experimental results for Vin = 48 V at full load of 220 W (a) Output voltage Vac and current Iac (x axis: 5 ms/div). (b) Gate to source voltage Vgsm and drain
to source voltage Vdsm of Sm and current through switch Sm at line frequency (x axis: 2 ms/div). (c) Voltage Vp across transformer primary and current Ip at line
frequency (x axis: 2 ms/div) (d) Gate to source voltage Vgsm and drain to source voltage Vdsm of Sm and current through switch Sm at switching frequency (x axis: 2
s/div). (e) Voltage Vp across transformer primary and current Ip at switching frequency (x axis: 2 s/div).
(a)
(b)
(d)
(c)
(e)
Fig. 9. Experimental results for Vin = 30 V at half load of 110 W (a) Output voltage Vac and current Iac (x axis: 5 ms/div). (b) Gate to source voltage Vgsm and drain
to source voltage Vdsm of Sm and current through switch Sm at line frequency (x axis: 2 ms/div). (c) Voltage Vp across transformer primary and current Ip at line
frequency (x axis: 2 ms/div) (d) Gate to source voltage Vgsm and drain to source voltage Vdsm of Sm and current through switch Sm at switching frequency (x axis: 2
s/div). (e) Voltage Vp across transformer primary and current Ip at switching frequency (x axis: 2 s/div).
2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
8
current stress. Traditional CCM mode flyback inverters have
closed loop complexity and stability issues. The proposed
inverter provides HF isolation and has only a single switch
operating at HF which will reduce the switching losses. The
circuit is simple and easy to develop. Critical factors to
consider while designing the inverter have been discussed and
studied. A 220 W inverter prototype has been developed and
tested in the laboratory to validate the claims, proposed
operation and design. The laboratory prototype has a peak
efficiency of 93% at rated power of 220 W.
REFERENCES
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
Fig. 12. Plot of efficiency versus normalized power for CCM and DCM
operation.
V.
[14]
[15]
[16]
2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/JESTPE.2015.2438012, IEEE Journal of Emerging and Selected Topics in Power Electronics
9
[17]
[18]
[19]
[20]
[21]
[22]
[23]
[24]
[25]
[26]
[27]
[28]
Dr. Rathore is a winner and recipient of 2013 IEEE IAS Andrew W Smith
Outstanding Young Member Award and 2014 Isao Takahashi Power
Electronics Award.
2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.