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Lab Record
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PROGRAM STARTUP
Creating a Project:
The following procedure allows you to create single or multiple new projects (multiple
projects can be open simultaneously). Each projects filename must be unique.
The information for a project is stored in a single project file (*.pjt).
Step 1: In lab it is installed Code Composer Studio in C:\CCStudio_3.1, create a folder called
(project name) in the C:\CCStudio_3.1\myprojects folder.
Step 2: From the Project menu, choose New. The Project Creation wizard window displays.
Step 3: In the Project Name field, type the name you want for your project.
Step 4: In the Location field, specify the directory where you want to store the project file,
Object files generated by the compiler and assembler are also stored here. You can type the
full path in the location field or click the browse
button and use the choose directory dialog box.
Step 5: In the Project Type field, select a Project Type from the drop-down list. Choose either
Executable (.out) or Library (lib). Executable indicates that the project generates an
executable file. Library indicates that you are building an object library.
Step 6: In the Target field, select the target family that identifies your CPU. This information
is necessary when tools are installed for multiple targets.
A project file called projectname.pjt is created. This file stores all files and project settings
used by your project.
Step 1: Select Project Add Files to Project, or right-click on the projects filename in the
Project View window and select Add Files.
Step 2: In the Add Files to Project dialog box, specify a file to add. If the file does not exist in
the current directory, browse to the correct location. Use the Files of Type drop-down list to
set the type of files that appear in the File name field.
Step 3: Click Open to add the specified file to your project. Paths followed for adding files
are:
C:\CCStudio_3.1\C2400\cgtools\lib\ directory and add the rts2xx.lib file
Step4: Also create a new file for the program and save as the program name.asm or .c
depending on the program and add it in the project.
Step 5: Add F2407.h file from the desktop to the folder project name created in step 1 of
project creation.
Thus the project is now ready for programming and it can be interfaced with the kit by JTAG
and .out file is loaded with this CC Studio and output can be seen through ports of the kit.
Date:
Objective:
To write a program to add numbers using immediate addressing mode.
Equipments required:
Hardware:
PC
TMS320LF2407A
Power supply adaptor cable
DB25 connector printer cable
Software:
Code composer studio 3.1.
Windows 95/98/NT/XP.
PROGRAM:
.def_c_int0
.include f2407.h
.text
_c_int0
LACC #0FDDFh
ADD #0DA0Fh
END B END
RESULT:
ACC
CARRY FLAG
Date:
Objective:
To write a program to add numbers using direct addressing mode .
Equipments required:
Hardware:
PC.
TMS320LF2407A.
Power supply adaptor cable.
DB25 connector printer cable.
Software:
RESULT:
Value before execution
ACC
0000H
0F009H
LOCATION 8000h
672DH
0003H
CARRY FLAG
Date:
PC
TMS320LF2407A.
Power supply adaptor cable.
DB25 connector printer cable.
Software:
code composer studio 3.1
Windows 95/98/NT/XP.
PROGRAM:
.def_c_int0
.include f2407.h
.text
_c_int0
LDP #100h
SPLK #0FDDFh, 8010h
LACC #0DA0Fh
LARP 01
LAR AR1, #8010H
ADD *+
END B END
RESULTS:
ACC
8010h
AR1
Date:
FLOW CHART:
Start
Decrement count
Count=0
Y
End
PROGRAM:
.def _c_int0
.include f2407.h
.text
_c_int0
Start:
`
MAR *, AR1
LAR AR1,#300H
LACC #256
Loop:
SPLK #25H,*+
SUB #1
BCND LOOP,NEQ
B START
RESULT:
AR1
0x300
.
.
0x3FF
Date:
Objective:
Equipments required:
Hardware:
PC
TMS320LF2407A
Power supply adaptor cable
DB25 connector printer cable
Software:
Code composer studio 3.1.
Windows 95/98/NT/XP.
Algorithm:
1. Start
2. Load AR0 with the memory address which contains the data to be multiplied.
3. Load AR1 with the memory address which contains the data to be multiplied.
4. Store the data at location pointed by AR0 into TREG register.
5. Multiply the data
6. Store the data in the accumulator
7. Move the data from accumulator to the required memory location
PROGRAM #1:
.def _c_int0
.include f2407.h
.text
_c_int0
LDP #4
SPLK #10,0209H
LT 9
MPY #0031H
END B END
RESULT:
Value before execution
0FDDFH
9011H
FFFFH
FFFFFFFFH
ACC
209h
TREG
PREG
PROGRAM #2:
.def _c_int0
.include f2407.h
.text
_c_int0
LAR AR0, #250h
LTA *, AR0
MAR *, AR1
LAR AR1, #290h
LTA *, AR0
MPY *, AR1
PAC
MAR *AR3
LAR AR3, #300h
SACL *+, AR3
SACH *, AR3
RESULT:
250h
290h
TREG
PREG
Dates:
Objective: To write a program to generate the pulses on port A using general purpose I/O.
Equipments Required:
Hardware:
PC
TMS320LF2407A
Power supply adapter cable
DB25 connector printer cable
Software:
Windows 95/98/NT/XP
Code Composer studio 3.1
Registers Involved:
SCSR1: System control and status register
MCRA: Mux Control register A
PADATDIR: PortA data and direction control register
Algorithm:
1. Start
2. Configure SCSR1 for required clock prescalar.
3. Configure MCRA for secondary function of the GPIO pins.
4. Configure PADATDIR in order to make the I/O pins as output pins.
5. Send High Signal on port A
6. Call Delay
7.
8. Call delay
9. Go to step 5
Delay Calculation:
PWM Frequency required = 10 KHz
Duty Cycle = 50%
Total Time Period = 100s
On Time = 50sec
FLOWCHART:
Start
PROGRAM:
.def _c_int0
.include f2407.h
.text
_c_int0
NOP
LDP #DP_PF2
SPLK #0FF00H,MCRA
Connection Diagram:
Output Waveform:
RESULT:
Pulses are generated on Port A by configuring it as an output port.
Date:
Objective: To generate asymmetric PWM pulses of 10 kHz of 75% duty cycle under
continuous up count mode & active high condition.
Equipments Required:
Hardware:
PC
TMS320LF2407A
Power supply adapter cable
DB25 connector printer cable
Software:
Windows 95/98/NT/XP
Code Composer 3.1
Solution:
SPLK #0000 0110 0000 1101b,SCSR1
bit 15
0:
reserved
bit 14
0:
CLKOUT=CPUCLK
bit 13-12
00:
bit 11-9
bit 8
0:
reserved
bit 7
0:
bit 6
0:
bit 5
0:
bit 4
0:
bit 3
1:
bit 2
1:
bit 1
0:
reserved
bit 0
1:
0:
reserved
bit 14
0:
T2STAT,read only
bit 13
0:
T1STAT,read only
bit 12-11
00:
reserved
bit 10-9
00:
bit 8-7
00:
bit 6
1:
bit 5-4
00:
reserved
bit 3-2
00:
bit 1-0
10:
reserved
bit 12-11
bit 10-8
bit 7
bit 6
bit 5-4
bit 3-2
bit 1
bit 0
0:
Asymmetric PWM:
TxPR =
1=
1 = 499 = (1F3h)
FLOWCHART
PROGRAM:
.def_c_int0
.include f2407.h
.text
_c_int0
NOP
LDP #224
SPLK #060CH,SCSR1
LDP #0E1H
SPLK #0FFFFH,MCRA
SPLK #0FFFFH,MCRC
LDP #0E8H
SPLK #0000H,T1CNT
SPLK #01F3H,T1PR
SPLK #007CH,T1CMPR
SPLK #0042H,GPTCONA
SPLK #9142H,T1CON
END B END
Waveform:
RESULT: An asymmetric PWM pulse of 10 kHz and 75% duty cycle is obtained.
Inferences:
For getting 75% duty cycle PWM pulse with active high condition the compare register
should be loaded with one-fourth the period register value.
Date:
Objective:
To write a program to generate PWM pulses of frequency 1 kHz using full compare units.
Equipments Required:
Hardware:
PC
TMS320LF2407A
Power supply adapter cable
DB25 connector printer cable
Software:
Windows 95/98/NT/XP
Code Composer studio 3.1
Algorithm:
Step1: Start.
Step2: Configure SCSR1 register as required so as to enable clock for EVA module.
Step3: Configure pins to operate in primary function using MCRA instruction.
Step4: Initialize timer counter value to zero.
Step5: Set up and load ACTR
Step6: Set up and load DBTCON, if dead band is to be used.
Step7: Initialize CMPR1
Step8: Set up and load COMCON without enabling compare operation.
Step9: Set up and load COMCON to enable compare operation.
Step10: Set up and load T1CON to start the operation.
Step11: Rewrite CMPRx with newly determined values.
Step12: end
In the following program up counting mode of the timer 1 has been used.
Registers Involved:
CPUCLK=10MHz
PRESCALER=2. This is set by bits 10-8 of T1CON
T1PR=10000
T1PR register is to be loaded as follows-
TxPR=
= = (1387h)
CMPR1= 2499 = (09C3)h For 50% duty cycle CMPR1 value will be half of T1PR
GPTCONA = 004Ah
Enable all GP Timer Compare outputs and polarity of GP Timer1 and GP Timer2
compare outputs to active High
T1CON=(9142)h
Select Continuous Up counting mode, set input pre-scalar to 1,select internal clock, enable
timer operation and program the counter to stop immediately on emulation suspend.
MCRA = 0FFFh
Configure all the pins to operate in primary function.
ACTRA = 0AAAh
Select action on all compare output pins to be active high.
COMCONA = 4A00h
Disabling Compare operation, reload compares register immediately & disable SVPWM
mode and reload action control register immediately, enable PWM output pins.
COMCONA = CA00h
Enabling Compare operation and all remaining bits remain same as configured as above.
FLOWCHART:
START
Start
Set data page to DP_PF2 & configure port pins to operate in primary function
Set T1PR register & Set compare register unit for required duty cycle
Configure Compare Control Register without enabling compare operation i.e., to 04A00h
Configure Compare Control Register with enabling compare operation i.e., to 0CA00h
End
PROGRAM:
.def _c_int0
.include f2407.h
.text
_c_int0
NOP
LDP #DP_PF1
SPLK #0605H, SCSR1
LDP #DP_PF2
SPLK #0FFFFH, MCRA
LDP #0E8H
SPLK #0000H, T1CNT
SPLK #004AH, GPTCONA
SPLK #1387H, T1PR
SPLK #09C3H, CMPR1
SPLK #0AAAH, ACTRA
SPLK #4A00H, COMCONA
SPLK #0CA00H, COMCONA
SPLK #9142H, T1CON
END
B END
To check the square wave output on the oscilloscope, the following connections should be
made:
Each Compare Unit has two outputs namely PWM1 and PWM2. If COMPARE unit 1 is used
we check the output at pins 9 and 19 (ground) for PWM1 signal and for another signal namely
PWM2 pins 10 and 20(ground) are to be connected to the C.R.O.
Output Waveform:
RESULT:
PWM pulses of 50% duty cycle are generated using full compare unit.
Inferences:
If Timer1 period register T1PR value is set to value 4999 and compare unit value is set to
2500 and hence PWM pulses of 50% duty cycle will be generated
Date:
Objective:
To write a program to generate PWM pulses of frequency 20 kHz using GPT timer compare
units.
Equipments Required:
Hardware:
PC
TMS320LF2407A
Power supply adapter cable
DB25 connector printer cable
Resistors 100 (0.5W),330 (0.5 W),1K (10W)
Capacitor 0.33 uf
MOSFET (IRF 840)
Optocoupler IC TLP250
Bread board, DC power supply and connecting wires
Software:
Windows 95/98/NT/XP
Code Composer studio 3.1
Algorithm:
Step1: Start.
Step2: Configure SCSR1 register as required so as to enable clock for EVA module.
Step3: Configure pins to operate in primary function using MCRA instruction.
Step4: Initialize T1PR for 20 kHz frequency.
Step5: set T1CNT to zero.
Step6: Set T1CMPR for 50%duty cycle.
Step7: Configure GPTCONA for active high pulse.
Step8: Configure T1CON for continuous up count mode
Step9: Wait till the PWM is generated
Step10: repeat the process
In the following program up counting mode of the timer 3 has been used.
Registers Involved:
T1PR
Enable all GP Timer Compare outputs and polarity of GP Timer1 compare outputs to
active High
T1CON=9142h
Select Continuous Up counting mode, set input pre-scalar to 1,select internal clock, enable
timer operation and program the counter to stop immediately on emulation suspend.
MCRA = 0FFFFh
Set data page to 225 & configure MCRA to operate in primary function
End
PROGRAM:
.def _c_int0
.include f2407.h
.text
_c_int0
NOP
LDP #224
SPLK #060CH,SCSR1
LDP #0E1H
SPLK #0FFFFH,MCRA
SPLK #0FFFFH,MCRC
LDP #0E8H
SPLK #0000H,T1CNT
SPLK #0F9H,T1PR
SPLK #007CH,T1CMPR
SPLK #0042H,GPTCONA
SPLK #9142H,T1CON
LOOP B LOOP
CIRCUIT DIAGRAM
Hardware Setup:
Output Waveforms:
RESULT:
A symmetric PWM pulse of 20 kHz of 50% duty cycle is obtained and tested on type A
chopper with R load
Date:
Objective
To write a program to generate PWM pulses for a single phase inverter using
DSP F2407 and to verify it experimentally.
Equipments Required
Hardware:
PC
TMS320LF2407A
Power supply adapter cable
+5V power supply for the DSK, converted to 3.3V for the 2407 CPU
DB25 connector printer cable
Optocoupler IC : TLP250
Mosfet: IRF840
Bread board, DC power supply and wires
Software:
Windows 95/98/NT/XP
Code Composer studio 3.1
Algorithm
Step1: Start.
Step2: Configure SCSR1 register as required so as to enable clock for EVA module.
Step3: Configure pins to operate in primary function using MCRA instruction.
Step4: Initialize timer counter value to zero.
Step5: Set up and load ACTR
Step6: Set up and load DBTCON, to use a dead band of 1s
Step7: Initialize CMPR1
Step8: Set up and load COMCON without enabling compare operation.
Step9: Set up and load COMCON to enable compare operation.
Step10: Set up and load T1CON to start the operation.
Step11: Rewrite CMPRx with newly determined values.
Step12: End
In the following program up counting of timer 1 has been used.
Registers Involved
SCSR1: 060Ch
The clock prescalar is selected as 2 and the EVA module is enabled.
Fin is the CPU clock frequency = 10 MHz
MCRA = 0FFFFh
Configure all the pins to operate in primary function.
T1PR=186A0h
T1PR register is to be loaded as follows
=
=
= = ()
CPUCLK=10MHz
PRESCALER=2 This is set by bits 10-8 of T1CON
T1CON=9142H
Select Continuous Up counting mode , select internal clock , enable timer operation and
program the counter such that its operation is not affected by emulation suspend.
CMPR1= 09C4H
For 50% duty cycle CMPR1 value will be half of T1PR.
CMPR2= 09C4H
For a deadband of 240s
GPTCONA = 004AH
Enable all GP Timer Compare outputs and polarity of GP Timer1 and GP Timer2 compare
outputs to active high.
ACTRA = 0012H
Select action on compare1 output, PWM1 as active high and compare2 output, PWM2 as
active low.
COMCONA = CA00h
Enabling Compare operation and all remaining bits remain same as configured as above.
PROGRAM:
.def _c_int0
.include f2407.h
.text
_c_int0
NOP
LDP #DP_PF1
SPLK# 060CH, SCSR1
LDP#DP_PF2
SPLK# 0FFFFH, MCRA
LDP# 0E8H
SPLK# 0000H, T1CNT
SPLK# 004AH, GPTCONA
SPLK# 1387H, T1PR
SPLK #0FF4H, DBTCONA
SPLK# 09C4H, CMPR1
SPLK# 09C4H, CMPR2
SPLK# 0012H, ACTRA
SPLK# 0CA00H, COMCONA
SPLK# 9142H, T1CON
LOOP B LOOP
; No Operation
; Set data page
; Set SCSR1
; Port A configured for primary function
; Counter initialized
; Global enable for timers
; Setting the required frequency
; Enabling dead band
; 50% duty cycle PWM
; Setting the required dead band
; Active high logic for PWM1 and active low for
PWM 2
; Enabling compare units
; Continuous up count mode
CIRCUIT DIAGRAM
HARDWARE SETUP
OUTPUT WAVEFORMS
Fig (d): Output of the Single Phase Inverter with dead band
RESULT:
A program to generate PWM pulses for a single phase inverter with dead band using DSP
F2407 is written and the same is verified experimentally.
Inference:
This experiment is performed to get PWM output of frequency 50 Hz and 50% duty cycle
which can be used as the switching pulses for a single phase Inverter. The frequency of the
pulses can be varied by adjusting the value of period register, T1PR and pre scalar values in
T1CON and SCSR1 registers. To select the logic level of PWM output from compare actions,
the value in ACTRA is configured. Instead of using a deadband registers, 2 compare registers
are configured to get a deadband of 240 s.
Date:
Objective: To generate PWM pulses using MATLAB/CCS interface and F28335 kit.
Equipments Required:
Hardware:
PC
TMS320LF28335A
Power supply adapter cable
+5V power supply for the DSK, converted to 3.3V for the 28335 CPU
DB25 connector printer cable and USB.
Software:
Windows 95/98/NT/XP
Code Composer studio 3.3
Algorithm:
Step1: Open MATLAB2009b and check for CCS board info.
Step2: Create a new model in Simulink
Step3: In this model place the block F28335eZdsp from Simulink library. This can be done
as Target support package- supported processors- Texas instruments- C2000Target Preferences- F28335eZdsp
Step4: Now add two ePWM block to this model from Simulink library. This can be done as
Target support package- supported processors- Texas instruments- chip
support- C28x3x- ePWM
Step5: Now change the simulation time to inf and go to the configuration parameters of
simulation and change Type as Fixed step and solver as discrete (no continuous
state) and uncheck the Limit data points to last option. Then click apply and OK.
Step6: SAVE the model.
Step7: Start Incremental build.
Step2: Enable ePWM1A and set the compare value and do the same for ePWM1B block
also.
Step3: Now initialize deadband block for ePWM1A block and set the property Poles of
deadband delay as Positive and its period value as 512.
Step4: Repeat the steps1-3 for ePWM2 block also and in step3 change the property Poles of
deadband delay as Negative.
Step5: Save the project and do Incremental build and connect two probes to pin 9-19 and 1120 of P8 of the F28335eZDSP kit and observe the waveform on DSO.
Output Waveform:
Date:
Algorithm:
Step1: Open MATLAB 2009b and check for ccsboardinfo.
Step2: Create a new model in Simulink
Step3: In this model place the block F28335eZdsp from Simulink library. This can be done
as Target support package- supported processors- Texas instruments- C2000Target Preferences- F28335eZdsp
Step4: Now add one ADC block to this model from Simulink library. This can be done as
Target support package- supported processors- Texas instruments- chip supportC28x3x- ADC
Step5: Now change the configuration parameters of simulation and change Type as Fixed step
and solver as discrete (no continuous state) and uncheck the Limit data points to last
option. Then click apply and OK.
Step6: SAVE the model.
Step7: Start Incremental build.
Step 5: To get the ADC conversion result go to, GEL menu and select ADC Result
register of the corresponding pin to which signal was given.
Step 6: To verify the result, use the below equation,
Input Analog Voltage ADCLO
3
For analog signal greater than3V, Digital value = 4095
Digital Value = 4096 x
NOTE: While giving the ADC signal care should be taken so that the maximum
value of the signal should never exceed the maximum permissible value of the DSP
(3.3V).
RESULT:
ADC was implemented using MATLAB/CCS interface and F28335 kit. The
result was verified by applying an input DC voltage of 1.58V.
Inference:
For, input DC voltage of 1.58V, the corresponding hex value is 870h. It is
observes that the MSB of the ADC result obtained is a junk value and can be avoided
since the maximum permitted value for the ADC result register is 1000h.