3.

4 Load Flow Analysis for Case 2

(Steady State with Capacitors at Bus 2)
3.4.1 Introduction, Admittance and Power Data
This study case will analyse the system under normal
loading condition. All three power transformers TRM1, TRL3A and
TRL3B are on-line, all loads of PE 2 plants are running and with
power factor correction capacitors is on-line. Voltages, currents,
power and power factor will be determined for each of the 6
switching steps scenario.
Bus 1 which is the generator bus is the swing bus where
the voltage will be 1/00 p.u. Active and reactive power will be
calculated from this bus. Bus 2, bus 3 and bus 4 are the load bus
where voltage will be calculated. An automatic switching 6 x
300kVAR Power Factor Correction Capacitors are connected to bus
2.
Table 3.24 Summary of Bus properties for study Case 1
Bus
Bus 1
Bus 2
Bus 3
Bus 4

TYPE
Generator Bus
Load Bus with Cap
Load Bus
Load Bus

Known
V1 /10=1/00 p.u
P and Q
P and Q
P and Q

Chapter 3-Load Flow Analysis-Case 2

Unknown
P and Q
V2 /20
V3 /30
V5 /40

Page 161

Bus 1 V1
y12 =0.993428-j32.339275
Bus 2

S2=P2+jQ2
y =0.434825-j4.361626
S2=0.5582+ j0.332 23
Bus 3

V2
y24=0.438818j4.3716651 Q3=0.3
To 1.8
Bus 4 V
4

V3

S3=P3+jQ3
S3=0.118437+j0.072

S4=P4+jQ4
S4=0.103948+j0.06

Figure 3.12 Admittance network for Case 2

From Chapter 2, values of the admittance are summarized on table
3.25.
Table 3.25 Summary of Admittances
y12

Admittances Values (mho p.u)

0.959989-j32.341297

y23

0.693282-j4.206570

y24

0.695415-j4.203698

From Chapter 2, power schedule is summarized on table 3.26.

Table 3.26 Scheduled of Power

Bus No
S2
S3
S4
Q2

Bus
Bus
Bus
Bus

2
3
4
2

P (MW)
5.58210
0.8946
0.7898
-

Q
(MVAR)
3.31997
0.54898
0.48099
0.3 to 1.8
capacitive

Chapter 3-Load Flow Analysis-Case 2

P (p.u)
@
10MVA
base
0.558210
0.08946
0.07898

Q (p.u)
@
10MVA
base
0.331997
0.054898
0.048099
0.03 to
1.8
Page 162

3.4.2. Bus Voltage Calculation

Derivation of voltage equations
Bus no. 2

6.9kV Bus V2

At bus 2 by KCL,

Current flowing into the bus 2 from bus 1 and considering

transformer tap aTRM1 of TRM1 using equation 3.2.6:

I12 y12 (V1

V2
aTRM1

Currents flowing out of from bus 2 bus 3 and considering

transformer tap aTRL3A of TRL3A using equation 3.2.6:

I23 y23 (V2

V3
aTRL3A

Currents flowing out of from bus 2 bus 4 and considering

transformer tap aTRL3B of TRL3B using equation 3.2.6:

I24 y24 (V2

V4
aTRL3B

And current due to power out of the bus 2:

S*
2

V2*

The current injected from the capacitor bank

Scap j

Qcap
V2*

By KCL, vector sum of currents in to the bus 2 equals vector sum of

current out of the bus 2.
y12 (V1

V3
) y23 V2
aTRM1
a
TRL3A

V2

V4
y24 V2
a
TRL3B

Scap *
S*
2
*
*
V2
V2

Arranging the current equation yields a non-linear equation for

voltage V2.
Chapter 3-Load Flow Analysis-Case 2

Page 163

 S*
2
V2*

V2 aTRM1

S*
cap

y12V1 y23

V2*

V3

aTRL3A

y24

V4

aTRL3B

y12 y23 y24

If we let V2(k) be the initial estimate of voltage V2 then the iterative

equation V2(k+1) will be

S*2 S*cap

12 V1 y23

V2*(k)

V2(k 1) aTRM1

V3(k)

aTRL3A

y24

y12 y23 y24

V4(k)

aTRL3B

Equation (3.3.2)

Bus 3 MCC8 480V bus V3

At bus 3 by KCL,

Current flowing into the bus 3 using equation 3.2.6:

I23 y23 (V2

V3
aTRL3A

And current due to power out of the bus 3:

S*
3
V3*
By KCL, vector sum of currents in equals vector sum of current out
of the bus 3.

V3
y23 V2
aTRL3A

S*
3
V3*

Arranging the current equation yields a non-linear equation for

voltage V3.

S*
3
V3 aTRL3A

V3*

y23 V2
y23

If we let V3(k) be the initial estimate of voltage V3 then the iterative

equation V3(k+1) will be
Chapter 3-Load Flow Analysis-Case 2

Page 164

 S*

3
V3(k 1) aTRL3A
V2(k)
y V *(k)

23 3

Equation (3.3.4)

Bus 4 MCC9 480V bus V4

At bus 3 by KCL,

Current flowing into the bus 4 using equation 3.2.6:

I24 y24 (V2

V4
aTRL3B

And current due to power out of the bus 4:

S*
4

V4*

By KCL, vector sum of currents in equals vector sum of current out

of the bus 4.

V4 S*
4
y24 V2
aTRL3B V4*

Arranging the current equation yields a non-linear equation for

voltage V4.

S*4

V4*
V4 aTRL3B

y24 V2
y24

If we let V4(k) be the initial estimate of voltage V4 then the iterative

equation V4(k+1) will be

S*

4
V4(k 1) aTRL3B
V2(k)
y V *(k)

24 4

Equation (3.3.6)

In summary, the following equations derived from the

above admittance network will be used to calculate for the bus
voltages.

Chapter 3-Load Flow Analysis-Case 2

Page 165

S*
2 j Q cap
V2(k 1) aTRM1

V2*(k)

y12 V1 y 23

V3(k)
aTRL3A

y 24

V4(k)
aTRL3B

y12 y 23 y 24

Equation (3.3.2)

S*

3
V3(k 1) aTRL3A
V2(k)
y V *(k)

23 3

Equation (3.3.4)

S*

(k)
4

aTRL3B
V2
y V *(k)

24 4

Equation (3.3.6)

V4(k 1)

Gauss-Siedel Iteration for bus voltage

Bus voltage estimates at
V2(0)= V3(0)= V4(0)= 1/00 V p.u
and V1(k)= 1/00 V p.u (for all values of k)
For TRM1, TRL3A and TRL3B,
tap=+ 2.5% (0.95, 0.975, 1.0, 1.025, 1.05)
Transformer taps (Primary) are selected at nominal value
aTRM1=1; aTRL3A=1; aTRL3B=1
Complex power values from table 3.3.3
S2=0.558210 + j 0.331997 p.u
S3=0.08946 + j 0.054898p.u
S4=0.07898+ j 0.048099 p.u
QCAP= 0.03 pu
Taking the conjugates of the complex power
S2*=0.558210 - j 0.331997 p.u
S3*=0.08946 - j 0.054898p.u
S4*=0.07898 - j 0.048099 p.u

Chapter 3-Load Flow Analysis-Case 2

Page 166

Admittance values from table 3.3.2

y12=0.959989-j32.341297 p.u
y23=0.693282-j4.206570 p.u
y24=0.695415-j4.203698 p.u
(y12 + y23 + y24) = 2.348687-j40.751566 pu
k=0, 1st iteration
For V2(1) using equation 3.3.2

*
S*
2 jQcap

V2(1) aTRM1

V2*(0)

y12 V1 y23

V3(0)

aTRL3A

y24

V4(0)

aTRL3B

y12 y23 y24

0.558210 + j 0.331997* j0.03*

0.959989 - j32.341297 1
1
V2(1) 1

2.348687 - j40.751566
2.348687 - j40.751566

V2(1)

0.693282 - j4.2065701 0.695415 - j4.203698 1

2.348687 - j40.751566

= 0.991826-j0.013226 p.u

For V3(1)

S*

3
V3(1) aTRL3A
V2(0)
y23V*(0)

(0.0894638 j0.0548985)*

V3(1) 1
1

1(0.693282 - j4.206570)
V3(1) = 0.983882-j0.018611p.u

For V4(1)

S*

4
V4(1) aTRL3B
V2(0)
y24 V*(0)

Chapter 3-Load Flow Analysis-Case 2

Page 167

 (0.0789849 j0.0480991)*
V4(1) 1
1
0.695415 - j4.2036981
V4(1) = 0.985837-j0.016446 p.u

k=1, 2nd iteration

For V2(2) using equation 3.3.2
S*2 jQcap
V3(1)
V4(1)

y
V

y
12 1
23
24
V2*(1)
aTRL3A
aTRL3B
y12 y23 y24
*

V2(2) aTRM1

0.558210 + j 0.331997* j0.03*

V2(2) 1

2.348687 - j40.751566

0.959989 - j32.341297 1
2.348687 - j40.751566

0.693282 - j4.2065700.983882 - j0.018611

2.348687 - j40.751566

0.695415 - j4.2036980.985837 - j0.016446

V2(2)

00.990935 - j0.014447*

2.348687 - j40.751566

= 0.988826-j0.017198 p.u

For V3(2)

S*

3
V3(2) aTRL3A
V2(1)
y V *(1)

23 3

V3(2)

(0.0894638 j0.0548985)*

1(0.693282 - j4.206570)0.983882 - j0.018611*

0.991826 - j0.013226

V3(2) = 0.975093-j0.031826 p.u

For V4(2)

S*

4
V4(2) aTRL3B
V2(1)
y V *(1)

24 4

Chapter 3-Load Flow Analysis-Case 2

Page 168

0.695415 - j4.2036980.985837 - j0.016446*

0.991826 - j0.013226

V4(2) 1

(0.0789849 j0.0480991)*

V4(2) = 0.977186-j0.029665 p.u

Calculating the errors
Calculating the real term error (ereal) and imaginary term
error (eimaginary) of voltages between the first iteration and the
second iteration
V2(1) = 0.991826-j0.013226 p.u
V2(2) = 0.988826-j0.017198 p.u
ereal =|0.991826-0.988826| =0.0030002 (>1x10-6)
eimaginary =|0.013226 - 0.017198| =0.0039714 (>1x10-6)

V3(1) = 0.983882-j0.018611 p.u

V3(2) = 0.975093-j0.031826 p.u
ereal =|0.983882-0.975093| =0.008789 (>1x10-6)
eimaginary =|0.018611 - 0.031826 | =0.0132152 (>1x10-6)

V4(1) = 0.985837-j0.016446 p.u

V4(2) = 0.977186-j0.029665 p.u
ereal =|0.985837-0.977186| =0.008650 (>1x10-6)
eimaginary =|0.016446 - 0.029665 | =0.013218 (>1x10-6)

Since all errors are still greater than 1x10-6 then further
iterations are required until the errors are less than 1x10-6 in which
case the solution is said to converge to the correct value.
Repeating the same calculation procedure until 15 iterations
yields an error e<1x10-6 equivalent to five (5) decimal point
Chapter 3-Load Flow Analysis-Case 2

Page 169

accuracy. The result of the overall calculation is summarized in table

3.27. The error calculation summarized in table 3.28 shows the
error on the 15th iteration to be at least 2x10-7 which is acceptable
and provides a decimal point accuracy which is acceptable from an
engineering application standpoint.
Table 3.27 Bus voltage calculation results after k=15
k

V2 (Bus 2)

V3 (Bus 3)

V4 (Bus 4)

0.991826-j0.013226

0.983882-j0.018611

0.985837-j0.016446

0.988826-j0.017198

0.975093-j0.031826

0.977186-j0.029665

0.987229-j0.02014

0.971692-j0.035725

0.973836-j0.033573

0.986561-j0.02102

0.969961-j0.038659

0.972121-j0.036508

0.986251-j0.021669

0.969207-j0.039516

0.971378-j0.037368

0.986103-j0.021862

0.968867-j0.040162

0.971042-j0.038015

0.986043-j0.022004

0.968701-j0.04035

0.970878-j0.038203

0.986011-j0.022046

0.968634-j0.040491

0.970813-j0.038344

0.985999-j0.022077

0.968598-j0.040532

0.970777-j0.038385

10

0.985992-j0.022086

0.968585-j0.040563

0.970764-j0.038416

11

0.98599-j0.022093

0.968577-j0.040571

0.970756-j0.038425

12
13
14

0.985989-j0.022095
0.985988-j0.022096
0.985988-j0.022096

0.968575-j0.040578
0.968573-j0.04058
0.968573-j0.040581

0.970754-j0.038431
0.970752-j0.038433
0.970752-j0.038435

15

0.985988-j0.022097

0.968572-j0.040582

0.970751-j0.038435

Table 3.28 Voltage Calculation Error Values

Accuracy
k
ereal
1
2
3
4
5

0.00817
3
0.00300
0
0.00159
7
0.00066
7
0.00031
0

V2
eimaginary

ereal

V3
eimaginary

ereal

V4
eimaginary

0.013226

0.01611

0.018611

0.01416

0.016446

0.003971

0.00878

0.013215

0.00865

0.013218

0.002942

0.00340

0.003899

0.00335

0.003908

0.000880

0.00173

0.002933

0.00171

0.002934

0.000648

0.00075

0.000857

0.00074

0.000860

Chapter 3-Load Flow Analysis-Case 2

Page 170

6
7
8
9
10
11
12
13
14
15

0.00014
0.000193
7
5.986E- 0.0001419
05
3.249E- 4.215E-05
05
1.142E- 3.088E-05
05
7.101E- 9.144E-06
06
2.154E- 6.686E-06
06
1.544E- 1.974E-06
06
4.001E- 1.441E-06
07
3.34E- 4.244E-07
07
7.291E- 3.092E-07
08

0.00034

0.000646

0.00033

0.000646

0.00016 0.0001874
6
6.64E-05 0.0001414

0.00016 0.0001882
4
6.56E-05 0.0001415

3.63E-05

4.071E-05

3.58E-05

4.09E-05

1.28E-05

3.078E-05

1.27E-05

3.079E-05

7.91E-06

8.803E-06

7.81E-06

8.847E-06

2.46E-06

6.666E-06

2.42E-06

6.668E-06

1.71E-06

1.895E-06

1.69E-06

1.905E-06

4.67E-07

1.437E-06

4.59E-07

1.437E-06

3.69E-07

4.06E-07

3.65E-07

4.083E-07

Calculation results:
V2(15) = 0.985988-j0.022097 p.u
V3(15) = 0.968572-j0.040582 p.u
V4(15) = 0.970751-j0.038435 p.u
Converting V2(15) to polar form:
V2 =

(0.985988)2+(-0.022097)2 =/Arctan(-0.022097/0.985988)0

V2 = 0.986235/-1.2830 p.u
Actual value of bus voltage is
V2 =(0.986235/-1.2830 )(Vbase)= (0.986235/-1.2830 )(6.9kV)
V2 = 6.805/-1.2830 kV
Converting V3(15) to polar form:
V3 =

(0.968572)2+(-0.040582)2 =/Arctan(-0.040582/0.968572)0

V3 = 0.969422/-2.3990

p.u

Actual value of bus voltage is

V3 =(0.969422/-2.3990)(Vbase)=( 0.969422/-2.3990)(480V)
Chapter 3-Load Flow Analysis-Case 2

Page 171

V3= 465.322/-2.3990 V
Converting V4(15) to polar form:
V4 = (0.970751)2+(-0.038435)2 /Arctan(-0.038435/0.970751)0
V4 = 0.971512/-2.2670 p.u
Actual value of bus voltage is
V4 =(0.971512/-2.2670)(Vbase)=( 0.971512/-2.2670)(480V)
V4= 466.325/-2.2670 V
3.4.3 Current, Power Flow and Power Factor Calculation
Current Flows
Using equation 3.2.6 and admittance values from table 3.3.2 to
calculate the current flows:
Current flow from bus 1 to bus 2 (I12) as referred from the primary
side (6.9kV) of TRM1
I12=y12(V1-V2)
I12=( 0.959989-j32.341297) (1- 0.985988+j0.022097)
I12= 0.728104-j0.431945 p.u
Converting to polar form:
I12 =

(0.728104)2+ (-j0.431945)2/Arctan(-j0.431945 /0.728104)

I12= 0.846588/-30.6790 p.u

Actual value of I12 is
I12= (I12 p.u)( Ibase 13.8kV)
I12= (0.846588/-30.6790 )(418.36976)
I12= 354.187/-30.6790 A
Current flow from bus 2 to bus 3 (I23)
I23=y23(V2-V3)
I23=(0.693282-j4.206570) (0.985988-j0.022097 0.968572+j0.0405823)
I23= 0.089832-j0.0604435 p.u
Chapter 3-Load Flow Analysis-Case 2

Page 172

Converting to polar form:

I23 =

(0.089832)2+ (-0.0604435)2 /Arctan(-0.0604435/0.089832)

I23= 0.108274/-33.935 0 p.u

Actual value of I23 is
I23= (I23 p.u)( Ibase 480V)
I23= (0.108274/-33.9350)(12028.13061)
I23= 1302.338/-33.9350 A
Current flow from bus 2 to bus 4 (I24)
I24=y24(V2-V4)
I24=(0.695415-j4.203698) (0.985988-j0.0220970.970751+j0.0384)
I24= 0.079277-j0.0526870 p.u
Converting to polar form:
I24 =

(0.079277)2 + (-0.0526870)2/Arctan(-0.0526870/0.079277)

I24= 0.095188/-33.6080 p.u

Actual value of I24 is
I24= (I24 p.u)( Ibase 480V)
I24= (0.095188/-33.6080 )( 12028.13061)
I24= 1144.936 /-33.6080 A

Power Flow and Power Factor

Using equation 3.2.7 and the calculated voltage and current values,
power flow will be calculated.
For power out from Bus 1 to TRM1:
S12= V1I12*
S12= (1)(0.728104-j0.431945)*
S12= (0.728104-j0.431945) p.u
Converting to polar form:
S12 =

(0.728104)2+ (-0.431945)2/Arctan(0.431945/0.728104)

S12= 0.846588/30.6790 p.u

Chapter 3-Load Flow Analysis-Case 2

Page 173

Actual value of S12 is

S12= (S12p.u)( Sbase )
S12= (0.846588/30.6790)(10MVA)
S12= 8.4658/30.6790 MVA
Calculating the Power Factor
PF12=cos(30.6790)
PF12= 0.86.004 lagging at bus 1
Repeating the same procedure, the calculation for the rest
of the power and power factor were performed and results are
summarized in table 2.29
Table 2.29 Power Flow and Power Factor Summary
LOCATION
Primary side of
TRM1
Secondary Side
of TRM1
Primary side of
TRL3A
Bus 3
Primary side of
TRL3B
Bus 4

APPARENT
POWER FLOW
(MVA)
8.465/30.6790

POWER FACTOR (%)

86.004

Lagging

8.349/29.3950

87.126

Lagging

1.067/32.6510

84.198

Lagging

1.049/31.5360
0.93878/32.3240

85.232
84.504

Lagging
Lagging

0.92476/31.3410

85.409

Lagging

The bus voltages, power, current and power factor for the
next five steps of the capacitor bank are calculated using the same
procedure as above and the results are summarized in the
preceding tables.

Chapter 3-Load Flow Analysis-Case 2

Page 174

Table 3.30 Bus Voltages on Different Capacitor Steps

kVAR
V1
300
0.98623/-1.2830 pu
6.805/-1.2830 kV
600
0.987187/-1.284 pu
6.811/-1.284 kV
900
0.988137/-1.284 pu
6.818/-1.284 kV
1200 0.98908/-1.284 pu
6.824/-1.284 kV
1500 0.990032/-1.285 pu
6.831/-1.285 kV
1800 0.990977/-1.285 pu
6.837/-1.285 kV

V2
0.96942/-2.3990 pu
465.322/-2.3990 V
0.970391/-2.3970 pu
465.788/-2.3970 V
0.971359/-2.395 pu
466.252/-2.395 V
0.972324/-2.393 pu
466.715/-2.393 V
0.973287/-2.392 pu
467.178/-2.392 V
0.974249/-2.390 pu
467.639/-2.390 V

V3
0.971512/-2.267 pu
466.325/-2.267 V
0.972479/-2.265 pu
466.790/-2.265 V
0.973444/-2.264 pu
467.253/-2.264 V
0.974407/-2.262 pu
467.715/-2.262 V
0.975368/-2.261 pu
468.176/-2.261 V
0.97632/-2.259 pu
468.637/-2.259 V

Bus Voltage (p.u)

0.995
0.99
0.985
0.98

0.975
0.97
0.965
0

500

1000
kVAR

Bus 2 (6.9kV Bus) V1

1500

2000

Bus 3 (MCC8 Bus) V2

Bus 4 (MCC9 Bus) V3

Figure 3.13 Bus Voltage versus kVAR
Based on the above comparison for each capacitor kVAR
values, the maximum value of bus voltages will occur when all six
(6) capacitor bank are on-line.

Chapter 3-Load Flow Analysis-Case 2

Page 175

Table 3.31 Current Flows on Different Capacitor Steps

kVAR

I1 (A)Bus 1 to
2

I2 (A) Bus 2 to 3

I3 (A) Bus 2 to 4

300
600
900
1200
1500
1800

354.187
347.779
341.750
336.116
330.894
326.102

1302.339
1301.039
1299.744
1298.454
1297.170
1295.890

1144.937
1143.799
1142.666
1141.538
1140.413
1139.294

Line Current (A)

1400.000
1200.000
1000.000
800.000
600.000
400.000
200.000
0.000
0

500

I1 (A)Bus 1 to 2

1000
kVAR

1500

2000

I2 (A) Bus 2 to 3

I3 (A) Bus 2 to 4
Figure 3.14 Line Current versus kVAR
Based on the above trend, the minimum current will occur
when all capacitor bank are on-line. It is also apparent that the
maximum current occurs if there is only one (1) capacitor bank is
on-line.

This behaviour is due to reactive current absorption of

the capacitors resulting to reduced apparent current and power and

loss reduction.

Chapter 3-Load Flow Analysis-Case 2

Page 176

Table 3.32 Power Flows at Different Capacitor Steps

kVAR

S1
S2
S3
(MVA) (MVA) (MVA)
8.466

1.068

0.939

600
900
1200
1500
1800

8.313
8.169
8.034
7.909
7.795

1.068
1.068
1.068
1.068
1.068

0.939
0.939
0.939
0.939
0.939

Apparent Power (MVA)

300

9
8
7
6
5
4
3
2
1
0
0

500

S1 (MVA)

1000
kVAR
S2 (MVA)

1500

2000

S3 (MVA)

Figure 3.15 Apparent Power Flows versus kVAR

It is apparent from the trend above that power flow through
is significantly decreased as number of capacitor banks online
increases. Again, as in the current flow, there is an absorption of
reactive power by the capacitors resulting to reduced apparent
power flow.

Chapter 3-Load Flow Analysis-Case 2

Page 177

Table 3.33 Power Transformer %Loading at Different

Capacitor Steps
TRM1 %
Loading

kVAR
300
600
900
1200
1500
1800

TRL3A %
Loading

20.87
20.52
20.18
19.87
19.58
19.31

TRL3B %
Loading

34.99
34.99
34.99
34.99
34.99
34.99

30.83
30.83
30.83
30.83
30.83
30.83

% Loading

40.00
30.00
20.00
10.00
0.00
0

500

1000
kVAR

TRM1 % Loading

1500

2000

TRL3A % Loading

TRL3B % Loading
Figure 3.16 Transformer Loading(%) versus kVAR
There is an obvious reduction of apparent power flow
through TRM1 (S1) and as expected, there is very minimal effect on
power flow through TRL3A and TRL3B.

Chapter 3-Load Flow Analysis-Case 2

Page 178

Table 3.34 Power Factor at Different Capacitor Steps

Bus 1
PF1
(%)

Bus 2
PF2
(%)

Bus 3
PF2
(%)

300
600
900
1200
1500
1800

86.004
87.586
89.129
90.620
92.047
93.398

84.198
84.200
84.202
84.204
84.206
84.208

84.504
84.506
84.507
84.509
84.511
84.513

Power Factor (%)

kVAR

94.000
92.000
90.000
88.000
86.000
84.000
82.000
0

Bus 1 PF1 (%)

500

1000
kVAR
Bus 2 PF2 (%)

1500

2000

Bus 3 PF2 (%)

Figure 3.17 Power Factor at each Major Bus versus kVAR

Power Factor on all buses shows a significant improvement
as expected. It also shows that at normal loading, the range at
which the power factor can be controlled using the given capacitor
bank is between 86% to 93.4% or about 1.23% per step
(300kVAR).

Chapter 3-Load Flow Analysis-Case 2

Page 179

Table 3.35 Transformer Feeder Voltage Drop at Different

Capacitor Steps
kVAR
300

%VDTL1
0.01325

%VDTL2
0.27951

%VDTL3
0.27303

600

0.01303

0.27896

0.2725

900

0.01281

0.27842

0.27196

1200

0.01261

0.27787

0.27143

1500

0.01242

0.27733

0.2709

1800

0.01225

0.27679

0.27038

0.3

%VD

0.25
0.2
0.15
0.1
0.05
0
0

500

1000
kVAR

%VDTL1

%VDTL2

1500

2000

%VDTL3

Figure 3.18 Major Feeder Voltage Drop versus kVAR

The calculation results for various capacitor steps shows
that only bus 2 bus voltage drop is affected by variation in capacitor
sizes and the rest of the buses exhibit invariance. The decrease in
voltage drop on bus 2 is due to the consequential decrease in
current flow as capacitor steps increase.

Chapter 3-Load Flow Analysis-Case 2

Page 180

Table 3.36 Transformer Feeder Loss at Different Capacitor

Steps

Line Loss (kW)

Loss
kVAR TL1
(kW)
300 6.572
600 6.337
900 6.119
1200 5.919
1500 5.736
1800 5.571

Loss
TL2
(kW)
4.472
4.463
4.454
4.445
4.436
4.427

Loss
TL3
(kW)
3.471
3.464
3.457
3.45
3.443
3.437

8
6
4
2
0
0

500

Loss TL1 (kW)

1000
kVAR
Loss TL2 (kW)

1500

2000

Loss TL3 (kW)

Figure 3.19 Feeder Loss versus kVAR

As a consequence of reduction in current flows through the
feeders, there is a notable decrease in the feeder loss as shown in
table 3.36 and figure 3.19.

Chapter 3-Load Flow Analysis-Case 2

Page 181