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Assertion (A): In a parallel in-serial out shift register data is loaded one bit-at a time
Reason (R): A serial in-serial out shift register can be used to introduce a time delay.
A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true
Answer: Option D
Explanation:
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2. In an 8085 microprocessor, the instruction CMP B has been executed while the content of the
accumulator is less than that of register B, As a result.
A. carry flag will be set but zero flag will be reset
B. carry flag will be reset but zero flag will be set
C. both carry flag and zero flag will be reset
D. both carry flag and zero flag will be set
Answer: Option A
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3. Computers use thousands of flip-flops. To coordinate the overall action, a common signal is sent
to all flip-flop known as
A. debug signal
B. toggle signal
C. active signal
D. clock signal
Answer: Option D
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C. don't care
D. blocked
Answer: Option A
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A. commutative law
B. associative law
C. distributive law
D. commutative, associative and distributive law
Answer: Option D
Explanation:
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13. In 8085 microprocessor, what are the contents of register SP, after the interrupt has been
started?
A. 0210 H
B. 0211 H
C. 054 CH
D. 054 EH
Answer: Option C
Explanation:
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14. Assertion (A): The resolution of a DAC depends on the number of bits
Reason (R): Low resolution leads to fine control.
17. Decimal 1932 when converted into 10's complement will become
A. 8868
B. 8060
C. 8608
D. 8806
Answer: Option B
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A. 6 bits
B. 8 bits
C. 12 bits
D. 16 bits
Answer: Option D
Explanation:
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20. In 8085 microprocessor, how many interrupt control lines are there?
A. 6
B. 8
C. 12
D. 16
Answer: Option B
Explanation:
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21. In 2's complement addition, the carry generated in the last stage is
A. added to LSB
B. neglected
C. added to bit next to MSB
D. added to the bit next to LSB
Answer: Option B
Explanation:
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28. Assuming accumulator contain A 64 and the carry is set (1). What will register A and carry (CY)
contain after ORA A?
A. A 6 H, 1
B. A 6 H, 0
C. 00 H, 0
D. 00 H, 1
Answer: Option B
Explanation:
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29. 2's complement of a given 3 or more bit number of non-zero magnitude is the same as the
30. A half adder adds __________ bits and a full adder adds __________ bits.
A. two, three
B. three, four
C. four, six
D. two, four
Answer: Option A
Explanation:
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31. When a binary adder is used as BCD adder, the sum is
A. correct when it is < 9
B. correct when it is > 9
C. correct when it is < 16
D. none of these
Answer: Option A
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32. A gate in which shift register is connected as shown in the figure below. How many clock pulse
(after reset to '0') the contents of the shift register are '000' again?
A. 3
B. 6
C. 16
D. 8
Answer: Option B
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35. If interrupt service request have been received from all of the following interrupts, then which
one will be serviced last?
A. RST 5.5
B. RST 6.5
C. RST 7.5
D. None of these
Answer: Option A
Explanation:
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36. In order to enable TRAP interrupt, which of the following instructions are needed?
A. El only
B. SIM only
C. El and SIM both
D. None
Answer: Option D
Explanation:
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37. If modulus is less than 2N, some states of the counter are skipped by using NAND gates.
A. True
B. False
Answer: Option A
Explanation:
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39. What are the contents of the accumulator after the RIC has been executed?
A. 40 H
B. 41 H
C. 42 H
D. 43 D
Answer: Option D
Explanation:
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40. Assertion (A): In a magnitude comparator IC the cascading inputs provide a means to cascade
the 4 bit comparators
Reason (R): A magnitude comparator has three outputs, A = B, A > B and A < B
A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true
Answer: Option B
Explanation:
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41. For the K map of the given figure the simplified Boolean expression is
A. AC + A B
B. A BC + A B C + A B C + AB C
C. AC + A B + AC
D. A C + A B + AB
Answer: Option A
Explanation:
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42. Assertion (A): It is possible that a digital circuit gives the same output for different input
voltages
Reason (R): A digital circuit is also called logic circuit.
A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true
Answer: Option B
Explanation:
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43. In a ring counter for N clock pulses the scale for the counter is
A. N : 1
B. N : 2
C. N : 10
D. N : 100
Answer: Option A
Explanation:
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44. Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY)
contain after XRA A?
A. A 6 H, 1
B. A 6 H, 0
C. 00 H, 0
D. 00 H, 1
Answer: Option C
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50. Which of the following statements is not true in regard to storage time of a transistor?
A. The transistor is in active region
B. Both junctions are forward-biased
C. The collector injects electrons or holes into the base region
D. It is the time taken by the carriers to leave the base region
Answer: Option A
Explanation:
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