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The value of n is
A. 8
B. 9
C. 10
D. 11
Answer: Option C
Explanation:
1000 = 5 or N = 10.
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3. An OR gate has 4 inputs. One input is high and the other three are low. The output
A. is low
B. is high
C. is alternately high and low
D. may be high or low depending on relative magnitude of inputs
Answer: Option B
Explanation:
In OR any input high means high output.
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B. 1010
C. 1001
D. 1000
Answer: Option B
Explanation:
1010 = 8 + 2 = 10 in decimal.
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7. In 2's complement representation the number 11100101 represents the decimal number
A. +37
B. -31
C. +27
D. -27
Answer: Option D
Explanation:
A = 11100101. Therefore A = 00011010 and A' = A + 1 = 00011011 = 16 + 8 + 2 + 1 = 27.
Therefore A = -27.
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9. BCD input 1000 is fed to a 7 segment display through a BCD to 7 segment decoder/driver. The
segments which will lit up are
A. a, b, d
B. a, b, c
C. all
D. a, b, g, c, d
Answer: Option C
Explanation:
1000 equals decimal 8 Therefore all segments will lit up.
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A. 0
B. 1
C. A
D. A
Answer: Option D
Explanation:
If A = 0, Y = 1 and A = 1, Y = 0 Therefore Y = A.
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C. Hybrid
D. none of the above
Answer: Option A
Explanation:
This is product of sums expression.
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18. An 8 bit DAC has a full scale output of 2 mA and full scale error of 0.5%. If input is 10000000
the range of outputs is
A. 994 to 1014 A
B. 990 to 1020 A
C. 800 to 1200 A
D. none of the above
Answer: Option A
Explanation:
10000000 = 128, 11111111 = 255
If there is no error, output =
= 1004A.
Maximum error =
Hence range of output 994 to 1014 A.
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A. Y = (A + B) C + DE
B. Y = A + B + C + D + E
C. AB + C +DE
D. AB + C(D + E)
Answer: Option A
Explanation:
or
Y = (A + B)C + DE.
21. An AND gate has two inputs A and B and one inhibit input 3, Output is 1 if
A. A = 1, B = 1, S = 1
B. A = 1, B = 1, S = 0
C. A = 1, B = 0, S = 1
D. A = 1, B = 0, S = 0
Answer: Option B
Explanation:
All AND inputs must be 1 and inhibit 0 for output to be 1.
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22. The greatest negative number which can be stored is 8 bit computer using 2's complement
arithmetic is
A. - 256
B. - 128
C. - 255
D. - 127
Answer: Option B
Explanation:
The largest negative number is 1000 0000 = -128.
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23. A JK flip flop has tpd= 12 ns. The largest modulus of a ripple counter using these flip flops and
operating at 10 MHz is
A. 16
B. 64
C. 128
D. 256
Answer: Option D
Explanation:
Number of flip-flops =
= 8.333 say 8
Modulus = 28 = 256.
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B. 24.4 mV
C. 1.2 V
D. none of the above
Answer: Option A
Explanation:
.
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A. A + B + C
B. A + BC
C. A
D. B
Answer: Option D
Explanation:
Y = A B C + A B C + AB C + A B C = A B (C + C) + A B (C + C) = A B + AB = B(A + A) = B.
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Then
A. w = z x = z
B. w = z, x = y
C. w = y
D. w = y = z
Answer: Option A
Explanation:
Use k-map, then it will be easy.
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31. Minimum number of 2-input NAND gates required to implement the function F = (x + y) (Z + W)
is
A. 3
B. 4
C. 5
D. 6
Answer: Option B
Explanation:
F = (x + y) (z + w) = xy.(z + w)
= xyz + xyw
=
33. A carry look ahead adder is frequently used for addition because
A. it costs less
B. it is faster
C. it is more accurate
D. is uses fewer gates
Answer: Option B
Explanation:
In look ahead carry adder the carry is directly derived from the gates when original inputs are
being added. Hence the addition is fast. This process requires more gates and is costly.
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A. Mod 3
B. Mod 6
C. Mod 8
D. Mod 7
Answer: Option B
Explanation:
When counter is 110 the counter resets. Hence mod 6.
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B. False
Answer: Option B
Explanation:
Zero suppression is commonly used.
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39. A counter type A/D converter contains a 4 bit binary ladder and a counter driven by a 2 MHz
clock. Then conversion time
A. 8 sec
B. 10 sec
C. 2 sec
D. 5 sec
Answer: Option A
Explanation:
42. The fixed count that should be used so that the output register will represent the input for a 6 bit
dual slope A/D converter uses a reference of -6v and a 1 MHz clock. It uses a fixed count of 40
(101000).
A. 000110
B. 0010
C. 1111
D. 011101
Answer: Option A
Explanation:
If
is made to be unity, the O/P count N2 = ei, N1 = 6 = 000110.
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43. For the K map in the given figure the simplified Boolean expression is
A. A C + A D + ABC
B. A C + A D + ABC
C. A C + A D + ACD
D. A C + A D + AB C
Answer: Option A
Explanation:
44. A memory system of size 16 k bytes is to be designed using memory chips which have 12
address lines and 4 data lines each. The number of such chips required to design the memory
system is
A. 2
B. 4
C. 8
D. 18
Answer: Option C
Explanation:
.
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45. In a 7 segment display, LEDs b and c lit up. The decimal number displayed is
A. 9
B. 7
C. 3
D. 1
Answer: Option D
Explanation:
46. AB + AB =
A. B
B. A
C. 1
D. 0
Answer: Option B
Explanation:
AB + AB = A(B + B) = A . 1 = A.
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47. In a BCD to 7 segment decoder the minimum and maximum number of outputs active at any
time is
A. 2 and 7
B. 3 and 7
C. 1 and 6
D. 3 and 6
Answer: Option A
Explanation:
Minimum number of outputs when input is decimal 1 and maximum number of outputs when
input is decimal 8.
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A. 00011001
B. 10000001
C. 00011010
D. 00000000
Answer: Option A
Explanation:
Replace 1 by 0 and 0 by 1.