DIGITAL SYSTEMS:

Number System

28072016001

1. An OR gate has 4 inputs. One input is high and the other three are low. The output
A) is low
B) is high
C) is alternatively high and low
D) may be high or low
depending upon relative magnitude of inputs
2. A device which converts BCD to seven segment is call
A) Encoder
B) Decoder
C) Multiplexer
D) None
3. A decade counter skips binary states
A) 1000 to 1111
B) 0000 to 0011
C) 1010 to 1111
D)1111 to higher
Explnation: A decade counter counts from 0 to 9. It has 4 flip-flops. The states skipped are 10 to 15
or 1010 to 1111.

4. A ring counter with 5 flipflops will have

A) 5 states
B) 10 states
5. For the gate given below the output will be

C) 32 states

D) infinite states

5. Explanation:
If A = 0, Y = 1 and A = 1, Y = 0
Therefore Y = A.

A) 0
B) 1
C) A
D) A
6. In the expression the total number of minterms will be
A) 2
B) 3
C) 4
D) 5
7. The circuit in the given figure is

6. Explanation:
The min terms are ABC + ABC +
AB C + ABC + ABC.

7. Explanation:
Since V(1) is lower state than V(0) it is a negative logic circuit.
Since diodes are in parallel, it is an OR gate.

A) +ve logic OR gate

B) ve logic OR gate
C) ve logic AND gate
D) +ve logic AND gate
8. Which of the following is non saturating?
A) TTL
B) CMOS
C) ECL=low propagating delay
D) both A and B
9. The expression Y = M (0, 1, 3, 4) is
A) POS
B) SOP
C)Hybrid
D) none of the above
10. The circuit of the given figure realizes the function
10. Explanation:
or
Y = (A + B)C + DE.

A) Y=(A+B) C + DE
B)Y= A+B+C+D+E
C) 1476
D) 12166
11. The greatest negative number which can be stored is 8 bit computer using 2s complement
arithmetic is
A) -256
B) -128
C) -255
D) -127
12. The basic storage element in a digital system is
A) Flipflop B) Counter
C) Multiplexer
D) Encoder
13. In a ripple counter
A) Whenever a flipflop sets to 1, the next higher FF toggles
B) Whenever a flipflop sets to 0, the next higher FF remains unchanged
C) Whenever a flipflop sets to 1, the next higher FF faces race condition
D) Whenever a flipflop sets to 0, the next higher FF faces race condition
14. A Full adder can be made out of

A) 2 half adders
B) 2 half adders and a OR gate
18. Explanation:In
ahead
adder
is directly
C) 2 half look
adders
andcarry
a NOT
gatethe carry
D) three
half derived
adders from the gates when original inputs
are being added. Hence the addition is fast. This process requires more gates and is costly.

15. The output of a half adder is

A) SUM
B) CARRY C) SUM and CARRY
D) none of the above
16. Minimum number of 2-input NAND gate required to implement the function F=(x+y)(z+w)
A) 3
B) 4
C) 5
D) 6
17. Which device has one input and many outputs
16. Explanation:
A) Multiplexer
B) Demultiplexer
C) Counter
D) Flip Flop F = (x + y) (z + w) = xy.(z + w)
18. A carry look ahead adder is frequently used for addition because
= xyz + xyw
A) It costs less
B) it is faster C) it is more accurate D) it uses fewer gates
=
19. The counter in the given figure is
19. Explanation:
When counter is 110 the
counter resets. Hence mod 6.

minimum no. of 2 input NAND

gate.

A) Mod 3
B) Mod 6
C) Mod 8
D)Mod 7
20. AB + AB
20. Explanation:
A) B
B) A
C) 1
D) 0
AB + AB = A(B + B) = A . 1 = A.
21. Max term designation for A+B+C is
A) M0
B) M1
C) M2
D) M3
22. In a D latch
A) Data bit D is fed to S input and D to R input
B) Data bit D is fed to R input and D to S input
23. Explanation:
C) Data bit D is fed to both R and S inputs
22 = 4. Hence 2 select lines.
D) Data bit D is not fed to any input
23. A 4:1 multiplexer requires _______ data select lines
E) 1
B) 2
C) 3
D) 4
24. Explanation:
24. The number of un used states in Johnson counter is
Total state = 2n = 24 = 16
A) 2
B) 4
C) 8
D) 12
Used state = 2n = 2 x 4 = 8
25. A Karnaugh map with 4 variables has
A) 2 cells
B) 4 cells
C) 8 cells
D) 16 cells Unused state = 16 - 8 = 8.
26. An 8 bit data is to be entered into a parallel in register. The number of clock pulses required A) 8
B)4
C)2
D)1
27. Which of the following is error correcting code
A) EBCDIC
B) Grey
C) Hamming
D) ASCII
28. A universal shift register can shift
A) From left to right B) from right to left C) both a and b
D) none
29. A XOR gate has inputs A and B and output Y, then the output equation is
A) Y=AB
B) Y=AB+AB
C) Y=AB+AB
D) Y=AB+AB
30. The Boolean expression for the circuit given below figure is

A) A {F + (B + C) (D + E)} B) A [F + (B + C) (DE)] C) A + F + (B + C) (D + E)] D) A [F + (BC) (DE)]

31. A counter has N flip flops. The total number of states are
A) N
B) 2N
C) 2N
D) 4N
32. Out of S, R, , K, Preset, Clear inputs to flip flops, the synchronous inputs are

A) S, R, J, K only
B) S, R, Preset, Clear only C) Preset, Clear only D) S, R only
33. Which if these are two state devices
A) Lamp
B) Punched card
C) Magnetic tape
D) All of the above
34. The minimum number of NAND gates required to implement the Boolean function A+AB+ABC
A) 0
B) 1
C) 4
D) 7
35. For the K map of the given figure, the simplified Boolean expression is
A C + A D + ABC

36. The dual of A + [B + (AC)] + D is

A) A+[(B(A+C))]+D
B)A[B+AC]D
C) A+[B(A+C)]D
D) A[B(A+C)]D
37. A divide by 78 counter can be obtained by
A) 6 numbers of mod-13 counters
B) 13 numbers of mod-6 counters
C) one mod-13 counter followed by mod-6 counter
D) 13 number of mod-13 counters
38. The initial state of MOD-16 down counter is 0110. What state will it be after 37 clock pulses?
A) Indetermine
B) 0110
C) 0101
D) 0001
39. The number of inputs and outputs of a full adder are
A) 3 and 2 respectfully B) 2 and 3 respectfully C) 4 and 2 respectfully D) 3 and 2 respectfully
40. In a 3 input NAND gate, the number of states in which output is 1 equals
A) 8
B) 1
C) 6
D) 5
41. The total number of input words for 4 input OR gate is
A) 20
B) 16
C) 12
D) 8
42. In digital circuits Schottky transistors are preferred over normal transistor because of their
A) Lower propagation delay
B) Lower power dissipation
C)Higher propagation delay D)Higher power dissipation
43. Quantization error occurs in
A) D/A converter
B) A/D converter
C) both
D) neither D/A nor A/D
44. Out of latch and flipflop wich has clock input
A) Latch only
B) Flip Flop only
C) both
D) None
45. A mod 4 counter will count
A)from 0 to 4
B) from 0 to 3
C) from any number n to n+4 D) none
46. Which of the following application in pocket calculators?
A) TTL
B) CMOS
C) ECL
D) Both A and C
47. A 4 input AND gate is equivalent to
A) 4 switches in parallel
B) 2 switches in series and 2 in parallel
C) 3 switches in parallel
and 1 in series
D) 4 switches in series
48. Parallel adder is
A) Sequential circuit B) combinational circuit
C) either sequential or combinational D) None
49. In 8 bit binay number is to be entered into an 8 bit serial shift register. The no of clock pulses req
A) 1
B) 2
C) 4
D) 8
50.
CMOS devices have very high speed. ( TRUE/FALSE)
CMOS devices have very small physical size and simple geometry.(TRUE/FALSE)