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Lab 4 Report

Design of a BJT Differential Amplifier


Kevin Bradshaw & Kai Qin
ECEN 326-502
Instructor: Sebastian Hoyos
Date Performed: February 25, 2016

Objectives
Understand the characteristics of a BJT differential amplifier.
Design and analyze two side by side common-emitters and a current source meeting
certain constraints.
Evaluate the DC operating point of the each transistor amplifiers and the transistor
current source.
Procedure
In this lab, the BJT differential circuit designed from the pre-lab was constructed. The
amplifier was designed to fit the constraints shown in Figure 1:
Figure 1: BJT Differential Amplifier Design Constraints

Using a chosen value for the collector current of the first BJT (Q1), the small signal
parameters were found for all transistors. Then, by estimating a value for the emitter
resistor for Q3 based on the tail current, Rb3 was chosen. Using Rb3 and the tail
current, a constant ratio for the base resistors of Q3 was calculated. For the other
resistors, the common mode gain was first calculated from the differential mode gain
constraint. Using the common mode gain and half circuit analysis, the emitter resistor
was calculated. Lastly, the collector resistor was calculated by using the overall gain
and the input resistance to the current source. Figure 2 shows the resulting circuit
designed and Table 1 shows the actual values used in the circuit. These values were
adjusted after construction in order to get an optimum gain with no clipping in the
voltage swing.
Figure 2: BJT Differential Amplifier

After the circuit was adjusted, the operating currents and voltages (including the
maximum unclipped output signal voltage amplitude) were measured and can be seen
in Table 2. Furthermore, the input resistance, current supply, and gain were measured
and can also be seen in Table 3. The gain of the common-source can be seen in Figure
3 and the overall gain of this circuit can be seen in Figure 4. The maximum output
voltage swing can be seen in Figure 5. Lastly, the THD was not able to be measured
because of some problems using the NI ELVIS board at the station that was being used.
Figure 3: Vi1 Vs. Vo1
Figure 4: Vi2 Vs. Vo2

Figure 5: Vi1 and Vi2

Vi1

Vi2

Figure 6: Vo1, Vo2, and Vo1-Vo2

Vo1

Vo1 - Vo2

Vo2

Figure 7: Common Mode Gain

Figure 8: Maximum Output Voltage Swing

Data Tables
Table 1: Final Design Circuit Parameters
Parameter

Value

Collector Resistors (RC)

1.9 k

Emitter Resistors (RE)

10

Base Resistor 1 (RB1)

207 k

Base Resistor 2 (RB2)

150 k

Base Resistor 3 (RB3)


Table 2: Operating Bias Points
Parameter

Q1

Q2

Q3

Collector Current

1.747 mA

1.715 mA

3.479 mA

Base Voltage

0.0071 mV

0.0095 mV

-4.168 V

Collector Voltage

1.555 V

1.563 V

-0.658 V

Emitter Voltage

-0.641

-0.640

-4.822

Table 3: Measured Circuit Values


Parameter

Value

VCC Supply Current

3.462 mA

VEE Supply Current

-3.481 mA

Offset (VO1 - VO2)

-0.008 V

Differential Gain (Adm)

68.44

Common Mode Gain (Acm)

0.0449

Input Resistance

8796.6

Common Mode Rejection Ratio (CMRR)

63.66

Maximum Unclipped Vout Signal


Amplitude

8.48 V

Discussion
We started this lab by building half side of the differential amplifier. We had a differential
gain of 68.44 which is higher than the required 40. The problem we encountered was
that the circuit built using the pre-lab parameters did not meet the specification
requirement of CMRR larger than 70. I think it is because the 10 ohm R E we used in the
lab is too small. Equation below shows that Common mode gain increases when R E
decreases. Then we tried to increase RE to 100 ohm. However, the CMRR was still less
than 70.

Conclusion
From this lab, we have a better understanding of the characteristics of a BJT differential
amplifier, and we became more familiar with the procedures of how to design and
analyze output waveforms to meet given constraints of common mode gain, differential
mode gain, and CMRR. When the pre-lab design did not meet given constraints, we
inspected output signals of every transistors and evaluated their DC operating points.

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