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ii)
In terms of VG, find the range of VD for which the transistor operates in the triode
region.
1
iii)
In terms of VG, find the range of VD for which the transistor operates in
saturation.
[9] Find ID and VD for the circuit shown in Fig. 9. Verify the bias state consistency of your
choice. Given that Vthn = 1.0 V, Kn = 50 A/V2 and W/L = 2.
[10] The NMOS transistors in the circuit of Fig. 10 have Vthn = 1V, nCox = 120 A/V2 and
L1=L2=L3= 1m. Find the required values of gate width for each of Q1, Q2 and Q3 to
obtain the voltage and current values indicated.
[11] For the circuit of Fig. 11, Vt0 = 0.6 V, = 0.25, and F = 0.35 V. Calculate Vo.
[12] What width of NMOS is required for the flow of device current of 1 mA with V GS = 2V
and VDS = 3.3V. Given that L = 0.25 m, n = 650 cm2 Vsec, Vthn = 0.83 V, Cox =
0.185 F/cm2 .
[13] Consider the CMOS inverter with the following device parameters:
parameter
NMOS
PMOS
Cox
60 A/V 2
20 A/V 2
Vth
0.6 V
- 0.8 V
Vdd = 3 V, Vss = 0 V
Determine the ratio of
L n Wn
L p Wp
[14] For the below given circuit of Fig. 14 (a) Give the transistor bias state, (b) Write the
appropriate model equation, (c) Calculate I D, where Vtp = 0.4 V, W/L = 4, and Kp = 200
A/V2.
[15] Given that Kn = 100 A/V2, Vthn = 0.6 V and W/L = 3 for transistor T1 shown in Fig.
15. Find the drain current IDS and VDS for the different values of VGS= .5V, 1.5V and 3V.
The bias state of T1 is not known
[16] Give the summary of different regions of operation in a CMOS Inverter. Give the DC
transfer characteristic of same.
[17] Derive Zpu/ Zpd for an NMOS inveter whose input is steered through pass transistor.
[18] Compare the characteristics of NMOS and CMOS Inverter.
Fig. 2
Fig. 4
Fig. 8
Fig. 9
Fig. 11
Fig. 10
Fig. 14
Fig. 15
5. State Moores first law and how the todays trends in the VLSI domain differ from Moores
prediction.
configurations i.e., [i] NMOS inverter with depletion MOS pull-up [ii] NMOS inverter
with enhancement MOS pull-up? Elaborate the reason
14. Does the devices suffer due to bulk effect in NMOS inverter(s) and CMOS inverter?
Why?
15. Give a cross sectional view of an NMOS transistor. Show different device dimensions.
III. Fill in the blanks/ Multiple Choice Questions
1. A MOSFET has terminals
2.
[a]
[b]
[c]
[d]
9. A certain p-channel E-MOSFET has VGS(th) = -2V. If VGS= 0V, the drain current is
.
[a]
[b]
[c]
[d]
0 mA
ID(on)
maximum
IDSS
***