Professional Documents
Culture Documents
10EC73
10EC73POWERELECTRONICS
SubjectCode
No.ofLectureHrs./Week
TotalNo.ofLectureHrs.
:
:
:
10EC73
04
52
IAMarks
25
ExamHours
ExamMarks
:
:
03
100
PARTA
UNIT 1:
PowerSemiconductorDevices:
Introductiontosemiconductors,PowerElectronics,Powersemiconductordevices,ControlCharacteri
stics.TypesofpowerelectronicconvertersandindustrialapplicationsDrives,Electrolysis,Heating,Welding,StaticCompensators,SMPS,HVDCpowertransmission,Thy
ristorizedtappedchangersandCircuitbreakers.
7 hours
UNIT2:
PowerTransistors:PowerBJTs
switchingcharacteristics,switchinglimits,basedrivecontrol.PowerMOSFETsandIGBTs
characteristics,gatedrive,di/dtanddv/dtlimitations.Isolationofgateandbasedrives.Simpledesignofg
ateandbasedrives.
6 Hours
UNIT3:
Thyristors
Introduction,Two
TransistorModel,characteristics-staticanddynamic.
di/dtand
dv/dtprotection.Thyristortypes.SeriesandparalleloperationofThyristors.Thyristorfiringcircuits.
SimpledesignoffiringcircuitsusingUJT,op-amps,anddigitalICs.
7 Hours
UNIT4:
CommutationTechniques:Introduction.NaturalCommutation.Forcedcommutation-selfcommutation,impulsecommutation,resonantpulsecommutationandcomplementarycommutation
.
6Hours
Dept.ofECE/SJBIT
10EC73
PARTB
UNIT5:
ControlledRectifiers:Introduction.Principleofphasecontrolledconverteroperation.Singlephasesemi-converters.Fullconverters.Three-phasehalf-waveconverters.Three-phasefullwaveconverters.
7Hours
UNIT6:
Choppers:Introduction.Principleofstep-downandstep-upchopperwithRLload.Performanceparameters.Chopperclassification.Analysisofimpulsecommutatedthyristorc
hopper(onlyqualitativeanalysis)
6Hours
UNIT7:
Inverters:Introduction.Principleofoperation.Performanceparameters.Singlephasebridgeinverters.Threephaseinverters.Voltagecontrolofsingle-phaseinverters
singlepulsewidth,multiplepulsewidth,andsinusoidalpulsewidthmodulation.Currentsourceinverter
s.VariableD.C.linkinverter.
7Hours
UNIT8:
(a)ACVoltageControllers:Introduction.PrincipleofON-OFFandphasecontrol.Single-phase,bidirectionalcontrollerswithresistiveandinductiveloads.
(b) ElectromagneticCompatibility:Introduction,effectofpowerelectronicconvertersandremed
ialmeasures.
6Hours
TextBook:
1. PowerElectronics,M.H.Rashid,,Pearson,3rd Edition,2006.
2. PowerElectronics,M.D.SinghandKhanchandaniK.B.,T.M.H.,2nd Edition,2001
References
1. PowerElectronicsEssentialsandApplications,L.Umanand,WielyIndiaPvtLtd,R
eprint,2010
2. ThyristorisedPowerControllers,G.K.Dubey,S.R.Doradla,A.JoshiandR.M.K.Sinha,
NewAgeInternationalPublishers.
3. PowerElectronics
Converters,ApplicationsandDesign,NedMohan,ToreM.Undeland,andWilliamP.
Robins,ThirdEdition,JohnWileyandSons,2008.
4. PowerElectronics:ASimplifiedApproach,R.S.AnandaMurthyandV.Nattarasu,pearso
n/SanguineTechnicalPublishers.
Dept.ofECE/SJBIT
10EC73
INDEXSHEET
UNIT
1.1
1.2
1.3
1.4
1.5
1.6
TOPIC
UNIT 1:INTRODUCTION
BriefHistoryofPowerElectronics
PowerElectronicApplication
PowerSemiconductorDevices
ControlCharacteristicsOfPowerDevices
TypesofPowerConvertersorTypesofPowerElectronicCircuits
PeripheralEffects
UNIT-2: POWERTRANSISTOR
2.1
BipolarJunctionTransistors
2.2
TransistorasaSwitch
2.3
TransientModelofBJT
2.4
SwitchingLimits
2.5
PowerMOSFETS
2.6
SwitchingCharacteristics
2.7
IGBT
2.8
didtanddvdtLimitations
2.9
IsolationofGateandBaseDrives
SiliconControlledRectifier(SCR)
3.2
ThyristorGateCharacteristics
3.3
QuantitativeAnalysis
3.4
SwitchingCharacteristics(Dynamiccharacteristics)
3.5
ResistanceTriggering
3.6
ResistanceCapacitanceTriggering
3.7
Uni-JunctionTransistor(UJT)
3.8
UJTRelaxationOscillator
3.9
SynchronizedUJTOscillator
3.10
dv
Protection
dt
3.11
PAGE NO.
1-14
di
Protection
dt
Dept.ofECE/SJBIT
15-51
52-84
10EC73
UNIT-4 CONTROLLEDRECTIFIERS
4.5
LineCommutatedACtoDCconverters
ApplicationsofPhaseControlledRectifiers
ClassificationofPhaseControlledRectifiers
PrincipleofPhaseControlledRectifierOperation
ControlCharacteristicofSinglePhaseHalfWavePhaseControlledRectifierwit
hResistiveLoad
4.6
4.7
4.8
SinglePhaseFullWaveControlledRectifierUsingACenterTappedTr
ansformer
SinglePhaseFullWaveBridgeControlledRectifier
SinglePhaseDualConverter
5.1
5.2
5.3
5.4
5.5
5.6
Introduction
SelfCommutationorLoadCommutation
ResonantPulseCommutation
ComplementaryCommutation
ImpulseCommutation
ExternalPulseCommutation
4.1
4.2
4.3
4.4
UNIT-5COMMUTATION
UNIT-6
6.1
6.2
6.3
6.4
6.5
6.6
ACVOLTAGE CONTROLLER
164-211
DCCHOPPER
212-237
INVERTERS
238-259
Introduction
PrincipleofStep-downChopper
PrincipleofStep-upChopper
ClassificationofChoppers
ImpulseCommutatedChopper
UNIT-8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
122-163
PhaseControl
TypeofAcVoltageControllers
PrincipleofOn-OffControlTechnique(IntegralCycleControl
PrincipleOfAcPhaseControl
SinglePhaseFullWaveAcVoltageController(AcRegulator)orRmsVoltageCon
trollerwithResistiveLoad
SinglePhaseFullWaveAcVoltageController(BidirectionalC
ontroller)WithRLLoad
UNIT-7
7.1
7.2
7.3
7.4
7.5
85-121
ClassificationofInverters
PrincipleofOperation
HalfbridgeinverterwithInductiveload
FourieranalysisoftheLoadVoltageWaveformofaHalfBridgeInverter
Performanceparametersofinverters
SinglePhaseBridgeInverter
SinglePhaseBridgeInverterwithRLLoad
Comparisonofhalfbridgeandfullbridgeinverters
PrincipleofOperationofCSI:
VariableDClinkInverter
Dept.ofECE/SJBIT
10EC73
UNIT-1
INTRODUCTION TO POWER ELECTRONICS
Power Electronics is a field which combines Power (electric power), Electronics and
Control systems.
Power engineering deals with the static and rotating power equipment for the generation,
transmission and distribution of electric power.
Electronics deals with the study of solid state semiconductor power devices and circuits for
Power conversion to meet the desired control objectives (to control the output voltage and
output power).
Power electronics may be defined as the subject of applications of solid state power
semiconductor devices (Thyristors) for the control and conversion of electric power.
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10EC73
4. AEROSPACE APPLICATIONS
Space shuttle power supply systems, satellite power systems, aircraft power systems.
5.TELECOMMUNICATIONS
Battery chargers, power supplies (DC and UPS), mobile cell phone battery chargers.
6. TRANSPORTATION
Traction control of electric vehicles, battery chargers for electric vehicles, electric
locomotives, street cars, trolley buses, automobile electronics including engine controls.
A.POWER DIODES
Power diodes are made of silicon p-n junction with two terminals, anode and cathode.
Diode is forward biased when anode is made positive with respect to the cathode. Diode
conducts fully when the diode voltage is more than the cut-in voltage (0.7 V for Si).
Conducting diode will have a small voltage drop across it.
Diode is reverse biased when cathode is made positive with respect to anode. When reverse
biased, a small reverse current known as leakage current flows. This leakage current
increases with increase in magnitude of reverse voltage until avalanche voltage is reached
(breakdown voltage).
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Schottky diode.
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When Schottky diode is forward biased free electrons on n-side gain enough energy to flow
into the metal causing forward current. Since the metal does not have any holes there is no
charge storage, decreasing the recovery time. Therefore a Schottky diode can switch-off
faster than an ordinary p-n junction diode. A Schottky diode has a relatively low forward
voltage drop and reverse recovery losses. The leakage current is higher than a p-n junction
diode. The maximum allowable voltage is about 100 V. Current ratings vary from about 1 to
300 A. They are mostly used in low voltage and high current dc power supplies. The
operating frequency may be as high 100-300 kHz as the device is suitable for high frequency
application.
Comparison Between Different Types Of Diodes
General Purpose Diodes
Schottky Diodes
trr 0.1 s to 5 s
t rr = a few nanoseconds
Switching
Low
frequency
VF = 0.7V to 1.2V
Switching
High
frequency
VF = 0.8V to 1.5V
Switching
Very high.
frequency
VF 0.4V to 0.6V
B. Thyristors
Silicon Controlled Rectifiers (SCR):
The SCR has 3- terminals namely:
Anode (A), Cathode (k) and Gate(G).
Internally it is having 4-layers p-n-p-n as shown in figure (b).
Dept.ofECE/SJBIT
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10EC73
The word thyristor is coined from thyratron and transistor. It was invented in the year 1957 at
Bell Labs.
The Thyristors can be subdivided into different types
C. POWER TRANSISTORS
Transistors which have high voltage and high current rating are called power transistors.
Power transistors used as switching elements, are operated in saturation region resulting in a
low - on state voltage drop. Switching speed of transistors is much higher than the thyristors.
And they are extensively used in dc-dc and dc-ac converters with inverse parallel connected
diodes to provide bi-directional current flow. However, voltage and current ratings of power
transistor are much lower than the thyristors. Transistors are used in low to medium power
applications. Transistors are current controlled device and to keep it in the conducting state, a
continuous base current is required.
Power transistors are classified as follows
Dept.ofECE/SJBIT
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10EC73
Dept.ofECE/SJBIT
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10EC73
Controlled turn on and off characteristics (e.g. BJT, MOSFET, GTO, SITH,
IGBT, SIT, MCT).
Dept.ofECE/SJBIT
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10EC73
1. AC TO DC Converters (Rectifiers)
+
AC
Input
Voltage
Line
Commutated
Converter
DC Output
V0(QC)
-
Dept.ofECE/SJBIT
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10EC73
Fig1.4: A Single Phase Full Wave Uncontrolled Rectifier Circuit (Diode Full Wave Rectifier) using a
Center Tapped Transformer
Fig: 1.5 A Single Phase Full Wave Controlled Rectifier Circuit (using SCRs) using a Center Tapped
Transformer
Applications of Ac To Dc Converters
AC to DC power converters are widely used in
Dept.ofECE/SJBIT
Page 9
UPS.
HVDC transmission.
Battery Chargers.
10EC73
V0(RMS)
AC
Input
Voltage
fs
Vs
fs
AC
Voltage
Controller
Variable AC
RMSO/P Voltage
fS
The AC voltage controllers convert the constant frequency, fixed voltage AC supply into
variable AC voltage at the same frequency using line commutation.
AC regulators (RMS voltage controllers) are mainly used for
AC pumps.
Fig.1.6: A Single Phase AC voltage Controller Circuit (AC-AC Converter using a TRIAC)
Dept.ofECE/SJBIT
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10EC73
Vs
Cyclo
Converters
fs
Variable Frequency
AC Output
f0< fS
The cyclo converters convert power from a fixed voltage fixed frequency AC supply to a
variable frequency and variable AC voltage at the output.
The cyclo converters generally produce output AC voltage at a lower output frequency. That
is output frequency of the AC output is less than input AC supply frequency.
Applications of cyclo converters are traction vehicles and gearless rotary kilns.
3. CHOPPERS or DC TO DC Converters
+ V0(dc)
+
Vs
-
DC
Chopper
Variable DC
Output Voltage
-
The choppers are power circuits which obtain power from a fixed voltage DC supply and
convert it into a variable DC voltage. They are also called as DC choppers or DC to DC
converters. Choppers employ forced commutation to turn off the Thyristors. DC choppers are
further classified into several types depending on the direction of power flow and the type of
commutation. DC choppers are widely used in
Dept.ofECE/SJBIT
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10EC73
4. INVERTERS or DC TO AC Converters
DC
Supply
+
-
Inverter
(Forced
Commutation)
AC
Output Voltage
The inverters are used for converting DC power from a fixed voltage DC supply into an AC
output voltage of variable frequency and fixed or variable output AC voltage. The inverters
also employ force commutation method to turn off the Thyristors.
Applications of inverters are in
Uninterrupted power supplies (UPS system) used for computers, computer labs.
Dept.ofECE/SJBIT
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10EC73
These induced harmonics can cause problems of distortion of the output voltage, harmonic
generation into the supply system, and interference with the communication and signaling
circuits. It is normally necessary to introduce filters on the input side and output side of a
power converter system so as to reduce the harmonic level to an acceptable magnitude. The
figure below shows the block diagram of a generalized power converter with filters added.
The application of power electronics to supply the sensitive electronic loads poses a
challenge on the power quality issues and raises the problems and concerns to be resolved by
the researchers. The input and output quantities of power converters could be either AC or
DC. Factors such as total harmonic distortion (THD), displacement factor or harmonic factor
Dept.ofECE/SJBIT
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10EC73
(HF), and input power factor (IPF), are measures of the quality of the waveforms. To
determine these factors it is required to find the harmonic content of the waveforms. To
evaluate the performance of a converter, the input and output voltages/currents of a converter
are expressed in Fourier series. The quality of a power converter is judged by the quality of
its voltage and current waveforms.
The control strategy for the power converters plays an important part on the harmonic
generation and the output waveform distortion and can be aimed to minimize or reduce these
problems. The power converters can cause radio frequency interference due to
electromagnetic radiation and the gating circuits may generate erroneous signals. This
interference can be avoided by proper grounding and shielding.
Recommended questions:
1. State important applications of power electronics
2. What is a static power converter? Name the different types of power converters and
mention their functions.
3. Give the list of power electronic circuits of different input / output requirements.
4. What are the peripheral effects of power electronic equipments? What are the remedies
for them?
5. What are the peripheral effects of power electronic equipments? What are the remedies
for them?
Dept.ofECE/SJBIT
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10EC73
UNIT-2
POWER TRANSISTORS
Power transistors are devices that have controlled turn-on and turn-off characteristics.
These devices are used a switching devices and are operated in the saturation region resulting
in low on-state voltage drop. They are turned on when a current signal is given to base or
control terminal. The transistor remains on so long as the control signal is present. The
switching speed of modern transistors is much higher than that of Thyristors and are used
extensively in dc-dc and dc-ac converters. However their voltage and current ratings are
lower than those of thyristors and are therefore used in low to medium power applications.
Power transistors are classified as follows
Dept.ofECE/SJBIT
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10EC73
Collector
Base
Collector
Base
npn BJT
pnp BJT
Emitter
Emitter
Base
10 m
Base
Thickness
Emitter
5-20m
50-200m
10
10
10
250m
-3
cm
16
(Collector drift
region)
19
10
cm
14
cm
19
cm
-3
-3
-3
Collector
Dept.ofECE/SJBIT
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10EC73
There are four regions clearly shown: Cutoff region, Active region, quasi saturation
and hard saturation. The cutoff region is the area where base current is almost zero. Hence no
collector current flows and transistor is off. In the quasi saturation and hard saturation, the
base drive is applied and transistor is said to be on. Hence collector current flows depending
upon the load.
Quasi-saturation
- 1/Rd
Hard
Saturation
Second breakdown
iC
Active region
Primary
breakdown
IB2
IB1
0
I B<0
IB=0
IB=0
BVSUS
vCE
BVCEO
BVCBO
Dept.ofECE/SJBIT
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10EC73
The power BJT is never operated in the active region (i.e. as an amplifier) it is always
operated between cutoff and saturation. The BVSUS is the maximum collector to emitter
voltage that can be sustained when BJT is carrying substantial collector current. The BVCEO is
the maximum collector to emitter breakdown voltage that can be sustained when base current
is zero and BVCBO is the collector base breakdown voltage when the emitter is open circuited.
The primary breakdown shown takes place because of avalanche breakdown of collector base
junction. Large power dissipation normally leads to primary breakdown.
The second breakdown shown is due to localized thermal runaway.
Transfer Characteristics
I E IC I B
h fE
IC
IB
I C I B I CEO
Dept.ofECE/SJBIT
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10EC73
IB
VB VBE
RB
VC VCE VCC I C RC
VC VCC
RC VB VBE
RB
.... 1
Equation (1) shows that as long as VCE VBE the CBJ is reverse biased and transistor is in
active region, The maximum collector current in the active region, which can be obtained by
setting VCB 0 and VBE VCE is given as
I CM
VCC VCE
RC
I BM
I CM
If the base current is increased above I BM , VBE increases, the collector current increases and
VCE falls below VBE . This continues until the CBJ is forward biased with VBC of about 0.4 to
0.5V, the transistor than goes into saturation. The transistor saturation may be defined as the
point above which any increase in the base current does not increase the collector current
significantly.
In saturation, the collector current remains almost constant. If the collector emitter voltage is
VCE sat the collector current is
Dept.ofECE/SJBIT
Page 19
I CS
VCC VCESAT
RC
I BS
I CS
10EC73
Normally the circuit is designed so that I B is higher that I BS . The ratio of I B to I BS is called
to overdrive factor ODF.
ODF
IB
I BS
forced
I CS
IB
A high value of ODF cannot reduce the CE voltage significantly. However VBE increases due
to increased base current resulting in increased power loss. Once the transistor is saturated,
the CE voltage is not reduced in relation to increase in base current. However the power is
increased at a high value of ODF, the transistor may be damaged due to thermal runaway. On
the other hand if the transistor is under driven I B I BS it may operate in active region, VCE
increases resulting in increased power loss.
Problems
1. The BJT is specified to have a range of 8 to 40. The load resistance in Re 11 . The
dc supply voltage is VCC=200V and the input voltage to the base circuit is VB=10V. If
VCE(sat)=1.0V and VBE(sat)=1.5V. Find
a. The value of RB that results in saturation with a overdrive factor of 5.
b. The forced f .
c. The power loss PT in the transistor.
Solution
ICS
(a)
200 1.0
18.1A
11
18.1
2.2625 A
8
Therefore
I BS
Therefore
I B ODF I BS 11.3125 A
Dept.ofECE/SJBIT
min
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10EC73
IB
(b)
VB VBE ( sat )
Therefore
RB
Therefore
RB
VB VBE ( sat )
IB
10 1.5
0.715
11.3125
I CS
18.1
1.6
I B 11.3125
PT VBE I B VCE I C
PT 1.5 11.3125 1.0 18.1
(c)
ICS
I BS
Also
(a)
IB
RC
I CS
min
Forced f
40 1.2
25.86 A
1.5
25.86
2.15 A
12
VB VBE ( sat )
Therefore
(c)
RB
ODF
6 1.6
6.28 A
0.7
I B 6.28
2.92
I BS 2.15
I CS 25.86
4.11
IB
6.28
PT VBE I B VCE I C
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10EC73
VB 10V ,
RB 0.75,
VCC 200V
Solution
IB
(i)
VB VBE sat
ICS
Therefore
I BS
RB
min
10 1.5
11.33 A
0.75
200 1.0
18.09 A
11
18.09
2.26 A
8
I CS 18.09
1.6
I B 11.33
I B 11.33
5.01
I BS
2.26
(ii)
ODF
(iii)
4. A simple transistor switch is used to connect a 24V DC supply across a relay coil,
which has a DC resistance of 200. An input pulse of 0 to 5V amplitude is applied
through series base resistor RB at the base so as to turn on the transistor switch.
Sketch the device current waveform with reference to the input pulse.
Calculate
a. I CS .
b. Value of resistor RB , required to obtain over drive factor of two.
Dept.ofECE/SJBIT
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10EC73
c. Total power dissipation in the transistor that occurs during the saturation state.
+ VCC=24V
200
D
Relay
Coil
I/P
5V
RB
=25 to 100
VCE(sat)=0.2V
VBE(sat)=0.7V
vB
5
0
iC
ICS
=L/RL
t
iL
=L/RL
=L/RL+Rf
Solution
To sketch the device current waveforms; current through the device cannot
rise fast to the saturating level of I CS since the inductive nature of the coil opposes any
change in current through it. Rate of rise of collector current can be determined by the
L
time constant 1 . Where L is inductive in Henry of coil and R is resistance of coil.
R
Once steady state value of I CS is reached the coil acts as a short circuit. The collector
current stays put at I CS till the base pulse is present.
Similarly once input pulse drops to zero, the current I C does not fall to zero
immediately since inductor will now act as a current source. This current will now
decay at the fall to zero. Also the current has an alternate path and now can flow
through the diode.
Dept.ofECE/SJBIT
Page 23
(i)
ICS
(ii)
Value of RB
I BS
RC
I CS
min
10EC73
24 0.2
0.119 A
200
0.119
4.76mA
25
RB
(iii)
VB VBE sat
IB
5 0.7
450
9.52
PT VBE sat I B VCE sat ICS 0.7 9.52 0.2 0.119 6.68W
Switching Characteristics
A forward biased p-n junction exhibits two parallel capacitances; a depletion layer
capacitance and a diffusion capacitance. On the other hand, a reverse biased p-n junction has
only depletion capacitance. Under steady state the capacitances do not play any role.
However under transient conditions, they influence turn-on and turn-off behavior of the
transistor.
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10EC73
Due to internal capacitances, the transistor does not turn on instantly. As the voltage
VB rises from zero to V1 and the base current rises to IB1, the collector current does not
respond immediately. There is a delay known as delay time td, before any collector current
flows. The delay is due to the time required to charge up the BEJ (Base emitter Junction) to
the forward bias voltage VBE(0.7V). The collector current rises to the steady value of ICS and
this time is called rise time tr.
The base current is normally more than that required to saturate the transistor. As a result
excess minority carrier charge is stored in the base region. The higher the ODF, the greater is
the amount of extra charge stored in the base. This extra charge which is called the saturating
charge is proportional to the excess base drive.
This extra charge which is called the saturating charge is proportional to the excess base
drive and the corresponding current Ie.
Ie I B
I CS
ODF .I BS I BS I BS ODF 1
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10EC73
ton td tr
toff ts t f
Problems
1. For a power transistor, typical switching waveforms are shown. The various
parameters of the transistor circuit are as under Vcc 220V , VCE ( sat ) 2V , I CS 80 A ,
tr 1 s ,
td 0.4 s ,
ts 3 s ,
tn 50 s ,
t f 2 s ,
t0 40 s ,
f 5Khz ,
I CEO 2mA . Determine average power loss due to collector current during t on and tn.
Find also the peak instantaneous power loss, due to collector current during turn-on
time.
Solution
During delay time, the time limits are 0 t td . Figure shows that in this time
ic t ICEO and VCE t VCC . Therefore instantaneous power loss during delay time is
1
Pd ic t vCE t dt
T 0
td
Pd
1
ICEOVCC dt
T 0
Pd f .I CEOVCC td
Pd 5x103 2 103 220 0.4 106 0.88mW
I CS
t
tr
t
vCE t VCC VCE ( sat ) VCC
t
Dept.ofECE/SJBIT
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10EC73
t
t VCC VCE sat VCC dt
tr
V V
V
Pr f .I CS tr CC CC CES
3
2
Pr
1 r I CS
T 0 tr
220 220 2
Pr 5 x103 80 1106
14.933W
3
2
Instantaneous power loss during rise time is
V V sat
t VCC CC CE
t
tr
Pr t
ICS
tr
Pr t
ICS
I 2
tVCC CSt2 VCC VCE sat
tr
tr
Differentiating the above equation and equating it to zero will give the time tm at
which instantaneous power loss during tr would be maximum.
Therefore
2 VCC VCEsat
dt
tr
tr
At t tm ,
dPr t
0
dt
Therefore
I CS
2I t
VCC CS2 m VCC VCE sat
tr
tr
I CS
2I t
Vcc CS2 m VCC VCE sat
tr
tr
trVCC
tm VCC VCE sat
2
Therefore
tm
Therefore
tm
trVCC
2 VCC VCE sat
VCC tr
2 VCC VCE sat
220 1106
0.5046 s
2 200 2
Peak instantaneous power loss Prm during rise time is obtained by substituting the
value of t=tm in equation (1) we get
Dept.ofECE/SJBIT
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10EC73
2
I CS
VCC 2tr
I CS VCC tr VCC VCE sat
Prm
2
tr 2 VCC VCE sat tr 2
4
V
CC
CE sat
2
80 220
Prm
4440.4W
4 220 2
1 n
Pn iC vCE dt fI CSVCES tn 5 103 80 2 50 106 40W
T0
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The dc FBSOA is shown as shaded area and the expansion of the area for pulsed
operation of the BJT with shorter switching times which leads to larger FBSOA. The second
break down boundary represents the maximum permissible combinations of voltage and
current without getting into the region of ic vce plane where second breakdown may occur.
The final portion of the boundary of the FBSOA is breakdown voltage limit BVCEO .
3. Reverse Biased Safe Operating Area RBSOA
During turn-off, a high current and high voltage must be sustained by the transistor, in
most cases with the base-emitter junction reverse biased. The collector emitter voltage must
be held to a safe level at or below a specified value of collector current. The manufacturer
provide I c Vce limits during reverse-biased turn off as reverse biased safe area (RBSOA).
iC
ICM
VBE(off)<0
VBE(off)=0
vCE
BVCEO
BVCBO
Fig.2.8: RBSOA of a Power BJT
The area encompassed by the RBSOA is somewhat larger than FBSOA because of the
extension of the area of higher voltages than BVCEO upto BVCBO at low collector currents.
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This operation of the transistor upto higher voltage is possible because the combination of
low collector current and reverse base current has made the beta so small that break down
voltage rises towards BVCBO .
4. Power Derating
The thermal equivalent is shown. If the total average power loss is PT ,
The case temperature is
Tc T j PT T jc .
Ts Tc PT TCS
0
RSA : Thermal resistance from sink to ambient C
5. Breakdown Voltages
A break down voltage is defined as the absolute maximum voltage between two
terminals with the third terminal open, shorted or biased in either forward or reverse
direction.
BVSUS : The maximum voltage between the collector and emitter that can be sustained across
circuited.
BVCBO : This is the collector to base break down voltage when emitter is open circuited.
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I
on, F CS forced resulting in low forces at the beginning. After turn on, F can
IB
IB
IBS
t
-IB2
Turn-on Control.
Turn-off Control.
Antisaturation Control
Turn-On Control
When input voltage is turned on, the base current is limited by resistor R1 and
therefore initial value of base current is I BO
Capacitor voltage
Dept.ofECE/SJBIT
VC V1
V V
V1 VBE
, I BF 1 BE .
R1 R2
R1
R2
.
R1 R2
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Therefore
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R1 R2
C1
R1 R2
Once input voltage v B becomes zero, the base-emitter junction is reverse biased and C1
discharges through R2. The discharging time constant is 2 R2C1 . To allow sufficient
charging and discharging time, the width of base pulse must be t1 5 1 and off period of the
pulse must be t2 5 2 .The maximum switching frequency is f s
1
1
0.2
.
T t1 t2 1 2
Turn-Off Control
If the input voltage is changed to during turn-off the capacitor voltage VC is added to
V2 as reverse voltage across the transistor. There will be base current peaking during turn off.
As the capacitor C1 discharges, the reverse voltage will be reduced to a steady state value, V2
. If different turn-on and turn-off characteristics are required, a turn-off circuit using
The diode D1 isolates the forward base drive circuit from the
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and additional arrangement is necessary to discharge capacitor C1 and reset the transformer
core during turn-off of the power transistor.
Antisaturation Control
If a transistor is driven hard, the storage time which is proportional to the base current
increases and the switching speed is reduced. The storage time can be reduced by operating
the transistor in soft saturation rather than hard saturation. This can be accomplished by
clamping CE voltage to a pre-determined level and the collector current is given by
V VCM
I C CC
.
RC
Where VCM is the clamping voltage and VCM VCE sat .
The base current which is adequate to drive the transistor hard, can be found from
V VD1 VBE
I B I1 B
and the corresponding collector current is I C I L I B .
RB
Writing the loop equation for the input base circuit,
Vab VD1 VBE
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Similarly
Therefore
This means that the CE voltage is raised above saturation level and there are no excess
carriers in the base and storage time is reduced.
The load current is I L
RC
RC
with clamping is I C I B I1 I C I L
I1 I L
For clamping, VD1 VD2 and this can be accomplished by connecting two or more
diodes in place of D1 . The load resistance RC should satisfy the condition I B I L ,
I B RC VCC VBE VD VD .
1
The clamping action thus results a reduced collector current and almost elimination of
the storage time. At the same time, a fast turn-on is accomplished.
However, due to increased VCE , the on-state power dissipation in the transistor is
increased, whereas the switching power loss is decreased.
ADVANTAGES OF BJTS
BJTs have high switching frequencies since their turn-on and turn-off time is low.
BJT has controlled turn-on and turn-off characteristics since base drive control is
possible.
DEMERITS OF BJT
It has the problem of charge storage which sets a limit on switching frequencies.
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Enhancementtype MOSFET
It consists of a highly doped p-type substrate into which two blocks of heavily doped
n-type material are diffused to form a source and drain. A n-channel is formed by diffusing
between source and drain. A thin layer of SiO2 is grown over the entire surface and holes are
cut in SiO2 to make contact with n-type blocks. The gate is also connected to a metal contact
surface but remains insulated from the n-channel by the SiO2 layer. SiO2 layer results in an
extremely high input impedance of the order of 1010 to 1015 for this area.
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Operation
When VGS 0V and VDS is applied and current flows from drain to source similar to
JFET. When VGS 1V , the negative potential will tend to pressure electrons towards the ptype substrate and attracts hole from p-type substrate. Therefore recombination occurs and
will reduce the number of free electrons in the n-channel for conduction. Therefore with
increased negative gate voltage I D reduces.
For positive values, Vgs , additional electrons from p-substrate will flow into the channel and
establish new carriers which will result in an increase in drain current with positive gate
voltage.
Drain Characteristics
Transfer Characteristics
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Basic Construction
A slab of p-type material is formed and two n-regions are formed in the substrate. The source
and drain terminals areconnected through metallic contacts to n-doped regions, but the
absence of a channel between the doped n-regions. The SiO2 layer is still present to isolate
the gate metallic platform from the region between drain and source, but now it is separated
by a section of p-type material.
Operation
If VGS 0V and a voltage is applied between the drain and source, the absence of a
n-channel will result in a current of effectively zero amperes. With VDS set at some positive
voltage and VGS set at 0V, there are two reverse biased p-n junction between the n-doped
regions and p substrate to oppose any significant flow between drain and source.
If both VDS and VGS have been set at some positive voltage, then positive potential at the gate
will pressure the holes in the p-substrate along the edge of SiO2 layer to leave the area and
enter deeper region of p-substrate. However the electrons in the p-substrate will be attracted
to the positive gate and accumulate in the region near the surface of the SiO2 layer. The
negative carriers will not be absorbed due to insulating SiO2 layer, forming an inversion
layer which results in current flow from drain to source.
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The level of VGS that result in significant increase in drain current is called threshold voltage
VT . As VGS increases the density of free carriers will increase resulting in increased level of
drain current. If VGS is constant VDS is increased; the drain current will eventually reach a
saturation level as occurred in JFET.
Drain Characteristics
Transfer Characteristics
Power MOSFETS
Power MOSFETs are generally of enhancement type only. This MOSFET is turned
ON when a voltage is applied between gate and source. The MOSFET can be turned OFF
by removing the gate to source voltage. Thus gate has control over the conduction of the
MOSFET. The turn-on and turn-off times of MOSFETs are very small. Hence they operate
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at very high frequencies; hence MOSFETs are preferred in applications such as choppers
and inverters. Since only voltage drive (gate-source) is required, the drive circuits of
MOSFET are very simple. The paralleling of MOSFETs is easier due to their positive
temperature coefficient. But MOSFTSs have high on-state resistance hence for higher
currents; losses in the MOSFETs are substantially increased. Hence MOSFETs are used for
low power applications.
VGS
Source
Silicon
dioxide
Load
Source
Metal
Gate
- +
- +
- +
- +
- +
- +
+
-- --
-- --
n
-
Current path
J3
p
VDD
n substrate
Drain
Metal layer
Construction
Power MOSFETs have additional features to handle larger powers. On the n
substrate high resistivity n layer is epitaxially grown. The thickness of n layer determines
the voltage blocking capability of the device. On the other side of n substrate, a metal layer
is deposited to form the drain terminal. Now p regions are diffused in the epitaxially grown
n layer. Further n regions are diffused in the p regions as shown. SiO2 layer is added,
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Gate Drive
The turn-on time can be reduced by connecting a RC circuit as shown to charge the
capacitance faster. When the gate voltage is turned on, the initial charging current of the
capacitance is
IG
VG
.
RS
RGVG
.
RS R1 RG
ID
Gate Signal
RS
+
-
RD
C1
R1
VG
VDD
RG
+VCC
ID
RD
NPN
M1
VDD
Vin
VD
VDS(on)
+
-
PNP
VS
VD VDD I D RD , VS VD VDS b on g , VS VD
Fig.2.21: Fast turn on gate drive circuit 2
The above circuit is used in order to achieve switching speeds of the order of 100nsec or
less. The above circuit as low output impedance and the ability to sink and source large
currents. A totem poll arrangement that is capable of sourcing and sinking a large current is
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achieved by the PNP and NPN transistors. These transistors act as emitter followers and offer
a low output impedance. These transistors operate in the linear region therefore minimize the
delay time. The gate signal of the power MOSFET may be generated by an op-amp. Let Vin
be a negative voltage and initially assume that the MOSFET is off therefore the non-inverting
terminal of the op-amp is at zero potential. The op-amp output is high therefore the NPN
transistor is on and is a source of a large current since it is an emitter follower. This enables
the gate-source capacitance Cgs to quickly charge upto the gate voltage required to turn-on the
power MOSFET. Thus high speeds are achieved. When Vin becomes positive the output of
op-amp becomes negative the PNP transistor turns-on and the gate-source capacitor quickly
discharges through the PNP transistor. Thus the PNP transistor acts as a current sink and the
MOSFET is quickly turned-off. The capacitor C helps in regulating the rate of rise and fall of
the gate voltage thereby controlling the rate of rise and fall of MOSFET drain current. This
can be explained as follows
If ID increases VDS reduces. Therefore the positive terminal of op-amp which is tied
to the source terminal of the MOSFET feels this reduction and this reduction is
transmitted to gate through the capacitor C and the gate voltage reduces and the
drain current is regulated by this reduction.
Power MOSFETS have lower switching losses but its on-resistance and conduction
losses are more. A BJT has higher switching loss bit lower conduction loss. So at high
frequency applications power MOSFET is the obvious choice. But at lower operating
frequencies BJT is superior.
MOSFET has positive temperature coefficient for resistance. This makes parallel
operation of MOSFETs easy. If a MOSFET shares increased current initially, it heats
up faster, its resistance increases and this increased resistance causes this current to
shift to other devices in parallel. A BJT is a negative temperature coefficient, so
current shaving resistors are necessary during parallel operation of BJTs.
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2.7 IGBT
The metal oxide semiconductor insulated gate transistor or IGBT combines the advantages of
BJTs and MOSFETs. Therefore an IGBT has high input impedance like a MOSFET and
low-on state power loss as in a BJT. Further IGBT is free from second breakdown problem
present in BJT.
Emitter
Emitter
Gate
Metal
Load
- - - - - - +++++++
-- --
-- --
n
p
VCC
Silicon
dioxide
J3
p
-
p substrate
Current path
Collector
J2
J1
Metal layer
It is constructed virtually in the same manner as a power MOSFET. However, the substrate is
now a p layer called the collector.
When gate is positive with respect to positive with respect to emitter and with gate emitter
voltage greater than VGSTH , an n channel is formed as in case of power MOSFET. This n
channel short circuits the n region with n emitter regions.
An electron movement in the n channel in turn causes substantial hole injection from p
substrate layer into the epitaxially n layer. Eventually a forward current is established.
The three layers p , n and p constitute a pnp transistor with p as emitter, n as base and
p as collector. Also n , p and n layers constitute a npn transistor. The MOSFET is formed
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with input gate, emitter as source and n region as drain. Equivalent circuit is as shown
below.
E
J3
npn
p
-
pnp
+
p substrate
J2
J1
Also p serves as collector for pnp device and also as base for npn transistor. The two pnp and
npn is formed as shown.
When gate is applied VGS VGSth MOSFET turns on. This gives the base drive to T1 .
Therefore T1 starts conducting. The collector of T1 is base of T2 . Therefore regenerative
action takes place and large number of carriers are injected into the n drift region. This
reduces the ON-state loss of IGBT just like BJT.
When gate drive is removed IGBT is turn-off. When gate is removed the induced channel
will vanish and internal MOSFET will turn-off. Therefore T1 will turn-off it T2 turns off.
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Structure of IGBT is such that R1 is very small. If R1 small T1 will not conduct therefore
IGBTs are different from MOSFETs since resistance of drift region reduces when gate
drive is applied due to p injecting region. Therefore ON state IGBT is very small.
Applications
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Widely used in medium power applications such as DC and AC motor drives, UPS systems,
Power supplies for solenoids, relays and contractors.
Though IGBTs are more expensive than BJTs, they have lower gate drive requirements,
lower switching losses. The ratings up to 1200V, 500A.
2.8 di dt and dv dt Limitations
Transistors require certain turn-on and turn-off times. Neglecting the delay time td
and the storage time ts , the typical voltage and current waveforms of a BJT switch is shown
below.
di I L I cs
dt tr
tr
...(1)
During turn off, the collector emitter voltage must rise in relation to the fall of the
collector current, and is
dv Vs Vcc
...(2)
dt t f
tf
The conditions di dt and dv dt in equation (1) and (2) are set by the transistor
switching characteristics and must be satisfied during turn on and turn off. Protection circuits
are normally required to keep the operating di dt and dv dt within the allowable limits of
transistor. A typical switch with di dt and dv dt protection is shown in figure (a), with
operating wave forms in figure (b). The RC network across the transistor is known as the
snubber circuit or snubber and limits the dv dt . The inductor LS , which limits the di dt , is
sometimes called series snubber.
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Let us assume that under steady state conditions the load current I L is freewheeling through
diode Dm , which has negligible reverse reco`very time. When transistor Q1 is turned on, the
collector current rises and current of diode Dm falls, because Dm will behave as short
circuited. The equivalent circuit during turn on is shown in figure below
The turn on di dt is
di Vs
dt Ls
...(3)
Vs tr
IL
...(4)
During turn off, the capacitor C s will charge by the load current and the equivalent
circuit is shown in figure. The capacitor voltage will appear across the transistor and the
dv dt is
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dv I L
dt Cs
...(5)
Equating equation (2) to equation (5) gives the required value of capacitance,
Cs
I Lt f
Vs
...(6)
Once the capacitor is charge to Vs , the freewheeling diode will turn on. Due to the
energy stored in Ls , there will be damped resonant circuit as shown in figure . The RLC
circuit is normally made critically damped to avoid oscillations. For unity critical damping,
R C
yields
1 , and equation
0 2 L
Rs 2
Ls
Cs
The capacitor C s has to discharge through the transistor and the increase the peak
current rating of the transistor. The discharge through the transistor can be avoided by placing
resistor Rs across C s instead of placing Rs across Ds .
The discharge current is shown in figure below. When choosing the value of Rs , the
discharge time, Rs Cs s should also be considered. A discharge time of one third the
switching period, Ts is usually adequate.
3Rs Cs Ts
Rs
1
fs
1
3 f s Cs
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+
M1
M3
G3
RL
S3
G1
S1
VS
M4
M2
G2
S2
G1
g1
G2
g2
G3
g3
G4
g4
Logic
generator
G4
S4
C
(b) Logic generator
Vg1,Vg2
VG
0
t
Vg3,Vg4
VG
0
Gate pulses
ID
+
G
+
VG
VGs
VDD
RD=RL
VGS VG I D RD
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There are two ways of floating or isolating control or gate signal with respect to ground.
Pulse transformers
Optocouplers
Pulse Transformers
Pulse transformers have one primary winding and can have one or more secondary
windings.
Multiple secondary windings allow simultaneous gating signals to series and parallel
connected transistors. The transformer should have a very small leakage inductance and the
rise time of output should be very small.
The transformer would saturate at low switching frequency and output would be distorted.
IC
RC
RB
Q1
V1
Logic
drive
circuit
+
VCC
-V2
Optocouplers
Optocouplers combine infrared LED and a silicon photo transistor. The input signal is
applied to ILED and the output is taken from the photo transistor. The rise and fall times of
photo transistor are very small with typical values of turn on time = 2.5 s and turn off of
300ns. This limits the high frequency applications. The photo transistor could be a darlington
pair. The phototransistor requires separate power supply and adds to complexity and cost and
weight of driver circuits.
Optocoupler
+VCC
ID
R2
1
Vg1
RB
-
1
R1
Q1
ID
R3
0
Q3
VDD
M1
G
RG
S
RD
Recommended questions:
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UNIT-3
THYRISTORS
A thyristor is the most important type of power semiconductor devices. They are
extensively used in power electronic circuits. They are operated as bi-stable switches from
non-conducting to conducting state.
A thyristor is a four layer, semiconductor of p-n-p-n structure with three p-n junctions. It has
three terminals, the anode, cathode and the gate.
The word thyristor is coined from thyratron and transistor. It was invented in the year 1957 at
Bell Labs. The Different types of Thyristors are
TRIAC
DIAC
Fig.: Symbol
The SCR is a four layer three terminal device with junctions J1 , J 2 , J 3 as shown. The
construction of SCR shows that the gate terminal is kept nearer the cathode. The approximate
thickness of each layer and doping densities are as indicated in the figure. In terms of their
lateral dimensions Thyristors are the largest semiconductor devices made. A complete silicon
wafer as large as ten centimeter in diameter may be used to make a single high power
thyristor.
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Cathode
Gate
n
J3
19
10
-3
cm
n
17
10
cm
19
10
-3
cm
-3
J2
J1
13
14
10
10 cm
-5 x 10
17
-3
19
-3
cm
-3
10m
30-100m
50-1000m
30-50m
10 cm
Anode
Qualitative Analysis
When the anode is made positive with respect the cathode junctions J1 & J 3 are
forward biased and junction J 2 is reverse biased. With anode to cathode voltage V AK being
small, only leakage current flows through the device. The SCR is then said to be in the
forward blocking state. If V AK is further increased to a large value, the reverse biased junction
J 2 will breakdown due to avalanche effect resulting in a large current through the device.
The voltage at which this phenomenon occurs is called the forward breakdown voltage VBO .
Since the other junctions J1 & J 3 are already forward biased, there will be free movement of
carriers across all three junctions resulting in a large forward anode current. Once the SCR is
switched on, the voltage drop across it is very small, typically 1 to 1.5V. The anode current is
limited only by the external impedance present in the circuit.
Although an SCR can be turned on by increasing the forward voltage beyond VBO , in practice,
the forward voltage is maintained well below VBO and the SCR is turned on by applying a
positive voltage between gate and cathode. With the application of positive gate voltage, the
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leakage current through the junction J 2 is increased. This is because the resulting gate
current consists mainly of electron flow from cathode to gate. Since the bottom end layer is
heavily doped as compared to the p-layer, due to the applied voltage, some of these electrons
reach junction J 2 and add to the minority carrier concentration in the p-layer. This raises the
reverse leakage current and results in breakdown of junction J 2 even though the applied
forward voltage is less than the breakdown voltage VBO . With increase in gate current
breakdown occurs earlier.
V-I Characteristics
RL
A
VAA
K
VGG
Fig.3.3 Circuit
A typical V-I characteristics of a thyristor is shown above. In the reverse direction the
thyristor appears similar to a reverse biased diode which conducts very little current until
avalanche breakdown occurs. In the forward direction the thyristor has two stable states or
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modes of operation that are connected together by an unstable mode that appears as a
negative resistance on the V-I characteristics. The low current high voltage region is the
forward blocking state or the off state and the low voltage high current mode is the on state.
For the forward blocking state the quantity of interest is the forward blocking voltage VBO
which is defined for zero gate current. If a positive gate current is applied to a thyristor then
the transition or break over to the on state will occur at smaller values of anode to cathode
voltage as shown. Although not indicated the gate current does not have to be a dc current but
instead can be a pulse of current having some minimum time duration. This ability to switch
the thyristor by means of a current pulse is the reason for wide spread applications of the
device.
However once the thyristor is in the on state the gate cannot be used to turn the device off.
The only way to turn off the thyristor is for the external circuit to force the current through
the device to be less than the holding current for a minimum specified time period.
Holding Current I H
After an SCR has been switched to the on state a certain minimum value of anode
current is required to maintain the thyristor in this low impedance state. If the anode current
is reduced below the critical holding current value, the thyristor cannot maintain the current
through it and reverts to its off state usually I is associated with turn off the device.
Latching Current I L
After the SCR has switched on, there is a minimum current required to sustain conduction.
This current is called the latching current. I L associated with turn on and is usually greater
than holding current.
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The gate voltage is plotted with respect to gate current in the above characteristics. Ig(max)
is the maximum gate current that can flow through the thyristor without damaging it
Similarly Vg(max)is the maximum gate voltage to be applied. Similarly Vg (min)and Ig(min) are
minimum gate voltage and current, below which thyristor will not be turned-on. Hence to
turn-on the thyristor successfully the gate current and voltage should be
Ig(min)<Ig < Ig(max)
Vg (min) <Vg <Vg (max)
The characteristic of Fig. 3.6 also shows the curve for constant gate power (Pg). Thus for
reliable turn-on, the (Vg, Ig)point must lie in the shaded area in Fig. 3.6. It turns-on thyristor
successfully. Note that any spurious voltage/current spikes at the gate must be less than Vg
(min)and Ig(min) to avoid false triggering of the thyristor. The gate characteristics shown in Fig.
3.6 are for DC values of gate voltage and current.
3.2.1 Pulsed
Gate Drive
Instead of applying a continuous (DC) gate drive, the pulsed gate drive is used. The gate
voltage and current are applied in the form of high frequency pulses. The frequency of these
pulses is upto l0 kHz. Hence the width of the pulse can be upto 100 micro seconds. The pulsed
gate drive is applied for following reasons (advantages):
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i) The thyristor has small turn-on time i.e. upto 5microseconds. Hence a pulse
of gate drive is sufficient to turn-on the thyristor.
ii) Once thyristor turns-on, there is no need of gate drive. Hence gate drive in
the form of pulses is suitable.
iii)
The DC gate voltage and current increases losses in the thyristor. Pulsed gate
drive has reduced losses.
iv)
The pulsed gate drive can be easily passed through isolation transformers to isolate
thyristor and trigger circuit.
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I C I B 1 I CBO
I C I E I CBO
I E IC I B
I B I E 1 I CBO
The SCR can be considered to be made up of two transistors as shown in above figure.
Considering PNP transistor of the equivalent circuit,
I E 1 I A , I C I C1 , 1 , I CBO I CBO1 , I B I B1
I B1 I A 1 1 I CBO1
I C I C2 , I B I B2 , I E2 I K I A I G
I C2 2 I k I CBO2
I C2 2 I A I G I CBO2
I C2 I B1
IA
2 I g I CBO1 I CBO 2
1 1 2
I CBO1 ICBO2
1 1 2
The gain 1 of transistor T1 varies with its emitter current I E I A . Similarly varies with
I E I A I g I K . In this case, with I g 0 , 2 varies only with I A . Initially when the applied
forward voltage is small, 1 2 1 .
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If however the reverse leakage current is increased by increasing the applied forward voltage,
the gains of the transistor increase, resulting in 1 2 1.
From the equation, it is seen that when 1 2 1, the anode current I A tends towards .
This explains the increase in anode current for the break over voltage VB 0 .
I C2 2 I 2 2 I g ,
current
through
T,
is
established.
Therefore,
When the SCR is turned on with the application of the gate signal, the SCR does not conduct
fully at the instant of application of the gate trigger pulse. In the beginning, there is no
appreciable increase in the SCR anode current, which is because, only a small portion of the
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silicon pellet in the immediate vicinity of the gate electrode starts conducting. The duration
between 90% of the peak gate trigger pulse and the instant the forward voltage has fallen to
90% of its initial value is called the gate controlled / trigger delay time t gd . It is also defined
as the duration between 90% of the gate trigger pulse and the instant at which the anode
current rises to 10% of its peak value. t gd is usually in the range of 1sec.
Once t gd has lapsed, the current starts rising towards the peak value. The period during which
the anode current rises from 10% to 90% of its peak value is called the rise time. It is also
defined as the time for which the anode voltage falls from 90% to 10% of its peak value. The
summation of t gd and tr gives the turn on time t on of the thyristor.
Thyristor Turn OFF Characteristics
VAK
tC
tq
t
IA
Anode current
begins to
decrease
Commutation
di
dt
Recovery
t1 t2
Recombination
t3
t4
t5
t
tq=device
off time
tc=circuit
off time
tgr
trr
tq
tc
When an SCR is turned on by the gate signal, the gate loses control over the device and the
device can be brought back to the blocking state only by reducing the forward current to a
level below that of the holding current. In AC circuits, however, the current goes through a
natural zero value and the device will automatically switch off. But in DC circuits, where no
neutral zero value of current exists, the forward current is reduced by applying a reverse
voltage across anode and cathode and thus forcing the current through the SCR to zero.
Dept.ofECE/SJBIT
Page 60
10EC73
As in the case of diodes, the SCR has a reverse recovery time t rr which is due to charge
storage in the junctions of the SCR. These excess carriers take some time for recombination
resulting in the gate recovery time or reverse recombination time t gr . Thus, the turn-off time
tq is the sum of the durations for which reverse recovery current flows after the application of
reverse voltage and the time required for the recombination of all excess carriers present. At
the end of the turn off time, a depletion layer develops across J 2 and the junction can now
withstand the forward voltage. The turn off time is dependent on the anode current, the
magnitude of reverse V g applied ad the magnitude and rate of application of the forward
voltage. The turn off time for converte grade SCRs is 50 to 100sec and that for inverter
grade SCRs is 10 to 20sec.
To ensure that SCR has successfully turned off , it is required that the circuit off time tc be
greater than SCR turn off time tq .
Thyristor Turn ON
Thermal Turn on: If the temperature of the thyristor is high, there will be an increase
in charge carriers which would increase the leakage current. This would cause an
increase in 1 & 2 and the thyristor may turn on. This type of turn on many cause
thermal run away and is usually avoided.
LASCR: Light activated SCRs are turned on by allowing light to strike the silicon
wafer.
High Voltage Triggering: This is triggering without application of gate voltage with
only application of a large voltage across the anode-cathode such that it is greater than
the forward breakdown voltage VBO . This type of turn on is destructive and should be
avoided.
Gate Triggering: Gate triggering is the method practically employed to turn-on the
thyristor. Gate triggering will be discussed in detail later.
dv
Triggering: Under transient conditions, the capacitances of the p-n junction will
dt
influence the characteristics of a thyristor. If the thyristor is in the blocking state, a
rapidly rising voltage applied across the device would cause a high current to flow
through the device resulting in turn-on. If i j2 is the current throught the junction j2 and
C j2 is the junction capacitance and V j2 is the voltage across j2 , then
ij 2
Dept.ofECE/SJBIT
C j dVJ 2
dC j2
dq2 d
C j Vj 2
V j2
2
2
dt
dt
dt
dt
Page 61
10EC73
dv
is large, 1 j2 will be large. A high value of
dt
dv
charging current may damage the thyristor and the device must be protected against high
.
dt
dv
The manufacturers specify the allowable
.
dt
From the above equation, we see that if
Thyristor Ratings
First Subscript
Second Subscript
D off state
W working
TON state
R Repetitive
F Forward
S Surge or non-repetitive
Third Subscript
M Peak Value
R Reverse
VOLTAGE RATINGS
VDWM : This specifies the peak off state working forward voltage of the device. This specifies
the maximum forward off state voltage which the thyristor can withstand during its working.
VDRM : This is the peak repetitive off state forward voltage that the thyristor can block
Dept.ofECE/SJBIT
Page 62
10EC73
VDSM : This is the peak off state surge / non-repetitive forward voltage that will occur across
the thyristor.
VRWM : This the peak reverse working voltage that the thyristor can withstand in the reverse
direction.
VRRM : It is the peak repetitive reverse voltage. It is defined as the maximum permissible
instantaneous value of repetitive applied reverse voltage that the thyristor can block in
reverse direction.
VRSM : Peak surge reverse voltage. This rating occurs for transient conditions for a specified
time duration.
VTM : Peak on state voltage. This is specified for a particular anode current and junction
temperature.
dv
rating: This is the maximum rate of rise of anode voltage that the SCR has to withstand
dt
dv
and which will not trigger the device without gate signal (refer
triggering).
dt
Current Rating
ITaverage : This is the on state average current which is specified at a particular temperature.
Latching current, I L : After the SCR has switched on, there is a minimum current required to
sustain conduction. This current is called the latching current. I L associated with turn on and
is usually greater than holding current
Dept.ofECE/SJBIT
Page 63
10EC73
Holding current, I H : After an SCR has been switched to the on state a certain minimum
value of anode current is required to maintain the thyristor in this low impedance state. If the
anode current is reduced below the critical holding current value, the thyristor cannot
maintain the current through it and reverts to its off state usually I is associated with turn off
the device.
di
rating: This is a non repetitive rate of rise of on-state current. This maximum value of rate
dt
of rise of current is which the thyristor can withstand without destruction. When thyristor is
switched on, conduction starts at a place near the gate. This small area of conduction spreads
di
rapidly and if rate of rise of anode current
is large compared to the spreading velocity of
dt
carriers, local hotspots will be formed near the gate due to high current density. This causes
the junction temperature to rise above the safe limit and the SCR may be damaged
di
permanently. The
rating is specified in A sec .
dt
Gate Specifications
I GT : This is the required gate current to trigger the SCR. This is usually specified as a DC
value.
VGT : This is the specified value of gate voltage to turn on the SCR (dc value).
VGD : This is the value of gate voltage, to switch from off state to on state. A value below this
QRR : Amount of charge carriers which have to be recovered during the turn off process.
Rthjc : Thermal resistance between junction and outer case of the device.
Dept.ofECE/SJBIT
R-triggering.
Page 64
10EC73
RC triggering.
UJT triggering.
LOAD
R1
R2
vS=Vmsint
VT
Vg
VS
VS
Vmsint
3
Vg
Vo
VS
Vg
Vgt
Vgp
Vg
Vgp=Vgt
Vgt t
Vgp
270
VT
90
(a)
Vgp>Vgt
t
io
3
t
t
io
Vo
VT
t
Vo
io
2
=90
VT
4
t
t
<90
(b)
(c)
(b) = 900
10EC73
Design
With R2 0 , we need to ensure that
current of the SCR. Therefore R1
Vm
I gm , where I gm is the maximum or peak gate
R1
Vm
.
I gm
Also with R2 0 , we need to ensure that the voltage drop across resistor R does not exceed
Vm R
R1 R
Vgm R1 Vgm R Vm R
Vgm R1 R Vm Vgm
R
Vgm R1
Vm Vgm
Operation
Case 1: Vgp Vgt
Vgp , the peak gate voltage is less then Vgt since R2 is very large. Therefore, current I flowing
through the gate is very small. SCR will not turn on and therefore the load voltage is zero and
vscr is equal to Vs . This is because we are using only a resistive network. Therefore, output
will be in phase with input.
Case 2: Vgp Vgt , R2 optimum value.
When R2 is set to an optimum value such that Vgp Vgt , we see that the SCR is triggered at
900 (since Vgp reaches its peak at 900 only). The waveforms shows that the load voltage is
zero till 900 and the voltage across the SCR is the same as input voltage till it is triggered at
900 .
Case 3: Vgp Vgt , R2 small value.
The triggering value Vgt is reached much earlier than 900 . Hence the SCR turns on earlier
than VS reaches its peak value. The waveforms as shown with respect to Vs Vm sin t .
At
Therefore
sin 1
But
Vgp
Vgt
V
gp
Dept.ofECE/SJBIT
Vm R
R1 R2 R
Page 66
Therefore
10EC73
Vgt R1 R2 R
Vm R
sin 1
D2 . The capacitor maintains this voltage across it, till the supply
voltage crosses zero. As the supply becomes positive, the capacitor charges through resistor
R from initial voltage of Vm , to a positive value.
When the capacitor voltage is equal to the gate trigger voltage of the SCR, the SCR is fired
and the capacitor voltage is clamped to a small positive value.
vO
LOAD
+
R
D2
vS=Vmsint
VC
VT
-
D1
vs
-/2 0
-/2 0
0
a
vo
Vmsint
Vgt
vs
V gt
vc
vc
vo
t
vT
vc
Vm
vc
Vm
t
vT
Vm
-Vm
(a)
-Vm
(2+)
(b)
10EC73
Case 1: R Large.
When the resistor R is large, the time taken for the capacitance to charge from Vm to Vgt is
large, resulting in larger firing angle and lower load voltage.
Case 2: R Small
When R is set to a smaller value, the capacitor charges at a faster rate towards Vgt resulting
in early triggering of SCR and hence VL is more. When the SCR triggers, the voltage drop
across it falls to 1 1.5V. This in turn lowers, the voltage across R & C. Low voltage across
the SCR during conduction period keeps the capacitor discharge during the positive half
cycle.
Design Equation
From the circuit VC Vgt Vd 1 . Considering the source voltage and the gate circuit, we can
write vs I gt R VC . SCR fires when vs I gt R VC that is vS I g R Vgt Vd 1 . Therefore
R
vs Vgt Vd 1
I gt
. The RC time constant for zero output voltage that is maximum firing angle
T
for power frequencies is empirically gives as RC 1.3 .
2
B. RC Full Wave
A simple circuit giving full wave output is shown in figure below. In this circuit the
initial voltage from which the capacitor C charges is essentially zero. The capacitor C is
reset to this voltage by the clamping action of the thyristor gate. For this reason the charging
time constant RC must be chosen longer than for half wave RC circuit in order to delay the
v Vgt
50T
triggering. The RC value is empirically chosen as RC
. Also R s
.
2
I gt
vO
LOAD
D1
D3
VT
vd
vS=Vmsint
D2
D4
-
Dept.ofECE/SJBIT
Page 68
10EC73
vs
Vmsint
Vmsint
t
vd
vd
vo
vd
vc
vc
vgt vc
vT
vgt
vo
vT
(a)
(b)
Fig 3.10: RC full-wave trigger circuitFig: Wave-forms for RC full-wave trigger circuit
PROBLEM
1. Design a suitable RC triggering circuit for a thyristorised network operation on a
220V, 50Hz supply. The specifications of SCR are Vgt min 5V , I gt max 30mA .
Therefore
vs Vgt VD
Ig
7143.3
RC 0.013
R 7.143k
C 1.8199 F
B2
Eta-point
RB2
Eta-point
p-type
RB1
n-type
RB2
B2
Ve
VBB
RB1
Ie
VBB
-
B1
(a)
B1
(b)
B1
(c)
Dept.ofECE/SJBIT
Page 69
10EC73
UJT is an n-type silicon bar in which p-type emitter is embedded. It has three terminals
base1, base2 and emitter E. Between B1 and B2 UJT behaves like ordinary resistor and the
internal resistances are given as RB1 and RB 2 with emitter open RB B RB1 RB 2 . Usually the
p-region is heavily doped and n-region is lightly doped. The equivalent circuit of UJT is as
shown. When VBB is applied across B1 and B2 , we find that potential at A is
VAB1
VBB RB1
RB1
VBB
RB1 RB 2
RB1 RB 2
is intrinsic stand off ratio of UJT and ranges between 0.51 and 0.82. Resistor RB 2 is
between 5 to 10K.
Operation
When voltage VBB is applied between emitter E with base 1 B1 as reference and the emitter
voltage VE is less than VD VBE the UJT does not conduct. VD VBB is designated as
VP which is the value of voltage required to turn on the UJT. Once VE is equal to
VP VBE VD , then UJT is forward biased and it conducts.
The peak point is the point at which peak current I P flows and the peak voltage VP is across
the UJT. After peak point the current increases but voltage across device drops, this is due to
the fact that emitter starts to inject holes into the lower doped n-region. Since p-region is
heavily doped compared to n-region. Also holes have a longer life time, therefore number of
carriers in the base region increases rapidly. Thus potential at A falls but current I E
increases rapidly. RB1 acts as a decreasing resistance.
The negative resistance region of UJT is between peak point and valley point. After valley
point, the device acts as a normal diode since the base region is saturated and RB1 does not
decrease again.
Dept.ofECE/SJBIT
Page 70
10EC73
Negative Resistance
Region
V
Cutoff e
region
VBB
Saturation
region
R load line
Vp
Peak Point
Valley Point
Vv
0 Ip
Iv
Ie
Ve
B2
Vp
R2
VV
B1
Capacitor
charging
T1=RC
Capacitor
V BB+V
discharging
T2=R1C
VP
Vv
t
T
R1 v
o
Vo
1
(a)
(b)
Fig.3.13: UJT oscillator (a) Connection diagram and (b) Voltage waveforms
Operation
When VBB is applied, capacitor C begins to charge through resistor R exponentially
towards VBB . During this charging emitter circuit of UJT is an open circuit. The rate of
Dept.ofECE/SJBIT
Page 71
10EC73
charging is 1 RC . When this capacitor voltage which is nothing but emitter voltage VE
reaches the peak point VP VBB VD , the emitter base junction is forward biased and UJT
turns on. Capacitor C rapidly discharges through load resistance R1 with time constant
2 R1C 2 1 . When emitter voltage decreases to valley point Vv , UJT turns off. Once
again the capacitor will charge towards VBB and the cycle continues. The rate of charging of
the capacitor will be determined by the resistor R in the circuit. If R is small the capacitor
charges faster towards VBB and thus reaches VP faster and the SCR is triggered at a smaller
firing angle. If R is large the capacitor takes a longer time to charge towards VP the firing
angle is delayed. The waveform for both cases is as shown below.
(i) Expression for period of oscillationt
The period of oscillation of the UJT can be derived based on the voltage across the capacitor.
Here we assume that the period of charging of the capacitor is lot larger than than the
discharging time.
Using initial and final value theorem for voltage across a capacitor, we get
VC V final Vinitial V final e
RC
Therefore
VP VBB VV VBB eT / RC
V V
T RC log e BB V
VBB VP
If
VV VBB ,
VBB
T RC ln
VBB VP
1
RC ln
1 VP
VBB
But
VP VBB VD
If
VD VBB
Dept.ofECE/SJBIT
VP VBB
Page 72
Therefore
10EC73
1
T RC ln
VBB VV
.
IV
The recommended range of supply voltage is from 10 to 35V. the width of the triggering
pulse t g RB1C .
In general RB1 is limited to a value of 100 ohm and RB 2 has a value of 100 ohm or greater
and can be approximately determined as RB 2
104
.
VBB
PROBLEM
1. A UJT is used to trigger the thyristor whose minimum gate triggering voltage is 6.2V,
The UJT ratings are: 0.66 , I p 0.5mA , I v 3mA , RB1 RB 2 5k , leakage
current = 3.2mA, V p 14v and Vv 1V . Oscillator frequency is 2kHz and capacitor C
= 0.04F. Design the complete circuit.
Solution
1
T RC C ln
1
Here,
T
1
1
1
1
RC 0.04 106 ln
11.6k
3
2 10
1 0.66
The peak voltage is given as, V p VBB VD
Let VD 0.8 , then putting other values,
14 0.66VBB 0.8
Dept.ofECE/SJBIT
Page 73
10EC73
VBB 20V
R2
R2
0.7 RB 2 RB1
VBB
0.7 5 103
0.66 20
R2 265
Rc max
VBB Vp
Ip
20 14
0.5 103
Rc max 12k
Similarly the value of Rc min is given by equation
Rc min
VBB Vv
Iv
Rc min
20 1
3 103
Rc min 6.33k
2. Design the UJT triggering circuit for SCR. Given VBB 20V , 0.6 , I p 10 A ,
Vv 2V , I v 10mA . The frequency of oscillation is 100Hz. The triggering pulse
width should be 50 s .
Solution
Dept.ofECE/SJBIT
Page 74
10EC73
1
1
f 100
1
From equation T RcC ln
1
Putting values in above equation,
1
1
Rc C ln
100
1 0.6
RcC 0.0109135
Rc min
0.0109135
1106
Rc min 10.91k .
The peak voltage is given as,
V p VBB VD
Let
Rc min
VBB Vv
Iv
Rc min
20 2
1.8k
10 103
104
R2
VBB
R2
104
833.33
0.6 20
Page 75
10EC73
2 R1C
The width 2 50 sec and C 1 F , hence above equation becomes,
50 106 R1 1 10 6
R1 50
+
i1
D3
B2
Vdc
VZ
E
B1
vc
D4
R2
D2
-
Pulse Transf
G1
C1
G2
To SCR
Gates
C2
Dept.ofECE/SJBIT
Page 76
10EC73
A
Preset
(N no. of counting bits)
Clk
Fixed frequency
Oscillator
(ff)
n-bit
Counter
Reset
max
min S
En
Load
Logic circuit
+
Modulator
+
Driver stage
B
Flip - Flop
(F / F)
R
Reset
fC
Sync
Signal (~6V)
ZCD
Carrier
Frequency
Oscillator
( 10KHz)
D.C. 5V
supply
y(1 or 0)
v c,
vdc
VZ
V dc
VZ
vc
vc
Pulse
Voltage
1
vc
Fig.3.16: Generation of output pulses for the synchronized UJT trigger circuit
Dept.ofECE/SJBIT
Page 77
G1
G2
10EC73
fc
A
B
0.1F
B
To
G1 Driver
Circuit
G1=A.B.fc
Modulator
Logic Circuit
fc
A
B
G2
0.1F
To
Driver
Circuit
G2=A.B.fc
B
y
Fig.3.17: Logic circuit, Carrier Modulator
The digital firing scheme is as shown in the above figure. It constitutes a pre-settable
counter, oscillator, zero crossing detection, flip-flop and a logic control unit with NAND and
AND function.
Oscillator: The oscillator generates the clock required for the counter. The frequency of the
clock is say f C . In order to cover the entire range of firing angle that is from 00 to 1800, a nbit counter is required for obtaining 2n rectangular pulses in a half cycle of ac source.
Therefore 4-bit counter is used, we obtain sixteen pulses in a half cycle of ac source.
Zero Crossing Detector: The zero crossing detector gives a short pulse whenever the input ac
signal goes through zeroes. The ZCD output is used to reset the counter, oscillator and flipflops for getting correct pulses at zero crossing point in each half cycle, a low voltage
synchronized signal is used.
Counter: The counter is a pre-settable n-bit counter. It counts at the rate of f C pulses/second.
In order to cover the entire range of firing angle from 0 to 1800 , the n-bit counter is required
for obtaining 2n rectangular pulses in a half cycle.
Example: If 4-bit counter is used there will be sixteen pulses / half cycle duration. The
counter is used in the down counting mode. As soon as the synchronized signal crosses zero,
the load and enable become high and low respectively and the counter starts counting the
clock pulses in the down mode from the maximum value to the pre-set value N. N is the
binary equivalent of the control signal. once the counter reaches the preset value N counter
overflow signal goes high. The counter overflow signal is processed to trigger the Thyristors.
Thus by varying the preset input one can control the firing angle of Thyristors. The value of
firing angle can be calculated from the following equation
2n N
N
0
0
180 1 180 for n 4
n
2
16
Dept.ofECE/SJBIT
Page 78
10EC73
Modified R-S Flip-Flop: The reset input terminal of flip-flop is connected to the output of
ZCD and set is connected to output of counter. The pulse goes low at each zero crossing of
the ac signal. A low value of ZCD output resets the B-bar to 1 and B to 0.
A high output of the counter sets B-bar to 0 and B to 1. This state of the flip-flop is latched
till the next zero crossing of the synchronized signal. The output terminal B of flip-flop is
connected with enable pin of counter. A high at enable EN of counter stops counting till the
next zero crossing.
Input
Output
Remarks
B-bar
Set
Reset
Last Stage
Logic Circuit, Modulation and Driver Stage: The output of the flip-flop and pulses A and Abar of ZCD are applied to the logic circuit. The logic variable Y equal to zero or one enables
to select the firing pulse duration from to or
Overall Operation
The input sinusoidal signal is used to derive signals A and A-bar with the help of ZCD. The
zero crossing detector along with a low voltage sync signal is used to generate pulses at the
instant the input goes through zeroes. The signal C and C-bar are as shown. The signal Cbar is used to reset the fixed frequency oscillator, the flip flop and the n-bit counter. The
fixed frequency oscillator determines the rate at which the counter must count. The counter is
preset to a value N which is the decimal equivalent of the trigger angle. The counter starts to
down count as soon as the C-bar connected to load pin is zero. Once the down count N is
over the counter gives a overflow signal which is processed to be given to the Thyristors.
This overflow signal is given to the Set input S of the modified R-S flip flop. If S=1 B goes
high as given by the truth table and B bar has to go low. B has been connected to the Enable
pin of counter. Once B goes low the counter stops counting till the next zero crossing. The
carrier oscillator generates pulses with a frequency of 10kHz for generating trigger pulses for
the Thyristors. Depending upon the values of A, A-bar, B, B-bar and Y the logic circuit will
generate triggering pulses for gate1 or gate 2 for Thyristors 1 and 2 respectively.
Dept.ofECE/SJBIT
Page 79
10EC73
dv
PROTECTION
3.10 dt
dv
across the thyristor is limited by using snubber circuit as shown in figure (a) below.
dt
If switch S1 is closed at t 0 , the rate of rise of voltage across the thyristor is limited by the
The
capacitor C S . When thyristor T1 is turned on, the discharge current of the capacitor is limited
by the resistor RS as shown in figure (b) below.
Fig.3.18 (a)
Dept.ofECE/SJBIT
Page 80
10EC73
Fig.3.18 (b)
Fig.3.18 (c)
The voltage across the thyristor will rise exponentially as shown by fig (c) above. From fig.
(b) above, circuit we have (for SCR off)
VS i t RS
1
i t dt Vc 0 for t 0 .
C
VS t s
e
, where s RS CS
RS
Therefore
i t
Also
VT t VS i t RS
VT t VS
VS t s
e
RS
RS
t
Therefore
VT t VS VS e
At t = 0,
VT 0 0
At t s ,
VT s 0.632VS
Dept.ofECE/SJBIT
VS 1 e s
Page 81
10EC73
Therefore
dv VT s VT 0 0.632VS
dt
s
RS CS
And
RS
VS
.
ITD
dv
and discharging as shown in the
dt
dv
is limited by R1 and C S . R1 R2 limits the discharging current
dt
VS
R1 R2
Fig.3.18 (d)
The load can form a series circuit with the snubber network as shown in figure (e) below.
The damping ratio of this second order system consisting RLC network is given as,
CS
RS R
, where LS stray inductance and L, R is is load inductance
0
2
LS L
Dept.ofECE/SJBIT
Page 82
10EC73
low value of C S reduces snubber loss. The damping ratio is calculated for a particular circuit
RS and C S can be found.
Fig.3.18 (e)
di
PROTECTION
3.11 dt
di
. As an example let us consider the circuit
dt
shown above, under steady state operation Dm conducts when thyristor T1 is off. If T1 is fired
Practical devices must be protected against high
di
can be very high and limited only by the stray inductance of
dt
di
is limited by adding a series inductor LS as shown in the circuit
dt
di V
above. Then the forward S .
dt LS
the circuit. In practice the
Dept.ofECE/SJBIT
Page 83
10EC73
Recommended questions:
1
2.
3.
4.
5.
6.
Dept.ofECE/SJBIT
Page 84
10EC73
UNIT-4
Controlled Rectifiers
4.1 Line Commutated AC to DC converters
+
AC
Input
Voltage
Line
Commutated
Converter
DC Output
V0(dc )
-
Vm
Page 85
10EC73
Dept.ofECE/SJBIT
Page 86
10EC73
Equations:
vs Vm sin t i/p ac supply voltage
Vm max. value of i/p ac supply voltage
VS
Vm
4.4.1 To Derive an Expression for the Average (DC) Output Voltage across the Load
VO dc Vdc
1
2
v .d t ;
O
vO Vm sin t for t to
VO dc
1
Vdc
Vm sin t.d t
2
VO dc
Vm sin t.d t
2
VO dc
VO dc
Vm
sin t.d t
2
V
m
2
cos t
Vm
cos cos ; cos 1
2
V
m 1 cos ; Vm 2VS
2
VO dc
VO dc
Dept.ofECE/SJBIT
Page 87
10EC73
Vm
1 cos 0 ; cos 0 1
2
V
m
Vm
1 cos ; Vm 2VS
2
The average dc output voltage can be varied
by varying the trigger angle from 0 to a
VO dc
O dc
4.5 Control Characteristic of Single Phase Half Wave Phase Controlled Rectifier with
Resistive Load
The average dc output voltage is given by the
expression
Vm
1 cos
2
We can obtain the control characteristic by
plotting the expression for the dc output
voltage as a function of trigger angle
VO dc
Page 88
10EC73
VO(dc)
Vdm
0.6Vdm
0.2 Vdm
0
60
120
180
Vdc
Vdm
Vm
1 cos
2
Vm
V
1
Vn dc 1 cos Vdcn
Vdm 2
4.5.2 To Derive an Expression for the RMS Value of Output Voltage of a Single Phase
Half Wave Controlled Rectifier with Resistive Load
VO RMS
vO .d t
2 0
VO RMS
1
2
Vm2 sin 2 t.d t
2
By substituting sin 2 t
1 cos 2 t
, we get
2
1
VO RMS
1 2 1 cos 2 t
2
V
.
d
2
2
VO RMS
V 2
m
4
VO RMS
V 2
2
m d t cos 2 t.d t
4
2
1
cos
2
t
.
d
VO RMS
Vm
2
Dept.ofECE/SJBIT
1
t
sin 2 t
VO RMS
V
m
2
1
sin 2 sin 2 2 ;sin2 0
2
1
Page 89
10EC73
PO dc
PO ac
; % Efficiency
PO dc
PO ac
100
PO dc
PO ac
; % Efficiency
PO dc
PO ac
100
Dept.ofECE/SJBIT
Page 90
10EC73
I r rms
I O dc
I ac
I dc
PO dc
VS I S
Where
VS RMS supply (secondary) voltage
I S RMS supply (secondary) current
Dept.ofECE/SJBIT
Page 91
10EC73
Where
vS Supply voltage at the transformer secondary side
iS i/p supply current
(transformer secondary winding current)
iS 1 Fundamental component of the i/p supply current
I P Peak value of the input supply current
1
2
I 2 2
I I
S
HF
1
2
I
I
S 1
S1
Where
I S RMS value of input supply current.
2
S
2
S1
VS I S 1
I
cos S 1 cos
VS I S
IS
I S peak
IS
Dept.ofECE/SJBIT
Page 92
10EC73
4.5.6 To derive an expression for the output (Load) current, during t = to when
Dept.ofECE/SJBIT
Page 93
10EC73
thyristor T1 conducts
Assuming T1 is triggered t ,
we can write the equation,
di
L O RiO Vm sin t ; t
dt
General expression for the output current,
t
Vm
iO
sin t A1e
Z
L
Load impedance angle.
R
tan 1
L
Load circuit time constant.
R
general expression for the output load current
R
t
Vm
iO
sin t A1e L
Z
A1e L m sin
Z
We get the value of constant A1 as
V
A1 e L m sin
Z
Dept.ofECE/SJBIT
Page 94
10EC73
sin t e L
sin
Z
Z
iO
V
iO m
Z
R
t
L
sin t sin e
;
Where t
R
t
L
sin t sin e
0
sin e L
sin
1
2
v .d t
O
v
.
d
v
.
d
O O vO .d t
0
VO dc VL
1
2
1
vO .d t ;
2
vO Vm sin t for t to
VO dc VL
VO dc VL
1
Vm sin t.d t
2
Vm
VO dc VL
cos t
2
V
VO dc VL m cos cos
2
V
VO dc VL m cos cos
2
Dept.ofECE/SJBIT
Page 95
10EC73
I O dc I L Avg
VO dc
RL
Vm
cos cos
2 RL
4.5.9 Single Phase Half Wave Controlled Rectifier with RL Load & Free Wheeling
Diode
T
i0
+
V0
R
+
Vs
FWD
vS
Supply voltage
iG
Gate pulses
0
iO
Load current
t=
0
vO
Load voltage
Dept.ofECE/SJBIT
Page 96
10EC73
For Large Load Inductance the load current does not reach zero, & we obtain
continuous load current.
i0
t1
SCR
Dept.ofECE/SJBIT
t2
FWD
t3
t4
SCR
FWD
Page 97
10EC73
4.6 Single Phase Full Wave Controlled Rectifier Using A Center Tapped Transformer
T1
A
+
vO
AC
Supply
T2
B
4.6.1 Discontinuous Load Current Operation without FWD for << (+)
vO
Vm
t
0
iO
()
()
(i) To derive an expression for the output (load) current, during t = to when
thyristor
T1 conducts
Assuming T1 is triggered t ,
we can write the equation,
di
L O RiO Vm sin t ; t
dt
General expression for the output current,
iO
Dept.ofECE/SJBIT
t
Vm
sin t A1e
Z
Page 98
10EC73
A1e L m sin
Z
We get the value of constant A1 as
V
A1 e L m sin
Z
L
tan 1
Load impedance angle.
R
L
Load circuit time constant.
R
general expression for the output load current
R
t
Vm
iO sin t A1e L
Z
sin t e L
sin
Z
Z
iO
iO
Vm
Z
R
t
L
sin
sin
Where t
Vm
Z
R
t
L
sin
sin
sin e L
sin
Page 99
10EC73
(ii) To Derive an Expression for the DC Output Voltage of A Single Phase Full Wave
Controlled Rectifier with RL Load (Without FWD)
vO
Vm
t
0
iO
()
VO dc Vdc
()
vO .d t
1
Vm sin t.d t
Vm
Vdc
cos t
V
Vdc m cos cos
VO dc Vdc
VO dc
VO dc
Dept.ofECE/SJBIT
VO dc
Vm
cos cos
VO dc
Vm
cos 1
VO dc
Vm
when
Page 100
10EC73
vO
Vm
t
0
iO
T1 conducts from t to
Thyristor T2 is triggered at t ;
T2 conducts from t to 2
Thyristor T1 is triggered at t ;
()
()
(v) To Derive an Expression for the DC Output Voltage for a Single Phase Full
Wave Controlled Rectifier with RL Load & FWD
VO dc
1
Vdc vO .d t
t 0
VO dc
1
Vdc Vm sin t.d t
VO dc Vdc
Vm
cos t
Vm
cos cos ; cos 1
V
Vdc m 1 cos
VO dc Vdc
VO dc
Dept.ofECE/SJBIT
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10EC73
The load current is discontinuous for low values of load inductance and for large
values of trigger angles.
For large values of load inductance the load current flows continuously without
falling to zero.
Generally the load current is continuous for large load inductance and for low trigger
angles.
vO
Vm
t
0
iO
()
()
(i) To Derive an Expression for Average / DC Output Voltage of Single Phase Full
Wave Controlled Rectifier for Continuous Current Operation without FWD
vO
Vm
t
0
iO
()
Dept.ofECE/SJBIT
()
Page 102
10EC73
VO dc Vdc
VO dc
VO dc
vO .d t
1
Vdc Vm sin t.d t
Vm
Vdc
cos t
VO dc Vdc
Vm
cos cos ;
cos cos
VO dc Vdc
Vm
VO dc Vdc
2Vm
cos cos
cos
By plotting VO(dc) versus ,we obtain the control characteristic of a single phase full
wave controlled rectifier with RL load for continuous load current operation without
FWD
Dept.ofECE/SJBIT
Page 103
10EC73
V O(dc)
Vdm
0.6Vdm
0.2 Vdm
0
30
-0.2Vdm
60
90
120
150
180
-0.6 V dm
-Vdm
Trigger angle in degrees
i.e., 90
1800 ,
Dept.ofECE/SJBIT
Page 104
10EC73
4.7.1 Single Phase Full Wave Half Controlled Bridge Converter (Single Phase Semi
Converter)
Thyristor T1 is triggered at
t , at t 2 ,...
Thyristor T2 is triggered at
t , at t 3 ,...
Dept.ofECE/SJBIT
Page 105
10EC73
Waveforms of single phase semi-converter with general load & FWD for > 900
Dept.ofECE/SJBIT
Page 106
10EC73
vO
Vm
t
iO
()
()
(i) To Derive an Expression for The DC Output Voltage of A Single Phase Semi
Converter with R, L, & E Load & FWD For Continuous, Ripple Free Load Current
Operation
VO dc Vdc
1
v .d t
t0 O
VO dc
1
Vdc Vm sin t.d t
VO dc Vdc
Vm
cos t
Vm
cos cos ; cos 1
V
Vdc m 1 cos
VO dc Vdc
VO dc
Dept.ofECE/SJBIT
Page 107
10EC73
to 0 by varying from 0 to .
1 cos
Vdn
2
2Vm
value of
1
2
2
m
V
VO RMS
2
VO RMS
1 cos 2t .d t
Vm 1
sin 2
2
2
1
2
1
2
4.7.2 Single Phase Full Wave Full Converter (Fully Controlled Bridge Converter) With
R, L, & E Load
Dept.ofECE/SJBIT
Page 108
10EC73
Dept.ofECE/SJBIT
Page 109
10EC73
iO
Ia
iT1
Ia
Ia
& iT2
iT3
Ia
t
& iT4
(i) To Derive An Expression For The Average DC Output Voltage of a Single Phase Full
Converter assuming Continuous & Constant Load Current
1
VO dc Vdc
vO .d t ;
2 0
2
Vm sin t.d t
2
2V
Vdc m cos t
2
2V
Vdc m cos
VO dc Vdc
VO dc
VO dc
Dept.ofECE/SJBIT
2Vm
Page 110
10EC73
Vdcn
VO dc
Vdc max
Vdc
Vdm
2Vm
cos
Vn
cos
2Vm
By plotting VO(dc) versus , we obtain the control characteristic of a single phase full
wave fully controlled bridge converter (single phase full converter) for constant &
continuous load current operation.
To plot the control characteristic of a
Single Phase Full Converter for constant
& continuous load current operation.
We use the equation for the average/ dc
output voltage
2V
VO dc Vdc m cos
Dept.ofECE/SJBIT
Page 111
10EC73
V O(dc)
Vdm
0.6Vdm
0.2 Vdm
0
-0.2Vdm
30
60
90
120
150
180
-0.6 V dm
-Vdm
Trigger angle in degrees
During the period from t = to the input voltage VS and the input current iS are
both positive and the power flows from the supply to the load.
The converter is said to be operated in the rectification mode Controlled Rectifier
Operation for 0 << 900
During the period from t = to (+), the input voltage vS is negative and the
input current iS is positive and the output power becomes negative and there will be
reverse power flow from the load circuit to the supply.
The converter is said to be operated in the inversion mode.
Line Commutated Inverter Operation for 900 << 1800
Dept.ofECE/SJBIT
Page 112
10EC73
1 2
vO .d t
2 0
2
2
vO .d t
2
Dept.ofECE/SJBIT
2
2
vO .d t
2
Page 113
10EC73
VO RMS
Vm2
t
2
VO RMS
Vm2
2
VO RMS
Vm2
sin 2 t
sin 2 sin 2
sin 2 2 sin 2
;
2
sin 2 2 sin 2
VO RMS
Vm2
sin 2 sin 2
2
2
Vm2
V2 V
0 m m
2
2
2
V
VO RMS m VS
2
Hence the rms output voltage is same as the
VO RMS
Dept.ofECE/SJBIT
Page 114
10EC73
iO
Ia
iT1
Ia
Ia
& iT2
iT3
Ia
t
& iT4
I O RMS
2
The average thyristor current can be
calculated as
IT Avg
Dept.ofECE/SJBIT
I O dc
2
Page 115
10EC73
Dept.ofECE/SJBIT
Page 116
10EC73
2Vm
cos 1
2Vm
cos 1
Vdc1 Vdc 2
2Vm
cos 2
2Vm
cos 1 cos 2
cos 2
or
cos 2 cos 1 cos 1
2 1 or
1 2
radians
Which gives
2 1
Dept.ofECE/SJBIT
Page 117
10EC73
vr .d t ; vr vO1 vO 2
2 1
1
ir
Lr
vr vO1 vO 2
vO1 vO 2 .d t ;
2 1
1
ir
Lr
t
t
2 1
ir
Vm
Lr
ir
2Vm
cos t cos 1
Lr
4Vm
Ip
,
Lr
Dept.ofECE/SJBIT
Page 118
10EC73
where
I p I L max
Vm
,
RL
&
ir max
4Vm
max. circulating current
Lr
Dept.ofECE/SJBIT
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10EC73
Recommended questions:
1. Give the classification of converters, based on: a) Quadrant operation b) Number of
current pulse c) supply input. Give examples in each case.
2. With neat circuit diagram and wave forms, explain the working of 1 phase HWR
using SCR for R-load. Derive the expressions for Vdc and Idc.
3. With a neat circuit diagram and waveforms, explain the working of 1-phase HCB for
R-load and R-L-load.
4. Determine the performance factors for 1-phase HCB circuit.
5. With a neat circuit diagram and waveforms, explain the working of 1-phase FCB for
R and R-L-loads.
Dept.ofECE/SJBIT
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10EC73
Dept.ofECE/SJBIT
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10EC73
UNIT-5
THYRISTOR COMMUTATION TECHNIQUES
5.1 Introduction
In practice it becomes necessary to turn off a conducting thyristor. (Often thyristors
are used as switches to turn on and off power to the load). The process of turning off a
conducting thyristor is called commutation. The principle involved is that either the anode
should be made negative with respect to cathode (voltage commutation) or the anode current
should be reduced below the holding current value (current commutation).
The reverse voltage must be maintained for a time at least equal to the turn-off time of
SCR otherwise a reapplication of a positive voltage will cause the thyristor to conduct even
without a gate signal. On similar lines the anode current should be held at a value less than
the holding current at least for a time equal to turn-off time otherwise the SCR will start
conducting if the current in the circuit increases beyond the holding current level even
without a gate signal. Commutation circuits have been developed to hasten the turn-off
process of Thyristors. The study of commutation techniques helps in understanding the
transient phenomena under switching conditions.
The reverse voltage or the small anode current condition must be maintained for a
time at least equal to the TURN OFF time of SCR; Otherwise the SCR may again start
conducting. The techniques to turn off a SCR can be broadly classified as
Natural Commutation
Forced Commutation.
5.1.1 Natural Commutation (CLASS F)
This type of commutation takes place when supply voltage is AC, because a negative
voltage will appear across the SCR in the negative half cycle of the supply voltage and the
SCR turns off by itself. Hence no special circuits are required to turn off the SCR. That is the
reason that this type of commutation is called Natural or Line Commutation. Figure 5.1
shows the circuit where natural commutation takes place and figure 1.2 shows the related
waveforms. tc is the time offered by the circuit within which the SCR should turn off
completely. Thus tc should be greater than tq , the turn off time of the SCR. Otherwise, the
SCR will become forward biased before it has turned off completely and will start conducting
even without a gate signal.
Dept.ofECE/SJBIT
Page 122
10EC73
T
+
vs
vo
Supply voltage vs
Sinusoidal
Load voltage vo
Turn off
occurs here
Fig. 5.2: Natural Commutation Waveforms of Supply and Load Voltages (Resistive Load)
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10EC73
Choppers (fixed DC to variable DC), inverters (DC to AC). Forced commutation techniques
are as follows:
Self Commutation
Resonant Pulse Commutation
Complementary Commutation
Impulse Commutation
External Pulse Commutation.
Load Side Commutation.
Line Side Commutation.
5.2 Self Commutation or Load Commutation or Class A Commutation: (Commutation
By Resonating The Load)
In this type of commutation the current through the SCR is reduced below the holding
current value by resonating the load. i.e., the load circuit is so designed that even though the
supply voltage is positive, an oscillating current tends to flow and when the current through
the SCR reaches zero, the device turns off. This is done by including an inductance and a
capacitor in series with the load and keeping the circuit under-damped. Figure 5.3 shows the
circuit.
This type of commutation is used in Series Inverter Circuit.
Load
Vc(0)
+ C
Dept.ofECE/SJBIT
Page 124
10EC73
1 VC(0)
S
CS
+ - +
-
sL
R I(S)
C
V
S
Fig.: 5.4.
I S
V VC 0
S
1
R sL
CS
CS V VC 0
S
RCs s 2 LC 1
C V VC 0
R 1
LC s 2 s
L LC
V VC 0
L
R 1
2
s s
L LC
V V 0
C
L
2
2
R 1 R R
2
s s
L LC 2 L 2 L
V V 0
C
L
2
R 1 R
s
2 L LC 2 L
Dept.ofECE/SJBIT
Page 125
10EC73
Where
V V 0 ,
A
C
A
2
s 2
,
2L
1 R
LC 2 L
s 2 2
A
e t sin t
V VC 0 2 RL t
e sin t
L
V V 0
C
(ii) Expression for voltage across capacitor at the time of turn off
Applying KVL to figure 1.3
vc V vR VL
vc V iR L
di
dt
Substituting for i,
A
vc V R
vc V R
vc V
Dept.ofECE/SJBIT
e t sin t L
d A t
e sin t
dt
e t sin t L
cos t e t sin t
Page 126
10EC73
vc V
e t R sin t L cos t L
sin t
2L
vc V
e t sin t L cos t
Substituting for A,
vc t V
V V 0 e
vc t V
V V 0 e
2 sin t L cos t
R
2L sin t cos t
V
e
vc
vc V V VC 0 e
0 cos
vc V V VC 0 e 2 L
Therefore
1
R
LC
2L
That is
But
Therefore
V
t
sin
L
LC
1
LC
V
t
C
t
LC sin
V
sin
L
L
LC
LC
Dept.ofECE/SJBIT
Page 127
10EC73
Figure 5.5 shows the waveforms for the above conditions. Once the SCR turns off
voltage across it is negative voltage.
C
L
Current i
/2
2V
Capacitor voltage
Gate pulse
t
t
V
Voltage across SCR
Fig. 5.5: Self Commutation Wave forms of Current and Capacitors Voltage
Problem 5.1 : Calculate the conduction time of SCR and the peak SCR current that flows in
the circuit employing series resonant commutation (self commutation or class A
commutation), if the supply voltage is 300 V, C = 1F, L = 5 mH and RL = 100 . Assume
that the circuit is initially relaxed.
RL
C
+
100
5 mH
1 F
V
=300V
Fig. 5.6
Solution:
Dept.ofECE/SJBIT
Page 128
1
LC
10EC73
R
L
2L
1
100
3
6
3
5 10 110
2 5 10
Since the circuit is initially relaxed, initial voltage across capacitor is zero as also the
initial current through L and the expression for current i is
V t
R
,
e sin t , where
L
2L
V
L
300
6A
10000 5 103
0.314msec
10000
Problem 1.2: Figure 1.7 shows a self commutating circuit. The inductance carries an initial
current of 200 A and the initial voltage across the capacitor is V, the supply voltage.
Determine the conduction time of the SCR and the capacitor voltage at turn off.
i(t)
IO
10 H
C
50 F
V
=100V
+
VC(0)=V
Fig. 5.7
Solution:
The transformed circuit of figure 5.7 is shown in figure 5.8.
Dept.ofECE/SJBIT
Page 129
10EC73
sL
IOL
+
I(S)
+
V
S
VC(0)
=V
S
1
CS
Therefore
V VC 0
IO L
s
s
I S
1
sL
Cs
V VC 0
Cs
s
s
I LCs
I S
2O
2
s LC 1
s LC 1
V VC 0 C
I O LCs
I S
1
1
LC s 2
LC s 2
LC
LC
I S
V VC 0
L s
2
sI O
s 2
2
V VC 0
sI
I S
2 O 2 Where
2
2
L s s
1
LC
Taking inverse LT
i t V VC 0
C
sin t I O cos t
L
Page 130
10EC73
1
vc t i t dt VC 0
C0
t
1
C
vc t V VC 0
sin t I O cos t dt VC 0
C 0
L
vc t
vc t
t I
t
1 V VC 0 C
cos t O sin t VC 0
o
o
C
vc t
I
1 V VC 0 C
1 cos t O sin t VC 0
IO
1
C
LC sin t V VC 0 LC
1 cos t VC 0
C
C
L
vc t I O
L
sin t V V cos t VC 0 VC 0 cos t VC 0
C
vc t I O
L
sin t V VC 0 cos t V
C
In this problem VC 0 V
Therefore we get,
i t IO cos t and
L
sin t V
C
he waveforms are as shown in figure 1.9
vc t I O
Dept.ofECE/SJBIT
Page 131
10EC73
I0
i(t)
/2
vc(t)
/2
Fig.: 1.9
Turn off occurs at a time to so that tO
Therefore
tO
0.5
0.5 LC
L
sin tO V
C
10 106
vc tO 200
sin 900 100
6
50 10
35.12
vc tO 200 0.447 sin
100
22.36
Dept.ofECE/SJBIT
Page 132
10EC73
Problem 5.3: In the circuit shown in figure 1.10. V = 600 volts, initial capacitor voltage is
zero, L = 20 H, C = 50F and the current through the inductance at the time of SCR
triggering is Io = 350 A. Determine (a) the peak values of capacitor voltage and current (b)
the conduction time of T1.
T1
L
I0
i(t)
Fig. 5.10
Solution:
(Refer to problem 5.2).
The expression for i t is given by
i t V VC 0
C
sin t I O cos t
L
i t V
C
sin t I O cos t
L
i t can be written as
i t I O2 V 2
where
tan 1
and
C
sin t
L
L
C
IO
V
1
LC
C
L
Page 133
10EC73
3502 6002
50 106
1011.19 A
20 106
with
L
sin t V VC 0 cos t V
C
VC 0 0, vc t I O
L
sin t V cos t V
C
Where
tan 1
L
sin t V
C
C
L
IO
L
V
C
6002 3502
20 106
600
50 106
Dept.ofECE/SJBIT
Page 134
10EC73
Capacitor
current
Therefore conduction time of SCR
L
IO
C
tan 1
V
1
LC
Fig. 5.11
L
IO
C
tan 1
V
tan 1
350 20 106
600 50 106
LC
1
20 106 50 106
31622.8 rad/sec
Dept.ofECE/SJBIT
0.3534
31622.8
88.17 sec
Page 135
10EC73
L
T
i
a
b
IL
Load
FWD
Fig. 5.12: Circuit for Resonant Pulse Commutation
Dept.ofECE/SJBIT
Page 136
10EC73
Gate pulse
of SCR
t
t1
V
Capacitor voltage
vab
t
tC
Ip
IL
t
t
ISCR
t
Voltage across
SCR
t
1 c
V I L dt
C0
Dept.ofECE/SJBIT
I L tc
C
tc
VC
seconds
IL
Page 137
10EC73
For proper commutation tc should be greater than tq , the turn off time of T. Also, the
magnitude of I p , the peak value of i should be greater than the load current I L and the
expression for i is derived as follows
The LC circuit during the commutation period is shown in figure 5.14.
L
T
i
C
+
VC(0)
=V
Fig. 5.14
I(S)
sL
T
1
Cs
+
V
s
Fig. 5.15
I S
V
s
sL
1
Cs
V
Cs
s
I S 2
s LC 1
I S
Dept.ofECE/SJBIT
VC
1
LC s 2
LC
Page 138
10EC73
V
1
L s2 1
LC
1
V LC
1
I S
L s2 1 1
LC LC
1
C LC
I S V
L s2 1
LC
Taking inverse LT
C
sin t
L
i t V
Where
1
LC
Or
i t
V
sin t I p sin t
L
Therefore
Ip V
C
amps .
L
I
sin 1 L
I
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resonantcurrent ic t , flows in the direction shown, i.e., in a direction opposite to that of load
current I L .
C
&
L
vc t
1
iC t .dt
C
vc t
1
C
VC 0
sin t.dt .
C
L
vc t VC 0 cos t
ab
T1
iC(t)
iC(t)
IL
T2
+
VC(0)
T3
FWD
L
O
A
D
When ic t becomes equal to I L (the load current), the current through T1 becomes
zero and T1 turns off. This happens at time t1 such that
I L I p sin
t1
LC
I p VC 0
C
L
I
L
t1 LC sin 1 L
VC 0 C
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vc t1 V1 VC 0 cos t1
Once the thyristor T1 turns off, the capacitor starts charging towards the supply
voltage through T2 and load. As the capacitor charges through the load capacitor current is
same as load current I L , which is constant. When the capacitor voltage reaches V, the supply
voltage, the FWD starts conducting and the energy stored in L charges C to a still higher
voltage. The triggering of T3 reverses the polarity of the capacitor voltage and the circuit is
ready for another triggering of T1 . The waveforms are shown in figure 5.17.
Expression For tc
Assuming a constant load current I L which charges the capacitor
tc
CV1
seconds
IL
Normally V1 VC 0
For reliable commutation tc should be greater than tq , the turn off time of SCR T1 .It is
to be noted that tc depends upon I L and becomes smaller for higher values of load current.
Current iC(t)
Capacitor
voltage vab
t
t1
V1
tC
VC(0)
Fig. 5.17: Resonant Pulse Commutation Alternate Circuit Various Waveforms
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D2
IL
T1
L
iC(t)
T2
iC(t)
+
VC(0)
L
O
A
D
T3
FWD
Fig. 5.17(a)
iC
IL
0
VC
0
V1
VC(O)
t1
t2
tC
Fig. 5.17(b)
capacitor current iC t continues to flow through the diode D2 until it reduces to load current
Dept.ofECE/SJBIT
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level I L at time t2 . Thus the presence of D2 has accelerated the discharge of capacitor C.
Now the capacitor gets charged through the load and the charging current is constant. Once
capacitor is fully charged T2 turns off by itself. But once current of thyristor T1 reduces to
zero the reverse voltage appearing across T1 is the forward voltage drop of D2 which is very
small. This makes the thyristor recovery process very slow and it becomes necessary to
provide longer reverse bias time.
From figure 5.17(b)
t2 LC t1
VC t2 VC O cos t2
Circuit turn-off time tC t2 t1
Problem 5.4: The circuit in figure 5.18 shows a resonant pulse commutation circuit. The
initial capacitor voltage VCO 200V , C = 30F and L = 3H. Determine the circuit turn off
time tc , if the load current I L is (a) 200 A and (b) 50 A.
T1
L
IL
iC(t)
T2
+
VC(0)
L
O
A
D
T3
FWD
Fig. 5.18
Solution
(a)
When I L 200 A
Let T2 be triggered at t 0 .
The capacitor current ic t reaches a value I L at t t1 , when T1 turns off
I
L
t1 LC sin 1 L
VC 0 C
200 3 106
t1 3 106 30 106 sin 1
200 30 106
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t1 3.05 sec .
1
1
LC
3 106 30 106
V1 200 0.9487
V1 189.75 Volts
tc
and
CV1
IL
30 106 189.75
tc
28.46 sec .
200
(b)
When I L 50 A
50 3 106
t1 3 106 30 106 sin 1
200 30 106
t1 0.749 sec .
CV1
IL
tc
30 106 200
120 sec .
50
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Problem 5.4a: Repeat the above problem for I L 200 A , if an antiparallel diode D2 is
connected across thyristor T1 as shown in figure 5.18a.
D2
T1
L
iC(t)
IL
iC(t)
T2
+
VC(0)
T3
FWD
L
O
A
D
Fig. 5.18(a)
Solution
I L 200 A
Let
T2 be triggered at t 0 .
Therefore
I
L
t1 LC sin 1 L
VC O C
200 3 106
t1 3 106 30 106 sin 1
200 30 106
t1 3.05 sec .
Dept.ofECE/SJBIT
1
1
LC
3 106 30 106
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10EC73
VC t1 V1 VC O cos t1
VC t1 200cos 0.105 106 3.05 106
VC t1 189.75V
1
1
LC
3 106 30 106
VC t2 V2 189.02 V
Therefore
tC 23.7 secs
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Problem 5.5:For the circuit shown in figure 5.19. Calculate the value of L for proper
commutation of SCR. Also find the conduction time of SCR.
4 F
V
=30V
L
RL
30
IL
Fig. 5.19
Solution:
The load current I L
V
30
1 Amp
RL 30
For proper SCR commutation I p , the peak value of resonant current i, should be
greater than I L ,
Let
I p 2I L ,
Also
Ip
Therefore
4 106
2 30
L
Therefore
I p 2 Amps .
Therefore
V
1
L
LC
C
L
L 0.9mH .
1
1
16666 rad/sec
LC
0.9 103 4 106
I
sin 1 L
I
p
Conduction time of SCR =
1
sin 1
2
16666
16666
0.523
16666
radians
0.00022 seconds
0.22 msec
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Problem 5.6: For the circuit shown in figure 5.20 given that the load current to be
commutated is 10 A, turn off time required is 40sec and the supply voltage is 100 V. Obtain
the proper values of commutating elements.
C
V
=100V
IL
IL
Fig. 5.20
Solution
C
and this should be greater than I L . Let I p 1.5I L .
L
I p Peak value of i V
C
L
... a
Also, assuming that at the time of turn off the capacitor voltage is approximately
equal to V (and referring to waveform of capacitor voltage in figure 5.13) and the load
current linearly charges the capacitor
tc
CV
seconds
IL
Therefore
40 106 C
Therefore
C 4 F
100
10
1.5 10 100
4 106
L
104 4 106
L
L 1.777 104 H
L 0.177mH .
1.52 102
Therefore
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Problem 5.7: In a resonant commutation circuit supply voltage is 200 V. Load current is 10
A and the device turn off time is 20s. The ratio of peak resonant current to load current is
1.5. Determine the value of L and C of the commutation circuit.
Solution
Given
Ip
IL
1.5
Therefore
I p 1.5 I L 1.5 10 15 A .
That is
Ip V
C
15 A
L
... a
It is given that the device turn off time is 20 sec. Therefore tc , the circuit turn off
time should be greater than this,
Let
tc 30 sec .
And
tc
Therefore
30 106
Therefore
C 1.5 F .
CV
IL
200 C
10
Substituting in (a)
15 200
1.5 106
L
152 2002
Therefore
Dept.ofECE/SJBIT
1.5 106
L
L 0.2666 mH
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10EC73
IL
R1
R2
ab
iC
V
C
T1
T2
Where V f is the final voltage, Vi is the initial voltage and is the time constant.
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t tc , vc t 0 ,
At
R1C , V f V , Vi V ,
tc
Therefore 0 V V V e R1C
tc
0 V 2Ve R1C
Therefore
V 2Ve
0.5 e
tc
R1C
tc
R1C
Dept.ofECE/SJBIT
R1 R2 R
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Gate pulse
of T2
Gate pulse
of T1
p
V
IL
Current through R1
V
R1
2V
R1
t
2V
R2
Current through T 1
V
R1
t
Current through T2
2V
R1
V
R2
V
Voltage across
capacitor v ab
t
-V
tC
tC
Voltage across T1
tC
Fig. 5.22
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Problem 5.8: In the circuit shown in figure 1.23 the load resistances R1 R2 R 5 and
the capacitance C = 7.5 F, V = 100 volts. Determine the circuits turn off time tc .
R1
R2
V
C
T1
T2
Fig. 5.23
Solution
The circuit turn-off time
tc 0.693 RC seconds
tc 0.693 5 7.5 10 6
tc 26 sec .
Problem 5.9: Calculate the values of RL and C to be used for commutating the main SCR in
the circuit shown in figure 1.24. When it is conducting a full load current of 25 A flows. The
minimum time for which the SCR has to be reverse biased for proper commutation is 40sec.
Also find R1 , given that the auxiliary SCR will undergo natural commutation when its forward
current falls below the holding current value of 2 mA.
i1
IL
R1
RL
iC
V
=100V
C
Auxiliary
SCR
Main
SCR
Fig. 5.24
Solution
In this circuit only the main SCR carries the load and the auxiliary SCR is used to turn
off the main SCR. Once the main SCR turns off the current through the auxiliary SCR is the
sum of the capacitor charging current ic and the current i1 through R1 , ic reduces to zero after
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a time tc and hence the auxiliary SCR turns off automatically after a time tc , i1 should be less
than the holding current.
I L 25 A
Given
V 100
RL RL
That is
25 A
Therefore
RL 4
tc 40 sec 0.693RLC
That is
40 106 0.693 4 C
Therefore
40 106
4 0.693
C 14.43 F
V
should be less than the holding current of auxiliary SCR.
R1
100
Therefore
should be < 2mA.
R1
i1
100
2 103
Therefore
R1
That is
R1 50 K
T1
T3
V
VC(O)
L
C
T2
FWD
L
O
A
D
The working of the circuit can be explained as follows. It is assumed that initially the
capacitor C is charged to a voltage VC O with polarity as shown. Let the thyristor T1 be
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10EC73
conducting and carry a load current I L . If the thyristor T1 is to be turned off, T2 is fired. The
capacitor voltage comes across T1 , T1 is reverse biased and it turns off. Now the capacitor
starts charging through T2 and the load. The capacitor voltage reaches V with top plate being
positive. By this time the capacitor charging current (current through T2 ) would have reduced
to zero and T2 automatically turns off. Now T1 and T2 are both off. Before firing T1 again, the
capacitor voltage should be reversed. This is done by turning on T3 , C discharges through T3
and L and the capacitor voltage reverses. The waveforms are shown in figure 5.26.
Gate pulse
of T3
Gate pulse
of T2
Gate pulse
of T1
t
VS
Capacitor
voltage
t
VC
tC
Voltage across T1
t
VC
(i) Expression for Circuit Turn Off Time (Available Turn Off Time) tc
tc depends on the load current I L and is given by the expression
t
1 c
VC I L dt
C0
(assuming the load current to be constant)
VC
tc
I L tc
C
VC C
seconds
IL
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10EC73
Note:
T1 is turned off by applying a negative voltage across its terminals. Hence this is
voltage commutation.
tc depends on load current. For higher load currents tc is small. This is a disadvantage
of this circuit.
When T2 is fired, voltage across the load is V VC ; hence the current through load
shoots up and then decays as the capacitor starts charging.
i
+
T1
VC(O)
IT 1
T2
V
D
L
IL
RL
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10EC73
Gate pulse
of T2
Gate pulse
of T1
VC
Capacitor
voltage
t
V
tC
This is due to i
IT 1
IL
Current through SCR
V
RL
t
2V
RL
IL
Load current
t
Voltage across T1
t
tC
Problem 5.10: An impulse commutated thyristor circuit is shown in figure 5.29. Determine
the available turn off time of the circuit if V = 100 V, R = 10 and C = 10 F. Voltage
across capacitor before T2 is fired is V volts with polarity as shown.
+
C
V
T1
VC(0)
T2
Fig. 5.29
Solution
When T2 is triggered the circuit is as shown in figure 5.30.
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VC(O)
- +
i(t)
C
T2
Fig. 5.30
VC(0)
s
1
Cs
I(s)
+
R
V
s
Fig. 5.31
1
V VC 0
s
I S
1
R
Cs
I S
I S
Dept.ofECE/SJBIT
C V VC 0
1 RCs
V V 0
C
Rs
RC
VC s I s
1 VC 0
Cs
s
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10EC73
VC s
VC s
VC s
1 V VC 0 VC 0
1
RCs
s
s
RC
V VC 0 V VC 0 VC 0
1
s
s
RC
V 0
V
V
C
1
s s 1
s
RC
RC
vc t V 1 e
RC
V 0 e
RC
vc t V 1 2e
Therefore
RC
VC(0)
tC
Fig. 5.32
At t tc , vc t 0
Therefore
tc
0 V 1 2e RC
1 2e
Dept.ofECE/SJBIT
tc
RC
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10EC73
tc
1
e RC
2
tc RC ln 2
tc 10 10 106 ln 2
tc 69.3 sec .
Problem 5.11: In the commutation circuit shown in figure 5.33. C = 20 F, the input voltage
V varies between 180 and 220 V and the load current varies between 50 and 200 A.
Determine the minimum and maximum values of available turn off time tc .
T1
I0
C
V
VC(0)=V
T2
I0
Fig. 5.33
Solution
It is given that V varies between 180 and 220 V and I O varies between 50 and 200 A.
The expression for available turn off time tc is given by
tc
CV
IO
Therefore
tc max
CVmax
I O min
tc max 20 106
Dept.ofECE/SJBIT
220
88 sec
50
Page 160
and
tc min
10EC73
CVmin
I O max
tc min 20 106
180
18 sec
200
T1
VS
T2
RL
2VAUX
T3
VAUX
subjected to a reverse voltage equal to VS 2VAUX . This results in thyristor T1 being turnedoff. Once T1 is off capacitor C discharges through the load RL
Load Side Commutation
In load side commutation the discharging and recharging of capacitor takes place
through the load. Hence to test the commutation circuit the load has to be connected.
Examples of load side commutation are Resonant Pulse Commutation and Impulse
Commutation.
Line Side Commutation
In this type of commutation the discharging and recharging of capacitor takes place
through the supply.
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T1
IL
+
T3
_C
FWD
VS
Lr
L
O
A
D
T2
_
Fig.: 5.35 Line Side Commutation Circuit
Figure 5.35 shows line side commutation circuit. Thyristor T2 is fired to charge the
capacitor C. When C charges to a voltage of 2V, T2 is self commutated. To reverse the
voltage of capacitor to -2V, thyristor T3 is fired and T3 commutates by itself. Assuming that
T1 is conducting and carries a load current I L thyristor T2 is fired to turn off T1 . The turning
ON of T2 will result in forward biasing the diode (FWD) and applying a reverse voltage of
2V across T1 . This turns off T1 , thus the discharging and recharging of capacitor is done
through the supply and the commutation circuit can be tested without load.
Recommended questions:
1.
2.
3.
4.
5.
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13. What is the purpose of connecting an anti-parallel diode across the main thyristor with or
without a series inductor? What is the ratio of peak resonant to load current for resonant
pulse commutation that would minimize the commutation losses?
14. Why does the commutation capacitor in a resonant pulse commutation get over
charged?
15. How is the voltage of the commutation capacitor reversed in a commutation circuit?
16. What is the type of a capacitor used in high frequency switching circuits?
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Unit-6
AC VOLTAGE CONTROLLER CIRCUITS
AC voltage controllers (ac line voltage controllers) are employed to vary the RMS
value of the alternating voltage applied to a load circuit by introducing Thyristors between
the load and a constant voltage ac source. The RMS value of alternating voltage applied to a
load circuit is controlled by controlling the triggering angle of the Thyristors in the ac voltage
controller circuits.
In brief, an ac voltage controller is a type of thyristor power converter which is used
to convert a fixed voltage, fixed frequency ac input supply to obtain a variable voltage ac
output. The RMS value of the ac output voltage and the ac power flow to the load is
controlled by varying (adjusting) the trigger angle
V0(RMS)
AC
Input
Voltage
fs
Vs
fs
AC
Voltage
Controller
Variable AC
RMSO/P Voltage
fS
There are two different types of thyristor control used in practice to control the ac power
flow
On-Off control
Phase control
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The trigger delay angle is defined as the phase angle (the value of t) at which the
thyristor turns on and the load current begins to flow.
Thyristor ac voltage controllers use ac line commutation or ac phase commutation.
Thyristors in ac voltage controllers are line commutated (phase commutated) since the input
supply is ac. When the input ac voltage reverses and becomes negative during the negative
half cycle the current flowing through the conducting thyristor decreases and falls to zero.
Thus the ON thyristor naturally turns off, when the device current falls to zero.
Phase control Thyristors which are relatively inexpensive, converter grade Thyristors
which are slower than fast switching inverter grade Thyristors are normally used.
For applications upto 400Hz, if Triacs are available to meet the voltage and current
ratings of a particular application, Triacs are more commonly used.
Due to ac line commutation or natural commutation, there is no need of extra
commutation circuitry or components and the circuits for ac voltage controllers are very
simple.
Due to the nature of the output waveforms, the analysis, derivations of expressions for
performance parameters are not simple, especially for the phase controlled ac voltage
controllers with RL load. But however most of the practical loads are of the RL type and
hence RL load should be considered in the analysis and design of ac voltage controller
circuits.
6.2 Type of Ac Voltage Controllers
The ac voltage controllers are classified into two types based on the type of input ac
supply applied to the circuit.
Single Phase AC Controllers.
Three Phase AC Controllers.
Single phase ac controllers operate with single phase ac supply voltage of 230V RMS
at 50Hz in our country. Three phase ac controllers operate with 3 phase ac supply of 400V
RMS at 50Hz supply frequency.
Each type of controller may be sub divided into
Uni-directional or half wave ac controller.
Bi-directional or full wave ac controller.
In brief different types of ac voltage controllers are
Single phase half wave ac voltage controller (uni-directional controller).
Single phase full wave ac voltage controller (bi-directional controller).
Three phase half wave ac voltage controller (uni-directional controller).
Three phase full wave ac voltage controller (bi-directional controller).
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Speed control of induction motors (single phase and poly phase ac induction motor
control).
AC magnet controls.
Vs
wt
Vo
io
wt
ig1
Gate pulse of T1
wt
ig2
Gate pulse of T2
wt
R RL = Load Resistance
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Example
Referring to the waveforms of ON-OFF control technique in the above diagram,
n Two input cycles. Thyristors are turned ON during tON for two input cycles.
m One input cycle. Thyristors are turned OFF during tOFF for one input cycle
Thyristors are turned ON precisely at the zero voltage crossings of the input supply.
The thyristor T1 is turned on at the beginning of each positive half cycle by applying the gate
trigger pulses to T1 as shown, during the ON time tON . The load current flows in the positive
direction, which is the downward direction as shown in the circuit diagram when T1 conducts.
The thyristor T2 is turned on at the beginning of each negative half cycle, by applying gating
signal to the gate of T2 , during tON . The load current flows in the reverse direction, which is
the upward direction when T2 conducts. Thus we obtain a bi-directional load current flow
(alternating load current flow) in a ac voltage controller circuit, by triggering the thyristors
alternately.
This type of control is used in applications which have high mechanical inertia and
high thermal time constant (Industrial heating and speed control of ac motors).Due to zero
voltage and zero current switching of Thyristors, the harmonics generated by switching
actions are reduced.
For a sine wave input supply voltage,
vs Vm sin t 2VS sin t
V
VS RMS value of input ac supply = m = RMS phase supply voltage.
2
If the input ac supply is connected to load for n number of input cycles and
disconnected for m number of input cycles, then
tON n T ,
tOFF m T
1
= input cycle time (time period) and
f
f = input supply frequency.
Where T
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tON
t
VS ON
TO
TO
VO RMS
Substituting for
VO RMS
Vm 2
TO
tON
Sin 2 t.d t
1 Cos 2
2
tON
Vm 2
2TO
1 Cos 2 t
d t
2
tON
tON
Cos 2t.d t
Vm 2
t
2TO
VO RMS
Now
Vm 2
TO
Sin2
VO RMS
VO RMS
1 ON 2 2
V Sin t.d t
TO t0 m
tON
Sin 2 t
tON
Vm 2
sin 2 tON sin 0
tON 0
2TO
2
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Where T is the input supply time period (T = input cycle time period). Thus we note that
sin 2 tON 0
VO RMS
Vm 2 tON Vm tON
2 TO
2 TO
VO RMS Vi RMS
Where Vi RMS
tON
t
VS ON
TO
TO
Vm
VS = RMS value of input supply voltage;
2
tON
tON
nT
n
VO RMS VS
n
V k
m n S
VO RMS
Vm 2 sin 2 t.d t
2 n m 0
VO RMS
Vm
2
n
V
k VS k
m n i RMS
VO RMS Vi RMS k VS k
Duty Cycle
t
tON
nT
k ON
TO tON tOFF m n T
Where, k
Dept.ofECE/SJBIT
n
= duty cycle (d).
m n
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10EC73
VO RMS
Z
VO RMS
RL
PO IO2 RMS RL
PF
PO
P
output load power
O
VA input supply volt amperes VS I S
I O2 RMS RL
Vi RMS I in RMS
PF
IO2 RMS RL
Vi RMS Iin RMS
PF k
VO RMS
Vi RMS
Vi RMS k
Vi RMS
n
mn
Im
IT Avg
Dept.ofECE/SJBIT
n
I m sin t.d t
2 m n 0
Page 170
10EC73
IT Avg
nI m
sin t.d t
2 m n 0
IT Avg
nI m
cos t
2 m n
IT Avg
nI m
cos cos 0
2 m n
IT Avg
nI m
1 1
2 m n
IT Avg
n
2Im
2 m n
IT Avg
Imn
k .I
m
m n
k duty cycle
IT Avg
Where I m
tON
n
tON tOFF n m
Imn
k .I
m ,
m n
Vm
= maximum or peak thyristor current.
RL
IT RMS
n
2
2
I
sin
t
.
d
2 n m 0
IT RMS
nI m2
sin 2 t.d t
2 n m 0
IT RMS
nI m2
1 cos 2t d t
2
2 n m 0
IT RMS
nI m2
cos 2t.d t
4 n m 0
0
Dept.ofECE/SJBIT
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IT RMS
10EC73
nI m2
t
4 n m
sin 2t
IT RMS
nI m2
sin 2 sin 0
0
2
4 n m
IT RMS
nI m2
0 0
4 n m
IT RMS
nI m2
4 n m
Im
2
I
n
m k
m n 2
IT RMS
Im
2
nI m2
4 n m
IT RMS
Problem
1. A single phase full wave ac voltage controller working on ON-OFF control technique
has supply voltage of 230V, RMS 50Hz, load = 50. The controller is ON for 30
cycles and off for 40 cycles. Calculate
ON & OFF time intervals.
RMS output voltage.
Input P.F.
Average and RMS thyristor currents.
1
1
0.02sec ,
f 50 Hz
T 20ms .
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Duty cycle k
n
30
0.4285
m n 40 30
n
m n
VO RMS 230V
30
3
230
7
30 40
VO RMS 150.570V
VO RMS
I O RMS
VO RMS
RL
150.570V
3.0114 A
50
n
30
0.4285
m n 70
PF 0.654653
Average Thyristor Current Rating
I n k Im
IT Avg m
m n
where
Im
Vm
2 230 325.269
RL
50
50
6.505382 3
IT Avg 0.88745 A
Page 173
IT RMS
Im
2
10EC73
I
n
6.505382
3
m k
2
7
m n 2
IT RMS 2.129386 A
6.4 Principle of ACPhase Control
The basic principle of ac phase control technique is explained with reference to a
single phase half wave ac voltage controller (unidirectional controller) circuit shown in the
below figure.
The half wave ac controller uses one thyristor and one diode connected in parallel
across each other in opposite direction that is anode of thyristor T1 is connected to the
cathode of diode D1 and the cathode of T1 is connected to the anode of D1 . The output
voltage across the load resistor R and hence the ac power flow to the load is controlled by
varying the trigger angle .
The trigger angle or the delay angle refers to the value of t or the instant at
which the thyristor T1 is triggered to turn it ON, by applying a suitable gate trigger pulse
between the gate and cathode lead.
The thyristor T1 is forward biased during the positive half cycle of input ac supply. It
can be triggered and made to conduct by applying a suitable gate trigger pulse only during the
positive half cycle of input supply. When T1 is triggered it conducts and the load current
flows through the thyristor T1 , the load and through the transformer secondary winding.
By assuming T1 as an ideal thyristor switch it can be considered as a closed switch
when it is ON during the period t to radians. The output voltage across the load
follows the input supply voltage when the thyristor T1 is turned-on and when it conducts from
Dept.ofECE/SJBIT
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10EC73
VS Vin RMS
Vm
= RMS value of secondary supply voltage.
2
vo Vm sin t
; for t to 2 .
RL
RL
io iL 0 ; for t 0 to .
Dept.ofECE/SJBIT
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10EC73
VO RMS
1
2
2
Vm sin t.d t
2
VO RMS
Vm 2 1 cos 2 t
.d t
2
2
VO RMS
Vm 2
1 cos 2 t .d t
4
VO RMS
VO RMS
VO RMS
VO RMS
Vm
sin 4 sin 2
2
2
Vm
2 2
;sin 4 0
sin 2
2
sin 2
2
1
sin 2
2
2
2
VO RMS Vi RMS
Dept.ofECE/SJBIT
sin 2 t
Vm
2
sin 2 t
2
Vm
Vm
2
VO RMS
Vm
VO RMS
VO RMS
2
2
d t cos 2 t.d t
Vm
1
sin 2
2
2
2
Page 176
10EC73
1
sin 2
2
2
2
VO RMS VS
Vm
2
transformer secondary winding).
Where, Vi RMS VS
Note: Output RMS voltage across the load is controlled by changing ' ' as indicated by the
expression for VO RMS
PLOT OF VO RMS VERSUS TRIGGER ANGLE FOR A SINGLE PHASE HALF-WAVE
AC VOLTAGE CONTROLLER (UNIDIRECTIONAL CONTROLLER)
VO RMS
1
sin 2
2
2
2
Vm
2
1
sin 2
2
2
2
VO RMS VS
By using the expression for VO RMS we can obtain the control characteristics, which is
the plot of RMS output voltage VO RMS versus the trigger angle . A typical control
characteristic of single phase half-wave phase controlled ac voltage controller is as shown
below
Trigger angle
in degrees
Trigger angle
in radians
Dept.ofECE/SJBIT
300
600
900
1200
1500
1800
6
3
2
3
6
6
; 2
6
; 3
6
; 4
6
; 5
6
; 6
6
; 1
VO RMS
VS
Vm
2
0.992765 VS
0.949868 VS
0.866025 VS
0.77314 VS
0.717228 VS
0.707106 VS
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10EC73
VO(RMS)
70.7% VS
100% VS
60% VS
20% VS
0
60
120
180
Note: We can observe from the control characteristics and the table given above that the
range of RMS output voltage control is from 100% of VS to 70.7% of VS when we vary the
trigger angle from zero to 180 degrees. Thus the half wave ac controller has the drawback
of limited range RMS output voltage control.
VO dc
Vm
2
VO dc
Vm
2
VO dc
Vm
cos 2 cos
2
Vdc
Hence Vdc
sin t.d t
cos t
Vm
cos 1
2
; cos 2 1
; Vm 2VS
2VS
cos 1
2
Vm
Page 178
10EC73
current waveform also has a DC component (average value) which can result in the
problem of core saturation of the input supply transformer.
The half wave ac voltage controller using a single thyristor and a single diode
provides control on the thyristor only in one half cycle of the input supply. Hence ac
power flow to the load can be controlled only in one half cycle.
Half wave ac voltage controller gives limited range of RMS output voltage control.
Because the RMS value of ac output voltage can be varied from a maximum of 100%
of VS at a trigger angle 0 to a low of 70.7% of VS at Radians .
These drawbacks of single phase half wave ac voltage controller can be over come by
using a single phase full wave ac voltage controller.
Applications of rms Voltage Controller
Speed control of induction motor (polyphase ac induction motor).
Heater control circuits (industrial heating).
Welding power control.
Induction heating.
On load transformer tap changing.
Lighting control in ac circuits.
Ac magnet controls.
Problem
1. A single phase half-wave ac voltage controller has a load resistance R 50 ; input ac
supply voltage is 230V RMS at 50Hz. The input supply transformer has a turns ratio
of 1:1. If the thyristor T1 is triggered at 600 . Calculate
Dept.ofECE/SJBIT
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10EC73
Given,
600
radians.
3
VS RMS secondary voltage.
Vp
VS
Therefore
Np
1
1
NS 1
V p VS 230V
VO RMS
1
2
2
m
sin 2 t.d t
VO RMS VS
sin1200
2
3
2
VO RMS 230
1
2
VO RMS 230
1
5.669 230 0.94986
2
Dept.ofECE/SJBIT
VO RMS
RL
218.46966
4.36939 Amps
50
Page 180
10EC73
PO 0.9545799 KW
PO
VS I S
954.5799 W
0.9498
230 4.36939 W
VO dc
1
Vm sin t.d t
2
We have obtained the expression for the average / DC output voltage as,
VO dc
VO dc
VO dc
Vm
cos 1
2
2 230
325.2691193
cos 600 1
0.5 1
2
2
325.2691193
0.5 25.88409 Volts
2
Dept.ofECE/SJBIT
VO dc
RL
25.884094
0.51768 Amps
50
Page 181
10EC73
iT1
Im
2
(2+)
IT Avg
1
I m sin t.d t
2
IT Avg
Im
sin t.d t
2
IT Avg
Im
cos t
2
IT Avg
Im
cos cos
2
IT Avg
Im
1 cos
2
Where, I m
Im
Vm
= Peak thyristor current = Peak load current.
RL
2 230
50
I m 6.505382 Amps
Dept.ofECE/SJBIT
Page 182
IT Avg
IT Avg
10EC73
Vm
1 cos
2 RL
2 230
1 cos 600
2 50
2 230
1 0.5
100
IT RMS
1 2
2
I m sin t.d t
2
IT RMS
I m2 1 cos 2 t
.d t
2
2
IT RMS
I m2
d t cos 2 t.d t
4
IT RMS I m
1
t
4
IT RMS I m
1
sin 2 sin 2
4
2
IT RMS I m
1
sin 2
4
2
IT RMS
IT RMS
Dept.ofECE/SJBIT
Im
2
sin 2 t
1
sin 2
2
2
0
6.50538 1
sin 120
2
3
2
2
Page 183
IT RMS 4.6
1 2
2 3
10EC73
0.8660254
6.5 Single Phase Full Wave Ac Voltage Controller (Ac Regulator) or Rms Voltage
Controller with Resistive Load
Single phase full wave ac voltage controller circuit using two SCRs or a single triac is
generally used in most of the ac control applications. The ac power flow to the load can be
controlled in both the half cycles by varying the trigger angle ' ' .
The RMS value of load voltage can be varied by varying the trigger angle ' ' . The
input supply current is alternating in the case of a full wave ac voltage controller and due to
the symmetrical nature of the input supply current waveform there is no dc component of
input supply current i.e., the average value of the input supply current is zero.
A single phase full wave ac voltage controller with a resistive load is shown in the
figure below. It is possible to control the ac power flow to the load in both the half cycles by
adjusting the trigger angle ' ' . Hencethe full wave ac voltage controller is also referred to as
to a bi-directional controller.
Fig 6.7: Single phase full wave ac voltage controller (Bi-directional Controller) using SCRs
The thyristor T1 is forward biased during the positive half cycle of the input supply
voltage. The thyristor T1 is triggered at a delay angle of ' ' 0 radians . Considering
the ON thyristor T1 as an ideal closed switch the input supply voltage appears across the load
resistor RL and the output voltage vO vS during t to radians. The load current
flows through the ON thyristor T1 and through the load resistor RL in the downward direction
during the conduction time of T1 from t to radians.
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10EC73
At t , when the input voltage falls to zero the thyristor current (which is flowing
through the load resistor RL ) falls to zero and hence T1 naturally turns off . No current flows
in the circuit during t to .
The thyristor T2 is forward biased during the negative cycle of input supply and when
thyristor T2 is triggered at a delay angle , the output voltage follows the negative
halfcycle of input from t to 2 . When T2 is ON, the load current flows in the
reverse direction (upward direction) through T2 during t to 2 radians. The time
interval (spacing) between the gate trigger pulses of T1 and T2 is kept at radians or 1800. At
t 2 the input supply voltage falls to zero and hence the load current also falls to zero and
thyristor T2 turn off naturally.
Instead of using two SCRs in parallel, a Triac can be used for full wave ac voltage
control.
Fig 6.8: Single phase full wave ac voltage controller (Bi-directional Controller) using TRIAC
Dept.ofECE/SJBIT
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10EC73
Equations
Input supply voltage
for t to and t to 2
Output load current
v
V sin t
iO O m
I m sin t ;
RL
RL
for t to and t to 2
(i) To Derive an Expression for the Rms Value of Output (Load) Voltage
The RMS value of output voltage (load voltage) can be found using the expression
2
O RMS
L RMS
v d t ;
2
For a full wave ac voltage controller, we can see that the two half cycles of output
voltage waveforms are symmetrical and the output pulse time period (or output pulse
repetition time) is radians. Hence we can also calculate the RMS output voltage by using
the expression given below.
V 2 L RMS
sin 2 t.dt
L RMS
.d t ;
Hence,
VL2 RMS
1
2
2
V
sin
t
d
Vm sin t d t
m
2
1
2
Dept.ofECE/SJBIT
2
2 2
2
V
sin
t
.
d
V
m sin 2 t.d t
m
Page 186
10EC73
Vm 2 1 cos 2t
1 cos 2t
d
d t
2
2
2
2
2
Vm 2
d
cos
2
t
.
d
cos 2t.d t
2 2
Vm 2
t
4
sin 2 t
sin 2 t
2 2
Vm 2
1
1
sin 2 sin 2 sin 4 sin 2
4
2
2
Vm 2
4
1
1
2 2 0 sin 2 2 0 sin 2
Vm 2
4
sin 2 sin 2
2
2
Vm 2
4
sin 2 sin 2 2
2
2
Vm 2
sin 2 1
Vm 2
4
sin 2 sin 2
2 2 2
Vm 2
2 sin 2
4
V 2 L RMS
Vm 2
2 2 sin 2
4
Dept.ofECE/SJBIT
Page 187
Vm
2
VL RMS
Vm
VL RMS
Vm
VL RMS
2 2 sin 2
Vm
2 2
VL RMS
10EC73
2 2 sin 2
1
2 2 sin 2
2
1
2
sin 2
2 2
Vm 1
sin 2
2
2
VL RMS Vi RMS
VL RMS VS
1
sin 2
1
sin 2
Maximum RMS voltage will be applied to the load when 0 , in that case the full
sine wave appears across the load. RMS load voltage will be the same as the RMS supply
V
voltage m . When is increased the RMS load voltage decreases.
2
VL RMS
VL RMS
VL RMS
Vm 1
sin 2 0
0
2
2
Vm 1
0
2
2
Vm
Vi RMS VS
The output control characteristic for a single phase full wave ac voltage controller
with resistive load can be obtained by plotting the equation for VO RMS
Dept.ofECE/SJBIT
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10EC73
VO RMS VS
1
sin 2
Where VS
Vm
RMS value of input supply voltage
2
Trigger angle
in degrees
0
Trigger angle
in radians
0
300
600
900
1200
1500
1800
3
2
3
6
6
; 2
6
; 3
6
; 4
6
; 5
6
; 6
6
; 1
VO RMS
VS
100% VS
0.985477 VS
98.54% VS
0.896938 VS
89.69% VS
0.7071 VS
70.7% VS
0.44215 VS
44.21% VS
0.1698 VS
16.98% VS
0 VS
0 VS
VO(RMS)
VS
0.6VS
0.2 VS
0
60
120
180
Dept.ofECE/SJBIT
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10EC73
We can notice from the figure, that we obtain a much better output control
characteristic by using a single phase full wave ac voltage controller. The RMS output
voltage can be varied from a maximum of 100% VS at 0 to a minimum of 0 at
1800 . Thus we get a full range output voltage control by using a single phase full wave
ac voltage controller.
Need For Isolation
In the single phase full wave ac voltage controller circuit using two SCRs or
Thyristors T1 and T2 in parallel, the gating circuits (gate trigger pulse generating circuits) of
Thyristors T1 and T2 must be isolated. Figure shows a pulse transformer with two separate
windings to provide isolation between the gating signals of T1 and T2 .
Gate
Trigger
Pulse
Generator
G1
K1
G2
K2
6.6 Single Phase Full Wave Ac Voltage Controller (Bidirectional Controller) With RL
Load
In this section we will discuss the operation and performance of a single phase full
wave ac voltage controller with RL load. In practice most of the loads are of RL type. For
example if we consider a single phase full wave ac voltage controller controlling the speed of
a single phase ac induction motor, the load which is the induction motor winding is an RL
type of load, where R represents the motor winding resistance and L represents the motor
winding inductance.
A single phase full wave ac voltage controller circuit (bidirectional controller) with an
RL load using two thyristors T1 and T2 ( T1 and T2 are two SCRs) connected in parallel is
shown in the figure below. In place of two thyristors a single Triac can be used to implement
a full wave ac controller, if a suitable Traic is available for the desired RMS load current and
the RMS output voltage ratings.
Dept.ofECE/SJBIT
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10EC73
Fig 6.11: Single phase full wave ac voltage controller with RL load
The thyristor T1 is forward biased during the positive half cycle of input supply. Let
us assume that T1 is triggered at t , by applying a suitable gate trigger pulse to T1 during
the positive half cycle of input supply. The output voltage across the load follows the input
supply voltage when T1 is ON. The load current iO flows through the thyristor T1 and through
the load in the downward direction. This load current pulse flowing through T1 can be
considered as the positive current pulse. Due to the inductance in the load, the load current iO
flowing through T1 would not fall to zero at t , when the input supply voltage starts to
become negative.
The thyristor T1 will continue to conduct the load current until all the inductive energy
stored in the load inductor L is completely utilized and the load current through T1 falls to
zero at t , where is referred to as the Extinction angle, (the value of t ) at which the
load current falls to zero. The extinction angle is measured from the point of the beginning
of the positive half cycle of input supply to the point where the load current falls to zero.
The thyristor T1 conducts from t to . The conduction angle of T1 is
, which depends on the delay angle and the load impedance angle . The
waveforms of the input supply voltage, the gate trigger pulses of T1 and T2 , the thyristor
current, the load current and the load voltage waveforms appear as shown in the figure below.
Dept.ofECE/SJBIT
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10EC73
is the extinction angle which depends upon the load inductance value.
Dept.ofECE/SJBIT
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10EC73
Waveforms of single phase full wave ac voltage controller with RL load for .
Discontinuous load current operation occurs for and ;
i.e., , conduction angle .
Fig 6.14: Waveforms of Input supply voltage, Load Current, Load Voltage and Thyristor Voltage across T1
Note
The RMS value of the output voltage and the load current may be varied by varying
the trigger angle .
This circuit, AC RMS voltage controller can be used to regulate the RMS voltage
across the terminals of an ac motor (induction motor). It can be used to control the
temperature of a furnace by varying the RMS output voltage.
For very large load inductance L the SCR may fail to commutate, after it is triggered
and the load voltage will be a full sine wave (similar to the applied input supply
Dept.ofECE/SJBIT
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10EC73
voltage and the output control will be lost) as long as the gating signals are applied to
the thyristors T1 and T2 . The load current waveform will appear as a full continuous
sine wave and the load current waveform lags behind the output sine wave by the load
power factor angle .
(i) To Derive an Expression for the Output (Inductive Load) Current, During
t to When Thyristor T1 Conducts
Considering sinusoidal input supply voltage we can write the expression for the
supply voltage as
vS Vm sin t = instantaneous value of the input supply voltage.
Let us assume that the thyristor T1 is triggered by applying the gating signal to T1 at
t . The load current which flows through the thyristor T1 during t to can be
found from the equation
di
L O RiO Vm sin t ;
dt
The solution of the above differential equation gives the general expression for the
output load current which is of the form
iO
t
Vm
sin t A1e ;
Z
Z R 2 L = Load impedance.
2
L
= Load impedance angle (power factor angle of load).
R
tan 1
L
= Load circuit time constant.
R
Therefore the general expression for the output load current is given by the equation
iO
Dept.ofECE/SJBIT
R
t
Vm
sin t A1e L ;
Z
Page 194
10EC73
The value of the constant A1 can be determined from the initial condition. i.e. initial
value of load current iO 0 , at t . Hence from the equation for iO equating iO to zero
and substituting t , we get
R
t
Vm
iO 0
sin A1e L
Z
Therefore
A1e
R
t
L
A1
e
A1 e
A1 e
Vm
sin
Z
1 Vm
Z sin
R
t
L
R
t
L
Vm
Z sin
R t
L
Vm
Z sin
A1 e
R
L
Vm
Z sin
Substituting the value of constant A1 from the above equation into the expression for iO , we
obtain
R
t
Vm
V
sin t e L e L m sin ;
Z
Z
iO
V
iO m sin t e
Z
iO
Rt
L
R
L
Vm
Z sin
R
t Vm
Vm
sin t e L
sin
Z
Z
Therefore we obtain the final expression for the inductive load current of a single
phase full wave ac voltage controller with RL load as
Dept.ofECE/SJBIT
Page 195
iO
Vm
Z
10EC73
R
t
L
sin
sin
Where t .
The above expression also represents the thyristor current iT 1 , during the conduction
time interval of thyristor T1 from t to .
To Calculate Extinction Angle
The extinction angle , which is the value of t at which the load current iO
falls to zero and T1 is turned off can be estimated by using the condition that iO 0 , at
t
By using the above expression for the output load current, we can write
R
Vm
L
iO 0
sin sin e
As
Vm
0 we can write
Z
R
L
sin sin e
0
sin sin e
The extinction angle can be determined from this transcendental equation by using
the iterative method of solution (trial and error method). After is calculated, we can
determine the thyristor conduction angle .
is the extinction angle which depends upon the load inductance value. Conduction
angle increases as is decreased for a known value of .
For radians, i.e., for
radians,
waveform appears as a discontinuous current waveform as shown in the figure. The output
load current remains at zero during t to . This is referred to as discontinuous
load current operation which occurs for .
When the trigger angle is decreased and made equal to the load impedance angle
i.e., when we obtain from the expression for sin ,
sin 0 ; Therefore
Dept.ofECE/SJBIT
radians.
Page 196
10EC73
Extinction angle
Conduction angle
vO=vS
Vm
iO
Im
Fig 6.15: Output Voltage And Output Current Waveforms For A Single Phase Full Wave Ac Voltage Controller
With Rl Load For
Thus we observe that for trigger angle , the load current tends to flow
continuously and we have continuous load current operation, without any break in the load
current waveform and we obtain output voltage waveform which is a continuous sinusoidal
waveform identical to the input supply voltage waveform. We lose the control on the output
voltage for as the output voltage becomes equal to the input supply voltage and thus
we obtain
V
VO RMS m VS ; for
2
Hence,
RMS output voltage = RMS input supply voltage for
Dept.ofECE/SJBIT
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10EC73
(ii) To Derive an Expression For rms Output Voltage VO RMS of a Single Phase Full-Wave Ac
Voltage Controller with RL Load.
When O , the load current and load voltage waveforms become discontinuous as
shown in the figure above.
1
2
VO RMS
Vm 2 1 cos 2t
VO RMS
V 2
m
2
VO RMS
V 2
m t
2
VO RMS
V 2
sin 2 sin 2
m
2
2
2
VO RMS
1
sin 2 sin 2
Vm
2
2
2
VO RMS
V 1
sin 2 sin 2
m
2
2
2
cos 2 t.d t
sin 2 t
The RMS output voltage across the load can be varied by changing the trigger angle
.
For a purely resistive load L 0 , therefore load power factor angle 0 .
Dept.ofECE/SJBIT
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10EC73
L
0 ;
R
tan 1
radians 1800
Extinction angle
Vm 1
V
sin 2
; m VS = RMS input
2
2
2
supply voltage.
VO RMS
IO RMS
RL
PO IO2 RMS RL
VS I S VS I O RMS
VS
PF
VO RMS
VS
1
sin 2
2
(2+)
IT Avg
Dept.ofECE/SJBIT
1
1
iT d t
I m sin t.d t
2
2
Page 199
10EC73
IT Avg
Im
I
sin t.d t m
2
2
cos t
Im
I
cos cos m 1 cos
2
2
Maximum Average Thyristor Current, for 0 ,
I
IT Avg m
IT Avg
IT RMS
1 2
2
I m sin t.d t
2
Im
2
1
sin 2
2
2
Im
2
In the case of a single phase full wave ac voltage controller circuit using a Triac with
resistive load, the average thyristor current IT Avg 0 . Because the Triac conducts in both the
IT RMS
half cycles and the thyristor current is alternating and we obtain a symmetrical thyristor
current waveform which gives an average value of zero on integration.
Performance Parameters of A Single Phase Full Wave Ac Voltage Controller with R-L
Load
The Expression for the Output (Load) Current
The expression for the output (load) currentwhich flows through the thyristor, during
t to is given by
V
iO iT1 m
Z
R
t
L
sin t sin e
for t
Where,
L
= Load impedance angle (load power factor angle).
R
tan 1
Page 200
10EC73
VO RMS
Vm 1
sin 2 sin 2
2
2
2
1
iT1 d t
2
IT Avg
1
2
IT Avg
Vm
L
sin
sin
d t
t
Vm
d t
sin t .d t sin e L
2 Z
IT RMS iT21 d t
2
When a Triac is used in a single phase full wave ac voltage controller with RL type of
I
load, then IT Avg 0 and maximum IT RMS m
2
Dept.ofECE/SJBIT
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10EC73
PROBLEMS
1. A single phase full wave ac voltage controller supplies an RL load. The input supply
voltage is 230V, RMS at 50Hz. The load has L = 10mH, R = 10, the delay angle of
f 50Hz , L 10mH , R 10 ,
600 , 1 2
radians, .
10 L
2
L 2 fL 2 50 10 103 3.14159
Z
Im
10 3.14159
2
109.8696 10.4818
Vm
2 230
31.03179 A
Z
10.4818
L
Load Impedance Angle tan 1
R
1
0
tan 0.314159 17.44059
10
tan 1
Trigger Angle . Hence the type of operation will be discontinuous load current
operation, we get
180 60 ; 2400
Therefore the range of is from 180 degrees to 240 degrees.
180
2400
Dept.ofECE/SJBIT
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10EC73
sin sin e
In the exponential term the value of and should be substituted in radians. Hence
R
sin sin e L
; Rad
3
Rad Rad
60 17.44059 42.55940
10
0
1800
Assuming 1900 ;
Rad
0
1800
1900
3.3161
180
R.H.S: 0.676354 e
3.183 3.3161
3
4.94 104
Assuming 1830 ;
Rad
0
1800
1830
3.19395
180
3.19395
2.14675
3
3.183 2.14675
7.2876 104
Assuming 1800
Rad
0
1800
1800
180
3 3
Dept.ofECE/SJBIT
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R.H.S: 0.676354e
10EC73
3.183
3
8.6092 104
Assuming 1960
Rad
0
1800
1960
3.420845
180
3.183 3.420845
3
3.5394 104
Assuming 197 0
Rad
0
1800
1970
3.43829
180
3.183 3.43829
3
4.950386476 104
Assuming 197.420
Rad
0
180
197.42
3.4456
180
3.183 3.4456
3
3.2709 104
VO RMS VS
VO RMS
1
sin 2 sin 2
2
2
0
0
1
sin 2 60 sin 2 197.42
3.4456
230
3
2
2
VO RMS 230
Dept.ofECE/SJBIT
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10EC73
PO
VS I S
I O RMS
VO RMS
Z
207.0445
19.7527 A
10.4818
VS 230V ,
PF
I S IO RMS 19.7527
PO
3901.716
0.8588
VS I S 230 19.7527
2.A single phase full wave controller has an input voltage of 120 V (RMS) and a load
resistance of 6 ohm. The firing angle of thyristor is 2 . Find
d. RMS output voltage
e. Power output
f. Input power factor
g. Average and RMS thyristor current.
Solution
900 , VS 120 V,
R 6
1
sin 2 2
VO VS
2
1
1
sin180 2
VO 120
2
2
VO 84.85 Volts
VO 84.85
14.14 A
R
6
Load Power
PO I O2 R
Dept.ofECE/SJBIT
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10EC73
0.707 lag
Input Volt-Amp 1696.8
2 R
Vm sin t.d t
Vm
1 cos ;
2 R
Vm 2VS
2 120
1 cos 90 4.5 A
2 6
IT RMS
1 Vm2 sin 2 t
d t
2
R2
1 cos 2 t d t
Vm2
2
2 R
2
V 1
sin 2 2
m
2R
2
1
2VS
2R
1
sin 2 2
2
2 120 1
sin180 2
10 Amps
2 6
2
2
3.A single phase half wave ac regulator using one SCR in anti-parallel with a diode feeds 1
kW, 230 V heater. Find load power for a firing angle of 450.
Dept.ofECE/SJBIT
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450
10EC73
Therefore
PO VO I O
VO VO VO2
R
R
Resistance of heater
V 2 230
R O
52.9
PO
1000
RMS value of output voltage
2
1
VO VS
2
sin 2 2
1
VO 230
2
sin 90
2
224.7157 Volts
4
2
io
SCR1
+
1-
220V
ac
Solution
450
SCR2
1 kW, 220V
heater
, VS 220 V
Resistance of heater
Dept.ofECE/SJBIT
Page 207
10EC73
V 2 220
R
48.4
R
1000
2
1
sin 90
VO 220
4
2
1
1
VO 220 209.769 Volts
4 2
VO 209.769
4.334 Amps
R
48.4
I Avg 0
5. A single phase voltage controller is employed for controlling the power flow from 220 V,
50 Hz source into a load circuit consisting of R = 4 and L = 6 mH. Calculate the following
a. Control range of firing angle
b. Maximum value of RMS load current
c. Maximum power and power factor
d. Maximum value of average and RMS thyristor current.
Solution
For control of output power, minimum angle of firing angle is equal to the load
impedance angle
, load angle
L
1 6
0
tan 56.3
R
4
tan 1
Dept.ofECE/SJBIT
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10EC73
VS
220
42 62
30.5085 Amps
Input Volt-Amp
Power Factor
PO
3723.077
0.5547
Input VA 6711.87
Average thyristor current will be maximum when and conduction angle 1800 .
Therefore maximum value of average thyristor current
Vm
1
IT Avg
sin t d t
2 Z
R
t
Vm
L
iO iT1
Note:
sin t sin e
At 0 ,
V
iT1 iO m sin t
Z
IT Avg
Vm
cos t
2 Z
IT Avg
Vm
cos cos
2 Z
IT Avg
Vm
V
V
cos cos 0 m 2 m
2 Z
2 Z
Z
But ,
IT Avg
Vm
2 220
13.7336 Amps
Z 42 62
ITM
ITM
Dept.ofECE/SJBIT
Vm2
2 Z 2
Vm
sin t d t
Z
1 cos 2 t 2
d t
2
Page 209
ITM
10EC73
Vm2
4 Z 2
ITM
ITM
sin 2t 2
Vm2
0
4 Z 2
Vm
2 220
21.57277 Amps
2 Z 2 42 62
Recommended questions:
1. Discuss the operation of a single phase controller supplying a resistive load, and
controlledby the on-off method of control. Also highlight the advantages and
disadvantages of such a control. Draw the relevant waveforms.
2. What phase angle control is as applied to single phase controllers? Highlight the
advantages and disadvantages of such a method of control. Draw all the wave forms.
3. What are the effects of load inductance on the performance of voltage controllers?
4. Explain the meaning of extinction angle as applied to single phase controllers supplying
inductive load with the help of waveforms.
5. What are unidirectional controllers? Explain the operation of the same with the help of
waveforms and obtain the expression for the RMS value of the output voltage. What are
the advantage and disadvantages of unidirectional controllers?
6. What are bi-directional controllers explain the operation of the same with the help of
waveforms and obtain the expression for the R<S value of the output voltage. RMS
valueof thyristor current. What are the advantages of bi-directional controllers?
7. The AC Voltage controller shown below is used for heating a resistive load of 5 and
the input voltage Vs = 120 V (rms). The thyristor switch is on for n=125 cycles and is off
for m = 75 cycles. Determine the RMS output voltage Vo, the input factor and the
average and RMS thyristor current.
8.
T1
i. +
+Vo
Vs
a. R
b. (load)
ii. -
Dept.ofECE/SJBIT
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10EC73
in the problem above R=4, Vs =208 V (rms) if the desired output power is 3 KW,
determine the duty cycle K and the input power factor.
9. The single phases half wave controller shown in the figure above has a resistive load of
R=5 and the input voltage Vs=120 V(rms), 50 Hz. The delay angle of the thyristor is .
Determine the RMS voltage, the output Vo input power factor and the average input
current. Also derive the expressions for the same.
10. The single phase unidirectional controller in the above problem, has a resistive load of 5
and the input voltage Vs = 208 V (rms). If the desired output power is 2 KW, calculate
the delay angle of the thyristor and the input power factor.
Dept.ofECE/SJBIT
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10EC73
UNIT-7
DC Choppers
7.1 Introduction
Chopper is a static device.
A variable dc voltage is obtained from a constant dc voltage source.
Also known as dc-to-dc converter.
Widely used for motor control.
Also used in regenerative braking.
Thyristor converter offers greater efficiency, faster response, lower maintenance,
smaller size and smooth control.
Choppers are of Two Types
Step-down choppers.
Step-up choppers.
In step down chopper output voltage is less than input voltage.
In step up chopper output voltage is more than input voltage.
7.2 Principle of Step-down Chopper
Chopper
i0
V0
Dept.ofECE/SJBIT
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10EC73
v0
V
Vdc
t
tON
tOFF
i0
V/R
Idc
t
T
1
Freq. of chopper switching or chopping freq.
T
Vdc V
tON tOFF
t
Vdc V ON V .d
T
t
but ON d duty cycle
t
Average Output Current
Vdc
R
V t V
I dc ON d
R T R
RMS value of output voltage
I dc
1
VO
T
tON
v dt
2
o
tON
dt
t
V2
tON ON .V
T
T
VO d .V
Dept.ofECE/SJBIT
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10EC73
Output power PO VO I O
IO
But
VO
R
Output power
VO2
PO
R
dV 2
PO
R
Methods of Control
The output dc voltage can be varied by the following methods.
Pulse width modulation control or constant frequency operation.
Variable frequency control.
tOFF
t
T
V0
V
t
tON
tOFF
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10EC73
v0
V
tON
tOFF
t
T
v0
V
tON
tOFF
t
T
i0
+
R
FWD
E
V0
Dept.ofECE/SJBIT
Page 215
10EC73
v0
Output
voltage
V
tON
i0
tOFF
Imax
Output
current
Imin
Continuous
current
i0
t
Output
current
Discontinuous
current
t
Expressions for Load Current Io for Continuous Current Operation When Chopper
is ON(0 T Ton)
i0
+
R
V0
L
E
-
diO
E
dt
Taking Laplace Transform
V iO R L
V
E
RI O S L S .I O S iO 0
S
S
I
V E
min
R
R
LS S S
L
L
Dept.ofECE/SJBIT
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10EC73
t
t
V E
L
L
1 e I min e
R
i0
R
L
E
When Chopper is OFF 0 t tOFF
diO
E
dt
Talking Laplace transform
0 RiO L
0 RI O S L SI O S iO 0
E
S
Redefining time origin we have at t 0,
I max
E
R
R
S
LS S
L
L
IO S
iO t I max e
R
t
L
R
t
E
L
1
Dept.ofECE/SJBIT
Page 217
10EC73
At
t tON dT , iO t I max
I max
dRT
dRT
V E
L
L
1
I
e
min
R
From equation
iO t I max e
R
t
L
R
t
E
L
1
At
t tOFF 1 d T
I min I max e
1 d RT
L
E
1
1 d RT
L
dRT
dRT
V E
L
L
1
I
e
min
R
we get,
I max
dRT
V 1 e L
RT
R
L
1 e
E
R
1 d RT
L
E
1 e
R
1 d RT
L
we get,
I min
dRT
V e L 1 E
R
R RTL
e 1
IDept.ofECE/SJBIT
max I min is known as the steady state ripple.
Page 218
10EC73
I .t
for 0 t tON dT
dT
I I
iO I min max min t
dT
iO I min
dT
dT
I O RMS
dT
dT
I O RMS
dT
I O RMS
i dt
2
0
I max I min t dt
I
min
0
dT
2
2
I max I min 2 2 I min I max I min t
dt
0 I min dT t
dT
I CH
2
2
2
I max I min
d I min
I min I max I min
3
I CH d I O RMS
Effective input resistance is
Ri
Dept.ofECE/SJBIT
V
IS
Page 219
10EC73
Where
I S Average source current
I S dI dc
Ri
V
dI dc
L
+
D
+
V
Chopper
L
O
A
D
VO
Step-up chopper is used to obtain a load voltage higher than the input voltage V.
The values of L and C are chosen depending upon the requirement of output
voltage and current.
When the chopper is ON, the inductor L is connected across the supply.
The inductor current I rises and the inductor stores energy during the ON time of
the chopper, tON.
When the chopper is off, the inductor current I is forced to flow through the diode
D and load for a period, tOFF.
The current tends to decrease resulting in reversing the polarity of induced EMF
in L.
Therefore voltage across load is given by
VO V L
dI
i.e., VO V
dt
A large capacitor C connected across the load, will provide a continuous output
voltage .
Diode D prevents any current flow from capacitor to the source.
Step up choppers are used for regenerative braking of dc motors.
Dept.ofECE/SJBIT
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10EC73
VItON VO V ItOFF
VO
V tON tOFF
tOFF
T
VO V
T tON
Where
T = Chopping period or period
of switching.
T tON tOFF
1
VO V
t
1 ON
T
1
VO V
1 d
t
Where d ON duty cyle
T
Dept.ofECE/SJBIT
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10EC73
Performance Parameters
The thyristor requires a certain minimum time to turn ON and turn OFF.
Duty cycle d can be varied only between a min. & max. value, limiting the min. and
max. value of the output voltage.
Ripple in the load current depends inversely on the chopping frequency, f.
To reduce the load ripple current, frequency should be as high as possible.
Problem
1. A Chopper circuit is operating on TRC at a frequency of 2 kHz on a 460 V supply. If
the load voltage is 350 volts, calculate the conduction period of the thyristor in each
cycle.
Solution:
f = 2 kHz
1
f
1
0.5 m sec
2 10 3
t
Vdc ON V
T
T
Output voltage
Problem
2. Input to the step up chopper is 200 V. The output required is 600 V. If the conducting
time of thyristor is 200 sec. Compute
Chopping frequency,
If the pulse width is halved for constant frequency of operation, find the new
output voltage.
Solution:
V 200 V , tON 200 s, Vdc 600V
T
Vdc V
T tON
T
600 200
6
T 200 10
Solving for T
T 300 s
Dept.ofECE/SJBIT
Page 222
10EC73
Chopping frequency
1
f
T
1
f
3.33KHz
300 106
Pulse width is halved
tON
200 106
100 s
2
Frequency is constant
f 3.33KHz
T
1
300 s
f
T
Output voltage = V
T tON
300 106
200
6
300 Volts
300 100 10
Problem
3. A dc chopper has a resistive load of 20 and input voltage VS = 220V. When chopper
is ON, its voltage drop is 1.5 volts and chopping frequency is 10 kHz. If the duty cycle is
80%, determine the average output voltage and the chopper on time.
Solution:
VS 220V , R 20, f 10 kHz
tON
0.80
T
Vch = Voltage drop across chopper = 1.5 volts
d
Dept.ofECE/SJBIT
Page 223
10EC73
Chopper ON time,
tON dT
Chopping period,
1
f
1
0.1103 secs 100 secs
3
10 10
Chopper ON time,
T
tON dT
tON 0.80 0.1103
tON 0.08 103 80 secs
Problem
4. In a dc chopper, the average load current is 30 Amps, chopping frequency is 250 Hz,
supply voltage is 110 volts. Calculate the ON and OFF periods of the chopper if the load
resistance is 2 ohms.
Solution:
1
1
4 10 3 4 msecs
f 250
Vdc
& Vdc dV
R
dV
I dc
R
I R 30 2
d dc
0.545
V
110
I dc
Chopper ON period,
tON dT 0.545 4 10 3 2.18 msecs
Chopper OFF period,
tOFF T tON
tOFF 4 10 3 2.18 10 3
tOFF 1.82 10 3 1.82 msec
Problem
5. A dc chopper in figure has a resistive load of R = 10 and input voltage of V = 200
V. When chopper is ON, its voltage drop is 2 V and the chopping frequency is 1 kHz. If
the duty cycle is 60%, determine
Average output voltage
RMS value of output voltage
Dept.ofECE/SJBIT
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10EC73
i0
R v0
Solution:
I S I dc
Ri
Vdc 118.8
11.88 Amps
R
10
V
V
200
Ri
16.83
I S I dc 11.88
I dc
Output power is
dT
1
PO
T
v02
1
dt
R
T
d V Vch
PO
R
0.6 200 2
dT
V Vch
R
dt
PO
10
2352.24 watts
Input power,
Pi
1
T
PO
Dept.ofECE/SJBIT
1
T
dT
Vi dt
O
0
dT
V V Vch
dt
R
Page 225
10EC73
1. Class A Chopper
i0
v0
Chopper
V
FWD
L
O
A
D
v0 V
i0
Thyristor
gate pulse
t
i0
Output current
CH ON
t
FWD Conducts
v0
Output voltage
tON
Dept.ofECE/SJBIT
t
T
Page 226
10EC73
2. Class B Chopper
D
i0
v0
+
R
L v0
V
Chopper
i0
ig
Thyristor
gate pulse
t
i0
tOFF
tON
T
Output current
Imax
Imin
v0
D
conducts Chopper
conducts
Output voltage
Dept.ofECE/SJBIT
Page 227
10EC73
iO t I max
At t tOFF
R
tOFF
I
e
min
I max
R
tOFF
V E
L
1
LdiO
RiO E
dt
R
t
L
R
t
E
L
1
iO t I min
At t tON
I min I max e
0 t tON
R
tON
L
Dept.ofECE/SJBIT
R
tON
E
1 e L
R
Page 228
10EC73
3. Class C Chopper
CH1
D1
i0
+
R
V
CH2
D2
L v0
Chopper
E
v0
i0
Dept.ofECE/SJBIT
Page 229
10EC73
ig1
Gate pulse
of CH1
t
ig2
Gate pulse
of CH2
t
i0
Output current
t
D1
CH1
ON
D2
CH2
ON
D1
CH1
ON
D2
CH2
ON
V0
Output voltage
4. Class D Chopper
v0
CH1
D2
R i0
V
+
D1
v0
i0
CH2
Dept.ofECE/SJBIT
Page 230
10EC73
ig1
Gate pulse
of CH1
t
ig2
Gate pulse
of CH2
t
i0
Output current
v0
CH1,CH2
ON
t
D1,D2 Conducting
Output voltage
V
Average v0
ig1
Gate pulse
of CH1
t
ig2
Gate pulse
of CH2
t
i0
Output current
CH1
CH2
t
D1, D2
v0
Output voltage
V
Average v0
5. Class E Chopper
CH1
i0
+
CH2
Dept.ofECE/SJBIT
CH3
D1
R
v0
D2
D3
CH4
D4
Page 231
10EC73
v0
CH2 - D4 Conducts
D1 - D4 Conducts
CH1 - CH4 ON
CH4 - D2 Conducts
i0
CH3 - CH2 ON
CH2 - D4 Conducts
D2 - D3 Conducts
CH4 - D2 Conducts
The source inductance should be as small as possible to limit the transient voltage.
Also source inductance may cause commutation problem for the chopper.
Usually an input filter is used to overcome the problem of source inductance.
The load ripple current is inversely proportional to load inductance and chopping
frequency.
Peak load current depends on load inductance.
To limit the load ripple current, a smoothing inductor is connected in series with the
load.
7. 5 Impulse Commutated Chopper
Impulse commutated choppers are widely used in high power circuits where load
fluctuation is not large.
This chopper is also known as
Parallel capacitor turn-off chopper
Voltage commutated chopper
Dept.ofECE/SJBIT
Page 232
10EC73
Classical chopper.
LS
+
T1
iT1
IL
a +
b
_C
T2
FWD
iC
L
O
A
D
VS
D1
vO
To start the circuit, capacitor C is initially charged with polarity (with plate a
positive) by triggering the thyristor T2.
Capacitor C gets charged through VS, C, T2 and load.
As the charging current decays to zero thyristor T2 will be turned-off.
With capacitor charged with plate a positive the circuit is ready for operation.
Assume that the load current remains constant during the commutation process.
For convenience the chopper operation is divided into five modes.
Mode-1
Mode-2
Mode-3
Mode-4
Mode-5
Mode-1 Operation
T1
LS
+
IL
+
VC
_C
iC
VS
L
D1
L
O
A
D
Thyristor T1 is fired at t = 0.
The supply voltage comes across the load.
Load current IL flows through T1 and load.
At the same time capacitor discharges through T1, D1, L1, & C and the capacitor
reverses its voltage.
This reverse voltage on capacitor is held constant by diode D1.
Dept.ofECE/SJBIT
Page 233
10EC73
LC
& Capacitor Voltage
iC t V
VC t V cos t
Mode-2 Operation
IL
LS
VC
VS
IL
C
T2
L
O
A
D
VC C
IL
The total time required for the capacitor to discharge and recharge is called the
commutation time and it is given by
At the end of Mode-2 capacitor has recharged to VS and the freewheeling diode starts
conducting.
Dept.ofECE/SJBIT
Page 234
10EC73
Mode-3 Operation
IL
LS
IL
VS
_C
T2
VS
FWD
L
O
A
D
VC t VS I L
Where
1
LS C
Mode-4 Operation
LS
+
IL
+
VC
_C
VS
L
L
O
A
D
D1
FWD
Capacitor has been overcharged i.e. its voltage is above supply voltage.
Capacitor starts discharging in reverse direction.
Hence capacitor current becomes negative.
The capacitor discharges through LS, VS, FWD, D1 and L.
Dept.ofECE/SJBIT
Page 235
10EC73
When this current reduces to zero D1 will stop conducting and the capacitor voltage
will be same as the supply voltage.
Mode-5 Operation
IL
FWD
L
O
A
D
Both thyristors are off and the load current flows through the FWD.
This mode will end once thyristor T1 is fired.
ic
Capacitor Current
IL
0
Ip
iT1
IL
t
Ip
Current through T1
t
0
vT1
Voltage across T1
Vc
0
vo
Vs+Vc
Output Voltage
Vs
vc
Vc
t
Capacitor Voltage
-Vc
Dept.ofECE/SJBIT
tc
td
Page 236
10EC73
Disadvantages
A starting circuit is required and the starting circuit should be such that it triggers
thyristor T2 first.
Load voltage jumps to almost twice the supply voltage when the commutation is
initiated.
The discharging and charging time of commutation capacitor are dependent on the
load current and this limits high frequency operation, especially at low load current.
Chopper cannot be tested without connecting load.
Thyristor T1 has to carry load current as well as resonant current resulting in increasing its
peak current rating.
Recommended questions:
1. Explain the principle of operation of a chopper. Briefly explain time-ratio control and
PWM as applied to chopper
2. Explain the working of step down shopper. Determine its performance factors, VA, Vo
rms, efficiency and Ri the effective input resistane
3. Explain the working of step done chopper for RLE load. Obtain the expressions for
minimum load current I1max load current I2, peak peak load ripple current di avg value
of load current Ia, the rms load current Io and Ri.
4. Give the classification of stem down converters. Explain with the help of circuit diagram
one-quadrant and four quadrant converters.
5. The step down chopper has a resistive load of R=10ohm and the input voltage is
Vs=220V. When the converter switch remain ON its voltage drop is Vch=2V and the
chopping frequency is 1 KHz. If the duty cycle is 50% determine a) the avg output
voltage VA, b) the rms output voltage Vo c) the converter efficiency d) the effective
inputresistance Ri of the converter.
6. Explain the working of step-up chopper. Determine its performance factors.
Dept.ofECE/SJBIT
Page 237
10EC73
UNIT-8
INVERTERS
The converters which converts the power into ac power popularly known as the inverters,.
The application areas for the inverters include the uninterrupted power supply (UPS), the ac
motor speed controllers, etc.
The inverters can be classified based on a number of factors like, the nature of output
waveform (sine, square, quasi square, PWM etc), the power devices being used (thyristor
transistor, MOSFETs IGBTs), the configuration being used, (series. parallel, half bridge, Full
bridge), the type of commutation circuit that is being employed and Voltage source and
current source inverters.
The thyristorised inverters use SCRs as power switches. Because the input source of power is
pure de in nature, forced commutation circuit is an essential part of thyristorised inverters.
The commutation circuits must be carefully designed to ensure a successful commutation of
SCRs. The addition of the commutation circuit makes the thyristorised inverters bulky and
costly. The size and the cost of the circuit can be reduced to some extent if the operating
frequency is increased but then the inverter grade thyristors which are special thyristors
manufactured to operate at a higher frequency must be used, which are costly.
Typical applications
Un-interruptible power supply (UPS), Industrial (induction motor) drives, Traction, HVDC.
8.1 Classification of Inverters
There are different basis of classification of inverters. Inverters are broadly classified
as current source inverter and voltage source inverters. Moreover it can be classified on the
basis of devices used (SCR or gate commutation devices), circuit configuration (half bridge
or full bridge), nature of output voltage (square, quasi square or sine wave), type of circuit
(switched mode PWM or resonant converters) etc.
8.2 Principle of Operation:
1. The principle of single phase transistorised inverters can be explained with the help of Fig.
8.2. The configuration is known as the half bridge configuration.
2. The transistor Q1 is turned on for a time T0/2, which makes the instantaneous voltage
across the load Vo = V12.
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Fig. Load voltage and current waveforms with resistive load for half bridge inverter.
Let us divide the operation into four intervals. We start explanation from the second lime
interval II to t2 because at the beginning of this interval transistor Q1 will start conducting.
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Interval II (tl - t2): Q1 is turned on at instant tl, the load voltage is equal to + V/2 and the
positive load current increases gradually. At instant t2 the load current reaches the peak
value. The transistor Q1 is turned off at this instant. Due to the same polarity of load voltage
and load current the energy is stored by the load. Refer Fig. 8.3(a).
Fig.8.3(a) circuit in interval II (tl - t2) (b) Equivalent circuit in interval III (t2 - t3)
Interval III (t2- t3): Due to inductive load, the load current direction will be maintained
sameeven after Q1 is turned off. The self induced voltage across the load will be negative.
The load current flows through lower half of the supply and D2 as shown in Fig. 8.3(b). In
this interval the stored energy in load is fed back to the lower half of the source and the load
voltage is clamped to -V/2.
Interval IV (t3 - t4):
Fig.8.4
At the instant t3, the load current goes to zero, indicating that all the stored energy has been
returned back to the lower half of supply. At instant t3 ' Q2 is turned on. This will produce a
negative load voltage v0 = - V/2 and a negative load current. Load current reaches a negative
peak atthe end of this interval. (See Fig. 8.4(a)).
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Fig.8.5: Current and voltage waveforms for half bridge inverter with RL load
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Fig.8.6
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This is the peak amplitude of nth harmonic component of the output voltage and
n = tan-1 0 = 0
and
Vo (av) = 0
Therefore the instantaneous output voltage of a half bridge inverter can be expressed In
Fourier series form as,
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Equation indicates that the frequency spectrum of the output voltage waveform consists of
only odd order harmonic components. i.e. 1,3,5,7 ....etc. The even order harmonics are
automatically cancelled out.
RMS output voltage
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Distortion Factor DF
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Fig.8.8
Att = T0/2, Q3 and Q4 are turned on and Q1 and Q2 are turned off. The load voltage is V
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and load current flows from B to A. The equivalent circuit for mode II is as showninFig.
9.5.1(b). At t = To, Q3 and Q4 are turned off and Q1 and Q2 are turned on again.
As the load is resistive it does not store any energy. Therefore the feedback diodes are not
effective here.
The voltage and current waveforms with resistive load are as shown in Fig. 9.5.2.
The important observations from the waveforms of Fig. 8.10 are as follows:
(i) The load current is in phase with the load voltage
(ii) The conduction period for each transistor is 1t radians or 1800
(iii) Peak current through each transistor = V/R.
(iv) Average current through each transistor = V/2R
(v) Peak forward voltage across each transistor = V volts.
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Fig.8.11
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Fig.8.12
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Fig.8.13. voltage and current waveforms for single phase bridge inverter with RL load.
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The output current waveform of Fig. 8.15 is a quasi-square waveform. But it is possible to
Obtaina square wave load current by changing the pattern of base driving signals.
Suchwaveforms are shown in Fig. 8.16.
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Fig.8.16 Waveforms
Load Voltage:
The load current waveform in CSI has a defined shape, as it is a square waveform in this
case.But the load voltage waveform will be dependent entirely on the nature of the load.
The load voltage with the resistive load will be a square wave, whereas with a highly
inductive load it will be a triangular waveform. The load voltage will contain frequency
components atthe inverter frequency f, equal to l/T and other components at multiples of
inverter frequency.
The load voltage waveforms for different types of loads are shown in Fig. 8.17.
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The components Q, Dm, Land C give out a variable DC output. Land C are the
filtercomponents. This variable DC voltage acts as the supply voltage for the bridge inverter.
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The pulse width (conduction period) of the transistors is maintained constant and the
variationin output voltage is obtained by varying the DC voltage.
The output voltage waveforms with a resistive load for different dc input voltages are shown
in Fig. 8.19.
We know that for a square wave inverter, the rms value of output voltage is given by,
V0 ( rms) = Vdc volts
Hence by varying Vdc, we can vary V0 (rms)
One important advantage of variable DC link inverters is that it is possible to eliminate
orreduce certain harmonic components from the output voltage waveform.
The disadvantage is that an extra converter stage is required to obtain a variable DC
voltagefrom a fixed DC. This converter can be a chopper.
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Recommended questions:
1. What are the differences between half and full bridge inverters?
2. What are the purposes of feedback diodes in inverters?
3. What are the arrangements for obtaining three phase output voltages?
4. What are the methods for voltage control within the inverters?
5. What are the methods of voltage control of I-phase inverters? Explain them briefly.
6. What are the main differences between VSI and CSI?
7. With a neat circuit diagram, explain single phase CSI?
8. The single phase half bridge inverter has a resistive load of R= 2.4 and the dc input
voltage is Vs=48V Determine a) the rms output voltage at the fundamental frequency
Vo1 b) The output power Po c) the average and peak currents of each transistor d) the
peak reverse blocking voltage Vbr of each transistor e) the THD f) the DF g) the HF
and DF of the LOH.
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