IRF610

Data Sheet

January 2002

3.3A, 200V, 1.500 Ohm, N-Channel Power

MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17442.

Ordering Information
PART NUMBER

Features
3.3A, 200V
rDS(ON) = 1.500
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 Guidelines for Soldering Surface Mount
Components to PC Boards

Symbol

PACKAGE

BRAND
D

IRF610

TO-220AB

IRF610

NOTE: When ordering, use the entire part number.

Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)

2002 Fairchild Semiconductor Corporation

IRF610 Rev. B

IRF610
Absolute Maximum Ratings

TC = 25oC, Unless Otherwise Specified

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS

Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg

IRF610
200
200
3.3
2.1
8
20
43
0.34
46
-55 to 150

UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC

300
260

oC
oC

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications

TC = 25oC, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS

Drain to Source Breakdown Voltage

BVDSS

VGS = 0V, ID = 250A (Figure 10)

200

Gate Threshold Voltage

VGS(TH)

VDS = VGS, ID = 250A

VDS = Max Rating, VGS = 0V

25

VDS = Max Rating x 0.8, VGS = 0V, TJ = 125oC

250

3.3

100

nA

1.0

1.5

0.8

1.3

Zero Gate Voltage Drain Current

IDSS

On-State Drain Current (Note 2)

ID(ON)

Gate to Source Leakage Current

IGSS

Drain to Source On Resistance (Note 2)

Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)

rDS(ON)
gfs
td(ON)
tr
td(OFF)

VGS = 20V
VGS = 10V, ID = 1.6A (Figures 8, 9)
VDS 50V, ID = 1.6A (Figure 12)
VDD = 100V, ID 3.3A, RG = 24, RL = 30
MOSFET Switching Times are
Essentially Independent of Operating
Temperature

tf
Qg(TOT)

Gate to Source Charge

Qgs

Gate to Drain Miller Charge

Qgd

Input Capacitance

CISS

Output Capacitance

COSS

Reverse Transfer Capacitance

CRSS

Internal Drain Inductance

VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7)

LD

VGS = 10V, ID = 3.3A, VDS = 0.8 x Rated BVDSS,

Ig(REF) = 1.5mA (Figure 14) Gate Charge is
Essentially Independent of Operating
Temperature
VGS = 0V, VDS = 25V, f = 1MHz
(Figure 11)

Measured From the

Contact Screw on Tab to
Center of Die
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die

Internal Source Inductance

LS

Thermal Resistance Junction to Case

RJC

Thermal Resistance Junction to Ambient

RJA

2002 Fairchild Semiconductor Corporation

Measured From the Source

Lead, 6mm (0.25in) from
Header to Source Bonding
Pad

Free Air Operation

Modified MOSFET
Symbol Showing the
Internal Device
Inductances
D

12

ns

17

26

ns

13

21

ns

13

ns

5.3

8.2

nC

1.2

nC

3.0

nC

135

pF

60

pF

16

pF

3.5

nH

4.5

nH

7.5

nH

2.9

oC/W

80

oC/W

LD
G
LS
S

IRF610 Rev. B

IRF610
Source to Drain Diode Specifications
PARAMETER

SYMBOL

Continuous Source to Drain Current

TEST CONDITIONS

ISD

Pulse Source to Drain Current

(Note 3)

Modified MOSFET Symbol

Showing the Integral
Reverse P-N Junction
Rectifier

ISDM

MIN

TYP

MAX

UNITS

3.3

2.0

75

160

310

ns

0.33

0.9

1.4

Source to Drain Diode Voltage (Note 2)

TJ = 25oC, ISD = 3.3A, VGS = 0V (Figure 13)

VSD

Reverse Recovery Time

TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/s

TJ = 25oC, ISD = 3.3A, dISD/dt = 100A/s

trr

Reverse Recovery Charge

QRR

NOTES:
2. Pulse test: pulse width 300s, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 6.4mH, RG = 25, peak IAS = 3.3A.

Typical Performance Curves

Unless Otherwise Specified

5.0

1.0
ID, DRAIN CURRENT (A)

POWER DISSIPATION MULTIPLIER

1.2

0.8
0.6
0.4
0.2
0

50

100

4.0

3.0

2.0

1.0

0
25

150

50

TC, CASE TEMPERATURE (oC)

75

100

150

125

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

ZJC, TRANSIENT
THERMAL IMPEDANCE (oC/W)

10

0.5
1

0.2
0.1
PDM

0.05
0.02
0.1 0.01

t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC + TC

SINGLE PULSE

0.01
10-5

10-4

10-3

10-2

0.1

10

t1, RECTANGULAR PULSE DURATION (S)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

2002 Fairchild Semiconductor Corporation

IRF610 Rev. B

IRF610
Typical Performance Curves
100

TJ = 150oC SINGLE PULSE

TC = 25oC

10s

10

100s
1ms
1
10ms

VGS = 10V
VGS = 8V

ID, DRAIN CURRENT (A)

OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
ID, DRAIN CURRENT (A)

Unless Otherwise Specified (Continued)

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX

VGS = 7V

2
VGS = 6V
1
VGS = 5V

DC
0.1
100
10
VDS , DRAIN TO SOURCE VOLTAGE (V)

1000

20

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX
VDS 50V

4
VGS = 10V
VGS = 8V

VGS = 7V
2
VGS = 6V
1

0
4

TJ = 150oC

0.1

TJ = 25oC

VGS = 5V

VGS = 4V
2

10

10-2
0

2
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS

3.0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX
12

6
VGS = 10V
3

VGS = 20V

2.4

4
6
ID, DRAIN CURRENT (A)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

2002 Fairchild Semiconductor Corporation

10

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 3.2A

1.8

1.2

0.6

0
2

10

FIGURE 7. TRANSFER CHARACTERISTICS

15

100

10

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX

60

FIGURE 5. OUTPUT CHARACTERISTICS

ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

40

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

rDS(ON), ON STATE RESISTANCE ()

VGS = 4V
80

-60

-40

-20

20

40

60

80 100

120 140 160

TJ, JUNCTION TEMPERATURE (oC)

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

IRF610 Rev. B

IRF610
Typical Performance Curves

400
ID = 250A

1.05

0.95

240

CISS

160
COSS

0.85

0.75
-60

VGS = 0V, f = 1MHz

CISS = CGS + CGD
CRSS = CGD
COSS = CDS + CGD

320

1.15
C, CAPACITANCE (pF)

NORMALIZED DRAIN TO SOURCE

BREAKDOWN VOLTAGE

1.25

Unless Otherwise Specified (Continued)

80

-40

-20

20

40

60

80

100 120 140 160

CRSS

TJ, JUNCTION TEMPERATURE (oC)

gfs, TRANSCONDUCTANCE (S)

1.5

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX
VDS 50V

1.2

TJ = 25oC

TJ = 150oC

0.9

0.6

0.3

102

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

ISD, SOURCE TO DRAIN CURRENT (A)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

5
10
2
5
VDS, DRAIN TO SOURCE VOLTAGE (V)

PULSE DURATION = 80s

DUTY CYCLE = 0.5% MAX

100

TJ = 150oC
10

TJ = 25oC

1
0

2
3
ID, DRAIN CURRENT (A)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT

VGS, GATE TO SOURCE VOLTAGE (V)

20

0.4
0.8
1.2
1.6
VSD, SOURCE TO DRAIN VOLTAGE (V)

2.0

FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

ID = 3.2A
VDS = 100V

16

VDS = 40V

12

VDS = 160V

0
0

10

Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

2002 Fairchild Semiconductor Corporation

IRF610 Rev. B

IRF610
Test Circuits and Waveforms
VDS
BVDSS
L

tP

VARY tP TO OBTAIN

RG

REQUIRED PEAK IAS

VDS

IAS

VDD

VDD
-

VGS
DUT
tP

0V

IAS

0
0.01
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON

tOFF

td(ON)

td(OFF)
tf

tr
RL

VDS

90%

90%

RG

VDD

10%

10%

DUT

90%
VGS

VGS

FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
(ISOLATED
SUPPLY)

CURRENT
REGULATOR

0.2F

50%
PULSE WIDTH

10%

FIGURE 17. SWITCHING TIME TEST CIRCUIT

12V
BATTERY

50%

VDD
Qg(TOT)

SAME TYPE
AS DUT

50k

Qgd

0.3F

VGS

Qgs
D
VDS
DUT

0
Ig(REF)

0
IG CURRENT
SAMPLING
RESISTOR

VDS
ID CURRENT
SAMPLING
RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT

2002 Fairchild Semiconductor Corporation

IG(REF)
0

FIGURE 20. GATE CHARGE WAVEFORMS

IRF610 Rev. B

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SMART START
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification

Product Status

Definition

Advance Information

Formative or
In Design

This datasheet contains the design specifications for

product development. Specifications may change in
any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4

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