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A Dissertation for the Degree of Doctor of Philosophy

Power Quality Improvement of Single-Phase


Grid-Connected Photovoltaic Inverter

Department of Information and Communications Engineering


Graduate School
Chungnam National University

By

Trung-Kien Vu

Advisor

Se-Jin Seong

February 2011

Power Quality Improvement of Single-Phase


Grid-Connected Photovoltaic Inverter

Advisor

Se-Jin Seong

Submitted to the Graduate School


in Partial Fulfillment of the Requirements
for the Degree of Doctor of Philosophy
February 2011
Department of Information and Communications Engineering
Graduate School

Chungnam National University

By

Trung-Kien Vu

To Approve the Submitted Dissertation


for the Degree of Doctor of Philosophy

By Trung-Kien Vu
Power Quality Improvement of Single-Phase
Grid-Connected Photovoltaic Inverter

February 2011
Committee Chair

Prof. Dr. Hanju Cha


Chungnam National University

Committee

Prof. Dr. In-ho Hwang


Chungbuk Provincial College

Committee

Prof. Dr. Se-Jin Seong


Chungnam National University

Committee

Prof. Dr. Tae-Kyung Sung


Chungnam National University

Committee

Dr. Sang-Jin Kim


President of Junma Engineering Co., Ltd

Graduate School
Chungnam National University

To My Family

ABSTRACT*
Power Quality Improvement of Single-Phase Grid-Connected
Photovoltaic Inverter
Trung-Kien Vu
Department of Information and Communications Engineering
Graduate School, Chungnam National University
Daejeon, Korea

(Supervised by Professor Se-Jin Seong)

The economical and environmental impacts of fossil fuels have


forced society to investigate sustainable solutions. The interest has
focused on the renewable energy sources since the green and clean
benefits. Consequently, investments in research and development in the
field of power electronics have increased proportionally, especially in
high voltage and high power grid-connected systems.
* A dissertation submitted to the committee of Graduate School,
Chungnam National University in a partial fulfillment of the
requirements for the degree of Doctor of Philosophy conferred in
February 2011.
-i-

The distributed power generation (DG) systems are becoming


more common as the need for electric power increases because of
taking advantage of using different energy sources such as wind and
solar. A few examples are hybrid cars, solar houses or hospitals in
remote areas where providing clean, efficient and reliable electric
power is critical to the loads. In such systems, the power is distributed
from the source side to the load side via power electronic converters in
the system. At low and medium power applications, the task is often
left to single-phase inverters where they are the only interface between
sources connected to dc bus and loads connected to an ac bus. This
dissertation investigates the power quality improvements to properly
regulate the power flow between renewable source and the utility
network. The control method for single-phase inverters used in low and
medium power DG systems is based on (and also takes the advantage
of) the well-known d-q transformation (which is mostly employed for
three-phase

converters

analysis

and

control

design).

The

transformation requires at least two independent phases for each state


variable in the system; thus a second phase must be created. This
virtual-phase can be done by DSP implementation, hence there is no
need for additional hardware in the system, making it more attractive
and cost effective method.
The Proportional-Resonant (PR) controller based current control
scheme, compared with conventional Proportional-Integral (PI)
controller, not only provides a superior transient response but also
provides a zero steady-state error as well as a high disturbance rejection
and a low output current THD under grid-tie mode operation. The
entire controller can be implemented in a DSP digital control board

- ii -

which is becoming more common in power electronics converters


within the past decade. Special attention is given to systems which
demand a third-order LCL-filter as interface between inverter and grid.
This filter configuration is widely employed in high power systems, in
which the switching frequency is typically limited by the switching
devices. The LCL-filter has the ability to reduce the level of harmonic
distortion with less inductance, compared with the first-order L filter.
On the other hand, it introduces undesirable characteristics, such as
resonance, that must be compensated by the controller. Another issues
related to the switching devices such as IGBT, MOSFET and others
have very high switching frequency above tens of kilohertz. A blanktime is needed to avoid the conduction overlap of two switching
devices in the same leg. This blank-time causes the phase error, output
voltage distortions and fundamental voltage drop, which degrade the
control performance and hence, may cause the power loss during
generation process.
Comparative analysis and design procedures of conventional PI
and PR controller for current control technique have been presented.
Furthermore, an output low-pass LCL-filter design procedure and a
dead-time compensation method for a 3kW single-phase grid-connected
full-bridge PV VSI have also been introduced in this study with the
final results are implemented in a DSP TMS320F2812 based digital
controller board.

- iii -

- iv -

Table of Contents

Abstract
Table of Contents
List of Figures
List of Tables
Nomenclatures

i
v
viii
xiv
xv

Chapter 1
Introduction
1.1 Introduction
1.2 Objectives and Outline
1.3 Single-phase grid-connected PV inverter topologies
1.4 Control methods for single-phase VSI
1.4.1 Single voltage loop control
1.4.2 Multi-loop control
1.4.3 Predictive control
1.4.4 Deadbeat control
1.4.5 Sliding mode control
1.4.3 Conclusion
Current Controller for Single-Phase
Grid-Connected PV Inverter
2.1 Introduction
2.2 PI controller analysis
2.2.1 PI controller gains
2.2.2 Digital implementation of PI controller

1
1
3
4
6
6
7
7
9
10
10

Chapter 2

-v-

11
11
14
14
20

2.2.3 Non-ideal PI controller


2.3 PR controller analysis
2.3.1 Ideal PR controller
2.3.2 Non-ideal PR controller
2.3.3 PR controller gains
2.3.4 Digital implementation of PR controller
2.4 Single-phase grid-connected PV inverter system
2.4.1 Current control scheme
2.4.2 Digital phase-locked loop (DPLL)
2.5 Simulation results
2.6 Experimental results
2.7 Conclusions
Low-Pass LCL Output Filter for Single-Phase
Grid-Connected PV Inverter
3.1 Introduction
3.2 Low-pass output LCL-filter analysis and design
3.2.1 Ripple current analysis and filter induction
calculation
3.2.2 Current attenuation ratio
3.2.3 Capacitance calculation
3.2.4 Inductance ratio
3.2.5 Damping resistance calculation
3.2.6 LCL-filter design procedure summary
3.3 Comparative analysis of filter topologies for singlephase grid-connected PV VSI
3.3.1 LCL-filter parameters calculation
3.3.2 Comparative analysis of filter topologies
3.4 Simulation results
3.5 Experimental results
3.6 Conclusions

22
22
22
24
25
30
32
32
39
42
45
51

Chapter 3

Chapter 4

Dead-Time Compensator for Single-Phase


Grid-Connected PV Inverter

- vi -

52
52
59
62
67
71
72
73
74
75
75
78
98
99
100

101

4.1 Introduction
4.2 Dead-time effect analysis
4.3 Conventional DTCV
4.4 Distorted voltage and current caused by dead-time
4.5 Adaptive harmonics extraction filter
4. 5.1Single-frequency harmonic extraction filter
4.5.2 Combination of SHEF and regular plant control
part
4.5.3 Multi single-frequency harmonic extraction
filters
4.6 Dead-Time Compensator For Single-phase GridConnected PV Inverter Based on MSHEF
4.7 Inverse plant transfer function analysis
4.8 Simulation results
4.8.1 No dead-time
4.8.2 3ms dead-time without compensation
4.8.3 3ms dead-time with 3rd harmonic compensation
4.9 Experimental results
4.10 Conclusions
Chapter 5

Summary

101
103
104
109
112
112
116
117
118
121
126
127
127
127
140
142
143

References

145

Appendix A Simulation tools


Appendix B PR controller implementation (PSIM)
Appendix C Dead-time compensation implementation (PSIM)

156
158
164

173

Acknowledgements

177

Vita

181

- vii -

List of Figures

1.1

Topology of single-phase PV system (a) two-state (b)


single-state

1.2

Single-loop control for single-phase PWM inverter

1.3

Multi-loop control for single-phase PWM inverter

2.1

An equivalent block diagram of a simple closed-loop


control system using PI controller

16

2.2

Effect of Kp variation on PI controller (Ki = 1)

16

2.3

Effect of Ki variation on PI controller (Kp = 1)

16

2.4

Frequency response of ideal and non-ideal PI controller


(Kp=10, Ki=100, wc=10rad/s)

21

2.5

Frequency response of ideal and non-ideal PR


controller (Kp=10, Ki=100, wc=10rad/s, w0 =377rad/s)

21

2.6

Frequency response of non-ideal PR controller when Ki


changes (a) Kp=0, wc=1rad/s, wc=377rad/s (b) Kp=1,
wc=1rad/s, w0=377rad/s

27

2.7

Frequency response of non-ideal PR controller when wc


changes (a) Kp=0, Ki=1, wc=377rad/s (b) Kp=1, Ki=1,
w0 =377rad/s

28

- viii -

2.8

Frequency response of non-ideal PR controller when Kp


changes, Ki=1, wc=1rad/s, w0=377rad/s

29

2.9

Single-phase grid-connected PV inverter control system


(a) Current control circuit structure (b) Equivalent
current control block diagram

29

2.10

Single-phase current control structure (a) using PI


controller (b) using PR controller

31

2.11

Frequency response of closed-loop current control


using PI controller (Kp=10, Ki=100) and PR controller
(Kp =15, Ki =200, wc = 15rad/s, w0 = 377rad/s)

36

2.12

Root locus of closed-loop current control system (a) PI


controller (b) PR controller

37

2.13

Nyquist diagram of open-loop current control system


(a) PI controller (b) PR controller

38

2.14

Digital phase-locked loop block diagram

40

2.15

The simulation model of 3kW single-phase gridconnected PV VSI system using Matlab/Simulink

40

2.16

DPLL operation results (a) grid voltage (b) stationary


frame components of grid voltage (c) synchronous
frame components of grid voltage (d) stationary frame
components of grid current (e) synchronous frame
components of grid current (f) grid phase angle

43

2.17

Grid-tie operation results (a) grid voltage (b) grid


current using PI controller (c) grid current using PI
controller (d) grid phase angle

44

2.18

Frequency spectrum and THD value of grid current (a)


using PI controller (b) using PR controller

44

2.19

3kW PV PCS experimental prototype

46

2.20

DPLL implementation

46

2.21

Transient-state operation (a) using PI controller (b)

47

- ix -

using PR controller
2.22

Steady-state operation (a) using PI controller (b) using


PR controller

48

2.23

Frequency spectrum and THD value of grid current (a)


using PI controller (b) using PR controller

49

3.1

Low-pass filter topologies (a) L-filter (b) LC-filter (c)


LCL-filter

54

3.2

Frequency response of L-filter

57

3.3

Frequency response of LC-filter with and without


damping

57

3.4

Frequency response of LCL-filter with and without


damping

58

3.5

LCL-filter (a) Equivalent circuit diagram (b) LCL-filter


modeling

58

3.6

Single-phase grid-connected full-bridge PV inverter


using LCL-filter (a) Equivalent circuit (b) Equivalent
block diagram of current control

65

3.7

Output voltage and current waveforms of single-phase


full-bridge inverter

65

3.8

Equivalent circuit of LCL-filter when considering


fundamental and switching harmonic components

66

3.9

Equivalent circuit of LCL-filter when considering only


switching harmonic component

66

3.10

LCL-filter design flow chart

76

3.11

Frequency responses of filters in case of inverter-side


sensing
Frequency responses of filters in case of grid-side
sensing
Frequency responses of open-loop system using
difference filters in case of grid-side sensing
Frequency responses of closed-loop system using

82

3.12
3.13
3.14

-x-

82
83
83

3.15
3.16
3.17
3.18
3.19
3.20

difference filters in case of grid-side sensing


Root locus of closed-loop system using L-filter in case
of grid -side sensing
Root locus of closed-loop system using un-damped LCfilter in case of grid-side sensing
Root locus of closed-loop system using damped LCfilter in case of grid -side sensing
Root locus of closed-loop system using un-damped
LCL-filter in case of grid -side sensing
Root locus of closed-loop system using damped LCLfilter in case of grid-side sensing
The simulation model of 3kW single-phase gridconnected PV VSI system using Matlab/Simulink

84
84
85
85
86
87

3.21

Simulation inverter and grid current waveforms (a)


inverter current and (e) its zoomed in; (b) grid current
using L-filter and (f ) its zoomed in; (c) grid current
using LC-filter and (g) its zoomed in; (d) grid current
using LCL-filter and (h) its zoomed in

88

3.22

Frequency spectrum analysis of inverter current

89

3.23

Frequency spectrum analysis of grid current using Lfilter


Frequency spectrum analysis of grid current using LCfilter
Frequency spectrum analysis of grid current using
LCL-filter
Grid voltage, inverter voltage and current waveforms

89

3.24
3.25
3.26
3.27
3.28
3.29
3.30

Inverter current and grid current using L-filter


waveforms
Inverter current and grid current using LC-filter
waveforms (a) without damping (b) with damping
Inverter current and grid current using LCL-filter
waveforms (a) without damping (b) with damping
Frequency spectrum of inverter current

- xi -

90
90
91
91
92
93
94

3.31

Frequency spectrum of grid current using L-filter

94

3.32

95

4.4

Frequency spectrum of grid current using LC-filter (a)


without damping (b) with damping
Frequency spectrum of grid current using LCL-filter (a)
without damping (b) with damping
Inverter output voltage in case of positive current flow
(Ig > 0) (a) positive grid current flow (b) inverter output
voltage waveforms
Inverter output voltage in case of negative current flow
(Ig < 0) (a) positive grid current flow (b) inverter output
voltage waveforms
Relationship between the grid currents sign and
distorted voltage in PWM inverter
Single-frequency harmonic tracking filter

114

4.5

Integration of a SHEF and regular plant control part

114

4.6

Mitigation of harmonic components from single-phase 115


grid current by using MSHEF
Proposed dead-time compensator
119

3.33
4.1

4.2

4.3

4.7

96
106

107

108

4.9

Single-phase PV inverter current control scheme with 119


dead-time compensator
Injected voltage generation by SHEDC
119

4.10

Bode diagram of plant (L-filter)

124

4.11

Bode diagram of inverse plant (L-filter)

124

4.12

Bode diagram of high-pass filter based equivalent


inverse plant
Simulation model of 3kW single-phase PV inverter
using PSIM
Grid current in case of no dead-time (a) grid current
waveform (b) grid currents frequency spectrum
Grid current in case of 3ms dead-time with no
compensation (a) grid current waveform (b) grid
currents frequency spectrum

124

4.8

4.13
4.14
4.15

- xii -

129
130
131

4.24

Grid current, ideal fundamental component and error


between them in case of 3ms dead-time with no
compensation
Grid current in case of 3ms dead-time with 3rdharmonic compensation (a) grid current waveform (b)
grid currents frequency spectrum
Grid current, first harmonic component and error
between them in case of 3ms dead-time with 3rdharmonic compensation
First and third harmonic components with their
corresponding weight functions
Grid voltage and grid current in case of 3ms dead-time
with no compensation
Grid voltage, grid current and its frequency spectrum in
case of 3ms dead-time with conventional DTCV
compensation
Grid voltage, grid current and its frequency spectrum in
case of 3ms dead-time with proposed MSHEFDC of 3rd
harmonic compensation
Grid voltage, grid current, the first harmonic
component and the error between grid current and first
component in case of 3ms dead-time (a) no
compensation (b) 3rd harmonic compensation with
proposed MSHEFDC
First harmonic component and its weight coefficients

138

4.25

Third harmonic component and its weight coefficients

138

4.26

Systems THD (a) in case of 3ms dead-time without 139


compensation and (b) in case of 3ms dead-time with 3rd
harmonic compensation

4.16

4.17

4.18

4.19
4.20
4.21

4.22

4.23

- xiii -

132

133

134

134
135
135

136

137

List of Tables

Table 2.1

Single-phase grid-connected PV system parameters

42

Table 3.1

VSI system parameters

77

Table 3.2

Designed LCL-filter parameters

77

Table 4.1

VSI system parameters for dead-time compensation 128

- xiv -

Nomenclatures

ac

Alternating current

APF

All-pass filter

dc

Direct current

DG

Distributed generation

DLL

Dynamic link library

DPLL

Digital phase-locked loop

DSP

Digital signal processing

DTCT

Dead-time compensation time

DTCV

Dead-time compensation voltage

EMTP

Electro Magnetic Transients Program

ESR

Equivalent series resistance

IGBT

Insulated-gate bipolar transistor

LMS

Least mean square

MOSFET

Metaloxidesemiconductor field-effect transistor

MSHEF

Multi-single-frequency harmonic extraction filter

MSHEFDC

Multi-single-frequency harmonic extraction


based dead-time compensator

PI

Proportional-Integral

- xv -

filter

PLL

Phase-locked loop

PR

Proportional-Resonant

PV PCS

Photovoltaic power conditioning system

PWM

Pulse width modulation

SHEF

Single-frequency harmonic extraction filter

THD

Total harmonic distortion

VSI

Voltage source inverter

- xvi -

Chapter

Introduction

1.1 Introduction
Distributed power generation has been recently introduced as a new
concept for the generation of power and the enhancement of
conventionally produced electricity. Global warming issue calls for
renewable energy resources in electricity production. Petrol and fuel
crisis, as well as environmental issues, are of todays highest concerns
all over the world. In recent years, many places in the world have been
experiencing continued shortage of electric power or energy crisis due
to their fast increasing demand [1][2]. There are two ways of research
and development for solving this problem:
a) Improve the efficiency of present power conversion and
utilization system. Since various high-power semiconductor
devices (IGBT, MOSFET) were developed and become
commercially available. The increased power ratings as well as

-1-

switching speed, ease of control and low power semiconductor


devices cost make the new converter topologies possible [1].
Furthermore, since the controller for a power converter requires
a high controlling and data-processing speed to achieve high
performance, the DSP should be used to control the power
conversion. The speed of DSP has been raised dramatically for
last 20 years and can operate at a data-processing rate of up to
several hundred megahertz now. This can meet the requirements
of high-performance control and make the real-time digital
control of power converter realizable.
b) Develop the efficient renewable energy generation and
conversion systems to supplement conventional fossil-fuel
based energy supply and eventually replace it.
The renewable energy generation and conversion system has many
advantages over conventional energy supply, e.g. the ability of
regeneration, reusability and less pollution. However, the renewable
energy generation and conversion technologies are not completely
mature yet. There still exist problems such as low efficiency and high
cost. The main sources of renewable energy currently under
development include solar, wind, hydro-power and biomass, etc [2].
The solar power system has the potential to become one of the main
renewable energy sources due to the commercial availability of
semiconductor-based photovoltaic (PV) devices, reduction in the
system cost and development of power electronic technologies.
The important task is to make solar power generation and conversion
system more efficient and more reliable. Photovoltaic or fuel cell power
systems, which generate power as dc electricity, require power

-2-

conversion devices from dc to ac in order to provide power to the


transmission and distribution network of a utility grid. It has been wellproven that a PV power source must be integrated with other power
source, whether used in either a stand-alone or grid-connected mode.
The dc to ac power conversion, either in single-phase or three-phase
systems, can be considered as the core of the whole system because of
an important role in interconnection between dc and ac power part. This
power conversion is accomplished in phase-controlled (uncontrollable
frequency) converters by means of controllable switches. A phasecontrolled converter requires that the external ac system be a voltage
source, typically ac utility line. This condition is necessary because the
phase-controlled converter uses the reversal of the ac voltage to drive
the commutation process. And the ac frequency in the converter is
constrained to be that of the ac source.

1.2 Objectives and Outline


The main objective of this dissertation is to evaluate and improve the
interconnection quality between dc and ac power of single-phase gridconnected PV system. Firstly, a current control scheme is analyzed and
presented for controlling the single-phase PWM inverter. Secondly, to
improve the quality of grid current, a single-phase low-pass output
LCL-filter design procedure is introduced for reducing the inverter
currents ripple and harmonic components at switching frequency.
Finally, for mitigating the current distortion at zero-crossing point
caused by dead-time phenomenon, a software-based dead-time

-3-

compensation method for single-phase PWM inverter is proposed for


distributed renewable energy conversion system from solar power.
Chapter 1 gives a brief introduction and motivations of this work
while Chapter 2 covers the current control principle of single-phase
grid-connected full-bridge PV inverter system and its operation in both
simulation and experiment. Chapter 3 focuses on the low-pass output
LCL-filter design procedure and provide a comparative analysis
between L-, LC- and LCL-filter. Finally, Chapter 4 presents a deadtime compensation method based on the selective harmonic extraction
filter using LMS algorithm with the summary is covered in Chapter 5
of this dissertation.

1.3 Single-Phase Grid-Connected PV Inverter Topologies


The power conversion subsystem for a solar power system has two
main tasks:
a) To control the input terminal conditions to make PV modules
operate at a maximum power point (MPP) and to capture the
maximum power for the sun [3].
b) To convert the output dc voltage from solar modules to ac
voltage and meet the utility requirements [4].
Therefore, most of the solar power conversion systems apply twostage topology [5]. The most common two-stage systems consist of a
dc-dc solar module-connected converter to perform maximum power
point tracking (MPPT) and a dc-ac PWM inverter as shown in Figure
1.1(a). A drawback of this topology is relatively low efficiency due to
the two-stage power conversion.
-4-

(a)

(b)
Fig. 1.1 Topologies of single-phase PV system
(a) two-state
(b) single-state

-5-

To improve the conversion efficiency, a single-stage solar power


system [4] shown in Figure 1.1 (b) can be employed to improve the
conversion efficiency. In this topology, dc voltage generated by solar
modules is converted to ac power directly by an inverter thus we can
get higher efficiency. However, the control method for this topology is
complex since it has to do MPPT, provide desired output and balance
power flow between utility and solar module simultaneously [3][4][6].

1.4 Control Methods for Single-Phase VSI


First and most important factor used to evaluate the inverter
operation in PV system is grid current quality. Grid current should be
sinusoidal with a low THD value, usually less than 5%. In addition, the
inverter is expected to have good transient response under the softstarting period. Efficiency and cost have also a part in evaluation of
different inverters and can impact both topology or control method
selected for the inverter [8][9][10].
In literature, many advance control methods were introduced, all
aiming to control the instantaneous output voltage of single-phase
inverter with superior dynamic response as well as zero steady-state
error at the fundamental frequency of the inverter. Several of these
methods are introduced in the following sections.
1.4.1 Single voltage loop control
This method uses a single feedback loop to regulate the output
voltage of the inverter, as shown in Fig. 1.2, where the time-varying
dynamic of inverter is ignored. The error between the output voltage
-6-

and the sinusoidal reference voltage is compensated to create a


sinusoidal duty reference for the modulator. Although this approach is
easy to design and implement, it does not provide good regulation of
output voltage. Steady state error will also exist due to the finite loop
gain of the controller at the fundamental frequency of the inverter [11].
1.4.2 Multi-loop control
By using a multi-loop control strategy where both output voltage and
current have a feedback loop, the system can get a better performance.
The inner loop is current control loop and has a faster response than the
outer voltage control loop. The reference of the current loop is created
from error of the outer voltage loop. The inner loop provides fast
dynamic response for the inverter as well as damping of the resonant
peaking cause by the output filter making it easier to close the outer
voltage loop with higher bandwidth [12]. Fig 1.3 shows the block
diagram of a multi-loop controller for single-phase inverter.
1.4.3 Predictive control
Based on the predictive control concept, which was presented in [13],
this method utilizes prediction and optimization to minimize the error
in the output voltage. The operation of this method is to predict the
behavior of dependent variables (or output signal) with respect to the
changes in systems independent variables (inputs signal). Predictive
controllers provide better performance and regulation compared to the
single-loop and multi-loop control methods described above. The
disadvantage of this method is to require continuous knowledge of load

-7-

Fig. 1.2 Single-loop control for single-phase PWM inverter

Fig. 1.3 Multi-loop control for single-phase PWM inverter

-8-

making it difficult to be used in stand-alone system where knowledge


of load is not ensured at all time [14].
1.4.4 Deadbeat control
Deadbeat control techniques have been presented for many years
[15]-[17]. Although deadbeat control can theoretically provide the
fastest response for a digital implementation, it has some disadvantage
such as a very high gain, which makes it extremely sensitive to the
noise or dependency on inverters parameters. It means that with
imperfect estimation or variation of inverter parameters, the controller
performance is affected much than the other methods. To clearly
understand this method, let consider an analog control system. This
analog system can achieve faster dynamic response if its close-loop
poles can be moved far away to the left half of the s-plane. In the
extreme case, the analog system can respond as fast as possible if the
poles are located at-.
But, unfortunately, the analog systems cannot be realizable since it is
impossible to design a continuous-time system with a proper transfer
function in which all poles are placed at -. However, this is possible in
a digital system. The discrete-time system can be obtained from the
continuous-time system by applying the Zero-order-hold (ZOH)
transformation. It is noted that a pole at s = - in s-plane corresponds to
z = 0 in z-plane. Therefore, it is possible for a digital control system to
achieve its fastest response if all the close-loop poles are place at the
origin of the z-plane. The technique of placing all the poles of a
discrete-time system at zero is named as deadbeat control. This method
cannot be used for analog control systems.
-9-

1.4.5 Sliding mode control


Sliding control method is a variable structure control strategy where
a reference line is selected so that the system trajectory exhibits
desirable behavior when confined to that reference line. The feedback
gain is determined to control the system trajectory intersects and stays
on the reference line. In principle, this control constrains the system, by
using the suitable control strategy, to stay on the sliding surface in
which the system will exhibit desirable features.
The chattering phenomenon, is a disadvantage of this control, is
caused by the presence of parasitic dynamics in series with the plant or
the non-idealities of the switches. It causes a small high-frequency
amplitude oscillation around the sliding reference line. Normally, these
parasitic dynamics are often ignored in control design to help
simplifying the process.
The sliding mode control provides a great dynamic response for the
system as well as low output voltage distortion under nonlinear load
operation making it one of the more exotic control methods that can be
done for single-phase inverters if carefully designed so that the
chattering phenomenon is minimized and eliminated [18]-[21].
1.4.6 Conclusion
Although each of the methods described above can be designed to
give desired outcome, this dissertation will be carried out based on
single-loop current-control based vector control method, one that is
very well known and has been used for many years but most for threephase applications. Chapter 2 includes a detailed design of this control
method with all analysis, simulation and experimental results.

- 10 -

Chapter

Current Controller for Single-Phase


Grid-Connected PV Inverter

2.1 Introduction
Over the years, the energy consumption is increased due to more and
more appliances that are using electricity. Among the new energy
sources, wind and solar energy are receiving higher interest due to their
potentials. The wind turbine (WT) and photovoltaic (PV) systems are
widely used in countries with high wind potential (e.g. Germany,
Denmark, Spain, Korea, Japan, China and other countries). Except a
few wind turbine topologies, almost all WT and PV systems are
interfacing the utility grid through a pulse-width modulated (PWM)
driven Voltage Source Inverter (VSI) [23] whose functionality is to
synchronize and transfer the variable produced power over to the grid.
Another feature of the adopted dc/ac inverter is that it is usually PWM

- 11 -

at a high switching frequency and is either current- or voltagecontrolled using a selected linear or nonlinear control algorithm.
Although current and voltage control schemes are possible and
implementable, the current control principle is generally preferred for
its excellent dynamic characteristics and its inherent over-current
limitation capabilities. The deciding criterion when selecting the
appropriate control scheme, which deals with the grid interconnection,
usually involves an optimal tradeoff between cost, complexity and
waveform quality needed for meeting the power quality standards for
distributed generation in low-voltage grids, like IEEE-1547 (in USA)
and IEC61727 (in Europe) at a commercially favorable cost. Since the
similarities in hardware, initially the control strategies applied to drives
applications were also applied in distributed power generation system
(DPGS). However, because of the more restrictive standard demands
for power quality, various control strategies and controller types have
also been investigated [24][27]. One of the most common control
structures applied to DPGS is based on Voltage Oriented Control (VOC)
employing a controller for the dc-link voltage and a controller to
regulate the injected current into the utility grid [27].
However, the most controllers with precise reference tracking are
either overburdened by complex computational requirements or have
high parametric sensitivity (sometimes both).
On the other hand, simple linear proportionalintegral (PI)
controllers are prone to known drawbacks, including the presence of
steady-state error in stationary frame and the need to decouple phase
dependency in three-phase systems although they are relatively easy to
implement [27]. Many approaches have been proposed in the literature

- 12 -

to improve the overall performance of PI controllers such as the


addition of a grid voltage feed-forward path, multiple-state feedback
and increasing the proportional gain. These variations can expand the
PI controller bandwidth but, unfortunately, they also push the systems
towards their stability limits.
Furthermore, another disadvantage of the modified PI controllers is
the possibility of distorting the line current caused by background
harmonics introduced along the feed-forward path if the grid voltage is
distorted. This distortion can in turn trigger LC resonance especially
when a LCL filter is used at the converter AC output for filtering
switching current ripple [28][29].
In case of three-phase systems, synchronous frame PI control with
voltage feed-forward can be used, but it usually requires multiple frame
transformations, and can be difficult to implement using a low-cost
fixed-point digital signal processor (DSP).
To overcome the computational burden and to achieve virtually
similar frequency response characteristics as a synchronous frame PI
controller, another controller, proportional-resonant (PR) controller for
reference tracking in the stationary frame has been developed in [30][32]. Interestingly, the same control structure can also be used for the
precise control of a single-phase converter [31]. In brief, the basic
functionality of the PR controller is to introduce an infinite gain at a
selected resonant frequency for eliminating steady-state error at that
frequency. Removal of the steady-state error in single-phase systems,
no need for coupling or voltage feed-forward and easy tuning stand as
its main advantages. As already highlighted, the resonant frequency
information is necessary in their internal model. This issue may be

- 13 -

regarded as a drawback when implemented in a grid-connection system


in case of utility grid frequency variations.
With the introduced flexibility of tuning the resonant frequency, the
selective low-order harmonics compensation using multiple PR
controllers have also been applied for three-phase active power
filters[33], for three-phase uninterruptible power supplies (UPS)[34],
for single-phase PV inverters[35]. Furthermore, various harmonic
reference generators using PR filters have also been proposed for
single-phase traction power conditioners [36] and three-phase active
power filters [37].
Since the electronic power converters will be increased either as
inverters processing DC energy from renewable energy source for grid
injection or as rectifiers conditioning grid energy for different load
usages, this chapter provides a comprehensive reference for readers on
the integration of PR controller to grid-connected inverter for
enhancing their tracking performances.
To begin, the frequency domain derivation of the ideal and non-ideal
PR controllers are reviewed, and the comparative analysis between PR
and conventional PI controller are discussed. Generic control block
diagrams for illustrating current tracking control are also described
before providing readers some practical results as implementation
examples.

2.2 PI Controller Analysis


2.2.1 PI controller gains
The conventional (ideal) PI controller transfer function is defined as:
- 14 -


K
1
GPI (ideal) = K p + i = K p 1 +
T s
s
i

where Kp, Ki and Ti =

(2.1)

p
are the proportional gain, integral gain and
K
i

integral time constant, respectively.


Fig. 2.1 depicts a simple control system block diagram using
conventional PI controller with one plant, where r is the reference input
signal, y is the system output signal, e is the error between the reference
and feedback signals, u is the controlled signal, d is the disturbance
signal, Gc(s) is the PI controller transfer function shown in (2.1) and
Gp(s) is the plant transfer function as shown in (2.2) for a general case.

G p = Ks

1 + a s + a s 2 + ... + a s m - sT
m e
1
2
d
2
n
1 + b s + b s + ... + b s
1
2
n

(2.2)

where Ks is the steady-state gain, Td is the plant time delay, ax and by


are the numerator and denominator parameters (x = 1,..,m and y =
1,..,n, where m n), respectively.

By applying the Taylor series, the delay component e

- sT
d in (2) can

be expanded as:

( ) ( ) ( )

sT 2
sT 3 sT 4
- sT
d
d
e
= 1 - sT +
- d + d + ...
d
2!
3!
4!

- 15 -

(2.3)

Gc(S)

Gp(S)

Controller

Plant

Fig. 2.1 An equivalent block diagram of a simple closed-loop control system


using PI controller
Bode diagram of ideal PI controller
80
K p=1
K p=5

Gain(dB)

60

K p=10
40

Kp increases

20
0
-4
10

-3

10

-2

10

-1

10

10

10

10

10

10

Phase(deg)

-20
-40
-60

Kp increases

-80
-100
-4
10

-3

10

-2

10

-1

10

10
10
Frequency (Hz)

10

10

10

Fig. 2.2 Effect of Kp variation on PI controller (Ki =1)


Bode diagram of ideal PI controller
100
K i=1

Gain(dB)

80

K i=5

Ki increases

60

K i=10

40
20
0
-4
10

-3

10

-2

10

-1

10

10

10

10

10

10

Phase(deg)

-20
-40

Ki increases

-60
-80
-100
-4
10

-3

10

-2

10

-1

10

10
10
Frequency (Hz)

10

10

10

Fig. 2.3 Effect of Ki variation on PI controller (Kp = 1)


- 16 -

The optimization procedure is considered upon examination of both


the input and disturbance transfer functions. The closed-loop transfer
function between the output y and the reference input r is (2.4), where
the transfer function between the output y and the disturbance d is (2.5):

Gr (s ) =

G (s )G (s )
Y (s )
c
p
=
R(s ) 1 + G (s )G (s )
c
p

(2.4)

G (s )
Y (s )
p
(
)
=
Gd s =
D (s ) 1 + G (s )G (s )
c
p

(2.5)

It is noted that both the system transfer functions corresponding to


the reference and the disturbance have the same characteristic equation.
The PI controller gains can be calculated following the symmetric or
magnitude optimum criterion, where the latter has a fast and nonoscillatory closed-loop time response for a large class of plants [38][41]. In accordance to the magnitude optimum criterion, the gains of the
PI controller may be determined following these criteria:
G (s )
=1
r s=0

(2.6)

d 2 k G (s )
r
lim
=0

2
w 0 dw k

s = jw

(2.7)

for k=1,2,3
The closed-loop transfer function between the output and reference
input of the system, shown in Fig. 2.1, can be obtained by substituting
- 17 -

(2.1) and (2.2) into (2.4) as follows:


1 + N s + N s 2 + N s 3 + ...
1
2
3
Gr (s ) =
2
1 + D s + D s + D s3 + ...
1
2
3

(2.8)

where
N1 = a + T - T
1 i d

(2.8.a)

T2
N2 = a + a T - a + T T + d
2
1i
1 i d
2!

(2.8.b)

T2 T3
N3 = a + a T - a + a T T + a + T d - d
3
2 i
2 1i d
1 i 2!
3!

(2.8.c)

T
T
i =N +
i
D1 = a + T - T +
1 i d K K
1 K K
p s
p s

(2.8.d)

T2
T
T
i = N +b
i
D2 = a + a T - a + T T + d + b
2 1i
1 i d
1
2
1
2!
K K
K K
p s
p s

(2.8.e)

...

T2 T3
b T
b T
D3 = a + a T - a + a T T + a + T d - d + 2 i = N + 2 i
3
2 i
2 1i d
1 i 2!
3 K K
3! K K
p s
p s

(2.8.f)
...
The condition (2.7) is fulfilled by using the set of equations with the
used notations in (2.8) [41]:
2k

2k

i=0

i=0

(- 1)i + k Di D2k - i = (- 1)i + k N i N 2k - i

- 18 -

(2.9)

where k is the step order. It depends on each system but should be


taken as many as possible.
Solving equations (2.9) for k=1 and k=2, the following PI regulator
gains are obtained:

2b - b 2 b - a + T - b
1 2 1 1 1 d
K =
p 2K
b -a +T a -b
s
1 1 d
T =
i

2K K b - a + T
p s 1 1 d
1 + 2K K
p s

(2.10)

(2.11)

where
T2
a = a -T b -b + a T - a + d
1 d 1 2
1 d
2 2!

(2.12)

T 2
T2
T3

d
d
d
b = - a Td + a +
b1 - a1 - Td b2 + b3 + a1 2! + a2Td - a3 + 3!
1
2
2
!

(2.13)
The effect of each parameter to PI controller operation is analyzed.
Assuming one of parameters to be constant, the effect of changes in the
other parameter can be easily observed.
Fig. 2.2 shows the effect of Kp to the operation of PI controller. It
can be concluded that the harmonic impedance depends on Kp value, it
increases as Kp is added. A high value of Kp can lead to a low harmonic
output caused by the disturbance. Similarly, Fig. 2.3 shows the effect of
Ki to the operation of PI controller. The change of Ki has effect on both

- 19 -

magnitude and phase of the regulator. The magnitude and the


bandwidth increase when Ki increases.
2.2.2 Digital implementation of PI controller
In the time domain, the PI controller is expressed as follows:
t

u (t ) = K e(t ) + K e(t )dt


p
i0

(2.14)

where u(t) and e(t) are the output and the error signal input of the PI
controller in time domain, Kp and Ki are the PI controller gains,
respectively.
During a sampling time Ts, equation (2.14) can be rewritten as
follows:
u (k ) = K e(k ) + K T e(k )
p
i s
k

(2.15)

At the previous sampling point:


u (k - 1) = K e(k - 1) + K T e(k )
p
i s
k

(2.16)

Subtract (2.15) to (2.16), we can get the digital form of the PI


controller in DSP as follows:

- 20 -

Bode diagram of PI controller


70
Ideal PI
Nonideal PI

Gain(dB)

60
50
40
30
20
-2
10

-1

10

10

10

10

10

10

10

Phase(deg)

-20
-40
-60
-80
-100
-2
10

-1

10

10

10
10
Frequency (Hz)

10

10

10

Fig. 2.4 Frequency response of ideal and non-ideal PI controller (Kp=10,


Ki=100, wc=10rad/s)
Bode diagram of PR controller
70
Ideal PR
Nonideal PR

Gain(dB)

60
50
40
30
20
-2
10

-1

10

10

10

10

10

10

10

Phase(deg)

100
50
0
-50
-100
-2
10

-1

10

10

10
10
Frequency (Hz)

10

10

10

Fig. 2.5 Frequency response of ideal and non-ideal PR controller (Kp=10,


Ki=100, wc =10rad/s, w0 =377rad/s)

- 21 -

u (k ) = u (k - 1) + K

[e(k ) - e(k - 1)] + KiTs e(k )

(2.17)

2.2.3 Non-ideal PI controller


In the harmonic synchronous reference frame, the low-pass filtered
DC output is the harmonic voltage magnitude. The lower the filter cutoff frequency, the more accurately the harmonic voltage component
will be extracted in the steady-state, but the transient response time will
increase correspondingly as a consequence.
If the simple first-order low-pass filter with cut-off frequency c is
used in the synchronous reference frame, the transfer function of the
ideal PI controller in (2.1) becomes:
Kw
GPI (nonideal) = K p + i c
s +w
c

(2.18)

Equation (2.18) can be seen as to be a non-ideal PI controller and be


used to obtain the non-ideal PR controller. The bode diagrams of ideal
and non-ideal PI controller are depicted in Fig. 2.4.

2.3 PR Controller Analysis


2.3.1 Ideal PR controller
In the load current control technique of power electronic converter
regulations, the system signals are converted from ac to dc signal. It
means that the three-phase signals in the stationary reference frame are
transferred into a synchronous reference frame by using Clarke-Park

- 22 -

transformations. These transforms essentially perform frequency shifts


on the system signals, which are time-varying quantities, and it is useful
to have Laplace-domain presentations of these transformations for
controller analysis. In a dc control system, the standard control network
is an ideal PI controller with an s-plane transfer function as (2.1). It is
also used in a synchronous reference frame current regulation system.
In single-phase system, the popularly reference frame transformation
cannot be applied directly. Therefore, an alternative approach of
transforming the regulator in dc quantities from the synchronous
reference frame to an equivalent stationary reference frame is the
frequency modulated method. This process can be mathematically
expressed as [30][32]:

[ (

1
G PR (s ) = G ac (s ) = G s + jw + G s - jw
PI
I
0
0
2 I

)]

(2.19)

where 0 is the ac frequency.


In (2.19), GPI(s) is a low-pass transfer block, this transformation
results in a low-pass to band-pass or a frequency shifting
transformation to the frequency. By using the first-order low-pass filter
or the PI controller in the synchronous reference frame, but centered
around frequency 0, we can get:

K
K
Ks
1
i +K +
i =K +
i
GPR (s ) = G ac (s ) = K +
p
PI
p s - jw
2
2 p s + jw
s + w2
0
0

(2.20)

- 23 -

Equation (2.20) can be seen to be an ideal PR controller which


achieves infinite gain at the ac frequency 0. In the other words, the
ideal PR controller can be mathematically derived by transforming an
ideal PI controller from synchronous reference frame to stationary
reference frame.
2.3.2 Non-ideal PR controller
Unfortunately, the ideal PR controller acts like a network with an
infinite quality factor, which is hard to implement the PR controller in
reality because of the following reasons:
-

The introduced infinite gain leads to an infinite quality factor


which cannot be achieved in either analog or digital system.
Furthermore, this gain causes the associated instability problem
to system.

The PR controller gains are much reduced at other frequencies


and they are not introduced adequate to eliminate harmonic
influence caused by ac voltage.

To solve the aforementioned problems caused by the ideal PR


controller, an approximating ideal (or non-ideal) PR controller using a
high-gain low-pass filter is used. By substituting the non-ideal PI
controller in (2.18) into (2.19), the non-ideal PR controller can be
obtained as:

GPR ( nonideal ) (s ) = K p + Ki

wc s + wc2
s 2 + 2w s + w 2 + w 2
c
c
0

- 24 -

(2.21)

Assuming c 0, a simpler approximation of non-ideal PR


controller as (2.22) can be used instead of (2.21):

G PR (nonideal ) (s ) = K p + K i

w s
c
2
s + 2w s + w 2
c
0

(2.22)

The frequency responses of ideal and non-ideal PR controllers are


depicted in Fig. 2.5. As shown in Fig. 2.5, the ideal PR controller
achieves infinite gain at the ac frequency (in this dissertation, f0=60Hz)
to force the steady-state voltage error to zero, and no phase shift and
gain at other frequencies. In case of the non-ideal PR controller, we can
adjust the gains to obtain the high enough finite gain for eliminating the
voltage tracking error. In addition, a wider bandwidth is observed
around the resonant frequency, which is minimizes the sensitivity of the
controller to slight ac frequency variations. At other harmonic
frequencies, the response of the non-ideal PR controller is comparable
to those of the ideal one.
2.3.3 PR controller gains
It can be seen that in (2.22), there are three parameters affect to the
PR controller operation. It means that there are three degrees of
freedom in PR controller design. To simplify the analysis, we keep two
parameters be constant, and then the effect on the PR controller of the
last parameter effect can be easily observed.
Firstly, assuming the proportional gain Kp and the cutoff frequency
c have no change. Fig. 2.6(a) shows that without proportional gain Kp,

- 25 -

the variation of integral gain Ki has effect on the gain of the controller.
The gain increases as Ki is added. With proportional gain Kp, the Ki
variation has effects on both bandwidth and gain of PR controller, as
shown in Fig. 2.6(b). PR controller can achieve a very high gain in a
narrow frequency band centered around the resonant frequency. The
width of this frequency band depends on the integral gain Ki. A low Ki
value leads to a very narrow band and vice versa.
Secondly, assuming the proportional gain Kp and integral gain Ki are
constant, the cutoff frequency c have effect on the bandwidth and
small effect on the gain of the PR controller. As shown in Fig. 2.7(a)
and (b), the PR controller bandwidth increases as c added, but there is
only a small change in the controller gain. So that we can say the same
PR controller gain can be achieved at the resonant frequency when c
changes. Using a smaller c will make the controller more sensitive to
the variation of frequency, hence this leads to a slower transient
response and more difficult in implementation in DSP. In practical, the
value of c can be chosen at 5-15(rad/s) for a good response [36].
Finally, as shown in Fig. 2.8, when Kp is added, the PR controller
gain increases. But a high Kp value will decrease the bandwidth of the
PR controller. It means that the harmonic impedance increases as Kp
added, and then the higher Kp value can lead to a relatively low
harmonic component. The value of Kp can be chosen to make sure that
the system can achieve high performance in the sinusoidal reference
tracking as well as the disturbance rejection.
In conclusion, the PR controller gains can be designed following a
step-by-step procedure:
- First, choose the value of c to meet the system bandwidth.

- 26 -

Bode diagram of PR controller when K i changes


50

Gain(dB)

-50

Ki increases
-100
-1
10

10

10

10

10

10

10

100
Ki = 1

Phase(deg)

50

K i = 10
K i = 100

K i = 200

-50
-100
-1
10

10

10

10
Frequency (Hz)

10

10

10

(a)
Bode diagram of PR controller when Ki changes
50
Ki = 1

Gain(dB)

40

K i = 10

30
20

K i = 100

Ki increases

K i = 200

10
0
-1
10

10

10

10

10

10

10

Phase(deg)

100
50

Ki increases

0
-50
-100
-1
10

10

10

10
Frequency (Hz)

10

10

10

(b)
Fig. 2.6 Frequency response of non-ideal PR controller when Ki changes
(a) Kp = 0, wc = 1rad/s, w0 = 377rad/s
(b) Kp = 1, wc = 1rad/s, w0 = 377rad/s
- 27 -

Bode diagram of PR controller when W c changes

Gain(dB)

-50

-100

-150
-1
10

wc increases
0

10

10

10

10

10

10

100
Wc = 1

Phase(deg)

50
0

W c = 10

wc increases

W c = 100
W c = 200

-50
-100
-1
10

10

10

10
Frequency (Hz)

10

10

10

(a)
Bode diagram of PR controller when W c changes
4
Wc = 1

Gain(dB)

3
2

W c = 10
W c = 100

wc increases

W c = 200

1
0
-1
10

10

10

10

10

10

10

Phase(deg)

20

wc increases

10
0
-10
-20
-1
10

10

10

10
Frequency (Hz)

10

10

10

(b)
Fig. 2.7 Frequency response of non-ideal PR controller when wc changes
(a) Kp = 0, Ki = 1, w0 = 377rad/s
(b) Kp = 1, Ki = 1, w0 = 377rad/s
- 28 -

Bode diagram of PR controller when Kp changes


50

Gain(dB)

40
30
20

Kp increases

10
0
-1
10

10

10

10

10

10

10

Phase(deg)

20
10

Kp = 1
Kp = 10

Kp = 100

-10

Kp = 200

-20
-1
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 2.8 Frequency response of non-ideal PR controller when Kp changes with


Ki =1, wc = 1rad/s, w0 = 377rad/s

Fig. 2.9 Single-phase grid-connected PV inverter control system


(a) Current control circuit structure
(b) Equivalent current control block diagram
- 29 -

- Second, choose the integral gain Ki for a suitable controller gain.


- Finally, the proportional gain Kp can be selected to make sure that
the system can achieve high performances in sinusoidal signal tracking
and disturbance rejection.
2.3.4 Digital implementation of PR controller
By

applying

the

bilinear

transformation

s=

2 1 - z -1
T 1+ z-1
s

and

substituting into (2.22), the discrete transfer function of the PR


controller can be given by (2.23):
n + n z-1 + n z- 2
2
GPR ( nonideal ) ( z ) = 0 1
1
1+ d z + d z- 2
1
2

(2.23)

4 + 4T w + w 2T 2 K + 4 K T w
s c
i s c
0 s p
n =
0
2
2
4 + 4T w + w T
s c
0 s

(2.23a)

- 8 + 2w 2T 2 K
0 s p
n =
1
4 + 4T w + w 2T 2
s c
0 s

(2.23b)

4 - 4T w + w 2T 2 K - 4 K T w
s c
0 s p
i s c
n =
2
2
2
4 + 4T w + w T
s c
0 s

(2.23c)

- 8 + 2w 2T 2
0 s
d =
1
4 + 4T w + w 2T 2
s c
0 s

(2.23d)

4 - 4T w + w 2T 2
s c
0 s
d =
2
4 + 4T w + w 2T 2
s c
0 s

(2.23e)

- 30 -

Fig. 2.10 Single-phase current control structure


(a) Using PI controller
(b) Using PR controller

- 31 -

where Ts is the sampling time, wc is the cut-off frequency (rad/s) and


w0 is the grid utility frequency (rad/s)
From (2.23), the discrete equation can be obtained as follows:
y(k ) = n0u(k ) + n1u(k - 1) + n2u(k - 2) - d1 y(k - 1) - d2 y(k - 2)

(2.24)

where u(k) is the error input and y(k) is the output of the PR
controller.

2.4 Single-Phase Grid-Connected PV Inverter System


2.4.1 Current control scheme
A single-phase grid-connected PV PCS has built where its circuit
block diagram of current control scheme is depicted in Fig. 2.9(a) and
its current control block diagram is illustrated in Fig. 2.9(b),
respectively. Fig. 2.10 (a) shows the detail single-phase current control
structure by using PI controller and Fig. 2.10 (b) shows that of using PR
controller, respectively.
Since the L-filter achieves low attenuation of the inverter switching
components, a capacitor (as a shunt element) is needed to further
attenuate the switching frequency components. This capacitor must be
selected to produce a low reactance at the switching frequency. But
within the control frequency range, this element must present high
magnitude impedance. However, a very high capacitance is not
recommended since the system may face with inrush current, high
current fed on capacitor at the fundamental frequency, resonance
phenomenon at the grid side, etc. If a system is connected to the grid

- 32 -

via LC-filter, the resonant frequency varies over time as the inductance
value of the grid.
The LCL-filter can provide a better decoupling between the filter
and the grid impedance. A lower ripple current distortion across the
grid-side inductor since the current ripple is reduced by the capacitor.
Although LCL-filter can provide a good attenuation ratio even with
small L and C values, the LCL-filter design, which will be presented in
Chapter 3 in detail, needs to consider various constraints, such as the
resonance phenomenon, the current ripple through filter inductor, the
total impedance of the filter, the current harmonics attenuation at
switching frequency and the reactive power absorbed by capacitor, etc.
The relationship between input and output of current control system
in Fig. 2.9(b) can be obtained as:

(s ) = H i (s )I *g (s ) - H v (s )V g (s )

(2.25)

I (s )
G (s )G (s )G (s )
g
c
i
f
=
H (s ) =
i
*
I (s ) 1 + Gc (s )Gi (s )G f (s )
g

(2.26)

(s ) =
v

G (s )
(s )
f
=
V (s ) 1 + G (s )G (s )G (s )
g
c
i
f
I

(2.27)

where Gc(s) is the controller transfer function. Gc(s) is shown in (2.1)


in case of PI controller and is shown in (2.22) in case of PR controller;
1
is the inverter transfer function with time delay
Gi (s ) =
1 + 1.5T s
s

Rd C f s + 1

consideration; G f (s) =
is the
Li Lg C f s 3 + Li + L g Rd C f s 2 + Li + Lg s

- 33 -

LCL-filter transfer function with damping resistor, where the resonant


frequency is calculated as wres

L +L
i
g
).
LL C
i g f

As shown in (2.25), the output current depends on both the reference


current and the grid voltage. In steady state, because the PI controller
has a finite gain at the fundamental frequency, the second term of
(2.25) cannot be neglected but can be eliminated by using de-coupling
technique. However, PR controller introduces an infinite gain, then the
first term approaches the inverter current reference and the second term
approaches zero. Hence, the PR controller can achieve the zero steadystate error of the controlled inductor current.
From (2.26), the closed-loop transfer functions of current control
system shown in Fig. 2.9(b) in case of using PI controller can be
obtained as (2.28) and in case of using PR controller can be obtained as
(2.29), respectively.

(s ) =
i ( PI )

A s2 + A s + A
2
1
0
5
4
3
B s + B s + B s + B s2 + B s + B
5
4
3
2
1
0

(2.28)

A =K R C
p d f
2

(2.28a)

A =K +K R C
p
i d f
1

(2.28b)

A =K
0
i

(2.28c)

B = 1.5T L L C
5
s i g f

(2.28d)

B = 1.5T L + L R + L L C
4
s i
g d
i g f

(2.28e)

- 34 -

)(

B = 1.5Ts + Rd C f Li + L g
3

(2.28f)

B = Li + Lg + K p Rd C f
2

(2.28g)

B =K +K R C
p
i d f
1

(2.28h)

B =K
0
i

(2.28i)

C s3 + C s 2 + C s + C
3
2
1
0
H
(s ) =
i( PR )
6
5
4
3
D s + D s + D s + D s + D s2 + D s + D
6
5
4
3
2
1
0

(2.29)

C =K R C
p d f
3

(2.29a)

C = K + 2 K + K R C w
2
p
p
i d f c

(2.29b)

C = K w 2 R C + 2 K + K w
p 0 d f
p
i c
1

(2.29c)

C = K w2
0
p 0

(2.29d)

D = 1.5T L L C
6
s i g f

(2.29e)

[ (

)]

D = 1.5T L + L R C + 1 + 2 1.5T w Li L g C
s i
g d f
5
s c
f

[ (

(2.29f)

)]

D = 1.5T L + L + R C L + L 1 + 2 1.5T w +
s i
g
d f i
g
s c
4
+ Li L g C 2w + 1.5T w 2
f c
s 0

[ (

(2.29g)

)]

D = L + L 1 + 2 1.5T w + L + L 2w + 1.5T w 2 R C +
3 i
g
s c
g c
s 0 d f
i
+ Li L g C w 02 + K p Rd C f
f

(2.29h)

D = L + L 2w + 1.5T w 2 + L + L R C w 2 + K +
2 i
g c
s 0 i
g d f 0
p
+ 2 K + K Rd C f w
p
i
c

(2.29i)

- 35 -

Bode diagram of closed-loop current control using PI controller


50

Gain(dB)

0
-50
-100
-150
1
10

10

10

10

10

10

Phase(deg)

0
Using PI controller
Using PR controller

-100

-200

-300
1
10

10

10
10
Frequency (Hz)

10

10

Fig. 2.11 Frequency response of closed-loop current control using PI


controller (Kp=10, Ki=100) and PR controller (Kp =15, Ki =200, wc = 15rad/s,
w0 = 377rad/s)

- 36 -

Root locus of system using PI controller


1
0.6p/T
0.8

0.5p/T

0.4p/T
0.10.3p/T
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9

0.7p/T

0.6

0.8p/T

0.4

Imaginary Axis

0.9p/T
0.2
0
-0.2

0.2p/T

0.1p/T

p/T
p/T

0.9p/T

0.1p/T

-0.4
0.8p/T

-0.6

0.2p/T

0.7p/T

-0.8

0.3p/T
0.6p/T

-1
-1

-0.8

-0.6

-0.4

0.5p/T

-0.2

0.4p/T
0.2

0.4

0.6

0.8

Real Axis

(a)
Root locus of system using PR controller
1
0.6p/T
0.8

0.5p/T

0.4p/T
0.10.3p/T
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9

0.7p/T

0.6

0.8p/T

Imaginary Axis

0.4
0.2
0
-0.2

0.9p/T

0.2p/T

0.1p/T

p/T
p/T
0.9p/T

0.1p/T

-0.4
-0.6

0.8p/T

0.2p/T
0.7p/T

-0.8

0.3p/T
0.6p/T

-1
-1

-0.8

-0.6

-0.4

0.5p/T

-0.2

0.4p/T
0.2

0.4

0.6

0.8

Real Axis

(b)
Fig. 2.12 Root locus of closed-loop current control system
(a) Using PI controller
(b) Using PR controller
- 37 -

Nyquist diagram of system using PI controller


3
0 dB
2 dB

-2 dB

2
4 dB

Imaginary Axis

-4 dB

6 dB
10 dB

-6 dB
-10 dB

-1

-2

-3
-3

-2

-1

Real Axis

(a)
Nyquist diagram of system using PR controller
3
0 dB
2 dB

-2 dB

2
4 dB

Imaginary Ax is

-4 dB

6 dB
10 dB

-6 dB
-10 dB

-1

-2

-3
-3

-2

-1

Real Axis

(b)
Fig. 2.13 Nyquist diagram of open-loop current control system
(a) Using PI controller
(b) Using PR controller
- 38 -

D = L + L w 2 + 2 K + K w + K w 2 Rd C f
1 i
g 0
p
i c
p 0

D = K w2
0
p 0

(2.29j)
(2.29k)

Fig. 2.11 shows the bode diagrams of closed-loop systems using PI


and PR controller where the system using PR controller can introduce a
higher bandwidth than using PI controller.
For stability analysis, assuming the voltage source inverter switching
frequency is higher than power system frequency (by this way, the
inverter will have negligible impact on the control loop dynamics) and
supply voltage is sinusoid. Following these assumptions, the current
closed-loop control stability can be analyzed with classical methods
(e.g. Nyquist, root locus).
Fig. 2.12(a) and (b) show the Nyquist diagrams of the system using
PI and PR controller, respectively, where their Nyquist curves do not
contain (-1,j0) point. The root locus diagrams of these systems in zdomain are also illustrated in Fig. 2.13(a) and (b), respectively.
2.4.2 Digital phase-locked loop (DPLL)
In this paper, a single-phase digital phase-locked loop (DPLL) is
implemented by making a virtual orthogonal voltage, which is delayed
by 900 from the measured grid voltage and is generated by passing
through an all-pass filter (APF) as shown in Fig. 2.14. The phase
detection time of DPLL method is faster than conventional zerocrossing detection method.
The APF transfer function is given by:

- 39 -

Fig. 2.14 Digital phase-locked loop block diagram

All pass filter


I alpha

[Igrid ]

Igrid

From Igrid

I beta

[theta ]
vd cmd
ibeta

[theta ]

Theta

[Vpeak ]

v peak

vq cmd

From Vgrid

Vgrid

v peak

[Vpeak]

Theta

[theta ]

Single phase PLL

[m]
PWM Generator

Vcmd

Signal(s) Pulses
A

Current control

[Vgrid ]

theta

ialpha

Command Voltage
Generator

[Vdc]

g
+
-

DC
Voltage
Source

Grid voltage
Grid voltage

Igrid

Grid current
Grid current

+
A

[Vgrid ]
Vgrid

[Igrid ]

A1

[PWM]
-

IGBT Inverter

Filter

B1

PWM

PWM voltage

Current & Voltage


Measurement
[theta ]

Theta

Scope

Fig. 2.15 The simulation model of 3kW single-phase grid-connected PV VSI system using Matlab/Simulink
- 40 -

PLL

By

(s ) = w - s

(2.30)

w+s

applying

the

bilinear

transformation

s=

2 1 - z -1
T 1+ z-1
s

and

substituting into (2.30), the discrete PLL transfer function can be given
by (2.31):

(z ) =
PLL

(
(

)
)

wT - 2 + wT + 2 z - 1
s
s
wT + 2 + wT - 2 z - 1
s
s

(2.31)

Hence, the virtual voltage which is generated from the measured grid
voltage can be implemented by the following discrete difference
equation:
y(k ) = au(k ) + u(k - 1) - ay(k - 1)
a=

(2.32)

wT - 2
s
wT + 2
s

(2.33)

where u(k) is the error input and y(k) is the output of the filter,
respectively.
In Fig. 2.14, the grid voltage becomes a-component of stationary
reference frame while b-component is a virtual voltage through the
aforementioned all-pass filter. And then, the stationary reference frame
ab-components are converted to the synchronous reference frame dqcomponents, where d-component denotes the difference between utility
- 41 -

and estimated phase angles.


In addition to the phase estimation, the instantaneous grid voltage
peak can be calculated by considering it is the same as q-component.

2.5 Simulation Results


The Matlab/Simulink model of the single-phase grid-connected PV
inverter system is shown in Fig. 2.15 with the parameters listed in
Table 2.1. The performance of the DPLL is depicted in Fig. 2.16, where
the grid component becomes -component and the b-component is
generated by making a 900-delayed virtual voltage component.
Table 2.1
Single-phase grid-connected PV system parameters
Specifications

Value

Maximum rated power Prated

3 (kW)

Dc-link voltage Vdc

400 (V)

Rated grid voltage Vg (rms)

220 (V)

Maximum rated grid current Ig (rms)

13.64 (A)

Grid frequency f0

60 (Hz)

Switching frequency fsw

10 (kHz)

Modulation index ma

0.8

Inverter-side inductance Li

0.481 (mH)

Grid-side inductance Lg

0.348(mH)

Capacitance Cf

8.2 (mF)

Damping resistance Rd

4.95 (W)

Resonant frequency fres

3.9 (kHz)

- 42 -

The grid voltage (V )


g

400
200
(a) 0
-200
-400

(b)

(c)

400
200
0
-200
-400
400
200
0
-200
-400

0.005

0.01

0.015
0.02
0.025
0.03
0.035
The stationary frame voltages (V -V )

0.04

0.045

0.05

0.005

0.01

0.015
0.02
0.025
0.03
0.035
The synchronous frame voltages (Vd-V q)

0.04

0.045

0.05

0.005

0.01

0.015
0.02
0.025
0.03
0.035
The stationary frame currents (I -I )

0.04

0.045

0.05

a b

10

(d)

0
-10

0.005

0.01

0.015
0.02
0.025
0.03
0.035
The synchronous frame currents (Id-Iq)

0.04

0.045

0.05

0.005

0.01

0.015

0.035

0.04

0.045

0.05

0.035

0.04

0.045

0.05

10

(e)

0
-10

0.025

0.03

PLL phase angle (q)

10

(f)

0.02

5
0

0.005

0.01

0.015

0.02

0.025

0.03

Fig. 2.16 DPLL operation results


(a) grid voltage
(b) stationary frame components of grid voltage
(c) synchronous frame components of grid voltage
(d) stationary frame components of grid current
(e) synchronous frame components of grid current
(f) grid phase angle

- 43 -

The grid voltage


400
200

(a)

0
-200
-400

0.005

0.01

0.015

0.02

0.025

0.03

0.035

0.04

0.045

0.05

0.04

0.045

0.05

The grid current using PI controller


10
5

(b)

0
-5
-10

0.005

0.01

0.015

0.02

0.025

0.03

0.035

The grid current using PR controller


10
5

(c)

0
-5
-10

0.005

0.01

0.015

0.02

0.025

0.03

0.035

0.04

0.045

0.05

0.035

0.04

0.045

0.05

PLL phase angle


8
6

(d)

4
2
0

0.005

0.01

0.015

0.02

0.025

0.03

Fig. 2.17 Grid-tie operation results


(a) grid voltage
(b) grid current by using PI controller
(c) grid current by using PR controller
(d) grid phase angle
Fundamental (60Hz) = 6.011 , THD= 1.85%
7

Mag

Mag

Fundamental (60Hz) = 6.138 , THD= 3.71%


7

200

400
600
Frequency (Hz)

800

1000

200

400
600
Frequency (Hz)

800

(a)
(b)
Fig. 2.18 Frequency spectrum and THD value of grid current
(a) using PI controller
(b) using PR controller

- 44 -

1000

Fig. 2.16 also shows the Park-transformation operation, where the


stationary and synchronous reference frame components of grid voltage
and current are shown in Fig. 2.16 (b), (c), (d) and (e), respectively. It is
noted that all waveforms are in phase and the grid phase angle is locked
as shown in Fig. 2.16(f).
Fig. 2.17 shows the results of single-phase grid-connected PV
inverter current control, where Fig 2.17 (a) shows the grid voltage, Fig.
2.17 (b) and (c) show the grid current by using PI and PR controller,
respectively and Fig. 2.17(d) shows the grid phase angle.
Fig. 2.18 (a) and (b) show the frequency spectrum of the grid current
and its THD value by using the PI and PR controller, respectively. By
using PR controller, the THD value is reduced and less than 5%
(11.41% in case of using PI controller compared with 4.14% in case of
using PR controller)

2.6 Experimental Results


The overall system of 3kW single-phase grid-connected PV PCS, as
shown in Fig. 2.19, is implemented fully in software adopting a 32-bit
fixed-point DSP TMS320F2812. The inverter controller is implemented
in software, and the PWM pulses are generated through the internal
pulse generator of the DSP.
Voltage and current signals are measured by using the 12-bit
resolution of internal analog-to-digital converter in the DSP. Also a
four-channel 8-bit digital-to-analog converter has been used for
debugging. The switching frequency of the inverter is chosen to 10 kHz
and the dead-time is 3ms.
- 45 -

Fig. 2.19 3kW PV PCS experimental prototype

Grid voltage
Real component

Virtual component

Grid phase angle

Fig. 2.20 DPLL implementation

- 46 -

Grid voltage

Grid current

Soft-start reference current

dc-link voltage

(a)

Grid voltage

Grid current

Soft-start reference current

dc-link voltage

(b)
Fig. 2.21 Transient-state operation
(a) using PI controller
(b) using PR controller

- 47 -

Grid voltage

Grid current

Grid phase angle

(a)

Grid voltage

Grid current

Grid phase angle

(b)
Fig. 2.22 Steady-state operation
(a) using PI controller
(b) using PR controller

- 48 -

(a)

(b)
Fig. 2.23 Frequency spectrum and THD value of grid current
(a) using PI controller
(b) using PR controller

- 49 -

The experimental results of the PV PCS are shown in Fig. 2.20 - Fig.
2.23.
Fig. 2.20 shows the implementation of the DPLL, where channel 1
shows the grid voltage (250V/div), channel 2 shows the real voltage
component in stationary reference frame, channel 3 shows the virtual
voltage component generated by APF and the grid phase angle is
measured at channel 4. It is noted that all results are in phase.
Fig. 2.21 shows the transient-state performance by using PI and PR
controller. As shown in Fig. 2.21 (a), the grid current has fluctuation
during transient-state by using PI controller. The PR controller has a
better performance, even in transient-state as shown in Fig. 2.21 (b)
Fig. 2.22 (a) shows the grid voltage in channel 1 (250V/div), grid
current in channel 2 (10A/div) and the grid phase angle in channel 4
(10V/div) by using the PI controller. The experimental results of using
PR controller are shown in Fig. 2.22 (b) with the same channel and
scale, respectively. It can be seen that the grid current waveform in Fig.
2.22 (b) is nearly perfect sinusoid. It is noted that the experimental
results show a good agreement with the simulation results and both
waveforms are in phase. The frequency analysis and THD values of
grid current using the PI and PR controller are shown in Fig. 2.23 (a)
and (b), respectively. It is noted that in this experiment, the PV inverter
does not work with the maximum rated power yet, so the THD can be
reduced if working in maximum rated power.
Compared with all the experimental results mentioned above, it is
can be shown that by using PR controller, the current control scheme
can achieve the steady-state performance better than the use of
conventional PI controller in current-controlled based single-phase

- 50 -

grid-connected PV inverter system. Experimental results that the PR


controller can overcome drawbacks of PI controller: inability to track a
sinusoidal reference with zero steady-state error and poor disturbance
rejection capability.

2.7 Conclusions
In this chapter, a comparison between the conventional PI and PR
controller has been presented. Firstly, these control schemes have been
simulated by Matlab/Simulink and then, have been implemented in a
single-phase grid-connected current-controlled based PV PCS with 32bit fixed-point TMS320F2812 DSP.
The theoretical analysis has been performed that the PR controller
has some advantages compared with the conventional PI controller and
it can enable the implemented control inverter system to achieve the
high performance. The experimental results of 3KW PV PCS prototype
system verified the performance of these current control schemes.
Furthermore, these control schemes are suitable for single-phase
current-controlled VSI of distributed generation units, as well as threephase systems, and not only photovoltaic but also the other power
generation system, such as small wind turbine, fuel-cells, etc...

- 51 -

Chapter

Low-Pass Output LCL Filter for


Single-Phase Grid-Connected PV
Inverter

3.1 Introduction
The VSI, with the use of PWM in conjunction with current
controller, can generate a sinusoidal current with a low THD below 5%.
However, the high switching frequencies of between 2-150 kHz can
cause high-order harmonics that can produce loss and disturb sensitive
loads on the utility grid. To eliminate the current harmonics around the
switching frequency and comply with the standards (e.g. IEEE 1547),
the grid-connected inverter for renewable energy source requires an
output low-pass filter for interfacing with the grid. Ideally, the filter
with low cut-off frequency and high attenuation at the high switching

- 52 -

frequency is better to eliminate switching ripple effectively.


A simple L-filter with high inductance value should be used to
reduce the current harmonics around the switching frequency. But it is
expensive to realize a high value filter inductance, especially in several
kilowatts applications, and the dynamic response of system may
become poor because of reactive components. Hence, LC-filter and
LCL-filter can be used to solve this problem and the optimum results
can be obtained in the range of power levels up to hundreds of kilowatts,
still using quite small values of inductors and capacitors [45][46].
The LCL-filter type becomes more attractive for grid interfacing
VSI since it can render the current harmonics attenuation around the
switching frequency by using smaller inductance than L-filter.
Moreover, system using LCL-filter does not depend on the grid
impedance and has a better output response while comparing with LCfilter.
A good criterion to choose LCL filter parameters is to limit the size
of reactive elements, which can results in poor power factor [3], and
reactive power dropped on LCL-filter because of passive damping. In
literature, some issues have been studied: active damping of the filter
[46][48], criteria for parameter choices [47][49], control techniques
integrated with LCL-filter for VSI [50][53]. The design of an LCLfilter to limit switching frequency ripple injection into the grid in the
range of 2-150 kHz is often specifically required. However, the
comparative analysis between the LCL-filter and other filter types has
not been analytically studied to date.
The L-, LC- and LCL-filter topologies are shown in Fig. 3.1.

- 53 -

Ri

Li

(a)
L Filter
Ri

Li
Cf

(b)

Rd
LC Filter
Ri

Lg

Li
Cf

(c)

Rd
LCL Filter
Fig. 3.1 Low-pass filter topologies
(a) L-filter
(b) LC-filter
(c) LCL-filter

- 54 -

Rg

In the literature, the concepts of L-filter, LC-filter and LCL-filter


have been introduced and are revised as follows:
- Firstly, the L-filter is popular and simple to use. But it requires a
high inductance value to have the low ripple attenuation (-20dB/decade)
over the whole frequency range. This causes a poor dynamic system
response because of the dropped voltage on the inductor. Hence the
dynamic system response takes long time to reach steady-state. By
using L-filter, the inverter switching frequency must have a high value
in order to sufficiently attenuate the harmonics [54].
- Secondly, since the L-filter achieves low attenuation of the
inverter switching components, a LC-filter which is modified from Lfilter by adding a shunt element is needed to further attenuate the
switching frequency components. A capacitor is selected to be shunt
element for a low reactance at the switching frequency and high
magnitude impedance within the control frequency range. The LC-filter
has an attenuation of -40dB/decade and is suited to configurations
where the load impedance across the capacitor is relatively high at and
above the switching frequency. To reduce the losses and cost, the
capacitance should be high and then, the inductance can be reduced.
But a very high capacitance is not recommended since the system may
face with inrush current, high reactive current fed on capacitor at the
fundamental frequency, possible resonance phenomenon at the grid side,
etc. If a system is connected to the grid via LC-filter, the resonant
frequency is changed due to grid impedance over the time [55]. The
cost and the reactive power consumption of the LC-filter are more than
to the L-filter because of the addition of the shunt element.
The resonant frequency of LC-filter can be calculated as follows:
- 55 -

f res =

1
2p Li C f

(3.1)

- Thirdly, LCL-filter produces better attenuation (-60dB/decade) at


the inverter switching frequency when compared with the previous
filter topologies. LCL-filter can provide not only a better decoupling
between filter and grid impedance but also a good attenuation ratio
even with small L and C values. A lower ripple current distortion across
the grid-side inductor since the current ripple is reduced by the
capacitor. However, the three-order LCL-filter design has to consider
various constraints, such as the resonance phenomenon, the current
ripple through inductors, the total impedance of the filter, the current
harmonics attenuation at switching frequency and the reactive power
absorbed by capacitor, etc.
With low inductance on the inverter side, it is difficult to comply
with IEEE519 standards without an LCL filter. An LCL filter can
achieve reduced levels of harmonic distortion with lower switching
frequencies and with less overall stored energy. On the other hand the
LCL filter may cause both dynamic and steady state input current
distortion due to resonance.
Key advantages of the LCL-filter are:
- Low grid current distortion and reactive power production;
- Attenuation of -60dB/decade for frequencies in excess of the
resonance frequency;
-

Possibility of using a relatively low switching frequency for a

given harmonic attenuation.

- 56 -

Bode diagram of Plant

Gain(dB)

50

-50

-100
0
10

10

10

10

10

10

10

-89
Phase(deg)

L
-89.5
-90
-90.5
-91
0
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 3.2 Frequency response of L-filter

Bode diagram of Plant

Gain(dB)

50
0

-50

-100
0
10

10

10

10

10

10

10

Phase(deg)

200
LC no damp
LC damp

100
0
-100
-200
0
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 3.3 Frequency response of LC-filter with and without damping

- 57 -

Bode diagram of Plant


50

Gain(dB)

0
-50
-100
-150
0
10

10

10

10

10

10

10

Phase(deg)

100
LCL no damp
LCL damp

0
-100
-200
-300
0
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 3.4 Frequency response of LCL-filter with and without damping

Fig. 3.5 LCL-filter


(a) Equivalent circuit diagram
(b) LCL-filter modeling

- 58 -

The resonant frequency of LC-filter can be calculated as follows:


f res =

1
2p

Li + Lg
Li Lg C f

(3.2)

The frequency responses of L-filter, LC-filter and LCL-filter are


shown in Fig. 3.2 ~ Fig. 3.4, respectively.
In this chapter, a theoretical analysis and design procedure of output
LCL-filter for single-phase grid-connected PV inverter system is
presented. Due to the theoretical analysis, a comparative analysis
between the designed LCL-filter with L-filter and LC-filter based
single-phase grid-connected PV inverter system is carried out The
simulation and experimental comparison results are given to validate
the theoretical analysis and to show the effectiveness of filter design
methodology.

3.2 Low-pass Output LCL-Filter Analysis and Design


The LCL-filter equivalent circuit diagram is shown in Fig.3.5 (a) and
its equivalent model is shown in Fig.3.5 (b), where Vi and Vg are
inverter and grid voltage; Li, Lg, Ri, Rg are the filter inverter-side and
grid-side inductor and its equivalent resistors, respectively. A damping
resistor Rd for avoiding resonance phenomenon is in series with
capacitor Cf.
Based on the equivalent model of LCL-filter and adopting the
Masons rule, the transfer function of LCL filter using the inverter
current as feedback can be derived as (3.3). Equation (3.4) is obtained

- 59 -

when Ri and Rg are assumed to be small enough for neglecting.

Rd C f s + 1
ig(s)
GLCL(s) =
=
vi(s) d s3 + d s 2 + d s + d
3
2
1
0

(3.3)

where
d 3 = Li L g C f

(3.3.a)

d 2 = Li R g + L g Ri + Li + L g C f

(3.3.b)

d1 = Li + L g + Ri Rd + R2 Rd + Ri R g C f

(3.3.c)

d 3 = Ri + R g

(3.3.d)

Rd C f s + 1
ig(s)
GLCL(s) =
=
vi(s) L L C s3 + L + L R C s 2 + L + L s
g d f
g
i g f
i
i

(3.4)

The resonant frequency of LCL-filter is calculated as (3.2) and the


frequency response of LCL-filter based on transfer function (3.4) is
illustrated in Fig. 3.4. As shown in (3.4), the LCL-filter has two more
zeros and two more poles when compared to a simple L-filter. If the
transfer function in (3.4) is discretized and the PI controller is used,
these additional zeros and poles can make the system unstable. This
problem can be solved by using proper damping. The simple way is
connecting a resistor in series with the filter capacitor as shown in Fig.
3.1(c), Fig. 3.5 (a) and the model of LCL-filter of Fig. 3.5 (b). The
damping resistor moves the unstable pole more inside the stability area.
The task of LCL-filter is to reduce the ripple and the high-order
harmonic components on the grid current, but a weak design can make
- 60 -

the filter has a lower attenuation ratio than expected. Moreover, a weak
design can increase the distortion caused by the oscillation. In the real
application, the harmonic components of inverter output current may
cause the saturation of filter resonance. Hence, the filter design must
consider about the inverter output current ripple and the damping
component should be used to avoid the resonance. However, the
damping is limited by the filter inductance value, losses and filter
performance reduction.
To design the LCL-filter, some limits on the parameters values have
been studied in [49] and are revised as follows:
a) The total inductance should be less than 0.1 (p.u) to limit the ac
drop voltage during operation. Otherwise, a higher dc-link voltage
will be required and this results in higher switching losses.
b) The capacitance is limited by the reactive power factor (less
than 5%).

c) The resonant frequency should be in range 10 0 res sw


2
to avoid resonance problems in the lower and upper parts of the
harmonic spectrum, where w0 is the utility frequency (rad/s), wres is
the resonant frequency (rad/s) and wsw is the switching frequency
(rad/s).
d) The damping element losses cannot be so high as to reduce
system efficiency.
e) Other constraints should be taken into account such as: The
filter efficiency at low frequency (first 50 harmonics) and around the
switching frequency; the current tracking capability.
And some assumptions are given for single-phase LCL-filter design

- 61 -

procedure such as follows:


- The switching frequency is much higher than the utility grid
frequency.
- The utility grid voltage is ideal sinusoid.
- The system has unity power factor
- The unipolar PWM is adopted
To verify the filter effectiveness, the following performance factors
are also used:
2
I (h)

- The THD of the current THD =


- The power factor PF =

h
I (1)

I (1)
cos (j ) .
I

- The average of the absolute dc voltage error.


- The maximum sideband current harmonics around the switching
frequency.
- The rms value of current harmonic components at switching
frequency
The following sub-sections will present the whole procedure of
LCL-filter design.
3.2.1 Ripple current analysis and filter inductance calculation
Fig. 3.6 (a) describes a single-phase grid-connected PV inverter
using full-bridge topology. For a simple analysis, the fundamental
component of grid current is assumed to be zero. Hence, the
fundamental component of the filter inductor voltage is also zero:

- 62 -

V L = Vin - V g = 0

(3.5)

where VL is inductor voltage, Vin is the output inverter voltage and


Vg is the grid voltage.
By adopting unipolar PWM method, the inverter output voltage Vin
has three-step values: Vdc, 0 and Vdc, where Vdc is the dc-link voltage.
Fig. 3.7 shows the output voltage and current waveform of singlephase full-bridge inverter. Because the switching frequency fsw is
higher than the grid frequency f0, the time average value of the inverter
output voltage Vav can be considered as constant during the switching
time Ts. Hence, the filter inductor current of grid-connected singlephase full-bridge inverter during any switching period has a typical
waveform as shown in Fig. 3.7 (b). In this case, the peak-to-peak value
of the filter inductor current when using unipolar PWM switching
method can be obtained as:
V -Vav d1
I pp = 2I m = dc
T
L
2 s

(3.6)

where Ipp and Irpm are the peak-to-peak value and maximum value of
filter inductor current ripple, respectively; Vdc is the dc-link voltage;
Vav is the average value of inverter output voltage; L is the filter
inductance value; d1 is the duty cycle and Ts is the switching time.
During the interval of 0<wt<p:
V av (wt ) = d1 (wt )V dc

(3.7)

- 63 -

d1(wt ) = ma sin (wt )

(3.8)

where ma is modulation index


Hence, (3.6) can be expressed as follows:

V Ts
I rpm = dc 1 - d (wt ) d1(wt )
1
4L

V Ts
= dc 1 - m a sin (wt ) m a sin (wt )
4L

(3.9)

From (3.9), we can calculate the total filter inductance with the
known modulation index ma and the chosen maximum current ripple
value as shown in (3.10):

V Ts
L = dc
1 - m sin (wt ) m sin (wt )
a
a
4 I rpm

(3.10)

To simplify the analysis, the average inverter output voltage, the grid
voltage and duty cycle are assumed to be constant during the switching
time Ts. Hence, (3.10) can be rewritten as follows:

V Ts
L = dc
1 - ma m a
4 I rpm

(3.11)

The maximum value of filter inductor current can be calculated as


follows:
I rpm = D rpm I rated

(3.12)

- 64 -

(a)

(b)
Fig. 3.6 Single-phase grid-connected full-bridge PV inverter using LCL-filter
(a) Equivalent circuit
(b) Equivalent block diagram of current control

Fig. 3.7 Output voltage and current waveforms of single-phase full-bridge


inverter

- 65 -

Fig. 3.8 Equivalent circuit of LCL-filter when considering fundamental and


switching harmonic components

Fig. 3.9 Equivalent circuit of LCL-filter when considering only switching


harmonic component

- 66 -

where Drpm is the maximum current ripple percentage (normally, Drpm


is chosen in a range of 0% ~ 25%) and Irated is the rated current of
system.
3.2.2 Current attenuation ratio
By adding a capacitor, the total filter inductance is divided into two
parts: the inverter-side inductance Li and grid-side inductance Lg. The
following analysis is based on the equivalent circuit of single-phase
VSI. Fig. 3.8 shows the equivalent circuit of LCL-filter with
fundamental and switching harmonic voltage components. However,
the task of LCL-filter is to attenuate the harmonic components at
switching

frequency.

Thus,

only

switching

harmonic

voltage

component is taken into account when designing LCL-filter and is


illustrated in Fig. 3.9.
Suppose that the total filter inductance L, inverter-side inductance Li,
grid-side inductance Lg and the capacitance Cf of LCL-filter have the
following relationships at switching frequency:
L = Li + L g

(3.13)

Li = aLg

(3.14)

Li =

a
a
L ZL =
Z
i a +1 L
a +1

(3.15)

Lg =

1
1
L ZL =
Z
g a +1 L
a +1

(3.16)

ZC

= - rZ L

(3.17)

where Z L , Z L , Z L , Z C are the impedances of total filter


g
i
f

- 67 -

inductor, inverter-side inductor, grid-side inductor and capacitor


impedance, respectively; a is the inductance ratio between inverter-side
and grid-side inductances (a1); r is the ratio between grid-side
inductor and capacitor impedances.
The inductance ratio can be calculated by using the harmonic current
attenuation ratio at switching frequency [49][57], where the harmonic
current attenuation ratio is defined as the ratio between the grid current
and the inverter output current.
The current flows through the total filter inductor at switching
frequency can be obtained as follows:
V
i L = sw
ZL

(3.18)

The current flows through the inverter-side inductor ii and through


the grid-side inductor ig are calculated as (3.19) and (3.20), respectively:

ii =

Vsw
Z L + Z Lg || Z C
i
f

(3.19)

||
Z
C ii
Lg
f

ig =

ZL

(3.20)

Substituting (3.15) ~ (3.17) into (3.19) and (3.20):

- 68 -

ii =

Vsw
a
r

Z L +
Z
a +1
r -1 L g

Vsw
a
r 1

Z L +

Z
a +1
r - 1 a + 1 L

(a +1)(r -1) Vsw i = (a + 1)(r -1) i


a(r -1) + r Z L a(r - 1) + r L
L

ig =

r
i

Z
r -1 Lg i

ZL

(3.21)

r
r (a + 1)(r - 1)
i
i i =

r -1
r - 1 a (r - 1) + r L

(a + 1)r i
a (r - 1) + r L

(3.22)

Hence, from (3.22), the harmonic current attenuation ratio at


switching frequency can be defined as follows:

s=

ig
iL

(a +1)r
a(r -1) + r

(3.23)

The parallel equivalent impedance Z Lg || Z C should be capacitive


f
in order to suppress the harmonic current at switching frequency; hence,
the ig and iL are in opposite direction. Then the attenuation ratio
becomes:

s =

ig
iL

(a + 1)r
a (1 - r ) - r

(3.24)

The harmonic current attenuation ratio should be chosen to avoid the

- 69 -

resonance phenomenon caused by LCL-filter by considering the


following condition:

100 res sw
2

(3.25)

where w0 is the grid frequency (rad/s), wres is the resonant frequency


(rad/s), wsw is the switching frequency (rad/s).
From (3.24), we can get:

a=

(s + 1)r
s (1 - r ) - r

(3.26)

From (3.17), at switching frequency:


1
jw swC f

= - jw sw L g r L C =
g f

1
2
rw sw

1
1
LC f =
2
a +1
rw sw

LC f =

a +1
2
rw sw

(3.27)

The resonant frequency from (3.2) can be rewritten as follows:

2 =
w res

Li + L g
Li L g C f

(3.28)

Substituting (3.13), (3.15) and (3.16) into (3.28):

- 70 -

(a + 1)2
L
=
w2 =
res a 1 2
aLC
f

L C f
a + 1 a + 1

(3.29)

Substituting (3.26) and (3.27) into (3.29), we can get:

2 =
w res

2
sw sw

(3.30)

1+s

Substituting (3.30) into (3.25), we can get:


2
sw
2
2
1000 res sw
100 res
2
4
2
2
2
sw
100
sw
0 1+
4

(3.31)

By adopting the grid frequency w0 = 2pf0 (f0 = 60 Hz) and switching


frequency wsw = 2pfsw (fsw = 10 kHz), we can get the limits of current
harmonic attenuation ratio as (3.32):
0.0036 s 0.33

(3.32)

3.2.3 Capacitance calculation


The reactive power absorbed by filter capacitor can be calculated as
follows:

- 71 -

Qre = aPrated =

2
V rated
ZC

2
= V rated
w0C f

(3.33)

where Qre is the reactive power absorbed by filter capacitor; Prated is


the rated power; a is the reactive power percentage; w0 is the grid
frequency (rad/s), Z C is the capacitor impedance, Cf is the filter
f
capacitance.
Generally, the reactive power absorbed by filter capacitor should be
less than 5% of rated power to avoid of increasing power factor. Hence,
the reactive power percentage should be chosen in a range of 0% ~ 5%.
The filter capacitance Cf can be determined from (3.33):

Cf =

aPrated
Qre
=
2
2
w0Vrated
w0Vrated

(3.34)

As shown in (3.34), the higher capacitance, the more reactive power


flows into capacitor. This will increase the demanded currents from
filter inductor and switches; hence the overall filter inductor current
will be increased. The system efficiency will be low as a result of
aforementioned problem. But the capacitance cannot be too small
because a large inductance causes a high voltage drops across the filter
inductor.
3.2.4 Inductance ratio
To avoid the high current ripple in the inverter-side inductor Li,

- 72 -

which degrades the whole system stability, it is necessary to prevent


excess decrease of the total equivalent impedance not less than a half of
equivalent impedance using L-filter, with the same filter inductance
value. Hence, the inductance ratio must greater than or equal 1.
From (3.27), we can get:

Cf =

a +1
2 L
rwsw

(3.35)

Substituting (3.35) into (3.33), we can get:


2
2 w a + 1 r = Vrated w 0
aPrated = Vrated
0 2
2
a + 1 aP
rwswL
rated w sw L

From hereby, we assign x =

r
r = (a + 1)x
a +1

(3.36)

(3.37)

Substituting (3.37) into (3.24), we can get:

(1 + s )a 2 + 2 + 2s - s a + (1 + s )a = 0

(3.38)

The inductance ratio can be obtained by solving (3.38) with


consideration of (3.37) and (3.32).
The inverter-side and grid-side inductances can be obtained as (3.15)
and (3.16), respectively.
3.2.5 Damping resistance calculation
At the resonant frequency the filter impedance is zero. Hence, the
- 73 -

aim of the damping is to insert an impedance at resonant frequency to


avoid the fluctuation caused by resonant frequency. A resistor which is
connected in series with filter capacitor can be considered as a passive
damping must be sufficient to avoid oscillation, but losses cannot be so
high as to reduce efficiency [46]. Hence, the damping value is set to a
similar order of magnitude as the series capacitor impedance at the
resonant frequency [58] as shown in (3.39).

1
Rd = Z C =
w res C f
f

(3.39)

3.2.6 LCL-filter design procedure summary


The LCL-filter design procedure for single-phase grid-connected
VSI is illustrated in Fig. 3.10 and is shortly explained as following stepby-step process:
1) Select the desired maximum current ripple on the filter inductor.
Then, the total filter inductance can be obtained using the
maximum current ripple at the switching frequency. If the total
inductance does not respect condition a), another maximum
ripple percentage should be chosen
2) Choose a suitable reactive power ratio percentage with condition
b) consideration, then the reactive power is absorbed by filter
capacitor can be calculated at rated conditions. Thus, obtain the
filter capacitance value.
3) After choosing the required current ripple attenuation ratio at
switching frequency due to the condition c) above, the

- 74 -

inductance ratio between the inverter-side and the grid-side


inductances can be calculated. Then, the value of inverter-side
and grid-side inductances can be obtained.
4) Verify the resonant frequency to satisfy condition c). If this is
not correct, the maximum current ripple percentage or the
reactive power percentage or the current ripple attenuation
should be changed.
5) Set the damping according to condition d) above to avoid
oscillation.
6) Verify the filter attenuation with other switching frequencies.

3.3 Comparative Analysis of Filter Topologies for SinglePhase Grid-Connected PV VSI


3.3.1 LCL-filter parameters calculation
The block diagram of single-phase grid-connected PV VSI system
using output LCL-filter is shown in Fig. 3.6 (a), where the system
parameters are listed in Table 3.1 and the designed LCL-filter
parameters are listed in Table 3.2. The VSI system is connected to the
grid through an isolation transformer (220V/170V) for security
purposes. Based on the design procedure, the LCL parameters can be
calculated as follows:
a) By adopting the maximum current ripple percentage Drp = 10%,
the maximum current ripple Irpm is 1.928 (A) by using (3.12).
The total filter inductances L is 0.830 (mH) by using (3.11).
b) The reactive power Qre is 150 (W) by using (3.33) with reactive

power percentage a is 5%. The filter capacitance Cf is 8.2 (mF)


- 75 -

Fig. 3.10 LCL-filter design flow chart

- 76 -

Table 3.1
VSI system parameters
Specifications

Value

Rated power Prated

3 (kW)

Dc-link voltage Vdc

400 (V)

Rated grid voltage Vg (rms)

220 (V)

Rated grid current Ig (rms)

13.64 (A)

Grid frequency f0

60 (Hz)

Switching frequency fsw

10 (kHz)

Switching period Ts

100 (ms)

Modulation index ma

0.8

Table 3.2
Designed LCL-filter parameters
Specifications

Value

Reactive power percentage a

0.5%

Maximum ripple percentage Drp

10%

Total inductance L

0.830 (mH)

Inverter-side inductance Li

0.481 (mH)

Inverter-side inductance Lg

0.348(mH)

Capacitance Cf

8.2 (mF)

Damping resistance Rd

4.95 (W)

Resonant frequency fres

3.9 (kHz)

- 77 -

by using (3.34).
c) With x is 0.04 from (3.36) and (3.37), we choose the switching
current ripple attenuation ratio s is 0.18 based on (3.32). Then
substituting x and s into (3.38), we can get the inductance ratio a
is 1.38.
d) The inverter-side inductance Li and grid-side inductance Lg can
be obtained as 0.481(mH) and 0.348(mH) by using (3.15) and
(3.16), respectively.
e) Finally, using (3.39), we can get the damping resistance Rd is
4.95(W).
3.3.2 Comparative analysis of filter topologies
To compare L-, LC- and LCL-filter, the same inductance,
capacitance and resistance are chosen and used in the same singlephase grid-connected VSI system. Hence:
- L-filter has the filter inductance L is 0.830 (mH).
- LC-filter has the filter inductance L is 0.830 (mH), the filter
capacitance is C = 8.2 (mF) and the damping resistance Rd is
4.95(W). The resonant frequency is 1.93 (kHz).
- LCL-filter parameters are in Table 3.2
The purpose of our task is to comparative analyze the performance
of filter topologies, so the PI controller (the transfer function is
expressed in (2.1) is adopted because of a simple analysis and
implementation.
Assuming the switching frequency is high enough to neglect the
inverter dynamics, the PWM inverter can be represented by a constant
gain for simplicity of analysis (due to relatively high switching
- 78 -

frequency). However, in our analysis, the PWM inverter dynamic


response is expressed as follows:

G i (s) = e

-Td s -1.5Ts s

=e

1
1 + 1.5Ts s

(3.40)

where Td is the delay period and Ts is the switching period.


The transfer function of LCL-filter is expressed in (3.4) in case of
neglecting the equivalent resistances of inverter-side and grid-side
inductors. The transfer function of L-filter is expressed in (3.41) for
either case of sensing inverter current or grid-current:

G f (s ) =

1
Ls

(3.41)

Without considering the grid impedance, the LC-filter transfer


function is expressed in (3.42) for sensing inverter-side current and in
(3.43) for sensing grid-side current at switching frequency, respectively:

G f (s ) =

1
Ls

(3.42)

G f (s ) =

Rd C f s + 1
1
Ls LC s 2 + R C s + 1
d f
f

(3.43)

By considering the grid impedance, the LC-filter acts as LCL-filter


with the resonant frequency is changed due to the grid impedance [59].
The LCL-filter transfer function is expressed in (3.4) for grid-side
- 79 -

current sensing and in (3.44) for inverter-side current sensing,


respectively:
Lg C f s 2 + Rd C f s + 1
G f (s) =
Li Lg C f s 3 + Li + Lg Rd C f s 2 + Li + L g s

(3.44)

The frequency responses of filter topologies are shown in Fig. 3.11


in case of inverter-side current sensing and in Fig. 3.12 in case of gridside current sensing, respectively. Fig. 3.11 and Fig. 3.12 show the
frequency response of filters in case of considering grid impedance
(0.1mH).
In case of inverter-side current sensing, LC- and LCL-filter have the
same bandwidth with L-filter, but a higher attenuation at switching
frequency. In case of grid-side current sensing, LC- and LCL-filter
make a phase lead when compared with L-filter. In the other words, LC
and LCL-filters act as L-filter in low frequency range and have a better
response than L-filter above the switching frequency. The oscillation at
resonant frequency can be mitigated by using the appropriate damping.
The current control block diagram of single-phase grid connected
PV VSI system is shown in Fig. 3.6 (b). Based on the frequency
responses of filters, shown in Fig. 3.11 and Fig. 3.12, in case the LCL
filter is not integrated in the system, the inverter-side current sensing is
usually adopted. The current sensor position could lead to different
values of power factor, which is crucial in these kinds of applications
due to national codes, and to different ratings of the converter [60].
Generally, to sense the current on the grid side improves the stability

- 80 -

margin of the system [61].


However, in general, the use of an LCL filter makes the current
control unstable if a proper damping is not adopted. This is due to the
fact that the LCL filter introduces two resonant poles in the current loop
at a frequency equal to the resonance frequency [59].
The transfer function of the control loop can be obtained as follows:
v By using L-filter:
Open loop:

Gop(s) =

K p s + Ki

(3.45)

LTd s 3 + Ls 2

Closed loop:
Gcl (s) =

K p s + Ki
LTd s 3 + Ls 2 + K p s + K i

(3.46)

v By using LC-filter with grid-impedance consideration and LCLfilter:


Open loop:
K p L g C f s 3 + K p Rd C f + K i L g C f s 2 + K p + R d C f K i s + 1

Gop (s) =
5
4
3
2
d5s + d 4 s + d3s + d 2 s

(3.47)
where
d5 = Td Li Lg C f

(3.47a)

- 81 -

Bode plot (L-, un-damped LC-, damped LC-, un-damped LCL- and damped LCL filter)
50

Gain(dB)

-50

-100
0
10

10

10

10

10

10

10

100
L
un-damped LC
damped LC
un-damped LCL
damped LCL

Phase(deg)

50
0
-50
-100
0
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 3.11 Frequency responses of filters in case of inverter-side sensing


Frequency responses of filters
50

Gain(dB)

0
-50
-100
-150
1
10

Phase(deg)

100
0

10

10

10

10

10

L
LC no damp
LC damp
LCL no damp
LCL damp

-100

-200
1
10

10

10
10
Frequency (Hz)

10

10

Fig. 3.12 Frequency responses of filters in case of grid-side sensing

- 82 -

Frequency responses of open-loop control system

Gain(dB)

50
0

-50

-100
1
10

L
undamped-LC
damped-LC
undamped-LCL
damped-LCL
2

10

10

10

10

10

Phase(deg)

200
100
0
-100
-200
1
10

10

10
10
Frequency (Hz)

10

10

Fig. 3.13 Frequency responses of open-loop system using difference filters in


case of grid-side sensing
Frequency responses of closed-loop control system
20

Gain(dB)

0
-20
-40
-60
-80
1
10

L
undamped-LC
damped-LC
undamped-LCL
damped-LCL
2

10

10

10

10

10

50
Phase(deg)

0
-50
-100
-150
-200
1
10

10

10
10
Frequency (Hz)

10

10

Fig. 3.14 Frequency responses of closed-loop system using difference filters


in case of grid-side sensing

- 83 -

2.5

L filter based system

x 10

2
1.5

Imaginary Axis

1
0.5
0
-0.5
-1
-1.5
-2
-2.5
-4000

-3500

-3000

-2500

-2000

-1500

-1000

-500

500

Real Axis

Fig. 3.15 Root locus of closed-loop system using L-filter in case of grid-side
sensing

1.5

x 10

Un-damped LC filter based system

Imaginary Axis

0.5

-0.5

-1

-1.5
-2

-1.5

-1

-0.5

Real Axis

0.5

1.5
x 10

Fig. 3.16 Root locus of closed-loop system using un-damped LC-filter in case
of grid-side sensing

- 84 -

1.5

Damped LC filter based system

x 10

Imaginary Axis

0.5

-0.5

-1

-1.5
-3.5

-3

-2.5

-2

-1.5

-1

-0.5

Real Axis

0.5
x 10

Fig. 3.17 Root locus of closed-loop system using damped LC-filter in case of
grid-side sensing

x 10

Un-damped LCL filter based system

0.8
0.6

Imaginary Axis

0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1
-10000

-8000

-6000

-4000

-2000

2000

4000

6000

8000

Real Axis

Fig. 3.18 Root locus of closed-loop system using un-damped LCL-filter in


case of grid-side sensing

- 85 -

1.5

Damped LCL filter based system

x 10

Imaginary Axis

0.5

-0.5

-1

-1.5
-20000

-15000

-10000

-5000

5000

Real Axis

Fig. 3.19 Root locus of closed-loop system using damped LCL-filter in case
of grid-side sensing

- 86 -

All pass filter


I alpha

[Igrid ]

Igrid

From Igrid

I beta

[theta ]

vd cmd
ibeta

[theta ]

Theta

[Vpeak ]

v peak

vq cmd

v peak

From Vgrid

Vgrid

Theta

[m]

PWM Generator

Vcmd

Signal(s) Pulses
A

Current control

[Vgrid ]

theta

ialpha

[Vpeak]
[theta ]

Command Voltage
Generator

[Vdc]

g
+
-

Igrid
A

Single phase PLL

IGBT Inverter

Filter

A1

B1

Grid voltage
Grid voltage

[Igrid ]

DC
Voltage
Source

[Vgrid ]
Vgrid

Grid current
Grid current

[PWM]
PWM

PWM voltage

Current & Voltage


Measurement
[theta ]

Theta

Scope

Fig. 3.20 The simulation model of 3kW single-phase grid-connected PV VSI system using Matlab/Simulink

- 87 -

Fig. 3.21 Simulation inverter and grid current waveforms


(a) inverter current and (e) its zoomed in
(b) grid current using L-filter and (f ) its zoomed in
(c) grid current using LC-filter and (g) its zoomed in
(d) grid current using LCL-filter and (h) its zoomed in

- 88 -

Selected signal: 5.999 cycles. FFT window (in red): 2 cycles


5
0
-5
0

0.01

0.02

0.03

0.04

0.05
Time (s)

0.06

0.07

0.08

0.09

Fundamental (60Hz) = 6.595 , THD= 11.95%


7
6

(a)

Mag

5
4
3
2
1
0

500

1000
1500
Frequency (Hz)

2000

2500

Fig. 3.22 Frequency spectrum analysis of inverter current

Selected signal: 5.999 cycles. FFT window (in red): 2 cycles


5
0
-5
0

0.01

0.02

0.03

0.04

0.05
Time (s)

0.06

0.07

0.08

0.09

Fundamental (60Hz) = 6.559 , THD= 9.02%


7
6

Mag

(b)

4
3
2
1
0

500

1000
1500
Frequency (Hz)

2000

2500

Fig. 3.23 Frequency spectrum analysis of grid current using L-filter

- 89 -

Selected signal: 6 cycles. FFT window (in red): 2 cycles


5

0
-5
0

0.01

0.02

0.03

0.04

0.05
Time (s)

0.06

0.07

0.08

0.09

Fundamental (60Hz) = 6.23 , THD= 5.16%


7
6

(c)

Mag

5
4
3
2
1
0

500

1000
1500
Frequency (Hz)

2000

2500

Fig. 3.24 Frequency spectrum analysis of grid current using LC-filter

Selected signal: 6 cycles. FFT window (in red): 2 cycles


5

-5
0

0.01

0.02

0.03

0.04

0.05
Time (s)

0.06

0.07

0.08

0.09

0.1

Fundamental (60Hz) = 6.013 , THD= 3.79%


7
6

(d)

Mag

5
4
3
2
1
0

500

1000
1500
Frequency (Hz)

2000

2500

Fig. 3.25 Frequency spectrum analysis of grid current using LCL-filter

- 90 -

Grid voltage

Inverter voltage

Inverter current

Fig. 3.26 Grid voltage, inverter voltage and current waveforms

Grid current
(using L-filter)

Inverter current

Fig. 3.27 Inverter current and grid current using L-filter waveforms

- 91 -

Inverter current

Grid current
(using un-damped LC-filter)

(a)

Inverter current

Grid current
(using damped LC-filter)

(b)
Fig. 3.28 Inverter current and grid current using LC-filter waveforms
(a) without damping
(b) with damping

- 92 -

Inverter current

Grid current
(using un-damped LCL-filter)

(a)
Inverter current

Grid current
(using damped LCL-filter)

(b)
Fig. 3.29 Inverter current and grid current using LCL-filter waveforms
(a) without damping
(b) with damping

- 93 -

THD = 10.4%

Fig. 3.30 Frequency spectrum of inverter current

THD = 9.7%

Fig. 3.31 Frequency spectrum of grid current using L-filter

- 94 -

THD = 5.7%

(a)

THD = 5%

(b)
Fig. 3.32 Frequency spectrum of grid current using LC-filter
(a) without damping
(b) with damping
- 95 -

THD = 5.2%

(a)

THD = 4.6%

(b)
Fig. 3.33 Frequency spectrum of grid current using LCL-filter
(a) without damping resistor
(b) with damping resistor
- 96 -

d 4 = Li + L g Td Rd C f + Li Lg C f

(3.47b)

d3 = Li + Lg Td + Rd C f

(3.47c)

d 2 = Li + Lg

(3.47d)

Closed loop:
K p L g C f s 3 + K p Rd C f + K i L g C f s 2 + K p + Rd C f K i s + 1

Gcl (s) =
5
4
3
2
d 5 s + d 4 s + d 3 s + d 2 s + d1s + 1

(3.48)
where
d5 = Td Li Lg C f

(3.48a)

d 4 = Li + L g Td Rd C f + Li Lg C f

(3.48b)

d 3 = Li + L g Td + Rd C f + K p L g C f

(3.48c)

d 2 = Li + Lg + K p Rd C f + K i Lg C f

(3.48d)

d1 = K p + K i Rd C f

(3.48e)

It is noted that in case of LC-filter, the Lg in (3.47) and (3.48) is the


grid impedance, and in case of LCL-filter, Lg is the sum of the grid-side
filter inductance and the grid impedance.
As shown in Fig. 3.14, the peak of system resonant frequency is
reduced by using a suitable damping resistance. Increase the damping
resistance can depress the resonant peak but tends to reduce the
attenuation.
Fig. 3.15 ~ Fig. 3.19 shows the root locus diagrams of system using
- 97 -

L-filter, LC-filter without and with damping, LCL-filter without and


with damping, respectively. Without damping, the system using LCfilter and LCL-filter are on the boundary of stability. The system will
be moved into the stable region by using a suitable damping resistance.
Furthermore, the stability of closed-loop control is ensured with control
algorithm.

3.4 Simulation Results

The simulation model of 3kW single-phase grid-connected PV VSI


system using Matlab/Simulink is shown in Fig. 3.20. The parameters of
system and the designed LCL-filter are listed in Table 3.1 and 3.2.
The inverter current waveform is shown in Fig.3.21 (a) and the grid
currents using L-filter, LC-filter and LCL-filter are shown in Fig.3.21
(b), (c), (d) respectively. Fig.3.21 (e) ~ (h) are zoomed in from Fig.3.21
(a) ~ (d).
Fig.3.21 shows that with small inductance value, the L-filter cannot
eliminate the current ripples completely. By using a capacitor as a shunt
component, LC-filter and LCL-filter have good ripple mitigations.
Fig. 3.22 to Fig. 3.25 show the frequency analysis and THD values
of the inverter current and grid currents using L-filter, LC-filter and
LCL-filter, respectively. Using L-filter cannot reduce the harmonics as
well as using LC-filter or LCL-filter in single-phase grid-connected PV
VSI system.

- 98 -

3.5 Experimental results

As illustrated in Fig. 3.26, channel 1 shows the grid voltage,


channel 2 shows the inverter output voltage and the inverter output
current is shown at channel 3, respectively. Fig. 3.27 shows the
comparison between the inverter current (channel 3) and the grid
current using L-filter (channel 4). It is easy to see that the grid current
is almost same as inverter current, thus the L-filter does not reduce the
ripple.
Fig. 3.28 shows the comparison between the inverter current and
grid current using LC-filter in both with and without damping resistor
cases. LC-filter can mitigate the current ripple better than L-filter does;
however, without damping resistor, the oscillation occurs.
The comparison between the inverter current and grid current are
shown in Fig. 3.29. Similar to the LC-filter case, the oscillation occurs
without using damping resistor.
Fig. 3.30 ~ Fig. 3.33 show the frequency spectrums of inverter
current, grid current using L-filter, using LC-filter and using LCL-filter,
respectively. As shown in these figures, the LCL-filter has a better
harmonic mitigation at switching frequency compared with L-filter and
LC-filter.
Thus, simulation and experimental results verified that by using the
LCL-filter, the grid current has a better ripple elimination and harmonic
mitigation compared with L-filter and LC-filter. Furthermore, the
damping resistor has no effect on the ripple reduction as well as
harmonic mitigation but on the oscillation reduction.

- 99 -

3.6 Conclusions

A LCL-filter design process for single-phase grid-connected PV VSI


system has been described. The filter design considers on the
constraints of parameter determinations and the overall process can be
done by step-by-step equations solving. The design procedure ensures
that the parasitic of the filter components are kept as low as possible.
And a feature comparison of LCL-filter with L-filter and LC-filter has
been investigated and its result shows that the LCL-filter has a better
effective performance than the others in case of the same inductance,
capacitance and damping resistance values. Furthermore, the used
methodology in this paper can be extended to three-phase and applied
to such distributed generation application as micro-turbine, fuel cell,
wind power, etc.

- 100 -

Chapter

Dead-Time Compensator for SinglePhase Grid-Connected PV Inverter

4.1 Introduction
In recent years, the techniques developed for voltage-fed dc/ac
PWM inverter has gained wide attention, where the switching devices
such as IGBT, MOSFET and others have very high switching
frequency above tens of kilohertz are normally used. Since the
switching device has a finite switching time, a blank-time (or normally
called dead-time) must be inserted into the PWM gating signals in order
to avoid the conduction overlap of two switching devices in the same
leg. This dead-time causes the phase error, output voltage distortions
and fundamental voltage drop [62],[63],[65], which degrade the control
performance and hence, may cause the power loss during generation
process.
In order to overcome these problems caused by dead-time effect,

- 101 -

various approaches have been presented [64]-[70]. The DTCV was


introduced in [64] and is calculated by averaging the error between the
ideal inverter output voltage and the real inverter output voltage.
Although this method is easy to use because only dead-time and dc-link
voltage are needed, it cannot compensate the on-voltages effects. In
[65], a DTCT was introduced. The DTCT consists of turn-on/off times,
on-voltages components and dead-time. Because DTCT is unknown, it
is identified with an adaptive identification process in advance. Then
the identified DTCT is adopted for the dead-time compensation method.
However, the identified DTCT is not always valid because DTCT can
vary with the operating points.
To improve the quality of dead-time compensation, the other
adaptive dead-time compensation strategies have been studied. In [66],
because the DTCV magnitude depends on the peak phase current value,
this method needs a prepared loop-up table. Methods in [66]-[70] are
used for motor drives and not suitable for grid-connected applications,
where accurate motor parameter, tuning observer gains and load
condition, training data for DTCT and rotor angle are needed.
In this chapter, a new dead-time compensation strategy for singlephase grid-connected PV inverter bases on the single-frequency
harmonic extraction filter (SHEF) using adaptive least mean square
(LMS) algorithm for cancelling of single-frequency from signal which
is normally used in DSP is introduced. The conventional synchronous
PI controller is normally used and works in the synchronous reference
frame with the circular frequency of the harmonic component that
should be mitigated. Since the synchronous reference frame controllers
can be easily transformed and implemented in a stationary frame, their

- 102 -

original features from synchronous reference frame are preserved.


Hence, the harmonic components can be mitigated either in stationary
or synchronous reference frame. However, to avoid the coupling
problem occurred in synchronous reference frame, the compensator
should be adopted rather in stationary than in synchronous reference
frame.
A multi-SHEF based dead-time compensator (MSHEFDC) is
introduced as an additional part of regular current control part and is
used to mitigate the 3rd harmonic component in grid current caused by
dead-time, when the distributed energy system operates in gridconnected mode. With 10 kHz switching-frequency and 3ms dead-time
are chosen, theoretical simulation analysis is carried out and the current
control strategy integrated with MSHEFDC is fully implemented in a
32-bit fixed-point TMS320F2812 DSP based 3kW single-phase PV
inverter experimental prototype.

4.2 Dead-Time Effect Analysis[68][69]


The relationship between ideal and real inverter output voltage in
case of positive current direction is shown in Fig. 4.1, where Fig. 4.1
(a) shows the grid current Ig flow in positive direction (Ig > 0) and Fig.
4.1 (b) shows the inverter output voltage.
As shown in Fig. 4.1 (a), the grid current Ig flows through switching
device S1 during the on-switching-period of S1. Vice versa, Ig flows
through diode D2 during the off-switching-period of S1 and the deadtime period. It means that the inverter output voltage VAN during offswitching-period of S1 and during dead-time period has the same

- 103 -

characteristics.
The effect of dead-time on inverter output voltage is shown in Fig.
4.1 (b). Because of dead-time Td, the real inverter output voltage
becomes VAN,DT. If the finite turn-on (ton) and turn-off (toff) times of
switching device S1 are taken into account, the real voltage becomes
VAN,DT,ton/off. Furthermore, real inverter output voltage becomes
VAN,DT,ton/off,Vs/d, if considering the on-voltage VS dropped on switching
device and dropped voltage VD on the diode D2.
The relationship between ideal and real inverter output voltage in
case of negative current direction is shown in Fig. 4.2, where Fig. 4.2
(a) shows the grid current Ig flow in negative direction (Ig < 0) and Fig.
4.2 (b) shows the inverter output voltage. As shown in Fig. 4.2 (a), the
grid current Ig flows through diode D1 during the on-switching-period
of S1 and dead-time period. Vice versa, Ig flows through switching
device S2 during the off-switching-period of S1. It means that the
inverter output voltage VAN during on-switching-period of S1 is equal to
that of dead-time period. Fig. 4.2 (b) has the same analysis with that of
Fig. 4.1 (b), where the real inverter output voltage becomes VAN,DT
because of dead-time Td. If the finite turn-on (ton) and turn-off (toff)
times of switching device S2 are taken into account, the real voltage
becomes VAN,DT,ton/off. Furthermore, real inverter output voltage
becomes VAN,DT,ton/off,Vs/d, if considering the on-voltage VS dropped on
switching device and dropped voltage VD on the diode D1.

4.3 Conventional DTCV[68][69]


To compensate for non-linearity inverter effects due to dead-time,

- 104 -

turn-on/turn-off times and on-voltages, an average value of the error


voltage DV (=VAN,ideal VAN,DT,ton/off,Vs/d) during switching time Ts
should be inserted to the commanded PWM voltage. Since the
magnitudes of DV for both the current directions are the same with
opposite sign, the DTCV DV can be derived as:
T
D V = C V dc sgn( I g )
TS

(4.1)

where TC is DTCT, TS is switching period, Ig is the grid current, Vdc


is dc-link voltage and sgn() is sign function.
The DTCT can be calculated as follows:

TC = Td + ton - toff +

V AN ,on,aver
Vdc

TS

(4.2)

where Td is the dead-time, ton is the turn-on time, toff is the turn-off
time and VAN,on,aver is the average on-switching-period voltage.
The average on-switching-period voltage VAN,on,aver is:
1
T

V AN ,on,aver = S
1

TS

t V + t V for I > 0
g
on S off D
t V + t V for I < 0
g
off S on D

(4.3)

where VS and VD are the on-switching-period voltage dropped on


switching device and diode.

- 105 -

Fig. 4.1 Inverter output voltage in case of positive current flow (Ig > 0)
(a) Positive grid current flow
(b) Inverter output voltage waveforms

- 106 -

Fig. 4.2 Inverter output voltage in case of negative current flow (Ig < 0)
(a) Negative grid current flow
(b) Inverter output voltage waveforms

- 107 -

Fig. 4.3 Relationship between the grid currents sign and distorted voltage in
PWM inverter

- 108 -

4.4 Distorted Voltage and Current Caused by Dead-time


To simplify analysis, we assumed that the turn-on/turn-off times and
the dropped voltages on switching device and diode are small enough to
be ignored. The grid current and the distorted voltage caused by deadtime are shown in Fig. 4.3. By applying Fourier series, the single-phase
harmonic component of inverter output voltage Vinv(h) in case of squarewave distorted voltage is calculated as follows:
4V

1
Vinv(h) = dc
sin hw0t

p h=1,3,5,7... h

(4.4)

where Vinv(h) is the harmonic component of inverter output voltage,


Vdc is the dc-link voltage, h is harmonic order and w0 is the grid
frequency (rad/s).
Hence, the distorted voltage in Fig. 4.3 can be obtained as follows:

Vd =

4DV
1
sin hw0t

p h=1,3,5,7... h

4DV
p

( )

1
1

sin w0t + sin 3w0t + sin 5w0t + ...


3
5

(4.5)

The distorted voltages of the stationary reference frame can be


obtained as (4.6) and (4.7), where the d-axis voltage is the distorted

d and the q-axis voltage Vd is a virtual orthogonal phase


voltage Vds
qs
voltage, which is delayed 900 from the real one, is generated by using

- 109 -

an all-pass filter.

( )

d =
Vds

1
1
4DV

sin w0t + sin 3w0t + sin 5w0t + ...

p
3
5

d =
Vqs

4DV
p

( )

1
1

- cos w0t + 3 cos 3w0t - 5 cos 5w0t + ...

(4.6)
(4.7)

The compensation voltages of synchronous reference frame can be


obtained by using transformation matrix in (4.8):
V d cos(wt ) sin (wt ) V d
de =
ds
V d - sin (wt ) cos(wt ) V d
qe
qs

(4.8)

Hence,

d = 4DV 8 sin 4w t + 16 sin 8w t + ...


Vde

0 63
0
p 15

d =
V qe

(4.9)

4DV
2
2

cos 8w 0 t + ...
- 1 + cos 4w 0 t +
15
63
p

(4.10)

Similarly, the relative distorted current can be obtained as follows:

Id =

4D V
1
sin h w 0t - q

pZ p (h) h=1,3,5,7... h

[(

)]

(4.11)

where Zp(h) is the plant impedance related to the harmonic


components and q is related to the power factor.

- 110 -

To simplify the analysis, we assumed that the system has unity


power factor, hence q = 00. By applying the Fourier series, the relative
distorted current can be expressed as:

Id =

4D V
p

1
1

sin w 0t +
sin 3w0 t +
sin 5w0 t + ...
3Z p (3)
5Z p (5)
Z p (1)

( )

(4.12)
The relative distorted currents in stationary and synchronous
reference frames can be obtained as (4.13~ (4.16):

d =
I ds

4D V
p

1
1

sin w 0 t +
sin 3w 0 t +
sin 5w 0 t + ...
Z (1)
3Z p (3)
5Z p (5)

( )

(4.13)
d =
I qs

4 DV
p

1
1
1
cos w 0 t +
cos 3w0 t cos 5w 0 t + ...
3Z p (3)
5Z p (5)
Z p (1)

( )

(4.14)

d =
I de

4DV 8
16

sin 4w0 t + sin 8w0 t + ...

63
p 15

Iqe =

4DV
p

2
2

- 1 + 15 cos 4w0t + 63 cos 8w0t + ...

(4.15)
(4.16)

In (4.13) and (4.14), the distorted currents in the stationary reference


frame contain the 1st, 3rd, 5th and higher harmonic components caused
by dead-time. Similarly, the distorted currents of the synchronous
reference frame contain the 4th, 8th and higher harmonic components
caused by dead-time, as shown in (4.15) and (4.16). The dead-time

- 111 -

effect can be mitigated by the appropriately harmonic component


mitigation, either in stationary or in synchronous reference frame.

4.5 Adaptive Harmonics Extraction Filter


4.5.1 Single-frequency harmonic extraction filter
To track the unexpected harmonic component from a reference
signal, a single-frequency harmonic extraction filter (SHEF), as shown
in Fig. 4.4, is used. This adaptive frequency cancellation structure,
which is mostly used in digital signal processing for the noise
cancellation, was introduced in [71]-[73]. The principle of filter's
operation is revised as follows:
- The task of filter is to track the unexpected noise with already
known frequency (e.g. frequency 0) from the original signal dk,
which contains the desired signal and unexpected noises, during
the period t=kTs (where k is the discrete time index and T s is the
sampling time). Firstly, the noise is split into two orthogonal (sine
and cosine) components x sk and x ck . Then, these orthogonal
components are provided to the filter.
- Secondly, these two orthogonal components are fed to the LMS
algorithm for adaptation process. The outputs of adaptation
process are adaptation coefficients (or called weight functions)
w sk and w ck . After that, the orthogonal components ( x sk and x ck )

will be multiplied with their corresponding adaptation coefficients


( w sk and w ck ). After multiplying with their corresponding
adaptation coefficients,

these

- 112 -

orthogonal components

are

combined to be the adapted noise yk, which has the same


magnitude and phase with the noise component to be tracked in
the original signal dk. In other words, the noise component yk in
the original signal dk can be tracked out.
- Finally, the error k between the original signal dk and the tracked
noise yk is fed back to LMS algorithm for adaptation process. In
here, LMS algorithm adjusts the adaptive coefficients to force the
magnitude and phase of tracked noise yk exactly match with those
of unexpected noise component of original signal dk. This error k
can be calculated as (4.17)

e k = d k - y k = d k - xks wks + xks wks

(4.17)

The LMS algorithm is expressed as follows:


wk +1 = wk + 2 me k x k

(4.18)

where m is the adaption gain.


The adaptation gain m should be selected to be small for taking
enough (five or more) periods of harmonic component for weight
functions wk can reach the final values. One of the slow adaptation
results is attenuation of high frequency components from input ex to
propagate to the output wk of LSM algorithm.

- 113 -

Fig. 4.4 Single-frequency harmonic tracking filter

x c = cos( t)

wc
y

LMS
algorithm
ws

x s = sin( t)

G-1
p
Inverse
Plant

SHEF
i*
Regular
control

PI

Vc

Controller

VSHEF
Gp
Vd

Plant

Fig. 4.5 Integration of a SHEF and regular plant control part

- 114 -

Fig. 4.6 Mitigation of harmonic components from single-phase grid current by


using MSHEF

- 115 -

4.5.2 Combination of SHEF and regular plant control part


In case of mitigating the high-order harmonic components, some
assumptions should be made before integrating the SHEF with regular
control part. These assumptions ensure that there is no interaction
between the regular control part and SHEF, thus they can be analyzed
separately:
- The adaptation process of the filter is slow. Therefore, the SHEF
does not interfere with dynamics and does not alter the transfer
function of the plant and associated control.
- The harmonic component to be tracked by the filter has a high
frequency highly above the bandwidth of regular control.
- The current harmonic magnitude changes slowly to allow SHEF
adjusts the weight functions and eliminates the higher harmonic
components.
A simplified block diagram of SHEF and regular plant control
integration in synchronous reference frame is shown in Fig. 4.5. Since
the same structure is applied to both d and q reference axis component,
the subscript d and q are omitted from variable in the block diagram
and analysis. As shown in Fig. 4.5, the primary input d contains the
command voltage Vc created by current controller and the harmonic
distortion voltage component Vd with known frequency. The current is
the error signal and is fed back to the LMS algorithm for adaptation
process. To compensate the phase shift caused by the plant, the inverse
plant transfer function G -p 1 is integrated to the output of SHEF.
The objective is to eliminate undesired harmonic component from
plant output which is created by Vd. The elimination is accomplished

- 116 -

when output of the SHEF VSHEF is equal to the harmonic component Vd.

4.5.3 Multi single-frequency harmonic extraction filters


Fig. 4.6 shows the harmonics mitigations from the grid current by
using multi single-frequency harmonic extraction filter (MSHEF). The
3rd and kth (k = 5, 7, 9) harmonic components are tracked and
mitigated from the grid current by using the same filtering structure,
where the frequencies of reference signals must be equal to those of
harmonic components to be mitigated. The output of SHEFs will be
combined and integrated to regular control part.
If using the same error input e for LMS algorithm of different filters,
the tracked harmonic components may have the different magnitudes
when compared with the real harmonic components obtained from grid
current. Therefore, the different error signals ek will be used for
corresponding frequency to be tracked.
As shown in Fig. 4.6, the SHEF_1 is used to track the 1st harmonic
component (or the ideal fundamental component) from the grid current.
It is clearly to see that the ideal fundamental component acts as the
noise to be tracked and the grid current acts as the original signal,
which contains the fundamental and harmonic components. Although
this step is not necessary, however it helps to reduce the adaptation time
of tracking the other harmonic components. Since the ideal
fundamental component is tracked out of the grid current by using
SHEF_1, the output error of SHEF_1 contains only information of the
other harmonic components. Hence, this output error is used for
SHEF_k's

adaptation

process,

where

- 117 -

the

kth-order

harmonic

components are tracked for dead-time compensation.


The output error between the ideal fundamental component created
by the SHEF_1 and the real feedback grid current is also fed-forward to
compensate the distorted voltage.
To avoid the phase shift caused by the plant, an inverse plant
transfer function is added to the output of MSHEF.
It is noted that the reference input signals for extracting the
fundamental and harmonic components are created from PLL.
Furthermore, other harmonic components can be mitigated by applying
the same tracking structures, but with different frequencies which to be
mitigated. By using the same error input for multi-frequencies'
mitigations, the total process can have a faster adaptation speed and the
noises in other tracking filters are reduced.

4.6 Dead-Time Compensator For Single-phase GridConnected PV Inverter Based on MSHEF


Due to the limited bandwidth ( 1kHz), PI controllers are not able to
suppress the high frequency components from current feedback. In case
of high harmonic components mitigation from grid current, a dead-time
compensator using aforementioned MSHEF (MSHEFDC) is applied, as
shown in Fig. 4.7. Fig. 4.7 shows the integration between 1st and 3rd
harmonic components' tracking filters and control part by using
MSHEF. Since the same structure is applied to both d- and q-axis
components, the subscript d and q are omitted from variable in the
block diagram and analysis. Based on (4.13) and (4.14), the dominant
3rd harmonic component is chosen to be mitigated.

- 118 -

Fig. 4.7 Proposed dead-time compensator

Fig. 4.8 Single-phase PV inverter current control scheme with dead-time


compensator

Fig. 4.9 Injected voltage generation by MSHEFDC

- 119 -

Since the MSHEF can mitigate the selective harmonic components,


but it cannot completely compensate the lost voltage caused by deadtime. Hence, in the proposed MSHEFDC, the error between the grid
current and the ideal fundamental component created by SHEF_1 is
multiplied with the inverse plant transfer function and is feed-forward
as another compensating voltage component.
This injected voltage can be calculated as follows:

[ (

1
s s
s s
-1
-1
Ve _ ff = G p e 1 = G p (d - y1 ) = G p d - x1 w1 + x1 w1

)]

(4.19)

where G -p 1 is the estimated inverse plant transfer function.


Hence, the injected voltage for dead-time compensation can be
obtained as follows:

VMSHEFDC= VSHEF_ 3 + Ve _ ff

(4.20)

By integrating the MSHEFDC with regular current control part, the


proposed current controller is shown in Fig. 4.8, where the detail of
compensating voltages generation is shown in Fig. 4.9, respectively.
Due to the d-q rotating frame theory, in single-phase application, the daxis in stationary reference frame exactly matches with the real signal.
Therefore, to simplify the control structure, only d-axis component is
considered as shown in Fig. 4.8.
The dead-time compensation and harmonic elimination was done in
the stationary rather than the synchronous reference frame because of
- 120 -

avoiding the coupling problem in synchronous reference frame.


In case of need, the other harmonic components can be mitigated by
adding the same structure as 3rd harmonic component mitigation. The
frequencies of the reference signals must be equal to those of the
harmonic components to be eliminated.

4.7 Inverse plant transfer function analysis


As descript in [70], the weight functions w sk and w ck change slowly then
the variable in the system is essence of the adaptive algorithms. Hence,
the slowly changing of w sk and w ck can be assumed to be constant
during the sampling time Ts.
With this assumption, the plant transfer function in output signal of
MSHEF can act as a linear operator of sine and cosine inputs into the
combiner. Therefore, G -p 1 can be implemented as a linear combination
of sine and cosine functions from reference input. Thus, the dynamic
inverse plant model can be avoided direct implementation.
To illustrate the integration process, a low-pass output LC-filter is
used as a plant. At switching frequency, LC filter acts as an L-filter
when considering only the switching harmonic component. Therefore,
an equivalent L-filter is used replace LC-filter, which can be considered
as an inductance plant. The L-filter transfer function (or plant transfer
function):

G p ( s) =

1
R + sL

(4.21)

- 121 -

To simplify analysis, the ESR of inductor is ignored. Hence, the


transfer function in s-domain and in frequency-domain can be rewritten
as (4.22) and (4.23), respectively:

G p (s ) =

1
sL

G p ( jw ) =

(4.22)
1
jwL

(4.23)

It is noted that the location of the break point for the pole is located
at 0, which is all the way to the left of the graph. If inserting 0 in
for gives us an undefined value (which approaches negative infinity,
as the limit). Because there is a single pole at zero, the graph to the
right of zero (which is everywhere) has a slope of -20dB/decade and
passes through 0dB at:

w =1 L

(4.24)

Adopting L has a value of 4mH, then the slop of the line will pass
through 0dB at w = 250(rad/s) or f = 39.78Hz, as shown in Fig. 4.10.
Hence, the inverse plant transfer function can be rewritten in sdomain and in frequency-domain can be rewritten as (4.25) and (4.26),
respectively:
G -p 1 ( s ) = sL

(4.25)

1
Gp ( jw ) = jw L

(4.26)

- 122 -

As shown in Fig. 4.11, the frequency response of the inverse plant is


a slope of +20dB/decade, which approaches positive infinity as the
limit and passes through 0dB at w = 250(rad/s) or f = 39.78(Hz).
Based on the frequency response diagram, the inverse plant may act
as a high-pass filter, where its frequency response approaches the
positive infinity limitation. This may cause the instability of the whole
system in operation.
Fortunately, in the dead-time compensation by using selective harmonic
component mitigation, only the low-order harmonic components such
as 3rd- and 5th-order with known frequencies are considered because
higher-order components have little effects to the inverter output
voltage distortion. Because of that reason, we should limit the
frequency range as 0Hz f 420Hz, corresponding to the 7th harmonic
component (the fundamental frequency f0 = 60Hz), to force the
frequency response of inverse plant reaches the steady-state.
The transfer function of high-pass filter is defined as follows

G HPF ( s) =

s
s+ p

(4.27)

where p is a pole
To match the inverse plant transfer function with as shown in (4.27),
an additional pole will be added into the inverse plant transfer function.
So, the inverse plant transfer function can be rewritten as an equivalent
high-pass filter in s-domain and in frequency-domain as (4.28) and
(4.29), respectively:

- 123 -

Bode diagram of Plant


50

Gain(dB)

-50

-100
0
10

10

10

10

10

10

10

Phase(deg)

-89
-89.5
-90
-90.5
-91
0
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 4.10 Bode diagram of plant (L-filter)


Bode diagram of Inverse Plant

Gain(dB)

100
50

-50
0
10

10

10

10

10

10

10

Phase(deg)

91
90.5
90
89.5
89
0
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 4.11 Bode diagram of inverse plant (L-filter)


Bode diagram of Inverse Plant
40

Gain(dB)

20
0
-20
-40
0
10

10

10

10

10

10

10

100
Phase(deg)

80
60
40
20
0
0
10

10

10

10
Frequency (Hz)

10

10

10

Fig. 4.12 Bode diagram of high-pass filter based equivalent inverse plant

- 124 -

1
Gp ( s) = K

s
s+ p

1
Gp ( jw ) = K

(4.28)

jw
jw + p

(4.29)

To exactly match with the original inverse plant transfer functions


frequency characteristics as shown in Fig. 4.11, the frequency response
of equivalent high-pass filter must pass through 0dB at w = 250 (rad/s)
or f = 39.78 (Hz). Hence:

jw
= jw L
jw + p

(4.30)

With w =1/L:

1L
1
1 L+ p

Assuming that

(4.31)

1
<< p , thus the denominator 1 L + p p . The gain K
L

can be calculated as follows:


(4.32)

K pL

By choosing the pole is equal to the upper limitation of frequency


range, which corresponds to 7th harmonic component, and substituting
into (4.32), we can calculate the gain K 10.56, where p = 420(Hz) or
2639 (rad/s) and L = 4(mH).
- 125 -

The frequency response of high-pass filter based equivalent inverse


plant transfer function is expressed in (4.33) and is illustrated in Fig.
4.12.
1
Gp ( s) = 10.56

By
s=

applying

s
s + 2639

the

(4.33)

bilinear

transformation

and

substituting

2 1- z -1
, where Ts = 100ms is the sampling time, into (4.33), the
Ts 1 + z -1

discrete transfer function of the high-pass filter based equivalent


inverse plant can be given by (4.34):
2K
2K
z -1
2 K 1 - z - 1
2 + pTs 2 + pTs

1
=
G p (z) =
2 - pTs -1
2 + pTs - 2 - pT z -1
z
1s
2 + pTs

(4.34)

Hence, the digital implementation of high-pass filter based


equivalent inverse plant in fixed-point DSP can be expressed as follows:
y (k ) = Au (k ) - Au (k - 1) + By (k - 1)

where A =

(4.35)

2 - pTs
2K
= 9.33 and B =
= 0.77
2 + pTs
2 + pTs

4.8 Simulation Results


A 3kW PV inverter system is simulated by using the simulation tool

- 126 -

PSIM as shown in Fig. 4.13. As shown in Fig. 4.13, the time-delay


blocks are added into the PWM generation part to create the dead-time
phenomenon. The simulation core is C/C++ program and is linked by
using DLL block. The simulation parameters are listed in Table 4.1.
4.8.1 No dead-time
The grid current is shown in Fig. 4.14 (a) and its frequency spectrum
is shown in Fig. 4.14 (b). Fig. 4.14 (a) shows that the grid current
purely sinusoidal waveform. As shown in Fig. 4.14 (b), only 3rd
harmonic component is presented with a magnitude of 2.2% of
fundamental component. The dotted-line-bordered figure is zoomed in.
4.8.2 3ms dead-time without compensation
The grid current in case of 3ms dead-time with no compensation is
shown in Fig. 4.15 (a) and its frequency spectrum is shown in Fig. 4.15
(b). Fig. 4.15 (a) shows that the grid current with seriously distortion at
the peak and zero-crossing points. Because the high order harmonics
have little effect to the distortion, we only consider the 3rd and 5th
components as the dominants. As shown in Fig. 4.15(b), the dominant
3rd and 5th harmonic components in grid current have magnitudes of
4.8% and 3.2% of fundamental component, respectively. The dottedline-bordered figure is zoomed in from outer one. Fig. 4.16 shows the
grid current, the ideal fundamental component created by MSHEFDC
and the distorted error between them.
4.8.3 3ms dead-time with 3rd harmonic compensation
The grid current in case of 3ms dead-time with 3rd harmonic
- 127 -

component elimination are shown in Fig. 4.17 (a). As shown in Fig.


4.17 (b), only the 3rd harmonic component is mitigated to a magnitude
of 2.8% of fundamental component. It can be seen that the grid current
has a nearly perfect sinusoidal waveform and the distortion is almost
mitigated at zero-crossing point.
Fig. 4.18 shows the grid current, the first component created by
MSHEFDC and the error between them. The error is reduced when
compared with no compensation case. Fig. 4.19 shows the 1st and 3rd
harmonic components with their corresponding weight coefficients. The
steady-state time of 1st harmonic component is 0.06(s) while that of 3rd
harmonic component is less than 0.04(s).
Table 4.1
VSI system parameters for dead-time compensation

Specifications

Value

Rated power Prated

3 (kW)

Dc-link voltage Vdc

400 (V)

Grid voltage (rms) Vg

220 (V)

Grid frequency f0

60 (Hz)

Switching frequency fsw

10 (kHz)

Filter inductance L

4 (mH)

Filter capacitance C

4.7 (mF)

LMS adaptive gain m

0.03

Dead time Td

3 (ms)

- 128 -

Fig. 4.13 Simulation model of 3kW single-phase PV inverter using PSIM

- 129 -

Grid current (no dead-time)

(a)

Zoomed in

1st

1st

3rd

3rd

(b)
Fig. 4.14 Grid current in case of no dead-time
(a) Grid current waveform
(b) Grid currents frequency spectrum

- 130 -

Grid current (3ms dead-time with no compensation)

(a)

Zoomed in

1st

1st

3rd

3rd

5th

5th

7th

7th

(b)
Fig. 4.15 Grid current in case of 3ms dead-time with no compensation
(a) Grid current waveform
(b) Grid currents frequency spectrum

- 131 -

Grid current (3ms dead-time with no compensation)

First harmonic component

Error e1

Fig. 4.16 Grid current, ideal fundamental component and error between them
in case of 3ms dead-time with no compensation

- 132 -

Grid current (3ms dead-time with 3rd harmonic compensation)

(a)
1st

Zoomed in

1st

3rd

3rd

5th

5th

7th

7th

(b)
Fig. 4.17 Grid current in case of 3ms dead-time with 3rd-harmonic
compensation
(a) Grid current waveform
(b) Grid currents frequency spectrum

- 133 -

Grid current (3ms dead-time with 3rd harmonic compensation)

First harmonic component

Error e1

Fig. 4.18 Grid current, first harmonic component and error between them in
case of 3ms dead-time with 3rd-harmonic compensation

W1sine

Zoomed in
W1sine
W1cosine

W1cosine

st

1 component

3rd component W3cosine

rd

3 component

1st component

W3cosine

W3sine

W3sine

Fig. 4.19 First and third harmonic components with their corresponding
weight functions

- 134 -

Grid voltage

1st

3rd

Grid current
(3ms dead-time with no compensation)
5th

7th

Fig. 4.20 Grid voltage and grid current in case of 3ms dead-time with no
compensation

Grid voltage

1st
Grid current
(3ms dead-time with DTCV compensation)
3rd

5th

7th

Fig. 4.21 Grid voltage, grid current and its frequency spectrum in case of 3ms
dead-time with conventional DTCV compensation

- 135 -

Grid voltage

1st
Grid current
(3ms dead-time with MSHEFDC compensation)
3rd

5th

7th

Fig. 4.22 Grid voltage, grid current and its frequency spectrum in case of 3ms
dead-time with proposed MSHEFDC of 3rd harmonic compensation

- 136 -

Grid voltage

Grid current
(3ms dead-time with no compensation)

First harmonic component

Error e

(a)

Grid voltage

Grid current
(3ms dead-time with 3rd harmonic compensation)

First harmonic component

Error e

(b)
Fig. 4.23 Grid voltage, grid current, the first harmonic component and the
error between grid current and first component in case of 3ms dead-time
(a) no compensation
(b) 3rd harmonic compensation with proposed MSHEFDC

- 137 -

Sine weight coefficient

Cosine weight coefficient

First harmonic component

Fig. 4.24 First harmonic component and its weight coefficients

Sine weight coefficient

Cosine weight coefficient

Third harmonic component

Fig. 4.25 Third harmonic component and its weight coefficients

- 138 -

(a)

(b)
Fig. 4.26 Systems THD
(a) In case of 3ms dead-time without compensation
(b) In case of 3ms dead-time with 3rd harmonic compensation

- 139 -

4.1 Experimental Results


The experimental prototype of 3kW single-phase grid-connected PV
power conditioning system, shown in Fig. 2.18, uses the same
specifications listed in Table 4.1. The VSI is connected to the grid
through an LCL-filter and an isolation transformer (220V/170V) for
security purposes. The dead-time compensator is integrated with
inverter current controller and they are implemented fully in the
software. The PWM pulses are generated through the 32-bit fixed-point
DSP TMS320F2812s internal pulse generator. Voltage and current
signals are measured by using the 12-bit resolution of internal analogto-digital converter in the DSP. Also a four-channel 8-bit digital-toanalog converter has been used for debugging. The experimental results
of dead-time compensation are shown in Fig. 4.20 - Fig.4.25.
Fig. 4.20 shows the grid voltage, grid current and its frequency
spectrum in case of 3ms dead-time with no compensation. Grid voltage
is displayed in channel 1 a scale of with 250/div and grid current is
displayed in channel 2 with a scale of 10A/div, respectively. Channel
M, with 62.5Hz/horizontal div and 500mV/vertical div, shows the
grid currents frequency spectrum with the 3rd dominant harmonic
component caused by dead-time. As shown in Fig. 4.20, the dead-time
causes a seriously distortion in grid current at zero-crossing point.
Fig. 4.21 shows the grid voltage, grid current and its frequency
spectrum in case of 3ms dead-time with conventional DTCV
compensation. Grid voltage is displayed in channel 1 a scale of with
250/div and grid current is displayed in channel 2 with a scale of
10A/div, respectively. Channel M, with 62.5Hz/horizontal div and
- 140 -

500mV/vertical div, shows the grid currents frequency spectrum with


the dominants harmonic components caused by dead-time are 3rd and
5th. As shown in Fig. 4.21, the seriously distortion in grid current at
zero-crossing point caused by dead-time is reduced but 3rd and 5th
harmonic components are not mitigated.
Fig. 4.22 shows the experimental results by using the proposed
MSHEFDC with 3rd harmonic compensation. The grid voltage, grid
current and its frequency spectrum are shown in the same channels and
same scales as Fig. 4.20 and Fig. 4.21. As shown in Fig. 4.22, the
seriously distortion in grid current at zero-crossing point caused by
dead-time is reduced and the grid current waveform is nearly perfect
sinusoid. Also, as shown in the frequency spectrum response, 3rd
harmonic component is mitigated while 5th and 7th harmonic
components are also reduced. The oscillation phenomenon can be
avoided by using damping component in output low-pass filter.
Fig. 4.23 (a) shows the grid voltage, grid current, the first harmonic
component (or the ideal fundamental component) and the error between
the grid current and the first component in case of 3ms dead-time with
no compensation and those of 3ms dead-time with proposed MSHEFDC
3rd harmonic compensation case are shown in Fig. 4.23 (b), respectively.
Fig. 4.24 and Fig. 4.25 show the first and third harmonic
components with their corresponding weight coefficients created by
MSHEFDC, respectively. The steady-state can be reached after 0.06(s)
in case of first harmonic component and after 0.04(s) in case of third
harmonic component, as well as the simulation does.
Fig. 4.26 (a) and (b) show the THD values of system with and
without dead-time compensation. The THD value can be increased
- 141 -

approximately 50%.

4.2

Conclusions

In this chapter, a new software-based adaptive dead-time


compensation technique for single-phase grid-connected PV inverter
system based on LMS algorithm is presented. By using a selective
harmonic elimination of instantaneous feedback current as an additional
part of conventional current control loop, the effectiveness of dead-time
around the zero-crossing point in grid current can be mitigated. The
proposed compensation scheme does not require any external hardware
or any off-line experimental measurements. Furthermore, this algorithm
can be easily implemented and applied both in the transient-state and
steady-state. Simulation and experimental results are provided to verify
the effectiveness of this proposed compensation scheme in the singlephase grid-connected power distributed generation systems.

- 142 -

Chapter

Summary

This dissertation is contributive to improve power quality problem


which is due to conventional PI controller, by providing not only an
efficient current controller design but also an output low-pass filter and
a dead-time compensation method for single-phase grid-connected PV
inverter system. Power generation from a PV inverter contains a
positive aspect that it mostly takes after the utility systems peak
demand. Conversion of dc power to ac is made by controlling switching
scheme of the inverters, where one important issue is to have a fastresponse, high-performance control system that is robust to voltage
disturbances. Thus, the power system can achieve more versatile real
and reactive power control than conventional power sources.
Since the core of control system is current controller, the first part of
the dissertation has dealt with design of an efficient current control
scheme using PR controller compared with conventional PI controller.
The performance of PR-controller-based current controller of single-

- 143 -

phase grid-connected PV inverter has been investigated in Chapter 2.


With a constant dc-link voltage, the dynamic performance of the system
has been tested both in transient-state and steady-state. It has been
demonstrated that by using a PR controller designed by only
considering positive-sequence components, the current control scheme
can achieve the steady-state performance better than the use of
conventional PI controller in current-controlled based single-phase
grid-connected PV inverter system. Moreover, PR controller can
overcome drawbacks of PI controller: inability to track a sinusoidal
reference with zero steady-state error and poor disturbance rejection
capability. It is important to stress that these results are valid for any
application of grid-connected VSI where a robust response to voltage
disturbances is required.
A LCL-filter design process for single-phase grid-connected PV VSI
system has been described in Chapter 3. By considering the constraints
of parameter determinations (e.g., the maximum current ripple, the
maximum reactive power, the current ripple attenuation ratio), the
overall filter design process can be done by step-by-step equations
solving. The LCL-filter design procedure ensures to keep the filter
components parasitic as low as possible.
Finally, Chapter 4 presented new PWM dead-time compensation
technique based on LMS algorithm. By selecting current harmonic
components to be mitigated, the effectiveness of dead-time around the
zero-crossing point in grid current can be reduced. The proposed
compensation scheme does not require any external hardware or any
off-line experimental measurements. This compensation structure can
be easily implemented in power distributed generation systems.

- 144 -

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- 155 -

Appendix

Simulation Tools

This appendix contains a very brief description of each of analysis


tools so the reader may refer to use them to further their research.
A. 1

Matlab/Simulink

The Matlab/Simulink is an interactive system and programming


language for general scientific, technical computation, visualization and
simulation. User can use the professional version (released by The
MathWorks, Inc) or the student edition (distributed by Prentice-Hall),
where some advantages are described as follows:

Simulink block diagram can express configuration of the control


diagram clarifying signal stream by grouping and organizing
function unit as subsystem.

It is easy to express the matrix formula in system.

- 156 -

It is able to model and simulate multi domain systems such as


electrical and mechanical systems as it is simulator for
mathematical expression model.

Optional toolboxes and extended block-sets provide solutions for


a wide variety of development from algorithm design, verification,
and prototype testing to implementation.

Embedded Legacy C course code can be verified through


simulation with this legacy code as controller and plant model in
Simulink block diagram.

A. 2 PSIM
PSIM is EMTP-type simulation tool and design software for power
electronics, power systems, motor drives, and switching for dynamic
systems. It has a fast simulation time and an easy-to-use graphic
interface. PSIM tool has an advantage of reducing common switching
numeric oscillations. User can use the device libraries or use the DLL
block for linking to external C program.

- 157 -

Appendix

PR Controller Implementation
(PSIM)

#include <math.h>
#include <sincos.h> // Sine and Cosine table
//////////////////////// basic init ///////////////////////////
static double

Fs= 10000; // sampling frequency

static double

Ts= 100.0;// sampling frequency(us)

static double

DFs

static double

Ts_sec=100e-6; // 1/sampling frequency

= 100e-6; // 1/sampling frequency

static double TWOPI = 2*3.1415926535897932384626433832795;


static double ONEPI = 3.1415926535897932384626433832795;
static double

samp_T, samp_T0 = 0 ;

static double

samp_T_bet, samp_T0_bet = 0 ;

static int

init=0;

///////////////////////// in //////////////////////////////////

- 158 -

static int

iVgrid=0, iIgrid=0; // grid voltage and current

static int

iVds=0,iVds1=0,iVqs=0,iVqs1=0, iVde=0,iVqe=0;

static int

iIds=0,iIds1=0,iIqs=0,iIqs1=0,iIde=0,iIqe=0;

///////////////////////// pll /////////////////////////////////


static long lbeta=0;
static int

iKp_pll=0,iKit_pll=0;

static int

iVerr_pll=0,iVerr_pll1=0;

static long lpi_pll=0,lpi_pll_limit=0;


static int

iCos,iSin,iCos1,iSin1,iSint;

///////////////////// PR controller ///////////////////////////


static int

iI_ref=0;

static int

ipi_Ide=0,ipi_Iqe=0;

static int

ipi_Vde=0,ipi_Vqe=0;

static int

iKp_Idqe=0,iKit_Idqe=0;

static long lWL=0;


static int

iVde_cmd,iVqe_cmd,iVde_cmd1,iVqe_cmd1;

static int

iVds_cmd,iVqs_cmd,iVds_cmd1,iVqs_cmd1;

static int

in0,in1,in2,id1,id2;

static int

w0=0,wcut=0;

static int

iKr_Idqe=0;

static long ipr_Ids=0,iIds_err=0,iIds_err1=0,iIds_err2=0;


static long ipr_Iqs=0,iIqs_err=0,iIqs_err1=0,iIqs_err2=0;
static long iIds_pr_err=0,iIds_pr_err1=0,iIds_pr_err2=0;
static long iIqs_pr_err=0,iIqs_pr_err1=0,iIqs_pr_err2=0;
static int

iIde_cmd=0,iIqe_cmd=0;

static int

iIds_cmd=0,iIqs_cmd=0;

static int

iIde_ref=0,iIqe_ref=0,iIds_ref=0,iIqs_ref=0,iWL=0;

- 159 -

//////////////////////// pwm Control //////////////////////////


static double

pwm_dc, pwm, pwm_m,pwm_p;

static double

Vcmd,Vcmd1;

static double

antiu, antid;

static double

fault;

static double

pwms,pwms1;

__declspec(dllexport) void simuser (t, delt, in, out)


// Note that all the variables must be defined as "double"
double

t, delt, *in, *out;

{
iIgrid

= (int)(in[2] * 1024); //Q10

iVgrid

= (int)(in[3] * 64);//Q6

samp_T

= t -samp_T0 ;

samp_T_bet = t -samp_T0_bet + 50.0e-6 ;


if (init==0)
{
init

= 1;

//////////// PLL ////////////////////


lbeta

= -31555;

//Q15 //All pass filter

iKp_pll = (int)(1 * 1024);//Q10

//28.6

iKit_pll = (int)(0.05 * 1024);//Q10

//1.26998

wr_60 = (int)(TWOPI * 60 * 64);//Q6


lpi_pll_limit = (long)(TWOPI * 3 * 65536);//Q16
wTheta =0;
wTheta1 = 0;
lWL = (long)(1.7 * 32768);//Q15 (2mH ->1.508)

- 160 -

//PR controller
iIde_ref = 0; iIqs_ref = 0; iIds_ref = 0; iIqs_ref = 0;
iKp_Idqe = (int)(10*1024);

// Q10

iKr_Idqe = (int)(0.001*1024);

// Q10

w0 = (int)(377*1024); //Q20
wcut = (int)(15*1024);// Q10
in0 = (long)(35*1024); //Q10
in1 = (long)(-25*1024); //Q10
in2 = (long)(10.2283*1024); //Q10
id1 = (long)(-1.9956*1024); //Q10
id2 = (long)(0.9970*1024);

//Q10

}
if ((samp_T >= 100.0e-6)) // 10kHz sampling
{
samp_T0

= t;

Theta = wTheta * 326;


//Gt = 2048/max_wTheta = 2048 / (2*3.14) = 326
iSin = SIN4TBL[(int)Theta]; //Q15
iCos = COS4TBL[(int)Theta];
iSin1 = iSin;

//Q15

iCos1 = iCos;

//Q15

iVds = iVgrid;

//Q15

//Q6

iVqs = ((-lbeta * iVqs1)>>15) + ((lbeta * iVds)>>15) + (iVds1);


iVds1 = iVds; //Q6
iVqs1 = iVqs; //Q6
iVde = (iVds * (long)iCos + iVqs * (long)iSin)>>15;

//Q6

iVqe = (-iVds * (long)iSin + iVqs * (long)iCos)>>15;

//Q6

- 161 -

//PLL
iVerr_pll = iVde;
lpi_pll

+=

//Q6

(long)iKp_pll

(iVerr_pll-iVerr_pll1)

(long)iKit_pll * iVerr_pll; //Q16


iVerr_pll1 = iVerr_pll; //Q6
if(lpi_pll > lpi_pll_limit)

lpi_pll = lpi_pll_limit; //Q16

if(lpi_pll < -lpi_pll_limit)

lpi_pll = -lpi_pll_limit; //Q16

wr_est = wr_60 + ((long)lpi_pll>>10);

//Q6

wTheta += ((long)wr_est)/64. * Ts_sec; //Q0


if( wTheta >= TWOPI ) //Q0
{ wTheta -= TWOPI; //Q0}
wTheta1 = wTheta;
if (iIqe_ref > 7168)
{ iIqe_ref = 7168; }
else
{iIqe_ref = iIqe_ref+1; }
//Reference current from synchronous -> stationary frame
iIds_ref=(iIde_ref*(long)iCos + (-iIqe_ref)*(long)iSin)>>15;
iIqs_ref

(iIde_ref

(long)iSin

iIqe_ref

(long)iCos)>>15;//Q10
iIds = iIgrid; //Q10
iIqs = -((lbeta * iIqs1)>>15) + ((lbeta * iIds)>>15) +
(iIds1);//Q10
iIds1 = iIds;

//Q10

iIqs1 = iIqs;

//Q10

iIde = ((iIds * iCos)>>15) + ((iIqs * iSin)>>15);

//Q10

iIqe = ((-iIds * iSin)>>15) + ((iIqs * iCos)>>15); //Q10

- 162 -

//////////////////PR controller in stationary frame///////////////////////////


iIds_err = iIds_ref - iIds;

//Q10

iIds_pr_err += (long)(in0) * iIds_err + (long)(in1)*iIds_err1 +


(long)(in2)*iIds_err2

(((long)(id1)*iIds_pr_err1)>>10)

(((long)(id2) * iIds_pr_err2)>>10); //Q20


iIds_err1 = iIds_err; //Q10
iIds_err2 = iIds_err1; //Q10
iIds_pr_err1 = iIds_pr_err;

//Q20

iIds_pr_err2 = iIds_pr_err1; //Q20


ipr_Ids = (iIds_pr_err)>>14; //Q6
iIqs_err = iIqs_ref - (iIqs);

//Q10

iIqs_pr_err += (long)(in0)*iIqs_err + (long)(in1)*iIqs_err1 +


(long)(in2)*iIqs_err2

(((long)(id1)*iIqs_pr_err1)>>10)

(((long)(id2)*iIqs_pr_err2)>>10); //Q20
iIqs_err1 = iIqs_err;//Q10
iIqs_err2 = iIqs_err1;//Q10
iIqs_pr_err1 = iIqs_pr_err;//Q20
iIqs_pr_err2 = iIqs_pr_err1;//Q20
ipr_Iqs = (iIqs_pr_err>>14);//Q6
pwms = (long)(ipr_Ids>>6);
//////////// Unipolar PWM compensation /////////////////////
pwm_p = pwms;
pwm_m = -pwms;
}
out[0] = pwm_p;
out[1] = pwm_m;
}

- 163 -

Appendix

Dead-Time Compensation
Implementation (PSIM)

#include <math.h>
#include <sincos.h> // Sine and Cosine table
//////////////////////// basic init ///////////////////////////
static double

Fs= 10000; // sampling frequency

static double

Ts= 100.0;// sampling frequency(us)

static double

DFs

static double

Ts_sec=100e-6; // 1/sampling frequency

= 100e-6; // 1/sampling frequency

static double TWOPI = 2*3.1415926535897932384626433832795;


static double ONEPI = 3.1415926535897932384626433832795;
static double

samp_T, samp_T0 = 0 ;

static double

samp_T_bet, samp_T0_bet = 0 ;

static int

init=0;

///////////////////////// in //////////////////////////////////

- 164 -

static int

iVgrid=0, iIgrid=0; // grid voltage and current

static int

iVds=0,iVds1=0,iVqs=0,iVqs1=0, iVde=0,iVqe=0;

static int

iIds=0,iIds1=0,iIqs=0,iIqs1=0,iIde=0,iIqe=0;

///////////////////////// pll /////////////////////////////////


static long lbeta=0;
static int

iKp_pll=0,iKit_pll=0;

static int

iVerr_pll=0,iVerr_pll1=0;

static long lpi_pll=0,lpi_pll_limit=0;


static int

iCos,iSin,iCos1,iSin1,iSint;

///////////////////// PR controller ///////////////////////////


static int

iI_ref=0;

static int

ipi_Ide=0,ipi_Iqe=0;

static int

ipi_Vde=0,ipi_Vqe=0;

static int

iKp_Idqe=0,iKit_Idqe=0;

static long lWL=0;


static int

iVde_cmd,iVqe_cmd,iVde_cmd1,iVqe_cmd1;

static int

iVds_cmd,iVqs_cmd,iVds_cmd1,iVqs_cmd1;

static int

in0,in1,in2,id1,id2;

static int

w0=0,wcut=0;

static int

iKr_Idqe=0;

static long ipr_Ids=0,iIds_err=0,iIds_err1=0,iIds_err2=0;


static long ipr_Iqs=0,iIqs_err=0,iIqs_err1=0,iIqs_err2=0;
static long iIds_pr_err=0,iIds_pr_err1=0,iIds_pr_err2=0;
static long iIqs_pr_err=0,iIqs_pr_err1=0,iIqs_pr_err2=0;
static int

iIde_cmd=0,iIqe_cmd=0;

static int

iIds_cmd=0,iIqs_cmd=0;

static int

iIde_ref=0,iIqe_ref=0,iIds_ref=0,iIqs_ref=0,iWL=0;

- 165 -

//////////////////////// pwm Control //////////////////////////


static double

pwm_dc, pwm, pwm_m,pwm_p;

static double

Vcmd,Vcmd1;

static double

antiu, antid;

static double

fault;

static double

pwms,pwms1;

__declspec(dllexport) void simuser (t, delt, in, out)


// Note that all the variables must be defined as "double"
double t, delt;
double *in, *out;
{
iIgrid

= (int)(in[2] * 1024); //Q10

iVgrid

= (int)(in[3] * 64);//Q6

samp_T = t -samp_T0 ;//+ 50.0e-6; // + 25.0e-6 ;


samp_T_bet = t -samp_T0_bet + 50.0e-6 ;
if (init==0)
{
init

= 1;

lbeta = -31555;

//Q15

iKp_pll = (int)(1 * 1024);//Q10

//28.6

iKit_pll = (int)(0.05 * 1024);//Q10

//1.26998

wr_60 = (int)(TWOPI * 60 * 64);//Q6


wr_3rd = (int)(TWOPI * 180 * 64);//Q6

//3rd harmonic

wr_5th = (int)(TWOPI * 300 * 64);//Q6

//5th harmonic

lpi_pll_limit = (long)(TWOPI * 3 * 65536);//Q16

- 166 -

wTheta =0;
wTheta1 = 0;
iKp_Idqe = (int)(10 * 1024); //10
iKit_Idqe = (int)(0.2 * 1024);//0.4
lWL = (long)(1.7 * 32768);//Q15 (2mH ->1.508)
//////////// dead-time compensation /////////
iepsilon = 0;
iepsilon1 = 0;
iW_fund_sin = 0;

iW_fund_cos = 0;

iW_fund_sin1 = 0;

iW_fund_cos1 = 0;

iW_3rd_sin = 0;

iW_3rd_cos = 0;

iW_3rd_sin1 = 0;

iW_3rd_cos1 = 0;

Vcmps_ds = 0;

Vcmps_qs = 0;

I_fund_cmps = 0;

I_3rd_cmps = 0;

}
if ((samp_T >= 100.0e-6))

// 10kHz sampling

{
samp_T0

=t;

Theta = wTheta * 326;


Theta3rd = wTheta3rd * 326;
iSin = SIN4TBL[(int)Theta];

//Q15

iCos = COS4TBL[(int)Theta];

//Q15

iSin3rd = SIN4TBL[(int)Theta3rd];

//Q15

iCos3rd = COS4TBL[(int)Theta3rd];

//Q15

iSin1 = iSin;

iCos1 = iCos;

//Q15

iSin3rd1 = iSin3rd;

iCos3rd1 = iCos3rd;

//Q15

- 167 -

//

ALL PASS FILTER for Vq

iVds = iVgrid;

//Q6

iVqs = ((-lbeta * iVqs1)>>15) + ((lbeta * iVds)>>15) + (iVds1);


iVds1 = iVds;

//Q6

iVqs1 = iVqs;

//Q6

iVde = ((iVds * iCos)>>15) + ((iVqs * iSin)>>15);

//Q6

iVqe = ((-iVds * iSin)>>15) + ((iVqs * iCos)>>15);

//Q6

iVde = (iVds * (long)iCos + iVqs * (long)iSin)>>15;

//Q6

iVqe = (-iVds * (long)iSin + iVqs * (long)iCos)>>15;

//Q6

iVerr_pll = iVde;
lpi_pll

+=

//Q6

(long)iKp_pll

(long)iKit_pll * iVerr_pll;

(iVerr_pll-iVerr_pll1)
//Q16

iVerr_pll1 = iVerr_pll; //Q6


if(lpi_pll > lpi_pll_limit)

lpi_pll = lpi_pll_limit; //Q16

if(lpi_pll < -lpi_pll_limit)

lpi_pll = -lpi_pll_limit; //Q16

wr_est = wr_60 + ((long)lpi_pll>>10);

//

//1st component
wTheta += ((long)wr_est)/64. * Ts_sec; //Q0
if( wTheta >= TWOPI ) //Q0
{ wTheta -= TWOPI; //Q0 }
wTheta1 = wTheta;
//3rd harmonic
wTheta3rd += (3.* (long)wr_est)/64. * Ts_sec; //Q0
if( wTheta3rd >= TWOPI )
{ wTheta3rd -= TWOPI;

wTheta3rd1 = wTheta3rd;
// Soft start current control

- 168 -

if (iIqe _ref > 7168)


{ iIqe _ref = 7168; }
else
{ iIqe _ref = iIqe _ref+1; }
//

ALL PASS FILTER for Iq

iIds = iIgrid; //Q10


iIqs = -((lbeta * iIqs1)>>15) + ((lbeta * iIds)>>15) + (iIds1);
iIds1 = iIds; //Q10
iIqs1 = iIqs;

//Q10

iIde = ((iIds * iCos)>>15) + ((iIqs * iSin)>>15);

//Q10

iIqe = ((-iIds * iSin)>>15) + ((iIqs * iCos)>>15);

//Q10

iIde = (iIds * (long)iCos + iIqs * (long)iSin)>>15; //Q10


iIqe = (-iIds * (long)iSin + iIqs * (long)iCos)>>15; //Q10
///////////////////////////////////// id //////////////////////////////////////////
iIde_err = 0 - iIde ; //Q10
ipi_Ide

+=

(long)iKp_Idqe

(iIde_err-iIde_err1)

(long)iKit_Idqe * iIde_err; //Q20


iIde_err1 = iIde_err; //Q10
ipi_Vde = ipi_Ide>>14;//Q6
///////////////////////////////////// iq /////////////////////////////////////
iIqe_err = iIqe_ref - (iIqe);
ipi_Iqe += iKp_Idqe * (iIqe_err-iIqe_err1) +
iIqe_err;
iIqe_err1 = iIqe_err;
ipi_Vqe = ipi_Iqe>>14;//Q6
/////* Dead-time compensation *///////
//1ST

- 169 -

iKit_Idqe *

iW_fund_sin =

iW_fund_sin1 + ((int)(3e-2 * 64) *

(long)iepsilon1 * (long)(iSin1>>15)); //Q12


iW_fund_sin1 = iW_fund_sin;
iW_fund_cos =

//Q1

iW_fund_cos1 + ((int)(3e-2 * 64) *

(long)iepsilon1 * (long)(iCos1>>15)); //Q12


iW_fund_cos1 = iW_fund_cos;
I_fund_cmps

//Q12

((iW_fund_sin>>6)

(iW_fund_cos>>6) * (long)iCos)>>15;

(long)iSin

//Q6

//3RD
iW_3rd_sin

iW_3rd_sin1

((int)(3e-2

64)

64)

(long)iepsilon_3rd1 * (long)(iSin3rd1>>15)); //Q12


iW_3rd_sin1 = iW_3rd_sin; //Q12
iW_3rd_cos =

iW_3rd_cos1

+ ((int)(3e-2

(long)iepsilon_3rd1 * (long)(iCos3rd1>>15)); //Q12


iW_3rd_cos1 = iW_3rd_cos; //Q12
I_3rd_cmps = (((iW_3rd_sin) * (long)iSin3rd + (iW_3rd_cos)
* (long)iCos3rd)>>15); //Q12
iepsilon_3rd = iepsilon - (long)(I_3rd_cmps>>6); //Q6
iepsilon_3rd1 = iepsilon_3rd; //Q6
//Injected voltage for compensation
Icmps = (long)(I_3rd_cmps>>6) ;//Q6
iepsilon = (iIgrid>>4) - (I_fund_cmps); //Q6
iepsilon1 = iepsilon; //Q6
//

HIGH PASS FILTER for Vcmps

lVcmps_in = (long)(Icmps); //Q6


lVcmps_temp = (long)(21.1 * 64) * (lVcmps_in - lVcmps_in1)
+ (((long)(0.473 * 64)*lVcmps_temp1)>>6);//Q12

- 170 -

iVcmps_out = (long)(lVcmps_temp>>6);//Q6
lVcmps_in1=lVcmps_in;//Q6
lVcmps_temp1=lVcmps_temp;//Q12
//

HIGH PASS FILTER for iepsilon

lepsilon_in = (long)(iepsilon); //Q6


lepsilon_temp

(long)(19.4142

64)*

(lepsilon_in

lepsilon_in1) + (((long)(1 * 64)*lepsilon_temp1)>>6);//Q12


lepsilon_out = lepsilon_temp>>6;//Q6
lepsilon_in1 = lepsilon_in;//Q6
lepsilon_temp1=lepsilon_temp;//Q12
///////////////////////////////////// cmd /////////////////////////////////////
iVqe_cmd = (ipi_Vqe + (((long)iIde * lWL)>>19) + (iVqe));
iVde_cmd = (ipi_Vde) - (((long)iIqe * lWL)>>19);
iVds_cmd =

(iVde_cmd * (long)iCos + (-iVqe_cmd) *

(long)iSin)>>15;
iVqs_cmd =

(iVde_cmd * (long)iSin + iVqe_cmd *

(long)iCos)>>15;

//Q6

iVds_cmd1

iVds_cmd

(long)(lVcmps_out)

(long)(lepsilon_out);
pwms1 = (long)(iVds_cmd1>>6); //Q0
//////////// Unipolar PWM compensation /////////////////////
pwm_p = pwms1;
pwm_m = -pwms1;
}
out[0] = pwm_p;
out[1] = pwm_m;
out[2] = I_fund_cmps/64.;

- 171 -

out[3] = iW_fund_sin/4096.;
out[4] = iW_fund_cos/4096.;
out[5] = I_3rd_cmps/4096.;//iepsilon/64.;
out[6] = iW_3rd_sin/4096.;//iW_fund_sin/4096.;
out[7] = iW_3rd_cos/4096.;//iW_fund_cos/4096.;
out[8] = Icmps/64.;//iW_fund_sin/4096.;
out[9] = lepsilon_out/64.;//iW_fund_cos/4096.;
out[10] = lVcmps_out/64.;
out[11] = iepsilon/64.;
out[12] = iepsilon_3rd/64.;
}

- 172 -

(: )


,
.
,

.

,
* A dissertation submitted to the committee of Graduate School,
Chungnam National University in a partial fulfillment of the
requirements for the degree of Doctor of Philosophy conferred in
February 2011.

- 173 -

,
.


PR (Proportional-Resonant) , LCL
.
,
d-q
. d-q
90
,
90 .

DSP . d-q PR
(Proportional-Resonant)

PI
(Proportional-Integral) ,
, ,
THD .
, ,
3 LCL (Inductor-Capacitor-Inductor) ,
. LCL 1 L (Inductor)

,

. LCL ,
.
.
MOSFET IGBT
10kHz .
/
.
,
.

,

- 174 -

.

,
, , , 3KW
.

- 175 -

- 176 -

Acknowledgements
This dissertation arose in part out of years of research that has been
done since I came to Intelligent Power Conversion Laboratory,
Chungnam National University. By that time, I have worked with a
great number of people whose contribution in assorted ways to the
research and the making of the dissertation deserved special mention. It
is a pleasure to convey my gratitude to them all in my humble
acknowledgment.
In the first place, I would like to record my gratitude to Prof. Se-Jin
Seong and Prof. Hanju Cha for their supervisions, advices and guidance
from the very early stage of this research as well as giving me
extraordinary experiences throughout the work. Above all and the most
needed, they provided me unflinching encouragements and supports in
various ways. I am indebted to them more than they know.
I would like to thank my previous academic advisors, Prof. Phan
Xuan-Minh and Prof. Nguyen Doan-Phuoc in Hanoi University of
Science and Technology, for their guidance, encouragements and
recommendations for my further training at Chungnam National
University.
I gratefully thank Prof. In-Ho Hwang, Prof. Tae-Kyung Sung and Dr.
Sang-Jin Kim for their constructive comments and great suggestions on
this dissertation. I am thankful that in the midst of all their activity, they

- 177 -

accepted to be members of the reading committee.


I would like to be grateful to many professors at Department of
Information and Communication Engineering and Department of
Electrical Engineering, Chungnam National University for their
encouragement, instruction and stimulation during my doctor course.
It is a pleasure to pay tribute also to the sample collaborators. Many
thanks go to my seniors, Dr. Jungwan Choi, Mr. Young-Sik Cho, Mr.
Byung-Ha Lee and Dr. In-Soo Kim for their encouragements, their
helps and sharing moment excitements.
I gratefully acknowledge Sanghoey Lee for his advice, supervision,
and crucial contribution, which made him a backbone of this research
and so to this dissertation. His involvement with his originality has
triggered and nourished my intellectual maturity that I will benefit from,
for a long time to come.
To Soon-Ho Choi and Woo-Jung Kim, I would like to thank for their
high quality helps at my beginning time. Many thanks go in particular
to Huyn-Joo Lim for her precious times and valuable helps in Korean
life. To Seunggoo Lee, Youngju Kang, Wujong Lee, Xia Wei,
Seungwoo Chae, Jongkyung Lee and Taesub Kang, it is a pleasure to
collaborate with you. I have shared the hardship, daunting difficulties
and moment excitement, and happiness with all of you during the
working time. Many thanks go to you for giving me such a pleasant
time when working together with you since I knew you in Intelligent
Power Conversion Laboratory.

- 178 -

Collective and individual acknowledgments are also owed to my


colleagues at Department of Electrical Engineering, whose present
somehow perpetually refreshed, helpful, and memorable meeting and
dry humor about engineers life.
Where would I be without my family? My parents deserve special
mention for their inseparable support and encouragement. My father,
Vu Dinh-Quy, in the first place is the person who put the fundament my
learning character, showing me the joy of intellectual pursuit ever since
I was a child. My mother, Nguyen Thi-Hue, is the one who sincerely
raised me with her caring and gently love. Many thanks go to my
brother Vu Huy-Giao, his wife Nguyen Thi-Nhung, and his son Vu
Thai-Binh, for their helps during years. Also, I gratefully acknowledge
my sister Vu Phuong-Lan, her husband Nghiem Quoc-Dat, and her
daughter Nghiem Phuong-Thao for their encouragements, supports and
helps since the first day in Korea.
Words fail me to express my appreciation to my wife Le Thi HongHanh whose dedication, love and persistent confidence in me, has taken
the load off my shoulder. I owe her for being unselfishly let her
intelligence, passions, and ambitions collide with mine. Therefore, I
would also thank my father-in-law Le Ky-Thanh, for letting me take her
hand in marriage, for accepting me as a member of the family, and for
his thoughtful supports and encouragements during years, warmly.
Furthermore, to my wifes brother Le Song Hieps family with their
support and encouragement, thank you.
To Tran Anh-Dung, it is a pleasure to have you as my best friend. I

- 179 -

have shared the daunting difficulties, moment excitement, and


happiness with you during years. Many thanks go to you for giving me
such a pleasant time and help when study together with you since I
knew you. Hope to see your success in life soon.
Thanks go to my friends in Vietnamese student organization in
Chungnam National University, who were always willing to help me
out. I cannot list all of you here. However, I always appreciate you.
Finally, I would like to thank everybody who was important to the
successful realization of dissertation, as well as expressing my apology
that I could not mention personally one by one. Without them none of
this would have been possible.

Trung-Kien Vu
January 15th, 2011
Daejon, Korea

- 180 -

VITA
Trung-Kien Vu
He was born on October 27, 1979, in Hanoi, Vietnam. He obtained
his B.S. in Department of Electrical Engineering from Hanoi University
of Science and Technology, Hanoi, Vietnam in 2001. After working in
company for two years, he returned to academic environment and
received his M.S. degrees in Department of Electronics Engineering
from Chungnam National University, Daejeon, Korea in 2005. He had
finished course-works for his Ph.D. study in Department of Information
and Communications Engineering at Chungnam National University in
2007. He is supposed to obtain his doctorate degree on February 25,
2011. His interest areas are power conversion system, control,
renewable energy systems and applications of microprocessor to power
systems. He has been a student member of Institute of Electrical and
Electronics Engineers (IEEE), a member of the Korean Institute of
Electrical and Electronics Engineers (KIEE) and the Korean Institute of
Power Electronics (KIPE).

January 15th, 2011

- 181 -

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