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CA3140, CA3140A
4.5MHz, BiMOS Operational Amplifier
with MOSFET Input/Bipolar Output
November 1996
Features
Description
The CA3140A and CA3140 are integrated circuit operational amplifiers that combine the advantages of high voltage PMOS transistors with high voltage bipolar transistors on a single monolithic chip.
Applications
Ground-Referenced Single Supply Amplifiers in Automobile and Portable Instrumentation
Sample and Hold Amplifiers
Long Duration Timers/Multivibrators
(seconds-Minutes-Hours)
Photocurrent Instrumentation
Peak Detectors
Active Filters
Ordering Information
Comparators
Interface in 5V TTL Systems and Other Low
Supply Voltage Systems
PART NUMBER
(BRAND)
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
CA3140AE
-55 to 125
8 Ld PDIP
E8.3
Function Generators
CA3140AM
(3140A)
-55 to 125
8 Ld SOIC
M8.15
Tone Controls
Power Supplies
Portable Instruments
Intrusion Alarm Systems
CA3140AS
-55 to 125
T8.C
CA3140AT
-55 to 125
T8.C
CA3140E
-55 to 125
8 Ld PDIP
E8.3
CA3140M
(3140)
-55 to 125
8 Ld SOIC
M8.15
CA3140M96
(3140)
-55 to 125
8 Ld SOIC Tape
and Reel
CA3140T
-55 to 125
T8.C
Pinouts
CA3140 (METAL CAN)
TOP VIEW
TAB
STROBE
8
OFFSET
NULL
INV. 2
INPUT
NON-INV.
INPUT
V+
6 OUTPUT
5 OFFSET
NULL
4
V- AND CASE
OFFSET
NULL
INV. INPUT
NON-INV.
INPUT
V-
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
3-79
STROBE
V+
OUTPUT
OFFSET
NULL
File Number
957.3
CA3140, CA3140A
Absolute Maximum Ratings
Thermal Information
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. JA is measured with the component mounted on an evaluation PC board in free air.
2. Short circuit may be applied to ground or to either supply.
Electrical Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
CA3140
CA3140A
UNITS
4.7
18
Input Resistance
RI
1.5
1.5
Input Capacitance
CI
pF
Output Resistance
RO
60
60
eN
BW = 140kHz, RS = 1M
48
48
eN
RS = 100
f = 1kHz
40
40
nV/Hz
f = 10kHz
12
12
nV/Hz
IOM+
Source
40
40
mA
IOM-
Sink
18
18
mA
fT
4.5
4.5
MHz
SR
V/s
220
220
0.08
0.08
tr
OS
Electrical Specifications
tS
RL = 2k
CL = 100pF
Rise Time
Overshoot
RL = 2k
To 1mV
CL = 100pF
Voltage Follower To 10mV
10
10
4.5
4.5
1.4
1.4
PARAMETER
SYMBOL
MIN
|VIO|
15
|IIO|
0.5
30
II
10
50
AOL
20
100
86
100
32
70
90
-15
-15.5 to +12.5
Input Current
Large Signal Voltage Gain (Note 3)
(See Figures 6, 29)
Common Mode Rejection Ratio
(See Figure 34)
Common Mode Input Voltage Range (See Figure 8)
CMRR
VICR
3-80
TYP
CA3140A
MAX
MIN
TYP
MAX
UNITS
mV
0.5
20
pA
10
40
pA
20
100
kV/V
86
100
dB
320
32
320
V/V
70
90
dB
11
-15
-15.5 to +12.5
12
CA3140, CA3140A
Electrical Specifications
For Equipment Design, at VSUPPLY = 15V, TA = 25oC, Unless Otherwise Specified (Continued)
CA3140
PARAMETER
CA3140A
SYMBOL
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
PSRR
100
150
100
150
V/V
76
80
76
80
dB
VOM+
+12
13
+12
13
VOM-
-14
-14.4
-14
-14.4
I+
mA
Device Dissipation
PD
120
180
120
180
mW
VIO/T
V/oC
Electrical Specifications
PARAMETER
SYMBOL
CA3140
CA3140A
UNITS
|VIO|
mV
|IIO|
0.1
0.1
pA
Input Current
II
pA
Input Resistance
RI
AOL
100
100
kV/V
100
100
dB
32
32
V/V
90
90
dB
-0.5
-0.5
2.6
2.6
PSRR
VI0/VS
100
100
V/V
80
80
dB
VOM+
VOM-
0.13
0.13
Source
IOM+
10
10
mA
Sink
OM-
mA
SR
V/s
fT
3.7
3.7
MHz
I+
1.6
1.6
mA
Device Dissipation
PD
mW
200
200
CMRR
VICR
3-81
CA3140, CA3140A
Block Diagram
2mA
4mA
7 V+
BIAS CIRCUIT
CURRENT SOURCES
AND REGULATOR
200A
1.6mA
2A
A
10,000
A 10
INPUT
200A
2mA
A1
6 OUTPUT
2
C1
12pF
5
1
OFFSET
NULL
4 VSTROBE
Schematic Diagram
BIAS CIRCUIT
INPUT STAGE
SECOND STAGE
OUTPUT STAGE
D1
D7
Q1
Q3
Q2
D8
R10
1K
Q4
Q5
Q6
Q20
R9
50
Q19 R11
20
Q7
R12
12K
R14
20K
Q21
Q17
R1
8K
R13
5K
R8
Q8
1K Q
18
6 OUTPUT
D2
D3
D4
D5
INVERTING
INPUT
NON-INVERTING
INPUT
Q9
Q10
C1
R2
500
R3
500
12pF
Q14
Q11
R4
500
Q12
R5
500
Q16
D6
R6
50
1
OFFSET NULL
Q15
Q13
R7
30
STROBE
V-
3-82
CA3140, CA3140A
Application Information
Circuit Description
As shown in the block diagram, the input terminals may be
operated down to 0.5V below the negative supply rail. Two
class A amplifier stages provide the voltage gain, and a
unique class AB amplifier stage provides the current gain
necessary to drive low-impedance loads.
A biasing circuit provides control of cascoded constant current
flow circuits in the first and second stages. The CA3140
includes an on chip phase compensating capacitor that is
sufficient for the unity gain voltage follower configuration.
Input Stage
The schematic diagram consists of a differential input stage
using PMOS field-effect transistors (Q9, Q10) working into a
mirror pair of bipolar transistors (Q11, Q12) functioning as load
resistors together with resistors R2 through R5. The mirror pair
transistors also function as a differential-to-single-ended
converter to provide base current drive to the second stage
bipolar transistor (Q13). Offset nulling, when desired, can be
effected with a 10k potentiometer connected across
Terminals 1 and 5 and with its slider arm connected to Terminal
4. Cascode-connected bipolar transistors Q2, Q5 are the
constant current source for the input stage. The base biasing
circuit for the constant current source is described
subsequently. The small diodes D3, D4, D5 provide gate oxide
protection against high voltage transients, e.g., static electricity.
Second Stage
Most of the voltage gain in the CA3140 is provided by the
second amplifier stage, consisting of bipolar transistor Q13
and its cascode connected load resistance provided by
bipolar transistors Q3, Q4. On-chip phase compensation,
sufficient for a majority of the applications is provided by C1.
Additional Miller-Effect compensation (roll off) can be
accomplished, when desired, by simply connecting a small
capacitor between Terminals 1 and 8. Terminal 8 is also
used to strobe the output stage into quiescence. When
terminal 8 is tied to the negative supply rail (Terminal 4) by
mechanical or electrical means, the output Terminal 6
swings low, i.e., approximately to Terminal 4 potential.
Output Stage
The CA3140 Series circuits employ a broad band output stage
that can sink loads to the negative supply to complement the
capability of the PMOS input stage when operating near the
negative rail. Quiescent current in the emitter-follower cascade
circuit (Q17, Q18) is established by transistors (Q14, Q15)
whose base currents are mirrored to current flowing through
diode D2 in the bias circuit section. When the CA3140 is
operating such that output Terminal 6 is sourcing current,
transistor Q18 functions as an emitter-follower to source current
from the V+ bus (Terminal 7), via D7, R9, and R11. Under these
conditions, the collector potential of Q13 is sufficiently high to
permit the necessary flow of base current to emitter follower
Q17 which, in turn, drives Q18.
When the CA3140 is operating such that output Terminal 6 is
sinking current to the V- bus, transistor Q16 is the current
sinking element. Transistor Q16 is mirror connected to D6, R7,
with current fed by way of Q21, R12, and Q20. Transistor Q20, in
turn, is biased by current flow through R13, zener D8, and R14.
The dynamic current sink is controlled by voltage level sensing.
For purposes of explanation, it is assumed that output Terminal
6 is quiescently established at the potential midpoint between
the V+ and V- supply rails. When output current sinking mode
operation is required, the collector potential of transistor Q13 is
driven below its quiescent level, thereby causing Q17, Q18 to
decrease the output voltage at Terminal 6. Thus, the gate
terminal of PMOS transistor Q21 is displaced toward the V- bus,
thereby reducing the channel resistance of Q21. As a
consequence, there is an incremental increase in current flow
through Q20, R12, Q21, D6, R7, and the base of Q16. As a
result, Q16 sinks current from Terminal 6 in direct response to
the incremental change in output voltage caused by Q18. This
sink current flows regardless of load; any excess current is
internally supplied by the emitter-follower Q18. Short circuit
protection of the output circuit is provided by Q19, which is
driven into conduction by the high voltage drop developed
across R11 under output short circuit conditions. Under these
conditions, the collector of Q19 diverts current from Q4 so as to
reduce the base current drive from Q17, thereby limiting current
flow in Q18 to the short circuited load terminal.
Bias Circuit
Quiescent current in all stages (except the dynamic current
sink) of the CA3140 is dependent upon bias current flow in R1.
The function of the bias circuit is to establish and maintain
constant current flow through D1, Q6, Q8 and D2. D1 is a diode
connected transistor mirror connected in parallel with the base
emitter junctions of Q1, Q2, and Q3. D1 may be considered as a
current sampling diode that senses the emitter current of Q6
and automatically adjusts the base current of Q6 (via Q1) to
maintain a constant current through Q6, Q8, D2. The base
currents in Q2, Q3 are also determined by constant current flow
D1. Furthermore, current in diode connected transistor Q2
establishes the currents in transistors Q14 and Q15.
Typical Applications
Wide dynamic range of input and output characteristics with
the most desirable high input impedance characteristics is
achieved in the CA3140 by the use of an unique design based
upon the PMOS Bipolar process. Input common mode voltage
range and output swing capabilities are complementary,
allowing operation with the single supply down to 4V.
The wide dynamic range of these parameters also means
that this device is suitable for many single supply applications, such as, for example, where one input is driven below
the potential of Terminal 4 and the phase sense of the output
signal must be maintained a most important consideration
in comparator applications.
Output Circuit Considerations
Excellent interfacing with TTL circuitry is easily achieved with a
single 6.2V zener diode connected to Terminal 8 as shown in
Figure 1. This connection assures that the maximum output signal swing will not go more positive than the zener voltage minus
two base-to-emitter voltage drops within the CA3140. These
voltages are independent of the operating supply voltage.
3-83
CA3140, CA3140A
Figure 4 shows some typical configurations. Note that a
series resistor, RL, is used in both cases to limit the drive
available to the driven device. Moreover, it is recommended
that a series diode and shunt diode be used at the thyristor
input to prevent large negative transient surges that can
appear at the gate of thyristors, from damaging the
integrated circuit.
V+
5V TO 36V
LOGIC
SUPPLY
5V
7
8
6.2V
6
CA3140
TYPICAL
TTL GATE
5V
3
4
1000
100
+15V
+30V
10
1
0.01
0.1
1.0
10
V+
V+
2
V+
7
2
7
6
CA3140
CA3140
4
5
10k
10k
V-
CA3140
6
3
10k
V-
3-84
V-
CA3140, CA3140A
RS
V+
LOAD
30V
NO LOAD
MT2
120VAC
+HV
LOAD
6
CA3140
RL
3
CA3140
MT1
RL
3
4
FIGURE 4. METHODS OF UTILIZING THE VCE(SAT) SINKING CURRENT CAPABILITY OF THE CA3140 SERIES
FOLLOWER
+15V
7
0.1F
SIMULATED
LOAD
10k
CA3140
6
2k
100pF
4
0.1F
-15V
2k
1mV
INVERTING
5k
1mV
8
INPUT VOLTAGE (V)
10mV
+15V
10mV
4
2
FOLLOWER
CA3140
200
INVERTING
-2
6
100pF
2k
-4
0.1F
4.99k
-6
-8
SIMULATED
LOAD
5k
-10
0.1
0.1F
1mV
10mV
10mV
1.0
SETTLING TIME (s)
5.11k
-15V
1mV
SETTLING POINT
D1
10
1N914
D2
1N914
3-85
100
OL
RL = 2k,
CL = 0pF
-90
-105
-120
-135
80
-150
10K
-75
CA3140, CA3140A
60
RL = 2k,
CL = 100pF
40
1K
100
10
20
0
101
102
103
104
105
106
FREQUENCY (Hz)
107
1
-60
108
RL =
0
+VICR AT TA = 125oC
-0.5
+VICR AT TA = 25oC
+VICR AT TA = -55oC
-1.0
+VOUT AT TA = 125oC
+VOUT AT TA = 25oC
+VOUT AT TA = -55oC
-1.5
-2.0
-2.5
-3.0
10
15
SUPPLY VOLTAGE (V+, V-)
20
-20
20
40
60
80
TEMPERATURE (oC)
100
120
140
-40
1.5
-VICR AT TA = 125oC
1.0
-VICR AT TA = 25oC
0.5
-VOUT FOR
TA = -55oC to 125oC
-VICR AT TA = -55oC
-0.5
-1.0
-1.5
25
10
15
SUPPLY VOLTAGE (V+, V-)
20
25
FIGURE 8. OUTPUT VOLTAGE SWING CAPABILITY AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
3-86
7
OFFSET VOLTAGE SHIFT (mV)
TA = 125oC
FOR METAL CAN PACKAGES
DIFFERENTIAL DC VOLTAGE
(ACROSS TERMINALS 2 AND 3) = 2V
OUTPUT STAGE TOGGLED
6
5
4
3
2
DIFFERENTIAL DC VOLTAGE
(ACROSS TERMINALS 2 AND 3) = 0V
OUTPUT VOLTAGE = V+ / 2
1
0
0
CA3140, CA3140A
Super Sweep Function Generator
A function generator having a wide tuning range is shown in
Figure 10. The 1,000,000/1 adjustment range is accomplished by a single variable potentiometer or by an auxiliary
sweeping signal. The CA3140 functions as a non-inverting
readout amplifier of the triangular signal developed across
the integrating capacitor network connected to the output of
the CA3080A current source.
Buffered triangular output signals are then applied to a second CA3080 functioning as a high speed hysteresis switch.
Output from the switch is returned directly back to the input
of the CA3080A current source, thereby, completing the positive feedback loop
The triangular output level is determined by the four 1N914
level limiting diodes of the second CA3080 and the resistor
divider network connected to Terminal No. 2 (input) of the
CA3080. These diodes establish the input trip level to this
switching stage and, therefore, indirectly determine the
amplitude of the output triangle.
Compensation for propagation delays around the entire loop
is provided by one adjustment on the input of the CA3080.
This adjustment, which provides for a constant generator
amplitude output, is most easily made while the generator is
sweeping. High frequency ramp linearity is adjusted by the
single 7pF to 60pF capacitor in the output of the CA3080A.
It must be emphasized that only the CA3080A is
characterized for maximum output linearity in the current
generator function.
Meter Driver and Buffer Amplifier
Figure 11 shows the CA3140 connected as a meter driver
and buffer amplifier. Low driving impedance is required of
the CA3080A current source to assure smooth operation of
the Frequency Adjustment Control. This low-driving
impedance requirement is easily met by using a CA3140
connected as a voltage follower. Moreover, a meter may be
placed across the input to the CA3080A to give a logarithmic
analog indication of the function generators frequency.
is used
of the
series
similar
3-87
CA3140, CA3140A
CENTERING
-15V 10k
7.5k
+15V
360
3
4
5
2M
51
pF
7-60
pF
-15V
+15V
39k
120
HIGH
FREQUENCY
LEVEL
910k
7-60pF
5.1k
62k
10k
CA3080
+
4
EXTERNAL
OUTPUT
EXTERNAL
OUTPUT
2
11k
11k
10k
0.1
F
FREQUENCY
ADJUSTMENT
+15V
-15V
2k
10k
-15V
+
CA3140
HIGH
FREQ.
SHAPE
100k
FROM BUFFER METER
DRIVER (OPTIONAL)
0.1
F
15k
6
CA3080A
360
SYMMETRY
-15V
+15V
2.7k
-15V
13k
TO OUTPUT
AMPLIFIER
TO
SINE WAVE
SHAPER
1N914
OUTPUT
AMPLIFIER
+15V
FREQUENCY
ADJUSTMENT
+15V
METER DRIVER
AND BUFFER
AMPLIFIER
POWER
SUPPLY 15V
-15V
FUNCTION
GENERATOR
WIDEBAND
LINE DRIVER
SINE WAVE
SHAPER
51
FINE
RATE
SWEEP
GENERATOR
GATE DC LEVEL
SWEEP ADJUST
OFF INT.
COARSE
RATE
V-
EXT.
EXTERNAL
INPUT
SWEEP
LENGTH
V-
1V/Div., 1s/Div.
Three tone test signals, highest frequency 0.5MHz. Note the slight
asymmetry at the three second/cycle signal. This asymmetry is due to
slightly different positive and negative integration from the CA3080A
and from the PC board and component leakages at the 100pA level.
FIGURE 10C. FUNCTION GENERATOR WITH FIXED
FREQUENCIES
3-88
CA3140, CA3140A
500k
FREQUENCY
ADJUSTMENT
10k
FREQUENCY
CALIBRATION
MAXIMUM
620k
7
51k
3
+
6
CA3140
SWEEP IN
3M
4.7k
4
+15V
2k
12k
FREQUENCY 2.4k
CALIBRATION
MINIMUM
2.5
k
0.1F
5.1k
510
3.6k 13
8
D6
D3
12
METER
POSITION
ADJUSTMENT
D4
9.1k
R1
10k
14
2k
6
10k
EXTERNAL
OUTPUT
D1
-15V
10
7
-15V
R3 10k
1M
100
k
2
D2
3
4
D
CA3019 5
DIODE ARRAY
3/ OF CA3086
5
-15V
750k
LOG
SAWTOOTH 18M
1N914
100k
100k FINE
RATE
1M
22M
SAWTOOTH
SYMMETRY
1N914
0.47F
0.047F
8.2k
COARSE
RATE
4700pF
50k
75k
470pF
CA3140
+
4
51k
SAWTOOTH
+15V
0.1
F
LOG+15V
+15V
36k
TRIANGLE
3
100k
TO OUTPUT 2
AMPLIFIER
30k
0.1
F
50k
LOG
RATE
ADJUST
-15V
43k
10k
10k
CA3140
+
4
10k
-15V
EXTERNAL OUTPUT
-15V
3
CA3140
2
LOGVIO
+15V
51k
6.8k
91k
10k
TRIANGLE
25k
3.9
-15V
1
4
100
390
TO
WIDEBAND
OUTPUT
AMPLIFIER
SUBSTRATE
OF CA3019
+15V
9
8
0.1F
1k
200A
M METER
510
CA3140
620
11
5.6k
7.5k
3
2
METER
SENSITIVITY
ADJUSTMENT
0.1F
-15V
+15V
TO CA3080A
OF FUNCTION CA3080A
GENERATOR
(FIGURE 10)
4
5
TRANSISTORS
FROM CA3086
ARRAY
3-89
SAWTOOTH
LOG
GATE
PULSE
OUTPUT
430
R2
1k
CA3140, CA3140A
This circuit can be adjusted most easily with a distortion
analyzer, but a good first approximation can be made by
comparing the output signal with that of a sine wave
generator. The initial slope is adjusted with the
potentiometer R1, followed by an adjustment of R2. The final
slope is established by adjusting R3, thereby adding
additional segments that are contributed by these diodes.
Because there is some interaction among these controls,
repetition of the adjustment procedure may be necessary.
REFERENCE
VOLTAGE
VOLTAGE
ADJUSTMENT
3
CA3140
INPUT
2
REGULATED
OUTPUT
Sweeping Generator
Figure 13 shows a sweeping generator. Three CA3140s are
used in this circuit. One CA3140 is used as an integrator, a
second device is used as a hysteresis switch that determines the starting and stopping points of the sweep. A third
CA3140 is used as a logarithmic shaping network for the log
function. Rates and slopes, as well as sawtooth, triangle,
and logarithmic sweeps are generated by this circuit.
Wideband Output Amplifier
Figure 14 shows a high slew rate, wideband amplifier
suitable for use as a 50 transmission line driver. This
circuit, when used in conjunction with the function generator
and sine wave shaper circuits shown in Figures 10 and 12
provides 18VP-P output open circuited, or 9VP-P output
when terminated in 50. The slew rate required of this
amplifier is 28V/s (18VP-P x x 0.5MHz).
+15V
SIGNAL
LEVEL
ADJUSTMENT
2.5k
-15V
200
2.4pF
2pF
1.8k
2N3053
1N914
2.7
1N914
2.7
51
OUT
2W
1
OUTPUT
DC LEVEL +15V
ADJUSTMENT
3k
2.2
k
CA3140
200
50F
25V
50F
25V
2.2
k
2N4037
-15V
Power Supplies
High input impedance, common mode capability down to the
negative supply and high output drive current capability are
key factors in the design of wide range output voltage
supplies that use a single input voltage to provide a
regulated output voltage that can be adjusted from
essentially 0V to 24V.
Unlike many regulator systems using comparators having a
bipolar transistor input stage, a high impedance reference
voltage divider from a single supply can be used in
connection with the CA3140 (see Figure 15).
3-90
CA3140, CA3140A
back is provided by the 3k and 100k divider network connected to the base of the current sensing transistor.
+30V
2N6385
CURRENT
POWER DARLINGTON LIMITING
ADJUST
D2201
2
75
1k
OUTPUT
0.1 24V
AT 1A
1k
1k
2
2N2102
100
1
3k
1k
56pF
180k
2
6
2.7k 10F
1k
CA3140
100k
82k
3
4
INPUT
+
2.2k
10 11
1 2
8 7
VOLTAGE
ADJUST
5F 50k
100k
14
250F
12
0.01F
13
CA3086
1k
5V/Div., 1s/Div.
62k
HUM AND NOISE OUTPUT <200VRMS
(MEASUREMENT BANDWIDTH ~10MHz)
LINE REGULATION 0.1%/V
LOAD REGULATION
(NO LOAD TO FULL LOAD)
<0.02%
FOLDBACK CURRENT
LIMITER
2N5294
D2201
2
3
+30V
1k 200
1
100k
3k
100k
2N2102
8
1k
56pF
180k
2.7k 10F
1k
CA3140
6
+
100k
82k
3
4
INPUT
+
2.2k
10 11
1 2
8 7
5F 50k
14
VOLTAGE
ADJUST
100k
250F
12
0.01F
13
CA3086
1k
62k
HUM AND NOISE OUTPUT <200VRMS
(MEASUREMENT BANDWIDTH ~10MHz)
LINE REGULATION 0.1%/V
LOAD REGULATION
(NO LOAD TO FULL LOAD)
<0.02%
3-91
CA3140, CA3140A
Figure 19 shows another tone control circuit with similar
boost and cut specifications. The wideband gain of this circuit is equal to the ultimate boost or cut plus one, which in
this case is a gain of eleven. For 20dB boost and cut, the
input loading of this circuit is essentially equal to the value of
the resistance from Terminal No. 3 to ground. A detailed
analysis of this circuit is given in An IC Operational
Transconductance Amplifier (OTA) With Power Capability by
L. Kaplan and H. Wittlinger, IEEE Transactions on Broadcast
and Television Receivers, Vol. BTR-18, No. 3, August, 1972.
NOTES:
+30V
2.2M
7
+
CA3140
0.005F
5.1
M
0.1F
6
4
BOOST
2.2M
0.1
F
0.012F
TREBLE
CUT
200k
(LINEAR) 0.001F
18k
100
pF
7
+
CA3140
0.005F
100pF
5.1M
4
0.022F
2F
- +
0.0022F
0.1F
6
0.1F
-15V
10k
1M
100k
CCW (LOG)
BOOST
BASS
CUT
TONE CONTROL NETWORK
FIGURE 19. TONE CONTROL CIRCUIT USING CA3130 SERIES (20dB MIDBAND GAIN)
BASS
CUT
(LINEAR)
240k
5M
240k
2.2M
750
pF
+32V
750
pF
+15V
7
3
2.2M
0.1
F
2.2
M 2
+
CA3140
0.1
F
6
0.047F
TONE CONTROL
NETWORK
20pF
51k
5M
51k
(LINEAR)
BOOST TREBLE
CUT
TONE CONTROL NETWORK
7
+
CA3140
0.1F
6
0.1F
-15V
NOTES:
9. 15dB Bass and Treble Boost and Cut at 100Hz and 10kHz, Respectively.
10. 25VP-P Output at 20kHz.
11. -3dB at 70kHz from 1kHz Reference.
12. 0dB Flat Position Gain.
3-92
CA3140, CA3140A
Wien Bridge Oscillator
Another application of the CA3140 that makes excellent use
of its high input impedance, high slew rate, and high voltage
qualities is the Wien Bridge sine wave oscillator. A basic Wien
Bridge oscillator is shown in Figure 21. When R1 = R2 = R
and C1 = C2 = C, the frequency equation reduces to the
familiar f = 1/(2RC) and the gain required for oscillation,
AOSC is equal to 3. Note that if C2 is increased by a factor of
four and R2 is reduced by a factor of four, the gain required
for oscillation becomes 1.5, thus permitting a potentially
higher operating frequency closer to the gain bandwidth
product of the CA3140.
C2
R2
NOTES:
+
OUTPUT
RF
C1
R1
RS
R2
C2
1000pF
3
C1 2
1000
pF
R1
7
+
CA3140
0.1F
CA3109
DIODE
ARRAY
6
SUBSTRATE
OF CA3019
1
2
0.1F
7
0.1F
-15V
7.5k
R1 = R2 = R
50Hz, R =
100Hz, R =
1kHz, R =
10kHz, R =
30kHz, R =
1
f = ------------------------------------------2 R 1 C 1 R 2 C 2
C1 R2
AO SC = 1 + ------- + ------C2 R1
OUTPUT
19VP-P TO 22VP-P
THD <0.3%
+15V
3.3M
1.6M
160M
16M
5.1M
3.6k
500
RF
AC L = 1 + -------RS
SAMPLE
-15
1N914
HOLD
+15V
1N914
INPUT
+15V
5
2k
0.1F
CA3080A
2
30k
STROBE
0.1F
2k
3.5k
7
3
+
CA3140
6
0.1
F
100k
-15V
-15V
200pF
2k
C1
200pF
2k
400
0.1F
30pF
SIMULATED LOAD
NOT REQUIRED
3-93
CA3140, CA3140A
Pulse droop during the hold interval is 170pA/200pF which is
0.85V/s; (i.e., 170pA/200pF). In this case, 170pA represents
the typical leakage current of the CA3080A when strobed off. If
C1 were increased to 2000pF, the hold-droop rate will
decrease to 0.085V/s, but the slew rate would decrease to
0.25V/s. The parallel diode network connected between
Terminal 3 of the CA3080A and Terminal 6 of the CA3140
prevents large input signal feedthrough across the input
terminals of the CA3080A to the 200pF storage capacitor when
the CA3080A is strobed off. Figure 24 shows dynamic
characteristic waveforms of this sample-and-hold system.
Current Amplifier
The low input terminal current needed to drive the CA3140
makes it ideal for use in current amplifier applications such
as the one shown in Figure 25 (see Note 14). In this circuit,
low current is supplied at the input potential as the power
supply to load resistor RL. This load current is increased by
the multiplication factor R2/R1, when the load current is monitored by the power supply meter M. Thus, if the load current
is 100nA, with values shown, the load current presented to
the supply will be 100A; a much easier current to measure
in many systems.
R1
10k
+15V
IL x
R2
R1
0.1F
7
+
CA3140
3
M
2
POWER
SUPPLY
6
0.1F
R2
10M
IL
RL
100k
4.3k
-15V
Note that the input and output voltages are transferred at the
same potential and only the output current is multiplied by
the scale factor.
SAMPLING RESPONSE
Top Trace: Output; 100mV/Div., 500ns/Div.
Bottom Trace: Input; 20V/Div., 500ns/Div.
FIGURE 24. SAMPLE AND HOLD SYSTEM DYNAMIC
CHARACTERISTICS WAVEFORMS
NOTE:
14. Operational Amplifiers Design and Applications, J. G. Graeme,
McGraw-Hill Book Company, page 308, Negative Immittance
Converter Circuits.
3-94
CA3140, CA3140A
+15V
R2
5k
+15V
0.1F
0.1F
R1
10k
+
8
6
4
1N914
100k
OFFSET
ADJUST
100pF
10k
R3
SIMULATED
LOAD
+
CA3140
CA3140
3
INPUT
100k
2k
0.1F
PEAK
ADJUST
10k
-15V
2k
R2
R3
GAIN = ------- = X = ----------------------------R1
R1 R2 + R3
BW (-3dB) = 4.5MHz
SR = 9V/s
0.05F
X+X
R 3 = ----------------- R 1
1X
R2
5k
FOR X = 0.5 --------------- = ------10k
R1
0.75
R 3 = 10k ----------- = 15k
0.5
OUTPUT
0
INPUT
0
+15V
7
RS
3
1M
+
CA3140
0.01F
NOISE VOLTAGE
OUTPUT
30.1k
-15V
BW (-3dB) = 140kHz
TOTAL NOISE VOLTAGE
(REFERRED TO INPUT ) = 48V (TYP)
1k
3-95
CA3140, CA3140A
Typical Performance Curves
20
GAIN BANDWIDTH PRODUCT (MHz)
RL = 2k
TA = -55oC
25oC
125
125oC
100
75
50
25
RL = 2k
CL = 100pF
10
0
0
10
15
20
25
125oC
TA = -55oC
15
10
5
0
10
15
SUPPLY VOLTAGE (V)
20
25
25
20
15
10
100K
7
6
TA = -55oC
25oC
125oC
4
3
2
1
0
10
15
20
25
25
0
10K
20
RL =
25oC
15
RL = 2k
CL = 100pF
10
20
25oC
125oC
TA = -55oC
1M
100
80
CA3140B
60
CA3140, CA3140A
40
20
0
101
4M
FREQUENCY (Hz)
102
103
104
105
FREQUENCY (Hz)
106
107
3-96
CA3140, CA3140A
Typical Performance Curves
1000
(Continued)
100
10
1
1
101
102
103
FREQUENCY (Hz)
104
105
100
CA3140B
+PSRR
CA3140
80
CA3140A
60
40
-PSRR
20
POWER SUPPLY REJECTION RATIO
(PSRR) = VIO/VS
0
101
102
103
104
105
FREQUENCY (Hz)
10
20
107
106
30
40
50
60
65
61 60
50
40
58-66
(1.473-1.676)
30
20
10
0
4-10
(0.102-0.254)
62-70
(1.575-1.778)
3-97