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Package Types
NC 1
VIN
8 NC
VSS 4
7 VDD
VIN+ 3
7 VDD
6 VOUT
5 NC
4 VIN
VIN+ 3
6 VDD
-
5 CS
4 VIN
VOUTA 1
14 VOUTD
- + + - 13 VIND_
VINA+ 3
12 VIND+
VDD 4
VOUTB 7
VOUTA 1
_
VINA 2
4 VIN
VINA_ 2
VINB+ 5
VINB_ 6
MCP6294
PDIP, SOIC, TSSOP
SOT-23-6
VOUT 1
VSS 2
VIN+ 3
MCP6292
PDIP, SOIC, MSOP
5 VSS
VOUT 1
VDD 2
MCP6293
VSS 4
8 CS
+
5 VDD
VSS 2
6 VOUT
MCP6293
PDIP, SOIC, MSOP
VIN_ 2
VIN+ 3
SOT-23-5
VOUT 1
5 NC
NC 1
MCP6291R
SOT-23-5
VIN+ 3
MCP6291
MCP6291
PDIP, SOIC, MSOP
11 VSS
10 VINC+
-+ +- 9 V _
INC
VINA+ 3
8 VDD
7 VOUTB
- +
+ -
VSS 4
6 VINB_
5 VINB+
MCP6295
PDIP, SOIC, MSOP
VOUTA/VINB+ 1
VINA_ 2
VINA+ 3
VSS 4
8 VDD
7 VOUTB
- +
+ -
_
6 VINB
5 CS
8 VOUTC
DS21812E-page 1
MCP6291/1R/2/3/4/5
1.0
ELECTRICAL
CHARACTERISTICS
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VOUT VDD/2,
VCM = VDD/2, VL = VDD/2, RL = 10 k to VL and CS is tied low (refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
VOS
-3.0
+3.0
mV
VOS
-5.0
+5.0
mV
TA = -40C to +125C,
VCM = VSS (Note 1)
VOS/TA
1.7
V/C
TA = -40C to +125C,
VCM = VSS (Note 1)
PSRR
70
90
dB
IB
1.0
pA
Note 2
At Temperature
IB
50
200
pA
TA = +85C (Note 2)
At Temperature
IB
nA
TA = +125C (Note 2)
IOS
1.0
pA
Note 3
ZCM
1013||6
||pF
Note 3
ZDIFF
1013||3
||pF
Note 3
VCMR
VSS 0.3
VDD + 0.3
CMRR
70
85
dB
CMRR
65
80
dB
AOL
90
110
dB
VOL, VOH
VSS + 15
VDD 15
mV
ISC
25
mA
VDD
2.4
6.0
IQ
0.7
1.0
1.3
mA
Input Offset
Open-Loop Gain
DC Open-Loop Gain (Large Signal)
Output
Maximum Output Voltage Swing
Output Short Circuit Current
Power Supply
Supply Voltage
Quiescent Current per Amplifier
Note 1:
2:
3:
4:
5:
The MCP6295s VCM for op amp B (pins VOUTA/VINB+ and VINB) is VSS + 100 mV.
The current at the MCP6295s VINB pin is specified by IB only.
This specification does not apply to the MCP6295s VOUTA/VINB+ pin.
The MCP6295s VINB pin (op amp B) has a common mode range (VCMR) of VSS + 100 mV to VDD 100 mV.
The MCP6295s VOUTA/VINB+ pin (op amp B) has a voltage range specified by VOH and VOL.
All parts with date codes November 2007 and later have been screened to ensure operation at VDD = 6.0V. However,
the other minimum and maximum specifications are measured at 2.4V and or 5.5V.
DS21812E-page 2
MCP6291/1R/2/3/4/5
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2,
VOUT VDD/2, VL = VDD/2, RL = 10 k to VL, CL = 60 pF, and CS is tied low (refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
GBWP
10.0
MHz
PM
65
Slew Rate
SR
V/s
G = +1 V/V
Noise
Input Noise Voltage
Eni
4.2
VP-P
eni
8.7
nV/Hz
f = 0.1 Hz to 10 Hz
f = 10 kHz
ini
fA/Hz
f = 1 kHz
Sym
Min
Typ
Max
Units
Conditions
VIL
VSS
0.2 VDD
ICSL
0.01
VIH
0.8 VDD
VDD
ICSH
0.7
CS = VDD
ISS
-0.7
CS = VDD
0.01
CS = VDD
tON
10
tOFF
0.01
VHYST
0.6
VDD = 5V
CS Low Specifications
CS = VSS
CS High Specifications
Hysteresis
Note 1:
The input condition (VIN) specified applies to both op amp A and B of the MCP6295. The dynamic specification is tested
at the output of op amp B (VOUTB).
DS21812E-page 3
MCP6291/1R/2/3/4/5
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +2.4V to +5.5V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
TA
-40
+125
TA
-65
+150
Conditions
Temperature Ranges
Note
JA
256
C/W
JA
230
C/W
JA
85
C/W
JA
163
C/W
JA
206
C/W
JA
70
C/W
JA
120
C/W
JA
100
C/W
Note:
The Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150C.
1.1
CS
VIL
VIH
tOFF
tON
VOUT
ISS
0.7 A
(typical)
ICS
Hi-Z
Hi-Z
-0.7 A
(typical)
Test Circuits
-1.0 mA
(typical)
10 nA
(typical)
-0.7 A
(typical)
0.7 A
(typical)
FIGURE 1-1:
Timing Diagram for the
Chip Select (CS) pin on the MCP6293 and
MCP6295.
VDD
VIN
RN
0.1 F 1 F
VOUT
MCP629X
CL
VDD/2 RG
RL
RF
VL
FIGURE 1-2:
AC and DC Test Circuit for
Most Non-Inverting Gain Conditions.
VDD
VDD/2
RN
0.1 F 1 F
VOUT
MCP629X
CL
VIN
RG
RL
RF
VL
FIGURE 1-3:
AC and DC Test Circuit for
Most Inverting Gain Conditions.
DS21812E-page 4
MCP6291/1R/2/3/4/5
2.0
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
25%
Percentage of Occurrences
20%
840 Samples
VCM = VSS
TA = -40C to +125C
15%
10%
5%
FIGURE 2-4:
60
70
80
90
100
350
FIGURE 2-5:
TA = +125 C.
VDD = 2.4V
400
300
250
200
TA = -40C
TA = +25C
TA = +85C
TA = +125C
150
100
50
0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
FIGURE 2-3:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 2.4V.
10
-2
FIGURE 2-2:
TA = +85 C.
3000
50
2800
40
2600
30
2400
20
2200
10
2000
0%
1800
0%
1600
5%
5%
1400
10%
10%
1200
15%
15%
1000
20%
20%
800
25%
210 Samples
TA = +125C
600
30%
25%
35%
Percentage of Occurrences
210 Samples
TA = 85C
400
30%
40%
Percentage of Occurrences
200
FIGURE 2-1:
-4
-6
-8
0%
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
-0.4
-0.8
-1.2
-1.6
-2.0
-2.4
840 Samples
VCM = VSS
-10
12%
11%
10%
9%
8%
7%
6%
5%
4%
3%
2%
1%
0%
-2.8
Percentage of Occurrences
Note: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2,
VL = VDD/2, RL = 10 k to VL, CL = 60 pF, and CS is tied low.
3.0
800
VDD = 5.5V
750
700
650
600
550
500
450
400
350
300
250
200
-0.5 0.0 0.5 1.0 1.5 2.0
TA = +125C
TA = +85C
TA = +25C
TA = -40C
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 5.5V.
DS21812E-page 5
MCP6291/1R/2/3/4/5
TYPICAL PERFORMANCE CURVES (CONTINUED)
700
650
600
550
500
450
400
350
300
250
200
150
100
10,000
VCM = VSS
Representative Part
Note: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2,
VL = VDD/2, RL = 10 k to VL, CL = 60 pF, and CS is tied low.
VDD = 5.5V
VDD = 2.4V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VCM = VDD
VDD = 5.5V
1,000
100
5.5
25
35
45
FIGURE 2-7:
Output Voltage.
65
75
85
95
FIGURE 2-10:
Input Bias, Input Offset
Currents vs. Ambient Temperature.
120
110
100
110
90
55
CMRR
80
PSRR-
70
PSRR+
60
50
40
100
CMRR
90
PSRR
VCM = VSS
80
70
30
20
60
1.E+00
1.E+01
10
1.E+02
1.E+03
100
1.E+04
1k
1.E+05
10k
-50
1.E+06
100k
1M
-25
Frequency (Hz)
FIGURE 2-11:
Temperature.
55
2.5
45
2.0
FIGURE 2-8:
Frequency.
35
25
15
5
-5
TA = +85C
VDD = 5.5V
-15
-25
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
FIGURE 2-9:
Input Bias, Offset Currents
vs. Common Mode Input Voltage at TA = +85C.
DS21812E-page 6
25
50
75
100
125
TA = +125C
VDD = 5.5V
1.5
1.0
0.5
0.0
Input Offset Current
-0.5
-1.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
FIGURE 2-12:
Input Bias, Offset Currents
vs. Common Mode Input Voltage at TA = +125C.
MCP6291/1R/2/3/4/5
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2,
VL = VDD/2, RL = 10 k to VL, CL = 60 pF, and CS is tied low.
1000
1.2
1.0
0.8
TA = +125C
TA = +85C
TA = +25C
TA = -40C
0.6
0.4
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
100
10
VOL - VSS
VDD - VOH
1
0.01
0.1
FIGURE 2-13:
Quiescent Current vs.
Power Supply Voltage.
16
-30
14
80
-60
Phase
60
-90
1k
10k 100k
1M
90
-210
10M 100M
75
70
65
60
PM, VDD = 5.5V
PM, VDD = 2.4V
-50
-25
25
50
75
100
50
125
FIGURE 2-17:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
12
10
VDD = 5.5V
VDD = 2.4V
8
6
4
2
1M
1.E+07
100k
1.E+06
10k
1.E+05
1k
1.E+04
0
1.E+03
55
10
0.1
80
10
Frequency (Hz)
FIGURE 2-14:
Frequency.
85
12
1.E+08
100
1.E+07
1.E-01
10
1.E+06
-180
1.E+05
0
1.E+04
-150
1.E+03
20
1.E+02
-120
1.E+01
40
Gain
1.E+00
100
10
FIGURE 2-16:
Output Voltage Headroom
vs. Output Current Magnitude.
Open-Loop Phase ()
120
-20
0.1
Phase Margin ()
Quiescent Current
(mA/Amplifier)
1.4
1.6
10M
-50
-25
Frequency (Hz)
FIGURE 2-15:
Maximum Output Voltage
Swing vs. Frequency.
25
50
75
100
125
FIGURE 2-18:
Temperature.
DS21812E-page 7
MCP6291/1R/2/3/4/5
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2,
VL = VDD/2, RL = 10 k to VL, CL = 60 pF, and CS is tied low.
11
1,000
100
10
1
0.1
1.E-01
1.E+00
1.E+01
1.E+02
10
100
1.E+03
1.E+04
1k
10k
1.E+05
1.E+06
100k
10
9
8
f = 10 kHz
VDD = 5.0V
7
6
5
4
3
2
1
0
1M
0.0
0.5
Frequency (Hz)
FIGURE 2-19:
vs. Frequency.
1.5
2.5
3.0
3.5
4.0
4.5
5.0
140
Channel-to-Channel
Separation (dB)
30
25
20
15
TA = +125C
TA = +85C
TA = +25C
TA = -40C
10
5
0
130
120
110
100
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
10
1.2
1.4
0.8
Hysteresis
0.6
0.4
0.2
1.6
CS swept
high to low
CS swept
low to high
Quiescent Current
(mA/Amplifier)
1.0
FIGURE 2-23:
Channel-to-Channel
Separation vs. Frequency (MCP6292, MCP6294
and MCP6295 only).
VDD = 2.4V
100
Frequency (kHz)
FIGURE 2-20:
Output Short Circuit Current
vs. Power Supply Voltage.
Quiescent Current
(mA/Amplifier)
2.0
FIGURE 2-22:
Input Noise Voltage Density
vs. Common Mode Input Voltage at 10 kHz.
35
1.0
VDD = 5.5V
Hysteresis
1.2
1.0
0.8
CS swept
high to low
0.6
CS swept
low to high
0.4
0.2
0.0
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
FIGURE 2-21:
Quiescent Current vs.
Chip Select (CS) Voltage at VDD = 2.4V
(MCP6293 and MCP6295 only).
DS21812E-page 8
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
FIGURE 2-24:
Quiescent Current vs.
Chip Select (CS) Voltage at VDD = 5.5V
(MCP6293 and MCP6295 only).
MCP6291/1R/2/3/4/5
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2,
VL = VDD/2, RL = 10 k to VL, CL = 60 pF, and CS is tied low.
5.0
5.0
G = +1V/V
VDD = 5.0V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.5
0.0
G = -1V/V
VDD = 5.0V
4.5
0.E+00
1.E-06
2.E-06
3.E-06
4.E-06
5.E-06
6.E-06
7.E-06
8.E-06
9.E-06
0.0
1.E-05
0.E+00
1.E-06
2.E-06
3.E-06
4.E-06
FIGURE 2-25:
Pulse Response.
5.E-06
6.E-06
7.E-06
Large-Signal Non-inverting
FIGURE 2-28:
Response.
9.E-06
1.E-05
G = -1V/V
G = +1V/V
Small-Signal Non-inverting
3.0
2.0
1.5
Output On
VOUT
1.0
0.5
Output High-Z
0.0
0.E+00
5.E-06
1.E-05
2.E-05
2.E-05
3.E-05
3.E-05
4.E-05
4.E-05
5.E-05
5.E-05
Time (5 s/div)
FIGURE 2-27:
Chip Select (CS) to
Amplifier Output Response Time at VDD = 2.4V
(MCP6293 and MCP6295 only).
6.0
VDD = 2.4V
G = +1V/V
VIN = VSS
CS Voltage
2.5
FIGURE 2-29:
Response.
FIGURE 2-26:
Pulse Response.
8.E-06
Time (1 s/div)
Time (1 s/div)
VDD = 5.5V
G = +1V/V
VIN = VSS
5.5
CS Voltage
5.0
4.5
4.0
3.5
VOUT
3.0
Output On
2.5
2.0
1.5
1.0
Output High-Z
0.5
0.0
0.E+00
5.E-06
1.E-05
2.E-05
2.E-05
3.E-05
3.E-05
4.E-05
4.E-05
5.E-05
5.E-05
Time (5 s/div)
FIGURE 2-30:
Chip Select (CS) to
Amplifier Output Response Time at VDD = 5.5V
(MCP6293 and MCP6295 only).
DS21812E-page 9
MCP6291/1R/2/3/4/5
TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: Unless otherwise indicated, TA = +25C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2,
VL = VDD/2, RL = 10 k to VL, CL = 60 pF, and CS is tied low.
6
+125C
+85C
+25C
-40C
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
FIGURE 2-31:
Measured Input Current vs.
Input Voltage (below VSS).
DS21812E-page 10
1.E-02
10m
1m
1.E-03
100
1.E-04
10
1.E-05
1
1.E-06
100n
1.E-07
10n
1.E-08
1n
1.E-09
100p
1.E-10
10p
1.E-11
1p
1.E-12
VDD = 5.0V
G = +2V/V
5
4
VOUT
VIN
3
2
1
0
-1
-15
-14
-13
-12
-11
-10
-9
-8
-7
-6
-5
Time (1 ms/div)
FIGURE 2-32:
The MCP6291/1R/2/3/4/5
Show No Phase Reversal.
MCP6291/1R/2/3/4/5
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1 (single op amps) and Table 3-2 (dual and quad op amps).
TABLE 3-1:
MCP6291
MCP6293
MCP6291R
SOT-23-6
SOT-23-5
2
3
VOUT
Analog Output
VIN
Inverting Input
VIN+
Non-inverting Input
VDD
VSS
CS
Chip Select
1,5
NC
No Internal Connection
MCP6292
MCP6295
Symbol
VOUTA
VINA
VINA+
VDD
Description
VINB+
VINB
VOUTB
VOUTC
VINC
10
VINC+
11
VSS
12
VIND+
13
VIND
14
VOUTD
VOUTA/VINB+
CS
Analog Outputs
3.2
Analog Inputs
The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents.
3.3
Description
1,5,8
TABLE 3-2:
3.1
Symbol
PDIP, SOIC,
MSOP
PDIP, SOIC,
MSOP
3.4
3.5
DS21812E-page 11
MCP6291/1R/2/3/4/5
4.0
APPLICATION INFORMATION
4.1
Rail-to-Rail Inputs
4.1.1
R1
VDD Bond
Pad
Input
Stage
Bond
VIN
Pad
VSS Bond
Pad
FIGURE 4-1:
Structures.
DS21812E-page 12
VOUT
R2
VSS (minimum expected V1)
2 mA
VSS (minimum expected V2)
R2 >
2 mA
R1 >
FIGURE 4-2:
Inputs.
4.1.3
VIN+ Bond
Pad
MCP629X
V2
PHASE REVERSAL
4.1.2
D2
NORMAL OPERATION
4.2
Rail-to-Rail Output
MCP6291/1R/2/3/4/5
4.3
Capacitive Loads
4.4
RISO
MCP629X
VOUT
VIN
CL
4.5
FIGURE 4-3:
Output Resistor, RISO
stabilizes large capacitive loads.
VINA
VINA+
2
3
VOUTB
MCP6295
5
CS
100
Recommended R ISO ()
FIGURE 4-5:
The output of op amp A is loaded by the input impedance of op amp B, which is typically 1013||6 pF, as
specified in the DC specification table (Refer to
Section 4.3 Capacitive Loads for further details
regarding capacitive loads).
GN = 1 V/V
GN 2 V/V
10
10
100
1,000
10,000
FIGURE 4-4:
Recommended RISO Values
for Capacitive Loads.
DS21812E-page 13
MCP6291/1R/2/3/4/5
4.6
Supply Bypass
4.8
4.7
Unused Op Amps
VIN+
VSS
MCP6294 (B)
VDD
R1
VDD
Guard Ring
VDD
R2
VREF
FIGURE 4-7:
for Inverting Gain.
1.
R2
V REF = V DD -----------------R1 + R2
FIGURE 4-6:
Unused Op Amps.
2.
DS21812E-page 14
MCP6291/1R/2/3/4/5
4.9
Application Circuits
4.9.1
4.9.3
R1
R2
R4
VOUT
VIN
C1
R3
C4
C3
CASCADED OP AMP
APPLICATIONS
4.9.3.1
MCP6291
VDD/2
FIGURE 4-8:
Pass Filter.
Load Isolation
4.9.2
PHOTODIODE AMPLIFIER
VOUTB
Figure 4-9 shows a photodiode biased in the photovoltaic mode for high precision. The resistor R converts
the diode current ID to the voltage VOUT. The capacitor
is used to limit the bandwidth or to stabilize the circuit
against the diodes capacitance (it is not always
needed).
MCP6295
Load
CS
FIGURE 4-10:
Buffer.
C
R
ID
VOUT
light
MCP6291
VDD/2
FIGURE 4-9:
Photodiode Amplifier.
DS21812E-page 15
MCP6291/1R/2/3/4/5
4.9.3.2
Cascaded Gain
4.9.3.4
Figure 4-11 shows a cascaded gain circuit configuration with Chip Select. Op amps A and B are configured
in a non-inverting amplifier configuration. In this configuration, it is important to note that the input offset voltage of op amp A is amplified by the gain of op amp A
and B, as shown below:
V OUT = V IN G A G B + V OSA G A G B + V OSB G B
Where:
R2
GA
op amp A gain
GB
op amp B gain
VOSA
VOSB
C2
RF
VIN
R1
MCP6295
C1
CS
R 1 C 1 = ( R 2 || R F )C 2
R4
R3
R2
R1
FIGURE 4-13:
Buffered Non-inverting
Integrator with Chip Select.
4.9.3.5
A
VIN
CS
4.9.3.3
Difference Amplifier
VIN1
R2
R2
VOUT
MCP6295
FIGURE 4-11:
Configuration.
VOUT
VIN
R1
C1
B
VOUT
A
MCP6295
R3
CS
R1
B
A
R1
VOUT
FIGURE 4-14:
Compensation.
MCP6295
CS
FIGURE 4-12:
DS21812E-page 16
MCP6291/1R/2/3/4/5
4.9.3.6
Figure 4-15 is a second-order multiple feedback lowpass filter with Chip Select. Use the FilterLab software
from Microchip to determine the R and C values for the
op amp As second-order filter. Op amp B can be used
to add a pole-zero pair using C3, R6 and R7.
R6
R1
C1
R3
C3
R7
R2
VIN
R5
C2
Capacitorless Second-Order
Low-Pass filter with Chip Select
VOUT
MCP6295
R4
4.9.3.8
VIN
R1
R2
R3
CS
FIGURE 4-15:
Second-Order Multiple
Feedback Low-Pass Filter with an Extra PoleZero Pair.
4.9.3.7
R4
R3
VIN
R1
R5
B
VREF
VOUT
MCP6295
CS
FIGURE 4-17:
Capacitorless Second-Order
Low-Pass Filter with Chip Select.
C3
R6
B
VOUT
MCP6295
C1
C2
CS
FIGURE 4-16:
Second-Order Sallen-Key
Low-Pass Filter with an Extra Pole-Zero Pair and
Chip Select.
DS21812E-page 17
MCP6291/1R/2/3/4/5
5.0
DESIGN AIDS
5.1
5.2
FilterLab Software
5.3
5.4
5.5
Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to
help you achieve faster time to market. For a complete
listing of these boards and their corresponding users
guides and technical information, visit the Microchip
web site at www.microchip.com/analogtools.
Two of our boards that are especially useful are:
P/N SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP
Evaluation Board
P/N SOIC14EV: 14-Pin SOIC/TSSOP/DIP Evaluation Board
5.6
Application Notes
The following Microchip Application Notes are available on the Microchip web site at www.microchip. com/
appnotes and are recommended as supplemental reference resources.
ADN003: Select the Right Operational Amplifier for
your Filtering Circuits, DS21821
AN722: Operational Amplifier Topologies and DC
Specifications, DS00722
AN723: Operational Amplifier AC Specifications and
Applications, DS00723
AN884: Driving Capacitive Loads With Op Amps,
DS00884
AN990: Analog Sensor Conditioning Circuits An
Overview, DS00990
These application notes and others are listed in the
design guide:
Signal Chain Design Guide, DS21825
DS21812E-page 18
MCP6291/1R/2/3/4/5
6.0
PACKAGING INFORMATION
6.1
Device
XXNN
Example:
Code
MCP6291
CJNN
MCP6291R
EVNN
CJ25
Example:
Device
XXNN
MCP6293
Code
CMNN
8-Lead MSOP
CM25
Example:
XXXXXX
6291E
YWWNNN
436256
MCP6291
E/P256
0436
e3
MCP6291
e3
E/P^^256
0743
OR
Example:
MCP6291
E/SN0436
256
Legend: XX...X
Y
YY
WW
NNN
Note:
Example:
OR
MCP6291E
e3
SN^^0743
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week 01)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS21812E-page 19
MCP6291/1R/2/3/4/5
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6294)
Example:
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
MCP6294-E/P
0436256
MCP6294
e3
E/P^^
0743256
OR
Example:
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
MCP6294ESL
0436256
MCP6294
E/SL^^
e3
0436256
OR
DS21812E-page 20
Example:
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6294EST
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NNN
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MCP6291/1R/2/3/4/5
NOTES:
DS21812E-page 30
MCP6291/1R/2/3/4/5
APPENDIX A:
REVISION HISTORY
2.
3.
4.
5.
6.
7.
8.
Updated notes to Section 1.0 Electrical Characteristics. Increased absolute maximum voltage range of input pins. Increased maximum
operating supply voltage (VDD).
Added Test Circuits.
Added Figure 2-31 and Figure 2-32.
Added Section 4.1.1 Phase Reversal,
Section 4.1.2 Input Voltage and Current
Limits, and Section 4.1.3 Normal Operation.
Added Section 4.7 Unused Op Amps.
Updated Section 5.0 Design Aids.
Corrected Package Markings.
Updated Package Outline Drawing.
6.
DS21812E-page 31
MCP6291/1R/2/3/4/5
NOTES:
DS21812E-page 32
MCP6291/1R/2/3/4/5
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
/XX
Temperature
Range
Package
Examples:
a)
b)
c)
Device:
MCP6291:
MCP6291T:
MCP6291RT:
MCP6292:
MCP6292T:
MCP6293:
MCP6293T:
MCP6294:
MCP6294T:
MCP6295:
MCP6295T:
Single Op Amp
Single Op Amp
(Tape and Reel)
(SOIC, MSOP, SOT-23-5)
Single Op Amp
(Tape and Reel) (SOT-23-5)
Dual Op Amp
Dual Op Amp
(Tape and Reel) (SOIC, MSOP)
Single Op Amp with Chip Select
Single Op Amp with Chip Select
(Tape and Reel)
(SOIC, MSOP, SOT-23-6)
Quad Op Amp
Quad Op Amp
(Tape and Reel) (SOIC, TSSOP)
Dual Op Amp with Chip Select
Dual Op Amp with Chip Select
(Tape and Reel) (SOIC, MSOP)
d)
e)
a)
b)
c)
d)
a)
b)
Temperature Range:
= -40 C to +125 C
Package:
c)
d)
Extended Temperature,
8 lead SOIC package.
MCP6291-E/MS: Extended Temperature,
8 lead MSOP package.
MCP6291-E/P:
Extended Temperature,
8 lead PDIP package.
MCP6291T-E/OT: Tape and Reel,
Extended Temperature,
5 lead SOT-23 package.
MCP6291RT-E/OT: Tape and Reel,
Extended Temperature,
5 lead SOT-23 package.
MCP6292-E/SN:
Extended Temperature,
8 lead SOIC package.
MCP6292-E/MS: Extended Temperature,
8 lead MSOP package.
MCP6292-E/P:
Extended Temperature,
8 lead PDIP package.
MCP6292T-E/SN: Tape and Reel,
Extended Temperature,
8 lead SOIC package.
MCP6293-E/SN:
Extended Temperature,
8 lead SOIC package.
MCP6293-E/MS: Extended Temperature,
8 lead MSOP package.
MCP6293-E/P:
Extended Temperature,
8 lead PDIP package.
MCP6293T-E/CH: Tape and Reel,
Extended Temperature,
6 lead SOT-23 package.
a)
MCP6294-E/P:
b)
MCP6294T-E/SL:
c)
MCP6294-E/SL:
d)
MCP6294-E/ST:
a)
MCP6295-E/SN:
b)
c)
d)
MCP6291-E/SN:
Extended Temperature,
14 lead PDIP package.
Tape and Reel,
Extended Temperature,
14 lead SOIC package.
Extended Temperature,
14 lead SOIC package.
Extended Temperature,
14 lead TSSOP package.
Extended Temperature,
8 lead SOIC package.
MCP6295-E/MS: Extended Temperature,
8 lead MSOP package.
MCP6295-E/P:
Extended Temperature,
8 lead PDIP package.
MCP6295T-E/SN: Tape and Reel,
Extended Temperature,
8 lead SOIC package.
DS21812E-page 33
MCP6291/1R/2/3/4/5
NOTES:
DS21812E-page 34
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchips Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchips code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC,
PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable
Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The
Embedded Control Solutions Company are registered
trademarks of Microchip Technology Incorporated in the
U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi,
MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit,
PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Smart Serial, SmartTel, Total Endurance, UNI/O,
WiperLock and ZENA are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
2007, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
DS21812E-page 35
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10/05/07
DS21812E-page 36