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USOO5563426A
United States Patent [19]
Zhang et al.
[45]
[54]
Japan
[73] Assignee: Semiconductor Energy Laboratory
Co., Ltd., Kanagawa-ken, Japan
[21] APPI- N91 341,106
[22] Filed!
NOV- 18, 1994
_
[30]
Foreign Application Priority Data
Dec. 4, 1992 [JP] Japan .................................. .. 4350545
1111.27, 1993 UP] Japan ....
.. 5-204775
[JP]
OTHER PUBLICATIONS
C. Hayzelden et al., In Situ Transmission Electron Micros
copy Studies of SilicideMediated Crystallization of Amor
Nov_ 4 1993
Oct. 8, 1996
Date of Patent:
5,563,426
Japan ____ __
5-298944
[57]
ABSTRACT
[52]
H01L 29/04
US. Cl. ................................ .. 257/66; 257/69; 257/70
[58]
[56]
References Cited
4,727,044
5,147,826
437/233
5,275,851
427/578
5,313,076
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US. Patent
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Oct. 8, 1996
Sheet 1 of 9
5,563,426
US. Patent
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Sheet 2 of 9
5,563,426
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Sheet 3 of 9
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FIG. 4(A)
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5,563,426
1
such a semiconductor.
25
?lm used for a thin ?lm device such as a thin ?lm insulated
this speci?cation.
ability.
35
posed.
Generally, a ?eld mobility of a semiconductor in an
45
55
tance and can be handled in the same manner with the wafer
substrate area increases. Accordingly, it is used only for TF1 60 it could not be used naturally for peripheral circuits of a
display and for a driving circuit of an image sensor which
integrated circuits having a relatively small area.
require a high speed operation.
On the other hand, non-alkaline glass has a problem in
On the other hand, a crystalline semiconductor has a ?eld
terms of heat resistance, though its cost is su?iciently low as
mobility larger than that of the amorphous semiconductor
compare to that of silica glass. Because its strain point is
generally around 550to 650 C., or less than 600 C. in case 65 and accordingly, a high speed operation is possible. For
example, such a large value as 300 cm2/V s has been
of a readily available material, such problems as irreversible
shrinkage and warp are caused on the substrate in a heat
5,563,426
3
mixedly mounted.
SUMMARY OF THE INVENTION
The present invention is characterized in that a crystalline
50
high.
The present invention is intended to solve such di?icult
problems, but it is not desirable to complicate the process
and to lower its yield or to increase its cost for that end. What
55 then heating for V hours in an atmosphere containing
the present invention intends is to fabricate two kinds of
nitrogen: (10) heating for W hours in an atmosphere con
TFTs, i.e. a TF1" in which a high mobility is required and a
taining hydrogen, heating for X hours in an atmosphere
TFI in which a leak current is required to be low, readily and
containing nitrogen and then heating for Y hours in an
65
5,563,426
5
are parted and after putting the parted molecules into a state
that they would not couple with other molecules again,
20
zation in solid phase also could not give any solution to this
problem.
Then the inventor of the present invention thought of
lowering the blocking energy in the aforementioned process
by some catalytic action which is totally different from the
Although Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Sc, Ti, V, Cr,
Mn, Cu, Zn, Au and Ag are used in the present invention,
25
tration of Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Sc, Ti, V, Cr, Mn,
Cu, Zn, Au and Ag in the silicon ?lm of the present invention
was typically more than 0.005 atomic percent and less than
1 atomic percent.
In using the crystal silicon ?lm fabricated according to the
reaction could be observed even at 450 C. Though it is a 50 the description above. Accordingly, a pattern of a coating
?lm.
is not preferable as a material containing those metal ele
The ?rst method can be implemented by using a normal
ments, because oxide is a stable compound and cannot start
photolithographic means or lift-01f means. The second
the aforementioned reaction.
65 method is complicated more or less. That is, if the ?lm or the
5,563,426
7
25
required to be less.
In the ?rst method, because the metal ?lm or the like
30
this method. That is, a fully thick metal ?lm is formed and
50
temperature.
This characteristic is considered to be governed by the
existence of hydrogen, oxygen or nitrogen within the atmo
55
65
5,563,426
9
10
20
device to turn the former into low leak current TFTs and the
section, (104) a unit memory bit, (105) bit lines, (106) word
lines, and (107) an (insulating) substrate.
A third application example of the present invention is a
present invention.
One such example of the present invention is that in a
display section of an active matrix circuit of a liquid crystal
display or the like, polysilicon TFTs are used as switching
TFT);
tallizing process)
65
5,563,426
11
12
image sensor;
FIGS. 9(A) to 9(E) are section views showing the process
of the embodiment;
FIGS. 10(A) to 10(C) are section views showing the
process of the embodiment; and
FIGS. 11(A) to 11(D) are section views showing the
process of the embodiment.
10
[First Embodiment]
A method for fabricating a TFI using a crystal silicon ?lm
obtained by crystallizing an amorphous silicon ?lm using a
plurality of island nickel ?lms formed on Coming 7059 glass
substrate as starting points will be described in the present
embodiment. There are two methods for forming the island
crystallization.
25
35
ozone.
65
5,563,426
13
14
[Second Embodiment]
3(C)).
20
FIG. 4 shows a process how a TF1 for aluminum gate was 25 silicon ?lm 38 was deposited further on that.
impurity regions 39A and 39B. Then the TF1 was completed
35
[Third Embodiment]
FIG. 6 shows a process when a CMOS type TF1 was
4(C)).
The ?eld effect mobility of the TF1 obtained was 60 to
120 cm2/V s in the N channel type and 50 to 90 cm2/V s in
65
59A and 59B were driven away toward the edge along the
advancement of the crystallization.
Then an island silicon region 56 was formed by patterning
the crystal silicon ?lm thus obtained as shown in FIG. 6(B).
Here, an attention must be paid on that nickel was highly
concentrated in the both ends of the island region. After
forming the island silicon region, a gate insulating ?lm 57
and gate electrodes 58A and 58B were formed.
5,563,426
15
16
drain regions.
[Fourth Embodiment]
a sputtering method. Then a silicon ?lm 703 with a thickness 20 initial stage of the crystallization. And that only the neighbor
ing process).
[Fifth Embodiment]
55
have been less than 1018 cm2 or preferably less than 1017
cm_2. The oxygen concentration was set to be less than 1017
5,563,426
17
18
the silicon active layer. The peripheral circuit and the active
matrix circuit could be integrally created. In the present
10
(NMOS).
[Sixth Embodiment]
15
20
25
40
45
60
65
laser light.
A P-type region 188A and N-type regions 138B were thus
created. A sheet resistance of those regions was 200 to 800
5,563,426
19
20
as an original material.
?rmed.
[Seventh Embodiment]
embodiment relates to a circuit in which a transistor and 20 regions which had the same thickness and to which the same
30
accelerates the crystallization, i.e. any one of Fe, Co, Ru, Rh,
Pd, Os, Ir, Pt, Sc, Ti, V, Cr, Mn, Cu, Zn, Au and Ag.
For example, assuming that it takes two minutes to treat
35
40
a self-aligning manner using the gate electrode section as a 50 dition of active layer of the TFIs that whether a cover ?lm
exists or not.
65