Single Phase Unity Power Factor Control for Dual Active Bridge Converter

R.W. De Doncker

M. H. Kheraluwala

General Electric Company

Corporate Research and Development
P. 0. Box 8
Schenectady, NY 12301

Abstract
An ac line fed switching power supply
with a single power converter stage, is described
which operates with high input power factor while
maintaining good regulation of the desired output dc
voltage. The single power converter is a dual active
bridge dc-to-dc converter (DABC), comprising highfrequency transformer-coupled input and output
bridge converters. The DABC receives a rectified ac
line voltage via a diode-bridge rectifier connected
to a s m a l l , high-frequency filter capacitor.
The two
active bridges, generating "edge-resonant'' square
waves
at
their
transformer
terminals
are
appropriately phase-shifted from each other to
simultaneously perform the high-efficiency dc
output regulation, while maintaining unity power
factor at the ac input. The soft-switching nature of
the converter allows increased performance (in
terms of efficiency and stresses) and reduction in
size/weight at operating frequencies, in the range of
50-250 kHz. The paper addresses the design, control
and performance issues of the proposed high power
factor power supply.

I. Ih'TRODUClTON

To comply with future regulations on low and high

frequency distortions of main ac power lines and
electromagnetic interference requirements, it is necessary to
improve waveform quality of ac-to-dc converters. In general,
there are two approaches to solving this problem. The first
approach entails increasing size and reactance value of passive
filter elements, i.e. inductors and capacitors, in order to reduce
the high frequency content of the ac input waveforms.
Disadvantageously, this approach becomes increasingly
expensive at higher power levels and creates other side effects
for which compensation must be provided, such as high inrush currents, low bandwidth and poor power factor. The
second approach entails providing a separate front-end power
factor correcting converter [11. Even though filter size can be
reduced by switching at a high frequency, the disadvantage of
this approach is lower efficiency and added cost by virtue of
the two-stage conversion process.
Accordingly, to minimize the number of active power
devices it is desirable to provide for a single stage converter

0-7803-1462-x/93$03.00
01993IEEE

[2,3] controlled to produce unity power factor while regulating

the desired output dc voltage. The advantages of single stage
systems are improved efficiency, high power density, low cost
and high operating bandwidths. Since the double line
frequency (e.g. 120 Hz) energy storage is provided at the
output of the converter, the single stage systems are
particularly suitable for high power applications requiring
output dc voltages of 50 V or above, such as in distributed
power architecture, electric vehicle battery chargers, etc.

II. PROPOSED CONVERTER

A . Topology and Operation

The proposed high power factor power supply, shown in

Fig. 1, consists of a line voltage rectifier followed by a single
power converter sruge which is controlled to actively
waveshape the line current while regulating its output dc
voltage. The single power converter stage is the Dual Active
Bridge dc-to-dc Converter (DABC) [4-61, shown in its halfbridge form. The Ci input capacitors are small high frequency
capacitors providing a high-frequency filtered input dc voltage
Vi that is pulsating at twice the ac line frequency (e.g., 120
Hz) to the converter. The output capacitors CO provide a
high-frequency filtered output dc voltage V,. The double line
frequency energy storage capacitor CStis connected at the
output terminals.
The DABC with its buck and boost capability inherently
provides the required characteristics for high power factor
operation, in addition to combining the output voltage
regulation function. Moreover, the soft-switching operation
of the converter lends itself for achieving high power densities
at high switching frequencies anywhere in the range of tens of
kilohertz to hundreds of kilohertz depending on the power
levels and type of switching device (MOSFETs, IGBTs). The
phase-shift between the edge-resonant square wave voltages
VI and V2 across the high-frequency transformer windings is
controlled so as to regulate the output dc voltage while
realizing near unity power factor under the soft-switching
constraints of the DABC.

909

Fig. 1 Circuit schematic of proposed high power factor power supply. The dc to dc power converter is the Dual Active Bridge
converter.
B . Basic Unity Power Factor Control

Fig. 2 illustrates a control scheme for controlling the dual

active bridge converter of Fig. 1 to operate at unity power
factor. Using the output dc voltage error a proportionalintegral compensator generates a current signal Iac that
controls the magnitude of the desired ac line current. The
rectified ac line voltage Vi, attenuated by a factor K,
modulates the signal Iac providing an ac line current command
Ii*. To regulate the output voltage VO, while maintaining
unity power factor, a phase-shift control block generates from
the ac current command Ii* the appropriate phase-shift signal
Q between the high frequency voltages V1 and V2 of the
DABC.

-BJ

41
where 1: is the average output dc current, and d is the ratio of
the output voltage V,: referred to the primary side of the
transformer, to the input voltage Vi. Using a small input
capacitor Cj the DABC input voltage Vi is a rectified line
voltage waveform. For unity power factor operation, the
input current, Ii, should follow Vi,
Ii = Ip Isin(ot)l

(2)

where Ip is the desired peak of the ac line current, and o is the

ac line frequency in radians per second. Refemng to Fig. 2,

I
Fig. 2 Block diagram of high power factor controller with
regulated output voltage for the proposed converter.

where Vp is the magnitude of the ac line voltage, K is the

attenuation factor, and Iac is the compensated error from the
output voltage loop. Combining (1) and (2) yields a control
equation for the phase angle control block to maintain a
substantially constant output voltage and unity power factor:

Within each cycle of the fundamental input voltage the

average input current to the dual active bridge converter is
function of the phase-shift signal Q according to [4]:

0 5 o t 5 2
910

C . Soft-switching Control Limits

satisfy the output bridge soft-switching constraint is derived

as
The dual active bridge soft-switching boundaries [4-61
limit control over the angle Q at low input currents. The
operating boundary of the input bridge is given by,
d<-

1
1- 22

(5)

7c

As stated above, the input voltage Vi is a rectified ac

waveform. Hence, the voltage ratio d varies within each
double line frequency period according to:

d-

v:
Vp Isin(wt)l

(6)

From ( 5 ) and (6) the minimum phase-shift angle Qmin to

satisfy the input bridge soft-switching constraint is derived as:

(7)
Similarly, the operating boundary of the output bridge is
given by,
d>l-%
7c .

(8)

From (6) and (8) the minimum phase-shift angle b i n to

qmin

(1- vp Isin(wt)?vop

(9)

Both (7) and (9) define the time varying phase-shift

boundaries for sinusoidal input voltage operation of the dual
active bridge converter. Fig. 3 illustrates the soft-switching
boundaries and the soft-switching area in the d-9 plane for the
DABC that is specified in Appendix A. The input bridge and
output bridge boundaries are shown separately. Unity power
factor phase shift control trajectories, according to (4) and (6)
are drawn in Fig. 3 for different peak values of the sinusoidal
ac input current. Fig. 4 illustrates the variation of d, the
control angle Q and the control limit Qmin as a function of
time over one half-cycle of the line voltage for different input
current amplitudes.
Whenever Q is required by the unity power factor control
equation (4) to be smaller than bin, hard switching events
will occur that are associated with resonant capacitor discharge
into the power devices, diode reverse recovery losses and
increased EMI. When using transistor devices (MOSFETs
and IGBTs) these turn-on phenomena may be controllable and
their losses can be tolerated as for the input bridge they occur
simultaneously at low input voltages and at low input
currents. The hard switching losses in the output bridge occur
at low current or can be avoided by proper selection of the
transformer turn ratio.

1.

1I 'I

2 A 3 A 4 k 5 A 6 A 71A

Output Bridge Boundary i

0.5

1.5

Wad)
Fig. 3. Soft-switching boundaries in the d-Q, plane and
control trajectories for different load conditions (parameters
according to Appendix A).

nI4
nl2
3nI4
Angle o t (rad)

Fig. 4. Variation of d, the phase-shift control angle $ and

boundary b i n over one half-cycle of the input ac voltage
(parameters according to Appendix A).
91 1

1.6 L

xi4
xi2
3x14
Angle w t (rad)

D . Near Unity Power Factor Control Methods

7[:

Fig. 5. Variation of the control angle Q and @min over one

half-cycle of the input ac voltage for different turn ratios of
the high frequency transformer.
For specified output and input voltages and power levels
(determined by the peak ac current) the transformer ratio has a
strong influence on the phase-shift soft-switching control
range. If the transformer ratio is selected such that the peak ac
input voltage never exceeds the primary transformed output
voltage, then the constraint related to the output bridge does
not exist as the voltage ratio d never drops below unity.
However, in this case, the soft-switching control range
becomes quickly limited at lower input currents. In Fig. 5
three boundary curves are plotted corresponding to three
different transformation ratios ( 4 1 , 3:1, and 2:l). If the
transformation iatio is low (2:l) the control range at high
input currents (e.g. 8.3 A) widens but the control range at low
input currents (e.g., 2 A) narrows at high input voltages
(when Q, equals 7d2) due to the output bridge constraint. Fig.
5 shows that for the DABC specified in Appendix A a
transformation ratio of 3: 1 is preferable because the phaseshift angle is controllable under soft-switching conditions
over a relatively wide range of input currents.
Fig. 4 and Fig. 5 show that at high load currents softswitching operation of the DABC with unity power factor
control can be achieved over almost the entire cycle of the
fundamental input wave . At low input currents, e.g. 1 A
peak sinusoidal reference, soft-switching operation of the
DABC can be obtained only during two narrow instances of
the half-cycle. Hence, to realize unity power factor operation
over the entire power range the converter is forced to operate
under hard-switching only at low input currents.

When hard-switching losses cannot be tolerated, unity

power factor control cannot be maintained. Three altemative
control methods to operate the converter under soft-switching
conditions at all times are evaluated next. In the first method
the DABC is controlled according to the sinusoidal current
control explained above but the converter stops operation
every time a soft-switching boundary is met, i.e., whenever Cp
< $min. In the second method, referred to as the extended
sinusoidal current control, the phase-shift control angle Q is
temporarily forced to follow the soft-switching boundary
Qmin whenever Q tends to be less than $min. The third
control method keeps the angle I$constant and the converter is
switched off every time a soft-switching boundary is met. In
all three methods, the input current will not track the
sinusoidal reference over the entire period leading to greater
line current distortion.
Sinusoidal current control within the soft-switching
boundaries leads to input ac current waveforms that ideally,
i.e. neglecting switching frequency ripple, can be represented
by the waveform shown in Fig. 6.
Sinusoidal Control

-1
.n

2%

8 = at (rad)

Fig. 6. Idealized input line current for sinusoidal current

control (Ip 8.3 A, parameters according to Appendix A).
At the instant 0, the DABC phase-shift Cp equals $min.
Hence, the deadtime angle Os for different peak values Ip of
the input current can be calculated eliminating Qmin from (4)
and (7).

The ac input power for different peak ac currents can be

expressed as a function of the deadtime angle 8,:
Pin = vP IP

-2

e, + sin (2 e,)]

(1 1)

Fig. 8 illustrates the relationship between the input power

and the deadtime angle according to (10) and (1 1). The input
RMS current, the power factor PF, and total harmonic
distortion THD, for sinusoidal current control are given as:

Hence, the converter soft-switching operation can be

extended during the fundamental ac input cycle only with loss
of control over the ac input current. However, for every peak
value of the input ac current an optimal extended control angle
8, can be found that maximizes the power factor PF.
Numeric calculations were performed to determine the optimal
extended control deadtime 8, as a function of input power of
the DABC. The resulting relationship is shown in Fig. 8.
I

1-

0.8-

5 0.5
II

0.3
Constant Phase-Shift 8,

Extended sinusoidal current control typically produces

input current waveforms according to Fig.7. With this
control, the phase-shift control angle follows temporally the
soft-switching boundaries (5) and (8) instead of shutting down
the converter.
I

10

/I

200

400

600

800

Pin (W)
Fig. 8. Deadtime angles for sinusoidal, extended sinusoidal
and constant phase shift current control as a function of input
power (parameters according to Appendix A).

Extended Sinusoidal Control

it

-1

10

Constant Phase-Shift Control

2n

IT

8 = a t (rad)
Fig. 7. Idealized input line current for extended sinusoidal
control (Ip = 8.3 A, parameters according to Appendix A).
Whenever the soft-switching boundaries are met, the input
current is solely determined by the input and output voltages
according to:

v,' sin*(wt)
v,P

2n

8 = at (rad)
Fig. 9. Idealized input line current for constant phase-shift
control (Ip = 7 A, parameters according to Appendix A).
913

'

Extended sinusoidal

E 901

301

85

Extended sinusoi

Id

20

200 400 600 800 1000

Pin (W)

Detailed simulations were performed to verify the results

obtained from the idealized analysis. The simulations include
the control dynamics, the effects of the finite output
capacitance value, the DABC high switching frequency
patterns and the ac line input inductance. The parameters used
in the simulation correspond to Appendix A for an operating
condition that corresponds to Ip = 6 A. Figs. 12, 13 and 14
illustrate the simulated input line current waveforms for each
control

(16)

(I7)

cos(e,)

The input RMS current and the PF can be expressed as a

function of the deadtime angle 8, :

F . Experimental Results

(18)

PF = 2 CO+,)

n(n-2ec)

(W)

E. Simulation Results

2v I
=

Fig. 11. THD as a function of input power.

Taking into account the soft-switching boundaries, the

peak input current and input power are functions of the
constant angle control range according to:

P,

200 400 600 800 lo00

Pin

Fig. IO. Power factor as a function of input power.

(19)

Eliminating the deadtime angle 8, yields an expression for

PF and THD as a function Of input power* Note that
maximum power is reached when 8, equals zero. In this case,
the input C u m n t becomes a square wave (phase shift 4
n'2)* the converter
its maximum power transfer
capability and is operating under soft-switching conditions
over the entire cycle of the input voltage wave.
Figs. IO and 11 illustrate the relationship between input
power, power factor PF and THD for the three control
One can
methods explained above' From Figs' lo and
conclude that the extended sinusoidal current control achieves
the highest power factor (lowest THD) Over the entire power
with 'Onstant phase-shift control higher
range Of the
instead
power throughput
be achieved
of 650 W), however at the expense of higher waveform
distortion.

A proof-of-concept breadboard was assembled for the

specifications and parameters listed in Appendix A, for a
nominal output power of 500 W. The input and output
switching bridges of the DABC were assembled as full bridges
with IRFP450 (MOSFETs) on the input and IRFPI50 on the
output. The input high frequency filter capacitor Ci was
selected as 2 pF and the output high frequency filter capacitor
CO was selected as 27 PF, both of the AVX, multi-layer
ceramic X7R type. The output energy storage capacitor Cst,
was selected as
mF. The resonant snubber capacitors
across each device are a combination of the inherent drain-tosource capacitance enhanced by external 1 nF capacitors of the
Silver-mica type.
The breadboard was operated with a constant g00 phaseshift control. Fig. 15 shows the line voltage vac and line
current Iac under nominal operating conditions. The measured
power factor and THD under these conditions is 0.939 and
36.6%. The measured results correlate well with those from
theidealizedanalysis.

914

200

, IO

5
h

4
O 8

-5

-200 I
0

4.17

8.34

12.5

1-10
16.7

Time (msecs)

Fig. 12. Input line current with sinusoidal current control.

Calculated power factor PF 93.71 %, THD = 36.49 %.

Fig. 15. Oscillograms of the measured line voltage Vac (top,

50 V/div) and line current Iac (bottom, 5 Ndiv).
Time scale : 2 mddiv.

111. CONCLUSIONS

4.17

8.34

12.5

16.7

Time (msecs)
Fig. 13. Input line current with extended sinusoidal control.
Calculated power factor PF = 97.58 %, THD = 21.1 %.

200

IO

100

ACKNOWIEDGMENT

The authors would like to thank Mr. Gany Grandy for his
assistance in the assembly and testing of the breadboard.

s o

>

-5

-100
-200

A single-stage DABC high power factor power supply is

presented which shows high performance in terms of overall
power factor, efficiency and dynamic response under load and
line disturbances. Unity power factor control can be achieved
over the entire cycle only when hard-switching events can be
tolerated. Three control schemes are derived to achieve near
unity power factor control while maintaining soft-switching
operation of the converter. The extended current control
achieves the highest power quality. The constant phase shift
control method achieves medium waveform quality but
reaches higher power transfer capability and can be realized
with simpler control. Simulations and experimental results
are presented to corroborate the idealized analysis.

4.17

8.34

12.5

Appendix A

-10
16 .7

To illustrate key characteristics of the unity power factor,

high frequency DABC a unit rated at 500 W is considered
throughout the paper. It is assumed that both primary and
secondary devices are MOSFETs. Important parameters that
are used both for the idealized calculations and the simulations
are listed below.

Time (msecs)
Fig. 14. Input line current with constant phase-shift control.
Calculated power factor PF = 96.63 %, THD = 25.41 %.

915

Nominal RMS input ac voltage:

Nominal output Power:
Nominal output dc voltage:
Nominal switching frequency:
Primary transformed leakage inductance:
Transformation ratio:
Input line inductance:
Input line resistance:
Input dc filter capacitor:
Output dc filter capacitor:

v,,

= 120 v
P0=500W
Vd, 50 Vdc
fsw = 250 WZ
Lp'9W
Np:Ns = 9:3
bine 100 W
Rljne = 0.5 SZ
Cin 2 P
Cst = 10 mF

REFERENCES

S.D. Freeland, I. "A Unified Analysis of Converters with

Resonant Switches, 11. Input-Current Shaping for SinglePhase AC/DC Converters," Ph.D. Thesis, California
Institute of Technology, 1988.
M.J. Schutten, R.L. Steigerwald, M.H. Kheraluwala,
"Characteristics of Load Resonant Converters Operated in
a High Power Factor Mode," IEEE Tran. on Power
Electronics, April 1992, Vol. 7, No. 2, pp. 304-3 14.
M.H. Kheraluwala, R.L. Steigerwald, R. Gurumoorthy,
"A Fast-Response High Power Factor Converter with a
Single Power Stage," IEEE PESC Conf. Records, 1991,
pp.769-779.
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"Analysis, Design and Experimental Evaluation of a
High-Power High-Frequency DC/DC Converter," EPE
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