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October 2008 Vol 16.6

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< Embedded System Engineering >

< www.embedded.co.uk > The official journal of the
Embedded Systems Show

Also in this issue :

ESS Update
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entry to the UK’s leading embedded
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In this issue:
Technology
Application Focus:
Focus:
Software Designin High Technology Focus:
Convergence
Volume
Parallel Applications System Development- Technology Focus:
architectures
demand innovative
High Definition and 3D Power Components - Digital
solutions Super capacitors; an
graphics converge in Multicore processing
advanced platforms alternative to Li-Ion demands consideration
Incorporating ‘Embedded2Enterprise’ and ‘Embedded Distribution’
ESE C O t08 i dd 1 12/9/08 14 15 53
P01_ESEOct08.indd 1 12/09/08 17:18:05
P02_ESEOct08.indd 1 15/09/08 14:36:29
 < Contents >
Editorial
Editor:
Philip Ling
E-mail: phil@cassidy-communications.co.uk
Tel: 01622 746580
Embedded System Engineering
Consultant Editor: October 2008 www.embedded-europe.com
Colin Holland
E-mail: cholland@techinsights.com
Tel: 0208 319 1324 Editor’s Comment
Managing Editor: 04 Bigger or Better?
Andrew Porter
E-mail: aporter@techInsights.com
Tel: 020 7560 4029

Advertising Industry News

Advertisement Manager (UK):
Steve Banks 06 Making waves
E-mail: steve@x3dmedia.com

European Sales Director

Geert De Vuyst
E-Mail: geert.devuyst@eetimes.be
Application Focus
Phone: +32 2740 0050 Convergence in High Volume Applications
Non-UK advertising contacts – page 35
08 Talkin’ ‘bout a revolution
Advertising Production Manager
Lydia Gijsegom 12 Time-critical calculations
E-mail: production@eetimes.be

Art Manager
Jean-Paul Speliers
ESS 2008
Subscriptions 16 Teardowns and free kits
Circulation Manager:
Luc Desimpel 16 Conference update
E-mail: luc.desimpel@eetimes.be

Free Subscriptions:
Embedded System Engineering
is available on free subscription Technology Focus
to UK readers qualifying under
the publisher’s terms of control. System Development – Power
See www.esemagazine.com/register 18 Super-capacitors lead the charge
ESE is published by:
TechInsights Europe
System Development – Power
144 Avenue Plasky 22 It’s every designer’s responsibility
1030 Brussels, Belgium

André Rousselot – Publisher Components - Digital

24 Halving the pain through parallelism
TechInsights
Paul Miller – Chief Executive Officer 28 Your flexible friend
Steve Corrick – Vice President of Sales
Felicia Hamerman – Group Marketing Director
David Blaza – Vice President, EE Times & TechOnline
Jenn Markey – Chief Marketing Officer
James Lonsdale-Hands – Vice President, ESC & Events
Harry Page – President, Semiconductor Insights
Steve Arend – Chief Dev. Officer, TechInsights Studio
Embedded 2 Enterprise
32 ZigBee simplifies water meter reading
United Business Media LLC
Scott Mozarsky – Chief Operating Officer
David Wein – Chief Financial Officer
Kevin Prinz – Chief Information Officer
Anne Marie Miller – Corp. Senior VP Sales
Marie Myers – Senior VP, Manufacturing
Embedded Distribution
Pat Nohilly – Senior VP, Strategic Development and
Business Administration
36 Singling out a solution
Alexandra Raine – Senior VP, Communications
40 Embedded services target XP Professional
© TechInsights Europe
Reproduction in whole or part
without prior permission from the
publisher is strictly prohibited. A Standard Individual
42 Life is a cabaret oh chum, come to the cabaret!

www.embedded-europe.com ESE Magazine October 2008 03

P03_ESEOct08.indd 3 15/09/08 17:05:07

 < Editorial
/Editorial>>
Editorial comment
Bigger or Better??
By Philip Ling, Editor
oth! This year, the Embedded Systems Show
B promises to be both bigger and better than
ever before, thanks largely to a commitment to
its success from new owners, TechInsights.
In case there are any readers who aren’t yet aware,
ESE Magazine and the Embedded Systems Show were
purchased earlier this year by media giant, United Busi-
ness Media, becoming part of the TechInsights stable of
print and online media products dedicated to the elec-
tronics industry, which includes EETimes Europe and
Embedded Systems Design Europe.
Since then, the show organisers have worked relent-
lessly to bring renewed vigour to the show by adding
features never before seen in a UK show.
Historically at this time of year, this column would
advocate attending the show, and for obvious reasons.
This year the advice is reinforced and with good reason;
there will be representatives from around 90 companies
on hand, ready to give you as much time as necessary to
make sure you leave with the information you need.
And the information doesn’t just flow one way. The
embedded electronics industry today is built on relation-
ships as much as regulations; trust as well as technology.
The opportunity to network with individuals from other
companies that may complement your own in the value
chain is clearly unique to exhibitions and conferences
such as ESS, and it remains the only UK show to offer
its visitors that opportunity. Where else can you achieve
such massive industry exposure in a single day?
In the last issue of ESE we carried an extensive pre-
view of the show, with a special focus on the Techni-
cal Programme. In this issue we carry an update to that
programme (see page 16 for more details). You will see
we’ve included further details of the live product tear-
downs being presented; a popular feature imported
from the US, and being performed live by TechInsights’
Technology Analyst, Steve Bitton.
Optimising
Hardware
Compilers
Debug
Probes
Integrated Real-Time
Development Operating
Environments Systems
Debugging & All
Performance Royalty
Analysis Free!
4 ESE Magazine October 2008
P04_ESEOct08.indd Sec1:4
If that isn’t enough to entice you to the NEC, take a
look through this issue. You’ll see three articles cover-
ing some of the hot topics on offer at the show. They
include: how to accelerate embedded graphics through
dedicated hardware (page 8); getting to grips with
multicore processors (page 24), and streamlining your
development cycle using single-board computers (page
36). All of these areas – and much more – feature in the
Technical Programme, both in the conference and free
workshops.
Some may argue an engineering team has access
to all the information it needs, via the internet. Simply
put, that just isn’t possible; while the internet – a col-
lection of disparate databases brought together using
a common protocol – may offer you access to existing
knowledge, it’s only through the interaction of like-mind-
ed people that new knowledge is created. By default, if
it’s available on the internet, it’s already out of date! By
joining in discussions with your peers at events such as
ESS, you become part of tomorrow’s knowledge base,
and you get exclusive access to it before anyone else.
In today’s competitive market place, that kind of time
advantage can be invaluable.
But don’t expect to get these benefits just by show-
ing up at the show; it doesn’t happen by osmosis. Ideas
come through active participation and heated discourse,
and not even the best online chat rooms can rival the
real thing for that!
Take a day out, take two – the show runs across the
1st and 2nd of October at Birmingham’s NEC, and entry
is free. Be prepared; look at the list of exhibitors and
work out who you want to talk to once you get there and,
more importantly, know what you want to talk about.
ESS remains the UK’s premier event for embedded
electronics companies to meet, exchange ideas, forge
relationships and replenish knowledge-bases. Can you
afford not to be there? <Ends>
The Leader in Embedded
Software Development
FREE 30-Day Product Evaluation
register now at www.ghs.com/eval
Tel: +44 (0)1844 267950
Fax: +44 (0)1844 267955
www.embedded-europe.com
15/09/08 17:57:04
 For the widest choice of components
from all the major manufacturers, visit
rswww.com/electronics

rswww.com/electronics 08457 201 201

P05_ESEOct08.indd 1 12/09/08 15:03:57

 < Industry News >
Making waves
A fully integrated, CMOS based oscillator requires no moving parts.
Philip Ling reports.
A single-chip CMOS based oscillator that uses an
integrated LC circuit has been introduced by Silicon
Labs. It becomes the company’s first integrated tim-
ing device not to use its innovative ‘DSPLL’ technol-
ogy.
Instead it synthesises a frequency between 0.9 and
200MHz using an on-chip oscillator and frequency
divider, coupled with a frequency stabilising algo-
IP Everywhere
A consortium of 21 companies has grouped together
to create the IPSO Alliance; Internet Protocol for
Smart Objects. The intention is to increase aware-
ness of the protocol and its applicability in systems
that are increasingly using ‘smart objects’ such as
intelligent sensors, HVAC monitoring and control
systems or occupancy detection.
Currently it is felt that such systems, which are
often now connected via the Internet, still use pro-
prietary protocols locally, creating a need for a local
Oscilloscopes too expensive
OEMs aren’t prepared to pay for performance where
it isn’t needed, a revelation that is motivating Test
& Measurement companies to introduce lower
cost and, commensurately, lower performance test
equipment.
6 ESE Magazine October 2008
P06_ESEOct08.indd Sec1:6
rithm that provides stability over temperature based
on coefficients acquired during final test.
James Wilson, Senior Marketing Manager for
Silicon Labs explained the Si500 Silicon Oscillator
will target applications currently using quartz crystal
oscillators, by providing a drop-in replacement that
offers better performance over the given frequency
range.
The architecture allows Silicon Labs to
fabricate, on demand, the silicon oscillator
to deliver any frequency within the operating
parameters, although it is described as be-
ing optimised for the ‘low frequency’ range
of below 100MHz. The device’s footprint and
PCB layout guidelines have been designed
to allow a ‘like for like’ replacement against
a crystal oscillator, without the need for any
external timing components.
www.silabs.com
‘gateway’. The IPSO Alliance intends to illustrate
how the packet based protocol can be used from
‘end to end’, simplifying system topologies and,
more importantly, creating interoperability between
‘smart objects’ and their host environments.
Both wired and wireless networks are targeted
and the Alliance intends not to promote any particu-
lar PHY. Its efforts are described as targeting IPv6
and will work hand in hand with the Internet Engi-
neering Task Force, acting as a partner for marketing
its efforts to the wider engineering community.
www.ipso-alliance.org
The ‘economy’ end of the T&M market (sub $1k)
has been reported as the fastest growing sector for
companies such as LeCroy, who has recently entered
this segment with a range of low cost oscilloscopes.
The company intends to market its new WaveAce
series predominantly through distribution
channels.
Although both Tektronix and Agilent
have had offerings in this price/perform-
ance range for many years, LeCroy be-
lieves it will win market share thanks to
the WaveAce’s features – some of which
are only found on more expensive ‘scopes,
according to the company. This includes a
colour screen on all models, as well as
waveform sequence recording.
www.lecroy.com
News in brief
■ In a move to improve high-level development
of Linux applications on its microprocessors,
MIPS has introduced Eclipse plug-ins for
debugging and code analysis. The modules
form part of the company’s newly introduced
Navigator Integrated Component Suite,
but could also operate within any Eclipse
environment. According to the company, its
existing GNU based development environment
was getting a little ‘old and tired’, highlighted
by customers reporting ‘greater than expected’
difficulties in developing applications targeting
the Linux operating system. It coincides with a
significant shift towards Linux and away from
commercial operating systems.
Another benefit of Navigator ICS is the ability
to debug Position Independent Code (PIC);
elements of code that are linked in at compile
time. This is the preferred solution when
developing some device drivers for Linux, as it
doesn’t require any modification of the kernel
and is, therefore, not subject to the same GPL
licensing requirements as the rest of the open
source solution. The ability to debug ‘loadable
modules’ is likely to be attractive to OEMs,
as MIPS claims it is not possible using exiting
Linux debug tools.
www.mips.com
■ An innovative FPGA architecture developed
to exploit asynchronous logic to achieve unprec-
edented throughput speeds has resulted in the
launch of the company’s first commercial prod-
uct. The Speedster SPD60 from Achronix is de-
scribed as being optimised for speed, targeting
the emerging demand for 100Gbit Ethernet in
communications infrastructure.
John Holt, Founder, CEO and Chairman, explains
the start-up isn’t targeting design seats currently
occupied by other, much larger, FPGA companies.
Instead he sees it coexisting with other FPGA de-
vices, along with DSPs and ASICs.
Holt believes that FPGA technology in general
and the Achronix solution in particular provides
significant benefits over ASICs and ASSPs for
the developing 100GHz market place, stressing
that the majority of success for the company’s
products will come not by displacing exiting so-
lutions but creating new opportunities.
www.achronix.com
www.embedded-europe.com
15/09/08 17:09:04
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P07_ESEOct08.indd 1 15/09/08 16:37:42

 < Application Focus >
Convergence in High Volume Applications
Talkin’ ‘bout a revolution!
Every so often a technology comes along that causes revolutionary change, the key to
exploiting it involves becoming an early adopter. By Philip Ling
W
e’re in the midst of a revolution; a
technical revolution in the way we
access live and recorded media.
Digital broadcasting is enabling
this revolution and, to a lesser but growing extent,
it is supported by the market for (home) digital re-
cording. The revolution is High Definition (HD) in all
its forms; terrestrial and satellite television broad-
casting, streaming video and audio over IP, home
audio/video recording, and portable A/V devices.
The justification for calling this a revolution is
because it impacts so many aspects of our lives,
requiring new equipment at multiple points. Argu-
ably, the last technical revolution came with the
introduction of mobile telecommunications, in its
analogue form. While this only required change at
a single point – the mobile handset – it impacted
our lives to such an extent that it caused revolution-
ary change in the way we live.
However, since its introduction, everything that
has happened since has been evolutionary – even
the migration to digital cellular technology; the
revolutionary change happened when we started
using mobile telephones. Even the latest acronym
for mobile communications – LTE, which stands
for long term evolution – acknowledges this fun-
damental shift.
It can be expected, therefore, that at some
point ‘HD’ will move from being revolutionary to
evolutionary, but not until it has reached a level of
saturation. Today the market for mobile telephones
has reached that level in the developed world but
8 ESE Magazine October 2008
P08-10_ESEOct08.indd 8
continues to be buoyed by the upgrade path and
emerging markets. The same may become true for
HD devices, but perhaps not for some time yet.
This highlights an interesting difference be-
tween – and potentially convergent path for – mo-
bile communications and HD, which is only just
being addressed; the choice in access devices and
the services they enable. Mobile broadband is a
relatively recent ‘evolution’ in cellular communica-
tions, one that is giving rise to a host of new ac-
cess devices, such as 3G dongles or handsets with
HSDPA.
Since the introduction of digital broadcasting
there have been many attempts to make it also
more portable, by integrating digital receivers in
to a variety of devices, but with little success. This
may be because the transport media used by hand-
held or portable devices – over the air terrestrial
UHF – is still relatively unreliable for digitally en-
coded video. Other, packet based transport mecha-
nisms, such as cellular broadcast or even satellite
broadcast, is arguably more reliable in this applica-
tion, particularly in built up areas.
This abundance of choice in transport media, as
used already by a variety of devices, is giving rise
to demand for convergence; the ability to receive
digital broadcasts – including HD – using a greater
range of access devices.
In turn, this is fuelling demand for more sophis-
ticated silicon solutions, which has some surpris-
ing consequences. The use of software defined
platforms for wireless devices is well established,
enabled greatly by digital signal processors (DSPs).
It is these devices that invariably enable the access
devices used in cellular communications today.
However, it seems HD presents its own unique
challenges, that aren’t easily solved using DSPs
and software alone. Convergence in digital broad-
casting is creating demand for a new generation in
processing solutions.
HD Video
One of the leading companies in digital signal
processing, indeed the company credited with
inventing the DSP is, not too surprisingly, a large
player in digital communications. Texas Instru-
ments’ DSPs are present in the majority of cellular
handsets, as well as having a strong presence in
basestations. It could, therefore, be seen as one
of the biggest protagonists for all things software
defined. However, the latest devices from TI show
that the real-time processing requirements for HD
decode are too great for DSPs alone.
Through a combination of integrated processor
cores and hardware acceleration, TI is addressing
the need for HD capability in low power and low
cost platforms.
It recently introduced the latest generation of
OMAP devices; the OMAP 3. There are currently
four devices available, one of which combines the
ARM Cortex-A8 processor core with one of TI’s own
TMS320C6x+ DSP cores and dedicated hardware
acceleration blocks for both HD decode and 2D/3D
graphics. The first commercial application for the
OMAP 3 platform was unveiled recently by Archos,
which is using the OMAP 3 in its newest portfo-
lio of personal entertainment devices; the Internet
Media Tablet.
“TI is committed to helping Archos develop high
quality products that take advantage of the world’s
first implementation of the superscalar ARM Cor-
tex-A8 processor. Coupled with a TI C64x+ DSP
core, the OMAP 3 processors provide the necessary
performance and multimedia features for enhanced
functionality on the Archos devices,” said Suman
Narayan, General Manager, Catalogue Processors
and Emerging End Equipment, TI. “As consumers
demand HD video, media rich data and connectivity
anytime and anywhere, Archos pushes the bounda-
ries as a leading innovator with its new IMTs.”
The ARM Cortex-A8 core delivers over four
times the performance of the ARM9, the core inte-
grated in previous OMAP platforms and still used in
www.embedded-europe.com
15/09/08 17:11:31
 For more information contact BFi OPTiLAS, Motorola’s Authorised Distributor
at: sales.uk@bfioptilas.com or call on: +44 (0) 1908 326 326

P09_ESEOct08.indd 1 12/09/08 15:05:25

 < Application
< Application
Focus
Focus
>>
the latest DaVinci platform. However there is one
feature that both the OMAP 3 platform and latest
DaVinci devices share; hardware accelerated HD
decode, supporting multiple formats. However, ar-
chitecturally, they are addressing different parts of
the HD market; OMAP is aimed at access devices,
while DaVinci is described as targeting the ‘edge’
of the delivery mechanism.
Graphics acceleration
The fact that hardware acceleration for both video
and graphics has been added is further evidence
that convergence is expected between live HD
video and the integration of more so-
phisticated 2D and 3D graphics.
Given the power available from proc-
essor cores today, it seems somewhat
surprising that hardware acceleration is
necessary, but industry experts believe
it is, for both live video and rendered
graphics. A recent trend in this field is
the development of OpenGL ES 2.0, a
version of the open API used for graphics
acceleration in PCs, aimed at embedded
systems, hardware support for which is
integrated in the OMAP 3 platform.
Tom Cooksey is a Software Engineer
with Nokia-Qt, and he believes it marks
the beginning of a general shift in the
industry: “When Apple introduced the
iPhone it completely changed the way
consumers expected to interact with de-
vices. A big part of that was the graph-
ics and without hardware acceleration, The Archos Internet Media Tablet
devices will have limited graphics capa- personal entertainment device which
bility.” uses a Texas Instruments’ OMAP 3 processor.
Cooksey sees the API as a simple
way of programming graphics hardware
and although used predominantly for 3D applica-
tions, it can also help accelerate 2D graphics and
for adding effects. “This is especially true for more
modern graphics hardware, which is basically just
a massively parallel general purpose processor,”
explained Cooksey.
“Such hardware is modelled by OpenGL ES
2.0, which allows developers to write custom code
called ‘shaders’, in a C-like language (GLSL).” The
driver then compiles the code and runs it on the
graphics processor.
The API could, therefore, be used anywhere a
user interface is necessary; from mobile phones to
netbooks, gaming consoles or set-top boxes, and
even in-car entertainment. “There is also massive
potential in non-consumer applications that have
tight graphics performance requirements, such as
industrial, defence and medical computing,” Cook-
sey added.
With the introduction of hand held devices pro-
viding HD playback, there is a definite trend towards
integrating video and graphic capabilities on the
same platform, as Cooksey pointed out: “Tradition-
ally, video decoding hardware has used an overlay
10 ESE Magazine October 2008
P08-10_ESEOct08.indd 10
to put video on the screen. From a software point
of view, you feed the hardware with the encoded
video stream and you never have to worry about it
again – it will ‘magically’ appear on the screen.”
The same approach is used for video input, where
the software engineer doesn’t even see the data.
The problem with this approach is that video
never passes through GL pipe: “Things like window
animations and effects are impossible to do,” ex-
plained Cooksey. “One option we have tried is to
use a shader to do the scaling and YUV-RGB con-
version.”
As modern graphics hardware is programmable,
you could theoretically use it to do the complete
decode in a shader, and some vendors have actually
started to do that, according to Cooksey.
“Even just doing the colour-space conversion
in a shader works well and allows us to use video
frames as textures,” explained Cooksey. “The prob-
lem we see is power; using the CPU for decode
and the 3D core for the colour-space conversion
consumes significantly more power than dedicated
video hardware.”
Ideally it would be possible to switch between
the two techniques at run-time, but this isn’t made
easy by the underlying multimedia APIs. “Hopefully
this will change. One thing is for sure, customers
want fancy window animations and HD video play-
back at the same time. To do this, hardware ven-
dors will have to provide better integration in the
future.”
Vector factor
The problem with the current integration of HD
decoding hardware and graphics acceleration is
just that; the level of integration between the two
needs improving.
The current solution to placing video in to the
GL pipeline is to render the video and place it in to
video memory, then copy the contents of that in to
the graphics memory used by the GL pipeline; there
is currently no direct solution for rendering video in
to a textured graphics block.
Why is this important? Well it clearly isn’t es-
sential, but users are likely to demand more so-
phisticated effects, such as animated album covers
which pass across the screen at oblique angles,
or sweep across the screen as part the selection
menu. Part of the solution is to impose tighter coop-
eration between the standards bodies responsible
for HD video and graphics, which until
now there hasn’t been a need for.
Another important feature, ac-
cording to Tom Cooksey, will be the
introduction of a graphics memory
manager to handle the task of moving
data from the HD stream to the graph-
ics pipeline, something he claims is
happening now in Linux.
But sophisticated 3D graphics
is still only part of the story, another
significant element is vector graphics.
Here, again, The Khronos Group – the
member-funded industry consortium
developing open standards for media
authoring and acceleration – and be-
hind OpenGL ES 2.0 – is working on a
solution. OpenVG is also a royalty-free
cross-platform API for hardware accel-
erated vector graphics libraries, also
primarily targeting handheld devices.
As OpenGL has no support for text,
OpenVG can help. It turns objects in
to triangles, so any font – especially
complex ones such as Chinese – can
be created, as well as any graphical element. Un-
doubtedly, leading silicon manufacturers will even
now be working on implementing hardware sup-
port for OpenVG in to the next generation of media
processing platforms. <Ends>
Tom Cooksey will deliver a Confer-
ence Tutorial on using Open GL APIs
on embedded Linux applications at
the Embedded Systems Developer
Conference at 3.45pm on Thursday,
October 2nd at ESS.
For more details visit:
www.embedded.co.uk
www.embedded-europe.com
15/09/08 17:11:50
P11_ESEOct08.indd 1 12/09/08 17:29:17
 < Application Focus >
Convergence in High Volume Applications
Time-critical calculations
Good DSP allocation is half the battle when developing real-time and computationally complex applications.
By Christian Harders, an application engineer, marketing industrial with Fujitsu Microelectronics Europe
A
lthough digital signal processing is
ubiquitous it is not always visible,
as with digital cameras and mobile
phones. A growing amount of func-
tions that are traditionally implemented using
analogue circuits, are now contained in software
on a microcontroller unit (MCU) or a digital signal
processor (DSP), saving printed circuit board space
and components and therefore lowering costs. The
drift and tolerances common to analogue devices
can also be avoided. The advantages of an inte-
grated DSP unit for these software algorithms are
demonstrated by Fujitsu’s MB91470/480 series of
microcontrollers.
Figure 1: Block diagram of µDSP
12 ESE Magazine October 2008
P12-14_ESEOct08.indd 12
Many of today’s filters and algorithms could
hardly be implemented using analogue circuits, at
least not without creating unjustifiable expense.
Today developers have to decide whether to use
an MCU, DSP or even both. Especially in applica-
tions where signal processing is only one task
among others, this question is not always easy to
answer. Controls and operating devices are classic
to MCUs, whereas digital filters and regulators are
typical of DSPs.
However, such a clear difference is not always
so apparent with control units often resorting to
digital filters in order to evaluate system states and
carry out fast loops. Fujitsu recognised this as the
case with motor control which is why it developed
its MB91470/480 32bit MCU series with a power-
ful peripheral in the form of the µDSP alias MAC
(multiply-accumulate) unit.
The µDSP has its own program and data mem-
ory enabling it to perform longer calculations as a
coprocessor independent from the main processor
(CPU), as shown in figure 1. This allows the CPU to
react quickly to interrupts also during filter calcula-
tion, a feature that is necessary to industrial control
tasks, without changing the execution time for the
filter.
The structure of the µDSP is optimised for multi-
ply-accumulate instructions typical for digital filters
and many other algorithms, which it carries out at
full processor clock speed (up to 80MHz) in just one
cycle. A 72bit wide accumulator adds up the val-
ues, with the number format selected from various
32bit fixed-point formats.
Especially for digital filters the µDSP is able to
transfer input variables through filter stages with-
out the assistance of the CPU. As long as the µDSP
is idle, the CPU has full access to all configuration
and memory addresses of the µDSP, so that data
transfer to and from the CPU is possible. Once the
calculations are started, a few status and control
registers will remain accessible to indicate their
operation status. When the µDSP has executed the
program, it can generate an interrupt or trigger a
DMA (direct memory access) transfer.
Modern drive trains need power
Controlling a modern three-phase drive is one ex-
ample of an application where numerous sub tasks
need to be processed in fixed time intervals, which
are determined by demands made on the system.
Often, vector or field orientated controls are used,
consisting of several coordinate transformations
and cascaded control loops. Two current control-
lers form the innermost control loop and monitor
the field- and torque-creating components of the
stator current.
This control loop is often cycled at the full PWM
(pulse width modulation) frequency, which can be
many tens of kHz. The set point for the inner con-
trol loop is determined by a speed regulator, which
controls the required torque and thus acceleration
via the current. This is then pre-connected by a po-
sitioning control. Therefore, there are four control
processes to be mastered in addition to the trigo-
www.embedded-europe.com
15/09/08 12:46:58
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USB Protocol Stacks
PCI Adapters
Code Generation
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PCI Analysers
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P13_ESEOct08.indd 1 15/09/08 15:31:47

 < Application
< Application
Focus
Focus
>>
nometric transformations of the vector control and
the application itself.
If the time intervals for such a control are taken
into account, some of the sub tasks can be per-
formed in parallel. For example, the time between
scanning the actual current values and the next-
possible update of the PWM register with the new
target values is typically a PWM period.
As a result of parallel calculation by the CPU
and µDSP additional functions can easily be imple-
mented without increasing the effective CPU load.
The execution of a typical PID algorithm by the MAC
unit requires far less than a microsecond, which is
why the µDSP can take on further duties such as
filtering input signals between two PWM updates.
Together with the MCU’s flexible timers, very dy-
namic three-phase drives can be implemented.
The MB91480 series can even achieve this for
two motors. In this case, the MAC unit can take
over all six PID control loops of both motors (the po-
sition loops often have additional functionality such
as anti-hunt etc., which are easier to implement on
the CPU), so that the benefit, in terms of execution
time becomes even more apparent.
Together with the flexible motor timer and ADC
functionality of the MB91480 Series MCU, the tim-
ing for both motor controls can be optimised in a
way that minimises interference of peripheral us-
age. To reach this, the PWMs for both motors are
shifted against each other by approximately one-
fourth PWM period. By this, the ADC units can be
used to sample the phase currents of each motor
Figure 3: Block diagram of the MB91470
14 ESE Magazine October 2008
P12-14_ESEOct08.indd 14
simultaneously and synchronised to the PWM, giv-
ing each control a time-slot of its own to use the
peripherals.
After all currents have been sampled, the µDSP
is triggered and performs the PID calculations.
Because of the short execution time, the control
outputs are updated early enough before the first
PWM needs the values, so that the PWM can be
updated to the new output voltage with minimum
delay. In other words, the response time of the first
motor control is not influenced by adding a second;
both can still be served with the full PWM frequen-
cy of 20kHz.
In order to map control loops efficiently on
DSP-like structures, certain requirements must
be fulfilled. First of all, most microcontrollers and
DSPs are not equipped with a floating point unit, so
fixed-point arithmetic is used instead. However, the
structure of the regulator can also be optimised.
With some reforming, typical discrete PID regu-
lators can be transferred to an IIR (infinite impulse
response) filter-like structure. This implementation
also avoids the summation of the integral term. It
features a ‘sum of products’ form, typical to digital
filters and for which the µDSP is optimised.
µDSP instead of RC
In many applications it is necessary to evalu-
ate analogue readings, but interference such as
noise can prove a problem. This is often reduced
with analogue low-pass filters, but can also be
achieved digitally. Analogue anti-aliasing filters
Figure 2: FIR8 filter
are necessary for nearly every AD transformation
as a matter of principle, but digital filtering can flat-
ten the requirements for the analogue pre-filters
by over-sampling. This utilises a greater sampling
frequency than that which is necessary according
to Nyquist’s theorem (the minimum sampling rate
required to avoid aliasing, which is equal to twice
the highest signal frequency) in order to achieve the
necessary bandwidth. As a result a simpler filter,
with low edge steepness, can be used where the
limitation to the target frequency range together
with a reduction of the sampling rate is digital, thus
avoiding extra circuit complexity.
Commonly used filters
The FIR (finite impulse response) or IIR are the most
commonly used filters. FIR filters are non-recursive
as there is no feedback of output to input. There-
fore they are always stable, generating finitely long
output signals. In contrast, IIR filters can resonate
and become unstable, but often need fewer filter
stages in order to achieve a specified behaviour.
Because the µDSP carries out filter calculations on
its own, an easy-to-use FIR filter can often be used
without increasing the CPU load – see figure 2.
The ‘moving average’ filter is a typical simple
FIR filter. It is commonly used as a simple low-pass
filter providing smooth measured readings. All filter
coefficients have the same value and are usually
scaled (normalised) in such a way that the sum of
the filter coefficients, representing the DC gain of
the filter, equals unity. The µDSP of the MB91470
can calculate such a filter with 64 stages
in approximately 1.2µs. Therefore the full
sampling rate of both 12bit ADCs in the
MB91F479 can be used with this filter, or
several shorter filters can be calculated at
the same time.
The possibility of processing data with
the µDSP in parallel to the CPU enables an
effective method of digital signal process-
ing with the MB91470/480 series of micro-
controllers. As a result, although originally
optimised for motor control applications,
they are also well suited for other measur-
ing, regulation and control technology ap-
plications and offer the flexibility of a mi-
crocontroller and the computing power of a
DSP literally at the same time. <Ends>
www.fujitsu.com/emea/services/
microelectronics/
www.embedded-europe.com
15/09/08 12:47:17
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P15_ESEOct08.indd 1 12/09/08 17:31:16

 < ESS Conference & Exhibition Preview >
Live teardowns and Beagleboard dev e
T
he embedded Systems
Show 2008 – the leading
international exhibition
for the electronics systems and
software development commu-
nities in Europe – will feature
live teardowns of the Estes Mi-
cro-Tiger RC Helicopter and the
X-Box Steering Wheel.
In addition, pre-registered
conference delegates will have the opportunity to
build and take home a fully configured embedded
system based on the recently launched Beagleboard.
The live teardowns, first introduced and made
popular by exhibition organisers TechInsights, will of-
fer visitors unrivalled access to two of the latest and
most popular consumer electronics gadgets.
The Estes Micro-Tiger Helicopter is an indoor
helicopter that uses Motion Automatic Sensing Con-
More conference highlights...
Details of presentations not featured in last
months issue - full details of all sessions are
available online at: www.embedded.co.uk.
Introduction to multi-core
programming
With the emergence of multi-core embedded CPUs
and microcontrollers, comes the new challenge of
how to program these devices to take advantage
of the extra cores. In Tutorial 1.2 (Wednesday 1,
10.45) Stephen Blair-Chappell, Technical Consulting
Engineer at Intel will show how existing programs
can be modified to take advantage of the new multi-
core architecture; he will show how to use different
programming paradigms to implement multithread-
ing in a program; he explain some of the common
pitfalls that occur when writing for multi-core, and
how best to avoid and detect these pitfalls; he will
also show how to tune and optimise multi-core
programs.
The presentation will contain real code examples,
and a ‘live’ demo of the complete development cycle
showing how to spot the best place to insert parallel-
ism; how to implement the parallelism; how to check
for correctness, and how to tune a parallel program.
An article from this presenter is on page 24 of
this issue of ESE.
■Special Note: Delegates will also have the oppor-
tunity to attend the hands-on class in the afternoon,
where they can try out some of the techniques pre-
sented on multi-core target boards. Pre-registration
for the afternoon hands-on class, which will take
16 ESE Magazine October 2008
P16-17_ESEOct08.indd 16
troller (MASC) technology to
enable both beginners and expe-
rienced pilots to enjoy the thrill of
steering a helicopter with just a tilt
of the wrist.
The wireless Microsoft Xbox 360
Steering Wheel simulates all the
resistance and force of driving,
featuring dual rumble motors
and realistic force feedback. By
stripping away these cutting edge toys into their
individual components, the teardown experts
will reveal the techniques and technologies
that bring these products to life.
Free development kits
This year, the Embedded Systems Show also features
a Build Your Own Embedded System (BYOES) pro-
gramme. On October 1, fifty pre-registered visitors
place directly after this morning session in the cof-
fee breakout area, is essential to have access to the
hands-on material which is strictly limited.
An introduction to time-
triggered architectures
In a time-triggered embedded system, we have one
(and only one) interrupt enabled. This interrupt is
usually linked to a timer, which will generate “ticks”:
these ticks will, in turn, drive an appropriate (often
very simple) operating system.
Time-triggered architectures are widely used in
safety-related systems because they are known to
provide highly predictable behaviour, which in turn
reduces testing, maintenance and (where relevant)
certification costs. During this talk (Tutorial 2.2
Wednesday 1, 10.45) Dr. Michael J. Pont, CEO, TTE
Systems will argue that TT architectures can be (and
should be) used more widely. Numerous examples
of the use of TT architectures will be presented.
Strengths and weaknesses of the TT approach will
be considered. The talk will not try to argue that a
TT approach is a perfect match for all embedded
systems. However it will conclude by suggesting
that – as you start your next project – you should
ask yourself: “Should we use a TT architecture this
time?” By the end of this talk, you may be surprised
how often the answer is: “Yes”.
RTCA DO-178C / EUROCAE
ED-12C – a progress report
DO-178B/ED-12B provides guidance for the produc-
tion of software for airborne systems and equipment.
UPDATE
for the full conference can take part in this
truly hands-on educational experience at
no extra
charge, building and taking away
their own embedded system, using the USB-powered
Almost without exception, all the software on aircraft
by manufacturers such as Airbus and Boeing has to
be written to satisfy the objectives of DO-178B/ED-
12B. During Tutorial 2.5 (Wednesday 1, 14.45)
Dewi Daniels, Deputy Head of Consultancy, Silver
Software will explain that here have been many ad-
vances in software engineering since DO-178B/ED-
12B was published in 1992. DO-178B/ED-12B is
being updated to DO-178C/ED-12C to fix ambiguities
that have been found in DO-178B/ED-12B, as well as
to address these new technologies. This presenta-
tion will update you on the progress being made in
preparing DO-178C/ED-12C, will let you know what
kind of changes to expect, and explain how DO-
178C/ED-12C will affect your airborne software de-
velopment processes.
Implementing low-power,
high-speed, serial buses
Media convergence is technically demanding and
poses many design and implementation challenges;
parallel computing with multiple core processors
is subject to Amdahl’s Law and high-performance
portability is dependent on reducing the watts per
instruction. What is more, the buses remain the
principal factor in determining the performance of
embedded systems.
During Tutorial 3.3 (Thursday 2, 12 noon) Geoff
Lawday, Tektronix Professorial Chair in Measure-
ment, Buckinghamshire New University will explain
that while delivering orders of magnitude in im-
proved bandwidth per pin the new high-speed serial
buses are not transparent and require expert design
if a low-power, high-speed, interconnect is to be
www.embedded-europe.com
15/09/08 15:37:23

v elopment kit giveaway
Beagleboard worth £80.
This programme includes
a range of training cours-
es to enable visitors to
develop their system-
building skills:
■ Beagleboard 101 (a
pre-conference work-
shop)
■ Implementing a Web-
based user interface
■ Turn the Beagleboard in to a USB Gadget (with
Suspend/Resume)
■ Using the OMAP DSP as a Linux co-processor
■ Controlling a DC brushless motor with the Bea-
gleboard
■ Teaching Software with Sugar and Block Dia-
grams
achieved. The new generation of high-speed serial
buses have edge rates with radio frequency param-
eters and analogue characteristics, two subjects that
many digital engineers have limited experience of.
This presentation will explain in practical terms the
trade-offs in power and performance in modern bus
design and implementation, along with the exciting
new integrated serial bus simulation and real-time,
design and test paradigms.
Code Generation –
The Fundamentals
Matthew Fowler, CEO, New Technology/enterprise
will take a quick gallop (Tutorial 4.1, Thursday 9.45)
through the field of code generation for those new to
the field, to give you enough background to appreci-
ate later sessions. This will cover:
● The basics: templates and variables.
● Code generation: building up to systems: coordi-
nated builds.
● The various styles of “code generation”.
● Models, DSLs, text vs graphical, meta-models.
● Increasing abstraction; model-to-model transforms.
● What’s it like doing it for yourself.
● The industry players.
● What the future looks like.
Introduction to the Eclipse
Modelling Project
Karsten Thoms, Software Architect, Itemis will give
an overview of complementary and alternative tech-
nologies from the Eclipse Modelling world (Tutorial
4.3, Thursday 2, 12 noon). The Eclipse Modelling
www.embedded-europe.com
P16-17_ESEOct08.indd 17
< ESS Conference & Exhibition Preview >
The highly integrated Beagleboard platform
(www.beagleboard.org), released to the public in
July, is based on an ARM-based microprocessor
– the OMAP 3530 from Texas Instruments – and is
bundled with a version of Linux from MontaVista. It
is designed by BeagleBoard.org community members
and sold by Digi-Key.
“This year’s Embedded Systems Show is more
focused than ever on the real-world applications
of embedded systems and their place in the wider
electronics market,” says exhibition director Andrew
Porter. “The live-teardowns and the Build Your Own
programme will offer real hands-on experience and
training, helping visitors develop their skills and ex-
pand their knowledge of the very latest techniques.”
The Embedded Systems Show 2008 is taking
place at the NEC, Birmingham on 1 and 2 October. To
register free, or for further information, please visit
www.embedded.co.uk.
Project is the starting point for model-based devel-
opment technologies in the open source community.
It provides a unified set of modelling frameworks,
tooling and standards implementation and is rapidly
increasing with new subprojects, components and
developers.
This tutorial will demonstrate the usage of some
of the components that have been proven in real
world model-driven projects, including Eclipse Mod-
elling Framework (metamodeling, tooling), Xpand
(model-to-text), Xtend (model-to-model), Xtext (tex-
tual DSLs) and Check (model validation).
Efficient modelling using
Domain Specific Languages
When people talk about software models they of-
ten think of UML models. UML is a general purpose
modelling language (GPML) that can be applied to
several modelling domains. But this flexibility has
some severe drawbacks: The UML has an enormous
complexity and yet it is not sufficient to express com-
mon software modelling aspects, e.g. describing the
GUI of applications.
Karsten Thoms, Software Architect, Itemis (Tu-
torial 4.4, Thursday 2, 13.35) – will explore how
domain Specific Languages (DSLs) are languages
tailored to a specific problem domain, or often a spe-
cific project. Both visual and textual DSLs exist and
both have their pros and cons. What are the benefits
of choosing DSLs instead of GPMLs for model-driven
software development? Can the use of DSLs conform
to the OMG’s Model-Driven Architecture paradigm?
What are the disadvantages of using UML and as-
sociated tools in practice?
FREE DESIGN WORKSHOPS
There is free access to technical work-
shops presented by experts from the
leading suppliers of embedded solutions
and development tools. Presenters all
come with technical backgrounds from
within the engineering and applications
groups of their companies. These ses-
sions will help advance your knowledge
of state-of-the-art technologies and will
enhance your ability to do embedded
systems development better. They are
located on the exhibition floor within
easy reach of stands and the coffee area.
Wednesday, October 1
● Steve Bitton, TechOnline - Fundamen-
tals of Microcontrollers
● Chris Hills, Phaedrus Systems - De-
bugging is difficult: so why do it
● Dirk Grossmann, Vector Informatik
- Specifics of Embedded Software for
FlexRay
● Peter Hoogenboom, Green Hills
Software - Multicore Challenges and
Solutions
● Carsten Lehbrink, Nokia-Qt Software
- Sharing code across Embedded Linux
and WinCE
LIVE TEARDOWN 1 - Teardown of the
Estes Micro-Tiger Helicopter: To see
what makes the Micro-Tiger tick, come
witness this Live Tear Down, performed
by Steve Bitton, Technology Analyst for
www.techonline.com.
Thursday, October 2
● Matt Lee, XJTAG - Boundary Scan Test-
ing for Hardware Reliability
● David Giles, Software Test Tools
Manager, Hitex, (RS Components) -
An Embedded Development Platform
Explained
● Andrei Gorine, McObject - Indexes
Boost Performance and Minimize Foot-
print in Embedded Software
● Peter Hoogenboom, Green Hills Soft-
ware - Higher security through RTOS and
static source code analysis
LIVE TEARDOWN 2 - Teardown of the
Microsoft XBOX 360 Steering Wheel:
function performed by Steve Bitton, Tech-
nology Analyst for www.techonline.com.
Programme details, speakers’ abstracts
and bios are also available online.:
www.embedded.co.uk
ESE Magazine October 2008 17
15/09/08 15:37:40
 < Technology Focus >
System Development: Power
Super-capacitors lead the charge
A little intelligence can make super-capacitor energy storage a viable alternative to battery-power for some
applications. Keith Curtis of Microchip Technology Inc. outlines the options.
uper-capacitors are emerging as a
S possible alternative to batteries for
energy-storage in some applications.
However, the major advantages that
super-capacitors offer must be balanced against
some significant disadvantages. On the plus side,
super-capacitors have a virtually unlimited lifetime
of around 10,000,000 charge/discharge cycles and
they can charge and discharge at phenomenal
currents in excess of 1,000 Amperes. They are
also largely immune to temperature variations.
However, they cannot compete with batteries in
energy density or cost: typically super-capacitors
offer just 3-5% of the energy density of Li-Ion
batteries and cost 10 to 15 times more.
There are, however, some applications for which
the advantages outweigh even these limitations.
But super-capacitors also present two significant
design challenges in how they charge and retrieve
energy. With charging, the challenge is to transfer
energy to the capacitor when it is completely
discharged (effectively presenting a short circuit),
while retrieving energy also becomes progressively
more difficult as the capacitor voltage approaches
0V. Overcoming these two challenges is the main
hurdle for the efficient use of super-capacitors as
replacements to battery storage.
The charging challenge
Linear chargers dissipate a large percentage
of energy when charging a capacitor which is
completely discharged. Then, as the capacitor
charges, a smaller percentage of the energy is
Figure 1: SMPS-based constant-current charger
18 ESE Magazine October 2008
P18-20_ESEOct08.indd 18
lost, and more energy makes it into the capacitor.
Adding the power absorbed by the capacitor and
the power dissipated in the charger, the charger
will actually dissipate more than half of the
available energy as heat, over a full charge cycle.
In fact, a linear charger throws away almost 58%
of the available charging energy as heat.
The other charging option is to use a system
based on a Switch-Mode Power Supply (SMPS),
where the difference between the output capacitor
voltage and the source voltage is dropped across
an inductor. In a voltage-regulated SMPS design,
the inductor current is driven by the difference
between the voltage across the output capacitor
and a fixed reference voltage. This difference
voltage is then amplified, integrated, and phase-
shifted, before it is fed back into the Pulse-
Width-Modulation (PWM) comparator. The PWM
comparator then uses that voltage to determine
how much current to pump through the inductor on
the next cycle. Often, SMPS circuits can achieve
conversion efficiencies of greater than 80-90%,
with careful design.
In the charger circuit, very little time is spent
operating with a constant output voltage. By
definition, the charger circuit is designed to do
most of its work while ramping up the capacitor
voltage from zero to the final voltage. It is during
this charge-up period that energy transfer needs to
be optimised.
The charging circuit requires a system that
will regulate the charging current of the capacitor,
independent of the output voltage, and only use
the voltage feedback as the means of determining
when the charge is complete.
Figure 1 shows how this can be accomplished
using a variation on the typical SMPS design.
Here, the current in the inductor is regulated by
comparing the current in the inductor against two
fixed levels; one at the maximum desired current,
and the other at the minimum.
Initially, it will take the inductor very little time
to ramp up from the minimum to maximum current,
as the voltage across the inductor is at its maximum.
The discharge time will be correspondingly longer,
as the inductor has to discharge into a relatively
small voltage. As the charge in the capacitor
increases, however, the voltage difference will
drop, increasing the ramp-up time, and the capacitor
voltage will rise, shortening the discharge time.
While something similar can be implemented with
a traditional time-base driven PWM, the selection
of the inductor becomes critical to maintaining the
minimum current level. Additionally, instability can
occur when the duty cycle is greater than 50%. A
simple solution to avoid this instability is to use a
relaxation-oscillator, 555 Timer-style system, using
two comparators and a SR flip-flop, so that the
inductor component values set the frequency.
Retrieving energy
Getting energy from the super-capacitor also
presents challenges. It is easier to retrieve energy
from a battery because it maintains a relatively flat
discharge voltage as its charge is diminished. A
capacitor, on the other hand, has a steep discharge
slope that drops linearly from the full-charge
voltage down to zero. As there are few circuits that
can operate effectively over this voltage range, it
naturally follows that a SMPS-style boost circuit is
required to convert the variable capacitor voltage
into a reasonably constant load voltage.
As the capacitor voltage is now the source
voltage for the SMPS, when it drops, the inductor
current ramp-up time must increase if the output
voltage is to remain constant. This seemingly
trivial problem has one very serious consequence:
If the pulse of current delivered to the output
remains constant, but the time between deliveries
increases due to longer ramp-up times, the output
voltage will begin to sag between deliveries. This
means that, as the capacitor’s charge is diminished,
the output-voltage ripple will increase.
Given this behaviour, using a fixed inductor
current is no longer possible, if the circuit is to
www.embedded-europe.com
15/09/08 12:52:13
 NEC, Birmingham
1st-2nd c
O tober embedded systems show 08
National Exhibition Centre, Birmingham
1st-2nd October, 2008
15th Year of Embedded Success in the UK
Now part of Techinsights, the global leading organizers of conferences dedicated to the Embedded market, ess is the leading
international calendar event for the electronic systems and software development communities in the UK.
Whether your objectives are to:
• See New Products
• Meet New Contacts
• Network with Colleagues
• Improve Market Awareness
• Generate Business
Taking part in ess will help you achieve this and much more.
Latest News
• Discover and evaluate products and services offered by 85+
exhibitors in a Free Exhibition.
• Get the in-depth knowledge of technologies and tools in free
access design workshops.
• Select from 2 days of advanced tutorials given by expert speakers. special event announcements.
Exhibitor List 2008
2001 Electronics, Adaptive Modules, Adeneo, Alpha Micro
Components, Aonix, APC-Hero Displays, Atmel, BFI Optilas,
CATS Software Tools, connectBlue, Delta Microelectronics,
Digi, Direct Insight, DSP Design, eCosCentric, Eurocircuits,
Express Logic, Falcom, Feabhas, First Technology Transfer,
FTDI, Galorath, General Software, Gimpel Software,
Goepel Electronics, Green Hills Software, HCC-Embedded,
Hitachi Displays, Hitex, IAR Systems, iBASE Technology,
Institution of Engineering and Technology, IPL, iSystem,
IXXAT, JTAG Technologies, Kane Computing, Lantronix,
Lattice Semiconductor, Lauterbach, LDRA, LeCroy,
Linkwave Technologies, Matrox, MontaVista Software, MSC,
National Instruments, Nexcom, Nexus, Nohau, Nokia-Qt
Software, Objektum Solutions, Parasoft, PCB-Pool, Peak
Development, Pebble Bay Consulting, Phaedrus Systems,
Programming Research, Pure-Systems, QualiSystems, Rabbit
Semiconductor, Rapita Systems, Reflex Technology, RS
Components, Rutronik, Quadros Systems, Samsung, SCIOPTA
Systems, SDC Systems, Segger Microcontroller, Solid
State Supplies, Sundance Multiprocessor, Synesis Vision,
SYSGO, Taoglas, TechInsights, Tektronix, Telelogic, Trolltech,
TTE Systems, u-Blox, Vector Informatik, Vector Software,
Wordsworth Technology, XJTAG, Yokogawa Measurement
Technologies, (Correct on 12/9/2008)
Contact Us
For more information on the availability of conference
places and general event information please contact
TechInsights Europe
• Tel: +44 (0) 20 7560 4023
• dbhamra@techinsights.com
ESS Ad i dd 1
P19_ESEOct08.indd 1
• Gain real-world experience of developing and programming
in unique hands-on classes.
• New special features, including ‘Live Teardowns’ and ‘Build
Your Own Embedded System’ development kit giveaway.
• More still to come, go online for the latest product news and
Embedded Systems
Developer Conference
We offer conference classes or workshops of demonstrable
educational value to engineers and developers. Each class
will be at least one-hour in length ensuring a true depth of
technical insight.
The Highlight Topics in 2008 will identify the hot technology
trends that are providing both hardware and software
engineers with the greatest challenges:
Digital Convergence
• Embedded Multicore Programming
• Design for Low Power Consumption
• Platforms for Hardware and Software
Interoperability
• Wireless System Development
Dependable Systems
• System and Software Security
• Testing Hardware for Reliability
• Software Development for Critical Systems
• Development and Verification Standards in the
Embedded Market
Hands-On Classes
• Embedded Linux (3 hours),
• Advanced C Programming (3 hours)
• Concurrency in C++ (3 hours)
• Multi-Core Programming (3 hours)
• Build Your Own Embedded System
(Full day)
Sponsored by
FREE DESIGN WORKSHOPS
Free access to technical workshops presented by experts
from the leading suppliers of embedded solutions and
development tools. These sessions will advance your
knowledge of state-of-the-art technologies. The design
workshops are located on the exhibition floor within easy
reach of stands and the coffee area.
Wednesday, 1st October
• Fundamentals of Microcontrollers
• Debugging is difficult: so why do it?
• Specifics of Embedded Software for FlexRay
• Multicore Challenges and Solutions
• Sharing code across Embedded Linux and WinCE
LIVE TEARDOWN 1 - Estes Micro-Tiger Helicopter
To see what makes the Micro-Tiger tick, come witness this
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12/9/08 12 26 35
12/09/08 17:16:43
 < Technology Focus >
maintain a reasonably constant output voltage.
There are, however, three possible solutions. The
first is to stack super-capacitors together, to extend
the usable range of the retrieval circuitry, so that
the lost capacity is a smaller percentage of the
capacitor’s total storage capacity. Alternatively,
declare a minimum operating charge voltage
for the super-capacitor and shut down when the
charge drops below this level, which effectively
discards part of the super-capacitor’s capacity as
unusable. The third option is to limit the inductor
current, so that the output of the retrieval circuit
becomes increasingly current-limited as the charge
diminishes.
Unfortunately, there are two problems with
the series-stacked approach: First, there is the
problem of balancing the charge in the capacitors,
and the second concerns the SMPS design of the
circuit retrieving energy from the capacitor. There
are charge-balancing techniques that shunt charge
current around the individual capacitors, based
upon their charge voltage. One such technique
uses a Zener diode in parallel with each capacitor.
The second technique uses voltage comparators
and MOSFET transistors to shunt the current,
based upon a monitoring circuit.
The Zener diode circuit is by far the simplest
solution. The problem is that Zener diodes do not
have a perfectly sharp turn-on knee and actually
start conducting below their Zener voltage. As a
result, even when the capacitors are balanced,
there will still be some conduction around the
capacitors that is bleeding-off charge.
The active MOSFET charge balancer solves
this problem through a more complex switching
system. It monitors the voltage across the
various capacitors in the string and when any
capacitor reaches its maximum working voltage,
the monitoring logic disconnects the capacitor
from the string and shunts the charging current
to the other capacitors to continue charging. This
Figure 2: Composite charge-retrieval SMPS circuit
20 ESE Magazine October 2008
P18-20_ESEOct08.indd 20
eliminates the leakage-current problem, but at the
cost of a more complex system for monitoring the
voltages across all the capacitors. This additional
circuitry also burns some of the charge current to
power itself during the charging cycle, reducing
the charging efficiency of the system.
The second problem with a series-stacked
super-capacitors is the total voltage of the
capacitor string. Initially, the stacked voltage
will typically be higher than the required load
voltage, necessitating a buck topology SMPS
design. However, as the charge in the capacitors is
depleted, the stacked voltage will eventually drop
below the load voltage, as it ramps down to zero.
This means that, at some point in the discharge
curve, the SMPS design will have to switch gears
and become a boost topology SMPS design.
An alternative solution is to put multiple super-
capacitors in parallel, reducing the slope of the
discharge line. There are several advantages to this
method, including the fact that the capacitors will
automatically charge-balance to a common voltage.
The charge will then route to those capacitors with
greater capacitance without active direction, and
the total voltage for the banked system remains
low. This allows the use of a simple boost SMPS
to retrieve power from the capacitors. The boost
SMPS retrieval circuit can also pull more current
from a parallel configuration, while reducing the
I2R losses in the individual capacitors, because the
current load is shared by all the devices.
While banking multiple super-capacitors in
parallel reduces the slope of the capacitor voltage,
it does not eliminate the basic problem, but
merely delays it. When the capacitor voltage falls,
the time to charge a fixed inductance increases.
The only two solutions that are both simple and
practical are to shut down the boost when the
super-capacitor voltage drops below a reasonable
minimum voltage, or to limit the inductor current
as the charge in the super-capacitor is depleted.
The super-capacitor boost circuit does not need
a fixed-current limit. Instead, what is needed, is a
current limit that decreases as the capacitor voltage
drops. This will correspondingly drop the maximum
inductor current and maintain a reasonable ramp-
up time. To do this, the circuit can be modified so
that the current-limit input is driven with feedback
from the super-capacitor. This will reduce the
maximum current linearly, with the reduction in
voltage. This keeps the equation balanced and the
maximum charge time reasonably constant, as the
capacitor voltage drops to zero.
Adding intelligence
There is a certain similarity between the buck
topology circuit used to charge the super-capacitor,
and the boost topology circuit used to retrieve
energy: Replacing the Flyback diode in the buck
circuit with a synchronously switched MOSFET,
creates the same power-chain circuit as replacing
the Flyback diode in the boost circuit.
Figure 2 shows what can be achieved with
a little embedded intelligence. Re-routing the
PWM signals to both MOSFETs, and re-routing
the feedback and current-sense signals, creates a
circuit that can, with some embedded intelligence,
handle buck charging as well as boost retrieval. The
intelligence can also be tasked with monitoring the
capacitor, output and source voltages for charging,
to determine which topology is required.
This circuit can either use a microcontroller
with the necessary mixed-signal peripherals
to build the conversion circuitry, or a simple
microcontroller combined with an array of
sufficiently programmable external mixed-signal
devices to allow the required switching and
control. Microchip’s PIC family of microcontrollers
includes both low-cost controllers, as well as
versions which integrate mixed-signal peripherals
optimised for power applications.
The use of super-capacitors for energy storage
does have significant advantages, as well as
disadvantages, compared to chemical, battery
storage. Its extended life and immunity from
temperature effects can make the super-capacitor
the preferred storage medium, despite its cost and
limited energy-density. The challenges associated
with charging and retrieving energy from a super-
capacitor system, however, also have to be
factored into the cost/benefit analysis.
These challenges can be significant, but
they can be handled with careful design and the
inclusion of some simple embedded intelligence.
Recent developments in the PIC microcontroller
family include controllers which integrate many of
the mixed-signal peripherals needed to implement
SMPS-style charging and retrieval.
The addition of embedded intelligence can,
therefore, help to reduce the size and cost of
using super-capacitor storage as an alternative to
conventional batteries. <Ends>
www.microchip.com
www.embedded-europe.com
15/09/08 12:52:34
P21_ESEOct08.indd 1 15/09/08 12:00:25
 < Technology Focus >
Systems Development: Power
It’s every designer’s responsibility
Just because your embedded system is line powered doesn’t mean you shouldn’t be concerned with power
management . By Richard Nass
esigners of portable systems are very
D “power aware.” They look to save every
milliwatt in an effort to increase battery
life and, thereby, run time in their
systems. But for embedded systems developers
who plug their systems into an ac line, power
management is not that important. Or is it?
Whether plugged or portable, all embedded
systems today must manage power wisely. Power
management is important and becomes more
important every day. A multitude of reasons exist
for why designers need to care about power, and
that list keeps growing. For example, the amount
of data we store grows
significantly larger every year.
To handle all this data, we
need newer, faster servers
– and more of them.
More servers, and even
more server blades within
each enclosure, means a
greater demand for power.
Additional servers create more
heat, requiring more cooling.
Air conditioning can get
expensive. And don’t forget
that the cost of the power
(electricity) itself is greater
than ever before.
So why, then, isn’t power a
“front-of-mind” consideration
for embedded systems
developers? “It’s starting to
be,” says Rob Oshana, an engineering manager
at Freescale Semiconductor Inc. “Historically,
embedded systems were all about allocation of
scarce resources, like performance, memory and
power. But performance was the key attribute,
often at the expense of power.”
Perhaps more telling is how difficult it is to
design for power management. Performance
is usually easier to manage from a software-
development and chip-design perspective.
Although turning up the clock frequency may
be an easy way to improve performance, it just
exacerbates the power problem.
System cost is another consideration. Lowering
system power should result in fewer fans and heat
sinks; a shorter bill of materials is a great by-
product of using less power.
Designers also need to be more power aware
as process technology evolves. As the process
22 ESE Magazine October 2008
P22_ESSOct08.indd Sec1:22
technologies we’re dealing with today increase, According to Booth, “Every industrialised
45nm in some cases, leakage is becoming the
dominant power contributor to the overall power
budget. The embedded systems developer needs
to be acutely aware of the active part of the power
equation.
country except the U.S. has government mandates
in place that require improvements in power
efficiency for this class of systems. The U.S.
chooses to encourage energy improvements
through the power of consumer marketing and the
Tim Morin, a senior product development coveted Energy Star ratings.”
manager at Actel, notes that needs change over
time. “Your computing needs change. They always Think power early and often
have. So how do you get more power/heat dissipated The key to why it’s so important to consider power
without having to change your environment or your early in the design process is consumption: the
power coming into the building? You do that by world’s consumption of power is increasing at an
implementing poweruse models, understanding alarming rate.
With much of that
power generated from non
renewable sources (oil
or coal), the entire world
will have to squeeze more
“work” out of less available
power. Engineers can do
much to accomplish power
savings by increasing an
application’s efficiency or
lowering its total power
requirement.
Increased efficiency “Increased efficiency”
comes simply by comes simply by replacing
older components with
replacing older newer, more energy-
components with newer, efficient components. And
more energy-efficient ones. because about 70% of the
world’s total energy goes
to motion applications, this
how much power is available and how much you’re improved efficiency can significantly contribute
actually consuming.” toward lowering the world’s overall power bill.
Don Shin, from Freescale’s Networking and
A powerful state of mind Computing Systems Group, thinks the term “power”
Some industry members disagree with the is overused. “Whereas power for a designer is
contention that developers are ignoring power as a really a supply issue, related to FETs, capacitors,
design consideration. Jean Ann Booth of Luminary inductors and the like, energy is more complex
Micro says, “Power frequently is considered and determines thermal strategies, system foot
early in the design process, and that frequency print and longterm consumption costs. Engineers
is increasing. Line-powered embedded segments frequently talk about reducing power, but what
that are increasingly power sensitive include they’re really talking about is lowering energy to
white goods, like refrigerators, washing machines, support thermal, space and cost constraints.”
dryers, etc., and HVAC.” Regardless of where you think our power-
Many of the power-efficiency improvements awareness level sits today, all designers understand
we’ve seen over the last few years in white and agree that power management is and will be a
goods are a result of government mandates high priority going forward. <Ends>
and incentives, particularly in the U.S. from the
federally sponsored Energy Star program. But it’s Richard Nass is editorial director of Embedded
still not enough. Systems Design – a sister magazine of ESE.
www.embedded-europe.com
15/09/08 16:40:57
P23_ESEOct08.indd 1 15/09/08 17:44:28
 < Technology Focus >
Components: Digital
Halving the pain through parallelism
Seven tips to help get you started with multi-core processors.
By Stephen Blair-Chappell, Technical Consulting Engineer, Intel Compiler Labs.
ulti-core processors are
M everywhere. In desktop computing,
it is almost impossible to buy a
computer today that doesn’t have
a multi-core CPU inside. Multi-core technology
is also having an impact in the embedded space,
where increased performance per Watt presents a
compelling case for migration.
Developers are increasingly turning to multi-
core because they either want to improve the
processing power of their product, or they want
to take advantage of some other technology that
is ‘bundled’ within with the multi-core package.
Because this new parallel world can also represent
an engineering challenge, this article offers seven
tips to help ease those first steps towards using
these devices.
It’s not unnatural to want to use the latest
technology in our favourite embedded design.
It is tempting to make a design a technological
showcase, using all the latest knobs, bells and
whistles. However, it is worth reminding ourselves
that what is fashion today will be ‘old hat’ within a
relatively short period. If you have an application
that works well the way it is, and is likely to
keep performing adequately within the lifetime
Figure 1: The internals of the Intel low power IA architecture
24 ESE Magazine October 2008
P24-26_ESEOct08.indd 24
of the product, then maybe there is no point in
upgrading.
One of the benefits of recent trends within
processor design has been the focus on power
efficiency. Prior to the introduction of multi-
core, new performance barriers were reached
by providing silicon that could run at ever higher
clock speeds. An unfortunate by-product of this
speed race was that the heat dissipated from such
devices made them unsuitable for many embedded
applications.
As clock speeds increased, the limits of the
transistor technology physics were moving ever
closer. Researchers looked for new ways to
increase performance without further increasing
power consumption. It was discovered that by
turning down the clock speeds and then adding
additional cores to a processor, it was possible
to get a much improved performance per Watt
measurement.
The introduction of multi-core, along with
new gate technologies and a redesign of the
most power-hungry parts of a CPU, has led to
processors that use significantly less power, yet
deliver greater raw processing performance than
their antecedents.
An example is the Intel Atom, a low power IA
processor which uses 45nm Hi-K transistor gates.
By implementing an in-order pipeline, adding
additional deep sleep states, supporting SIMD
(Single Instruction Multiple Data) instructions
and using efficient instruction decoding and
scheduling, Intel has produced a powerful but not
power-hungry piece of silicon.
Taking advantage of the lower power envelope
could in itself be a valid reason for using multi-core
devices in an embedded design – even if the target
application is still single-threaded.
Use advanced architectural extensions
All the latest generation of CPUs have various
architectural extensions that are there for ‘free’
and should be taken advantage of. One very
effective but often underused extension is support
for SIMD – that is, doing several calculations in
one instruction.
The Atom processor, for example, has dedicated
SIMD execution units, as can be seen in Figure 1.
Often developers ignore these advanced
operations because of the perceived effort of
adding such instructions to application code.
While it is possible to use these instructions by
adding macros, inline assembler or dedicated
library functions to the application code, a
favourite of many developers is to rely on the
compiler to automatically insert such instruction in
the generated code.
One technique known as ‘auto-vectorisation’
can lead to a significant performance boost of an
application. In this technique the compiler looks
for calculations that are performed in a loop. By
replacing such calculations with, say, Streaming
SIMD Extension (SSE) instructions, the compiler
effectively reduces the number of loop iterations
required. Some developers have seen their
applications run twice as fast by turning on auto-
vectorisation in the compiler.
Like the power gains of the previous section,
using these architectural extensions may be a valid
reason in itself for using a multi-core processor,
even if you are not developing threaded code.
Not all programs are good candidates for
parallelism. Even if your program seems to need
a ‘parallel facelift’, it does not necessarily follow
that going multi-core will help you.
For example, say your product is an application
running real-time weather pattern simulations,
based on data collected from a number of remote
www.embedded-europe.com
15/09/08 12:56:02
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P25_ESEOct08.indd 1 15/09/08 12:57:37

 < Technology Focus >
Figure 2: Using the Intel VTune Performance Analyser to observe runtime behaviour.
sensors. The measurements of wind speed,
direction, temperature and humidity are being
used to calculate the weather pattern over the
next 30 minutes. Imagine that the application
always produces its calculation results too late,
and the longer the application runs the worse the
timeliness of the simulation is.
One could assume that the poor performance
is because the CPU is not powerful enough to do
the calculations in time. Going parallel might be
the right solution – but how do we prove this? Of
course, it could be that the real bottleneck is an
IO problem, the reason for the poor application
performance being the implementation of the
remote data collection and not excessive CPU
load.
There are a number of profiling tools available
that can help form a correct picture of the running
program. The Intel VTune Performance Analyser
is an example of such a tool and can be seen in
Figure 2. Such analysers typically rely on runtime
architectural events that are generated by the CPU.
Before you migrate your application to multi-core,
it would be worth analysing the application with
such a tool, using the information you glean to help
in the decision making process.
There are different ways that one can introduce
parallelism into the high-level design of a program.
Three common strategies available are functional
parallelism, data parallelism and software pipe-
lining.In functional parallelism, each task or thread
is allocated a distinct job; for example one thread
might be reading a temperature transducer, while
another thread is carrying out a series of CPU
intensive calculations.
In data parallelism, each task or thread carries
out the same type of activity. For example, a large
matrix multiplication can be shared between, say,
four cores, thus reducing the time taken to perform
that calculation by a factor of four.
A software pipeline is somewhat akin to a
26 ESE Magazine October 2008
P24-26_ESEOct08.indd 26
production line, where a series of workers carry
out a specific duty before passing the work onto
the next worker in the production line.
In a multi-core environment, each worker
– or pipeline – is assigned to a different core. In
traditional parallel programming, much emphasis
is laid on the scalability of an application. Good
scalability implies that a program running on a dual-
core processor would run twice as fast on a quad-
core. In embedded systems, computing scalability
is less important because the execution of the end
product tends not to be changed; the shelf-life of
the end product usually being measured in years
rather than months.
It may be that when moving to multi-core, the
embedded engineer should not be over-sensitive
to the scalability of his design, but rather use a
combination of data and functional parallelism
that delivers the best performance.
Using high-level constructs
Threading is not a new discipline and most
operating systems have an API that allows the
programmer to create and manage threads. Using
the APIs directly in the code is quite tough, so
the recommendation is to use a higher level of
abstraction. One way of implementing threading is
to use various high-level constructs or extensions
to the programming language.
OpenMP is a pragma-based language
extension for C/C++ and FORTRAN that allows the
programmer to very easily introduce parallelism
into an existing program. The standard has been
adopted by a number of compiler vendors including
GNU, Intel, and Microsoft. A full description of the
standard can be found at www.openmp.org
With OpenMP it is easy to incrementally add
parallelism to a program. Because the programming
is pragma based, your code can still be built on
compilers that don’t support OpenMP – the
compiler in this case would just issue a warning
that it has found an unsupported pragma.
As stated earlier, functional parallelism is
potentially more interesting than data parallelism
when developing an embedded application.
An alternative to using OpenMP is to use
one of the newly emerging language extensions
which supply similar functionality. It is expected
that eventually such language extensions will be
adopted by an appropriate standards committee.
An experimental compiler with such extensions
can be found at www.whatif.intel.com.
Another approach to traditional programming
languages is to use a graphical development
environment. There are a number of ‘program by
drawing’ development tools that take care of all
the low level threading implementation for the
developer.
One example is National Instruments’
LabVIEW, which allows the programmer to design
his program diagrammatically, by connecting a
number of objects together. Support for multi-core
is simply adding a loop block to the diagram.
When programs run in parallel, they can be very
difficult to debug – especially when using tools
that are not enabled for parallelism. Identifying
and debugging issues related to using shared
resources and shared variables, synchronisation
between different threads and dealing with
deadlocks and livelocks are notoriously difficult.
However, there is a now a growing number of
tools available from different vendors, specifically
designed to aid debugging and tuning of parallel
applications. The Intel Thread Checker and Intel
Thread Profiler are examples of tools that can be
can be used to debug and tune parallel programs
Where no parallel debugging tools are available
for the embedded target you are working on, it is a
legitimate practice to use standard desktop tools,
carrying out the first set of tests on a desktop
rather than the embedded target. It’s a common
experience that threading issues appearing on the
target can often be first captured by running the
application code on a desktop machine. <Ends>
www.intel.com
The author of this article – Stephen
Blair-Chappell – will also present a
lecture and hands-on workshop on
parallel programming for multi-core
at Embedded Systems Show at the
NEC - see page 16 for more details or
see the full program at:
www.embedded.co.uk
www.embedded-europe.com
15/09/08 12:56:25
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 < Technology Focus >
Components: Digital
Your flexible friend
To what extent can hardware be designed-out in order to expedite development of embedded systems?
By Jon Pearson, Product Marketing Director, Cypress Semiconductor Corp.
ll embedded systems eventually
A connect to hardware; be that external
sensors and actuators, or internal
functional blocks and peripherals.
And all hardware has its own idiosyncrasies
that a designer must contend with. Furthermore,
changing any element of the hardware design,
even something as simple as adding or subtracting
an input or output port, impacts the embedded
software. Hardware changes are inevitable, but
changes made late into the design process may
mean your product is also late to market. Unless,
that is, you completely design the hardware out of
your system.
Beginning the design process using this
approach can yield greater overall flexibility and
means that hardware can be swapped at almost
any time, which simplifies debugging and speeds
time to market. Many readers may be thinking (quite
rightly) that this isn’t an entirely new idea, but new
technologies and design tools are now available
that make comprehensive hardware design-out
and the associated benefits a practicable design
choice.
What does ‘design-out’ mean?
In brief, designing-out the hardware means
separating all control and algorithmic software
from the hardware-interfacing software. By
logically constructing wrappers and interfaces
around all hardware you can replace, at any time,
the particular hardware in use with a logical
alternative without impacting the control and
algorithmic software.
Abstracting hardware with understandable,
logical interfaces (functions, macros, symbols)
makes a design more portable and enables
developers to concentrate on solving the real
application problems. It sounds so easy and
straightforward that your team may already be
applying a form of this methodology, but take a
Figure 1: Simple fan control system
28 ESE Magazine October 2008
P28-30_ESEOct08.indd 28
look at your current project (or favourite past one)
and consider what would happen if you changed
the microcontroller. If switching to a different
microcontroller would be a major disruption, you
have designed-in the hardware to some extent.
When you start a project, there is at least a
small set of driving ideas or requirements. This is
the time to begin designing a hardware-free system.
In its simplest form designing the hardware out of
your embedded system means logical isolation
between the embedded application software and
all direct contact with the hardware. This includes
anything that would be affected if the physical
design or selected microcontroller were to be
changed.
It extends to obvious things like support
hardware within the selected microcontroller.
The analogue-to-digital converter (ADC), and the
communications interface (UART, SPI, I2C, USB,
CAN), for instance. If the physical system design
includes sensors and actuators, these also impact
software if changed, as do common elements like
input/output ports and embedded memory.
Each piece of hardware you find that connects
to another piece of hardware is a potential point of
disruption if it is swapped for another.
The answer is to isolate each piece of hardware
within a wrapper or interface; if you follow this
path throughout your design process, at the end
you will see two things. First, you will see how
your hardware relates to your final system, and
therefore how a new project could benefit from
your work. Second, someone designing a brand
new project in a completely different type of
application can take your project and adapt it to
fit their project, replacing or removing layers that
change due to the new application.
How it works – by example
Let’s take an example application, a fan whose
speed is monitored and controlled according to
temperature, and try to walk through the design
process, designing-out the hardware as we
go along. At the beginning of the project, it is
known that we need to: obtain a temperature
reading; compute a desired fan speed based upon
temperature; obtain a current fan speed reading;
compute a new fan command based upon the
current fan command and difference between the
desired and the current fan speed, and; output the
new command to the fan
Figure 1 shows a block diagram of the system,
in which the rectangles are hardware dependent,
and the ovals are not. Now as the project proceeds,
a decision is made to use a thermistor as the
temperature sensor, maybe because it is cheap, or
it has specific desirable properties.
Looking at figure 2, the ‘Get Temperature’
rectangle is expanded into separate hardware
dependent functions associated with the thermistor
design, including the hardware characteristics of
the thermistor and its interfacing circuitry.
Temperature is represented by the device as a
resistance, with signal conditioning circuitry the
resistance is represented as a voltage, using the
ADC described the voltage is converted to a count
value between 0 and 4095, and with software
the counts are converted to a temperature in a
machine-storable representation (for instance
fixed-point value temperature with the resolution
of 0.1°Celsius).
We have put the temperature into a data store
so that its value can be updated asynchronous to
the control algorithm. This makes the temperature
always as current-as-possible for the control
algorithm and better isolates hardware from
software.
Later, it is determined that for this design, the
microcontroller will not be near enough to the
temperature hot-spot to use a thermistor; running
the analogue lines all the way from the thermistor
to the microcontroller pins introduces too much
opportunity for noise and signal loss.
Instead we will install in the temperature zone
an integrated circuit, an LM75 I2C temperature
sensor that converts temperature locally and
provides a digital value onto an I2C bus as a slave
device.
Now in order to get a temperature, as
shown in figure 3, we have to enable I2C master
communications hardware in our microcontroller,
read a particular set of registers in the LM75, convert
the temperature from native representation (the
www.embedded-europe.com
15/09/08 13:02:43
P29_ESEOct08.indd 1 16/09/08 11:18:46
 < Technology Focus >
Figure 2: Thermistor sensing details
least significant bit represents 0.125°Celsius) to
our previously chosen temperature representation
(fixed point value temperature with the resolution
of 0.1°Celsius).
Because we isolated our control software,
the control application software has not been
impacted at all by this hardware change; and any
peculiarities associated with the LM75 can be
tucked into one of the blue rectangles of figure 3,
exposed to scrutiny and verification without having
to disturb the control software.
For instance some of these devices start a
new conversion each time the I2C master reads
the temperature value/register and if this access
occurs too fast or too often, the LM75 will not finish
a conversion. The control algorithm, therefore,
doesn’t need to care about these details.
If we started with the thermistor design of
figure 2 and changed our microcontroller, the
commands to configure and access the ADC would
change, the register sequence to multiplex and
Figure 3: I2C digital temperature sensor details
30 ESE Magazine October 2008
P28-30_ESEOct08.indd 30
sample the inputs would change and the counts-
to-temperature conversion might change.
Since these were all tucked neatly into
rectangles (representing functions and/or macro
definitions and calls) simply replacing the contents
of the rectangles with the new instructions
required by the new microcontroller changed the
hardware but not the software.
Our specific example purposely changed the
hardware outside of the microcontroller to make a
more universal point, but the same process applies
if the microcontroller hardware changes.
Technologies enabling design-out
When it comes to making it easier to design-out
hardware, microcontroller companies are striving
to simplify the process a few steps further by
employing hardware abstraction within their
software development tools. The peripheral
functions of microcontrollers are selected by users
from a catalogue of choices, depending upon
what the application requires, and can be added
or removed from the design as requirements
change. Abstraction can be carried to a higher
level, however, by using a mixed signal array. For
example, with the PSoC Mixed-Signal Array devices
and visual embedded design tools, the software by
default employs a hardware abstraction method
and generates all the layers automatically.
Referring to the example above, in order to
modify the thermistor, the user selects ‘Thermistor’
from a catalogue in the PSoC Express design tool,
defines the ‘Compute Desired Speed’ control
algorithm, and the development tool presents
which devices are available with the necessary
resources for the application. Upon selecting
a device, the tools generate the necessary
firmware to read, convert and store the thermistor
temperature in fixed-point format into a data
structure and make it available to the “Compute
Desired Speed” algorithm. If the specifications
of the thermistor change, the user can select a
different PSoC device with only those devices with
the necessary resources for the application shown,
and the hardware abstraction layers regenerated
without impacting the control algorithm.
When it comes to making it easier to design-
out hardware, microcontroller companies are
striving to simplify the process a few steps further
by employing hardware abstraction within their
software development tools. Until the day comes
when no unexpected design changes occur, or
everyone can set their own deadlines, it is worth
considering these developments and a greater level
of hardware design-out methodology. <Ends>
www.cypress.com
www.embedded-europe.com
15/09/08 13:03:02
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P31_ESEOct08.indd 1 12/09/08 17:28:11

 Embedded2Enterprise
ZigBee simplifies water meter reading
David Blisset & Ollie Smith of Telegesis describe how ZigBee modules have been integrated into the Moscow
water supply.
M
onitoring and accurate ac-
counting of utility consumtion
– whether electricity, gas,
or water – is a strategically
important task, affecting the economy of every
country. TBN Energoservice is a Russian company
that has specialised in metering and analysis of
energy resource consumption for the past decade.
its offers its energy services to utility companies
enabling their consumers to take an active role in
energy saving programs by developing solutions.
TBN Energoservice has invested considerable
funds in the development of automatic meter read-
ing (AMR) and advanced metering infrastructure
(AMI) systems using the latest technical develop-
ments. TBN engineers are currently implementing
a major wireless water consumption AMR system
which uses ZigBee mesh networking software and
silicon from Ember Corporation delivered in mod-
ule form via the ETRX2 module produced by British
company Telegesis (UK) Ltd.
In the Russian model water is pre-heated in
dedicated power plants and pumped underground
directly to consumers apartments. Historically, the
provision of all water services – including hot wa-
Figure 1: TBN wireless automated water metering subsystem
32 ESE Magazine October 2008
P32-34_ESEOct08.indd 32
ter for central heating and washing – has been free as modems. The Telegesis command layer for the
of charge. To introduce a levy based system and to ETRX2 firmware forms a powerful software prod-
monitor usage of hot and cold water a metering uct providing comprehensive access to the mesh
scheme has been introduced. networking technology of Ember silicon and of-
TBN Energoservice delivers its energy service fering a simple and fast way to develop a ZigBee
via its own back end information system – dubbed wireless system. The ETRX2 firmware is based on
GIS TBN ENERGO – which differs from many AMR the EmberZnet stack and performs all mesh-net-
systems in the market in that it offers a compre- working functions such as network forming, data
hensive approach. re-transmission, self-healing and route discovery.
The TBN system includes the AMR subsystem, One advantage of Telegesis products is that
the dispatcher control subsystem – responsible for two versions of the module are delivered with the
control of equipment states and failure detection same form factor – a low cost base ETRX2 mod-
– the data saving subsystem, and the analytic sub- ule and an ETRX2-PA module with an additional
system. From initial concept stage the GIS TBN EN- 100mW amplifier allowing designers to optimise
ERGO system has been designed to be truly scal- the overall cost of the system.
able and can be implemented as a district, city, or Typically, modules without amplifiers have an
regional scale system. Currently 50 district systems outdoor range up to 300 m however experience
have already been put into the service in Moscow showed in the installation of the Moscow wa-
as part of the local government program known as ter meters that the ETRX2 modules can reliably
“Water meter into every municipal house”. transmit messages from inside an apartment with
Initially, TBN’s AMR subsystem used one me- a metal door to a stairwell platform. The more
ter per house. This was followed by a wired data powerful ETRX2-PA modules allow outdoor data
acquisition system with multiple apartment water transmission typically, up to 800 metres, and can
meters per building. TBN Energoservice are now transmit data over 3 to 5 floors inside an apartment
moving to a wireless AMR based on ZigBee tech- block.
nology. Module configuration is performed by program-
In order to simplify ming internal non-volatile registers. All modems in
system implementation a network are the same and can be assigned as
ZigBee wireless com- a coordinator, router or end device. The Telegesis
munication based on AT-command set introduces an additional concept
Telegesis ETRX2 modules – a central acquisition data node known as a ‘sink
using Embers technology node’ which is assigned by programming a cor-
was selected. The ZigBee responding modem configuration register. The co-
mesh network topology ordinator or any router in a network can be as-
can support a coordinator, signed as a sink. Telegesis ETRX2 modules have
multiple routers and mul- a deep sleep mode giving current consumption of
tiple end devices (sleepy less than 1µA whilst the RTC continues to work
or mobile). thereby allowing end nodes to extend their battery
Telegesis ETRX2 life to several years.
modules were chosen as A unique 64-bit identifier pre-programmed
the base components for into each module at manufacture is used for
the TBN wireless AMR node addressing and the availability of embed-
subsystem. Telegesis ded firmware tested by the manufacturer reduces
specialises in manufac- system development time and eliminates the need
turing wireless mesh net- for expensive, complex development tools. The
working modules based Telegesis AT-command set supports comprehen-
on Ember’s chip set and sive functions including wireless network forming,
are used in a range of im- network monitoring, transmit/receive messages
plementations. Telegesis via radio channel, input/output of digital and ana-
engineers were among log information, and control of timers and serial in-
the first to develop an terface. Thus designers using ETRX2 Modules can
‘AT’ style command set concentrate on application tasks and simply treat
for their radio modules the wireless network as an easily implemented
effectively offering them data transmission interface.
www.embedded-europe.com
15/09/08 16:48:09
 The missing piece of your
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Offering global coverage with a

European perspective
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only supply local coverage. Yet the electronics
market has become global. EE Times Europe,
delivers a truly dynamic European and global
perspective to the European reader.

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EE Times Europe.
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for the creators of technology in Europe.

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P33_ESEOct08.indd 1 15/09/08 14:57:07

 Embedded2Enterprise
Figure 2: KM-K-3Z loogers are installed in apartments
alongside the water meters
Software stacks such as EmberZNet PRO 3.1 and
later, delivers robust and reliable mesh networking,
supporting all ZigBee device types in a single stack
image for Ember’s IC platforms. EmberZnet PRO 3.1
includes the industry’s first proven stack based on
the ZigBee PRO feature set, enhanced with Ember
innovations; it provides many features for the most
challenging applications such AMI, home automa-
tion, and building automation systems.
ZigBee PRO adds advantages including larger
networks scaling to potentially thousands of nodes
in a single network enabled by stochastic address-
ing, many-to-one/source routing and asymmetric link
handling. Dense networks through intelligent table
management assure network stability even when
many routing nodes are within close proximity.
Configurable deep-sleep time-outs and special
router parent functions significantly extend battery
life of end devices by allowing networks capable of
sleep and hibernation. Security is further enhanced
by implementing many of the optional ZigBeePRO
security extensions for advanced network encryp-
tion and device security. Resilient networks are also
assured by a frequency agility feature allowing the
entire network to change channels when interference
is present
The main block layout of the TBN Wireless au-
tomated water meter reading subsystem is shown
in figure 1. In this scheme apartments are equipped
with TBN KM-K-3Z loggers, which have inputs for
three meters – one each for cold and hot running wa-
ter and one for heated water used for central heating.
These loggers include a microcontroller and an ETRX2
module and are configured as sleepy end devices in
the wireless network.
KM-K-8Z floor controllers are located on stair
landings of every floor in built-in cabinets with elec-
tricity equipment. They are mains powered and are
configured as routers in the ZigBee wireless network.
In addition, each KM-K-8Z has eight inputs for elec-
tricity meters with impulse output. In most cases the
34 ESE Magazine October 2008
P32-34_ESEOct08.indd 34
electricity meters are in the same electricity cabinet.
Floor controllers KM-K-8Z have microcontrollers and
an ETRX2-PA module which has additional power
amplification enabling data to be transmitted over 3
to 5 floors.
The building controller TBN KM-DZ is based on
an ETRX2-PA amplified module which is pre-pro-
grammed to work as a network sink node. All infor-
mation from network routers is sent to a TBN KM-DZ
which communicates to a dispatcher office via Ether-
net. In addition the building controller KM-DZ has an
additional USB port allowing collected information
to be copied into a USB flash stick if needed. The
building controller has no visual display, so in order
to read the system state a removable operator panel
KM, with a 4-line alphanumeric LCD and a small key-
board is used allowing TBN KM-DZ memory reading
and monitoring of network node states.
There is also an independent metering system
inside the building based on existing water meters.
Information from this system is also transmitted to a
dispatching office via Ethernet.
System commissioning and
operation algorithm
The major advantage of this system is its commis-
sioning simplicity. KM-K-3Z loggers are installed in
apartments at the same time as water meters – see
figure 2 – and no additional power or signal cables
are needed. Installation engineers simply mark the
locations of every node on a building plan and fit
node identifiers. Floor routers are installed in built-in
cabinets on each landing where mains power is avail-
able and the building controller is placed either in a
basement or an attic or roof space.
Immediately after installation, end nodes and
routers begin joining the network. They perform a
‘PAN SCAN’ and attempt to join the established
wireless network. When the central sink node is
switched on routers connect to it and end nodes link
to the routers. During network building only nodes
with a pre-programmed encryption key are permitted
to join.
Child nodes choose their parents randomly. Par-
ent routers could be situated either on the same floor
as their children or on upper or lower floors. End node
messages contain specific identifiers which allow a
central node to correlate data received via intermedi-
ate routers with apartment numbers.
It’s calculated that end nodes can work for up to 4
years on one set of batteries. In order to save battery
power the KM-K-3Z end nodes transmit data to their
parent routers once per hour. The receiving routers
then buffer this data. Whilst in communication with
end nodes, routers synchronize the end node clocks
and transmit any relevant control information from
the central node if required. When routers perform
data exchange with their child node loggers in each
apartment, data is not automatically retransmitted.
These exchanges are simply data acquisitions in
multiple independent star configuration networks
distributed throughout the building with the rout-
ers working as central nodes of the stars.
Routers only transmit all buffered data upon
a request from a central sink node. At this stage a
wireless mesh network mechanism with retrans-
missions and route discovering is applied.
Installing routers on every floor provides sev-
eral possible routes for message transmission to
the central node. In this case a wireless network
can automatically choose the optimal route and
rediscover a new route in case of failure of the
old one.
The GIS TBN ENERGO system has distributed
intelligence. Each level is responsible for its own
data processing task. So end apartment loggers
KM-K-3Z have buffers that permanently contain
data reflecting the cumulative total of water con-
sumed since last meter calibration. End nodes
also calculate the value of consumed water,
control meter link quality, monitor meter cover
state (open/closed), report on battery status and
other possible problem states. Floor routers KM-
K-8Z add additional data from their local electric-
ity meters to these messages before forwarding
them.
The central building controller KM-DZ ag-
gregates data to a dispatching office. This office
also receives information from independent,
existing building meters and comparing results
from these two information sources, calculates a
balance of water consumption in a building alert-
ing authorities to possible leaks and equipment
failures. As end loggers permanently store cumu-
lative records of total consumed water there is
no risk of information loss even if communication
between an end node and the whole system is
lost.
If an end KM-K-3Z logger loses contact with
a parent router it will continue counting water
consumption and calculating the water consump-
tion tariff while the information system informs
the authorities that there is a loss of contact with
that end node. After communication is re-estab-
lished the end node will transmit all the data
collected whilst it was out of contact. Thus TBN
Energoservice has developed an easy to install,
reliable automated meter reading systems of up
to 500 water meters.
Consumers in each apartment can now be
sure that they are being accurately billed grant-
ing them sight of their consumption levels and
enabling them to monitor and conserve water
usage. Utility companies benefit from accurate
customer consumption figures improving billing
and payment collection with a consequent reduc-
tion in bad debts and unpaid bills. The technology
also assists by detecting leaks and equipment
failure far more quickly than usual. ●
Ollie Smith is business manager and
Dave Blissett is marketing manager at
Telegesis – www.telegesis.com
www.embedded-europe.com
15/09/08 16:48:26
 Kane Computing Ltd
DSP and FPGA Development Solutions
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P35_ESEOct08.indd 1 15/09/08 12:36:27

 Embedded Distribution
Singling out a solution
Key issues for designers in the selection and use of single board computers.
By Richard Eden, Marketing Development Manager for Electronics, RS Components.
C
ompanies looking to source
single board computers (SBCs) to
meet new embedded electronics
requirements not only need to
know that they are selecting the right product
for their situation, but that development times
and costs will be right for them, too.
Making these choices requires both expert
product knowledge and a good understanding of
what users are looking for. Electronic equipment
distributors like RS Components are therefore
well-placed to work with their customers in
helping them make the right decisions and to
access solutions quickly.
However, a successful distributor does far
more than simply sell products, they provide
added value through services and support
to their customers and they also invest in
continuously improving those services
to enhance the customer’s overall
experience.
These days the range of
applications for SBCs is huge,
including: vending machines;
ATMs; some medical
equipment; dispensing
machines; ticketing systems
and the information display systems linked
to them (such as in airport terminals); access
control; bioscan and general security systems;
transport and gaming systems; automation and
process systems; control of services in buildings,
and factory automation equipment. Across all
these fields, getting design solutions to market
quickly is a major challenge for embedded
electronics systems designers and selecting the
right equipment is therefore vital.
There are many suppliers of SBCs available,
so it is important to apply the right criteria when
selecting a manufacturer. RS looks at things very
much from the perspective of what customers
have expressed a need for. As a result, RS
favours the main protagonists, because they
have a strong reputation in the global market,
as well as the resources to offer a wide range
of products and functionality, which are crucial
to meeting customers’ needs.
Why SBCs?
Customers use SBCs for various reasons. Some
companies, who need a fast route through
the development cycle for their system, might
buy an SBC and use it to provide most of the
system functionality. They may then contact the
36 ESE Magazine October 2008
P36-38_ESEOct08.indd 36
manufacturer direct to achieve any additional
functionality required and to meet their volume
requirements. Customers in small companies
often don’t want to spend precious development
time designing and testing their own bespoke
platform, so an SBC provides additional choice
in helping them to develop a solution quickly.
Sourcing an SBC through a distributor
such as RS offers some crucial benefits to
customers. First, a distributor can often supply
SBCs from stock, the next day. A distributor can
cater specifically for the low-volume customer,
enabling them to buy an off-the-shelf unit that
will satisfy, say, 80% of their requirements
before they need to talk direct to
the manufacturer.
This development
‘stop-gap’ can therefore provide
a crucial time and cost advantage.
Of course, in the fast paced and dynamic
world of the design engineer, where new
technologies and market demands emerge and
evolve with astonishing rapidity, any additional
functionality that can deliver time and cost
savings is a big plus. This is the unique edge
that the Embedded Development Platform (EDP)
from RS can offer to hard-pressed designers.
The EDP consists of a baseboard measuring
220mm x 100mm that can hold a combination of
up to four CPU or application modules – a ‘first’
in this field of technology. It has been designed
robustly to have a significantly longer lifespan
than the average development board and has
been subject to rigorous testing. And, during
the design stage, strenuous efforts have been
made to protect against the most common
human errors.
The minimum configuration of the baseboard
comprises four identical stations, with a
single plug-in processor module as standard.
The baseboard currently supports processor
modules featuring either the Infineon XC167
or ST Microeletronics STR912 processors.
Others will be added regularly. Various CPU and
application module permutations are possible
and even the minimum configuration allows the
engineer to operate a web-server easily, via the
standard onboard Ethernet connection.
Various application modules are available,
including an initial starter kit range consisting of
basic digital and analogue I/O, a motor control
module and a communications module. Each
module contains full schematics, Gerber files
and a bill-of-materials supplied on an ‘Open-
Source’ basis. Further modules will be added
as the EDP becomes a standard designer’s
tool. The baseboard itself comes with a
CD containing all necessary
software drivers
and, for processor
m o d u l e s ,
appropriate
Windows-based
development tools.
Advanced users
will also find the
baseboard can run
more than one processor
module in a master and
slave configuration.
Fitted with rubber feet for
laying flat on the bench, the EDP
can also be used in a standard
r a c k system and, by adding a 64-way
DIN connector, such as RS’ 381-8696 (not part
of the EDP package), it can be plugged into a
backplane. It is also fitted with +3.3V and +5V
regulators, a back-up battery, RJ45 Ethernet
and mini-USB connectors, +12VDC power-
supply jack, I/O breakout header and eight DIP
switches ported onto the system I_C bus.
The DIP switches allow the user software,
running on a processor module, to read a
configuration setting, enabling I/O ports to be
setup correctly. Depending on the capability
of the particular processor module, up to three
I_C buses and two CAN networks are available.
Many of the application modules use an I_C bus
for primary communication with the processor,
providing maximum flexibility. Some processor
chips will require +5VDC, others +3.3VDC. A
factory link on the module selects the correct
supply from the connector. This supply is linked
www.embedded-europe.com
15/09/08 16:52:21
 The missing piece of your
electronics information puzzle
Offering global coverage with a
European perspective

Most existing electronics publications in

Europe only supply local coverage. Yet
the electronics market has become global.
EE Times Europe, delivers a truly dynamic
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P37_ESEOct08.indd 1 15/09/08 15:25:43

 Embedded Distribution

The core element of RS’ Embedded
Development Platform is the reusable
baseboard, used to evaluate different
microcontrollers and technologies, and
develop applications.
The platform adopts the extended
Eurocard format and consists of four identical
development stations, with a host of breakout
peripherals and bus options.
The unique design of the development
stations accepts any plug-in EDP CPU Module,
to allow the testing and development of
specific microcontrollers across different
technologies and manufacturers. This
reduces project costs by removing the need
to purchase specific development kits from
manufacturers.
There is currently two EDP CPU modules
available; one for the Infineon XC167, and one
featuring the ST Microelectronics STR912.
More CPU modules are promised.
Both modules are supplied with associated
development environments (including the
Keil uVision and Hitex HiTOP IDEs), example
code and documentation. The baseboard
stations can also accept any of the plug-in
EDP Application Modules, acting as reference
designs to support microcontroller-based
solutions. There are four modules currently
available, addressing analogue and digital
I/O, motor control and basic communications
respectively.
RS also supplies ‘ready made’ starter kits,
comprising a baseboard, processor module
and application modules, to address specific
market segments.

to a further connector pin on all the other module
stations providing a correct voltage reference or
bus pull-up for the application modules. There
is also duplication of an analogue input unit, for
larger inputs.
It is important to note that the EDP is not
an SBC; it is a universal demonstration board
available with different processor modules that
is designed to work seamlessly with different
application modules. On the other hand, an
SBC is a ‘step down’ from a home PC that is
designed to operate a series of applications and
software to a customer’s specific requirements,
for example a pinball machine in a gaming hall,
a vending machine at a station or a high street
ATM. An EDP application would not be suitable
for this type of application because the modules
have not yet been developed.
Fit for purpose
An important issue – both for SBC suppliers and
customers – is to maximise complementarities
and minimise cross-over. In this way conflict
between suppliers’ equipment is avoided and
customers get solutions tailored to their specific
needs. To illustrate this, RS uses 3 suppliers;
Arcom, Advantech and Kontron, each of whom
provides a complementary range of products
to suit slightly different needs. For example,
Arcom is focused on the industrial market,
while Advantech supplies rugged applications,
and Kontron offers SBCs for flexible solutions
in control systems. The products include single
board computers (SBCs), box SBCs, PICMG
SBCs, slot CPU cards, system on modules, flat
panel PCs, industrial motherboards and graphic
controllers.
Some may ask if there are too many or too
few formats for SBCs available today. For SBC
technology, standardisation can be the key to
greater success overall. With the evolution of
web-based technologies, SBC developments
need to be able to respond to future customer
requirements with greater flexibility while still
retaining a recognised platform, such as PC104.
The number of formats at present is both
manageable and low. Kontron and Advantech
have expansion boards for some products and
stackable PC104 for multiple applications, so
the real issue is what is on the board and what
will it do, rather than the format.
These are mini computers configured with
functionality to do a limited number of functions
well, so arguably the designer is going to be
more concerned about how it interfaces with
the rest of his system.
With more sophisticated System-on-Chips
being developed every day, will SBCs be
replaced with single-chip solutions in the near
future? There will, of course, always be demand
for electronic equipment designed for specific
embedded applications. This means that Single
Board Computers in some format will be with us
way into the future. What we can’t anticipate
so easily is how they will evolve or what they
might look like.
The life span of an SBC depends on its
cost and capability and the purpose for which
it is required. For example, as long as people
need cash they will need an ATM and this
means some type of control will be needed to
dispense the money, and record the transaction
for the bank and the customer. Convergence of
technology and size reduction mean that even
hand-held and moveable objects can now be
defined as SBCs and these will benefit from
PSoC products. Therefore, while the current
format for SBCs may still be right for a range of
applications, they could be overtaken by other
types of technologies.
www.uk.rs-online.com
David Giles, Software Test Tools
Manager, Hitex, (RS Components)
– will present An Embedded
Development Platform Explained on
Thursday October 2 at ESS. See more
details at: www.embedded.co.uk

38 ESE Magazine October 2008 www.embedded-europe.com

P36-38_ESEOct08.indd 38 15/09/08 16:52:40

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P39_ESEOct08.indd 1 15/09/08 15:12:15

 Embedded Distribution
Embedded services target XP Professional
Distribution channels gear up to address the withdrawal of Windows XP Professional. Philip Ling reports.
Despite the fact it is used extensively in
embedded applications, Microsoft has
announced the withdrawal of Windows
XP Professional. This, in turn, is leading to
the introduction of new services to support
embedded users.
Although the use of Windows XP Embedded
would often provide a more attractive
solution – both commercially and technically
– the simple reality is that many embedded
applications are essentially pared down PCs,
which means they are often deployed using the
same desktop operating system used during
the development of applications. Although XP
Professional wasn’t intended to be used in this
way, porting the application with the same OS
eases deployment, with little or no modification
needed.
However, with its withdrawal, OEMs must
Have it your
way!
Surtech Distribution, specialist distributor for
enclosures and accessories, is now offering
customers the chance to design their own
enclosures – or modify standard products.
Working alongside Surtech’s technical team,
using specialist 3D CAD software, customers
can see and approve their designs before
placing an order. Once approved, the design is
sent direct to the manufacturing plant and even
allows batch production against orders.
“Our customers are no longer constrained
by having to use standard products,” said
Peter Curtis, Business Development Manager
at Surtech. “For applications where a custom
design would deliver significant advantages,
designers do not have to trade this advantage
off against increased production costs, or
contend with extended lead-times.”
Curtis added: “We are the first distributor
in the industry with the technical expertise and
systems to be able to offer this service, which
is available with any Surtech enclosure, free
standing racking, sub-racking, cases, diecast
and plastic boxes – including custom finishing
and colour.”
Sutech has also signed a distribution
agreement with Rittal which will initially cover
the Ripac 19in subrack range. Surtech will offer
full technical support, design assistance and
commercial support for the range as well as
extensive stock holding.
www.surtechdist.co.uk
40 ESE Magazine October 2008
P40-41_ESEOct08.indd 40
now face a future without XP
Professional.
One of the options is porting
their application to XP Embedded,
a service now being offered by
some Systems Integrators such as
MPC Data, through its ‘Embedded
XPert’ service.
Abacus Embedded is also
rising to the challenge, by
launching its ‘Windows XP
Professional Hotline’, available
on 0845 2011078.
Part of its solution includes
‘Zul Smart, one of ‘Microsoft XP Professional for
Abacus’ Windows Embedded Systems’, a package described
Embedded as being technically identical to the desktop
specialists, mans product in every respect except the licensing
the hotline.’ terms. The company is promising support for
Adapter for
wireless data
Gleichman Sunrise is now offering a wireless
USB adapter with an extended frequency range
of 5 to 10GHz. NEC Electronics’ device wire
adapter, the DWA uPD720180A, is designed to
On Semi adds
AMIS to channel
ON Semiconductor has announced that
the broad portfolio of Application Specific
Standard Products (ASSP) it acquired through
the acquisition of AMI Semiconductor is
now available through its global network of
authorised distributors ensuring component
availability, providing credit, component
preparation and kitting services as well as
logistics support and design.
Former AMI Semiconductor ASSPs now
available address the automotive, medical, and
this alternative is promised to last at least until
2016.
Nick Donaldson, General Manager of
Abacus Embedded, said: “Microsoft Windows
XP Professional is widely used in a host of
applications, from kiosks to gaming machines,
industrial control systems to building
management systems. Often the manufacturers
source their licenses through the Microsoft
retail channel and will no longer be able to
obtain them from their existing suppliers. A
call to the Abacus hotline can not only provide
a replacement source for licenses, but can
also start a discussion about operating system
products that may be more suitable, and could
even be cheaper than the software they are
using at the moment.”
www.embedded-xpert.com
www.abacus-embedded.com/xppro
enable communications between wireless USB
2.0 compatible PCs, or wireless USB 2.0 host
systems and compatible peripheral devices.
It is software compatible with NEC’s previous
DWA, which operates between 3 to 5GHz and
enables the simultaneous communication of
multiple wireless USB hosts and peripherals.
The recently announced uPD72017 host
controller will support the
extended frequency range,
combining to provide fast
and reliable wireless USB
connections.
Samples are available
today from Gleichmann
Sunrise, with volume
production expected to
commence in October.
www.ge-sunrise.co.uk
industrial sectors, and include: transceivers;
stepper motor drivers; DSP systems; ULP
memories; PoE power devices; drivers, and
clocks.
“We are very excited about launching these
new products into distribution on a global
basis,” said Jeff Thomson, Vice President,
Global Channel Sales: “We have excellent
partners in our global distribution network, who
have a strong focus on customer satisfaction
and coverage. Through their dedicated
resources we are better positioned to deliver
the right products at the right time to the right
customers.”
www.onsemi.com
www.embedded-europe.com
15/09/08 16:57:37
 Auto connect
A leading US based manufacturer of
miniature connectors for high reliability
applications, Omnetics Connector,
has signed a franchise distribution
agreement with Filcon, the UK based
specialist connector distributor. The
agreement will cover Europe for the
autosport market and the UK for all
other sectors.
Gary Evans, European Sales Manager
for Omnetics, said: “Filcon is a relatively
new name in the UK, but its personnel
miniature, rugged products.”
Peter Boreham, General Manager
of Filcon, added: “Formula 1 is very
advanced in its use of technology, and
the sport is constantly introducing
new electronic systems that place
great demands in terms of size, weight
and performance on the connectors.
Omnetics has the products to enable
these applications.”
Boreham went on to say: “Omnetics
makes very reliable, miniature high
quality connectors, and there is
always a good range of product, either

Waterproof PCs rated to IP65 have many years of experience in

Trident has strengthened its industrial panel
computer portfolio, with the introduction of
a new family of waterproof PCs. The FOX-
120 and FOX-150 multi-purpose computers
from AAEON feature Intel Celeron M
processors and touch-screen SVGA
displays, housed in a waterproof casing
that is rated to IP65 on all sides.
The FOX-120 has a 12in SVGA colour
TFT LCD displaying up to 262k colours, with
800 x 600 resolution. A 15-inch TFT LCD is
built into the FOX-150, increasing screen
resolution up to 1024 x 768 and colour
depth up to 16.7 million.
Brightness is the same for both
models, but the FOX-150 offers a wider
viewing angle of up to 160 degrees in
both horizontal and vertical axes. An eight-
wire touch screen provides the analogue
resistive user input and is guaranteed
over a million operations. Day and night
modes are available for power-saving
applications.
The new industrial panel computers
are based on a low-power Intel Celeron M
connectors, so the company is in an
immediately available or on short lead
times. More, Omnetics leads the field
processor clocked at 1.5GHz; alternatively excellent position to help design-in our with new products such as its circular
there is a 600MHz version for power- innovative connector products. Filcon is latched series in nano D and micro D
conscious applications. Trident can add the especially active in the autosport arena densities, which the competition cannot
customer’s choice of Windows 2000, XP and is also looking to target military offer.”
or XP Embedded, allowing flexibility and and aerospace customers with our www.filcon.co.uk
compatibility with OEM applications.
Both 12- and 15-inch models include
up to 512MB of RAM, together with either
an internal CompactFlash disk or an anti- Completion acquisition of Azzurri. Before that Cirrus
Logic and Avnet Memec had already
vibration 2.5in disk-drive bay for solid-state Avnet Memec is the only distributor in extended their distribution agreement
storage. Europe offering a full range of Cirrus into the UK, France and Italy. It is now
External connections through the rear- Logic products in its portfolio. The distributing all Cirrus Logic products on
panel waterproof connector include dual completion of the product portfolio a pan-European level.
RS-232 and two USB 2.0 ports. Optionally, mainly results from Avnet Memec’s www. avnet.eu
10/100Base-TX Ethernet is offered via a
waterproof RJ-45 connector and an Audio
(Mic-in / Line-in / Line-out) socket is also
available.
Both models operated over an extended
-20 to +60 degrees C temperature range
and are resistant to shock and vibration.
Vertical applications are facilitated by
the choice of VESA 100mm or in-vehicle
mounting.
www.trident-uk.co.uk

Tyco – Aerco Radiation cross-linking prevents cold flow

cable deal
Under the terms of a new trading
partnership with Tyco, Aerco will stock high
performance Spec 44 and Spec 55 cable.
Spec 44 cable has a dual wall
construction that combines the
characteristics of radiation cross-linked
polyalkene and polyvinylidene fluoride
(PVF2) to provide an insulation system that
offers a temperature rating of -65ºC to
+150ºC in a soldering iron resistant cable
that is also impervious to most solvent,
fuels and lubricants. Spec 44 wire and
cable is highly flame retarded, non-melting,
mechanically very tough and is easy to
handle and install using conventional tools.
of the insulation, a recognised problem of
some uncross-linked materials.
Spec 55 cable is insulated with modified
radiation cross-linked ETFE polymer and its
small size considerably reduces the size
and weight of electrical harnesses. It has Needing 253 different parts
a temperature rating of -65ºC to +200ºC.
from 36 manufacturers could
Both are supplied with tin-coated and
silver-coated copper and silver-coated,
give you sleepless nights.
high-strength copper alloy conductors Not with assured next day
while the Spec 55 can also be made with delivery from a single source.
nickel-coated copper conductors. Both Sweet dreams
cables demonstrate a total resistance to
electrical arc tracking under wet and dry
conditions at aircraft system voltages
and are not susceptible to UV or moisture
degradation. rswww.com/electronics 08457 201 201
www.aerco.co.uk

www.embedded-europe.com October 2008 ESE Magazine 41

P40-41_ESEOct08.indd 41 15/09/08 16:57:54

 < Standards
/Standards>>
A Standard Individual:
Life is a cabaret oh chum, come to the cabaret!
I
t’s that time of year again: Show time! What follows are my
own views and have not been suggested by anyone connected
with ESS. Actually no one gets any editorial sway on this
column (apart from the ESE lawyer!).
The problem is the average British Engineer (and their
management) doesn’t go to shows. Why not? Most don’t know
what they are missing. This is one of Donald Rumsfeld’s ‘unknown-
unknowns’.
What are they missing? INFORMATION and PEOPLE! There are
also ‘things’ at a show. The point is even with the internet – or
these days especially because of the internet – you can download
vast amounts of information and get swamped, easily missing
the important stuff, especially as search engine
results can be skewed and your details harvested by
cookies.
You still can’t beat a face to face discussion,
with the device, equipment or live demo in front
of you. Also, a picture on the web is not the same
as physically picking up the kit and examining the
build quality and asking questions. At ESS you get
to see all the main players in your area of interest
who operate in the UK and you don’t have to give
them your name or email address! Many of their
specialists will be there. They want to look around
too, so you can often meet the designers and experts
who have been let out of the office for the day, the By Chris Hills
ones who don’t usually make sales calls.
Unusually ESS has, alongside the paid conference, a free track in
the exhibition hall where there will be some useful presentations,
apart from the one I am doing: Debugging is difficult: so why do
it? Yes, develop without debugging! Or rather develop without the
bugs… not quite Bug Free Software, but getting there.
Some years ago I gave a presentation on debugging methods
starting from the ‘good old days’ and said no one should be doing
this now as for the last 5-10 years there have been far better
methods and tools. There were two rather glum looking engineers in
the front row. After the presentation I asked them what the problem
was. They said that they were still using methods that were 10
years old and did not realise how some of the tools and methods
had advanced.
Their view of ICE was that they cost £20,000 and were unreliable.
At the time, In Circuit Emulators were about £3-8k (and the £20k
was now £60k in real terms) extremely reliable and usable, with
features that were a complete revelation to them. They were only
at the event because it was free and on a Saturday it was the first
event they had been to in a decade. By not ‘wasting time’ on other
events over the previous decade they had cost their company a small
fortune in time using inefficient development and debug methods
and tools, and developed products that were less reliable than they
could have been. Not to mention being late to market.
Apart from seeing new tools, new methods and components
you get information; the sort of thing that does not get on to
corporate web sites. Specifically, several customers of mine picked
up some information in the ESS exhibition in 2006 that saved their
companies many thousands of pounds and saved six months’ wasted
development. Why? Because information flows at a trade show in
42 ESE Magazine October 2008
P42_ESEOct08.indd Sec1:42
ways you don’t get anywhere else. What’s more you can often sit
and discuss it over a coffee and put it in perspective before looking
round again for more information and solutions at the same show,
saving days of web searches and phone calls.
Some employers see it as a wasted day. They should see it as
a very cost effective day’s research. Many new things are shown
at shows. The ESS gets many product launches and not just that,
distributors such as ourselves show new tools from news companies.
You can’t rely on email news letters; spam has caused much tighter
filtering and many don’t get through. Besides there are many things
you may have missed over the last year. A discussion at a show is
far more effective than a web search; you can do those afterwards
armed with information from the show
Also it is surprising how many people form ‘off
the wall’ solutions after going to a show, as their
normal thought patterns have been altered and new
ideas introduced. As the proverb goes ‘a change is
as good as a rest’. It jolts you out of familiar thought
patterns and refreshes the brain. It is quite amazing
how ideas will pop up, caused by unrelated things
you see.
Also you end up with a bag of goodies, often
the stress reliving ‘executive’ toys which can save
your sanity, a box full of pens, note pads and a few
toys for the kids. One year Cyan – which does an
IDE – had tins of mints marked with their name and
product. Think about it…. That year everyone had
CyanIDE pills.
I am not suggesting going to every event and show, but ESS is
the largest show of its type in the UK and should be on your list.
There are other, more specialised events for specific areas, so by
all means look at some and pick carefully, but a day at the largest
generic UK event is a must just for the broad range of inputs and
ideas. You never know what will be useful or start a train of thought.
One day a year is well worth it.
Some employers used to be worried that staff would find other
jobs at shows! With the on-line job web sites and everyone having
a mobile it is highly unlikely. In my experience engineers are looking
for solutions for their current or next project.
Hopefully we will see you all at the Embedded Systems Show.
Stand 336, at the back by the exhibition theatre, but do glance
at the other stands on the way to see us. Apart from seeing my
presentation it is a chance to see all that is new and innovative as
well as the regular stuff in the embedded world. And, of course, the
coffee and doughnuts.
Whilst on ‘highly unlikely’, as I write this, the team at CERN is
going to start powering up and we could have disappeared into a
black hole, parallel universe (it will be nice to see David Icke again)
or just exploded before this article gets printed. As I am writing this
the panic merchants are on the TV, so if you are reading this all is
well. Well, at least the planet is still here, which is not quite the same
thing as ‘all is well’. You still have projects and products to finish.
These are my own personal views and not those of my company
Phaedrus Systems see www.phaedsys.com which is where the full
version of this column, with links etc, resides under the Documents
tab. < Ends >
www.embedded-europe.com
15/09/08 13:05:55
 AD INDEX
Advertiser URL Page

Adaptive Modules Ltd. www.adaptivemodules.com 29

BFI OPTiLAS www.bfioptilas.com 9,13
Direct Insight Ltd. www.directinsight.co.uk 23
Embedded Systems Show 2008 www.embedded.co.uk 19
Eurocircuits www.eurocircuits.com 30
EuroTech Ltd. www.eurotech-ltd.co.uk 33
Express Logic (UK) Ltd www.rtos.com 15
Green Hills Software Ltd. www.ghs.com 4,44
Hitex (UK) Ltd. www.hitex.co.uk 23,35
Kane Computing Ltd. www.kanecomputing .co.uk 35
Kontron UK Ltd. www.kontron.com 27
Lauterbach GmbH www.lauterbach.de 11
Mentor Graphics (UK) Ltd www.mentor.com 2
MSC UK Ltd. www.msc-ge.com 31
National Instruments www.ni.com/uk 25
Nohau UK Ltd. www.nohau.co.uk 13
Phaedrus Systems Ltd. www.phaedsys.com 21
Qualisystems www.qualisystems.com 7
Review Display Systems Ltd. www.review-displays.co.uk 27
RS Components International www.rswww.com 5
RS Components International www.rswww.com 27,35,41

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P43_ESEOct08.indd 23 16/09/08 11:24:09

 If it’s not INTEGRITY, ®

it’s not secure

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P21_ESEOct08.indd 1 16/09/08 15:59:59