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Cascaded Multilevel Inverter using level shifted SPWM for

STATCOM applications
Abstract:
The Multilevel inverter is used for industrial applications as alternative in high
power and medium voltage situations.Multilevel inverters have received this attention
as it promises fewer harmonics and are capable to function at low switching frequency
as compared to two level inverters.Out of many multilevel inverter topologies proposed,
Cascaded Multilevel Inverter (CMI) features a high modularity degree because each
inverter can be seen as a module with similar circuit topology, control structure and
modulation. With large number of advantages, cascaded multilevel inverter has one
major limitation of voltage unbalance across the dc capacitors. Multilevel inverters are
found in many applications; industrial motor drives, interfaces for renewable energy
systems (photo voltaic, wind energy), FACTS, traction drive system.
The method to achieve the objectives of the project is simulation of a cascaded
multilevel inverter employing level shifted SPWM. For simulation of cascaded multilevel
inverter we use MATLAB SIMULINK. Simulink, developed by Math Works, is a
graphical

programming

environment

for

modelling,

simulating

and

analyzing

multidomain dynamic systems. In SPWM several pulses per half cycle are used as in
the case of multiple-pulse modulation (MPM). In MPM, the pulse width is equal to all
the pulses. But in SPWM the pulse width is a sinusoidal function of the angular
position of the pulse in a cycle. This project also proposes Phase Disposition (PD) and
Phase Opposition Disposition (POD) SPWM techniques along with module voltage
balancing algorithm such as sorting strategy for a cascaded multilevel inverter.The
THD of PD and POD SPWM techniques are compared.
In literature, numerous modulation techniques have been proposed to obtain
the inverter output voltage nearing perfect sinusoidal waveform. Several modulation
techniques have been proposed for reducing harmonics and minimization of switching
losses for cascaded multilevel inverter.

Level Shifted PWM: Level shifted modulation scheme consists of triangular carriers
which are vertically shifted. THD of phase shifted modulation is much higher than
level shifted technique therefore, level shifted modulation is considered in this project.

In Phase Disposition (PD): In level shifted phase disposition, triangular carriers and
sinusoidal reference signals are compared to determine switching function.To cover the
wholevoltage range, the carriers are shifted vertically so that the carrier of first module
covers the range from 0 to Vdc, while second covers the range ofVdc to 2 Vdc. The last
module covers voltage from (N-1) Vdc to N Vdc where N is number of modules in
series.
Phase Opposition Disposition (POD):Phase opposition disposition, uses (M-1) number
ofcarrier signals, where M is number of output voltage levels. (M-1)/2number of
carrier signals are for positive voltage levels and other (M-1)/2 are for negative voltage
levels.The negative voltage level carrier signals are shifted by 180 degrees with respect
to that of positive voltage levels.

Conclusion:
In this project, CMI is proposed as a shunt connected STATCOM. Controllers
are designed to control the reactive power exchange with the ac system. PD and PODSPWM techniques are used to obtain switching function. It can be concluded that even
harmonics gets added during transient condition. THD of output voltage of inverter in
case of PD SPWM is greater than that of POD SPWM due to half wave unsymmetry in
phase switching function. Therefore, POD SPWM is better for this application. The
control design of CMI is to be verified using MATLAB simulations.
References:
1) Suruchi Agarwal,S. R. Deore, Level Shifted SPWM of a Seven Level Cascaded
Multilevel Inverter for STATCOM Applications, 2015 international conference
on nascent technologies in engineering field (ICNTE-2015)
2) X. Zhang, B.Zhang, P. Tang, X. Peng, Y.Luo, ECE Capstone Design Project,
Rutgers School of Engineering, spring 2014.
3) S. Pandey, S. Wadhwani, P. Bansal, Analysis of Three Level Diode Clamped
Multilevel Fed Induction MotoSn: 2319-7242, vol.3, issue 6 Page no. 63416346, June 2014.

P.R.H.ABHIGNA (12261A02A5)
G.PRANATHI (13265A0218)
B.SRAVANTHI (12261A0267)

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