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Department of Electrical and Electronic Engineering

FINAL EXAMINATION FALL 2014

Total Marks: 200

EEE 301: Digital Electronics

Time Allowed: 3 hours

Answer all questions in the answer script.

Figure in bracket [] next to each question number indicates marks for that question.
Understanding the question is a part of your exam.
You must show all the rough work.
The circuit/logic diagrams should be neatly drawn.
All the answers of a question should be answered sequentially.

1. a)Draw a single table for 4 bit numbers indicating the decimal equivalent
and binary equivalent. You should calculate and show equivalent
representation of all the numbers in sign-and-magnitude, 1s complement
and 2s complement.
[10 marks]
b) Give an example of a situation in 2s complement number system where
an overflow might occur (use the table in part a).
c) Convert the following numbers from the given base to the bases
indicated:
i.
(1587.333)12 to base 16
[5 marks]
ii.
(169875.36)16 to base 9
[5 marks]
d) Perform the following operation using 2s complement:
[10 marks]
Y = A+B-C+D-E
where A = (111100001)2, B=(1101)10, C=(110111001)2 ,D=(CCD)16and E=(256)8
2. a)Simplify the following Boolean function using Boolean algebra
simplification:
[10 marks]
BC + D(A + B) + BCD + ABC
b) Given the Boolean function:
i)
ii)

[10 marks]

F=xy+xy+yz
Implement it using NAND gates only
Implement it using NOR gates only

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c) Obtain the simplified expressions in product of sums for the following Boolean
function using K-map:
[10 marks]
F=klm+kmn+klmn+lmn
d)It is possible to assign weights to binary bits according to their positions. The
weights in BCD are 8,4,2,1. The bit assignment 0110 can be interpreted by the
weights to represent the decimal digit 6 because 0x8+1x4+1x2+0x0=6.
There is another weighted code such as 2421. In this code 0010 represents
decimal digit 2 [0x2+0x4+1x2+0x1].
Design a combinational circuit that converts a decimal digit from BCD (8421) to
2421 code. Show the truth table.
[20 marks]
3. a)Write down all the equations for 5 bit comparator circuit.
[10 marks]
b) Four two bit numbers A, B, C, D and two selection variables S 1 and S2 are
available. S1 will select either A or B and S2 will select either C or D. Depending
on the two selection variables, the circuit will work in the following way.
S1 S2
0 0
0 1
1 0
1 1

Operation
A+C
A+D
B+C
B+D

Use only 2 to 1 MUX and 2 bit parallel adder (only blocks).

[10 marks]
c) Design a circuit that outputs 2s complement of a 3 bit number using
encoder and decoder.
i) Draw the truth table for the conversion.
ii) Use blocks of 3 to 8 decoder and 8 to 3 encoder to draw the logic
diagram.
[10 marks]
d)Implement the following circuit with a 8:1 multiplexer:
F(A,B,C,D)=(0,1,3,4,8,9,15)
Use B, C and D as switches for the MUX.
[10 marks]
e) Design a full subtractor using a decoder with complemented outputs and
NAND gates. Show the truth table.
[10 marks]

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4. a) Make an excitation table for the given characteristic table:

C
0
0
1
1

D
0
1
0
1

[10 marks]

Q(t+1)
1
Q(t)
indeterminate
0

b) Consider the state diagram given above. Use the excitation table in a) to
design a synchronous sequential circuit for the above state diagram.
[20 marks]
5. a) Design a synchronous BCD counter with T flip flops.
[15 marks]
i) Draw the truth table.
ii) Derive the equations for the inputs of the flip flops.
iii) Draw the logic diagram.
b) Design a mod16 counter using a positive-edge trigger T flip-flop for LSB
and 2 negative-edge trigger T flip-flops for rest of the bits.
[5 marks]

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c) Design a counter with the following binary sequence: 0, 15, 12, 1,

6,13,5,7,11 and repeat. Use T flip flops.Draw the state table, state diagram
and draw the logic diagram for the design.
[20 marks]

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